./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/rfi008_pso.opt_false-unreach-call.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version aa418289 Calling Ultimate with: java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/working_dir_3db75dc9-7ab9-415b-ac0a-b159efe92ad4/bin-2019/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/working_dir_3db75dc9-7ab9-415b-ac0a-b159efe92ad4/bin-2019/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/working_dir_3db75dc9-7ab9-415b-ac0a-b159efe92ad4/bin-2019/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/working_dir_3db75dc9-7ab9-415b-ac0a-b159efe92ad4/bin-2019/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/pthread-wmm/rfi008_pso.opt_false-unreach-call.i -s /tmp/vcloud-vcloud-master/worker/working_dir_3db75dc9-7ab9-415b-ac0a-b159efe92ad4/bin-2019/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/working_dir_3db75dc9-7ab9-415b-ac0a-b159efe92ad4/bin-2019/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash c598afd7a270c7c00e096c19c67b4e2d819c5d89 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Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.23-aa41828 [2018-11-22 22:17:33,103 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-11-22 22:17:33,104 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-11-22 22:17:33,112 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-11-22 22:17:33,112 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-11-22 22:17:33,113 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-11-22 22:17:33,113 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-11-22 22:17:33,115 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-11-22 22:17:33,116 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-11-22 22:17:33,116 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-11-22 22:17:33,117 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-11-22 22:17:33,117 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-11-22 22:17:33,118 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-11-22 22:17:33,118 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-11-22 22:17:33,119 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-11-22 22:17:33,120 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-11-22 22:17:33,120 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-11-22 22:17:33,122 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-11-22 22:17:33,123 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-11-22 22:17:33,124 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-11-22 22:17:33,125 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-11-22 22:17:33,126 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-11-22 22:17:33,127 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-11-22 22:17:33,127 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-11-22 22:17:33,127 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-11-22 22:17:33,128 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-11-22 22:17:33,129 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-11-22 22:17:33,129 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-11-22 22:17:33,130 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-11-22 22:17:33,131 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-11-22 22:17:33,131 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-11-22 22:17:33,131 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-11-22 22:17:33,132 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-11-22 22:17:33,132 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-11-22 22:17:33,132 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-11-22 22:17:33,133 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-11-22 22:17:33,133 INFO L98 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/working_dir_3db75dc9-7ab9-415b-ac0a-b159efe92ad4/bin-2019/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2018-11-22 22:17:33,143 INFO L110 SettingsManager]: Loading preferences was successful [2018-11-22 22:17:33,143 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-11-22 22:17:33,144 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-11-22 22:17:33,144 INFO L133 SettingsManager]: * ... calls to implemented procedures=ONLY_FOR_CONCURRENT_PROGRAMS [2018-11-22 22:17:33,145 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-11-22 22:17:33,145 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-11-22 22:17:33,145 INFO L133 SettingsManager]: * Use SBE=true [2018-11-22 22:17:33,145 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-11-22 22:17:33,145 INFO L133 SettingsManager]: * sizeof long=4 [2018-11-22 22:17:33,145 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-11-22 22:17:33,145 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-11-22 22:17:33,146 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-11-22 22:17:33,146 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-11-22 22:17:33,146 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-11-22 22:17:33,146 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-11-22 22:17:33,146 INFO L133 SettingsManager]: * sizeof long double=12 [2018-11-22 22:17:33,146 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-11-22 22:17:33,146 INFO L133 SettingsManager]: * Use constant arrays=true [2018-11-22 22:17:33,146 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-11-22 22:17:33,146 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-11-22 22:17:33,147 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-11-22 22:17:33,147 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-11-22 22:17:33,147 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-11-22 22:17:33,147 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-22 22:17:33,147 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-11-22 22:17:33,147 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-11-22 22:17:33,147 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-11-22 22:17:33,147 INFO L133 SettingsManager]: * Trace refinement strategy=CAMEL [2018-11-22 22:17:33,147 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-11-22 22:17:33,147 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-11-22 22:17:33,148 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/working_dir_3db75dc9-7ab9-415b-ac0a-b159efe92ad4/bin-2019/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> c598afd7a270c7c00e096c19c67b4e2d819c5d89 [2018-11-22 22:17:33,169 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-11-22 22:17:33,177 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-11-22 22:17:33,178 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-11-22 22:17:33,179 INFO L271 PluginConnector]: Initializing CDTParser... [2018-11-22 22:17:33,179 INFO L276 PluginConnector]: CDTParser initialized [2018-11-22 22:17:33,180 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/working_dir_3db75dc9-7ab9-415b-ac0a-b159efe92ad4/bin-2019/uautomizer/../../sv-benchmarks/c/pthread-wmm/rfi008_pso.opt_false-unreach-call.i [2018-11-22 22:17:33,218 INFO L221 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_3db75dc9-7ab9-415b-ac0a-b159efe92ad4/bin-2019/uautomizer/data/41f2aa850/0a30ec6e5a1747caa62f3aa4038f9504/FLAG8262603bc [2018-11-22 22:17:33,573 INFO L307 CDTParser]: Found 1 translation units. [2018-11-22 22:17:33,574 INFO L161 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/working_dir_3db75dc9-7ab9-415b-ac0a-b159efe92ad4/sv-benchmarks/c/pthread-wmm/rfi008_pso.opt_false-unreach-call.i [2018-11-22 22:17:33,582 INFO L355 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_3db75dc9-7ab9-415b-ac0a-b159efe92ad4/bin-2019/uautomizer/data/41f2aa850/0a30ec6e5a1747caa62f3aa4038f9504/FLAG8262603bc [2018-11-22 22:17:33,593 INFO L363 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/working_dir_3db75dc9-7ab9-415b-ac0a-b159efe92ad4/bin-2019/uautomizer/data/41f2aa850/0a30ec6e5a1747caa62f3aa4038f9504 [2018-11-22 22:17:33,596 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-11-22 22:17:33,597 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2018-11-22 22:17:33,598 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-11-22 22:17:33,598 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-11-22 22:17:33,601 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-11-22 22:17:33,602 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 22.11 10:17:33" (1/1) ... [2018-11-22 22:17:33,604 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@2682203f and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.11 10:17:33, skipping insertion in model container [2018-11-22 22:17:33,604 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 22.11 10:17:33" (1/1) ... [2018-11-22 22:17:33,612 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-11-22 22:17:33,648 INFO L176 MainTranslator]: Built tables and reachable declarations [2018-11-22 22:17:33,893 INFO L201 PostProcessor]: Analyzing one entry point: main [2018-11-22 22:17:33,903 INFO L191 MainTranslator]: Completed pre-run [2018-11-22 22:17:34,008 INFO L201 PostProcessor]: Analyzing one entry point: main [2018-11-22 22:17:34,053 INFO L195 MainTranslator]: Completed translation [2018-11-22 22:17:34,054 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.11 10:17:34 WrapperNode [2018-11-22 22:17:34,054 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-11-22 22:17:34,055 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2018-11-22 22:17:34,055 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2018-11-22 22:17:34,055 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2018-11-22 22:17:34,062 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.11 10:17:34" (1/1) ... [2018-11-22 22:17:34,076 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.11 10:17:34" (1/1) ... [2018-11-22 22:17:34,098 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2018-11-22 22:17:34,099 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-11-22 22:17:34,099 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-11-22 22:17:34,099 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-11-22 22:17:34,106 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.11 10:17:34" (1/1) ... [2018-11-22 22:17:34,107 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.11 10:17:34" (1/1) ... [2018-11-22 22:17:34,110 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.11 10:17:34" (1/1) ... [2018-11-22 22:17:34,110 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.11 10:17:34" (1/1) ... [2018-11-22 22:17:34,117 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.11 10:17:34" (1/1) ... [2018-11-22 22:17:34,120 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.11 10:17:34" (1/1) ... [2018-11-22 22:17:34,123 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.11 10:17:34" (1/1) ... [2018-11-22 22:17:34,125 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-11-22 22:17:34,126 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-11-22 22:17:34,126 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-11-22 22:17:34,126 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-11-22 22:17:34,127 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.11 10:17:34" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_3db75dc9-7ab9-415b-ac0a-b159efe92ad4/bin-2019/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-22 22:17:34,180 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-11-22 22:17:34,180 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2018-11-22 22:17:34,180 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2018-11-22 22:17:34,180 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-11-22 22:17:34,180 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2018-11-22 22:17:34,180 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2018-11-22 22:17:34,180 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2018-11-22 22:17:34,181 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2018-11-22 22:17:34,181 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2018-11-22 22:17:34,181 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-11-22 22:17:34,181 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-11-22 22:17:34,182 WARN L198 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2018-11-22 22:17:34,681 INFO L275 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-11-22 22:17:34,681 INFO L280 CfgBuilder]: Removed 8 assue(true) statements. [2018-11-22 22:17:34,681 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 22.11 10:17:34 BoogieIcfgContainer [2018-11-22 22:17:34,682 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-11-22 22:17:34,682 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-11-22 22:17:34,682 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-11-22 22:17:34,684 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-11-22 22:17:34,684 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 22.11 10:17:33" (1/3) ... [2018-11-22 22:17:34,685 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@38cf5b95 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 22.11 10:17:34, skipping insertion in model container [2018-11-22 22:17:34,685 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.11 10:17:34" (2/3) ... [2018-11-22 22:17:34,685 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@38cf5b95 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 22.11 10:17:34, skipping insertion in model container [2018-11-22 22:17:34,685 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 22.11 10:17:34" (3/3) ... [2018-11-22 22:17:34,686 INFO L112 eAbstractionObserver]: Analyzing ICFG rfi008_pso.opt_false-unreach-call.i [2018-11-22 22:17:34,717 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,717 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~nondet3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,717 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~nondet4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,717 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,717 WARN L317 ript$VariableManager]: TermVariabe Thread0_P0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,717 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~nondet3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,718 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~nondet4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,718 WARN L317 ript$VariableManager]: TermVariabe Thread0_P0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,718 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,718 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,718 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,719 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,719 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,719 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,719 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,719 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,719 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,720 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,720 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,720 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,720 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,720 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,720 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,720 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,721 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,721 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,721 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,721 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,721 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,721 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,721 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,721 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,722 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,722 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,722 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,722 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,722 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,722 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,722 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,722 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,723 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,723 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,723 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,723 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,723 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,723 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,723 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,724 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,724 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,724 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,724 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,724 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,724 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,724 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,724 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,725 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,725 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,725 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,725 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,725 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,725 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,725 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,725 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,726 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,726 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,726 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,726 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,726 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,726 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,726 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,726 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,727 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,727 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,727 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,727 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,727 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,727 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,727 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,727 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,727 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,728 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,728 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,728 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,728 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,728 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,728 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,728 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,729 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,729 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,729 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,729 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,729 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,729 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~nondet26.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,729 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~nondet26.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,729 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,729 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,730 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~nondet26.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,730 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~nondet26.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,730 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,731 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,731 WARN L317 ript$VariableManager]: TermVariabe Thread1_P1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,731 WARN L317 ript$VariableManager]: TermVariabe Thread1_P1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,731 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,731 WARN L317 ript$VariableManager]: TermVariabe Thread1_P1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,732 WARN L317 ript$VariableManager]: TermVariabe Thread1_P1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,733 WARN L317 ript$VariableManager]: TermVariabe Thread1_P1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,733 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,733 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,733 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,733 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,733 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,733 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,733 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,734 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,734 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,734 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,734 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,734 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,734 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,734 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,734 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,734 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,735 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,735 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,735 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,735 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,735 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,735 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,735 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,736 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,736 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,736 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,736 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,736 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,736 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,736 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,736 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,737 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,737 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,737 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,737 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,737 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,737 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,737 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,737 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,737 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,738 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,738 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,738 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,738 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,738 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,738 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,738 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,739 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,739 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,739 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,739 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,739 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,739 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,739 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,739 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite45| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,740 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,740 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,740 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,740 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,740 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite45| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,740 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite44| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,740 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite45| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,740 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,740 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite44| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,741 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,741 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,741 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite48| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,741 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite44| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,741 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite45| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,741 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,741 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,742 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite48| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,742 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite46| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,742 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite47| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,742 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite48| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,742 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite47| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,742 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,743 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite44| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,743 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite49| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,743 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite49| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,743 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite47| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,744 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite48| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,744 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite46| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,744 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite46| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,744 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite49| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,744 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite49| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,744 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite46| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,744 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite47| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,745 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite51| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,745 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite51| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,745 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite50| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,745 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite51| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,745 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite50| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,745 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite50| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,745 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite52| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,746 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite52| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,746 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite50| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,746 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite51| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,746 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite52| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,746 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite52| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,746 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite53| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,747 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite53| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,747 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite53| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,747 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite53| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,747 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite54| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,747 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite54| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,747 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite54| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,747 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite54| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,747 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite55| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,748 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite55| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,748 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite55| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,748 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite55| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,748 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet56.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,748 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet56.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,748 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,748 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,748 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet56.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,748 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet56.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:17:34,762 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2018-11-22 22:17:34,762 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-11-22 22:17:34,769 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 3 error locations. [2018-11-22 22:17:34,779 INFO L257 AbstractCegarLoop]: Starting to check reachability of 3 error locations. [2018-11-22 22:17:34,796 INFO L133 ementStrategyFactory]: Using default assertion order modulation [2018-11-22 22:17:34,796 INFO L382 AbstractCegarLoop]: Interprodecural is true [2018-11-22 22:17:34,797 INFO L383 AbstractCegarLoop]: Hoare is true [2018-11-22 22:17:34,797 INFO L384 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-11-22 22:17:34,797 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-11-22 22:17:34,797 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-11-22 22:17:34,797 INFO L387 AbstractCegarLoop]: Difference is false [2018-11-22 22:17:34,797 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-11-22 22:17:34,797 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-11-22 22:17:34,804 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 174places, 227 transitions [2018-11-22 22:17:40,614 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 83128 states. [2018-11-22 22:17:40,615 INFO L276 IsEmpty]: Start isEmpty. Operand 83128 states. [2018-11-22 22:17:40,621 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2018-11-22 22:17:40,621 INFO L394 BasicCegarLoop]: Found error trace [2018-11-22 22:17:40,621 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-22 22:17:40,623 INFO L423 AbstractCegarLoop]: === Iteration 1 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-22 22:17:40,626 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-22 22:17:40,626 INFO L82 PathProgramCache]: Analyzing trace with hash -509770769, now seen corresponding path program 1 times [2018-11-22 22:17:40,628 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-22 22:17:40,628 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-22 22:17:40,663 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:17:40,663 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-22 22:17:40,664 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:17:40,700 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-22 22:17:40,783 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-22 22:17:40,784 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-22 22:17:40,785 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-22 22:17:40,787 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-22 22:17:40,794 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-22 22:17:40,795 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-22 22:17:40,796 INFO L87 Difference]: Start difference. First operand 83128 states. Second operand 4 states. [2018-11-22 22:17:42,314 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-22 22:17:42,314 INFO L93 Difference]: Finished difference Result 150584 states and 603161 transitions. [2018-11-22 22:17:42,315 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-22 22:17:42,316 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 39 [2018-11-22 22:17:42,316 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-22 22:17:42,677 INFO L225 Difference]: With dead ends: 150584 [2018-11-22 22:17:42,677 INFO L226 Difference]: Without dead ends: 105840 [2018-11-22 22:17:42,679 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-22 22:17:43,692 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 105840 states. [2018-11-22 22:17:44,846 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 105840 to 61236. [2018-11-22 22:17:44,847 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 61236 states. [2018-11-22 22:17:45,015 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 61236 states to 61236 states and 248291 transitions. [2018-11-22 22:17:45,016 INFO L78 Accepts]: Start accepts. Automaton has 61236 states and 248291 transitions. Word has length 39 [2018-11-22 22:17:45,016 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-22 22:17:45,016 INFO L480 AbstractCegarLoop]: Abstraction has 61236 states and 248291 transitions. [2018-11-22 22:17:45,016 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-22 22:17:45,016 INFO L276 IsEmpty]: Start isEmpty. Operand 61236 states and 248291 transitions. [2018-11-22 22:17:45,023 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-11-22 22:17:45,023 INFO L394 BasicCegarLoop]: Found error trace [2018-11-22 22:17:45,025 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-22 22:17:45,025 INFO L423 AbstractCegarLoop]: === Iteration 2 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-22 22:17:45,025 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-22 22:17:45,025 INFO L82 PathProgramCache]: Analyzing trace with hash 433147210, now seen corresponding path program 1 times [2018-11-22 22:17:45,025 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-22 22:17:45,026 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-22 22:17:45,030 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:17:45,031 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-22 22:17:45,031 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:17:45,042 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-22 22:17:45,093 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-22 22:17:45,093 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-22 22:17:45,093 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-22 22:17:45,099 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-22 22:17:45,099 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-22 22:17:45,099 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-22 22:17:45,099 INFO L87 Difference]: Start difference. First operand 61236 states and 248291 transitions. Second operand 5 states. [2018-11-22 22:17:46,355 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-22 22:17:46,355 INFO L93 Difference]: Finished difference Result 146040 states and 554301 transitions. [2018-11-22 22:17:46,355 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-11-22 22:17:46,355 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 47 [2018-11-22 22:17:46,355 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-22 22:17:46,690 INFO L225 Difference]: With dead ends: 146040 [2018-11-22 22:17:46,691 INFO L226 Difference]: Without dead ends: 145472 [2018-11-22 22:17:46,691 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2018-11-22 22:17:47,802 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 145472 states. [2018-11-22 22:17:51,353 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 145472 to 96614. [2018-11-22 22:17:51,354 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 96614 states. [2018-11-22 22:17:51,562 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 96614 states to 96614 states and 368456 transitions. [2018-11-22 22:17:51,563 INFO L78 Accepts]: Start accepts. Automaton has 96614 states and 368456 transitions. Word has length 47 [2018-11-22 22:17:51,564 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-22 22:17:51,564 INFO L480 AbstractCegarLoop]: Abstraction has 96614 states and 368456 transitions. [2018-11-22 22:17:51,564 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-22 22:17:51,564 INFO L276 IsEmpty]: Start isEmpty. Operand 96614 states and 368456 transitions. [2018-11-22 22:17:51,567 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2018-11-22 22:17:51,567 INFO L394 BasicCegarLoop]: Found error trace [2018-11-22 22:17:51,567 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-22 22:17:51,567 INFO L423 AbstractCegarLoop]: === Iteration 3 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-22 22:17:51,567 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-22 22:17:51,567 INFO L82 PathProgramCache]: Analyzing trace with hash 1604648536, now seen corresponding path program 1 times [2018-11-22 22:17:51,568 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-22 22:17:51,568 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-22 22:17:51,571 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:17:51,571 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-22 22:17:51,571 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:17:51,583 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-22 22:17:51,634 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-22 22:17:51,635 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-22 22:17:51,635 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-22 22:17:51,635 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-22 22:17:51,635 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-22 22:17:51,635 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-22 22:17:51,635 INFO L87 Difference]: Start difference. First operand 96614 states and 368456 transitions. Second operand 5 states. [2018-11-22 22:17:53,060 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-22 22:17:53,060 INFO L93 Difference]: Finished difference Result 199270 states and 748090 transitions. [2018-11-22 22:17:53,061 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-11-22 22:17:53,061 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 48 [2018-11-22 22:17:53,061 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-22 22:17:53,472 INFO L225 Difference]: With dead ends: 199270 [2018-11-22 22:17:53,472 INFO L226 Difference]: Without dead ends: 198806 [2018-11-22 22:17:53,472 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2018-11-22 22:17:54,892 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 198806 states. [2018-11-22 22:17:56,637 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 198806 to 108297. [2018-11-22 22:17:56,637 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 108297 states. [2018-11-22 22:17:56,872 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 108297 states to 108297 states and 408660 transitions. [2018-11-22 22:17:56,873 INFO L78 Accepts]: Start accepts. Automaton has 108297 states and 408660 transitions. Word has length 48 [2018-11-22 22:17:56,873 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-22 22:17:56,873 INFO L480 AbstractCegarLoop]: Abstraction has 108297 states and 408660 transitions. [2018-11-22 22:17:56,873 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-22 22:17:56,873 INFO L276 IsEmpty]: Start isEmpty. Operand 108297 states and 408660 transitions. [2018-11-22 22:17:56,879 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 51 [2018-11-22 22:17:56,879 INFO L394 BasicCegarLoop]: Found error trace [2018-11-22 22:17:56,880 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-22 22:17:56,880 INFO L423 AbstractCegarLoop]: === Iteration 4 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-22 22:17:56,880 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-22 22:17:56,880 INFO L82 PathProgramCache]: Analyzing trace with hash 1056563390, now seen corresponding path program 1 times [2018-11-22 22:17:56,880 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-22 22:17:56,880 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-22 22:17:56,882 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:17:56,882 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-22 22:17:56,882 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:17:56,891 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-22 22:17:56,923 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-22 22:17:56,923 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-22 22:17:56,923 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-22 22:17:56,924 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-22 22:17:56,924 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-22 22:17:56,924 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-22 22:17:56,924 INFO L87 Difference]: Start difference. First operand 108297 states and 408660 transitions. Second operand 3 states. [2018-11-22 22:17:57,584 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-22 22:17:57,584 INFO L93 Difference]: Finished difference Result 179116 states and 655175 transitions. [2018-11-22 22:17:57,584 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-22 22:17:57,585 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 50 [2018-11-22 22:17:57,585 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-22 22:17:57,939 INFO L225 Difference]: With dead ends: 179116 [2018-11-22 22:17:57,939 INFO L226 Difference]: Without dead ends: 179116 [2018-11-22 22:17:57,940 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-22 22:18:02,141 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 179116 states. [2018-11-22 22:18:03,703 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 179116 to 163647. [2018-11-22 22:18:03,703 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 163647 states. [2018-11-22 22:18:04,067 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 163647 states to 163647 states and 603626 transitions. [2018-11-22 22:18:04,067 INFO L78 Accepts]: Start accepts. Automaton has 163647 states and 603626 transitions. Word has length 50 [2018-11-22 22:18:04,067 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-22 22:18:04,067 INFO L480 AbstractCegarLoop]: Abstraction has 163647 states and 603626 transitions. [2018-11-22 22:18:04,067 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-22 22:18:04,067 INFO L276 IsEmpty]: Start isEmpty. Operand 163647 states and 603626 transitions. [2018-11-22 22:18:04,081 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2018-11-22 22:18:04,081 INFO L394 BasicCegarLoop]: Found error trace [2018-11-22 22:18:04,081 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-22 22:18:04,081 INFO L423 AbstractCegarLoop]: === Iteration 5 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-22 22:18:04,081 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-22 22:18:04,081 INFO L82 PathProgramCache]: Analyzing trace with hash 294072713, now seen corresponding path program 1 times [2018-11-22 22:18:04,081 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-22 22:18:04,081 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-22 22:18:04,082 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:18:04,082 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-22 22:18:04,082 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:18:04,091 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-22 22:18:04,154 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-22 22:18:04,154 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-22 22:18:04,155 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-22 22:18:04,155 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-22 22:18:04,155 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-22 22:18:04,155 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-11-22 22:18:04,155 INFO L87 Difference]: Start difference. First operand 163647 states and 603626 transitions. Second operand 6 states. [2018-11-22 22:18:06,164 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-22 22:18:06,164 INFO L93 Difference]: Finished difference Result 315524 states and 1139599 transitions. [2018-11-22 22:18:06,164 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-11-22 22:18:06,164 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 54 [2018-11-22 22:18:06,165 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-22 22:18:06,823 INFO L225 Difference]: With dead ends: 315524 [2018-11-22 22:18:06,823 INFO L226 Difference]: Without dead ends: 314988 [2018-11-22 22:18:06,823 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 24 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=49, Invalid=133, Unknown=0, NotChecked=0, Total=182 [2018-11-22 22:18:09,010 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 314988 states. [2018-11-22 22:18:11,826 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 314988 to 164410. [2018-11-22 22:18:11,826 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 164410 states. [2018-11-22 22:18:12,197 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 164410 states to 164410 states and 606497 transitions. [2018-11-22 22:18:12,197 INFO L78 Accepts]: Start accepts. Automaton has 164410 states and 606497 transitions. Word has length 54 [2018-11-22 22:18:12,197 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-22 22:18:12,197 INFO L480 AbstractCegarLoop]: Abstraction has 164410 states and 606497 transitions. [2018-11-22 22:18:12,197 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-22 22:18:12,197 INFO L276 IsEmpty]: Start isEmpty. Operand 164410 states and 606497 transitions. [2018-11-22 22:18:12,210 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2018-11-22 22:18:12,210 INFO L394 BasicCegarLoop]: Found error trace [2018-11-22 22:18:12,210 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-22 22:18:12,210 INFO L423 AbstractCegarLoop]: === Iteration 6 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-22 22:18:12,211 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-22 22:18:12,211 INFO L82 PathProgramCache]: Analyzing trace with hash -1217557252, now seen corresponding path program 1 times [2018-11-22 22:18:12,211 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-22 22:18:12,211 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-22 22:18:12,212 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:18:12,212 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-22 22:18:12,212 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:18:12,220 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-22 22:18:12,298 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-22 22:18:12,298 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-22 22:18:12,298 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-22 22:18:12,298 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-22 22:18:12,298 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-22 22:18:12,298 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2018-11-22 22:18:12,299 INFO L87 Difference]: Start difference. First operand 164410 states and 606497 transitions. Second operand 6 states. [2018-11-22 22:18:13,527 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-22 22:18:13,527 INFO L93 Difference]: Finished difference Result 215867 states and 792771 transitions. [2018-11-22 22:18:13,527 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-11-22 22:18:13,527 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 54 [2018-11-22 22:18:13,527 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-22 22:18:13,960 INFO L225 Difference]: With dead ends: 215867 [2018-11-22 22:18:13,960 INFO L226 Difference]: Without dead ends: 215867 [2018-11-22 22:18:13,960 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2018-11-22 22:18:18,999 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 215867 states. [2018-11-22 22:18:20,977 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 215867 to 201216. [2018-11-22 22:18:20,977 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 201216 states. [2018-11-22 22:18:21,451 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 201216 states to 201216 states and 739038 transitions. [2018-11-22 22:18:21,451 INFO L78 Accepts]: Start accepts. Automaton has 201216 states and 739038 transitions. Word has length 54 [2018-11-22 22:18:21,451 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-22 22:18:21,452 INFO L480 AbstractCegarLoop]: Abstraction has 201216 states and 739038 transitions. [2018-11-22 22:18:21,452 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-22 22:18:21,452 INFO L276 IsEmpty]: Start isEmpty. Operand 201216 states and 739038 transitions. [2018-11-22 22:18:21,469 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2018-11-22 22:18:21,469 INFO L394 BasicCegarLoop]: Found error trace [2018-11-22 22:18:21,470 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-22 22:18:21,470 INFO L423 AbstractCegarLoop]: === Iteration 7 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-22 22:18:21,470 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-22 22:18:21,470 INFO L82 PathProgramCache]: Analyzing trace with hash 1280458685, now seen corresponding path program 1 times [2018-11-22 22:18:21,470 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-22 22:18:21,470 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-22 22:18:21,471 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:18:21,471 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-22 22:18:21,471 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:18:21,480 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-22 22:18:21,511 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-22 22:18:21,511 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-22 22:18:21,511 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-22 22:18:21,511 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-22 22:18:21,511 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-22 22:18:21,512 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-22 22:18:21,512 INFO L87 Difference]: Start difference. First operand 201216 states and 739038 transitions. Second operand 4 states. [2018-11-22 22:18:21,617 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-22 22:18:21,617 INFO L93 Difference]: Finished difference Result 38680 states and 122685 transitions. [2018-11-22 22:18:21,617 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-22 22:18:21,617 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 54 [2018-11-22 22:18:21,617 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-22 22:18:21,657 INFO L225 Difference]: With dead ends: 38680 [2018-11-22 22:18:21,657 INFO L226 Difference]: Without dead ends: 32084 [2018-11-22 22:18:21,657 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-22 22:18:21,710 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 32084 states. [2018-11-22 22:18:21,946 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 32084 to 31837. [2018-11-22 22:18:21,946 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 31837 states. [2018-11-22 22:18:21,993 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 31837 states to 31837 states and 99516 transitions. [2018-11-22 22:18:21,994 INFO L78 Accepts]: Start accepts. Automaton has 31837 states and 99516 transitions. Word has length 54 [2018-11-22 22:18:21,994 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-22 22:18:21,994 INFO L480 AbstractCegarLoop]: Abstraction has 31837 states and 99516 transitions. [2018-11-22 22:18:21,994 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-22 22:18:21,994 INFO L276 IsEmpty]: Start isEmpty. Operand 31837 states and 99516 transitions. [2018-11-22 22:18:21,999 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 65 [2018-11-22 22:18:21,999 INFO L394 BasicCegarLoop]: Found error trace [2018-11-22 22:18:21,999 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-22 22:18:22,000 INFO L423 AbstractCegarLoop]: === Iteration 8 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-22 22:18:22,000 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-22 22:18:22,000 INFO L82 PathProgramCache]: Analyzing trace with hash 1118166751, now seen corresponding path program 1 times [2018-11-22 22:18:22,000 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-22 22:18:22,000 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-22 22:18:22,001 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:18:22,001 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-22 22:18:22,001 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:18:22,009 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-22 22:18:22,060 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-22 22:18:22,060 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-22 22:18:22,060 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-22 22:18:22,061 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-22 22:18:22,061 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-22 22:18:22,061 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-22 22:18:22,061 INFO L87 Difference]: Start difference. First operand 31837 states and 99516 transitions. Second operand 4 states. [2018-11-22 22:18:22,297 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-22 22:18:22,298 INFO L93 Difference]: Finished difference Result 41209 states and 129950 transitions. [2018-11-22 22:18:22,298 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-22 22:18:22,298 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 64 [2018-11-22 22:18:22,298 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-22 22:18:22,348 INFO L225 Difference]: With dead ends: 41209 [2018-11-22 22:18:22,348 INFO L226 Difference]: Without dead ends: 41209 [2018-11-22 22:18:22,349 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-22 22:18:22,413 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 41209 states. [2018-11-22 22:18:23,254 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 41209 to 35933. [2018-11-22 22:18:23,255 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 35933 states. [2018-11-22 22:18:23,306 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 35933 states to 35933 states and 112645 transitions. [2018-11-22 22:18:23,306 INFO L78 Accepts]: Start accepts. Automaton has 35933 states and 112645 transitions. Word has length 64 [2018-11-22 22:18:23,306 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-22 22:18:23,306 INFO L480 AbstractCegarLoop]: Abstraction has 35933 states and 112645 transitions. [2018-11-22 22:18:23,306 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-22 22:18:23,306 INFO L276 IsEmpty]: Start isEmpty. Operand 35933 states and 112645 transitions. [2018-11-22 22:18:23,311 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 65 [2018-11-22 22:18:23,311 INFO L394 BasicCegarLoop]: Found error trace [2018-11-22 22:18:23,311 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-22 22:18:23,312 INFO L423 AbstractCegarLoop]: === Iteration 9 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-22 22:18:23,312 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-22 22:18:23,312 INFO L82 PathProgramCache]: Analyzing trace with hash -1433990210, now seen corresponding path program 1 times [2018-11-22 22:18:23,312 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-22 22:18:23,312 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-22 22:18:23,313 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:18:23,313 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-22 22:18:23,314 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:18:23,319 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-22 22:18:23,371 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-22 22:18:23,371 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-22 22:18:23,371 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-22 22:18:23,372 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-22 22:18:23,372 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-22 22:18:23,372 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-11-22 22:18:23,372 INFO L87 Difference]: Start difference. First operand 35933 states and 112645 transitions. Second operand 6 states. [2018-11-22 22:18:23,907 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-22 22:18:23,907 INFO L93 Difference]: Finished difference Result 72510 states and 225561 transitions. [2018-11-22 22:18:23,908 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-11-22 22:18:23,908 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 64 [2018-11-22 22:18:23,908 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-22 22:18:24,005 INFO L225 Difference]: With dead ends: 72510 [2018-11-22 22:18:24,005 INFO L226 Difference]: Without dead ends: 72446 [2018-11-22 22:18:24,005 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 20 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=52, Invalid=130, Unknown=0, NotChecked=0, Total=182 [2018-11-22 22:18:24,110 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 72446 states. [2018-11-22 22:18:24,550 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 72446 to 40893. [2018-11-22 22:18:24,550 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 40893 states. [2018-11-22 22:18:24,610 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 40893 states to 40893 states and 126623 transitions. [2018-11-22 22:18:24,610 INFO L78 Accepts]: Start accepts. Automaton has 40893 states and 126623 transitions. Word has length 64 [2018-11-22 22:18:24,610 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-22 22:18:24,611 INFO L480 AbstractCegarLoop]: Abstraction has 40893 states and 126623 transitions. [2018-11-22 22:18:24,611 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-22 22:18:24,611 INFO L276 IsEmpty]: Start isEmpty. Operand 40893 states and 126623 transitions. [2018-11-22 22:18:24,621 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 71 [2018-11-22 22:18:24,621 INFO L394 BasicCegarLoop]: Found error trace [2018-11-22 22:18:24,621 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-22 22:18:24,621 INFO L423 AbstractCegarLoop]: === Iteration 10 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-22 22:18:24,621 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-22 22:18:24,621 INFO L82 PathProgramCache]: Analyzing trace with hash -1608074001, now seen corresponding path program 1 times [2018-11-22 22:18:24,621 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-22 22:18:24,621 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-22 22:18:24,623 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:18:24,623 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-22 22:18:24,623 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:18:24,628 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-22 22:18:24,663 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-22 22:18:24,663 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-22 22:18:24,663 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-22 22:18:24,664 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-22 22:18:24,664 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-22 22:18:24,664 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-22 22:18:24,664 INFO L87 Difference]: Start difference. First operand 40893 states and 126623 transitions. Second operand 3 states. [2018-11-22 22:18:24,810 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-22 22:18:24,810 INFO L93 Difference]: Finished difference Result 46898 states and 143100 transitions. [2018-11-22 22:18:24,811 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-22 22:18:24,811 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 70 [2018-11-22 22:18:24,811 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-22 22:18:24,867 INFO L225 Difference]: With dead ends: 46898 [2018-11-22 22:18:24,867 INFO L226 Difference]: Without dead ends: 46898 [2018-11-22 22:18:24,868 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-22 22:18:24,941 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 46898 states. [2018-11-22 22:18:25,289 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 46898 to 40581. [2018-11-22 22:18:25,289 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 40581 states. [2018-11-22 22:18:25,346 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 40581 states to 40581 states and 123025 transitions. [2018-11-22 22:18:25,347 INFO L78 Accepts]: Start accepts. Automaton has 40581 states and 123025 transitions. Word has length 70 [2018-11-22 22:18:25,347 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-22 22:18:25,347 INFO L480 AbstractCegarLoop]: Abstraction has 40581 states and 123025 transitions. [2018-11-22 22:18:25,347 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-22 22:18:25,347 INFO L276 IsEmpty]: Start isEmpty. Operand 40581 states and 123025 transitions. [2018-11-22 22:18:25,357 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 72 [2018-11-22 22:18:25,358 INFO L394 BasicCegarLoop]: Found error trace [2018-11-22 22:18:25,358 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-22 22:18:25,358 INFO L423 AbstractCegarLoop]: === Iteration 11 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-22 22:18:25,358 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-22 22:18:25,358 INFO L82 PathProgramCache]: Analyzing trace with hash 1170710301, now seen corresponding path program 1 times [2018-11-22 22:18:25,358 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-22 22:18:25,358 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-22 22:18:25,360 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:18:25,360 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-22 22:18:25,360 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:18:25,366 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-22 22:18:25,453 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-22 22:18:25,453 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-22 22:18:25,454 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-22 22:18:25,454 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-22 22:18:25,454 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-22 22:18:25,454 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2018-11-22 22:18:25,454 INFO L87 Difference]: Start difference. First operand 40581 states and 123025 transitions. Second operand 6 states. [2018-11-22 22:18:26,501 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-22 22:18:26,501 INFO L93 Difference]: Finished difference Result 50181 states and 152193 transitions. [2018-11-22 22:18:26,502 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-11-22 22:18:26,502 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 71 [2018-11-22 22:18:26,502 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-22 22:18:26,560 INFO L225 Difference]: With dead ends: 50181 [2018-11-22 22:18:26,561 INFO L226 Difference]: Without dead ends: 49877 [2018-11-22 22:18:26,561 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=23, Invalid=49, Unknown=0, NotChecked=0, Total=72 [2018-11-22 22:18:26,635 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 49877 states. [2018-11-22 22:18:26,994 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 49877 to 45421. [2018-11-22 22:18:26,994 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 45421 states. [2018-11-22 22:18:27,057 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 45421 states to 45421 states and 138099 transitions. [2018-11-22 22:18:27,057 INFO L78 Accepts]: Start accepts. Automaton has 45421 states and 138099 transitions. Word has length 71 [2018-11-22 22:18:27,057 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-22 22:18:27,057 INFO L480 AbstractCegarLoop]: Abstraction has 45421 states and 138099 transitions. [2018-11-22 22:18:27,057 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-22 22:18:27,057 INFO L276 IsEmpty]: Start isEmpty. Operand 45421 states and 138099 transitions. [2018-11-22 22:18:27,068 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 72 [2018-11-22 22:18:27,068 INFO L394 BasicCegarLoop]: Found error trace [2018-11-22 22:18:27,068 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-22 22:18:27,068 INFO L423 AbstractCegarLoop]: === Iteration 12 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-22 22:18:27,069 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-22 22:18:27,069 INFO L82 PathProgramCache]: Analyzing trace with hash -626241058, now seen corresponding path program 1 times [2018-11-22 22:18:27,069 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-22 22:18:27,069 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-22 22:18:27,070 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:18:27,070 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-22 22:18:27,070 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:18:27,078 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-22 22:18:27,127 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-22 22:18:27,128 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-22 22:18:27,128 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-22 22:18:27,128 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-22 22:18:27,128 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-22 22:18:27,128 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2018-11-22 22:18:27,129 INFO L87 Difference]: Start difference. First operand 45421 states and 138099 transitions. Second operand 5 states. [2018-11-22 22:18:27,174 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-22 22:18:27,174 INFO L93 Difference]: Finished difference Result 12413 states and 31271 transitions. [2018-11-22 22:18:27,174 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-11-22 22:18:27,174 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 71 [2018-11-22 22:18:27,174 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-22 22:18:27,182 INFO L225 Difference]: With dead ends: 12413 [2018-11-22 22:18:27,182 INFO L226 Difference]: Without dead ends: 10477 [2018-11-22 22:18:27,182 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2018-11-22 22:18:27,198 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10477 states. [2018-11-22 22:18:27,251 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10477 to 8356. [2018-11-22 22:18:27,252 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8356 states. [2018-11-22 22:18:27,260 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8356 states to 8356 states and 20870 transitions. [2018-11-22 22:18:27,260 INFO L78 Accepts]: Start accepts. Automaton has 8356 states and 20870 transitions. Word has length 71 [2018-11-22 22:18:27,261 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-22 22:18:27,261 INFO L480 AbstractCegarLoop]: Abstraction has 8356 states and 20870 transitions. [2018-11-22 22:18:27,261 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-22 22:18:27,261 INFO L276 IsEmpty]: Start isEmpty. Operand 8356 states and 20870 transitions. [2018-11-22 22:18:27,269 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 100 [2018-11-22 22:18:27,269 INFO L394 BasicCegarLoop]: Found error trace [2018-11-22 22:18:27,269 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-22 22:18:27,269 INFO L423 AbstractCegarLoop]: === Iteration 13 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-22 22:18:27,269 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-22 22:18:27,270 INFO L82 PathProgramCache]: Analyzing trace with hash 2040457871, now seen corresponding path program 1 times [2018-11-22 22:18:27,270 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-22 22:18:27,270 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-22 22:18:27,271 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:18:27,271 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-22 22:18:27,271 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:18:27,280 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-22 22:18:27,331 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-22 22:18:27,331 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-22 22:18:27,331 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-22 22:18:27,331 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-22 22:18:27,331 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-22 22:18:27,331 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-22 22:18:27,332 INFO L87 Difference]: Start difference. First operand 8356 states and 20870 transitions. Second operand 4 states. [2018-11-22 22:18:27,456 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-22 22:18:27,456 INFO L93 Difference]: Finished difference Result 9771 states and 23994 transitions. [2018-11-22 22:18:27,456 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-22 22:18:27,456 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 99 [2018-11-22 22:18:27,456 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-22 22:18:27,463 INFO L225 Difference]: With dead ends: 9771 [2018-11-22 22:18:27,463 INFO L226 Difference]: Without dead ends: 9771 [2018-11-22 22:18:27,463 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-22 22:18:27,477 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9771 states. [2018-11-22 22:18:27,527 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9771 to 9252. [2018-11-22 22:18:27,527 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9252 states. [2018-11-22 22:18:27,536 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9252 states to 9252 states and 22837 transitions. [2018-11-22 22:18:27,537 INFO L78 Accepts]: Start accepts. Automaton has 9252 states and 22837 transitions. Word has length 99 [2018-11-22 22:18:27,537 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-22 22:18:27,537 INFO L480 AbstractCegarLoop]: Abstraction has 9252 states and 22837 transitions. [2018-11-22 22:18:27,537 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-22 22:18:27,537 INFO L276 IsEmpty]: Start isEmpty. Operand 9252 states and 22837 transitions. [2018-11-22 22:18:27,543 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 100 [2018-11-22 22:18:27,543 INFO L394 BasicCegarLoop]: Found error trace [2018-11-22 22:18:27,544 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-22 22:18:27,544 INFO L423 AbstractCegarLoop]: === Iteration 14 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-22 22:18:27,544 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-22 22:18:27,544 INFO L82 PathProgramCache]: Analyzing trace with hash 30354030, now seen corresponding path program 1 times [2018-11-22 22:18:27,544 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-22 22:18:27,544 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-22 22:18:27,545 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:18:27,546 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-22 22:18:27,546 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:18:27,554 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-22 22:18:27,592 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-22 22:18:27,593 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-22 22:18:27,593 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-22 22:18:27,593 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-22 22:18:27,593 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-22 22:18:27,593 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-22 22:18:27,593 INFO L87 Difference]: Start difference. First operand 9252 states and 22837 transitions. Second operand 3 states. [2018-11-22 22:18:27,717 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-22 22:18:27,717 INFO L93 Difference]: Finished difference Result 12503 states and 30346 transitions. [2018-11-22 22:18:27,717 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-22 22:18:27,717 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 99 [2018-11-22 22:18:27,717 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-22 22:18:27,726 INFO L225 Difference]: With dead ends: 12503 [2018-11-22 22:18:27,726 INFO L226 Difference]: Without dead ends: 12503 [2018-11-22 22:18:27,726 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-22 22:18:27,743 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 12503 states. [2018-11-22 22:18:27,809 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 12503 to 11332. [2018-11-22 22:18:27,810 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11332 states. [2018-11-22 22:18:27,821 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11332 states to 11332 states and 27737 transitions. [2018-11-22 22:18:27,821 INFO L78 Accepts]: Start accepts. Automaton has 11332 states and 27737 transitions. Word has length 99 [2018-11-22 22:18:27,821 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-22 22:18:27,821 INFO L480 AbstractCegarLoop]: Abstraction has 11332 states and 27737 transitions. [2018-11-22 22:18:27,821 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-22 22:18:27,821 INFO L276 IsEmpty]: Start isEmpty. Operand 11332 states and 27737 transitions. [2018-11-22 22:18:27,830 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 100 [2018-11-22 22:18:27,830 INFO L394 BasicCegarLoop]: Found error trace [2018-11-22 22:18:27,830 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-22 22:18:27,830 INFO L423 AbstractCegarLoop]: === Iteration 15 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-22 22:18:27,830 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-22 22:18:27,830 INFO L82 PathProgramCache]: Analyzing trace with hash -46625547, now seen corresponding path program 1 times [2018-11-22 22:18:27,831 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-22 22:18:27,831 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-22 22:18:27,832 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:18:27,832 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-22 22:18:27,832 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:18:27,841 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-22 22:18:27,907 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-22 22:18:27,907 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-22 22:18:27,907 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-22 22:18:27,907 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-22 22:18:27,908 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-22 22:18:27,908 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-22 22:18:27,908 INFO L87 Difference]: Start difference. First operand 11332 states and 27737 transitions. Second operand 5 states. [2018-11-22 22:18:28,257 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-22 22:18:28,257 INFO L93 Difference]: Finished difference Result 13415 states and 32203 transitions. [2018-11-22 22:18:28,257 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-11-22 22:18:28,257 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 99 [2018-11-22 22:18:28,257 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-22 22:18:28,267 INFO L225 Difference]: With dead ends: 13415 [2018-11-22 22:18:28,267 INFO L226 Difference]: Without dead ends: 13415 [2018-11-22 22:18:28,267 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 3 SyntacticMatches, 3 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2018-11-22 22:18:28,285 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13415 states. [2018-11-22 22:18:28,354 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13415 to 11959. [2018-11-22 22:18:28,354 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11959 states. [2018-11-22 22:18:28,366 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11959 states to 11959 states and 29037 transitions. [2018-11-22 22:18:28,367 INFO L78 Accepts]: Start accepts. Automaton has 11959 states and 29037 transitions. Word has length 99 [2018-11-22 22:18:28,367 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-22 22:18:28,367 INFO L480 AbstractCegarLoop]: Abstraction has 11959 states and 29037 transitions. [2018-11-22 22:18:28,367 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-22 22:18:28,367 INFO L276 IsEmpty]: Start isEmpty. Operand 11959 states and 29037 transitions. [2018-11-22 22:18:28,378 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 100 [2018-11-22 22:18:28,379 INFO L394 BasicCegarLoop]: Found error trace [2018-11-22 22:18:28,379 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-22 22:18:28,379 INFO L423 AbstractCegarLoop]: === Iteration 16 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-22 22:18:28,379 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-22 22:18:28,379 INFO L82 PathProgramCache]: Analyzing trace with hash -1568907847, now seen corresponding path program 2 times [2018-11-22 22:18:28,379 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-22 22:18:28,379 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-22 22:18:28,381 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:18:28,381 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-22 22:18:28,381 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:18:28,389 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-22 22:18:28,455 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-22 22:18:28,455 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-22 22:18:28,455 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-22 22:18:28,455 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-22 22:18:28,455 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-22 22:18:28,455 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-11-22 22:18:28,456 INFO L87 Difference]: Start difference. First operand 11959 states and 29037 transitions. Second operand 6 states. [2018-11-22 22:18:28,818 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-22 22:18:28,818 INFO L93 Difference]: Finished difference Result 14604 states and 34854 transitions. [2018-11-22 22:18:28,819 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-11-22 22:18:28,819 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 99 [2018-11-22 22:18:28,819 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-22 22:18:28,831 INFO L225 Difference]: With dead ends: 14604 [2018-11-22 22:18:28,831 INFO L226 Difference]: Without dead ends: 14604 [2018-11-22 22:18:28,831 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2018-11-22 22:18:28,855 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 14604 states. [2018-11-22 22:18:28,940 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 14604 to 11757. [2018-11-22 22:18:28,940 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11757 states. [2018-11-22 22:18:28,953 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11757 states to 11757 states and 28093 transitions. [2018-11-22 22:18:28,953 INFO L78 Accepts]: Start accepts. Automaton has 11757 states and 28093 transitions. Word has length 99 [2018-11-22 22:18:28,954 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-22 22:18:28,954 INFO L480 AbstractCegarLoop]: Abstraction has 11757 states and 28093 transitions. [2018-11-22 22:18:28,954 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-22 22:18:28,954 INFO L276 IsEmpty]: Start isEmpty. Operand 11757 states and 28093 transitions. [2018-11-22 22:18:28,962 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 102 [2018-11-22 22:18:28,962 INFO L394 BasicCegarLoop]: Found error trace [2018-11-22 22:18:28,962 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-22 22:18:28,962 INFO L423 AbstractCegarLoop]: === Iteration 17 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-22 22:18:28,963 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-22 22:18:28,963 INFO L82 PathProgramCache]: Analyzing trace with hash -1718161189, now seen corresponding path program 1 times [2018-11-22 22:18:28,963 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-22 22:18:28,963 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-22 22:18:28,964 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:18:28,964 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-22 22:18:28,964 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:18:28,975 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-22 22:18:29,060 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-22 22:18:29,060 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-22 22:18:29,060 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-22 22:18:29,061 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-22 22:18:29,061 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-22 22:18:29,061 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-22 22:18:29,061 INFO L87 Difference]: Start difference. First operand 11757 states and 28093 transitions. Second operand 5 states. [2018-11-22 22:18:29,308 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-22 22:18:29,308 INFO L93 Difference]: Finished difference Result 12580 states and 29794 transitions. [2018-11-22 22:18:29,308 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-11-22 22:18:29,308 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 101 [2018-11-22 22:18:29,309 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-22 22:18:29,319 INFO L225 Difference]: With dead ends: 12580 [2018-11-22 22:18:29,319 INFO L226 Difference]: Without dead ends: 12580 [2018-11-22 22:18:29,319 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2018-11-22 22:18:29,342 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 12580 states. [2018-11-22 22:18:29,453 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 12580 to 11924. [2018-11-22 22:18:29,453 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11924 states. [2018-11-22 22:18:29,467 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11924 states to 11924 states and 28450 transitions. [2018-11-22 22:18:29,468 INFO L78 Accepts]: Start accepts. Automaton has 11924 states and 28450 transitions. Word has length 101 [2018-11-22 22:18:29,468 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-22 22:18:29,468 INFO L480 AbstractCegarLoop]: Abstraction has 11924 states and 28450 transitions. [2018-11-22 22:18:29,468 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-22 22:18:29,468 INFO L276 IsEmpty]: Start isEmpty. Operand 11924 states and 28450 transitions. [2018-11-22 22:18:29,478 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 102 [2018-11-22 22:18:29,478 INFO L394 BasicCegarLoop]: Found error trace [2018-11-22 22:18:29,478 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-22 22:18:29,478 INFO L423 AbstractCegarLoop]: === Iteration 18 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-22 22:18:29,478 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-22 22:18:29,478 INFO L82 PathProgramCache]: Analyzing trace with hash 2144271276, now seen corresponding path program 1 times [2018-11-22 22:18:29,478 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-22 22:18:29,478 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-22 22:18:29,480 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:18:29,480 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-22 22:18:29,480 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:18:29,490 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-22 22:18:29,556 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-22 22:18:29,556 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-22 22:18:29,556 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-22 22:18:29,556 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-22 22:18:29,557 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-22 22:18:29,557 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-22 22:18:29,557 INFO L87 Difference]: Start difference. First operand 11924 states and 28450 transitions. Second operand 5 states. [2018-11-22 22:18:29,668 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-22 22:18:29,668 INFO L93 Difference]: Finished difference Result 13552 states and 32459 transitions. [2018-11-22 22:18:29,669 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-11-22 22:18:29,669 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 101 [2018-11-22 22:18:29,669 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-22 22:18:29,680 INFO L225 Difference]: With dead ends: 13552 [2018-11-22 22:18:29,680 INFO L226 Difference]: Without dead ends: 13552 [2018-11-22 22:18:29,680 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2018-11-22 22:18:29,703 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13552 states. [2018-11-22 22:18:29,784 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13552 to 12144. [2018-11-22 22:18:29,784 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12144 states. [2018-11-22 22:18:29,799 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12144 states to 12144 states and 28991 transitions. [2018-11-22 22:18:29,799 INFO L78 Accepts]: Start accepts. Automaton has 12144 states and 28991 transitions. Word has length 101 [2018-11-22 22:18:29,799 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-22 22:18:29,799 INFO L480 AbstractCegarLoop]: Abstraction has 12144 states and 28991 transitions. [2018-11-22 22:18:29,799 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-22 22:18:29,799 INFO L276 IsEmpty]: Start isEmpty. Operand 12144 states and 28991 transitions. [2018-11-22 22:18:29,809 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 102 [2018-11-22 22:18:29,809 INFO L394 BasicCegarLoop]: Found error trace [2018-11-22 22:18:29,809 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-22 22:18:29,810 INFO L423 AbstractCegarLoop]: === Iteration 19 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-22 22:18:29,810 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-22 22:18:29,810 INFO L82 PathProgramCache]: Analyzing trace with hash -425215123, now seen corresponding path program 1 times [2018-11-22 22:18:29,810 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-22 22:18:29,810 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-22 22:18:29,812 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:18:29,812 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-22 22:18:29,812 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:18:29,820 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-22 22:18:29,884 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-22 22:18:29,884 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-22 22:18:29,884 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-22 22:18:29,884 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-22 22:18:29,885 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-22 22:18:29,885 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-11-22 22:18:29,885 INFO L87 Difference]: Start difference. First operand 12144 states and 28991 transitions. Second operand 6 states. [2018-11-22 22:18:30,148 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-22 22:18:30,148 INFO L93 Difference]: Finished difference Result 13480 states and 31895 transitions. [2018-11-22 22:18:30,148 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-11-22 22:18:30,148 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 101 [2018-11-22 22:18:30,149 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-22 22:18:30,162 INFO L225 Difference]: With dead ends: 13480 [2018-11-22 22:18:30,162 INFO L226 Difference]: Without dead ends: 13480 [2018-11-22 22:18:30,162 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 4 SyntacticMatches, 3 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=25, Invalid=65, Unknown=0, NotChecked=0, Total=90 [2018-11-22 22:18:30,185 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13480 states. [2018-11-22 22:18:30,267 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13480 to 12144. [2018-11-22 22:18:30,267 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12144 states. [2018-11-22 22:18:30,282 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12144 states to 12144 states and 28991 transitions. [2018-11-22 22:18:30,282 INFO L78 Accepts]: Start accepts. Automaton has 12144 states and 28991 transitions. Word has length 101 [2018-11-22 22:18:30,282 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-22 22:18:30,282 INFO L480 AbstractCegarLoop]: Abstraction has 12144 states and 28991 transitions. [2018-11-22 22:18:30,282 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-22 22:18:30,282 INFO L276 IsEmpty]: Start isEmpty. Operand 12144 states and 28991 transitions. [2018-11-22 22:18:30,292 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 102 [2018-11-22 22:18:30,292 INFO L394 BasicCegarLoop]: Found error trace [2018-11-22 22:18:30,292 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-22 22:18:30,292 INFO L423 AbstractCegarLoop]: === Iteration 20 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-22 22:18:30,292 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-22 22:18:30,292 INFO L82 PathProgramCache]: Analyzing trace with hash -853965259, now seen corresponding path program 1 times [2018-11-22 22:18:30,293 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-22 22:18:30,293 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-22 22:18:30,294 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:18:30,294 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-22 22:18:30,294 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:18:30,303 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-22 22:18:30,398 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-22 22:18:30,398 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-22 22:18:30,398 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-22 22:18:30,399 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-22 22:18:30,399 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-22 22:18:30,399 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2018-11-22 22:18:30,399 INFO L87 Difference]: Start difference. First operand 12144 states and 28991 transitions. Second operand 6 states. [2018-11-22 22:18:30,528 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-22 22:18:30,528 INFO L93 Difference]: Finished difference Result 12032 states and 28535 transitions. [2018-11-22 22:18:30,528 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-11-22 22:18:30,528 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 101 [2018-11-22 22:18:30,529 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-22 22:18:30,538 INFO L225 Difference]: With dead ends: 12032 [2018-11-22 22:18:30,539 INFO L226 Difference]: Without dead ends: 12032 [2018-11-22 22:18:30,539 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=16, Invalid=26, Unknown=0, NotChecked=0, Total=42 [2018-11-22 22:18:30,561 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 12032 states. [2018-11-22 22:18:30,642 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 12032 to 10680. [2018-11-22 22:18:30,642 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10680 states. [2018-11-22 22:18:30,655 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10680 states to 10680 states and 25426 transitions. [2018-11-22 22:18:30,655 INFO L78 Accepts]: Start accepts. Automaton has 10680 states and 25426 transitions. Word has length 101 [2018-11-22 22:18:30,655 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-22 22:18:30,655 INFO L480 AbstractCegarLoop]: Abstraction has 10680 states and 25426 transitions. [2018-11-22 22:18:30,656 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-22 22:18:30,656 INFO L276 IsEmpty]: Start isEmpty. Operand 10680 states and 25426 transitions. [2018-11-22 22:18:30,664 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 104 [2018-11-22 22:18:30,664 INFO L394 BasicCegarLoop]: Found error trace [2018-11-22 22:18:30,665 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-22 22:18:30,665 INFO L423 AbstractCegarLoop]: === Iteration 21 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-22 22:18:30,665 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-22 22:18:30,665 INFO L82 PathProgramCache]: Analyzing trace with hash 2133724307, now seen corresponding path program 1 times [2018-11-22 22:18:30,665 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-22 22:18:30,665 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-22 22:18:30,666 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:18:30,667 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-22 22:18:30,667 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:18:30,675 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-22 22:18:30,739 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-22 22:18:30,739 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-22 22:18:30,739 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-11-22 22:18:30,740 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-11-22 22:18:30,740 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-11-22 22:18:30,740 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=42, Unknown=0, NotChecked=0, Total=56 [2018-11-22 22:18:30,740 INFO L87 Difference]: Start difference. First operand 10680 states and 25426 transitions. Second operand 8 states. [2018-11-22 22:18:31,544 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-22 22:18:31,544 INFO L93 Difference]: Finished difference Result 18720 states and 43673 transitions. [2018-11-22 22:18:31,546 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2018-11-22 22:18:31,546 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 103 [2018-11-22 22:18:31,546 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-22 22:18:31,570 INFO L225 Difference]: With dead ends: 18720 [2018-11-22 22:18:31,570 INFO L226 Difference]: Without dead ends: 18637 [2018-11-22 22:18:31,570 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 24 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 81 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=101, Invalid=361, Unknown=0, NotChecked=0, Total=462 [2018-11-22 22:18:31,617 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18637 states. [2018-11-22 22:18:31,759 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18637 to 14090. [2018-11-22 22:18:31,759 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14090 states. [2018-11-22 22:18:31,781 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14090 states to 14090 states and 33491 transitions. [2018-11-22 22:18:31,781 INFO L78 Accepts]: Start accepts. Automaton has 14090 states and 33491 transitions. Word has length 103 [2018-11-22 22:18:31,782 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-22 22:18:31,782 INFO L480 AbstractCegarLoop]: Abstraction has 14090 states and 33491 transitions. [2018-11-22 22:18:31,782 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-11-22 22:18:31,782 INFO L276 IsEmpty]: Start isEmpty. Operand 14090 states and 33491 transitions. [2018-11-22 22:18:31,798 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 104 [2018-11-22 22:18:31,798 INFO L394 BasicCegarLoop]: Found error trace [2018-11-22 22:18:31,798 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-22 22:18:31,798 INFO L423 AbstractCegarLoop]: === Iteration 22 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-22 22:18:31,798 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-22 22:18:31,798 INFO L82 PathProgramCache]: Analyzing trace with hash 123620466, now seen corresponding path program 1 times [2018-11-22 22:18:31,799 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-22 22:18:31,799 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-22 22:18:31,800 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:18:31,800 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-22 22:18:31,800 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:18:31,810 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-22 22:18:31,889 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-22 22:18:31,889 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-22 22:18:31,889 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-11-22 22:18:31,889 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-11-22 22:18:31,890 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-11-22 22:18:31,890 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-11-22 22:18:31,892 INFO L87 Difference]: Start difference. First operand 14090 states and 33491 transitions. Second operand 7 states. [2018-11-22 22:18:32,424 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-22 22:18:32,424 INFO L93 Difference]: Finished difference Result 19052 states and 43962 transitions. [2018-11-22 22:18:32,425 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-11-22 22:18:32,425 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 103 [2018-11-22 22:18:32,425 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-22 22:18:32,445 INFO L225 Difference]: With dead ends: 19052 [2018-11-22 22:18:32,445 INFO L226 Difference]: Without dead ends: 19052 [2018-11-22 22:18:32,445 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=38, Invalid=94, Unknown=0, NotChecked=0, Total=132 [2018-11-22 22:18:32,472 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19052 states. [2018-11-22 22:18:32,606 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19052 to 16331. [2018-11-22 22:18:32,606 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16331 states. [2018-11-22 22:18:32,625 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16331 states to 16331 states and 38195 transitions. [2018-11-22 22:18:32,625 INFO L78 Accepts]: Start accepts. Automaton has 16331 states and 38195 transitions. Word has length 103 [2018-11-22 22:18:32,626 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-22 22:18:32,626 INFO L480 AbstractCegarLoop]: Abstraction has 16331 states and 38195 transitions. [2018-11-22 22:18:32,626 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-11-22 22:18:32,626 INFO L276 IsEmpty]: Start isEmpty. Operand 16331 states and 38195 transitions. [2018-11-22 22:18:32,639 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 104 [2018-11-22 22:18:32,639 INFO L394 BasicCegarLoop]: Found error trace [2018-11-22 22:18:32,639 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-22 22:18:32,639 INFO L423 AbstractCegarLoop]: === Iteration 23 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-22 22:18:32,639 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-22 22:18:32,639 INFO L82 PathProgramCache]: Analyzing trace with hash -131116079, now seen corresponding path program 1 times [2018-11-22 22:18:32,640 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-22 22:18:32,640 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-22 22:18:32,640 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:18:32,641 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-22 22:18:32,641 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:18:32,650 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-22 22:18:32,675 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-22 22:18:32,676 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-22 22:18:32,676 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-22 22:18:32,676 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-22 22:18:32,676 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-22 22:18:32,676 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-22 22:18:32,677 INFO L87 Difference]: Start difference. First operand 16331 states and 38195 transitions. Second operand 3 states. [2018-11-22 22:18:32,759 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-22 22:18:32,760 INFO L93 Difference]: Finished difference Result 19467 states and 45358 transitions. [2018-11-22 22:18:32,760 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-22 22:18:32,760 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 103 [2018-11-22 22:18:32,760 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-22 22:18:32,782 INFO L225 Difference]: With dead ends: 19467 [2018-11-22 22:18:32,782 INFO L226 Difference]: Without dead ends: 19467 [2018-11-22 22:18:32,782 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-22 22:18:32,825 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19467 states. [2018-11-22 22:18:32,949 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19467 to 19401. [2018-11-22 22:18:32,949 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19401 states. [2018-11-22 22:18:32,972 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19401 states to 19401 states and 45218 transitions. [2018-11-22 22:18:32,972 INFO L78 Accepts]: Start accepts. Automaton has 19401 states and 45218 transitions. Word has length 103 [2018-11-22 22:18:32,973 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-22 22:18:32,973 INFO L480 AbstractCegarLoop]: Abstraction has 19401 states and 45218 transitions. [2018-11-22 22:18:32,973 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-22 22:18:32,973 INFO L276 IsEmpty]: Start isEmpty. Operand 19401 states and 45218 transitions. [2018-11-22 22:18:32,988 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 104 [2018-11-22 22:18:32,988 INFO L394 BasicCegarLoop]: Found error trace [2018-11-22 22:18:32,989 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-22 22:18:32,989 INFO L423 AbstractCegarLoop]: === Iteration 24 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-22 22:18:32,989 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-22 22:18:32,989 INFO L82 PathProgramCache]: Analyzing trace with hash 80234834, now seen corresponding path program 1 times [2018-11-22 22:18:32,989 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-22 22:18:32,989 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-22 22:18:32,990 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:18:32,990 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-22 22:18:32,990 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:18:33,003 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-22 22:18:33,149 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-22 22:18:33,149 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-22 22:18:33,149 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-11-22 22:18:33,150 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-11-22 22:18:33,150 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-11-22 22:18:33,150 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=70, Unknown=0, NotChecked=0, Total=90 [2018-11-22 22:18:33,150 INFO L87 Difference]: Start difference. First operand 19401 states and 45218 transitions. Second operand 10 states. [2018-11-22 22:18:33,509 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-22 22:18:33,509 INFO L93 Difference]: Finished difference Result 21604 states and 50289 transitions. [2018-11-22 22:18:33,510 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-11-22 22:18:33,510 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 103 [2018-11-22 22:18:33,510 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-22 22:18:33,512 INFO L225 Difference]: With dead ends: 21604 [2018-11-22 22:18:33,513 INFO L226 Difference]: Without dead ends: 3230 [2018-11-22 22:18:33,513 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 16 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=62, Invalid=148, Unknown=0, NotChecked=0, Total=210 [2018-11-22 22:18:33,517 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3230 states. [2018-11-22 22:18:33,533 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3230 to 3228. [2018-11-22 22:18:33,533 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3228 states. [2018-11-22 22:18:33,537 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3228 states to 3228 states and 7664 transitions. [2018-11-22 22:18:33,537 INFO L78 Accepts]: Start accepts. Automaton has 3228 states and 7664 transitions. Word has length 103 [2018-11-22 22:18:33,537 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-22 22:18:33,537 INFO L480 AbstractCegarLoop]: Abstraction has 3228 states and 7664 transitions. [2018-11-22 22:18:33,537 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-11-22 22:18:33,538 INFO L276 IsEmpty]: Start isEmpty. Operand 3228 states and 7664 transitions. [2018-11-22 22:18:33,540 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 104 [2018-11-22 22:18:33,540 INFO L394 BasicCegarLoop]: Found error trace [2018-11-22 22:18:33,541 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-22 22:18:33,541 INFO L423 AbstractCegarLoop]: === Iteration 25 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-22 22:18:33,541 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-22 22:18:33,541 INFO L82 PathProgramCache]: Analyzing trace with hash -2139598924, now seen corresponding path program 1 times [2018-11-22 22:18:33,541 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-22 22:18:33,541 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-22 22:18:33,542 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:18:33,543 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-22 22:18:33,543 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:18:33,550 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-22 22:18:33,646 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-22 22:18:33,646 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-22 22:18:33,646 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-11-22 22:18:33,646 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-11-22 22:18:33,646 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-11-22 22:18:33,646 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=28, Unknown=0, NotChecked=0, Total=42 [2018-11-22 22:18:33,647 INFO L87 Difference]: Start difference. First operand 3228 states and 7664 transitions. Second operand 7 states. [2018-11-22 22:18:33,887 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-22 22:18:33,887 INFO L93 Difference]: Finished difference Result 3678 states and 8614 transitions. [2018-11-22 22:18:33,888 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-11-22 22:18:33,888 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 103 [2018-11-22 22:18:33,888 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-22 22:18:33,891 INFO L225 Difference]: With dead ends: 3678 [2018-11-22 22:18:33,891 INFO L226 Difference]: Without dead ends: 3678 [2018-11-22 22:18:33,892 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 2 SyntacticMatches, 4 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=38, Unknown=0, NotChecked=0, Total=56 [2018-11-22 22:18:33,897 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3678 states. [2018-11-22 22:18:33,918 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3678 to 3170. [2018-11-22 22:18:33,918 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3170 states. [2018-11-22 22:18:33,922 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3170 states to 3170 states and 7546 transitions. [2018-11-22 22:18:33,922 INFO L78 Accepts]: Start accepts. Automaton has 3170 states and 7546 transitions. Word has length 103 [2018-11-22 22:18:33,923 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-22 22:18:33,923 INFO L480 AbstractCegarLoop]: Abstraction has 3170 states and 7546 transitions. [2018-11-22 22:18:33,923 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-11-22 22:18:33,923 INFO L276 IsEmpty]: Start isEmpty. Operand 3170 states and 7546 transitions. [2018-11-22 22:18:33,926 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 104 [2018-11-22 22:18:33,926 INFO L394 BasicCegarLoop]: Found error trace [2018-11-22 22:18:33,926 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-22 22:18:33,927 INFO L423 AbstractCegarLoop]: === Iteration 26 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-22 22:18:33,927 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-22 22:18:33,927 INFO L82 PathProgramCache]: Analyzing trace with hash -1101689485, now seen corresponding path program 2 times [2018-11-22 22:18:33,927 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-22 22:18:33,927 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-22 22:18:33,928 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:18:33,928 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-22 22:18:33,929 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:18:33,940 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-22 22:18:34,065 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-22 22:18:34,066 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-22 22:18:34,066 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2018-11-22 22:18:34,066 INFO L459 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-11-22 22:18:34,066 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-11-22 22:18:34,066 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=132, Unknown=0, NotChecked=0, Total=156 [2018-11-22 22:18:34,067 INFO L87 Difference]: Start difference. First operand 3170 states and 7546 transitions. Second operand 13 states. [2018-11-22 22:18:34,562 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-22 22:18:34,562 INFO L93 Difference]: Finished difference Result 4972 states and 11624 transitions. [2018-11-22 22:18:34,563 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-11-22 22:18:34,563 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 103 [2018-11-22 22:18:34,563 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-22 22:18:34,566 INFO L225 Difference]: With dead ends: 4972 [2018-11-22 22:18:34,566 INFO L226 Difference]: Without dead ends: 3627 [2018-11-22 22:18:34,566 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 24 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 43 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=75, Invalid=387, Unknown=0, NotChecked=0, Total=462 [2018-11-22 22:18:34,571 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3627 states. [2018-11-22 22:18:34,588 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3627 to 3225. [2018-11-22 22:18:34,589 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3225 states. [2018-11-22 22:18:34,592 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3225 states to 3225 states and 7607 transitions. [2018-11-22 22:18:34,592 INFO L78 Accepts]: Start accepts. Automaton has 3225 states and 7607 transitions. Word has length 103 [2018-11-22 22:18:34,592 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-22 22:18:34,592 INFO L480 AbstractCegarLoop]: Abstraction has 3225 states and 7607 transitions. [2018-11-22 22:18:34,592 INFO L481 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-11-22 22:18:34,593 INFO L276 IsEmpty]: Start isEmpty. Operand 3225 states and 7607 transitions. [2018-11-22 22:18:34,595 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 104 [2018-11-22 22:18:34,595 INFO L394 BasicCegarLoop]: Found error trace [2018-11-22 22:18:34,595 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-22 22:18:34,595 INFO L423 AbstractCegarLoop]: === Iteration 27 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-22 22:18:34,596 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-22 22:18:34,596 INFO L82 PathProgramCache]: Analyzing trace with hash 185647889, now seen corresponding path program 3 times [2018-11-22 22:18:34,596 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-22 22:18:34,596 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-22 22:18:34,597 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:18:34,597 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-22 22:18:34,597 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:18:34,605 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-22 22:18:34,616 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-22 22:18:34,644 INFO L469 BasicCegarLoop]: Counterexample might be feasible ----- class de.uni_freiburg.informatik.ultimate.modelcheckerutils.cfg.transformations.BlockEncodingBacktranslator [?] -1 [612] ULTIMATE.startENTRY-->L-1: Formula: (and (= |v_#NULL.offset_1| 0) (= |v_#NULL.base_1| 0)) InVars {} OutVars{#NULL.offset=|v_#NULL.offset_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] VAL [|#NULL.base|=0, |#NULL.offset|=0] [?] -1 [473] L-1-->L672: Formula: (= |v_#valid_9| (store |v_#valid_10| 0 0)) InVars {#valid=|v_#valid_10|} OutVars{#valid=|v_#valid_9|} AuxVars[] AssignedVars[#valid] VAL [|#NULL.base|=0, |#NULL.offset|=0] [?] -1 [564] L672-->L674: Formula: (= v_~__unbuffered_cnt~0_6 0) InVars {} OutVars{~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_6} AuxVars[] AssignedVars[~__unbuffered_cnt~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0] [?] -1 [634] L674-->L676: Formula: (= v_~__unbuffered_p0_EAX~0_3 0) InVars {} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_3} AuxVars[] AssignedVars[~__unbuffered_p0_EAX~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0] [?] -1 [457] L676-->L678: Formula: (= v_~__unbuffered_p0_EBX~0_3 0) InVars {} OutVars{~__unbuffered_p0_EBX~0=v_~__unbuffered_p0_EBX~0_3} AuxVars[] AssignedVars[~__unbuffered_p0_EBX~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0] [?] -1 [535] L678-->L680: Formula: (= v_~__unbuffered_p1_EAX~0_3 0) InVars {} OutVars{~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_3} AuxVars[] AssignedVars[~__unbuffered_p1_EAX~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0] [?] -1 [577] L680-->L681: Formula: (= v_~__unbuffered_p1_EBX~0_3 0) InVars {} OutVars{~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_3} AuxVars[] AssignedVars[~__unbuffered_p1_EBX~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0] [?] -1 [495] L681-->L682: Formula: (= v_~main$tmp_guard0~0_3 0) InVars {} OutVars{~main$tmp_guard0~0=v_~main$tmp_guard0~0_3} AuxVars[] AssignedVars[~main$tmp_guard0~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0] [?] -1 [664] L682-->L684: Formula: (= v_~main$tmp_guard1~0_3 0) InVars {} OutVars{~main$tmp_guard1~0=v_~main$tmp_guard1~0_3} AuxVars[] AssignedVars[~main$tmp_guard1~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [?] -1 [487] L684-->L686: Formula: (= v_~x~0_3 0) InVars {} OutVars{~x~0=v_~x~0_3} AuxVars[] AssignedVars[~x~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [?] -1 [540] L686-->L687: Formula: (= v_~y~0_17 0) InVars {} OutVars{~y~0=v_~y~0_17} AuxVars[] AssignedVars[~y~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0] [?] -1 [482] L687-->L688: Formula: (= v_~y$flush_delayed~0_9 0) InVars {} OutVars{~y$flush_delayed~0=v_~y$flush_delayed~0_9} AuxVars[] AssignedVars[~y$flush_delayed~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y~0=0] [?] -1 [619] L688-->L689: Formula: (= v_~y$mem_tmp~0_5 0) InVars {} OutVars{~y$mem_tmp~0=v_~y$mem_tmp~0_5} AuxVars[] AssignedVars[~y$mem_tmp~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y~0=0] [?] -1 [534] L689-->L690: Formula: (= v_~y$r_buff0_thd0~0_13 0) InVars {} OutVars{~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_13} AuxVars[] AssignedVars[~y$r_buff0_thd0~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y~0=0] [?] -1 [676] L690-->L691: Formula: (= v_~y$r_buff0_thd1~0_32 0) InVars {} OutVars{~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_32} AuxVars[] AssignedVars[~y$r_buff0_thd1~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y~0=0] [?] -1 [575] L691-->L692: Formula: (= v_~y$r_buff0_thd2~0_44 0) InVars {} OutVars{~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_44} AuxVars[] AssignedVars[~y$r_buff0_thd2~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y~0=0] [?] -1 [493] L692-->L693: Formula: (= v_~y$r_buff1_thd0~0_9 0) InVars {} OutVars{~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_9} AuxVars[] AssignedVars[~y$r_buff1_thd0~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y~0=0] [?] -1 [662] L693-->L694: Formula: (= v_~y$r_buff1_thd1~0_18 0) InVars {} OutVars{~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_18} AuxVars[] AssignedVars[~y$r_buff1_thd1~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y~0=0] [?] -1 [562] L694-->L695: Formula: (= v_~y$r_buff1_thd2~0_25 0) InVars {} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_25} AuxVars[] AssignedVars[~y$r_buff1_thd2~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y~0=0] [?] -1 [486] L695-->L696: Formula: (= v_~y$read_delayed~0_1 0) InVars {} OutVars{~y$read_delayed~0=v_~y$read_delayed~0_1} AuxVars[] AssignedVars[~y$read_delayed~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed~0=0, ~y~0=0] [?] -1 [632] L696-->L697: Formula: (and (= v_~y$read_delayed_var~0.offset_1 0) (= v_~y$read_delayed_var~0.base_1 0)) InVars {} OutVars{~y$read_delayed_var~0.base=v_~y$read_delayed_var~0.base_1, ~y$read_delayed_var~0.offset=v_~y$read_delayed_var~0.offset_1} AuxVars[] AssignedVars[~y$read_delayed_var~0.offset, ~y$read_delayed_var~0.base] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y~0=0] [?] -1 [539] L697-->L698: Formula: (= v_~y$w_buff0~0_17 0) InVars {} OutVars{~y$w_buff0~0=v_~y$w_buff0~0_17} AuxVars[] AssignedVars[~y$w_buff0~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0~0=0, ~y~0=0] [?] -1 [481] L698-->L699: Formula: (= v_~y$w_buff0_used~0_85 0) InVars {} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_85} AuxVars[] AssignedVars[~y$w_buff0_used~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y~0=0] [?] -1 [618] L699-->L700: Formula: (= v_~y$w_buff1~0_16 0) InVars {} OutVars{~y$w_buff1~0=v_~y$w_buff1~0_16} AuxVars[] AssignedVars[~y$w_buff1~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [531] L700-->L701: Formula: (= v_~y$w_buff1_used~0_48 0) InVars {} OutVars{~y$w_buff1_used~0=v_~y$w_buff1_used~0_48} AuxVars[] AssignedVars[~y$w_buff1_used~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [675] L701-->L702: Formula: (= v_~weak$$choice0~0_3 0) InVars {} OutVars{~weak$$choice0~0=v_~weak$$choice0~0_3} AuxVars[] AssignedVars[~weak$$choice0~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [571] L702-->L-1-1: Formula: (= v_~weak$$choice2~0_27 0) InVars {} OutVars{~weak$$choice2~0=v_~weak$$choice2~0_27} AuxVars[] AssignedVars[~weak$$choice2~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [663] L-1-1-->L-1-2: Formula: true InVars {} OutVars{ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_#res] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [659] L-1-2-->L789: Formula: true InVars {} OutVars{ULTIMATE.start_main_~#t1729~0.base=|v_ULTIMATE.start_main_~#t1729~0.base_1|, ULTIMATE.start_main_#t~nondet57=|v_ULTIMATE.start_main_#t~nondet57_1|, ULTIMATE.start_main_#t~nondet58=|v_ULTIMATE.start_main_#t~nondet58_1|, ULTIMATE.start_main_~#t1730~0.base=|v_ULTIMATE.start_main_~#t1730~0.base_1|, ULTIMATE.start_main_#t~ite59=|v_ULTIMATE.start_main_#t~ite59_1|, ULTIMATE.start_main_~#t1729~0.offset=|v_ULTIMATE.start_main_~#t1729~0.offset_1|, ULTIMATE.start_main_#t~ite64=|v_ULTIMATE.start_main_#t~ite64_1|, ULTIMATE.start_main_#t~ite62=|v_ULTIMATE.start_main_#t~ite62_1|, ULTIMATE.start_main_#t~ite63=|v_ULTIMATE.start_main_#t~ite63_1|, ULTIMATE.start_main_#t~ite60=|v_ULTIMATE.start_main_#t~ite60_1|, ULTIMATE.start_main_#t~ite61=|v_ULTIMATE.start_main_#t~ite61_1|, ULTIMATE.start_main_~#t1730~0.offset=|v_ULTIMATE.start_main_~#t1730~0.offset_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1729~0.base, ULTIMATE.start_main_#t~ite62, ULTIMATE.start_main_#t~ite63, ULTIMATE.start_main_#t~ite60, ULTIMATE.start_main_#t~ite61, ULTIMATE.start_main_#t~nondet57, ULTIMATE.start_main_#t~nondet58, ULTIMATE.start_main_~#t1730~0.base, ULTIMATE.start_main_~#t1730~0.offset, ULTIMATE.start_main_#t~ite59, ULTIMATE.start_main_~#t1729~0.offset, ULTIMATE.start_main_#t~ite64] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [472] L789-->L789-1: Formula: (and (not (= |v_ULTIMATE.start_main_~#t1729~0.base_2| 0)) (= |v_ULTIMATE.start_main_~#t1729~0.offset_2| 0) (= (select |v_#valid_2| |v_ULTIMATE.start_main_~#t1729~0.base_2|) 0) (= |v_#length_1| (store |v_#length_2| |v_ULTIMATE.start_main_~#t1729~0.base_2| 4)) (= (store |v_#valid_2| |v_ULTIMATE.start_main_~#t1729~0.base_2| 1) |v_#valid_1|)) InVars {#length=|v_#length_2|, #valid=|v_#valid_2|} OutVars{ULTIMATE.start_main_~#t1729~0.base=|v_ULTIMATE.start_main_~#t1729~0.base_2|, #length=|v_#length_1|, ULTIMATE.start_main_~#t1729~0.offset=|v_ULTIMATE.start_main_~#t1729~0.offset_2|, #valid=|v_#valid_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1729~0.base, #valid, #length, ULTIMATE.start_main_~#t1729~0.offset] VAL [|#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [668] L789-1-->L790: Formula: (= |v_#memory_int_1| (store |v_#memory_int_2| |v_ULTIMATE.start_main_~#t1729~0.base_3| (store (select |v_#memory_int_2| |v_ULTIMATE.start_main_~#t1729~0.base_3|) |v_ULTIMATE.start_main_~#t1729~0.offset_3| 0))) InVars {ULTIMATE.start_main_~#t1729~0.base=|v_ULTIMATE.start_main_~#t1729~0.base_3|, #memory_int=|v_#memory_int_2|, ULTIMATE.start_main_~#t1729~0.offset=|v_ULTIMATE.start_main_~#t1729~0.offset_3|} OutVars{ULTIMATE.start_main_~#t1729~0.base=|v_ULTIMATE.start_main_~#t1729~0.base_3|, #memory_int=|v_#memory_int_1|, ULTIMATE.start_main_~#t1729~0.offset=|v_ULTIMATE.start_main_~#t1729~0.offset_3|} AuxVars[] AssignedVars[#memory_int] VAL [|#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] FORK -1 [841] L790-->P0ENTRY: Formula: (and (= 0 |v_Thread0_P0_#in~arg.offset_3|) (= 0 v_Thread0_P0_thidvar0_2) (= 0 |v_Thread0_P0_#in~arg.base_3|)) InVars {} OutVars{Thread0_P0_#in~arg.base=|v_Thread0_P0_#in~arg.base_3|, Thread0_P0_thidvar0=v_Thread0_P0_thidvar0_2, Thread0_P0_#in~arg.offset=|v_Thread0_P0_#in~arg.offset_3|} AuxVars[] AssignedVars[Thread0_P0_#in~arg.base, Thread0_P0_thidvar0, Thread0_P0_#in~arg.offset] VAL [Thread0_P0_thidvar0=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [605] L790-1-->L791: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~nondet57=|v_ULTIMATE.start_main_#t~nondet57_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet57] VAL [Thread0_P0_thidvar0=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [513] L791-->L791-1: Formula: (and (= |v_#valid_3| (store |v_#valid_4| |v_ULTIMATE.start_main_~#t1730~0.base_2| 1)) (= (select |v_#valid_4| |v_ULTIMATE.start_main_~#t1730~0.base_2|) 0) (not (= 0 |v_ULTIMATE.start_main_~#t1730~0.base_2|)) (= |v_ULTIMATE.start_main_~#t1730~0.offset_2| 0) (= (store |v_#length_4| |v_ULTIMATE.start_main_~#t1730~0.base_2| 4) |v_#length_3|)) InVars {#length=|v_#length_4|, #valid=|v_#valid_4|} OutVars{ULTIMATE.start_main_~#t1730~0.offset=|v_ULTIMATE.start_main_~#t1730~0.offset_2|, #length=|v_#length_3|, ULTIMATE.start_main_~#t1730~0.base=|v_ULTIMATE.start_main_~#t1730~0.base_2|, #valid=|v_#valid_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1730~0.base, #valid, ULTIMATE.start_main_~#t1730~0.offset, #length] VAL [Thread0_P0_thidvar0=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [518] L791-1-->L792: Formula: (= (store |v_#memory_int_4| |v_ULTIMATE.start_main_~#t1730~0.base_3| (store (select |v_#memory_int_4| |v_ULTIMATE.start_main_~#t1730~0.base_3|) |v_ULTIMATE.start_main_~#t1730~0.offset_3| 1)) |v_#memory_int_3|) InVars {#memory_int=|v_#memory_int_4|, ULTIMATE.start_main_~#t1730~0.offset=|v_ULTIMATE.start_main_~#t1730~0.offset_3|, ULTIMATE.start_main_~#t1730~0.base=|v_ULTIMATE.start_main_~#t1730~0.base_3|} OutVars{#memory_int=|v_#memory_int_3|, ULTIMATE.start_main_~#t1730~0.offset=|v_ULTIMATE.start_main_~#t1730~0.offset_3|, ULTIMATE.start_main_~#t1730~0.base=|v_ULTIMATE.start_main_~#t1730~0.base_3|} AuxVars[] AssignedVars[#memory_int] VAL [Thread0_P0_thidvar0=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] FORK -1 [842] L792-->P1ENTRY: Formula: (and (= 0 |v_Thread1_P1_#in~arg.base_3|) (= 0 |v_Thread1_P1_#in~arg.offset_3|) (= 1 v_Thread1_P1_thidvar0_2)) InVars {} OutVars{Thread1_P1_#in~arg.base=|v_Thread1_P1_#in~arg.base_3|, Thread1_P1_thidvar0=v_Thread1_P1_thidvar0_2, Thread1_P1_#in~arg.offset=|v_Thread1_P1_#in~arg.offset_3|} AuxVars[] AssignedVars[Thread1_P1_#in~arg.base, Thread1_P1_thidvar0, Thread1_P1_#in~arg.offset] VAL [Thread0_P0_thidvar0=0, Thread1_P1_thidvar0=1, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 [751] P1ENTRY-->L5: Formula: (and (= v_Thread1_P1_~arg.offset_1 |v_Thread1_P1_#in~arg.offset_1|) (= v_~y$w_buff1~0_7 v_~y$w_buff0~0_8) (= |v_Thread1_P1___VERIFIER_assert_#in~expression_1| (ite (not (and (not (= (mod v_~y$w_buff0_used~0_35 256) 0)) (not (= (mod v_~y$w_buff1_used~0_20 256) 0)))) 1 0)) (= v_~y$w_buff0_used~0_35 1) (= v_Thread1_P1_~arg.base_1 |v_Thread1_P1_#in~arg.base_1|) (= v_Thread1_P1___VERIFIER_assert_~expression_1 |v_Thread1_P1___VERIFIER_assert_#in~expression_1|) (= v_~y$w_buff0~0_7 1) (= v_~y$w_buff1_used~0_20 v_~y$w_buff0_used~0_36)) InVars {Thread1_P1_#in~arg.base=|v_Thread1_P1_#in~arg.base_1|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_36, ~y$w_buff0~0=v_~y$w_buff0~0_8, Thread1_P1_#in~arg.offset=|v_Thread1_P1_#in~arg.offset_1|} OutVars{Thread1_P1___VERIFIER_assert_~expression=v_Thread1_P1___VERIFIER_assert_~expression_1, Thread1_P1_#in~arg.base=|v_Thread1_P1_#in~arg.base_1|, Thread1_P1_~arg.offset=v_Thread1_P1_~arg.offset_1, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_35, ~y$w_buff1~0=v_~y$w_buff1~0_7, Thread1_P1_~arg.base=v_Thread1_P1_~arg.base_1, ~y$w_buff0~0=v_~y$w_buff0~0_7, Thread1_P1___VERIFIER_assert_#in~expression=|v_Thread1_P1___VERIFIER_assert_#in~expression_1|, Thread1_P1_#in~arg.offset=|v_Thread1_P1_#in~arg.offset_1|, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_20} AuxVars[] AssignedVars[Thread1_P1___VERIFIER_assert_~expression, Thread1_P1_~arg.offset, ~y$w_buff0_used~0, ~y$w_buff1~0, Thread1_P1_~arg.base, ~y$w_buff0~0, Thread1_P1___VERIFIER_assert_#in~expression, ~y$w_buff1_used~0] VAL [Thread0_P0_thidvar0=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 [753] L5-->L5-3: Formula: (not (= v_Thread1_P1___VERIFIER_assert_~expression_3 0)) InVars {Thread1_P1___VERIFIER_assert_~expression=v_Thread1_P1___VERIFIER_assert_~expression_3} OutVars{Thread1_P1___VERIFIER_assert_~expression=v_Thread1_P1___VERIFIER_assert_~expression_3} AuxVars[] AssignedVars[] VAL [Thread0_P0_thidvar0=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 [756] L5-3-->L752: Formula: (and (= v_~y$mem_tmp~0_3 v_~y~0_7) (= v_~y$r_buff1_thd2~0_5 v_~y$r_buff0_thd2~0_9) (= v_~y$r_buff0_thd2~0_8 1) (= v_~weak$$choice0~0_2 |v_Thread1_P1_#t~nondet27_1|) (= v_~weak$$choice2~0_18 |v_Thread1_P1_#t~nondet28_1|) (= v_~y$r_buff1_thd1~0_17 v_~y$r_buff0_thd1~0_31) (= v_~y$flush_delayed~0_5 v_~weak$$choice2~0_18) (= v_~y$r_buff1_thd0~0_1 v_~y$r_buff0_thd0~0_1)) InVars {Thread1_P1_#t~nondet27=|v_Thread1_P1_#t~nondet27_1|, Thread1_P1_#t~nondet28=|v_Thread1_P1_#t~nondet28_1|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_1, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_9, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_31, ~y~0=v_~y~0_7} OutVars{Thread1_P1_#t~nondet27=|v_Thread1_P1_#t~nondet27_2|, Thread1_P1_#t~nondet28=|v_Thread1_P1_#t~nondet28_2|, ~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_5, ~weak$$choice0~0=v_~weak$$choice0~0_2, ~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_17, ~y$mem_tmp~0=v_~y$mem_tmp~0_3, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_1, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_8, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_31, ~y$flush_delayed~0=v_~y$flush_delayed~0_5, ~y~0=v_~y~0_7, ~weak$$choice2~0=v_~weak$$choice2~0_18, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_1} AuxVars[] AssignedVars[~y$r_buff1_thd2~0, ~weak$$choice0~0, ~y$r_buff1_thd1~0, Thread1_P1_#t~nondet27, ~y$mem_tmp~0, Thread1_P1_#t~nondet28, ~y$r_buff0_thd2~0, ~y$flush_delayed~0, ~weak$$choice2~0, ~y$r_buff1_thd0~0] VAL [Thread0_P0_thidvar0=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 [758] L752-->L752-2: Formula: (let ((.cse0 (not (= 0 (mod v_~y$r_buff0_thd2~0_13 256))))) (and (or .cse0 (not (= 0 (mod v_~y$r_buff1_thd2~0_8 256)))) (not (= 0 (mod v_~y$w_buff0_used~0_41 256))) (or .cse0 (not (= 0 (mod v_~y$w_buff1_used~0_24 256)))))) InVars {~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_8, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_41, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_13, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_24} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_8, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_41, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_13, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_24} AuxVars[] AssignedVars[] VAL [Thread0_P0_thidvar0=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 [760] L752-2-->L752-4: Formula: (and (not (= 0 (mod v_~y$w_buff0_used~0_43 256))) (not (= 0 (mod v_~y$r_buff0_thd2~0_15 256))) (= |v_Thread1_P1_#t~ite29_2| v_~y$w_buff0~0_9)) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_43, ~y$w_buff0~0=v_~y$w_buff0~0_9, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_15} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_43, ~y$w_buff0~0=v_~y$w_buff0~0_9, Thread1_P1_#t~ite29=|v_Thread1_P1_#t~ite29_2|, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_15} AuxVars[] AssignedVars[Thread1_P1_#t~ite29] VAL [Thread0_P0_thidvar0=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite29|=1, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 [764] L752-4-->L752-5: Formula: (= |v_Thread1_P1_#t~ite30_4| |v_Thread1_P1_#t~ite29_4|) InVars {Thread1_P1_#t~ite29=|v_Thread1_P1_#t~ite29_4|} OutVars{Thread1_P1_#t~ite29=|v_Thread1_P1_#t~ite29_4|, Thread1_P1_#t~ite30=|v_Thread1_P1_#t~ite30_4|} AuxVars[] AssignedVars[Thread1_P1_#t~ite30] VAL [Thread0_P0_thidvar0=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite29|=1, |Thread1_P1_#t~ite30|=1, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 [759] L752-5-->L753: Formula: (= v_~y~0_10 |v_Thread1_P1_#t~ite30_2|) InVars {Thread1_P1_#t~ite30=|v_Thread1_P1_#t~ite30_2|} OutVars{~y~0=v_~y~0_10, Thread1_P1_#t~ite29=|v_Thread1_P1_#t~ite29_1|, Thread1_P1_#t~ite30=|v_Thread1_P1_#t~ite30_3|} AuxVars[] AssignedVars[Thread1_P1_#t~ite30, ~y~0, Thread1_P1_#t~ite29] VAL [Thread0_P0_thidvar0=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 [762] L753-->L753-8: Formula: (and (not (= (mod v_~weak$$choice2~0_19 256) 0)) (= |v_Thread1_P1_#t~ite33_1| v_~y$w_buff0~0_10)) InVars {~weak$$choice2~0=v_~weak$$choice2~0_19, ~y$w_buff0~0=v_~y$w_buff0~0_10} OutVars{Thread1_P1_#t~ite33=|v_Thread1_P1_#t~ite33_1|, ~weak$$choice2~0=v_~weak$$choice2~0_19, ~y$w_buff0~0=v_~y$w_buff0~0_10} AuxVars[] AssignedVars[Thread1_P1_#t~ite33] VAL [Thread0_P0_thidvar0=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite33|=1, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 [765] L753-8-->L754: Formula: (= v_~y$w_buff0~0_15 |v_Thread1_P1_#t~ite33_2|) InVars {Thread1_P1_#t~ite33=|v_Thread1_P1_#t~ite33_2|} OutVars{Thread1_P1_#t~ite33=|v_Thread1_P1_#t~ite33_3|, Thread1_P1_#t~ite31=|v_Thread1_P1_#t~ite31_1|, Thread1_P1_#t~ite32=|v_Thread1_P1_#t~ite32_1|, ~y$w_buff0~0=v_~y$w_buff0~0_15} AuxVars[] AssignedVars[Thread1_P1_#t~ite31, Thread1_P1_#t~ite32, ~y$w_buff0~0, Thread1_P1_#t~ite33] VAL [Thread0_P0_thidvar0=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 [768] L754-->L754-8: Formula: (and (not (= (mod v_~weak$$choice2~0_21 256) 0)) (= |v_Thread1_P1_#t~ite36_1| v_~y$w_buff1~0_10)) InVars {~y$w_buff1~0=v_~y$w_buff1~0_10, ~weak$$choice2~0=v_~weak$$choice2~0_21} OutVars{Thread1_P1_#t~ite36=|v_Thread1_P1_#t~ite36_1|, ~y$w_buff1~0=v_~y$w_buff1~0_10, ~weak$$choice2~0=v_~weak$$choice2~0_21} AuxVars[] AssignedVars[Thread1_P1_#t~ite36] VAL [Thread0_P0_thidvar0=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite36|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 [773] L754-8-->L755: Formula: (= v_~y$w_buff1~0_14 |v_Thread1_P1_#t~ite36_2|) InVars {Thread1_P1_#t~ite36=|v_Thread1_P1_#t~ite36_2|} OutVars{Thread1_P1_#t~ite35=|v_Thread1_P1_#t~ite35_1|, Thread1_P1_#t~ite36=|v_Thread1_P1_#t~ite36_3|, Thread1_P1_#t~ite34=|v_Thread1_P1_#t~ite34_1|, ~y$w_buff1~0=v_~y$w_buff1~0_14} AuxVars[] AssignedVars[~y$w_buff1~0, Thread1_P1_#t~ite35, Thread1_P1_#t~ite36, Thread1_P1_#t~ite34] VAL [Thread0_P0_thidvar0=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 [777] L755-->L755-8: Formula: (and (= |v_Thread1_P1_#t~ite39_1| v_~y$w_buff0_used~0_63) (not (= (mod v_~weak$$choice2~0_23 256) 0))) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_63, ~weak$$choice2~0=v_~weak$$choice2~0_23} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_63, ~weak$$choice2~0=v_~weak$$choice2~0_23, Thread1_P1_#t~ite39=|v_Thread1_P1_#t~ite39_1|} AuxVars[] AssignedVars[Thread1_P1_#t~ite39] VAL [Thread0_P0_thidvar0=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite39|=1, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 [782] L755-8-->L756: Formula: (= v_~y$w_buff0_used~0_69 |v_Thread1_P1_#t~ite39_2|) InVars {Thread1_P1_#t~ite39=|v_Thread1_P1_#t~ite39_2|} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_69, Thread1_P1_#t~ite39=|v_Thread1_P1_#t~ite39_3|, Thread1_P1_#t~ite37=|v_Thread1_P1_#t~ite37_1|, Thread1_P1_#t~ite38=|v_Thread1_P1_#t~ite38_1|} AuxVars[] AssignedVars[~y$w_buff0_used~0, Thread1_P1_#t~ite39, Thread1_P1_#t~ite37, Thread1_P1_#t~ite38] VAL [Thread0_P0_thidvar0=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 [786] L756-->L756-8: Formula: (and (not (= 0 (mod v_~weak$$choice2~0_25 256))) (= |v_Thread1_P1_#t~ite42_1| v_~y$w_buff1_used~0_38)) InVars {~weak$$choice2~0=v_~weak$$choice2~0_25, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_38} OutVars{Thread1_P1_#t~ite42=|v_Thread1_P1_#t~ite42_1|, ~weak$$choice2~0=v_~weak$$choice2~0_25, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_38} AuxVars[] AssignedVars[Thread1_P1_#t~ite42] VAL [Thread0_P0_thidvar0=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite42|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 [791] L756-8-->L757: Formula: (= v_~y$w_buff1_used~0_17 |v_Thread1_P1_#t~ite42_2|) InVars {Thread1_P1_#t~ite42=|v_Thread1_P1_#t~ite42_2|} OutVars{Thread1_P1_#t~ite42=|v_Thread1_P1_#t~ite42_3|, Thread1_P1_#t~ite40=|v_Thread1_P1_#t~ite40_1|, Thread1_P1_#t~ite41=|v_Thread1_P1_#t~ite41_1|, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_17} AuxVars[] AssignedVars[Thread1_P1_#t~ite42, Thread1_P1_#t~ite40, Thread1_P1_#t~ite41, ~y$w_buff1_used~0] VAL [Thread0_P0_thidvar0=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 [795] L757-->L757-8: Formula: (and (not (= 0 (mod v_~weak$$choice2~0_14 256))) (= |v_Thread1_P1_#t~ite45_1| v_~y$r_buff0_thd2~0_1)) InVars {~weak$$choice2~0=v_~weak$$choice2~0_14, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_1} OutVars{Thread1_P1_#t~ite45=|v_Thread1_P1_#t~ite45_1|, ~weak$$choice2~0=v_~weak$$choice2~0_14, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_1} AuxVars[] AssignedVars[Thread1_P1_#t~ite45] VAL [Thread0_P0_thidvar0=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite45|=1, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 [800] L757-8-->L758: Formula: (= v_~y$r_buff0_thd2~0_6 |v_Thread1_P1_#t~ite45_2|) InVars {Thread1_P1_#t~ite45=|v_Thread1_P1_#t~ite45_2|} OutVars{Thread1_P1_#t~ite44=|v_Thread1_P1_#t~ite44_1|, Thread1_P1_#t~ite45=|v_Thread1_P1_#t~ite45_3|, Thread1_P1_#t~ite43=|v_Thread1_P1_#t~ite43_1|, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_6} AuxVars[] AssignedVars[Thread1_P1_#t~ite43, ~y$r_buff0_thd2~0, Thread1_P1_#t~ite44, Thread1_P1_#t~ite45] VAL [Thread0_P0_thidvar0=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 [804] L758-->L758-8: Formula: (and (not (= 0 (mod v_~weak$$choice2~0_16 256))) (= |v_Thread1_P1_#t~ite48_1| v_~y$r_buff1_thd2~0_3)) InVars {~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_3, ~weak$$choice2~0=v_~weak$$choice2~0_16} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_3, ~weak$$choice2~0=v_~weak$$choice2~0_16, Thread1_P1_#t~ite48=|v_Thread1_P1_#t~ite48_1|} AuxVars[] AssignedVars[Thread1_P1_#t~ite48] VAL [Thread0_P0_thidvar0=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite48|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 [809] L758-8-->L760: Formula: (and (= v_~__unbuffered_p1_EAX~0_1 v_~y~0_9) (= v_~y$r_buff1_thd2~0_9 |v_Thread1_P1_#t~ite48_2|)) InVars {~y~0=v_~y~0_9, Thread1_P1_#t~ite48=|v_Thread1_P1_#t~ite48_2|} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_9, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_1, Thread1_P1_#t~ite46=|v_Thread1_P1_#t~ite46_1|, Thread1_P1_#t~ite47=|v_Thread1_P1_#t~ite47_1|, ~y~0=v_~y~0_9, Thread1_P1_#t~ite48=|v_Thread1_P1_#t~ite48_3|} AuxVars[] AssignedVars[~y$r_buff1_thd2~0, ~__unbuffered_p1_EAX~0, Thread1_P1_#t~ite46, Thread1_P1_#t~ite47, Thread1_P1_#t~ite48] VAL [Thread0_P0_thidvar0=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 [813] L760-->L760-2: Formula: (and (= |v_Thread1_P1_#t~ite49_1| v_~y$mem_tmp~0_4) (not (= (mod v_~y$flush_delayed~0_6 256) 0))) InVars {~y$flush_delayed~0=v_~y$flush_delayed~0_6, ~y$mem_tmp~0=v_~y$mem_tmp~0_4} OutVars{~y$flush_delayed~0=v_~y$flush_delayed~0_6, ~y$mem_tmp~0=v_~y$mem_tmp~0_4, Thread1_P1_#t~ite49=|v_Thread1_P1_#t~ite49_1|} AuxVars[] AssignedVars[Thread1_P1_#t~ite49] VAL [Thread0_P0_thidvar0=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite49|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 [818] L760-2-->L767: Formula: (and (= v_~y~0_12 |v_Thread1_P1_#t~ite49_3|) (= v_~y$flush_delayed~0_8 0) (= v_~__unbuffered_p1_EBX~0_1 v_~x~0_2)) InVars {~x~0=v_~x~0_2, Thread1_P1_#t~ite49=|v_Thread1_P1_#t~ite49_3|} OutVars{~y$flush_delayed~0=v_~y$flush_delayed~0_8, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_1, ~y~0=v_~y~0_12, ~x~0=v_~x~0_2, Thread1_P1_#t~ite49=|v_Thread1_P1_#t~ite49_4|} AuxVars[] AssignedVars[~__unbuffered_p1_EBX~0, ~y$flush_delayed~0, ~y~0, Thread1_P1_#t~ite49] VAL [Thread0_P0_thidvar0=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 [820] L767-->L767-5: Formula: (and (not (= 0 (mod v_~y$r_buff0_thd2~0_18 256))) (not (= (mod v_~y$w_buff0_used~0_46 256) 0)) (= |v_Thread1_P1_#t~ite51_1| v_~y$w_buff0~0_12)) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_46, ~y$w_buff0~0=v_~y$w_buff0~0_12, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_18} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_46, ~y$w_buff0~0=v_~y$w_buff0~0_12, Thread1_P1_#t~ite51=|v_Thread1_P1_#t~ite51_1|, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_18} AuxVars[] AssignedVars[Thread1_P1_#t~ite51] VAL [Thread0_P0_thidvar0=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite51|=1, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 [684] P0ENTRY-->L716: Formula: (and (= v_Thread0_P0_~arg.base_1 |v_Thread0_P0_#in~arg.base_1|) (= v_Thread0_P0_~arg.offset_1 |v_Thread0_P0_#in~arg.offset_1|) (= v_~__unbuffered_p0_EAX~0_1 v_~x~0_1) (= v_~weak$$choice0~0_1 |v_Thread0_P0_#t~nondet3_1|) (= v_~weak$$choice2~0_1 |v_Thread0_P0_#t~nondet4_1|) (= v_~y$mem_tmp~0_1 v_~y~0_1) (= v_~x~0_1 1) (= v_~y$flush_delayed~0_1 v_~weak$$choice2~0_1)) InVars {Thread0_P0_#in~arg.base=|v_Thread0_P0_#in~arg.base_1|, Thread0_P0_#t~nondet3=|v_Thread0_P0_#t~nondet3_1|, ~y~0=v_~y~0_1, Thread0_P0_#t~nondet4=|v_Thread0_P0_#t~nondet4_1|, Thread0_P0_#in~arg.offset=|v_Thread0_P0_#in~arg.offset_1|} OutVars{Thread0_P0_#in~arg.base=|v_Thread0_P0_#in~arg.base_1|, Thread0_P0_~arg.offset=v_Thread0_P0_~arg.offset_1, Thread0_P0_#in~arg.offset=|v_Thread0_P0_#in~arg.offset_1|, ~weak$$choice0~0=v_~weak$$choice0~0_1, Thread0_P0_#t~nondet3=|v_Thread0_P0_#t~nondet3_2|, ~y$mem_tmp~0=v_~y$mem_tmp~0_1, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_1, Thread0_P0_#t~nondet4=|v_Thread0_P0_#t~nondet4_2|, Thread0_P0_~arg.base=v_Thread0_P0_~arg.base_1, ~y$flush_delayed~0=v_~y$flush_delayed~0_1, ~y~0=v_~y~0_1, ~weak$$choice2~0=v_~weak$$choice2~0_1, ~x~0=v_~x~0_1} AuxVars[] AssignedVars[~weak$$choice0~0, Thread0_P0_#t~nondet3, Thread0_P0_~arg.offset, ~y$mem_tmp~0, ~__unbuffered_p0_EAX~0, Thread0_P0_#t~nondet4, Thread0_P0_~arg.base, ~y$flush_delayed~0, ~weak$$choice2~0, ~x~0] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite51|=1, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 [685] L716-->L716-5: Formula: (and (= |v_Thread0_P0_#t~ite6_1| v_~y~0_2) (let ((.cse0 (= (mod v_~y$r_buff0_thd1~0_2 256) 0))) (or (and (= 0 (mod v_~y$r_buff1_thd1~0_2 256)) .cse0) (= (mod v_~y$w_buff0_used~0_2 256) 0) (and .cse0 (= (mod v_~y$w_buff1_used~0_2 256) 0))))) InVars {~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_2, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_2, ~y~0=v_~y~0_2, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_2, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_2} OutVars{~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_2, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_2, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_2, ~y~0=v_~y~0_2, Thread0_P0_#t~ite6=|v_Thread0_P0_#t~ite6_1|, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_2} AuxVars[] AssignedVars[Thread0_P0_#t~ite6] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0_#t~ite6|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite51|=1, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 [822] L767-5-->L768: Formula: (= v_~y~0_14 |v_Thread1_P1_#t~ite51_2|) InVars {Thread1_P1_#t~ite51=|v_Thread1_P1_#t~ite51_2|} OutVars{Thread1_P1_#t~ite50=|v_Thread1_P1_#t~ite50_1|, ~y~0=v_~y~0_14, Thread1_P1_#t~ite51=|v_Thread1_P1_#t~ite51_3|} AuxVars[] AssignedVars[Thread1_P1_#t~ite50, Thread1_P1_#t~ite51, ~y~0] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0_#t~ite6|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 [825] L768-->L768-2: Formula: (and (not (= 0 (mod v_~y$r_buff0_thd2~0_23 256))) (= |v_Thread1_P1_#t~ite52_1| 0) (not (= (mod v_~y$w_buff0_used~0_51 256) 0))) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_51, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_23} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_51, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_23, Thread1_P1_#t~ite52=|v_Thread1_P1_#t~ite52_1|} AuxVars[] AssignedVars[Thread1_P1_#t~ite52] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0_#t~ite6|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite52|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 [828] L768-2-->L769: Formula: (= v_~y$w_buff0_used~0_53 |v_Thread1_P1_#t~ite52_3|) InVars {Thread1_P1_#t~ite52=|v_Thread1_P1_#t~ite52_3|} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_53, Thread1_P1_#t~ite52=|v_Thread1_P1_#t~ite52_4|} AuxVars[] AssignedVars[~y$w_buff0_used~0, Thread1_P1_#t~ite52] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0_#t~ite6|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 [830] L769-->L769-2: Formula: (and (or (= 0 (mod v_~y$r_buff0_thd2~0_28 256)) (= (mod v_~y$w_buff0_used~0_57 256) 0)) (= |v_Thread1_P1_#t~ite53_2| v_~y$w_buff1_used~0_32) (or (= 0 (mod v_~y$w_buff1_used~0_32 256)) (= (mod v_~y$r_buff1_thd2~0_17 256) 0))) InVars {~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_17, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_57, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_28, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_32} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_17, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_57, Thread1_P1_#t~ite53=|v_Thread1_P1_#t~ite53_2|, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_28, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_32} AuxVars[] AssignedVars[Thread1_P1_#t~ite53] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0_#t~ite6|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite53|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 [687] L716-5-->L717: Formula: (= v_~y~0_4 |v_Thread0_P0_#t~ite6_2|) InVars {Thread0_P0_#t~ite6=|v_Thread0_P0_#t~ite6_2|} OutVars{Thread0_P0_#t~ite5=|v_Thread0_P0_#t~ite5_1|, ~y~0=v_~y~0_4, Thread0_P0_#t~ite6=|v_Thread0_P0_#t~ite6_3|} AuxVars[] AssignedVars[Thread0_P0_#t~ite5, ~y~0, Thread0_P0_#t~ite6] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite53|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 [690] L717-->L717-8: Formula: (and (not (= (mod v_~weak$$choice2~0_2 256) 0)) (= |v_Thread0_P0_#t~ite9_1| v_~y$w_buff0~0_2)) InVars {~weak$$choice2~0=v_~weak$$choice2~0_2, ~y$w_buff0~0=v_~y$w_buff0~0_2} OutVars{Thread0_P0_#t~ite9=|v_Thread0_P0_#t~ite9_1|, ~weak$$choice2~0=v_~weak$$choice2~0_2, ~y$w_buff0~0=v_~y$w_buff0~0_2} AuxVars[] AssignedVars[Thread0_P0_#t~ite9] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0_#t~ite9|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite53|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 [693] L717-8-->L718: Formula: (= v_~y$w_buff0~0_6 |v_Thread0_P0_#t~ite9_2|) InVars {Thread0_P0_#t~ite9=|v_Thread0_P0_#t~ite9_2|} OutVars{Thread0_P0_#t~ite7=|v_Thread0_P0_#t~ite7_1|, Thread0_P0_#t~ite8=|v_Thread0_P0_#t~ite8_1|, Thread0_P0_#t~ite9=|v_Thread0_P0_#t~ite9_3|, ~y$w_buff0~0=v_~y$w_buff0~0_6} AuxVars[] AssignedVars[~y$w_buff0~0, Thread0_P0_#t~ite7, Thread0_P0_#t~ite8, Thread0_P0_#t~ite9] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite53|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 [696] L718-->L718-8: Formula: (and (= |v_Thread0_P0_#t~ite12_1| v_~y$w_buff1~0_2) (not (= 0 (mod v_~weak$$choice2~0_4 256)))) InVars {~y$w_buff1~0=v_~y$w_buff1~0_2, ~weak$$choice2~0=v_~weak$$choice2~0_4} OutVars{Thread0_P0_#t~ite12=|v_Thread0_P0_#t~ite12_1|, ~y$w_buff1~0=v_~y$w_buff1~0_2, ~weak$$choice2~0=v_~weak$$choice2~0_4} AuxVars[] AssignedVars[Thread0_P0_#t~ite12] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0_#t~ite12|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite53|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 [701] L718-8-->L719: Formula: (= v_~y$w_buff1~0_6 |v_Thread0_P0_#t~ite12_2|) InVars {Thread0_P0_#t~ite12=|v_Thread0_P0_#t~ite12_2|} OutVars{Thread0_P0_#t~ite11=|v_Thread0_P0_#t~ite11_1|, Thread0_P0_#t~ite12=|v_Thread0_P0_#t~ite12_3|, ~y$w_buff1~0=v_~y$w_buff1~0_6, Thread0_P0_#t~ite10=|v_Thread0_P0_#t~ite10_1|} AuxVars[] AssignedVars[~y$w_buff1~0, Thread0_P0_#t~ite10, Thread0_P0_#t~ite11, Thread0_P0_#t~ite12] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite53|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 [705] L719-->L719-8: Formula: (and (not (= (mod v_~weak$$choice2~0_6 256) 0)) (= |v_Thread0_P0_#t~ite15_1| v_~y$w_buff0_used~0_16)) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_16, ~weak$$choice2~0=v_~weak$$choice2~0_6} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_16, Thread0_P0_#t~ite15=|v_Thread0_P0_#t~ite15_1|, ~weak$$choice2~0=v_~weak$$choice2~0_6} AuxVars[] AssignedVars[Thread0_P0_#t~ite15] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0_#t~ite15|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite53|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 [710] L719-8-->L720: Formula: (= v_~y$w_buff0_used~0_21 |v_Thread0_P0_#t~ite15_2|) InVars {Thread0_P0_#t~ite15=|v_Thread0_P0_#t~ite15_2|} OutVars{Thread0_P0_#t~ite13=|v_Thread0_P0_#t~ite13_1|, Thread0_P0_#t~ite14=|v_Thread0_P0_#t~ite14_1|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_21, Thread0_P0_#t~ite15=|v_Thread0_P0_#t~ite15_3|} AuxVars[] AssignedVars[~y$w_buff0_used~0, Thread0_P0_#t~ite13, Thread0_P0_#t~ite14, Thread0_P0_#t~ite15] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite53|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 [714] L720-->L720-8: Formula: (and (not (= (mod v_~weak$$choice2~0_8 256) 0)) (= |v_Thread0_P0_#t~ite18_1| v_~y$w_buff1_used~0_10)) InVars {~weak$$choice2~0=v_~weak$$choice2~0_8, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_10} OutVars{~weak$$choice2~0=v_~weak$$choice2~0_8, Thread0_P0_#t~ite18=|v_Thread0_P0_#t~ite18_1|, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_10} AuxVars[] AssignedVars[Thread0_P0_#t~ite18] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0_#t~ite18|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite53|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 [831] L769-2-->L770: Formula: (= v_~y$w_buff1_used~0_33 |v_Thread1_P1_#t~ite53_3|) InVars {Thread1_P1_#t~ite53=|v_Thread1_P1_#t~ite53_3|} OutVars{Thread1_P1_#t~ite53=|v_Thread1_P1_#t~ite53_4|, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_33} AuxVars[] AssignedVars[Thread1_P1_#t~ite53, ~y$w_buff1_used~0] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0_#t~ite18|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 [833] L770-->L770-2: Formula: (and (or (= 0 (mod v_~y$r_buff0_thd2~0_32 256)) (= 0 (mod v_~y$w_buff0_used~0_61 256))) (= |v_Thread1_P1_#t~ite54_2| v_~y$r_buff0_thd2~0_32)) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_61, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_32} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_61, Thread1_P1_#t~ite54=|v_Thread1_P1_#t~ite54_2|, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_32} AuxVars[] AssignedVars[Thread1_P1_#t~ite54] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0_#t~ite18|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite54|=1, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 [834] L770-2-->L771: Formula: (= v_~y$r_buff0_thd2~0_33 |v_Thread1_P1_#t~ite54_3|) InVars {Thread1_P1_#t~ite54=|v_Thread1_P1_#t~ite54_3|} OutVars{Thread1_P1_#t~ite54=|v_Thread1_P1_#t~ite54_4|, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_33} AuxVars[] AssignedVars[Thread1_P1_#t~ite54, ~y$r_buff0_thd2~0] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0_#t~ite18|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 [836] L771-->L771-2: Formula: (and (or (= 0 (mod v_~y$r_buff1_thd2~0_19 256)) (= 0 (mod v_~y$w_buff1_used~0_35 256))) (= |v_Thread1_P1_#t~ite55_2| v_~y$r_buff1_thd2~0_19) (or (= 0 (mod v_~y$w_buff0_used~0_64 256)) (= (mod v_~y$r_buff0_thd2~0_35 256) 0))) InVars {~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_19, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_64, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_35, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_35} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_19, Thread1_P1_#t~ite55=|v_Thread1_P1_#t~ite55_2|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_64, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_35, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_35} AuxVars[] AssignedVars[Thread1_P1_#t~ite55] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0_#t~ite18|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite55|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 [837] L771-2-->L776: Formula: (and (= v_~y$r_buff1_thd2~0_20 |v_Thread1_P1_#t~ite55_3|) (= v_~__unbuffered_cnt~0_3 (+ v_~__unbuffered_cnt~0_4 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_4, Thread1_P1_#t~ite55=|v_Thread1_P1_#t~ite55_3|} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_20, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_3, Thread1_P1_#t~ite55=|v_Thread1_P1_#t~ite55_4|} AuxVars[] AssignedVars[~y$r_buff1_thd2~0, ~__unbuffered_cnt~0, Thread1_P1_#t~ite55] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0_#t~ite18|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 [719] L720-8-->L721: Formula: (= v_~y$w_buff1_used~0_13 |v_Thread0_P0_#t~ite18_2|) InVars {Thread0_P0_#t~ite18=|v_Thread0_P0_#t~ite18_2|} OutVars{Thread0_P0_#t~ite16=|v_Thread0_P0_#t~ite16_1|, Thread0_P0_#t~ite17=|v_Thread0_P0_#t~ite17_1|, Thread0_P0_#t~ite18=|v_Thread0_P0_#t~ite18_3|, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_13} AuxVars[] AssignedVars[Thread0_P0_#t~ite16, Thread0_P0_#t~ite17, Thread0_P0_#t~ite18, ~y$w_buff1_used~0] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 [723] L721-->L721-8: Formula: (and (not (= (mod v_~weak$$choice2~0_10 256) 0)) (= |v_Thread0_P0_#t~ite21_1| v_~y$r_buff0_thd1~0_24)) InVars {~weak$$choice2~0=v_~weak$$choice2~0_10, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_24} OutVars{~weak$$choice2~0=v_~weak$$choice2~0_10, Thread0_P0_#t~ite21=|v_Thread0_P0_#t~ite21_1|, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_24} AuxVars[] AssignedVars[Thread0_P0_#t~ite21] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0_#t~ite21|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 [728] L721-8-->L722: Formula: (= v_~y$r_buff0_thd1~0_29 |v_Thread0_P0_#t~ite21_2|) InVars {Thread0_P0_#t~ite21=|v_Thread0_P0_#t~ite21_2|} OutVars{Thread0_P0_#t~ite19=|v_Thread0_P0_#t~ite19_1|, Thread0_P0_#t~ite21=|v_Thread0_P0_#t~ite21_3|, Thread0_P0_#t~ite20=|v_Thread0_P0_#t~ite20_1|, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_29} AuxVars[] AssignedVars[Thread0_P0_#t~ite19, Thread0_P0_#t~ite21, Thread0_P0_#t~ite20, ~y$r_buff0_thd1~0] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 [732] L722-->L722-8: Formula: (and (not (= (mod v_~weak$$choice2~0_12 256) 0)) (= |v_Thread0_P0_#t~ite24_1| v_~y$r_buff1_thd1~0_15)) InVars {~weak$$choice2~0=v_~weak$$choice2~0_12, ~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_15} OutVars{~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_15, Thread0_P0_#t~ite24=|v_Thread0_P0_#t~ite24_1|, ~weak$$choice2~0=v_~weak$$choice2~0_12} AuxVars[] AssignedVars[Thread0_P0_#t~ite24] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0_#t~ite24|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 [737] L722-8-->L724: Formula: (and (= v_~__unbuffered_p0_EBX~0_1 v_~y~0_3) (= v_~y$r_buff1_thd1~0_4 |v_Thread0_P0_#t~ite24_2|)) InVars {~y~0=v_~y~0_3, Thread0_P0_#t~ite24=|v_Thread0_P0_#t~ite24_2|} OutVars{~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_4, ~__unbuffered_p0_EBX~0=v_~__unbuffered_p0_EBX~0_1, Thread0_P0_#t~ite23=|v_Thread0_P0_#t~ite23_1|, Thread0_P0_#t~ite22=|v_Thread0_P0_#t~ite22_1|, Thread0_P0_#t~ite24=|v_Thread0_P0_#t~ite24_3|, ~y~0=v_~y~0_3} AuxVars[] AssignedVars[~y$r_buff1_thd1~0, ~__unbuffered_p0_EBX~0, Thread0_P0_#t~ite23, Thread0_P0_#t~ite22, Thread0_P0_#t~ite24] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 [741] L724-->L724-2: Formula: (and (not (= 0 (mod v_~y$flush_delayed~0_2 256))) (= |v_Thread0_P0_#t~ite25_1| v_~y$mem_tmp~0_2)) InVars {~y$flush_delayed~0=v_~y$flush_delayed~0_2, ~y$mem_tmp~0=v_~y$mem_tmp~0_2} OutVars{~y$flush_delayed~0=v_~y$flush_delayed~0_2, ~y$mem_tmp~0=v_~y$mem_tmp~0_2, Thread0_P0_#t~ite25=|v_Thread0_P0_#t~ite25_1|} AuxVars[] AssignedVars[Thread0_P0_#t~ite25] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0_#t~ite25|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 [746] L724-2-->L732: Formula: (and (= v_~y$flush_delayed~0_4 0) (= v_~__unbuffered_cnt~0_1 (+ v_~__unbuffered_cnt~0_2 1)) (= v_~y~0_6 |v_Thread0_P0_#t~ite25_3|)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_2, Thread0_P0_#t~ite25=|v_Thread0_P0_#t~ite25_3|} OutVars{~y$flush_delayed~0=v_~y$flush_delayed~0_4, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_1, Thread0_P0_#t~ite25=|v_Thread0_P0_#t~ite25_4|, ~y~0=v_~y~0_6} AuxVars[] AssignedVars[~y$flush_delayed~0, ~__unbuffered_cnt~0, Thread0_P0_#t~ite25, ~y~0] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [656] L792-1-->L796: Formula: (= v_~main$tmp_guard0~0_1 (ite (= (ite (= v_~__unbuffered_cnt~0_5 2) 1 0) 0) 0 1)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_5} OutVars{~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_5, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_1, ULTIMATE.start_main_#t~nondet58=|v_ULTIMATE.start_main_#t~nondet58_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet58, ~main$tmp_guard0~0] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [550] L796-->L798: Formula: (not (= 0 (mod v_~main$tmp_guard0~0_2 256))) InVars {~main$tmp_guard0~0=v_~main$tmp_guard0~0_2} OutVars{~main$tmp_guard0~0=v_~main$tmp_guard0~0_2} AuxVars[] AssignedVars[] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [611] L798-->L798-2: Formula: (or (= 0 (mod v_~y$r_buff0_thd0~0_3 256)) (= (mod v_~y$w_buff0_used~0_75 256) 0)) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_75, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_3} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_75, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_3} AuxVars[] AssignedVars[] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [616] L798-2-->L798-4: Formula: (and (or (= (mod v_~y$w_buff1_used~0_42 256) 0) (= (mod v_~y$r_buff1_thd0~0_3 256) 0)) (= |v_ULTIMATE.start_main_#t~ite59_3| v_~y~0_15)) InVars {~y~0=v_~y~0_15, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_3, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_42} OutVars{ULTIMATE.start_main_#t~ite59=|v_ULTIMATE.start_main_#t~ite59_3|, ~y~0=v_~y~0_15, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_3, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_42} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite59] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite59|=0, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [624] L798-4-->L798-5: Formula: (= |v_ULTIMATE.start_main_#t~ite60_3| |v_ULTIMATE.start_main_#t~ite59_4|) InVars {ULTIMATE.start_main_#t~ite59=|v_ULTIMATE.start_main_#t~ite59_4|} OutVars{ULTIMATE.start_main_#t~ite60=|v_ULTIMATE.start_main_#t~ite60_3|, ULTIMATE.start_main_#t~ite59=|v_ULTIMATE.start_main_#t~ite59_4|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite60] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite59|=0, |ULTIMATE.start_main_#t~ite60|=0, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [588] L798-5-->L799: Formula: (= v_~y~0_16 |v_ULTIMATE.start_main_#t~ite60_5|) InVars {ULTIMATE.start_main_#t~ite60=|v_ULTIMATE.start_main_#t~ite60_5|} OutVars{ULTIMATE.start_main_#t~ite60=|v_ULTIMATE.start_main_#t~ite60_4|, ULTIMATE.start_main_#t~ite59=|v_ULTIMATE.start_main_#t~ite59_5|, ~y~0=v_~y~0_16} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite60, ULTIMATE.start_main_#t~ite59, ~y~0] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [546] L799-->L799-2: Formula: (and (= |v_ULTIMATE.start_main_#t~ite61_3| v_~y$w_buff0_used~0_77) (or (= 0 (mod v_~y$w_buff0_used~0_77 256)) (= (mod v_~y$r_buff0_thd0~0_5 256) 0))) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_77, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_5} OutVars{ULTIMATE.start_main_#t~ite61=|v_ULTIMATE.start_main_#t~ite61_3|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_77, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_5} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite61] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite61|=0, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [529] L799-2-->L800: Formula: (= v_~y$w_buff0_used~0_78 |v_ULTIMATE.start_main_#t~ite61_5|) InVars {ULTIMATE.start_main_#t~ite61=|v_ULTIMATE.start_main_#t~ite61_5|} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_78, ULTIMATE.start_main_#t~ite61=|v_ULTIMATE.start_main_#t~ite61_4|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite61, ~y$w_buff0_used~0] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [469] L800-->L800-2: Formula: (and (or (= 0 (mod v_~y$r_buff0_thd0~0_7 256)) (= (mod v_~y$w_buff0_used~0_80 256) 0)) (or (= 0 (mod v_~y$w_buff1_used~0_44 256)) (= 0 (mod v_~y$r_buff1_thd0~0_5 256))) (= |v_ULTIMATE.start_main_#t~ite62_3| v_~y$w_buff1_used~0_44)) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_80, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_5, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_7, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_44} OutVars{ULTIMATE.start_main_#t~ite62=|v_ULTIMATE.start_main_#t~ite62_3|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_80, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_5, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_7, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_44} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite62] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite62|=0, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [671] L800-2-->L801: Formula: (= v_~y$w_buff1_used~0_45 |v_ULTIMATE.start_main_#t~ite62_5|) InVars {ULTIMATE.start_main_#t~ite62=|v_ULTIMATE.start_main_#t~ite62_5|} OutVars{ULTIMATE.start_main_#t~ite62=|v_ULTIMATE.start_main_#t~ite62_4|, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_45} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite62, ~y$w_buff1_used~0] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [601] L801-->L801-2: Formula: (and (= |v_ULTIMATE.start_main_#t~ite63_3| v_~y$r_buff0_thd0~0_9) (or (= 0 (mod v_~y$r_buff0_thd0~0_9 256)) (= 0 (mod v_~y$w_buff0_used~0_82 256)))) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_82, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_9} OutVars{ULTIMATE.start_main_#t~ite63=|v_ULTIMATE.start_main_#t~ite63_3|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_82, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_9} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite63] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite63|=0, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [609] L801-2-->L802: Formula: (= v_~y$r_buff0_thd0~0_10 |v_ULTIMATE.start_main_#t~ite63_5|) InVars {ULTIMATE.start_main_#t~ite63=|v_ULTIMATE.start_main_#t~ite63_5|} OutVars{ULTIMATE.start_main_#t~ite63=|v_ULTIMATE.start_main_#t~ite63_4|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_10} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite63, ~y$r_buff0_thd0~0] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [512] L802-->L802-2: Formula: (and (or (= 0 (mod v_~y$r_buff0_thd0~0_12 256)) (= 0 (mod v_~y$w_buff0_used~0_84 256))) (or (= 0 (mod v_~y$w_buff1_used~0_47 256)) (= (mod v_~y$r_buff1_thd0~0_7 256) 0)) (= |v_ULTIMATE.start_main_#t~ite64_3| v_~y$r_buff1_thd0~0_7)) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_84, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_7, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_12, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_47} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_84, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_7, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_12, ULTIMATE.start_main_#t~ite64=|v_ULTIMATE.start_main_#t~ite64_3|, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_47} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite64] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite64|=0, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [521] L802-2-->L807: Formula: (and (= v_~y$r_buff1_thd0~0_8 |v_ULTIMATE.start_main_#t~ite64_5|) (= v_~main$tmp_guard1~0_1 (ite (= (ite (not (and (= v_~__unbuffered_p0_EBX~0_2 0) (= 0 v_~__unbuffered_p1_EBX~0_2) (= 1 v_~__unbuffered_p1_EAX~0_2) (= v_~__unbuffered_p0_EAX~0_2 1))) 1 0) 0) 0 1))) InVars {~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_2, ~__unbuffered_p0_EBX~0=v_~__unbuffered_p0_EBX~0_2, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_2, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_2, ULTIMATE.start_main_#t~ite64=|v_ULTIMATE.start_main_#t~ite64_5|} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_2, ~__unbuffered_p0_EBX~0=v_~__unbuffered_p0_EBX~0_2, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_2, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_2, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_1, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_8, ULTIMATE.start_main_#t~ite64=|v_ULTIMATE.start_main_#t~ite64_4|} AuxVars[] AssignedVars[~main$tmp_guard1~0, ~y$r_buff1_thd0~0, ULTIMATE.start_main_#t~ite64] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [547] L807-->L807-1: Formula: (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_1| (mod v_~main$tmp_guard1~0_2 256)) InVars {~main$tmp_guard1~0=v_~main$tmp_guard1~0_2} OutVars{~main$tmp_guard1~0=v_~main$tmp_guard1~0_2, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_1|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_#in~expression] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [553] L807-1-->L5: Formula: true InVars {} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_1} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [629] L5-->L5-1: Formula: (= v_ULTIMATE.start___VERIFIER_assert_~expression_2 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_2|) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_2|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_2, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_2|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [649] L5-1-->L5-2: Formula: (= v_ULTIMATE.start___VERIFIER_assert_~expression_3 0) InVars {ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_3} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_3} AuxVars[] AssignedVars[] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [643] L5-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 #NULL.base, #NULL.offset := 0, 0; VAL [|#NULL.base|=0, |#NULL.offset|=0] [?] -1 #valid := #valid[0 := 0]; VAL [|#NULL.base|=0, |#NULL.offset|=0] [?] -1 ~__unbuffered_cnt~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0] [?] -1 ~__unbuffered_p0_EAX~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0] [?] -1 ~__unbuffered_p0_EBX~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0] [?] -1 ~__unbuffered_p1_EAX~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0] [?] -1 ~__unbuffered_p1_EBX~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0] [?] -1 ~main$tmp_guard0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0] [?] -1 ~main$tmp_guard1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [?] -1 ~x~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [?] -1 ~y~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0] [?] -1 ~y$flush_delayed~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y~0=0] [?] -1 ~y$mem_tmp~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y~0=0] [?] -1 ~y$r_buff0_thd0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y~0=0] [?] -1 ~y$r_buff0_thd1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y~0=0] [?] -1 ~y$r_buff0_thd2~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y~0=0] [?] -1 ~y$r_buff1_thd0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y~0=0] [?] -1 ~y$r_buff1_thd1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y~0=0] [?] -1 ~y$r_buff1_thd2~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y~0=0] [?] -1 ~y$read_delayed~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed~0=0, ~y~0=0] [?] -1 ~y$read_delayed_var~0.base, ~y$read_delayed_var~0.offset := 0, 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y~0=0] [?] -1 ~y$w_buff0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0~0=0, ~y~0=0] [?] -1 ~y$w_buff0_used~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y~0=0] [?] -1 ~y$w_buff1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 ~y$w_buff1_used~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 ~weak$$choice0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 ~weak$$choice2~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 havoc main_#res; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 havoc main_#t~nondet57, main_#t~nondet58, main_#t~ite60, main_#t~ite59, main_#t~ite61, main_#t~ite62, main_#t~ite63, main_#t~ite64, main_~#t1729~0.base, main_~#t1729~0.offset, main_~#t1730~0.base, main_~#t1730~0.offset; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 SUMMARY for call main_~#t1729~0.base, main_~#t1729~0.offset := #Ultimate.alloc(4); srcloc: L789 VAL [|#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 SUMMARY for call write~int(0, main_~#t1729~0.base, main_~#t1729~0.offset, 4); srcloc: L789-1 VAL [|#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] FORK -1 fork 0 P0(0, 0); VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 havoc main_#t~nondet57; VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 SUMMARY for call main_~#t1730~0.base, main_~#t1730~0.offset := #Ultimate.alloc(4); srcloc: L791 VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 SUMMARY for call write~int(1, main_~#t1730~0.base, main_~#t1730~0.offset, 4); srcloc: L791-1 VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] FORK -1 fork 1 P1(0, 0); VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset;~y$w_buff1~0 := ~y$w_buff0~0;~y$w_buff0~0 := 1;~y$w_buff1_used~0 := ~y$w_buff0_used~0;~y$w_buff0_used~0 := 1;__VERIFIER_assert_#in~expression := (if !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$w_buff0_used~0 % 256) then 1 else 0);havoc __VERIFIER_assert_~expression;__VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 assume !(0 == __VERIFIER_assert_~expression); VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 ~y$r_buff1_thd0~0 := ~y$r_buff0_thd0~0;~y$r_buff1_thd1~0 := ~y$r_buff0_thd1~0;~y$r_buff1_thd2~0 := ~y$r_buff0_thd2~0;~y$r_buff0_thd2~0 := 1;~weak$$choice0~0 := #t~nondet27;havoc #t~nondet27;~weak$$choice2~0 := #t~nondet28;havoc #t~nondet28;~y$flush_delayed~0 := ~weak$$choice2~0;~y$mem_tmp~0 := ~y~0; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 assume !((0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd2~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd2~0 % 256 && 0 == ~y$r_buff1_thd2~0 % 256)); VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 assume 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256;#t~ite29 := ~y$w_buff0~0; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite29|=1, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 #t~ite30 := #t~ite29; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite29|=1, |P1_#t~ite30|=1, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 ~y~0 := #t~ite30;havoc #t~ite29;havoc #t~ite30; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 assume 0 != ~weak$$choice2~0 % 256;#t~ite33 := ~y$w_buff0~0; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite33|=1, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 ~y$w_buff0~0 := #t~ite33;havoc #t~ite33;havoc #t~ite32;havoc #t~ite31; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 assume 0 != ~weak$$choice2~0 % 256;#t~ite36 := ~y$w_buff1~0; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite36|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 ~y$w_buff1~0 := #t~ite36;havoc #t~ite36;havoc #t~ite35;havoc #t~ite34; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 assume 0 != ~weak$$choice2~0 % 256;#t~ite39 := ~y$w_buff0_used~0; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite39|=1, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 ~y$w_buff0_used~0 := #t~ite39;havoc #t~ite38;havoc #t~ite37;havoc #t~ite39; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 assume 0 != ~weak$$choice2~0 % 256;#t~ite42 := ~y$w_buff1_used~0; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite42|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 ~y$w_buff1_used~0 := #t~ite42;havoc #t~ite42;havoc #t~ite41;havoc #t~ite40; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 assume 0 != ~weak$$choice2~0 % 256;#t~ite45 := ~y$r_buff0_thd2~0; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite45|=1, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 ~y$r_buff0_thd2~0 := #t~ite45;havoc #t~ite45;havoc #t~ite44;havoc #t~ite43; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 assume 0 != ~weak$$choice2~0 % 256;#t~ite48 := ~y$r_buff1_thd2~0; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite48|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 ~y$r_buff1_thd2~0 := #t~ite48;havoc #t~ite48;havoc #t~ite46;havoc #t~ite47;~__unbuffered_p1_EAX~0 := ~y~0; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 assume 0 != ~y$flush_delayed~0 % 256;#t~ite49 := ~y$mem_tmp~0; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite49|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 ~y~0 := #t~ite49;havoc #t~ite49;~y$flush_delayed~0 := 0;~__unbuffered_p1_EBX~0 := ~x~0; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 assume 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256;#t~ite51 := ~y$w_buff0~0; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite51|=1, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset;~x~0 := 1;~__unbuffered_p0_EAX~0 := ~x~0;~weak$$choice0~0 := #t~nondet3;havoc #t~nondet3;~weak$$choice2~0 := #t~nondet4;havoc #t~nondet4;~y$flush_delayed~0 := ~weak$$choice2~0;~y$mem_tmp~0 := ~y~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite51|=1, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 assume (0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd1~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd1~0 % 256 && 0 == ~y$r_buff1_thd1~0 % 256);#t~ite6 := ~y~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite6|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite51|=1, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 ~y~0 := #t~ite51;havoc #t~ite51;havoc #t~ite50; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite6|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 assume 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256;#t~ite52 := 0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite6|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite52|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 ~y$w_buff0_used~0 := #t~ite52;havoc #t~ite52; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite6|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256));#t~ite53 := ~y$w_buff1_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite6|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite53|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 ~y~0 := #t~ite6;havoc #t~ite6;havoc #t~ite5; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite53|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 assume 0 != ~weak$$choice2~0 % 256;#t~ite9 := ~y$w_buff0~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite9|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite53|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 ~y$w_buff0~0 := #t~ite9;havoc #t~ite7;havoc #t~ite9;havoc #t~ite8; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite53|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 assume 0 != ~weak$$choice2~0 % 256;#t~ite12 := ~y$w_buff1~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite12|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite53|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 ~y$w_buff1~0 := #t~ite12;havoc #t~ite12;havoc #t~ite10;havoc #t~ite11; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite53|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 assume 0 != ~weak$$choice2~0 % 256;#t~ite15 := ~y$w_buff0_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite15|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite53|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 ~y$w_buff0_used~0 := #t~ite15;havoc #t~ite14;havoc #t~ite13;havoc #t~ite15; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite53|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 assume 0 != ~weak$$choice2~0 % 256;#t~ite18 := ~y$w_buff1_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite18|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite53|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 ~y$w_buff1_used~0 := #t~ite53;havoc #t~ite53; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite18|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256);#t~ite54 := ~y$r_buff0_thd2~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite18|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite54|=1, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 ~y$r_buff0_thd2~0 := #t~ite54;havoc #t~ite54; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite18|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256));#t~ite55 := ~y$r_buff1_thd2~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite18|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite55|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 ~y$r_buff1_thd2~0 := #t~ite55;havoc #t~ite55;~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite18|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 ~y$w_buff1_used~0 := #t~ite18;havoc #t~ite18;havoc #t~ite17;havoc #t~ite16; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 assume 0 != ~weak$$choice2~0 % 256;#t~ite21 := ~y$r_buff0_thd1~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite21|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 ~y$r_buff0_thd1~0 := #t~ite21;havoc #t~ite21;havoc #t~ite20;havoc #t~ite19; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 assume 0 != ~weak$$choice2~0 % 256;#t~ite24 := ~y$r_buff1_thd1~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite24|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 ~y$r_buff1_thd1~0 := #t~ite24;havoc #t~ite24;havoc #t~ite22;havoc #t~ite23;~__unbuffered_p0_EBX~0 := ~y~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 assume 0 != ~y$flush_delayed~0 % 256;#t~ite25 := ~y$mem_tmp~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite25|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 ~y~0 := #t~ite25;havoc #t~ite25;~y$flush_delayed~0 := 0;~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 havoc main_#t~nondet58;~main$tmp_guard0~0 := (if 0 == (if 2 == ~__unbuffered_cnt~0 then 1 else 0) then 0 else 1); VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 assume 0 != ~main$tmp_guard0~0 % 256; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256); VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 assume !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256);main_#t~ite59 := ~y~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite59|=0, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 main_#t~ite60 := main_#t~ite59; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite59|=0, |ULTIMATE.start_main_#t~ite60|=0, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 ~y~0 := main_#t~ite60;havoc main_#t~ite60;havoc main_#t~ite59; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256);main_#t~ite61 := ~y$w_buff0_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite61|=0, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 ~y$w_buff0_used~0 := main_#t~ite61;havoc main_#t~ite61; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256));main_#t~ite62 := ~y$w_buff1_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite62|=0, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 ~y$w_buff1_used~0 := main_#t~ite62;havoc main_#t~ite62; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256);main_#t~ite63 := ~y$r_buff0_thd0~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite63|=0, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 ~y$r_buff0_thd0~0 := main_#t~ite63;havoc main_#t~ite63; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256));main_#t~ite64 := ~y$r_buff1_thd0~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite64|=0, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 ~y$r_buff1_thd0~0 := main_#t~ite64;havoc main_#t~ite64;~main$tmp_guard1~0 := (if 0 == (if !(((1 == ~__unbuffered_p0_EAX~0 && 0 == ~__unbuffered_p0_EBX~0) && 1 == ~__unbuffered_p1_EAX~0) && 0 == ~__unbuffered_p1_EBX~0) then 1 else 0) then 0 else 1); VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 __VERIFIER_assert_#in~expression := ~main$tmp_guard1~0 % 256; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 havoc __VERIFIER_assert_~expression; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 assume 0 == __VERIFIER_assert_~expression; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 assume !false; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] ----- ----- class de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder.RCFGBacktranslator [?] -1 #NULL.base, #NULL.offset := 0, 0; VAL [|#NULL.base|=0, |#NULL.offset|=0] [?] -1 #valid := #valid[0 := 0]; VAL [|#NULL.base|=0, |#NULL.offset|=0] [?] -1 ~__unbuffered_cnt~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0] [?] -1 ~__unbuffered_p0_EAX~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0] [?] -1 ~__unbuffered_p0_EBX~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0] [?] -1 ~__unbuffered_p1_EAX~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0] [?] -1 ~__unbuffered_p1_EBX~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0] [?] -1 ~main$tmp_guard0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0] [?] -1 ~main$tmp_guard1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [?] -1 ~x~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [?] -1 ~y~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0] [?] -1 ~y$flush_delayed~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y~0=0] [?] -1 ~y$mem_tmp~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y~0=0] [?] -1 ~y$r_buff0_thd0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y~0=0] [?] -1 ~y$r_buff0_thd1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y~0=0] [?] -1 ~y$r_buff0_thd2~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y~0=0] [?] -1 ~y$r_buff1_thd0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y~0=0] [?] -1 ~y$r_buff1_thd1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y~0=0] [?] -1 ~y$r_buff1_thd2~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y~0=0] [?] -1 ~y$read_delayed~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed~0=0, ~y~0=0] [?] -1 ~y$read_delayed_var~0.base, ~y$read_delayed_var~0.offset := 0, 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y~0=0] [?] -1 ~y$w_buff0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0~0=0, ~y~0=0] [?] -1 ~y$w_buff0_used~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y~0=0] [?] -1 ~y$w_buff1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 ~y$w_buff1_used~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 ~weak$$choice0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 ~weak$$choice2~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 havoc main_#res; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 havoc main_#t~nondet57, main_#t~nondet58, main_#t~ite60, main_#t~ite59, main_#t~ite61, main_#t~ite62, main_#t~ite63, main_#t~ite64, main_~#t1729~0.base, main_~#t1729~0.offset, main_~#t1730~0.base, main_~#t1730~0.offset; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 SUMMARY for call main_~#t1729~0.base, main_~#t1729~0.offset := #Ultimate.alloc(4); srcloc: L789 VAL [|#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 SUMMARY for call write~int(0, main_~#t1729~0.base, main_~#t1729~0.offset, 4); srcloc: L789-1 VAL [|#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] FORK -1 fork 0 P0(0, 0); VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 havoc main_#t~nondet57; VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 SUMMARY for call main_~#t1730~0.base, main_~#t1730~0.offset := #Ultimate.alloc(4); srcloc: L791 VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 SUMMARY for call write~int(1, main_~#t1730~0.base, main_~#t1730~0.offset, 4); srcloc: L791-1 VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] FORK -1 fork 1 P1(0, 0); VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset;~y$w_buff1~0 := ~y$w_buff0~0;~y$w_buff0~0 := 1;~y$w_buff1_used~0 := ~y$w_buff0_used~0;~y$w_buff0_used~0 := 1;__VERIFIER_assert_#in~expression := (if !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$w_buff0_used~0 % 256) then 1 else 0);havoc __VERIFIER_assert_~expression;__VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 assume !(0 == __VERIFIER_assert_~expression); VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 ~y$r_buff1_thd0~0 := ~y$r_buff0_thd0~0;~y$r_buff1_thd1~0 := ~y$r_buff0_thd1~0;~y$r_buff1_thd2~0 := ~y$r_buff0_thd2~0;~y$r_buff0_thd2~0 := 1;~weak$$choice0~0 := #t~nondet27;havoc #t~nondet27;~weak$$choice2~0 := #t~nondet28;havoc #t~nondet28;~y$flush_delayed~0 := ~weak$$choice2~0;~y$mem_tmp~0 := ~y~0; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 assume !((0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd2~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd2~0 % 256 && 0 == ~y$r_buff1_thd2~0 % 256)); VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 assume 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256;#t~ite29 := ~y$w_buff0~0; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite29|=1, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 #t~ite30 := #t~ite29; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite29|=1, |P1_#t~ite30|=1, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 ~y~0 := #t~ite30;havoc #t~ite29;havoc #t~ite30; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 assume 0 != ~weak$$choice2~0 % 256;#t~ite33 := ~y$w_buff0~0; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite33|=1, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 ~y$w_buff0~0 := #t~ite33;havoc #t~ite33;havoc #t~ite32;havoc #t~ite31; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 assume 0 != ~weak$$choice2~0 % 256;#t~ite36 := ~y$w_buff1~0; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite36|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 ~y$w_buff1~0 := #t~ite36;havoc #t~ite36;havoc #t~ite35;havoc #t~ite34; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 assume 0 != ~weak$$choice2~0 % 256;#t~ite39 := ~y$w_buff0_used~0; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite39|=1, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 ~y$w_buff0_used~0 := #t~ite39;havoc #t~ite38;havoc #t~ite37;havoc #t~ite39; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 assume 0 != ~weak$$choice2~0 % 256;#t~ite42 := ~y$w_buff1_used~0; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite42|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 ~y$w_buff1_used~0 := #t~ite42;havoc #t~ite42;havoc #t~ite41;havoc #t~ite40; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 assume 0 != ~weak$$choice2~0 % 256;#t~ite45 := ~y$r_buff0_thd2~0; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite45|=1, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 ~y$r_buff0_thd2~0 := #t~ite45;havoc #t~ite45;havoc #t~ite44;havoc #t~ite43; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 assume 0 != ~weak$$choice2~0 % 256;#t~ite48 := ~y$r_buff1_thd2~0; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite48|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 ~y$r_buff1_thd2~0 := #t~ite48;havoc #t~ite48;havoc #t~ite46;havoc #t~ite47;~__unbuffered_p1_EAX~0 := ~y~0; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 assume 0 != ~y$flush_delayed~0 % 256;#t~ite49 := ~y$mem_tmp~0; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite49|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 ~y~0 := #t~ite49;havoc #t~ite49;~y$flush_delayed~0 := 0;~__unbuffered_p1_EBX~0 := ~x~0; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 assume 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256;#t~ite51 := ~y$w_buff0~0; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite51|=1, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset;~x~0 := 1;~__unbuffered_p0_EAX~0 := ~x~0;~weak$$choice0~0 := #t~nondet3;havoc #t~nondet3;~weak$$choice2~0 := #t~nondet4;havoc #t~nondet4;~y$flush_delayed~0 := ~weak$$choice2~0;~y$mem_tmp~0 := ~y~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite51|=1, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 assume (0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd1~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd1~0 % 256 && 0 == ~y$r_buff1_thd1~0 % 256);#t~ite6 := ~y~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite6|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite51|=1, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 ~y~0 := #t~ite51;havoc #t~ite51;havoc #t~ite50; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite6|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 assume 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256;#t~ite52 := 0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite6|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite52|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 ~y$w_buff0_used~0 := #t~ite52;havoc #t~ite52; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite6|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256));#t~ite53 := ~y$w_buff1_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite6|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite53|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 ~y~0 := #t~ite6;havoc #t~ite6;havoc #t~ite5; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite53|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 assume 0 != ~weak$$choice2~0 % 256;#t~ite9 := ~y$w_buff0~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite9|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite53|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 ~y$w_buff0~0 := #t~ite9;havoc #t~ite7;havoc #t~ite9;havoc #t~ite8; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite53|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 assume 0 != ~weak$$choice2~0 % 256;#t~ite12 := ~y$w_buff1~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite12|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite53|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 ~y$w_buff1~0 := #t~ite12;havoc #t~ite12;havoc #t~ite10;havoc #t~ite11; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite53|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 assume 0 != ~weak$$choice2~0 % 256;#t~ite15 := ~y$w_buff0_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite15|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite53|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 ~y$w_buff0_used~0 := #t~ite15;havoc #t~ite14;havoc #t~ite13;havoc #t~ite15; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite53|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 assume 0 != ~weak$$choice2~0 % 256;#t~ite18 := ~y$w_buff1_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite18|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite53|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 ~y$w_buff1_used~0 := #t~ite53;havoc #t~ite53; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite18|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256);#t~ite54 := ~y$r_buff0_thd2~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite18|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite54|=1, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 ~y$r_buff0_thd2~0 := #t~ite54;havoc #t~ite54; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite18|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256));#t~ite55 := ~y$r_buff1_thd2~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite18|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite55|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 ~y$r_buff1_thd2~0 := #t~ite55;havoc #t~ite55;~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite18|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 ~y$w_buff1_used~0 := #t~ite18;havoc #t~ite18;havoc #t~ite17;havoc #t~ite16; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 assume 0 != ~weak$$choice2~0 % 256;#t~ite21 := ~y$r_buff0_thd1~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite21|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 ~y$r_buff0_thd1~0 := #t~ite21;havoc #t~ite21;havoc #t~ite20;havoc #t~ite19; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 assume 0 != ~weak$$choice2~0 % 256;#t~ite24 := ~y$r_buff1_thd1~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite24|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 ~y$r_buff1_thd1~0 := #t~ite24;havoc #t~ite24;havoc #t~ite22;havoc #t~ite23;~__unbuffered_p0_EBX~0 := ~y~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 assume 0 != ~y$flush_delayed~0 % 256;#t~ite25 := ~y$mem_tmp~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite25|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 ~y~0 := #t~ite25;havoc #t~ite25;~y$flush_delayed~0 := 0;~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 havoc main_#t~nondet58;~main$tmp_guard0~0 := (if 0 == (if 2 == ~__unbuffered_cnt~0 then 1 else 0) then 0 else 1); VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 assume 0 != ~main$tmp_guard0~0 % 256; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256); VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 assume !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256);main_#t~ite59 := ~y~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite59|=0, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 main_#t~ite60 := main_#t~ite59; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite59|=0, |ULTIMATE.start_main_#t~ite60|=0, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 ~y~0 := main_#t~ite60;havoc main_#t~ite60;havoc main_#t~ite59; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256);main_#t~ite61 := ~y$w_buff0_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite61|=0, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 ~y$w_buff0_used~0 := main_#t~ite61;havoc main_#t~ite61; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256));main_#t~ite62 := ~y$w_buff1_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite62|=0, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 ~y$w_buff1_used~0 := main_#t~ite62;havoc main_#t~ite62; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256);main_#t~ite63 := ~y$r_buff0_thd0~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite63|=0, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 ~y$r_buff0_thd0~0 := main_#t~ite63;havoc main_#t~ite63; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256));main_#t~ite64 := ~y$r_buff1_thd0~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite64|=0, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 ~y$r_buff1_thd0~0 := main_#t~ite64;havoc main_#t~ite64;~main$tmp_guard1~0 := (if 0 == (if !(((1 == ~__unbuffered_p0_EAX~0 && 0 == ~__unbuffered_p0_EBX~0) && 1 == ~__unbuffered_p1_EAX~0) && 0 == ~__unbuffered_p1_EBX~0) then 1 else 0) then 0 else 1); VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 __VERIFIER_assert_#in~expression := ~main$tmp_guard1~0 % 256; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 havoc __VERIFIER_assert_~expression; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 assume 0 == __VERIFIER_assert_~expression; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 assume !false; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 #NULL.base, #NULL.offset := 0, 0; VAL [#NULL.base=0, #NULL.offset=0] [?] -1 #valid := #valid[0 := 0]; VAL [#NULL.base=0, #NULL.offset=0] [L672] -1 ~__unbuffered_cnt~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0] [L674] -1 ~__unbuffered_p0_EAX~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0] [L676] -1 ~__unbuffered_p0_EBX~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0] [L678] -1 ~__unbuffered_p1_EAX~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0] [L680] -1 ~__unbuffered_p1_EBX~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0] [L681] -1 ~main$tmp_guard0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0] [L682] -1 ~main$tmp_guard1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [L684] -1 ~x~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [L686] -1 ~y~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0] [L687] -1 ~y$flush_delayed~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y~0=0] [L688] -1 ~y$mem_tmp~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y~0=0] [L689] -1 ~y$r_buff0_thd0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y~0=0] [L690] -1 ~y$r_buff0_thd1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y~0=0] [L691] -1 ~y$r_buff0_thd2~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y~0=0] [L692] -1 ~y$r_buff1_thd0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y~0=0] [L693] -1 ~y$r_buff1_thd1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y~0=0] [L694] -1 ~y$r_buff1_thd2~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y~0=0] [L695] -1 ~y$read_delayed~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed~0=0, ~y~0=0] [L696] -1 ~y$read_delayed_var~0.base, ~y$read_delayed_var~0.offset := 0, 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y~0=0] [L697] -1 ~y$w_buff0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0~0=0, ~y~0=0] [L698] -1 ~y$w_buff0_used~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y~0=0] [L699] -1 ~y$w_buff1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1~0=0, ~y~0=0] [L700] -1 ~y$w_buff1_used~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L701] -1 ~weak$$choice0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L702] -1 ~weak$$choice2~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 havoc main_#res; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 havoc main_#t~nondet57, main_#t~nondet58, main_#t~ite60, main_#t~ite59, main_#t~ite61, main_#t~ite62, main_#t~ite63, main_#t~ite64, main_~#t1729~0.base, main_~#t1729~0.offset, main_~#t1730~0.base, main_~#t1730~0.offset; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L789] -1 call main_~#t1729~0.base, main_~#t1729~0.offset := #Ultimate.alloc(4); VAL [#NULL.base=0, #NULL.offset=0, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L790] -1 call write~int(0, main_~#t1729~0.base, main_~#t1729~0.offset, 4); VAL [#NULL.base=0, #NULL.offset=0, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L790] FORK -1 fork 0 P0(0, 0); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L790] -1 havoc main_#t~nondet57; VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L791] -1 call main_~#t1730~0.base, main_~#t1730~0.offset := #Ultimate.alloc(4); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L792] -1 call write~int(1, main_~#t1730~0.base, main_~#t1730~0.offset, 4); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L792] FORK -1 fork 1 P1(0, 0); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L734-L777] 0 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset; [L737] 0 ~y$w_buff1~0 := ~y$w_buff0~0; [L738] 0 ~y$w_buff0~0 := 1; [L739] 0 ~y$w_buff1_used~0 := ~y$w_buff0_used~0; [L740] 0 ~y$w_buff0_used~0 := 1; [L741] 0 __VERIFIER_assert_#in~expression := (if !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$w_buff0_used~0 % 256) then 1 else 0); [L741] 0 havoc __VERIFIER_assert_~expression; [L5] 0 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L5] 0 assume !(0 == __VERIFIER_assert_~expression); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L742] 0 ~y$r_buff1_thd0~0 := ~y$r_buff0_thd0~0; [L743] 0 ~y$r_buff1_thd1~0 := ~y$r_buff0_thd1~0; [L744] 0 ~y$r_buff1_thd2~0 := ~y$r_buff0_thd2~0; [L745] 0 ~y$r_buff0_thd2~0 := 1; [L748] 0 ~weak$$choice0~0 := #t~nondet27; [L748] 0 havoc #t~nondet27; [L749] 0 ~weak$$choice2~0 := #t~nondet28; [L749] 0 havoc #t~nondet28; [L750] 0 ~y$flush_delayed~0 := ~weak$$choice2~0; [L751] 0 ~y$mem_tmp~0 := ~y~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L752] 0 assume !((0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd2~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd2~0 % 256 && 0 == ~y$r_buff1_thd2~0 % 256)); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L752] 0 assume 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256; [L752] 0 #t~ite29 := ~y$w_buff0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite29=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L752] 0 #t~ite30 := #t~ite29; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite29=1, #t~ite30=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L752] 0 ~y~0 := #t~ite30; [L752] 0 havoc #t~ite29; [L752] 0 havoc #t~ite30; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L753] 0 assume 0 != ~weak$$choice2~0 % 256; [L753] 0 #t~ite33 := ~y$w_buff0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite33=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L753] 0 ~y$w_buff0~0 := #t~ite33; [L753] 0 havoc #t~ite33; [L753] 0 havoc #t~ite32; [L753] 0 havoc #t~ite31; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L754] 0 assume 0 != ~weak$$choice2~0 % 256; [L754] 0 #t~ite36 := ~y$w_buff1~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite36=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L754] 0 ~y$w_buff1~0 := #t~ite36; [L754] 0 havoc #t~ite36; [L754] 0 havoc #t~ite35; [L754] 0 havoc #t~ite34; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L755] 0 assume 0 != ~weak$$choice2~0 % 256; [L755] 0 #t~ite39 := ~y$w_buff0_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite39=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L755] 0 ~y$w_buff0_used~0 := #t~ite39; [L755] 0 havoc #t~ite38; [L755] 0 havoc #t~ite37; [L755] 0 havoc #t~ite39; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L756] 0 assume 0 != ~weak$$choice2~0 % 256; [L756] 0 #t~ite42 := ~y$w_buff1_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite42=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L756] 0 ~y$w_buff1_used~0 := #t~ite42; [L756] 0 havoc #t~ite42; [L756] 0 havoc #t~ite41; [L756] 0 havoc #t~ite40; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L757] 0 assume 0 != ~weak$$choice2~0 % 256; [L757] 0 #t~ite45 := ~y$r_buff0_thd2~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite45=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L757] 0 ~y$r_buff0_thd2~0 := #t~ite45; [L757] 0 havoc #t~ite45; [L757] 0 havoc #t~ite44; [L757] 0 havoc #t~ite43; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L758] 0 assume 0 != ~weak$$choice2~0 % 256; [L758] 0 #t~ite48 := ~y$r_buff1_thd2~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite48=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L758] 0 ~y$r_buff1_thd2~0 := #t~ite48; [L758] 0 havoc #t~ite48; [L758] 0 havoc #t~ite46; [L758] 0 havoc #t~ite47; [L759] 0 ~__unbuffered_p1_EAX~0 := ~y~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L760] 0 assume 0 != ~y$flush_delayed~0 % 256; [L760] 0 #t~ite49 := ~y$mem_tmp~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite49=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L760] 0 ~y~0 := #t~ite49; [L760] 0 havoc #t~ite49; [L761] 0 ~y$flush_delayed~0 := 0; [L764] 0 ~__unbuffered_p1_EBX~0 := ~x~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L767] 0 assume 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256; [L767] 0 #t~ite51 := ~y$w_buff0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite51=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L703-L733] 1 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset; [L706] 1 ~x~0 := 1; [L709] 1 ~__unbuffered_p0_EAX~0 := ~x~0; [L712] 1 ~weak$$choice0~0 := #t~nondet3; [L712] 1 havoc #t~nondet3; [L713] 1 ~weak$$choice2~0 := #t~nondet4; [L713] 1 havoc #t~nondet4; [L714] 1 ~y$flush_delayed~0 := ~weak$$choice2~0; [L715] 1 ~y$mem_tmp~0 := ~y~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite51=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L716] 1 assume (0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd1~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd1~0 % 256 && 0 == ~y$r_buff1_thd1~0 % 256); [L716] 1 #t~ite6 := ~y~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite51=1, #t~ite6=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L767] 0 ~y~0 := #t~ite51; [L767] 0 havoc #t~ite51; [L767] 0 havoc #t~ite50; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite6=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L768] 0 assume 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256; [L768] 0 #t~ite52 := 0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite52=0, #t~ite6=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L768] 0 ~y$w_buff0_used~0 := #t~ite52; [L768] 0 havoc #t~ite52; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite6=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L769] 0 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)); [L769] 0 #t~ite53 := ~y$w_buff1_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite53=0, #t~ite6=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L716] 1 ~y~0 := #t~ite6; [L716] 1 havoc #t~ite6; [L716] 1 havoc #t~ite5; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite53=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L717] 1 assume 0 != ~weak$$choice2~0 % 256; [L717] 1 #t~ite9 := ~y$w_buff0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite53=0, #t~ite9=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L717] 1 ~y$w_buff0~0 := #t~ite9; [L717] 1 havoc #t~ite7; [L717] 1 havoc #t~ite9; [L717] 1 havoc #t~ite8; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite53=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L718] 1 assume 0 != ~weak$$choice2~0 % 256; [L718] 1 #t~ite12 := ~y$w_buff1~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite12=0, #t~ite53=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L718] 1 ~y$w_buff1~0 := #t~ite12; [L718] 1 havoc #t~ite12; [L718] 1 havoc #t~ite10; [L718] 1 havoc #t~ite11; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite53=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L719] 1 assume 0 != ~weak$$choice2~0 % 256; [L719] 1 #t~ite15 := ~y$w_buff0_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite15=0, #t~ite53=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L719] 1 ~y$w_buff0_used~0 := #t~ite15; [L719] 1 havoc #t~ite14; [L719] 1 havoc #t~ite13; [L719] 1 havoc #t~ite15; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite53=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L720] 1 assume 0 != ~weak$$choice2~0 % 256; [L720] 1 #t~ite18 := ~y$w_buff1_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite18=0, #t~ite53=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L769] 0 ~y$w_buff1_used~0 := #t~ite53; [L769] 0 havoc #t~ite53; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite18=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L770] 0 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256); [L770] 0 #t~ite54 := ~y$r_buff0_thd2~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite18=0, #t~ite54=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L770] 0 ~y$r_buff0_thd2~0 := #t~ite54; [L770] 0 havoc #t~ite54; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite18=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L771] 0 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)); [L771] 0 #t~ite55 := ~y$r_buff1_thd2~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite18=0, #t~ite55=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L771] 0 ~y$r_buff1_thd2~0 := #t~ite55; [L771] 0 havoc #t~ite55; [L774] 0 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite18=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L720] 1 ~y$w_buff1_used~0 := #t~ite18; [L720] 1 havoc #t~ite18; [L720] 1 havoc #t~ite17; [L720] 1 havoc #t~ite16; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L721] 1 assume 0 != ~weak$$choice2~0 % 256; [L721] 1 #t~ite21 := ~y$r_buff0_thd1~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite21=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L721] 1 ~y$r_buff0_thd1~0 := #t~ite21; [L721] 1 havoc #t~ite21; [L721] 1 havoc #t~ite20; [L721] 1 havoc #t~ite19; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L722] 1 assume 0 != ~weak$$choice2~0 % 256; [L722] 1 #t~ite24 := ~y$r_buff1_thd1~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite24=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L722] 1 ~y$r_buff1_thd1~0 := #t~ite24; [L722] 1 havoc #t~ite24; [L722] 1 havoc #t~ite22; [L722] 1 havoc #t~ite23; [L723] 1 ~__unbuffered_p0_EBX~0 := ~y~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L724] 1 assume 0 != ~y$flush_delayed~0 % 256; [L724] 1 #t~ite25 := ~y$mem_tmp~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite25=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L724] 1 ~y~0 := #t~ite25; [L724] 1 havoc #t~ite25; [L725] 1 ~y$flush_delayed~0 := 0; [L730] 1 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L792] -1 havoc main_#t~nondet58; [L794] -1 ~main$tmp_guard0~0 := (if 0 == (if 2 == ~__unbuffered_cnt~0 then 1 else 0) then 0 else 1); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L796] -1 assume 0 != ~main$tmp_guard0~0 % 256; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L798] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L798] -1 assume !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256); [L798] -1 main_#t~ite59 := ~y~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite59=0, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L798] -1 main_#t~ite60 := main_#t~ite59; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite59=0, main_#t~ite60=0, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L798] -1 ~y~0 := main_#t~ite60; [L798] -1 havoc main_#t~ite60; [L798] -1 havoc main_#t~ite59; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L799] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256); [L799] -1 main_#t~ite61 := ~y$w_buff0_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite61=0, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L799] -1 ~y$w_buff0_used~0 := main_#t~ite61; [L799] -1 havoc main_#t~ite61; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L800] -1 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)); [L800] -1 main_#t~ite62 := ~y$w_buff1_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite62=0, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L800] -1 ~y$w_buff1_used~0 := main_#t~ite62; [L800] -1 havoc main_#t~ite62; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L801] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256); [L801] -1 main_#t~ite63 := ~y$r_buff0_thd0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite63=0, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L801] -1 ~y$r_buff0_thd0~0 := main_#t~ite63; [L801] -1 havoc main_#t~ite63; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L802] -1 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)); [L802] -1 main_#t~ite64 := ~y$r_buff1_thd0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite64=0, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L802] -1 ~y$r_buff1_thd0~0 := main_#t~ite64; [L802] -1 havoc main_#t~ite64; [L805] -1 ~main$tmp_guard1~0 := (if 0 == (if !(((1 == ~__unbuffered_p0_EAX~0 && 0 == ~__unbuffered_p0_EBX~0) && 1 == ~__unbuffered_p1_EAX~0) && 0 == ~__unbuffered_p1_EBX~0) then 1 else 0) then 0 else 1); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L807] -1 __VERIFIER_assert_#in~expression := ~main$tmp_guard1~0 % 256; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L807] -1 havoc __VERIFIER_assert_~expression; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L5] -1 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, __VERIFIER_assert_~expression=0, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L5] -1 assume 0 == __VERIFIER_assert_~expression; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, __VERIFIER_assert_~expression=0, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L5] -1 assert false; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, __VERIFIER_assert_~expression=0, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] ----- ----- class de.uni_freiburg.informatik.ultimate.boogie.preprocessor.BoogiePreprocessorBacktranslator [?] -1 #NULL.base, #NULL.offset := 0, 0; VAL [#NULL.base=0, #NULL.offset=0] [?] -1 #valid := #valid[0 := 0]; VAL [#NULL.base=0, #NULL.offset=0] [L672] -1 ~__unbuffered_cnt~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0] [L674] -1 ~__unbuffered_p0_EAX~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0] [L676] -1 ~__unbuffered_p0_EBX~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0] [L678] -1 ~__unbuffered_p1_EAX~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0] [L680] -1 ~__unbuffered_p1_EBX~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0] [L681] -1 ~main$tmp_guard0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0] [L682] -1 ~main$tmp_guard1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [L684] -1 ~x~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [L686] -1 ~y~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0] [L687] -1 ~y$flush_delayed~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y~0=0] [L688] -1 ~y$mem_tmp~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y~0=0] [L689] -1 ~y$r_buff0_thd0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y~0=0] [L690] -1 ~y$r_buff0_thd1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y~0=0] [L691] -1 ~y$r_buff0_thd2~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y~0=0] [L692] -1 ~y$r_buff1_thd0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y~0=0] [L693] -1 ~y$r_buff1_thd1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y~0=0] [L694] -1 ~y$r_buff1_thd2~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y~0=0] [L695] -1 ~y$read_delayed~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed~0=0, ~y~0=0] [L696] -1 ~y$read_delayed_var~0.base, ~y$read_delayed_var~0.offset := 0, 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y~0=0] [L697] -1 ~y$w_buff0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0~0=0, ~y~0=0] [L698] -1 ~y$w_buff0_used~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y~0=0] [L699] -1 ~y$w_buff1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1~0=0, ~y~0=0] [L700] -1 ~y$w_buff1_used~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L701] -1 ~weak$$choice0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L702] -1 ~weak$$choice2~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 havoc main_#res; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 havoc main_#t~nondet57, main_#t~nondet58, main_#t~ite60, main_#t~ite59, main_#t~ite61, main_#t~ite62, main_#t~ite63, main_#t~ite64, main_~#t1729~0.base, main_~#t1729~0.offset, main_~#t1730~0.base, main_~#t1730~0.offset; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L789] -1 call main_~#t1729~0.base, main_~#t1729~0.offset := #Ultimate.alloc(4); VAL [#NULL.base=0, #NULL.offset=0, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L790] -1 call write~int(0, main_~#t1729~0.base, main_~#t1729~0.offset, 4); VAL [#NULL.base=0, #NULL.offset=0, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L790] FORK -1 fork 0 P0(0, 0); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L790] -1 havoc main_#t~nondet57; VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L791] -1 call main_~#t1730~0.base, main_~#t1730~0.offset := #Ultimate.alloc(4); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L792] -1 call write~int(1, main_~#t1730~0.base, main_~#t1730~0.offset, 4); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L792] FORK -1 fork 1 P1(0, 0); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L734-L777] 0 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset; [L737] 0 ~y$w_buff1~0 := ~y$w_buff0~0; [L738] 0 ~y$w_buff0~0 := 1; [L739] 0 ~y$w_buff1_used~0 := ~y$w_buff0_used~0; [L740] 0 ~y$w_buff0_used~0 := 1; [L741] 0 __VERIFIER_assert_#in~expression := (if !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$w_buff0_used~0 % 256) then 1 else 0); [L741] 0 havoc __VERIFIER_assert_~expression; [L5] 0 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L5] 0 assume !(0 == __VERIFIER_assert_~expression); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L742] 0 ~y$r_buff1_thd0~0 := ~y$r_buff0_thd0~0; [L743] 0 ~y$r_buff1_thd1~0 := ~y$r_buff0_thd1~0; [L744] 0 ~y$r_buff1_thd2~0 := ~y$r_buff0_thd2~0; [L745] 0 ~y$r_buff0_thd2~0 := 1; [L748] 0 ~weak$$choice0~0 := #t~nondet27; [L748] 0 havoc #t~nondet27; [L749] 0 ~weak$$choice2~0 := #t~nondet28; [L749] 0 havoc #t~nondet28; [L750] 0 ~y$flush_delayed~0 := ~weak$$choice2~0; [L751] 0 ~y$mem_tmp~0 := ~y~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L752] 0 assume !((0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd2~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd2~0 % 256 && 0 == ~y$r_buff1_thd2~0 % 256)); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L752] 0 assume 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256; [L752] 0 #t~ite29 := ~y$w_buff0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite29=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L752] 0 #t~ite30 := #t~ite29; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite29=1, #t~ite30=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L752] 0 ~y~0 := #t~ite30; [L752] 0 havoc #t~ite29; [L752] 0 havoc #t~ite30; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L753] 0 assume 0 != ~weak$$choice2~0 % 256; [L753] 0 #t~ite33 := ~y$w_buff0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite33=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L753] 0 ~y$w_buff0~0 := #t~ite33; [L753] 0 havoc #t~ite33; [L753] 0 havoc #t~ite32; [L753] 0 havoc #t~ite31; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L754] 0 assume 0 != ~weak$$choice2~0 % 256; [L754] 0 #t~ite36 := ~y$w_buff1~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite36=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L754] 0 ~y$w_buff1~0 := #t~ite36; [L754] 0 havoc #t~ite36; [L754] 0 havoc #t~ite35; [L754] 0 havoc #t~ite34; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L755] 0 assume 0 != ~weak$$choice2~0 % 256; [L755] 0 #t~ite39 := ~y$w_buff0_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite39=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L755] 0 ~y$w_buff0_used~0 := #t~ite39; [L755] 0 havoc #t~ite38; [L755] 0 havoc #t~ite37; [L755] 0 havoc #t~ite39; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L756] 0 assume 0 != ~weak$$choice2~0 % 256; [L756] 0 #t~ite42 := ~y$w_buff1_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite42=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L756] 0 ~y$w_buff1_used~0 := #t~ite42; [L756] 0 havoc #t~ite42; [L756] 0 havoc #t~ite41; [L756] 0 havoc #t~ite40; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L757] 0 assume 0 != ~weak$$choice2~0 % 256; [L757] 0 #t~ite45 := ~y$r_buff0_thd2~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite45=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L757] 0 ~y$r_buff0_thd2~0 := #t~ite45; [L757] 0 havoc #t~ite45; [L757] 0 havoc #t~ite44; [L757] 0 havoc #t~ite43; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L758] 0 assume 0 != ~weak$$choice2~0 % 256; [L758] 0 #t~ite48 := ~y$r_buff1_thd2~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite48=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L758] 0 ~y$r_buff1_thd2~0 := #t~ite48; [L758] 0 havoc #t~ite48; [L758] 0 havoc #t~ite46; [L758] 0 havoc #t~ite47; [L759] 0 ~__unbuffered_p1_EAX~0 := ~y~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L760] 0 assume 0 != ~y$flush_delayed~0 % 256; [L760] 0 #t~ite49 := ~y$mem_tmp~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite49=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L760] 0 ~y~0 := #t~ite49; [L760] 0 havoc #t~ite49; [L761] 0 ~y$flush_delayed~0 := 0; [L764] 0 ~__unbuffered_p1_EBX~0 := ~x~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L767] 0 assume 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256; [L767] 0 #t~ite51 := ~y$w_buff0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite51=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L703-L733] 1 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset; [L706] 1 ~x~0 := 1; [L709] 1 ~__unbuffered_p0_EAX~0 := ~x~0; [L712] 1 ~weak$$choice0~0 := #t~nondet3; [L712] 1 havoc #t~nondet3; [L713] 1 ~weak$$choice2~0 := #t~nondet4; [L713] 1 havoc #t~nondet4; [L714] 1 ~y$flush_delayed~0 := ~weak$$choice2~0; [L715] 1 ~y$mem_tmp~0 := ~y~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite51=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L716] 1 assume (0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd1~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd1~0 % 256 && 0 == ~y$r_buff1_thd1~0 % 256); [L716] 1 #t~ite6 := ~y~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite51=1, #t~ite6=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L767] 0 ~y~0 := #t~ite51; [L767] 0 havoc #t~ite51; [L767] 0 havoc #t~ite50; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite6=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L768] 0 assume 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256; [L768] 0 #t~ite52 := 0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite52=0, #t~ite6=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L768] 0 ~y$w_buff0_used~0 := #t~ite52; [L768] 0 havoc #t~ite52; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite6=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L769] 0 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)); [L769] 0 #t~ite53 := ~y$w_buff1_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite53=0, #t~ite6=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L716] 1 ~y~0 := #t~ite6; [L716] 1 havoc #t~ite6; [L716] 1 havoc #t~ite5; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite53=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L717] 1 assume 0 != ~weak$$choice2~0 % 256; [L717] 1 #t~ite9 := ~y$w_buff0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite53=0, #t~ite9=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L717] 1 ~y$w_buff0~0 := #t~ite9; [L717] 1 havoc #t~ite7; [L717] 1 havoc #t~ite9; [L717] 1 havoc #t~ite8; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite53=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L718] 1 assume 0 != ~weak$$choice2~0 % 256; [L718] 1 #t~ite12 := ~y$w_buff1~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite12=0, #t~ite53=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L718] 1 ~y$w_buff1~0 := #t~ite12; [L718] 1 havoc #t~ite12; [L718] 1 havoc #t~ite10; [L718] 1 havoc #t~ite11; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite53=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L719] 1 assume 0 != ~weak$$choice2~0 % 256; [L719] 1 #t~ite15 := ~y$w_buff0_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite15=0, #t~ite53=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L719] 1 ~y$w_buff0_used~0 := #t~ite15; [L719] 1 havoc #t~ite14; [L719] 1 havoc #t~ite13; [L719] 1 havoc #t~ite15; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite53=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L720] 1 assume 0 != ~weak$$choice2~0 % 256; [L720] 1 #t~ite18 := ~y$w_buff1_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite18=0, #t~ite53=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L769] 0 ~y$w_buff1_used~0 := #t~ite53; [L769] 0 havoc #t~ite53; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite18=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L770] 0 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256); [L770] 0 #t~ite54 := ~y$r_buff0_thd2~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite18=0, #t~ite54=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L770] 0 ~y$r_buff0_thd2~0 := #t~ite54; [L770] 0 havoc #t~ite54; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite18=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L771] 0 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)); [L771] 0 #t~ite55 := ~y$r_buff1_thd2~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite18=0, #t~ite55=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L771] 0 ~y$r_buff1_thd2~0 := #t~ite55; [L771] 0 havoc #t~ite55; [L774] 0 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite18=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L720] 1 ~y$w_buff1_used~0 := #t~ite18; [L720] 1 havoc #t~ite18; [L720] 1 havoc #t~ite17; [L720] 1 havoc #t~ite16; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L721] 1 assume 0 != ~weak$$choice2~0 % 256; [L721] 1 #t~ite21 := ~y$r_buff0_thd1~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite21=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L721] 1 ~y$r_buff0_thd1~0 := #t~ite21; [L721] 1 havoc #t~ite21; [L721] 1 havoc #t~ite20; [L721] 1 havoc #t~ite19; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L722] 1 assume 0 != ~weak$$choice2~0 % 256; [L722] 1 #t~ite24 := ~y$r_buff1_thd1~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite24=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L722] 1 ~y$r_buff1_thd1~0 := #t~ite24; [L722] 1 havoc #t~ite24; [L722] 1 havoc #t~ite22; [L722] 1 havoc #t~ite23; [L723] 1 ~__unbuffered_p0_EBX~0 := ~y~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L724] 1 assume 0 != ~y$flush_delayed~0 % 256; [L724] 1 #t~ite25 := ~y$mem_tmp~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite25=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L724] 1 ~y~0 := #t~ite25; [L724] 1 havoc #t~ite25; [L725] 1 ~y$flush_delayed~0 := 0; [L730] 1 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L792] -1 havoc main_#t~nondet58; [L794] -1 ~main$tmp_guard0~0 := (if 0 == (if 2 == ~__unbuffered_cnt~0 then 1 else 0) then 0 else 1); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L796] -1 assume 0 != ~main$tmp_guard0~0 % 256; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L798] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L798] -1 assume !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256); [L798] -1 main_#t~ite59 := ~y~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite59=0, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L798] -1 main_#t~ite60 := main_#t~ite59; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite59=0, main_#t~ite60=0, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L798] -1 ~y~0 := main_#t~ite60; [L798] -1 havoc main_#t~ite60; [L798] -1 havoc main_#t~ite59; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L799] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256); [L799] -1 main_#t~ite61 := ~y$w_buff0_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite61=0, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L799] -1 ~y$w_buff0_used~0 := main_#t~ite61; [L799] -1 havoc main_#t~ite61; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L800] -1 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)); [L800] -1 main_#t~ite62 := ~y$w_buff1_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite62=0, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L800] -1 ~y$w_buff1_used~0 := main_#t~ite62; [L800] -1 havoc main_#t~ite62; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L801] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256); [L801] -1 main_#t~ite63 := ~y$r_buff0_thd0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite63=0, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L801] -1 ~y$r_buff0_thd0~0 := main_#t~ite63; [L801] -1 havoc main_#t~ite63; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L802] -1 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)); [L802] -1 main_#t~ite64 := ~y$r_buff1_thd0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite64=0, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L802] -1 ~y$r_buff1_thd0~0 := main_#t~ite64; [L802] -1 havoc main_#t~ite64; [L805] -1 ~main$tmp_guard1~0 := (if 0 == (if !(((1 == ~__unbuffered_p0_EAX~0 && 0 == ~__unbuffered_p0_EBX~0) && 1 == ~__unbuffered_p1_EAX~0) && 0 == ~__unbuffered_p1_EBX~0) then 1 else 0) then 0 else 1); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L807] -1 __VERIFIER_assert_#in~expression := ~main$tmp_guard1~0 % 256; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L807] -1 havoc __VERIFIER_assert_~expression; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L5] -1 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, __VERIFIER_assert_~expression=0, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L5] -1 assume 0 == __VERIFIER_assert_~expression; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, __VERIFIER_assert_~expression=0, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L5] -1 assert false; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, __VERIFIER_assert_~expression=0, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 #NULL := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0] [?] -1 #valid[0] := 0; VAL [#NULL!base=0, #NULL!offset=0] [L672] -1 ~__unbuffered_cnt~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0] [L674] -1 ~__unbuffered_p0_EAX~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0] [L676] -1 ~__unbuffered_p0_EBX~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0] [L678] -1 ~__unbuffered_p1_EAX~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0] [L680] -1 ~__unbuffered_p1_EBX~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0] [L681] -1 ~main$tmp_guard0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0] [L682] -1 ~main$tmp_guard1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [L684] -1 ~x~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [L686] -1 ~y~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0] [L687] -1 ~y$flush_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y~0=0] [L688] -1 ~y$mem_tmp~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y~0=0] [L689] -1 ~y$r_buff0_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y~0=0] [L690] -1 ~y$r_buff0_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y~0=0] [L691] -1 ~y$r_buff0_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y~0=0] [L692] -1 ~y$r_buff1_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y~0=0] [L693] -1 ~y$r_buff1_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y~0=0] [L694] -1 ~y$r_buff1_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y~0=0] [L695] -1 ~y$read_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed~0=0, ~y~0=0] [L696] -1 ~y$read_delayed_var~0 := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y~0=0] [L697] -1 ~y$w_buff0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0~0=0, ~y~0=0] [L698] -1 ~y$w_buff0_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y~0=0] [L699] -1 ~y$w_buff1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1~0=0, ~y~0=0] [L700] -1 ~y$w_buff1_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L701] -1 ~weak$$choice0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L702] -1 ~weak$$choice2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 havoc main_#res; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 havoc main_#t~nondet57, main_#t~nondet58, main_#t~ite60, main_#t~ite59, main_#t~ite61, main_#t~ite62, main_#t~ite63, main_#t~ite64, main_~#t1729~0, main_~#t1730~0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L789] FCALL -1 call main_~#t1729~0 := #Ultimate.alloc(4); VAL [#NULL!base=0, #NULL!offset=0, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L790] FCALL -1 call write~int(0, main_~#t1729~0, 4); VAL [#NULL!base=0, #NULL!offset=0, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L790] FORK -1 fork 0 P0({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L790] -1 havoc main_#t~nondet57; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L791] FCALL -1 call main_~#t1730~0 := #Ultimate.alloc(4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L792] FCALL -1 call write~int(1, main_~#t1730~0, 4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L792] FORK -1 fork 1 P1({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L734-L777] 0 ~arg := #in~arg; [L737] 0 ~y$w_buff1~0 := ~y$w_buff0~0; [L738] 0 ~y$w_buff0~0 := 1; [L739] 0 ~y$w_buff1_used~0 := ~y$w_buff0_used~0; [L740] 0 ~y$w_buff0_used~0 := 1; [L741] 0 __VERIFIER_assert_#in~expression := (if !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$w_buff0_used~0 % 256) then 1 else 0); [L741] 0 havoc __VERIFIER_assert_~expression; [L5] 0 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L5] COND FALSE 0 !(0 == __VERIFIER_assert_~expression) VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L742] 0 ~y$r_buff1_thd0~0 := ~y$r_buff0_thd0~0; [L743] 0 ~y$r_buff1_thd1~0 := ~y$r_buff0_thd1~0; [L744] 0 ~y$r_buff1_thd2~0 := ~y$r_buff0_thd2~0; [L745] 0 ~y$r_buff0_thd2~0 := 1; [L748] 0 ~weak$$choice0~0 := #t~nondet27; [L748] 0 havoc #t~nondet27; [L749] 0 ~weak$$choice2~0 := #t~nondet28; [L749] 0 havoc #t~nondet28; [L750] 0 ~y$flush_delayed~0 := ~weak$$choice2~0; [L751] 0 ~y$mem_tmp~0 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L752] COND FALSE 0 !((0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd2~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd2~0 % 256 && 0 == ~y$r_buff1_thd2~0 % 256)) VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L752] COND TRUE 0 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256 [L752] 0 #t~ite29 := ~y$w_buff0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite29=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L752] 0 #t~ite30 := #t~ite29; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite29=1, #t~ite30=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L752] 0 ~y~0 := #t~ite30; [L752] 0 havoc #t~ite29; [L752] 0 havoc #t~ite30; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L753] COND TRUE 0 0 != ~weak$$choice2~0 % 256 [L753] 0 #t~ite33 := ~y$w_buff0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite33=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L753] 0 ~y$w_buff0~0 := #t~ite33; [L753] 0 havoc #t~ite33; [L753] 0 havoc #t~ite32; [L753] 0 havoc #t~ite31; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L754] COND TRUE 0 0 != ~weak$$choice2~0 % 256 [L754] 0 #t~ite36 := ~y$w_buff1~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite36=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L754] 0 ~y$w_buff1~0 := #t~ite36; [L754] 0 havoc #t~ite36; [L754] 0 havoc #t~ite35; [L754] 0 havoc #t~ite34; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L755] COND TRUE 0 0 != ~weak$$choice2~0 % 256 [L755] 0 #t~ite39 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite39=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L755] 0 ~y$w_buff0_used~0 := #t~ite39; [L755] 0 havoc #t~ite38; [L755] 0 havoc #t~ite37; [L755] 0 havoc #t~ite39; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L756] COND TRUE 0 0 != ~weak$$choice2~0 % 256 [L756] 0 #t~ite42 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite42=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L756] 0 ~y$w_buff1_used~0 := #t~ite42; [L756] 0 havoc #t~ite42; [L756] 0 havoc #t~ite41; [L756] 0 havoc #t~ite40; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L757] COND TRUE 0 0 != ~weak$$choice2~0 % 256 [L757] 0 #t~ite45 := ~y$r_buff0_thd2~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite45=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L757] 0 ~y$r_buff0_thd2~0 := #t~ite45; [L757] 0 havoc #t~ite45; [L757] 0 havoc #t~ite44; [L757] 0 havoc #t~ite43; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L758] COND TRUE 0 0 != ~weak$$choice2~0 % 256 [L758] 0 #t~ite48 := ~y$r_buff1_thd2~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite48=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L758] 0 ~y$r_buff1_thd2~0 := #t~ite48; [L758] 0 havoc #t~ite48; [L758] 0 havoc #t~ite46; [L758] 0 havoc #t~ite47; [L759] 0 ~__unbuffered_p1_EAX~0 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L760] COND TRUE 0 0 != ~y$flush_delayed~0 % 256 [L760] 0 #t~ite49 := ~y$mem_tmp~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite49=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L760] 0 ~y~0 := #t~ite49; [L760] 0 havoc #t~ite49; [L761] 0 ~y$flush_delayed~0 := 0; [L764] 0 ~__unbuffered_p1_EBX~0 := ~x~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L767] COND TRUE 0 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256 [L767] 0 #t~ite51 := ~y$w_buff0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite51=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L703-L733] 1 ~arg := #in~arg; [L706] 1 ~x~0 := 1; [L709] 1 ~__unbuffered_p0_EAX~0 := ~x~0; [L712] 1 ~weak$$choice0~0 := #t~nondet3; [L712] 1 havoc #t~nondet3; [L713] 1 ~weak$$choice2~0 := #t~nondet4; [L713] 1 havoc #t~nondet4; [L714] 1 ~y$flush_delayed~0 := ~weak$$choice2~0; [L715] 1 ~y$mem_tmp~0 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite51=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L716] COND TRUE 1 (0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd1~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd1~0 % 256 && 0 == ~y$r_buff1_thd1~0 % 256) [L716] 1 #t~ite6 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite51=1, #t~ite6=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L767] 0 ~y~0 := #t~ite51; [L767] 0 havoc #t~ite51; [L767] 0 havoc #t~ite50; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite6=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L768] COND TRUE 0 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256 [L768] 0 #t~ite52 := 0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite52=0, #t~ite6=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L768] 0 ~y$w_buff0_used~0 := #t~ite52; [L768] 0 havoc #t~ite52; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite6=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L769] COND FALSE 0 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)) [L769] 0 #t~ite53 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite53=0, #t~ite6=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L716] 1 ~y~0 := #t~ite6; [L716] 1 havoc #t~ite6; [L716] 1 havoc #t~ite5; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite53=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L717] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L717] 1 #t~ite9 := ~y$w_buff0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite53=0, #t~ite9=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L717] 1 ~y$w_buff0~0 := #t~ite9; [L717] 1 havoc #t~ite7; [L717] 1 havoc #t~ite9; [L717] 1 havoc #t~ite8; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite53=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L718] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L718] 1 #t~ite12 := ~y$w_buff1~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite12=0, #t~ite53=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L718] 1 ~y$w_buff1~0 := #t~ite12; [L718] 1 havoc #t~ite12; [L718] 1 havoc #t~ite10; [L718] 1 havoc #t~ite11; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite53=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L719] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L719] 1 #t~ite15 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite15=0, #t~ite53=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L719] 1 ~y$w_buff0_used~0 := #t~ite15; [L719] 1 havoc #t~ite14; [L719] 1 havoc #t~ite13; [L719] 1 havoc #t~ite15; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite53=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L720] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L720] 1 #t~ite18 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite18=0, #t~ite53=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L769] 0 ~y$w_buff1_used~0 := #t~ite53; [L769] 0 havoc #t~ite53; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite18=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L770] COND FALSE 0 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) [L770] 0 #t~ite54 := ~y$r_buff0_thd2~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite18=0, #t~ite54=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L770] 0 ~y$r_buff0_thd2~0 := #t~ite54; [L770] 0 havoc #t~ite54; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite18=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L771] COND FALSE 0 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)) [L771] 0 #t~ite55 := ~y$r_buff1_thd2~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite18=0, #t~ite55=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L771] 0 ~y$r_buff1_thd2~0 := #t~ite55; [L771] 0 havoc #t~ite55; [L774] 0 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite18=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L720] 1 ~y$w_buff1_used~0 := #t~ite18; [L720] 1 havoc #t~ite18; [L720] 1 havoc #t~ite17; [L720] 1 havoc #t~ite16; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L721] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L721] 1 #t~ite21 := ~y$r_buff0_thd1~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite21=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L721] 1 ~y$r_buff0_thd1~0 := #t~ite21; [L721] 1 havoc #t~ite21; [L721] 1 havoc #t~ite20; [L721] 1 havoc #t~ite19; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L722] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L722] 1 #t~ite24 := ~y$r_buff1_thd1~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite24=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L722] 1 ~y$r_buff1_thd1~0 := #t~ite24; [L722] 1 havoc #t~ite24; [L722] 1 havoc #t~ite22; [L722] 1 havoc #t~ite23; [L723] 1 ~__unbuffered_p0_EBX~0 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L724] COND TRUE 1 0 != ~y$flush_delayed~0 % 256 [L724] 1 #t~ite25 := ~y$mem_tmp~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite25=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L724] 1 ~y~0 := #t~ite25; [L724] 1 havoc #t~ite25; [L725] 1 ~y$flush_delayed~0 := 0; [L730] 1 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L792] -1 havoc main_#t~nondet58; [L794] -1 ~main$tmp_guard0~0 := (if 0 == (if 2 == ~__unbuffered_cnt~0 then 1 else 0) then 0 else 1); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L796] -1 assume 0 != ~main$tmp_guard0~0 % 256; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L798] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L798] COND FALSE -1 !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256) [L798] -1 main_#t~ite59 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite59=0, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L798] -1 main_#t~ite60 := main_#t~ite59; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite59=0, main_#t~ite60=0, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L798] -1 ~y~0 := main_#t~ite60; [L798] -1 havoc main_#t~ite60; [L798] -1 havoc main_#t~ite59; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L799] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) [L799] -1 main_#t~ite61 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite61=0, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L799] -1 ~y$w_buff0_used~0 := main_#t~ite61; [L799] -1 havoc main_#t~ite61; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L800] COND FALSE -1 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)) [L800] -1 main_#t~ite62 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite62=0, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L800] -1 ~y$w_buff1_used~0 := main_#t~ite62; [L800] -1 havoc main_#t~ite62; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L801] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) [L801] -1 main_#t~ite63 := ~y$r_buff0_thd0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite63=0, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L801] -1 ~y$r_buff0_thd0~0 := main_#t~ite63; [L801] -1 havoc main_#t~ite63; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L802] COND FALSE -1 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)) [L802] -1 main_#t~ite64 := ~y$r_buff1_thd0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite64=0, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L802] -1 ~y$r_buff1_thd0~0 := main_#t~ite64; [L802] -1 havoc main_#t~ite64; [L805] -1 ~main$tmp_guard1~0 := (if 0 == (if !(((1 == ~__unbuffered_p0_EAX~0 && 0 == ~__unbuffered_p0_EBX~0) && 1 == ~__unbuffered_p1_EAX~0) && 0 == ~__unbuffered_p1_EBX~0) then 1 else 0) then 0 else 1); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L807] -1 __VERIFIER_assert_#in~expression := ~main$tmp_guard1~0 % 256; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L807] -1 havoc __VERIFIER_assert_~expression; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L5] -1 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, __VERIFIER_assert_~expression=0, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L5] COND TRUE -1 0 == __VERIFIER_assert_~expression VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, __VERIFIER_assert_~expression=0, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L5] -1 assert false; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, __VERIFIER_assert_~expression=0, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] ----- ----- class de.uni_freiburg.informatik.ultimate.boogie.procedureinliner.backtranslation.InlinerBacktranslator [?] -1 #NULL := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0] [?] -1 #valid[0] := 0; VAL [#NULL!base=0, #NULL!offset=0] [L672] -1 ~__unbuffered_cnt~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0] [L674] -1 ~__unbuffered_p0_EAX~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0] [L676] -1 ~__unbuffered_p0_EBX~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0] [L678] -1 ~__unbuffered_p1_EAX~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0] [L680] -1 ~__unbuffered_p1_EBX~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0] [L681] -1 ~main$tmp_guard0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0] [L682] -1 ~main$tmp_guard1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [L684] -1 ~x~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [L686] -1 ~y~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0] [L687] -1 ~y$flush_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y~0=0] [L688] -1 ~y$mem_tmp~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y~0=0] [L689] -1 ~y$r_buff0_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y~0=0] [L690] -1 ~y$r_buff0_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y~0=0] [L691] -1 ~y$r_buff0_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y~0=0] [L692] -1 ~y$r_buff1_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y~0=0] [L693] -1 ~y$r_buff1_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y~0=0] [L694] -1 ~y$r_buff1_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y~0=0] [L695] -1 ~y$read_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed~0=0, ~y~0=0] [L696] -1 ~y$read_delayed_var~0 := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y~0=0] [L697] -1 ~y$w_buff0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0~0=0, ~y~0=0] [L698] -1 ~y$w_buff0_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y~0=0] [L699] -1 ~y$w_buff1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1~0=0, ~y~0=0] [L700] -1 ~y$w_buff1_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L701] -1 ~weak$$choice0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L702] -1 ~weak$$choice2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 havoc main_#res; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 havoc main_#t~nondet57, main_#t~nondet58, main_#t~ite60, main_#t~ite59, main_#t~ite61, main_#t~ite62, main_#t~ite63, main_#t~ite64, main_~#t1729~0, main_~#t1730~0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L789] FCALL -1 call main_~#t1729~0 := #Ultimate.alloc(4); VAL [#NULL!base=0, #NULL!offset=0, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L790] FCALL -1 call write~int(0, main_~#t1729~0, 4); VAL [#NULL!base=0, #NULL!offset=0, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L790] FORK -1 fork 0 P0({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L790] -1 havoc main_#t~nondet57; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L791] FCALL -1 call main_~#t1730~0 := #Ultimate.alloc(4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L792] FCALL -1 call write~int(1, main_~#t1730~0, 4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L792] FORK -1 fork 1 P1({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L734-L777] 0 ~arg := #in~arg; [L737] 0 ~y$w_buff1~0 := ~y$w_buff0~0; [L738] 0 ~y$w_buff0~0 := 1; [L739] 0 ~y$w_buff1_used~0 := ~y$w_buff0_used~0; [L740] 0 ~y$w_buff0_used~0 := 1; [L741] 0 __VERIFIER_assert_#in~expression := (if !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$w_buff0_used~0 % 256) then 1 else 0); [L741] 0 havoc __VERIFIER_assert_~expression; [L5] 0 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L5] COND FALSE 0 !(0 == __VERIFIER_assert_~expression) VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L742] 0 ~y$r_buff1_thd0~0 := ~y$r_buff0_thd0~0; [L743] 0 ~y$r_buff1_thd1~0 := ~y$r_buff0_thd1~0; [L744] 0 ~y$r_buff1_thd2~0 := ~y$r_buff0_thd2~0; [L745] 0 ~y$r_buff0_thd2~0 := 1; [L748] 0 ~weak$$choice0~0 := #t~nondet27; [L748] 0 havoc #t~nondet27; [L749] 0 ~weak$$choice2~0 := #t~nondet28; [L749] 0 havoc #t~nondet28; [L750] 0 ~y$flush_delayed~0 := ~weak$$choice2~0; [L751] 0 ~y$mem_tmp~0 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L752] COND FALSE 0 !((0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd2~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd2~0 % 256 && 0 == ~y$r_buff1_thd2~0 % 256)) VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L752] COND TRUE 0 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256 [L752] 0 #t~ite29 := ~y$w_buff0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite29=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L752] 0 #t~ite30 := #t~ite29; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite29=1, #t~ite30=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L752] 0 ~y~0 := #t~ite30; [L752] 0 havoc #t~ite29; [L752] 0 havoc #t~ite30; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L753] COND TRUE 0 0 != ~weak$$choice2~0 % 256 [L753] 0 #t~ite33 := ~y$w_buff0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite33=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L753] 0 ~y$w_buff0~0 := #t~ite33; [L753] 0 havoc #t~ite33; [L753] 0 havoc #t~ite32; [L753] 0 havoc #t~ite31; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L754] COND TRUE 0 0 != ~weak$$choice2~0 % 256 [L754] 0 #t~ite36 := ~y$w_buff1~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite36=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L754] 0 ~y$w_buff1~0 := #t~ite36; [L754] 0 havoc #t~ite36; [L754] 0 havoc #t~ite35; [L754] 0 havoc #t~ite34; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L755] COND TRUE 0 0 != ~weak$$choice2~0 % 256 [L755] 0 #t~ite39 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite39=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L755] 0 ~y$w_buff0_used~0 := #t~ite39; [L755] 0 havoc #t~ite38; [L755] 0 havoc #t~ite37; [L755] 0 havoc #t~ite39; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L756] COND TRUE 0 0 != ~weak$$choice2~0 % 256 [L756] 0 #t~ite42 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite42=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L756] 0 ~y$w_buff1_used~0 := #t~ite42; [L756] 0 havoc #t~ite42; [L756] 0 havoc #t~ite41; [L756] 0 havoc #t~ite40; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L757] COND TRUE 0 0 != ~weak$$choice2~0 % 256 [L757] 0 #t~ite45 := ~y$r_buff0_thd2~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite45=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L757] 0 ~y$r_buff0_thd2~0 := #t~ite45; [L757] 0 havoc #t~ite45; [L757] 0 havoc #t~ite44; [L757] 0 havoc #t~ite43; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L758] COND TRUE 0 0 != ~weak$$choice2~0 % 256 [L758] 0 #t~ite48 := ~y$r_buff1_thd2~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite48=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L758] 0 ~y$r_buff1_thd2~0 := #t~ite48; [L758] 0 havoc #t~ite48; [L758] 0 havoc #t~ite46; [L758] 0 havoc #t~ite47; [L759] 0 ~__unbuffered_p1_EAX~0 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L760] COND TRUE 0 0 != ~y$flush_delayed~0 % 256 [L760] 0 #t~ite49 := ~y$mem_tmp~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite49=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L760] 0 ~y~0 := #t~ite49; [L760] 0 havoc #t~ite49; [L761] 0 ~y$flush_delayed~0 := 0; [L764] 0 ~__unbuffered_p1_EBX~0 := ~x~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L767] COND TRUE 0 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256 [L767] 0 #t~ite51 := ~y$w_buff0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite51=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L703-L733] 1 ~arg := #in~arg; [L706] 1 ~x~0 := 1; [L709] 1 ~__unbuffered_p0_EAX~0 := ~x~0; [L712] 1 ~weak$$choice0~0 := #t~nondet3; [L712] 1 havoc #t~nondet3; [L713] 1 ~weak$$choice2~0 := #t~nondet4; [L713] 1 havoc #t~nondet4; [L714] 1 ~y$flush_delayed~0 := ~weak$$choice2~0; [L715] 1 ~y$mem_tmp~0 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite51=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L716] COND TRUE 1 (0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd1~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd1~0 % 256 && 0 == ~y$r_buff1_thd1~0 % 256) [L716] 1 #t~ite6 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite51=1, #t~ite6=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L767] 0 ~y~0 := #t~ite51; [L767] 0 havoc #t~ite51; [L767] 0 havoc #t~ite50; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite6=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L768] COND TRUE 0 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256 [L768] 0 #t~ite52 := 0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite52=0, #t~ite6=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L768] 0 ~y$w_buff0_used~0 := #t~ite52; [L768] 0 havoc #t~ite52; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite6=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L769] COND FALSE 0 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)) [L769] 0 #t~ite53 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite53=0, #t~ite6=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L716] 1 ~y~0 := #t~ite6; [L716] 1 havoc #t~ite6; [L716] 1 havoc #t~ite5; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite53=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L717] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L717] 1 #t~ite9 := ~y$w_buff0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite53=0, #t~ite9=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L717] 1 ~y$w_buff0~0 := #t~ite9; [L717] 1 havoc #t~ite7; [L717] 1 havoc #t~ite9; [L717] 1 havoc #t~ite8; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite53=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L718] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L718] 1 #t~ite12 := ~y$w_buff1~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite12=0, #t~ite53=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L718] 1 ~y$w_buff1~0 := #t~ite12; [L718] 1 havoc #t~ite12; [L718] 1 havoc #t~ite10; [L718] 1 havoc #t~ite11; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite53=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L719] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L719] 1 #t~ite15 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite15=0, #t~ite53=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L719] 1 ~y$w_buff0_used~0 := #t~ite15; [L719] 1 havoc #t~ite14; [L719] 1 havoc #t~ite13; [L719] 1 havoc #t~ite15; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite53=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L720] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L720] 1 #t~ite18 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite18=0, #t~ite53=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L769] 0 ~y$w_buff1_used~0 := #t~ite53; [L769] 0 havoc #t~ite53; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite18=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L770] COND FALSE 0 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) [L770] 0 #t~ite54 := ~y$r_buff0_thd2~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite18=0, #t~ite54=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L770] 0 ~y$r_buff0_thd2~0 := #t~ite54; [L770] 0 havoc #t~ite54; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite18=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L771] COND FALSE 0 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)) [L771] 0 #t~ite55 := ~y$r_buff1_thd2~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite18=0, #t~ite55=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L771] 0 ~y$r_buff1_thd2~0 := #t~ite55; [L771] 0 havoc #t~ite55; [L774] 0 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite18=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L720] 1 ~y$w_buff1_used~0 := #t~ite18; [L720] 1 havoc #t~ite18; [L720] 1 havoc #t~ite17; [L720] 1 havoc #t~ite16; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L721] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L721] 1 #t~ite21 := ~y$r_buff0_thd1~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite21=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L721] 1 ~y$r_buff0_thd1~0 := #t~ite21; [L721] 1 havoc #t~ite21; [L721] 1 havoc #t~ite20; [L721] 1 havoc #t~ite19; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L722] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L722] 1 #t~ite24 := ~y$r_buff1_thd1~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite24=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L722] 1 ~y$r_buff1_thd1~0 := #t~ite24; [L722] 1 havoc #t~ite24; [L722] 1 havoc #t~ite22; [L722] 1 havoc #t~ite23; [L723] 1 ~__unbuffered_p0_EBX~0 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L724] COND TRUE 1 0 != ~y$flush_delayed~0 % 256 [L724] 1 #t~ite25 := ~y$mem_tmp~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite25=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L724] 1 ~y~0 := #t~ite25; [L724] 1 havoc #t~ite25; [L725] 1 ~y$flush_delayed~0 := 0; [L730] 1 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L792] -1 havoc main_#t~nondet58; [L794] -1 ~main$tmp_guard0~0 := (if 0 == (if 2 == ~__unbuffered_cnt~0 then 1 else 0) then 0 else 1); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L796] -1 assume 0 != ~main$tmp_guard0~0 % 256; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L798] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L798] COND FALSE -1 !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256) [L798] -1 main_#t~ite59 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite59=0, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L798] -1 main_#t~ite60 := main_#t~ite59; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite59=0, main_#t~ite60=0, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L798] -1 ~y~0 := main_#t~ite60; [L798] -1 havoc main_#t~ite60; [L798] -1 havoc main_#t~ite59; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L799] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) [L799] -1 main_#t~ite61 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite61=0, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L799] -1 ~y$w_buff0_used~0 := main_#t~ite61; [L799] -1 havoc main_#t~ite61; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L800] COND FALSE -1 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)) [L800] -1 main_#t~ite62 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite62=0, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L800] -1 ~y$w_buff1_used~0 := main_#t~ite62; [L800] -1 havoc main_#t~ite62; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L801] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) [L801] -1 main_#t~ite63 := ~y$r_buff0_thd0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite63=0, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L801] -1 ~y$r_buff0_thd0~0 := main_#t~ite63; [L801] -1 havoc main_#t~ite63; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L802] COND FALSE -1 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)) [L802] -1 main_#t~ite64 := ~y$r_buff1_thd0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite64=0, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L802] -1 ~y$r_buff1_thd0~0 := main_#t~ite64; [L802] -1 havoc main_#t~ite64; [L805] -1 ~main$tmp_guard1~0 := (if 0 == (if !(((1 == ~__unbuffered_p0_EAX~0 && 0 == ~__unbuffered_p0_EBX~0) && 1 == ~__unbuffered_p1_EAX~0) && 0 == ~__unbuffered_p1_EBX~0) then 1 else 0) then 0 else 1); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L807] -1 __VERIFIER_assert_#in~expression := ~main$tmp_guard1~0 % 256; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L807] -1 havoc __VERIFIER_assert_~expression; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L5] -1 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, __VERIFIER_assert_~expression=0, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L5] COND TRUE -1 0 == __VERIFIER_assert_~expression VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, __VERIFIER_assert_~expression=0, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L5] -1 assert false; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, __VERIFIER_assert_~expression=0, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 #NULL := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0] [?] -1 #valid[0] := 0; VAL [#NULL!base=0, #NULL!offset=0] [L672] -1 ~__unbuffered_cnt~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0] [L674] -1 ~__unbuffered_p0_EAX~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0] [L676] -1 ~__unbuffered_p0_EBX~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0] [L678] -1 ~__unbuffered_p1_EAX~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0] [L680] -1 ~__unbuffered_p1_EBX~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0] [L681] -1 ~main$tmp_guard0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0] [L682] -1 ~main$tmp_guard1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [L684] -1 ~x~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [L686] -1 ~y~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0] [L687] -1 ~y$flush_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y~0=0] [L688] -1 ~y$mem_tmp~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y~0=0] [L689] -1 ~y$r_buff0_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y~0=0] [L690] -1 ~y$r_buff0_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y~0=0] [L691] -1 ~y$r_buff0_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y~0=0] [L692] -1 ~y$r_buff1_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y~0=0] [L693] -1 ~y$r_buff1_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y~0=0] [L694] -1 ~y$r_buff1_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y~0=0] [L695] -1 ~y$read_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed~0=0, ~y~0=0] [L696] -1 ~y$read_delayed_var~0 := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y~0=0] [L697] -1 ~y$w_buff0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0~0=0, ~y~0=0] [L698] -1 ~y$w_buff0_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y~0=0] [L699] -1 ~y$w_buff1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1~0=0, ~y~0=0] [L700] -1 ~y$w_buff1_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L701] -1 ~weak$$choice0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L702] -1 ~weak$$choice2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L789] FCALL -1 call ~#t1729~0 := #Ultimate.alloc(4); VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L790] FCALL -1 call write~int(0, ~#t1729~0, 4); VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L790] FORK -1 fork 0 P0({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L790] -1 havoc #t~nondet57; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L791] FCALL -1 call ~#t1730~0 := #Ultimate.alloc(4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L792] FCALL -1 call write~int(1, ~#t1730~0, 4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L792] FORK -1 fork 1 P1({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L734-L777] 0 ~arg := #in~arg; [L737] 0 ~y$w_buff1~0 := ~y$w_buff0~0; [L738] 0 ~y$w_buff0~0 := 1; [L739] 0 ~y$w_buff1_used~0 := ~y$w_buff0_used~0; [L740] 0 ~y$w_buff0_used~0 := 1; [L5] 0 ~expression := #in~expression; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L5] COND FALSE 0 !(0 == ~expression) VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L742] 0 ~y$r_buff1_thd0~0 := ~y$r_buff0_thd0~0; [L743] 0 ~y$r_buff1_thd1~0 := ~y$r_buff0_thd1~0; [L744] 0 ~y$r_buff1_thd2~0 := ~y$r_buff0_thd2~0; [L745] 0 ~y$r_buff0_thd2~0 := 1; [L748] 0 ~weak$$choice0~0 := #t~nondet27; [L748] 0 havoc #t~nondet27; [L749] 0 ~weak$$choice2~0 := #t~nondet28; [L749] 0 havoc #t~nondet28; [L750] 0 ~y$flush_delayed~0 := ~weak$$choice2~0; [L751] 0 ~y$mem_tmp~0 := ~y~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L752] COND FALSE 0 !((0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd2~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd2~0 % 256 && 0 == ~y$r_buff1_thd2~0 % 256)) VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L752] COND TRUE 0 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256 [L752] 0 #t~ite29 := ~y$w_buff0~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L752] 0 #t~ite30 := #t~ite29; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L752] 0 ~y~0 := #t~ite30; [L752] 0 havoc #t~ite29; [L752] 0 havoc #t~ite30; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L753] COND TRUE 0 0 != ~weak$$choice2~0 % 256 [L753] 0 #t~ite33 := ~y$w_buff0~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L753] 0 ~y$w_buff0~0 := #t~ite33; [L753] 0 havoc #t~ite33; [L753] 0 havoc #t~ite32; [L753] 0 havoc #t~ite31; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L754] COND TRUE 0 0 != ~weak$$choice2~0 % 256 [L754] 0 #t~ite36 := ~y$w_buff1~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L754] 0 ~y$w_buff1~0 := #t~ite36; [L754] 0 havoc #t~ite36; [L754] 0 havoc #t~ite35; [L754] 0 havoc #t~ite34; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L755] COND TRUE 0 0 != ~weak$$choice2~0 % 256 [L755] 0 #t~ite39 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L755] 0 ~y$w_buff0_used~0 := #t~ite39; [L755] 0 havoc #t~ite38; [L755] 0 havoc #t~ite37; [L755] 0 havoc #t~ite39; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L756] COND TRUE 0 0 != ~weak$$choice2~0 % 256 [L756] 0 #t~ite42 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L756] 0 ~y$w_buff1_used~0 := #t~ite42; [L756] 0 havoc #t~ite42; [L756] 0 havoc #t~ite41; [L756] 0 havoc #t~ite40; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L757] COND TRUE 0 0 != ~weak$$choice2~0 % 256 [L757] 0 #t~ite45 := ~y$r_buff0_thd2~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L757] 0 ~y$r_buff0_thd2~0 := #t~ite45; [L757] 0 havoc #t~ite45; [L757] 0 havoc #t~ite44; [L757] 0 havoc #t~ite43; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L758] COND TRUE 0 0 != ~weak$$choice2~0 % 256 [L758] 0 #t~ite48 := ~y$r_buff1_thd2~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L758] 0 ~y$r_buff1_thd2~0 := #t~ite48; [L758] 0 havoc #t~ite48; [L758] 0 havoc #t~ite46; [L758] 0 havoc #t~ite47; [L759] 0 ~__unbuffered_p1_EAX~0 := ~y~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L760] COND TRUE 0 0 != ~y$flush_delayed~0 % 256 [L760] 0 #t~ite49 := ~y$mem_tmp~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L760] 0 ~y~0 := #t~ite49; [L760] 0 havoc #t~ite49; [L761] 0 ~y$flush_delayed~0 := 0; [L764] 0 ~__unbuffered_p1_EBX~0 := ~x~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L767] COND TRUE 0 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256 [L767] 0 #t~ite51 := ~y$w_buff0~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L703-L733] 1 ~arg := #in~arg; [L706] 1 ~x~0 := 1; [L709] 1 ~__unbuffered_p0_EAX~0 := ~x~0; [L712] 1 ~weak$$choice0~0 := #t~nondet3; [L712] 1 havoc #t~nondet3; [L713] 1 ~weak$$choice2~0 := #t~nondet4; [L713] 1 havoc #t~nondet4; [L714] 1 ~y$flush_delayed~0 := ~weak$$choice2~0; [L715] 1 ~y$mem_tmp~0 := ~y~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L716] COND TRUE 1 (0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd1~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd1~0 % 256 && 0 == ~y$r_buff1_thd1~0 % 256) [L716] 1 #t~ite6 := ~y~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite6=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L767] 0 ~y~0 := #t~ite51; [L767] 0 havoc #t~ite51; [L767] 0 havoc #t~ite50; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite6=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L768] COND TRUE 0 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256 [L768] 0 #t~ite52 := 0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite6=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L768] 0 ~y$w_buff0_used~0 := #t~ite52; [L768] 0 havoc #t~ite52; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite6=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L769] COND FALSE 0 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)) [L769] 0 #t~ite53 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite6=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L716] 1 ~y~0 := #t~ite6; [L716] 1 havoc #t~ite6; [L716] 1 havoc #t~ite5; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L717] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L717] 1 #t~ite9 := ~y$w_buff0~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite9=1, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L717] 1 ~y$w_buff0~0 := #t~ite9; [L717] 1 havoc #t~ite7; [L717] 1 havoc #t~ite9; [L717] 1 havoc #t~ite8; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L718] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L718] 1 #t~ite12 := ~y$w_buff1~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite12=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L718] 1 ~y$w_buff1~0 := #t~ite12; [L718] 1 havoc #t~ite12; [L718] 1 havoc #t~ite10; [L718] 1 havoc #t~ite11; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L719] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L719] 1 #t~ite15 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite15=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L719] 1 ~y$w_buff0_used~0 := #t~ite15; [L719] 1 havoc #t~ite14; [L719] 1 havoc #t~ite13; [L719] 1 havoc #t~ite15; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L720] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L720] 1 #t~ite18 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite18=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L769] 0 ~y$w_buff1_used~0 := #t~ite53; [L769] 0 havoc #t~ite53; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite18=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L770] COND FALSE 0 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) [L770] 0 #t~ite54 := ~y$r_buff0_thd2~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite18=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L770] 0 ~y$r_buff0_thd2~0 := #t~ite54; [L770] 0 havoc #t~ite54; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite18=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L771] COND FALSE 0 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)) [L771] 0 #t~ite55 := ~y$r_buff1_thd2~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite18=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L771] 0 ~y$r_buff1_thd2~0 := #t~ite55; [L771] 0 havoc #t~ite55; [L774] 0 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite18=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L720] 1 ~y$w_buff1_used~0 := #t~ite18; [L720] 1 havoc #t~ite18; [L720] 1 havoc #t~ite17; [L720] 1 havoc #t~ite16; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L721] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L721] 1 #t~ite21 := ~y$r_buff0_thd1~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite21=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L721] 1 ~y$r_buff0_thd1~0 := #t~ite21; [L721] 1 havoc #t~ite21; [L721] 1 havoc #t~ite20; [L721] 1 havoc #t~ite19; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L722] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L722] 1 #t~ite24 := ~y$r_buff1_thd1~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite24=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L722] 1 ~y$r_buff1_thd1~0 := #t~ite24; [L722] 1 havoc #t~ite24; [L722] 1 havoc #t~ite22; [L722] 1 havoc #t~ite23; [L723] 1 ~__unbuffered_p0_EBX~0 := ~y~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L724] COND TRUE 1 0 != ~y$flush_delayed~0 % 256 [L724] 1 #t~ite25 := ~y$mem_tmp~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite25=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L724] 1 ~y~0 := #t~ite25; [L724] 1 havoc #t~ite25; [L725] 1 ~y$flush_delayed~0 := 0; [L730] 1 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L792] -1 havoc #t~nondet58; [L794] -1 ~main$tmp_guard0~0 := (if 0 == (if 2 == ~__unbuffered_cnt~0 then 1 else 0) then 0 else 1); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L796] -1 assume 0 != ~main$tmp_guard0~0 % 256; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L798] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L798] COND FALSE -1 !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256) [L798] -1 #t~ite59 := ~y~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L798] -1 #t~ite60 := #t~ite59; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L798] -1 ~y~0 := #t~ite60; [L798] -1 havoc #t~ite60; [L798] -1 havoc #t~ite59; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L799] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) [L799] -1 #t~ite61 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L799] -1 ~y$w_buff0_used~0 := #t~ite61; [L799] -1 havoc #t~ite61; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L800] COND FALSE -1 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)) [L800] -1 #t~ite62 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L800] -1 ~y$w_buff1_used~0 := #t~ite62; [L800] -1 havoc #t~ite62; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L801] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) [L801] -1 #t~ite63 := ~y$r_buff0_thd0~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L801] -1 ~y$r_buff0_thd0~0 := #t~ite63; [L801] -1 havoc #t~ite63; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L802] COND FALSE -1 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)) [L802] -1 #t~ite64 := ~y$r_buff1_thd0~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L802] -1 ~y$r_buff1_thd0~0 := #t~ite64; [L802] -1 havoc #t~ite64; [L805] -1 ~main$tmp_guard1~0 := (if 0 == (if !(((1 == ~__unbuffered_p0_EAX~0 && 0 == ~__unbuffered_p0_EBX~0) && 1 == ~__unbuffered_p1_EAX~0) && 0 == ~__unbuffered_p1_EBX~0) then 1 else 0) then 0 else 1); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L5] -1 ~expression := #in~expression; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L5] COND TRUE -1 0 == ~expression VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L5] -1 assert false; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] ----- ----- class de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.CACSL2BoogieBacktranslator [?] -1 #NULL := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0] [?] -1 #valid[0] := 0; VAL [#NULL!base=0, #NULL!offset=0] [L672] -1 ~__unbuffered_cnt~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0] [L674] -1 ~__unbuffered_p0_EAX~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0] [L676] -1 ~__unbuffered_p0_EBX~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0] [L678] -1 ~__unbuffered_p1_EAX~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0] [L680] -1 ~__unbuffered_p1_EBX~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0] [L681] -1 ~main$tmp_guard0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0] [L682] -1 ~main$tmp_guard1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [L684] -1 ~x~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [L686] -1 ~y~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0] [L687] -1 ~y$flush_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y~0=0] [L688] -1 ~y$mem_tmp~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y~0=0] [L689] -1 ~y$r_buff0_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y~0=0] [L690] -1 ~y$r_buff0_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y~0=0] [L691] -1 ~y$r_buff0_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y~0=0] [L692] -1 ~y$r_buff1_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y~0=0] [L693] -1 ~y$r_buff1_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y~0=0] [L694] -1 ~y$r_buff1_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y~0=0] [L695] -1 ~y$read_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed~0=0, ~y~0=0] [L696] -1 ~y$read_delayed_var~0 := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y~0=0] [L697] -1 ~y$w_buff0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0~0=0, ~y~0=0] [L698] -1 ~y$w_buff0_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y~0=0] [L699] -1 ~y$w_buff1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1~0=0, ~y~0=0] [L700] -1 ~y$w_buff1_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L701] -1 ~weak$$choice0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L702] -1 ~weak$$choice2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L789] FCALL -1 call ~#t1729~0 := #Ultimate.alloc(4); VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L790] FCALL -1 call write~int(0, ~#t1729~0, 4); VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L790] FORK -1 fork 0 P0({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L790] -1 havoc #t~nondet57; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L791] FCALL -1 call ~#t1730~0 := #Ultimate.alloc(4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L792] FCALL -1 call write~int(1, ~#t1730~0, 4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L792] FORK -1 fork 1 P1({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L734-L777] 0 ~arg := #in~arg; [L737] 0 ~y$w_buff1~0 := ~y$w_buff0~0; [L738] 0 ~y$w_buff0~0 := 1; [L739] 0 ~y$w_buff1_used~0 := ~y$w_buff0_used~0; [L740] 0 ~y$w_buff0_used~0 := 1; [L5] 0 ~expression := #in~expression; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L5] COND FALSE 0 !(0 == ~expression) VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L742] 0 ~y$r_buff1_thd0~0 := ~y$r_buff0_thd0~0; [L743] 0 ~y$r_buff1_thd1~0 := ~y$r_buff0_thd1~0; [L744] 0 ~y$r_buff1_thd2~0 := ~y$r_buff0_thd2~0; [L745] 0 ~y$r_buff0_thd2~0 := 1; [L748] 0 ~weak$$choice0~0 := #t~nondet27; [L748] 0 havoc #t~nondet27; [L749] 0 ~weak$$choice2~0 := #t~nondet28; [L749] 0 havoc #t~nondet28; [L750] 0 ~y$flush_delayed~0 := ~weak$$choice2~0; [L751] 0 ~y$mem_tmp~0 := ~y~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L752] COND FALSE 0 !((0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd2~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd2~0 % 256 && 0 == ~y$r_buff1_thd2~0 % 256)) VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L752] COND TRUE 0 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256 [L752] 0 #t~ite29 := ~y$w_buff0~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L752] 0 #t~ite30 := #t~ite29; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L752] 0 ~y~0 := #t~ite30; [L752] 0 havoc #t~ite29; [L752] 0 havoc #t~ite30; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L753] COND TRUE 0 0 != ~weak$$choice2~0 % 256 [L753] 0 #t~ite33 := ~y$w_buff0~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L753] 0 ~y$w_buff0~0 := #t~ite33; [L753] 0 havoc #t~ite33; [L753] 0 havoc #t~ite32; [L753] 0 havoc #t~ite31; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L754] COND TRUE 0 0 != ~weak$$choice2~0 % 256 [L754] 0 #t~ite36 := ~y$w_buff1~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L754] 0 ~y$w_buff1~0 := #t~ite36; [L754] 0 havoc #t~ite36; [L754] 0 havoc #t~ite35; [L754] 0 havoc #t~ite34; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L755] COND TRUE 0 0 != ~weak$$choice2~0 % 256 [L755] 0 #t~ite39 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L755] 0 ~y$w_buff0_used~0 := #t~ite39; [L755] 0 havoc #t~ite38; [L755] 0 havoc #t~ite37; [L755] 0 havoc #t~ite39; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L756] COND TRUE 0 0 != ~weak$$choice2~0 % 256 [L756] 0 #t~ite42 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L756] 0 ~y$w_buff1_used~0 := #t~ite42; [L756] 0 havoc #t~ite42; [L756] 0 havoc #t~ite41; [L756] 0 havoc #t~ite40; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L757] COND TRUE 0 0 != ~weak$$choice2~0 % 256 [L757] 0 #t~ite45 := ~y$r_buff0_thd2~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L757] 0 ~y$r_buff0_thd2~0 := #t~ite45; [L757] 0 havoc #t~ite45; [L757] 0 havoc #t~ite44; [L757] 0 havoc #t~ite43; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L758] COND TRUE 0 0 != ~weak$$choice2~0 % 256 [L758] 0 #t~ite48 := ~y$r_buff1_thd2~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L758] 0 ~y$r_buff1_thd2~0 := #t~ite48; [L758] 0 havoc #t~ite48; [L758] 0 havoc #t~ite46; [L758] 0 havoc #t~ite47; [L759] 0 ~__unbuffered_p1_EAX~0 := ~y~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L760] COND TRUE 0 0 != ~y$flush_delayed~0 % 256 [L760] 0 #t~ite49 := ~y$mem_tmp~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L760] 0 ~y~0 := #t~ite49; [L760] 0 havoc #t~ite49; [L761] 0 ~y$flush_delayed~0 := 0; [L764] 0 ~__unbuffered_p1_EBX~0 := ~x~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L767] COND TRUE 0 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256 [L767] 0 #t~ite51 := ~y$w_buff0~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L703-L733] 1 ~arg := #in~arg; [L706] 1 ~x~0 := 1; [L709] 1 ~__unbuffered_p0_EAX~0 := ~x~0; [L712] 1 ~weak$$choice0~0 := #t~nondet3; [L712] 1 havoc #t~nondet3; [L713] 1 ~weak$$choice2~0 := #t~nondet4; [L713] 1 havoc #t~nondet4; [L714] 1 ~y$flush_delayed~0 := ~weak$$choice2~0; [L715] 1 ~y$mem_tmp~0 := ~y~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L716] COND TRUE 1 (0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd1~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd1~0 % 256 && 0 == ~y$r_buff1_thd1~0 % 256) [L716] 1 #t~ite6 := ~y~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite6=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L767] 0 ~y~0 := #t~ite51; [L767] 0 havoc #t~ite51; [L767] 0 havoc #t~ite50; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite6=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L768] COND TRUE 0 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256 [L768] 0 #t~ite52 := 0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite6=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L768] 0 ~y$w_buff0_used~0 := #t~ite52; [L768] 0 havoc #t~ite52; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite6=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L769] COND FALSE 0 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)) [L769] 0 #t~ite53 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite6=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L716] 1 ~y~0 := #t~ite6; [L716] 1 havoc #t~ite6; [L716] 1 havoc #t~ite5; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L717] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L717] 1 #t~ite9 := ~y$w_buff0~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite9=1, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L717] 1 ~y$w_buff0~0 := #t~ite9; [L717] 1 havoc #t~ite7; [L717] 1 havoc #t~ite9; [L717] 1 havoc #t~ite8; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L718] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L718] 1 #t~ite12 := ~y$w_buff1~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite12=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L718] 1 ~y$w_buff1~0 := #t~ite12; [L718] 1 havoc #t~ite12; [L718] 1 havoc #t~ite10; [L718] 1 havoc #t~ite11; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L719] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L719] 1 #t~ite15 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite15=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L719] 1 ~y$w_buff0_used~0 := #t~ite15; [L719] 1 havoc #t~ite14; [L719] 1 havoc #t~ite13; [L719] 1 havoc #t~ite15; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L720] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L720] 1 #t~ite18 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite18=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L769] 0 ~y$w_buff1_used~0 := #t~ite53; [L769] 0 havoc #t~ite53; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite18=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L770] COND FALSE 0 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) [L770] 0 #t~ite54 := ~y$r_buff0_thd2~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite18=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L770] 0 ~y$r_buff0_thd2~0 := #t~ite54; [L770] 0 havoc #t~ite54; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite18=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L771] COND FALSE 0 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)) [L771] 0 #t~ite55 := ~y$r_buff1_thd2~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite18=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L771] 0 ~y$r_buff1_thd2~0 := #t~ite55; [L771] 0 havoc #t~ite55; [L774] 0 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite18=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L720] 1 ~y$w_buff1_used~0 := #t~ite18; [L720] 1 havoc #t~ite18; [L720] 1 havoc #t~ite17; [L720] 1 havoc #t~ite16; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L721] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L721] 1 #t~ite21 := ~y$r_buff0_thd1~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite21=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L721] 1 ~y$r_buff0_thd1~0 := #t~ite21; [L721] 1 havoc #t~ite21; [L721] 1 havoc #t~ite20; [L721] 1 havoc #t~ite19; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L722] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L722] 1 #t~ite24 := ~y$r_buff1_thd1~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite24=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L722] 1 ~y$r_buff1_thd1~0 := #t~ite24; [L722] 1 havoc #t~ite24; [L722] 1 havoc #t~ite22; [L722] 1 havoc #t~ite23; [L723] 1 ~__unbuffered_p0_EBX~0 := ~y~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L724] COND TRUE 1 0 != ~y$flush_delayed~0 % 256 [L724] 1 #t~ite25 := ~y$mem_tmp~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite25=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L724] 1 ~y~0 := #t~ite25; [L724] 1 havoc #t~ite25; [L725] 1 ~y$flush_delayed~0 := 0; [L730] 1 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L792] -1 havoc #t~nondet58; [L794] -1 ~main$tmp_guard0~0 := (if 0 == (if 2 == ~__unbuffered_cnt~0 then 1 else 0) then 0 else 1); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L796] -1 assume 0 != ~main$tmp_guard0~0 % 256; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L798] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L798] COND FALSE -1 !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256) [L798] -1 #t~ite59 := ~y~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L798] -1 #t~ite60 := #t~ite59; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L798] -1 ~y~0 := #t~ite60; [L798] -1 havoc #t~ite60; [L798] -1 havoc #t~ite59; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L799] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) [L799] -1 #t~ite61 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L799] -1 ~y$w_buff0_used~0 := #t~ite61; [L799] -1 havoc #t~ite61; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L800] COND FALSE -1 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)) [L800] -1 #t~ite62 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L800] -1 ~y$w_buff1_used~0 := #t~ite62; [L800] -1 havoc #t~ite62; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L801] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) [L801] -1 #t~ite63 := ~y$r_buff0_thd0~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L801] -1 ~y$r_buff0_thd0~0 := #t~ite63; [L801] -1 havoc #t~ite63; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L802] COND FALSE -1 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)) [L802] -1 #t~ite64 := ~y$r_buff1_thd0~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L802] -1 ~y$r_buff1_thd0~0 := #t~ite64; [L802] -1 havoc #t~ite64; [L805] -1 ~main$tmp_guard1~0 := (if 0 == (if !(((1 == ~__unbuffered_p0_EAX~0 && 0 == ~__unbuffered_p0_EBX~0) && 1 == ~__unbuffered_p1_EAX~0) && 0 == ~__unbuffered_p1_EBX~0) then 1 else 0) then 0 else 1); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L5] -1 ~expression := #in~expression; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L5] COND TRUE -1 0 == ~expression VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L5] -1 assert false; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L672] -1 int __unbuffered_cnt = 0; VAL [__unbuffered_cnt=0] [L674] -1 int __unbuffered_p0_EAX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0] [L676] -1 int __unbuffered_p0_EBX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0] [L678] -1 int __unbuffered_p1_EAX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=0] [L680] -1 int __unbuffered_p1_EBX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0] [L681] -1 _Bool main$tmp_guard0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0] [L682] -1 _Bool main$tmp_guard1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0] [L684] -1 int x = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0] [L686] -1 int y = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0] [L687] -1 _Bool y$flush_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0] [L688] -1 int y$mem_tmp; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0] [L689] -1 _Bool y$r_buff0_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0] [L690] -1 _Bool y$r_buff0_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0] [L691] -1 _Bool y$r_buff0_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0] [L692] -1 _Bool y$r_buff1_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0] [L693] -1 _Bool y$r_buff1_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0] [L694] -1 _Bool y$r_buff1_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0] [L695] -1 _Bool y$read_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0] [L696] -1 int *y$read_delayed_var; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}] [L697] -1 int y$w_buff0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0] [L698] -1 _Bool y$w_buff0_used; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0] [L699] -1 int y$w_buff1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0] [L700] -1 _Bool y$w_buff1_used; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L701] -1 _Bool weak$$choice0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L702] -1 _Bool weak$$choice2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L789] -1 pthread_t t1729; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L790] FCALL, FORK -1 pthread_create(&t1729, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L791] -1 pthread_t t1730; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L792] FCALL, FORK -1 pthread_create(&t1730, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L737] 0 y$w_buff1 = y$w_buff0 [L738] 0 y$w_buff0 = 1 [L739] 0 y$w_buff1_used = y$w_buff0_used [L740] 0 y$w_buff0_used = (_Bool)1 [L5] COND FALSE 0 !(!expression) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L742] 0 y$r_buff1_thd0 = y$r_buff0_thd0 [L743] 0 y$r_buff1_thd1 = y$r_buff0_thd1 [L744] 0 y$r_buff1_thd2 = y$r_buff0_thd2 [L745] 0 y$r_buff0_thd2 = (_Bool)1 [L748] 0 weak$$choice0 = __VERIFIER_nondet_bool() [L749] 0 weak$$choice2 = __VERIFIER_nondet_bool() [L750] 0 y$flush_delayed = weak$$choice2 [L751] 0 y$mem_tmp = y VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, x=0, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L752] EXPR 0 !y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : y$w_buff1) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, x=0, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L752] EXPR 0 y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : y$w_buff1 VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, x=0, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L752] EXPR 0 !y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : y$w_buff1) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, x=0, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L752] 0 y = !y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : y$w_buff1) [L753] EXPR 0 weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : y$w_buff0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, x=0, y=1, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L753] 0 y$w_buff0 = weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : y$w_buff0)) [L754] EXPR 0 weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff1 : y$w_buff1)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, x=0, y=1, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L754] 0 y$w_buff1 = weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff1 : y$w_buff1)) [L755] EXPR 0 weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, x=0, y=1, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L755] 0 y$w_buff0_used = weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used)) [L756] EXPR 0 weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, x=0, y=1, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L756] 0 y$w_buff1_used = weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)) [L757] EXPR 0 weak$$choice2 ? y$r_buff0_thd2 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$r_buff0_thd2 : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, x=0, y=1, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L757] 0 y$r_buff0_thd2 = weak$$choice2 ? y$r_buff0_thd2 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$r_buff0_thd2 : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2)) [L758] EXPR 0 weak$$choice2 ? y$r_buff1_thd2 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$r_buff1_thd2 : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, x=0, y=1, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L758] 0 y$r_buff1_thd2 = weak$$choice2 ? y$r_buff1_thd2 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$r_buff1_thd2 : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)) [L759] 0 __unbuffered_p1_EAX = y VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, x=0, y=1, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L760] EXPR 0 y$flush_delayed ? y$mem_tmp : y VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, x=0, y=1, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L760] 0 y = y$flush_delayed ? y$mem_tmp : y [L761] 0 y$flush_delayed = (_Bool)0 [L764] 0 __unbuffered_p1_EBX = x VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L767] EXPR 0 y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L706] 1 x = 1 [L709] 1 __unbuffered_p0_EAX = x [L712] 1 weak$$choice0 = __VERIFIER_nondet_bool() [L713] 1 weak$$choice2 = __VERIFIER_nondet_bool() [L714] 1 y$flush_delayed = weak$$choice2 [L715] 1 y$mem_tmp = y VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L716] EXPR 1 !y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y : (y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : y$w_buff1) VAL [!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y : (y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : y$w_buff1)=0, __unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L767] 0 y = y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) [L768] EXPR 0 y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used VAL [!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y : (y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : y$w_buff1)=0, __unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=1, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L768] 0 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used [L769] EXPR 0 y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used VAL [!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y : (y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : y$w_buff1)=0, __unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=1, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L716] 1 y = !y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y : (y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : y$w_buff1) [L717] EXPR 1 weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : y$w_buff0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : y$w_buff0))=1, x=1, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L717] 1 y$w_buff0 = weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : y$w_buff0)) [L718] EXPR 1 weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff1 : y$w_buff1)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff1 : y$w_buff1))=0, x=1, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L718] 1 y$w_buff1 = weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff1 : y$w_buff1)) [L719] EXPR 1 weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$w_buff0_used)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$w_buff0_used))=0, x=1, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L719] 1 y$w_buff0_used = weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$w_buff0_used)) [L720] EXPR 1 weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : (_Bool)0))=0, x=1, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L769] 0 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used [L770] EXPR 0 y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2 VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : (_Bool)0))=0, x=1, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L770] 0 y$r_buff0_thd2 = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2 [L771] EXPR 0 y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$r_buff1_thd2 VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : (_Bool)0))=0, x=1, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L771] 0 y$r_buff1_thd2 = y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$r_buff1_thd2 [L774] 0 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : (_Bool)0))=0, x=1, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L720] 1 y$w_buff1_used = weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : (_Bool)0)) [L721] EXPR 1 weak$$choice2 ? y$r_buff0_thd1 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$r_buff0_thd1 : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$r_buff0_thd1)) VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, weak$$choice2 ? y$r_buff0_thd1 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$r_buff0_thd1 : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$r_buff0_thd1))=0, x=1, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L721] 1 y$r_buff0_thd1 = weak$$choice2 ? y$r_buff0_thd1 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$r_buff0_thd1 : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$r_buff0_thd1)) [L722] EXPR 1 weak$$choice2 ? y$r_buff1_thd1 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$r_buff1_thd1 : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, weak$$choice2 ? y$r_buff1_thd1 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$r_buff1_thd1 : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : (_Bool)0))=0, x=1, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L722] 1 y$r_buff1_thd1 = weak$$choice2 ? y$r_buff1_thd1 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$r_buff1_thd1 : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : (_Bool)0)) [L723] 1 __unbuffered_p0_EBX = y VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L724] EXPR 1 y$flush_delayed ? y$mem_tmp : y VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=0, y$flush_delayed=1, y$flush_delayed ? y$mem_tmp : y=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L724] 1 y = y$flush_delayed ? y$mem_tmp : y [L725] 1 y$flush_delayed = (_Bool)0 [L730] 1 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L794] -1 main$tmp_guard0 = __unbuffered_cnt == 2 VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L798] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L798] EXPR -1 y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L798] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L798] -1 y = y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) [L799] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L799] -1 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used [L800] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$w_buff1_used VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L800] -1 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$w_buff1_used [L801] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0 VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L801] -1 y$r_buff0_thd0 = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0 [L802] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$r_buff1_thd0 VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L802] -1 y$r_buff1_thd0 = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$r_buff1_thd0 [L805] -1 main$tmp_guard1 = !(__unbuffered_p0_EAX == 1 && __unbuffered_p0_EBX == 0 && __unbuffered_p1_EAX == 1 && __unbuffered_p1_EBX == 0) VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L5] COND TRUE -1 !expression VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L5] -1 __VERIFIER_error() VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] ----- [2018-11-22 22:18:36,861 INFO L305 ceAbstractionStarter]: Did not count any witness invariants because Icfg is not BoogieIcfg [2018-11-22 22:18:36,863 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 22.11 10:18:36 BasicIcfg [2018-11-22 22:18:36,863 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-11-22 22:18:36,863 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2018-11-22 22:18:36,863 INFO L271 PluginConnector]: Initializing Witness Printer... [2018-11-22 22:18:36,864 INFO L276 PluginConnector]: Witness Printer initialized [2018-11-22 22:18:36,864 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 22.11 10:17:34" (3/4) ... [2018-11-22 22:18:36,866 INFO L138 WitnessPrinter]: Generating witness for reachability counterexample ----- class de.uni_freiburg.informatik.ultimate.modelcheckerutils.cfg.transformations.BlockEncodingBacktranslator [?] -1 [612] ULTIMATE.startENTRY-->L-1: Formula: (and (= |v_#NULL.offset_1| 0) (= |v_#NULL.base_1| 0)) InVars {} OutVars{#NULL.offset=|v_#NULL.offset_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] VAL [|#NULL.base|=0, |#NULL.offset|=0] [?] -1 [473] L-1-->L672: Formula: (= |v_#valid_9| (store |v_#valid_10| 0 0)) InVars {#valid=|v_#valid_10|} OutVars{#valid=|v_#valid_9|} AuxVars[] AssignedVars[#valid] VAL [|#NULL.base|=0, |#NULL.offset|=0] [?] -1 [564] L672-->L674: Formula: (= v_~__unbuffered_cnt~0_6 0) InVars {} OutVars{~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_6} AuxVars[] AssignedVars[~__unbuffered_cnt~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0] [?] -1 [634] L674-->L676: Formula: (= v_~__unbuffered_p0_EAX~0_3 0) InVars {} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_3} AuxVars[] AssignedVars[~__unbuffered_p0_EAX~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0] [?] -1 [457] L676-->L678: Formula: (= v_~__unbuffered_p0_EBX~0_3 0) InVars {} OutVars{~__unbuffered_p0_EBX~0=v_~__unbuffered_p0_EBX~0_3} AuxVars[] AssignedVars[~__unbuffered_p0_EBX~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0] [?] -1 [535] L678-->L680: Formula: (= v_~__unbuffered_p1_EAX~0_3 0) InVars {} OutVars{~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_3} AuxVars[] AssignedVars[~__unbuffered_p1_EAX~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0] [?] -1 [577] L680-->L681: Formula: (= v_~__unbuffered_p1_EBX~0_3 0) InVars {} OutVars{~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_3} AuxVars[] AssignedVars[~__unbuffered_p1_EBX~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0] [?] -1 [495] L681-->L682: Formula: (= v_~main$tmp_guard0~0_3 0) InVars {} OutVars{~main$tmp_guard0~0=v_~main$tmp_guard0~0_3} AuxVars[] AssignedVars[~main$tmp_guard0~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0] [?] -1 [664] L682-->L684: Formula: (= v_~main$tmp_guard1~0_3 0) InVars {} OutVars{~main$tmp_guard1~0=v_~main$tmp_guard1~0_3} AuxVars[] AssignedVars[~main$tmp_guard1~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [?] -1 [487] L684-->L686: Formula: (= v_~x~0_3 0) InVars {} OutVars{~x~0=v_~x~0_3} AuxVars[] AssignedVars[~x~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [?] -1 [540] L686-->L687: Formula: (= v_~y~0_17 0) InVars {} OutVars{~y~0=v_~y~0_17} AuxVars[] AssignedVars[~y~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0] [?] -1 [482] L687-->L688: Formula: (= v_~y$flush_delayed~0_9 0) InVars {} OutVars{~y$flush_delayed~0=v_~y$flush_delayed~0_9} AuxVars[] AssignedVars[~y$flush_delayed~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y~0=0] [?] -1 [619] L688-->L689: Formula: (= v_~y$mem_tmp~0_5 0) InVars {} OutVars{~y$mem_tmp~0=v_~y$mem_tmp~0_5} AuxVars[] AssignedVars[~y$mem_tmp~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y~0=0] [?] -1 [534] L689-->L690: Formula: (= v_~y$r_buff0_thd0~0_13 0) InVars {} OutVars{~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_13} AuxVars[] AssignedVars[~y$r_buff0_thd0~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y~0=0] [?] -1 [676] L690-->L691: Formula: (= v_~y$r_buff0_thd1~0_32 0) InVars {} OutVars{~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_32} AuxVars[] AssignedVars[~y$r_buff0_thd1~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y~0=0] [?] -1 [575] L691-->L692: Formula: (= v_~y$r_buff0_thd2~0_44 0) InVars {} OutVars{~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_44} AuxVars[] AssignedVars[~y$r_buff0_thd2~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y~0=0] [?] -1 [493] L692-->L693: Formula: (= v_~y$r_buff1_thd0~0_9 0) InVars {} OutVars{~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_9} AuxVars[] AssignedVars[~y$r_buff1_thd0~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y~0=0] [?] -1 [662] L693-->L694: Formula: (= v_~y$r_buff1_thd1~0_18 0) InVars {} OutVars{~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_18} AuxVars[] AssignedVars[~y$r_buff1_thd1~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y~0=0] [?] -1 [562] L694-->L695: Formula: (= v_~y$r_buff1_thd2~0_25 0) InVars {} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_25} AuxVars[] AssignedVars[~y$r_buff1_thd2~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y~0=0] [?] -1 [486] L695-->L696: Formula: (= v_~y$read_delayed~0_1 0) InVars {} OutVars{~y$read_delayed~0=v_~y$read_delayed~0_1} AuxVars[] AssignedVars[~y$read_delayed~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed~0=0, ~y~0=0] [?] -1 [632] L696-->L697: Formula: (and (= v_~y$read_delayed_var~0.offset_1 0) (= v_~y$read_delayed_var~0.base_1 0)) InVars {} OutVars{~y$read_delayed_var~0.base=v_~y$read_delayed_var~0.base_1, ~y$read_delayed_var~0.offset=v_~y$read_delayed_var~0.offset_1} AuxVars[] AssignedVars[~y$read_delayed_var~0.offset, ~y$read_delayed_var~0.base] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y~0=0] [?] -1 [539] L697-->L698: Formula: (= v_~y$w_buff0~0_17 0) InVars {} OutVars{~y$w_buff0~0=v_~y$w_buff0~0_17} AuxVars[] AssignedVars[~y$w_buff0~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0~0=0, ~y~0=0] [?] -1 [481] L698-->L699: Formula: (= v_~y$w_buff0_used~0_85 0) InVars {} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_85} AuxVars[] AssignedVars[~y$w_buff0_used~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y~0=0] [?] -1 [618] L699-->L700: Formula: (= v_~y$w_buff1~0_16 0) InVars {} OutVars{~y$w_buff1~0=v_~y$w_buff1~0_16} AuxVars[] AssignedVars[~y$w_buff1~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [531] L700-->L701: Formula: (= v_~y$w_buff1_used~0_48 0) InVars {} OutVars{~y$w_buff1_used~0=v_~y$w_buff1_used~0_48} AuxVars[] AssignedVars[~y$w_buff1_used~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [675] L701-->L702: Formula: (= v_~weak$$choice0~0_3 0) InVars {} OutVars{~weak$$choice0~0=v_~weak$$choice0~0_3} AuxVars[] AssignedVars[~weak$$choice0~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [571] L702-->L-1-1: Formula: (= v_~weak$$choice2~0_27 0) InVars {} OutVars{~weak$$choice2~0=v_~weak$$choice2~0_27} AuxVars[] AssignedVars[~weak$$choice2~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [663] L-1-1-->L-1-2: Formula: true InVars {} OutVars{ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_#res] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [659] L-1-2-->L789: Formula: true InVars {} OutVars{ULTIMATE.start_main_~#t1729~0.base=|v_ULTIMATE.start_main_~#t1729~0.base_1|, ULTIMATE.start_main_#t~nondet57=|v_ULTIMATE.start_main_#t~nondet57_1|, ULTIMATE.start_main_#t~nondet58=|v_ULTIMATE.start_main_#t~nondet58_1|, ULTIMATE.start_main_~#t1730~0.base=|v_ULTIMATE.start_main_~#t1730~0.base_1|, ULTIMATE.start_main_#t~ite59=|v_ULTIMATE.start_main_#t~ite59_1|, ULTIMATE.start_main_~#t1729~0.offset=|v_ULTIMATE.start_main_~#t1729~0.offset_1|, ULTIMATE.start_main_#t~ite64=|v_ULTIMATE.start_main_#t~ite64_1|, ULTIMATE.start_main_#t~ite62=|v_ULTIMATE.start_main_#t~ite62_1|, ULTIMATE.start_main_#t~ite63=|v_ULTIMATE.start_main_#t~ite63_1|, ULTIMATE.start_main_#t~ite60=|v_ULTIMATE.start_main_#t~ite60_1|, ULTIMATE.start_main_#t~ite61=|v_ULTIMATE.start_main_#t~ite61_1|, ULTIMATE.start_main_~#t1730~0.offset=|v_ULTIMATE.start_main_~#t1730~0.offset_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1729~0.base, ULTIMATE.start_main_#t~ite62, ULTIMATE.start_main_#t~ite63, ULTIMATE.start_main_#t~ite60, ULTIMATE.start_main_#t~ite61, ULTIMATE.start_main_#t~nondet57, ULTIMATE.start_main_#t~nondet58, ULTIMATE.start_main_~#t1730~0.base, ULTIMATE.start_main_~#t1730~0.offset, ULTIMATE.start_main_#t~ite59, ULTIMATE.start_main_~#t1729~0.offset, ULTIMATE.start_main_#t~ite64] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [472] L789-->L789-1: Formula: (and (not (= |v_ULTIMATE.start_main_~#t1729~0.base_2| 0)) (= |v_ULTIMATE.start_main_~#t1729~0.offset_2| 0) (= (select |v_#valid_2| |v_ULTIMATE.start_main_~#t1729~0.base_2|) 0) (= |v_#length_1| (store |v_#length_2| |v_ULTIMATE.start_main_~#t1729~0.base_2| 4)) (= (store |v_#valid_2| |v_ULTIMATE.start_main_~#t1729~0.base_2| 1) |v_#valid_1|)) InVars {#length=|v_#length_2|, #valid=|v_#valid_2|} OutVars{ULTIMATE.start_main_~#t1729~0.base=|v_ULTIMATE.start_main_~#t1729~0.base_2|, #length=|v_#length_1|, ULTIMATE.start_main_~#t1729~0.offset=|v_ULTIMATE.start_main_~#t1729~0.offset_2|, #valid=|v_#valid_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1729~0.base, #valid, #length, ULTIMATE.start_main_~#t1729~0.offset] VAL [|#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [668] L789-1-->L790: Formula: (= |v_#memory_int_1| (store |v_#memory_int_2| |v_ULTIMATE.start_main_~#t1729~0.base_3| (store (select |v_#memory_int_2| |v_ULTIMATE.start_main_~#t1729~0.base_3|) |v_ULTIMATE.start_main_~#t1729~0.offset_3| 0))) InVars {ULTIMATE.start_main_~#t1729~0.base=|v_ULTIMATE.start_main_~#t1729~0.base_3|, #memory_int=|v_#memory_int_2|, ULTIMATE.start_main_~#t1729~0.offset=|v_ULTIMATE.start_main_~#t1729~0.offset_3|} OutVars{ULTIMATE.start_main_~#t1729~0.base=|v_ULTIMATE.start_main_~#t1729~0.base_3|, #memory_int=|v_#memory_int_1|, ULTIMATE.start_main_~#t1729~0.offset=|v_ULTIMATE.start_main_~#t1729~0.offset_3|} AuxVars[] AssignedVars[#memory_int] VAL [|#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] FORK -1 [841] L790-->P0ENTRY: Formula: (and (= 0 |v_Thread0_P0_#in~arg.offset_3|) (= 0 v_Thread0_P0_thidvar0_2) (= 0 |v_Thread0_P0_#in~arg.base_3|)) InVars {} OutVars{Thread0_P0_#in~arg.base=|v_Thread0_P0_#in~arg.base_3|, Thread0_P0_thidvar0=v_Thread0_P0_thidvar0_2, Thread0_P0_#in~arg.offset=|v_Thread0_P0_#in~arg.offset_3|} AuxVars[] AssignedVars[Thread0_P0_#in~arg.base, Thread0_P0_thidvar0, Thread0_P0_#in~arg.offset] VAL [Thread0_P0_thidvar0=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [605] L790-1-->L791: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~nondet57=|v_ULTIMATE.start_main_#t~nondet57_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet57] VAL [Thread0_P0_thidvar0=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [513] L791-->L791-1: Formula: (and (= |v_#valid_3| (store |v_#valid_4| |v_ULTIMATE.start_main_~#t1730~0.base_2| 1)) (= (select |v_#valid_4| |v_ULTIMATE.start_main_~#t1730~0.base_2|) 0) (not (= 0 |v_ULTIMATE.start_main_~#t1730~0.base_2|)) (= |v_ULTIMATE.start_main_~#t1730~0.offset_2| 0) (= (store |v_#length_4| |v_ULTIMATE.start_main_~#t1730~0.base_2| 4) |v_#length_3|)) InVars {#length=|v_#length_4|, #valid=|v_#valid_4|} OutVars{ULTIMATE.start_main_~#t1730~0.offset=|v_ULTIMATE.start_main_~#t1730~0.offset_2|, #length=|v_#length_3|, ULTIMATE.start_main_~#t1730~0.base=|v_ULTIMATE.start_main_~#t1730~0.base_2|, #valid=|v_#valid_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1730~0.base, #valid, ULTIMATE.start_main_~#t1730~0.offset, #length] VAL [Thread0_P0_thidvar0=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [518] L791-1-->L792: Formula: (= (store |v_#memory_int_4| |v_ULTIMATE.start_main_~#t1730~0.base_3| (store (select |v_#memory_int_4| |v_ULTIMATE.start_main_~#t1730~0.base_3|) |v_ULTIMATE.start_main_~#t1730~0.offset_3| 1)) |v_#memory_int_3|) InVars {#memory_int=|v_#memory_int_4|, ULTIMATE.start_main_~#t1730~0.offset=|v_ULTIMATE.start_main_~#t1730~0.offset_3|, ULTIMATE.start_main_~#t1730~0.base=|v_ULTIMATE.start_main_~#t1730~0.base_3|} OutVars{#memory_int=|v_#memory_int_3|, ULTIMATE.start_main_~#t1730~0.offset=|v_ULTIMATE.start_main_~#t1730~0.offset_3|, ULTIMATE.start_main_~#t1730~0.base=|v_ULTIMATE.start_main_~#t1730~0.base_3|} AuxVars[] AssignedVars[#memory_int] VAL [Thread0_P0_thidvar0=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] FORK -1 [842] L792-->P1ENTRY: Formula: (and (= 0 |v_Thread1_P1_#in~arg.base_3|) (= 0 |v_Thread1_P1_#in~arg.offset_3|) (= 1 v_Thread1_P1_thidvar0_2)) InVars {} OutVars{Thread1_P1_#in~arg.base=|v_Thread1_P1_#in~arg.base_3|, Thread1_P1_thidvar0=v_Thread1_P1_thidvar0_2, Thread1_P1_#in~arg.offset=|v_Thread1_P1_#in~arg.offset_3|} AuxVars[] AssignedVars[Thread1_P1_#in~arg.base, Thread1_P1_thidvar0, Thread1_P1_#in~arg.offset] VAL [Thread0_P0_thidvar0=0, Thread1_P1_thidvar0=1, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 [751] P1ENTRY-->L5: Formula: (and (= v_Thread1_P1_~arg.offset_1 |v_Thread1_P1_#in~arg.offset_1|) (= v_~y$w_buff1~0_7 v_~y$w_buff0~0_8) (= |v_Thread1_P1___VERIFIER_assert_#in~expression_1| (ite (not (and (not (= (mod v_~y$w_buff0_used~0_35 256) 0)) (not (= (mod v_~y$w_buff1_used~0_20 256) 0)))) 1 0)) (= v_~y$w_buff0_used~0_35 1) (= v_Thread1_P1_~arg.base_1 |v_Thread1_P1_#in~arg.base_1|) (= v_Thread1_P1___VERIFIER_assert_~expression_1 |v_Thread1_P1___VERIFIER_assert_#in~expression_1|) (= v_~y$w_buff0~0_7 1) (= v_~y$w_buff1_used~0_20 v_~y$w_buff0_used~0_36)) InVars {Thread1_P1_#in~arg.base=|v_Thread1_P1_#in~arg.base_1|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_36, ~y$w_buff0~0=v_~y$w_buff0~0_8, Thread1_P1_#in~arg.offset=|v_Thread1_P1_#in~arg.offset_1|} OutVars{Thread1_P1___VERIFIER_assert_~expression=v_Thread1_P1___VERIFIER_assert_~expression_1, Thread1_P1_#in~arg.base=|v_Thread1_P1_#in~arg.base_1|, Thread1_P1_~arg.offset=v_Thread1_P1_~arg.offset_1, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_35, ~y$w_buff1~0=v_~y$w_buff1~0_7, Thread1_P1_~arg.base=v_Thread1_P1_~arg.base_1, ~y$w_buff0~0=v_~y$w_buff0~0_7, Thread1_P1___VERIFIER_assert_#in~expression=|v_Thread1_P1___VERIFIER_assert_#in~expression_1|, Thread1_P1_#in~arg.offset=|v_Thread1_P1_#in~arg.offset_1|, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_20} AuxVars[] AssignedVars[Thread1_P1___VERIFIER_assert_~expression, Thread1_P1_~arg.offset, ~y$w_buff0_used~0, ~y$w_buff1~0, Thread1_P1_~arg.base, ~y$w_buff0~0, Thread1_P1___VERIFIER_assert_#in~expression, ~y$w_buff1_used~0] VAL [Thread0_P0_thidvar0=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 [753] L5-->L5-3: Formula: (not (= v_Thread1_P1___VERIFIER_assert_~expression_3 0)) InVars {Thread1_P1___VERIFIER_assert_~expression=v_Thread1_P1___VERIFIER_assert_~expression_3} OutVars{Thread1_P1___VERIFIER_assert_~expression=v_Thread1_P1___VERIFIER_assert_~expression_3} AuxVars[] AssignedVars[] VAL [Thread0_P0_thidvar0=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 [756] L5-3-->L752: Formula: (and (= v_~y$mem_tmp~0_3 v_~y~0_7) (= v_~y$r_buff1_thd2~0_5 v_~y$r_buff0_thd2~0_9) (= v_~y$r_buff0_thd2~0_8 1) (= v_~weak$$choice0~0_2 |v_Thread1_P1_#t~nondet27_1|) (= v_~weak$$choice2~0_18 |v_Thread1_P1_#t~nondet28_1|) (= v_~y$r_buff1_thd1~0_17 v_~y$r_buff0_thd1~0_31) (= v_~y$flush_delayed~0_5 v_~weak$$choice2~0_18) (= v_~y$r_buff1_thd0~0_1 v_~y$r_buff0_thd0~0_1)) InVars {Thread1_P1_#t~nondet27=|v_Thread1_P1_#t~nondet27_1|, Thread1_P1_#t~nondet28=|v_Thread1_P1_#t~nondet28_1|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_1, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_9, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_31, ~y~0=v_~y~0_7} OutVars{Thread1_P1_#t~nondet27=|v_Thread1_P1_#t~nondet27_2|, Thread1_P1_#t~nondet28=|v_Thread1_P1_#t~nondet28_2|, ~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_5, ~weak$$choice0~0=v_~weak$$choice0~0_2, ~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_17, ~y$mem_tmp~0=v_~y$mem_tmp~0_3, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_1, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_8, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_31, ~y$flush_delayed~0=v_~y$flush_delayed~0_5, ~y~0=v_~y~0_7, ~weak$$choice2~0=v_~weak$$choice2~0_18, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_1} AuxVars[] AssignedVars[~y$r_buff1_thd2~0, ~weak$$choice0~0, ~y$r_buff1_thd1~0, Thread1_P1_#t~nondet27, ~y$mem_tmp~0, Thread1_P1_#t~nondet28, ~y$r_buff0_thd2~0, ~y$flush_delayed~0, ~weak$$choice2~0, ~y$r_buff1_thd0~0] VAL [Thread0_P0_thidvar0=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 [758] L752-->L752-2: Formula: (let ((.cse0 (not (= 0 (mod v_~y$r_buff0_thd2~0_13 256))))) (and (or .cse0 (not (= 0 (mod v_~y$r_buff1_thd2~0_8 256)))) (not (= 0 (mod v_~y$w_buff0_used~0_41 256))) (or .cse0 (not (= 0 (mod v_~y$w_buff1_used~0_24 256)))))) InVars {~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_8, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_41, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_13, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_24} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_8, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_41, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_13, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_24} AuxVars[] AssignedVars[] VAL [Thread0_P0_thidvar0=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 [760] L752-2-->L752-4: Formula: (and (not (= 0 (mod v_~y$w_buff0_used~0_43 256))) (not (= 0 (mod v_~y$r_buff0_thd2~0_15 256))) (= |v_Thread1_P1_#t~ite29_2| v_~y$w_buff0~0_9)) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_43, ~y$w_buff0~0=v_~y$w_buff0~0_9, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_15} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_43, ~y$w_buff0~0=v_~y$w_buff0~0_9, Thread1_P1_#t~ite29=|v_Thread1_P1_#t~ite29_2|, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_15} AuxVars[] AssignedVars[Thread1_P1_#t~ite29] VAL [Thread0_P0_thidvar0=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite29|=1, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 [764] L752-4-->L752-5: Formula: (= |v_Thread1_P1_#t~ite30_4| |v_Thread1_P1_#t~ite29_4|) InVars {Thread1_P1_#t~ite29=|v_Thread1_P1_#t~ite29_4|} OutVars{Thread1_P1_#t~ite29=|v_Thread1_P1_#t~ite29_4|, Thread1_P1_#t~ite30=|v_Thread1_P1_#t~ite30_4|} AuxVars[] AssignedVars[Thread1_P1_#t~ite30] VAL [Thread0_P0_thidvar0=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite29|=1, |Thread1_P1_#t~ite30|=1, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 [759] L752-5-->L753: Formula: (= v_~y~0_10 |v_Thread1_P1_#t~ite30_2|) InVars {Thread1_P1_#t~ite30=|v_Thread1_P1_#t~ite30_2|} OutVars{~y~0=v_~y~0_10, Thread1_P1_#t~ite29=|v_Thread1_P1_#t~ite29_1|, Thread1_P1_#t~ite30=|v_Thread1_P1_#t~ite30_3|} AuxVars[] AssignedVars[Thread1_P1_#t~ite30, ~y~0, Thread1_P1_#t~ite29] VAL [Thread0_P0_thidvar0=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 [762] L753-->L753-8: Formula: (and (not (= (mod v_~weak$$choice2~0_19 256) 0)) (= |v_Thread1_P1_#t~ite33_1| v_~y$w_buff0~0_10)) InVars {~weak$$choice2~0=v_~weak$$choice2~0_19, ~y$w_buff0~0=v_~y$w_buff0~0_10} OutVars{Thread1_P1_#t~ite33=|v_Thread1_P1_#t~ite33_1|, ~weak$$choice2~0=v_~weak$$choice2~0_19, ~y$w_buff0~0=v_~y$w_buff0~0_10} AuxVars[] AssignedVars[Thread1_P1_#t~ite33] VAL [Thread0_P0_thidvar0=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite33|=1, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 [765] L753-8-->L754: Formula: (= v_~y$w_buff0~0_15 |v_Thread1_P1_#t~ite33_2|) InVars {Thread1_P1_#t~ite33=|v_Thread1_P1_#t~ite33_2|} OutVars{Thread1_P1_#t~ite33=|v_Thread1_P1_#t~ite33_3|, Thread1_P1_#t~ite31=|v_Thread1_P1_#t~ite31_1|, Thread1_P1_#t~ite32=|v_Thread1_P1_#t~ite32_1|, ~y$w_buff0~0=v_~y$w_buff0~0_15} AuxVars[] AssignedVars[Thread1_P1_#t~ite31, Thread1_P1_#t~ite32, ~y$w_buff0~0, Thread1_P1_#t~ite33] VAL [Thread0_P0_thidvar0=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 [768] L754-->L754-8: Formula: (and (not (= (mod v_~weak$$choice2~0_21 256) 0)) (= |v_Thread1_P1_#t~ite36_1| v_~y$w_buff1~0_10)) InVars {~y$w_buff1~0=v_~y$w_buff1~0_10, ~weak$$choice2~0=v_~weak$$choice2~0_21} OutVars{Thread1_P1_#t~ite36=|v_Thread1_P1_#t~ite36_1|, ~y$w_buff1~0=v_~y$w_buff1~0_10, ~weak$$choice2~0=v_~weak$$choice2~0_21} AuxVars[] AssignedVars[Thread1_P1_#t~ite36] VAL [Thread0_P0_thidvar0=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite36|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 [773] L754-8-->L755: Formula: (= v_~y$w_buff1~0_14 |v_Thread1_P1_#t~ite36_2|) InVars {Thread1_P1_#t~ite36=|v_Thread1_P1_#t~ite36_2|} OutVars{Thread1_P1_#t~ite35=|v_Thread1_P1_#t~ite35_1|, Thread1_P1_#t~ite36=|v_Thread1_P1_#t~ite36_3|, Thread1_P1_#t~ite34=|v_Thread1_P1_#t~ite34_1|, ~y$w_buff1~0=v_~y$w_buff1~0_14} AuxVars[] AssignedVars[~y$w_buff1~0, Thread1_P1_#t~ite35, Thread1_P1_#t~ite36, Thread1_P1_#t~ite34] VAL [Thread0_P0_thidvar0=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 [777] L755-->L755-8: Formula: (and (= |v_Thread1_P1_#t~ite39_1| v_~y$w_buff0_used~0_63) (not (= (mod v_~weak$$choice2~0_23 256) 0))) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_63, ~weak$$choice2~0=v_~weak$$choice2~0_23} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_63, ~weak$$choice2~0=v_~weak$$choice2~0_23, Thread1_P1_#t~ite39=|v_Thread1_P1_#t~ite39_1|} AuxVars[] AssignedVars[Thread1_P1_#t~ite39] VAL [Thread0_P0_thidvar0=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite39|=1, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 [782] L755-8-->L756: Formula: (= v_~y$w_buff0_used~0_69 |v_Thread1_P1_#t~ite39_2|) InVars {Thread1_P1_#t~ite39=|v_Thread1_P1_#t~ite39_2|} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_69, Thread1_P1_#t~ite39=|v_Thread1_P1_#t~ite39_3|, Thread1_P1_#t~ite37=|v_Thread1_P1_#t~ite37_1|, Thread1_P1_#t~ite38=|v_Thread1_P1_#t~ite38_1|} AuxVars[] AssignedVars[~y$w_buff0_used~0, Thread1_P1_#t~ite39, Thread1_P1_#t~ite37, Thread1_P1_#t~ite38] VAL [Thread0_P0_thidvar0=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 [786] L756-->L756-8: Formula: (and (not (= 0 (mod v_~weak$$choice2~0_25 256))) (= |v_Thread1_P1_#t~ite42_1| v_~y$w_buff1_used~0_38)) InVars {~weak$$choice2~0=v_~weak$$choice2~0_25, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_38} OutVars{Thread1_P1_#t~ite42=|v_Thread1_P1_#t~ite42_1|, ~weak$$choice2~0=v_~weak$$choice2~0_25, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_38} AuxVars[] AssignedVars[Thread1_P1_#t~ite42] VAL [Thread0_P0_thidvar0=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite42|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 [791] L756-8-->L757: Formula: (= v_~y$w_buff1_used~0_17 |v_Thread1_P1_#t~ite42_2|) InVars {Thread1_P1_#t~ite42=|v_Thread1_P1_#t~ite42_2|} OutVars{Thread1_P1_#t~ite42=|v_Thread1_P1_#t~ite42_3|, Thread1_P1_#t~ite40=|v_Thread1_P1_#t~ite40_1|, Thread1_P1_#t~ite41=|v_Thread1_P1_#t~ite41_1|, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_17} AuxVars[] AssignedVars[Thread1_P1_#t~ite42, Thread1_P1_#t~ite40, Thread1_P1_#t~ite41, ~y$w_buff1_used~0] VAL [Thread0_P0_thidvar0=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 [795] L757-->L757-8: Formula: (and (not (= 0 (mod v_~weak$$choice2~0_14 256))) (= |v_Thread1_P1_#t~ite45_1| v_~y$r_buff0_thd2~0_1)) InVars {~weak$$choice2~0=v_~weak$$choice2~0_14, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_1} OutVars{Thread1_P1_#t~ite45=|v_Thread1_P1_#t~ite45_1|, ~weak$$choice2~0=v_~weak$$choice2~0_14, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_1} AuxVars[] AssignedVars[Thread1_P1_#t~ite45] VAL [Thread0_P0_thidvar0=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite45|=1, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 [800] L757-8-->L758: Formula: (= v_~y$r_buff0_thd2~0_6 |v_Thread1_P1_#t~ite45_2|) InVars {Thread1_P1_#t~ite45=|v_Thread1_P1_#t~ite45_2|} OutVars{Thread1_P1_#t~ite44=|v_Thread1_P1_#t~ite44_1|, Thread1_P1_#t~ite45=|v_Thread1_P1_#t~ite45_3|, Thread1_P1_#t~ite43=|v_Thread1_P1_#t~ite43_1|, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_6} AuxVars[] AssignedVars[Thread1_P1_#t~ite43, ~y$r_buff0_thd2~0, Thread1_P1_#t~ite44, Thread1_P1_#t~ite45] VAL [Thread0_P0_thidvar0=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 [804] L758-->L758-8: Formula: (and (not (= 0 (mod v_~weak$$choice2~0_16 256))) (= |v_Thread1_P1_#t~ite48_1| v_~y$r_buff1_thd2~0_3)) InVars {~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_3, ~weak$$choice2~0=v_~weak$$choice2~0_16} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_3, ~weak$$choice2~0=v_~weak$$choice2~0_16, Thread1_P1_#t~ite48=|v_Thread1_P1_#t~ite48_1|} AuxVars[] AssignedVars[Thread1_P1_#t~ite48] VAL [Thread0_P0_thidvar0=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite48|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 [809] L758-8-->L760: Formula: (and (= v_~__unbuffered_p1_EAX~0_1 v_~y~0_9) (= v_~y$r_buff1_thd2~0_9 |v_Thread1_P1_#t~ite48_2|)) InVars {~y~0=v_~y~0_9, Thread1_P1_#t~ite48=|v_Thread1_P1_#t~ite48_2|} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_9, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_1, Thread1_P1_#t~ite46=|v_Thread1_P1_#t~ite46_1|, Thread1_P1_#t~ite47=|v_Thread1_P1_#t~ite47_1|, ~y~0=v_~y~0_9, Thread1_P1_#t~ite48=|v_Thread1_P1_#t~ite48_3|} AuxVars[] AssignedVars[~y$r_buff1_thd2~0, ~__unbuffered_p1_EAX~0, Thread1_P1_#t~ite46, Thread1_P1_#t~ite47, Thread1_P1_#t~ite48] VAL [Thread0_P0_thidvar0=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 [813] L760-->L760-2: Formula: (and (= |v_Thread1_P1_#t~ite49_1| v_~y$mem_tmp~0_4) (not (= (mod v_~y$flush_delayed~0_6 256) 0))) InVars {~y$flush_delayed~0=v_~y$flush_delayed~0_6, ~y$mem_tmp~0=v_~y$mem_tmp~0_4} OutVars{~y$flush_delayed~0=v_~y$flush_delayed~0_6, ~y$mem_tmp~0=v_~y$mem_tmp~0_4, Thread1_P1_#t~ite49=|v_Thread1_P1_#t~ite49_1|} AuxVars[] AssignedVars[Thread1_P1_#t~ite49] VAL [Thread0_P0_thidvar0=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite49|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 [818] L760-2-->L767: Formula: (and (= v_~y~0_12 |v_Thread1_P1_#t~ite49_3|) (= v_~y$flush_delayed~0_8 0) (= v_~__unbuffered_p1_EBX~0_1 v_~x~0_2)) InVars {~x~0=v_~x~0_2, Thread1_P1_#t~ite49=|v_Thread1_P1_#t~ite49_3|} OutVars{~y$flush_delayed~0=v_~y$flush_delayed~0_8, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_1, ~y~0=v_~y~0_12, ~x~0=v_~x~0_2, Thread1_P1_#t~ite49=|v_Thread1_P1_#t~ite49_4|} AuxVars[] AssignedVars[~__unbuffered_p1_EBX~0, ~y$flush_delayed~0, ~y~0, Thread1_P1_#t~ite49] VAL [Thread0_P0_thidvar0=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 [820] L767-->L767-5: Formula: (and (not (= 0 (mod v_~y$r_buff0_thd2~0_18 256))) (not (= (mod v_~y$w_buff0_used~0_46 256) 0)) (= |v_Thread1_P1_#t~ite51_1| v_~y$w_buff0~0_12)) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_46, ~y$w_buff0~0=v_~y$w_buff0~0_12, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_18} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_46, ~y$w_buff0~0=v_~y$w_buff0~0_12, Thread1_P1_#t~ite51=|v_Thread1_P1_#t~ite51_1|, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_18} AuxVars[] AssignedVars[Thread1_P1_#t~ite51] VAL [Thread0_P0_thidvar0=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite51|=1, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 [684] P0ENTRY-->L716: Formula: (and (= v_Thread0_P0_~arg.base_1 |v_Thread0_P0_#in~arg.base_1|) (= v_Thread0_P0_~arg.offset_1 |v_Thread0_P0_#in~arg.offset_1|) (= v_~__unbuffered_p0_EAX~0_1 v_~x~0_1) (= v_~weak$$choice0~0_1 |v_Thread0_P0_#t~nondet3_1|) (= v_~weak$$choice2~0_1 |v_Thread0_P0_#t~nondet4_1|) (= v_~y$mem_tmp~0_1 v_~y~0_1) (= v_~x~0_1 1) (= v_~y$flush_delayed~0_1 v_~weak$$choice2~0_1)) InVars {Thread0_P0_#in~arg.base=|v_Thread0_P0_#in~arg.base_1|, Thread0_P0_#t~nondet3=|v_Thread0_P0_#t~nondet3_1|, ~y~0=v_~y~0_1, Thread0_P0_#t~nondet4=|v_Thread0_P0_#t~nondet4_1|, Thread0_P0_#in~arg.offset=|v_Thread0_P0_#in~arg.offset_1|} OutVars{Thread0_P0_#in~arg.base=|v_Thread0_P0_#in~arg.base_1|, Thread0_P0_~arg.offset=v_Thread0_P0_~arg.offset_1, Thread0_P0_#in~arg.offset=|v_Thread0_P0_#in~arg.offset_1|, ~weak$$choice0~0=v_~weak$$choice0~0_1, Thread0_P0_#t~nondet3=|v_Thread0_P0_#t~nondet3_2|, ~y$mem_tmp~0=v_~y$mem_tmp~0_1, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_1, Thread0_P0_#t~nondet4=|v_Thread0_P0_#t~nondet4_2|, Thread0_P0_~arg.base=v_Thread0_P0_~arg.base_1, ~y$flush_delayed~0=v_~y$flush_delayed~0_1, ~y~0=v_~y~0_1, ~weak$$choice2~0=v_~weak$$choice2~0_1, ~x~0=v_~x~0_1} AuxVars[] AssignedVars[~weak$$choice0~0, Thread0_P0_#t~nondet3, Thread0_P0_~arg.offset, ~y$mem_tmp~0, ~__unbuffered_p0_EAX~0, Thread0_P0_#t~nondet4, Thread0_P0_~arg.base, ~y$flush_delayed~0, ~weak$$choice2~0, ~x~0] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite51|=1, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 [685] L716-->L716-5: Formula: (and (= |v_Thread0_P0_#t~ite6_1| v_~y~0_2) (let ((.cse0 (= (mod v_~y$r_buff0_thd1~0_2 256) 0))) (or (and (= 0 (mod v_~y$r_buff1_thd1~0_2 256)) .cse0) (= (mod v_~y$w_buff0_used~0_2 256) 0) (and .cse0 (= (mod v_~y$w_buff1_used~0_2 256) 0))))) InVars {~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_2, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_2, ~y~0=v_~y~0_2, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_2, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_2} OutVars{~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_2, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_2, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_2, ~y~0=v_~y~0_2, Thread0_P0_#t~ite6=|v_Thread0_P0_#t~ite6_1|, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_2} AuxVars[] AssignedVars[Thread0_P0_#t~ite6] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0_#t~ite6|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite51|=1, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 [822] L767-5-->L768: Formula: (= v_~y~0_14 |v_Thread1_P1_#t~ite51_2|) InVars {Thread1_P1_#t~ite51=|v_Thread1_P1_#t~ite51_2|} OutVars{Thread1_P1_#t~ite50=|v_Thread1_P1_#t~ite50_1|, ~y~0=v_~y~0_14, Thread1_P1_#t~ite51=|v_Thread1_P1_#t~ite51_3|} AuxVars[] AssignedVars[Thread1_P1_#t~ite50, Thread1_P1_#t~ite51, ~y~0] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0_#t~ite6|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 [825] L768-->L768-2: Formula: (and (not (= 0 (mod v_~y$r_buff0_thd2~0_23 256))) (= |v_Thread1_P1_#t~ite52_1| 0) (not (= (mod v_~y$w_buff0_used~0_51 256) 0))) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_51, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_23} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_51, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_23, Thread1_P1_#t~ite52=|v_Thread1_P1_#t~ite52_1|} AuxVars[] AssignedVars[Thread1_P1_#t~ite52] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0_#t~ite6|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite52|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 [828] L768-2-->L769: Formula: (= v_~y$w_buff0_used~0_53 |v_Thread1_P1_#t~ite52_3|) InVars {Thread1_P1_#t~ite52=|v_Thread1_P1_#t~ite52_3|} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_53, Thread1_P1_#t~ite52=|v_Thread1_P1_#t~ite52_4|} AuxVars[] AssignedVars[~y$w_buff0_used~0, Thread1_P1_#t~ite52] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0_#t~ite6|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 [830] L769-->L769-2: Formula: (and (or (= 0 (mod v_~y$r_buff0_thd2~0_28 256)) (= (mod v_~y$w_buff0_used~0_57 256) 0)) (= |v_Thread1_P1_#t~ite53_2| v_~y$w_buff1_used~0_32) (or (= 0 (mod v_~y$w_buff1_used~0_32 256)) (= (mod v_~y$r_buff1_thd2~0_17 256) 0))) InVars {~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_17, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_57, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_28, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_32} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_17, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_57, Thread1_P1_#t~ite53=|v_Thread1_P1_#t~ite53_2|, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_28, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_32} AuxVars[] AssignedVars[Thread1_P1_#t~ite53] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0_#t~ite6|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite53|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 [687] L716-5-->L717: Formula: (= v_~y~0_4 |v_Thread0_P0_#t~ite6_2|) InVars {Thread0_P0_#t~ite6=|v_Thread0_P0_#t~ite6_2|} OutVars{Thread0_P0_#t~ite5=|v_Thread0_P0_#t~ite5_1|, ~y~0=v_~y~0_4, Thread0_P0_#t~ite6=|v_Thread0_P0_#t~ite6_3|} AuxVars[] AssignedVars[Thread0_P0_#t~ite5, ~y~0, Thread0_P0_#t~ite6] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite53|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 [690] L717-->L717-8: Formula: (and (not (= (mod v_~weak$$choice2~0_2 256) 0)) (= |v_Thread0_P0_#t~ite9_1| v_~y$w_buff0~0_2)) InVars {~weak$$choice2~0=v_~weak$$choice2~0_2, ~y$w_buff0~0=v_~y$w_buff0~0_2} OutVars{Thread0_P0_#t~ite9=|v_Thread0_P0_#t~ite9_1|, ~weak$$choice2~0=v_~weak$$choice2~0_2, ~y$w_buff0~0=v_~y$w_buff0~0_2} AuxVars[] AssignedVars[Thread0_P0_#t~ite9] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0_#t~ite9|=1, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite53|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 [693] L717-8-->L718: Formula: (= v_~y$w_buff0~0_6 |v_Thread0_P0_#t~ite9_2|) InVars {Thread0_P0_#t~ite9=|v_Thread0_P0_#t~ite9_2|} OutVars{Thread0_P0_#t~ite7=|v_Thread0_P0_#t~ite7_1|, Thread0_P0_#t~ite8=|v_Thread0_P0_#t~ite8_1|, Thread0_P0_#t~ite9=|v_Thread0_P0_#t~ite9_3|, ~y$w_buff0~0=v_~y$w_buff0~0_6} AuxVars[] AssignedVars[~y$w_buff0~0, Thread0_P0_#t~ite7, Thread0_P0_#t~ite8, Thread0_P0_#t~ite9] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite53|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 [696] L718-->L718-8: Formula: (and (= |v_Thread0_P0_#t~ite12_1| v_~y$w_buff1~0_2) (not (= 0 (mod v_~weak$$choice2~0_4 256)))) InVars {~y$w_buff1~0=v_~y$w_buff1~0_2, ~weak$$choice2~0=v_~weak$$choice2~0_4} OutVars{Thread0_P0_#t~ite12=|v_Thread0_P0_#t~ite12_1|, ~y$w_buff1~0=v_~y$w_buff1~0_2, ~weak$$choice2~0=v_~weak$$choice2~0_4} AuxVars[] AssignedVars[Thread0_P0_#t~ite12] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0_#t~ite12|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite53|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 [701] L718-8-->L719: Formula: (= v_~y$w_buff1~0_6 |v_Thread0_P0_#t~ite12_2|) InVars {Thread0_P0_#t~ite12=|v_Thread0_P0_#t~ite12_2|} OutVars{Thread0_P0_#t~ite11=|v_Thread0_P0_#t~ite11_1|, Thread0_P0_#t~ite12=|v_Thread0_P0_#t~ite12_3|, ~y$w_buff1~0=v_~y$w_buff1~0_6, Thread0_P0_#t~ite10=|v_Thread0_P0_#t~ite10_1|} AuxVars[] AssignedVars[~y$w_buff1~0, Thread0_P0_#t~ite10, Thread0_P0_#t~ite11, Thread0_P0_#t~ite12] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite53|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 [705] L719-->L719-8: Formula: (and (not (= (mod v_~weak$$choice2~0_6 256) 0)) (= |v_Thread0_P0_#t~ite15_1| v_~y$w_buff0_used~0_16)) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_16, ~weak$$choice2~0=v_~weak$$choice2~0_6} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_16, Thread0_P0_#t~ite15=|v_Thread0_P0_#t~ite15_1|, ~weak$$choice2~0=v_~weak$$choice2~0_6} AuxVars[] AssignedVars[Thread0_P0_#t~ite15] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0_#t~ite15|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite53|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 [710] L719-8-->L720: Formula: (= v_~y$w_buff0_used~0_21 |v_Thread0_P0_#t~ite15_2|) InVars {Thread0_P0_#t~ite15=|v_Thread0_P0_#t~ite15_2|} OutVars{Thread0_P0_#t~ite13=|v_Thread0_P0_#t~ite13_1|, Thread0_P0_#t~ite14=|v_Thread0_P0_#t~ite14_1|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_21, Thread0_P0_#t~ite15=|v_Thread0_P0_#t~ite15_3|} AuxVars[] AssignedVars[~y$w_buff0_used~0, Thread0_P0_#t~ite13, Thread0_P0_#t~ite14, Thread0_P0_#t~ite15] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite53|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 [714] L720-->L720-8: Formula: (and (not (= (mod v_~weak$$choice2~0_8 256) 0)) (= |v_Thread0_P0_#t~ite18_1| v_~y$w_buff1_used~0_10)) InVars {~weak$$choice2~0=v_~weak$$choice2~0_8, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_10} OutVars{~weak$$choice2~0=v_~weak$$choice2~0_8, Thread0_P0_#t~ite18=|v_Thread0_P0_#t~ite18_1|, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_10} AuxVars[] AssignedVars[Thread0_P0_#t~ite18] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0_#t~ite18|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite53|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 [831] L769-2-->L770: Formula: (= v_~y$w_buff1_used~0_33 |v_Thread1_P1_#t~ite53_3|) InVars {Thread1_P1_#t~ite53=|v_Thread1_P1_#t~ite53_3|} OutVars{Thread1_P1_#t~ite53=|v_Thread1_P1_#t~ite53_4|, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_33} AuxVars[] AssignedVars[Thread1_P1_#t~ite53, ~y$w_buff1_used~0] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0_#t~ite18|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 [833] L770-->L770-2: Formula: (and (or (= 0 (mod v_~y$r_buff0_thd2~0_32 256)) (= 0 (mod v_~y$w_buff0_used~0_61 256))) (= |v_Thread1_P1_#t~ite54_2| v_~y$r_buff0_thd2~0_32)) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_61, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_32} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_61, Thread1_P1_#t~ite54=|v_Thread1_P1_#t~ite54_2|, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_32} AuxVars[] AssignedVars[Thread1_P1_#t~ite54] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0_#t~ite18|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite54|=1, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 [834] L770-2-->L771: Formula: (= v_~y$r_buff0_thd2~0_33 |v_Thread1_P1_#t~ite54_3|) InVars {Thread1_P1_#t~ite54=|v_Thread1_P1_#t~ite54_3|} OutVars{Thread1_P1_#t~ite54=|v_Thread1_P1_#t~ite54_4|, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_33} AuxVars[] AssignedVars[Thread1_P1_#t~ite54, ~y$r_buff0_thd2~0] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0_#t~ite18|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 [836] L771-->L771-2: Formula: (and (or (= 0 (mod v_~y$r_buff1_thd2~0_19 256)) (= 0 (mod v_~y$w_buff1_used~0_35 256))) (= |v_Thread1_P1_#t~ite55_2| v_~y$r_buff1_thd2~0_19) (or (= 0 (mod v_~y$w_buff0_used~0_64 256)) (= (mod v_~y$r_buff0_thd2~0_35 256) 0))) InVars {~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_19, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_64, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_35, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_35} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_19, Thread1_P1_#t~ite55=|v_Thread1_P1_#t~ite55_2|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_64, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_35, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_35} AuxVars[] AssignedVars[Thread1_P1_#t~ite55] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0_#t~ite18|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite55|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 [837] L771-2-->L776: Formula: (and (= v_~y$r_buff1_thd2~0_20 |v_Thread1_P1_#t~ite55_3|) (= v_~__unbuffered_cnt~0_3 (+ v_~__unbuffered_cnt~0_4 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_4, Thread1_P1_#t~ite55=|v_Thread1_P1_#t~ite55_3|} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_20, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_3, Thread1_P1_#t~ite55=|v_Thread1_P1_#t~ite55_4|} AuxVars[] AssignedVars[~y$r_buff1_thd2~0, ~__unbuffered_cnt~0, Thread1_P1_#t~ite55] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0_#t~ite18|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 [719] L720-8-->L721: Formula: (= v_~y$w_buff1_used~0_13 |v_Thread0_P0_#t~ite18_2|) InVars {Thread0_P0_#t~ite18=|v_Thread0_P0_#t~ite18_2|} OutVars{Thread0_P0_#t~ite16=|v_Thread0_P0_#t~ite16_1|, Thread0_P0_#t~ite17=|v_Thread0_P0_#t~ite17_1|, Thread0_P0_#t~ite18=|v_Thread0_P0_#t~ite18_3|, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_13} AuxVars[] AssignedVars[Thread0_P0_#t~ite16, Thread0_P0_#t~ite17, Thread0_P0_#t~ite18, ~y$w_buff1_used~0] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 [723] L721-->L721-8: Formula: (and (not (= (mod v_~weak$$choice2~0_10 256) 0)) (= |v_Thread0_P0_#t~ite21_1| v_~y$r_buff0_thd1~0_24)) InVars {~weak$$choice2~0=v_~weak$$choice2~0_10, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_24} OutVars{~weak$$choice2~0=v_~weak$$choice2~0_10, Thread0_P0_#t~ite21=|v_Thread0_P0_#t~ite21_1|, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_24} AuxVars[] AssignedVars[Thread0_P0_#t~ite21] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0_#t~ite21|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 [728] L721-8-->L722: Formula: (= v_~y$r_buff0_thd1~0_29 |v_Thread0_P0_#t~ite21_2|) InVars {Thread0_P0_#t~ite21=|v_Thread0_P0_#t~ite21_2|} OutVars{Thread0_P0_#t~ite19=|v_Thread0_P0_#t~ite19_1|, Thread0_P0_#t~ite21=|v_Thread0_P0_#t~ite21_3|, Thread0_P0_#t~ite20=|v_Thread0_P0_#t~ite20_1|, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_29} AuxVars[] AssignedVars[Thread0_P0_#t~ite19, Thread0_P0_#t~ite21, Thread0_P0_#t~ite20, ~y$r_buff0_thd1~0] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 [732] L722-->L722-8: Formula: (and (not (= (mod v_~weak$$choice2~0_12 256) 0)) (= |v_Thread0_P0_#t~ite24_1| v_~y$r_buff1_thd1~0_15)) InVars {~weak$$choice2~0=v_~weak$$choice2~0_12, ~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_15} OutVars{~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_15, Thread0_P0_#t~ite24=|v_Thread0_P0_#t~ite24_1|, ~weak$$choice2~0=v_~weak$$choice2~0_12} AuxVars[] AssignedVars[Thread0_P0_#t~ite24] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0_#t~ite24|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 [737] L722-8-->L724: Formula: (and (= v_~__unbuffered_p0_EBX~0_1 v_~y~0_3) (= v_~y$r_buff1_thd1~0_4 |v_Thread0_P0_#t~ite24_2|)) InVars {~y~0=v_~y~0_3, Thread0_P0_#t~ite24=|v_Thread0_P0_#t~ite24_2|} OutVars{~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_4, ~__unbuffered_p0_EBX~0=v_~__unbuffered_p0_EBX~0_1, Thread0_P0_#t~ite23=|v_Thread0_P0_#t~ite23_1|, Thread0_P0_#t~ite22=|v_Thread0_P0_#t~ite22_1|, Thread0_P0_#t~ite24=|v_Thread0_P0_#t~ite24_3|, ~y~0=v_~y~0_3} AuxVars[] AssignedVars[~y$r_buff1_thd1~0, ~__unbuffered_p0_EBX~0, Thread0_P0_#t~ite23, Thread0_P0_#t~ite22, Thread0_P0_#t~ite24] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 [741] L724-->L724-2: Formula: (and (not (= 0 (mod v_~y$flush_delayed~0_2 256))) (= |v_Thread0_P0_#t~ite25_1| v_~y$mem_tmp~0_2)) InVars {~y$flush_delayed~0=v_~y$flush_delayed~0_2, ~y$mem_tmp~0=v_~y$mem_tmp~0_2} OutVars{~y$flush_delayed~0=v_~y$flush_delayed~0_2, ~y$mem_tmp~0=v_~y$mem_tmp~0_2, Thread0_P0_#t~ite25=|v_Thread0_P0_#t~ite25_1|} AuxVars[] AssignedVars[Thread0_P0_#t~ite25] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread0_P0_#t~ite25|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 [746] L724-2-->L732: Formula: (and (= v_~y$flush_delayed~0_4 0) (= v_~__unbuffered_cnt~0_1 (+ v_~__unbuffered_cnt~0_2 1)) (= v_~y~0_6 |v_Thread0_P0_#t~ite25_3|)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_2, Thread0_P0_#t~ite25=|v_Thread0_P0_#t~ite25_3|} OutVars{~y$flush_delayed~0=v_~y$flush_delayed~0_4, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_1, Thread0_P0_#t~ite25=|v_Thread0_P0_#t~ite25_4|, ~y~0=v_~y~0_6} AuxVars[] AssignedVars[~y$flush_delayed~0, ~__unbuffered_cnt~0, Thread0_P0_#t~ite25, ~y~0] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [656] L792-1-->L796: Formula: (= v_~main$tmp_guard0~0_1 (ite (= (ite (= v_~__unbuffered_cnt~0_5 2) 1 0) 0) 0 1)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_5} OutVars{~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_5, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_1, ULTIMATE.start_main_#t~nondet58=|v_ULTIMATE.start_main_#t~nondet58_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet58, ~main$tmp_guard0~0] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [550] L796-->L798: Formula: (not (= 0 (mod v_~main$tmp_guard0~0_2 256))) InVars {~main$tmp_guard0~0=v_~main$tmp_guard0~0_2} OutVars{~main$tmp_guard0~0=v_~main$tmp_guard0~0_2} AuxVars[] AssignedVars[] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [611] L798-->L798-2: Formula: (or (= 0 (mod v_~y$r_buff0_thd0~0_3 256)) (= (mod v_~y$w_buff0_used~0_75 256) 0)) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_75, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_3} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_75, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_3} AuxVars[] AssignedVars[] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [616] L798-2-->L798-4: Formula: (and (or (= (mod v_~y$w_buff1_used~0_42 256) 0) (= (mod v_~y$r_buff1_thd0~0_3 256) 0)) (= |v_ULTIMATE.start_main_#t~ite59_3| v_~y~0_15)) InVars {~y~0=v_~y~0_15, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_3, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_42} OutVars{ULTIMATE.start_main_#t~ite59=|v_ULTIMATE.start_main_#t~ite59_3|, ~y~0=v_~y~0_15, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_3, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_42} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite59] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite59|=0, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [624] L798-4-->L798-5: Formula: (= |v_ULTIMATE.start_main_#t~ite60_3| |v_ULTIMATE.start_main_#t~ite59_4|) InVars {ULTIMATE.start_main_#t~ite59=|v_ULTIMATE.start_main_#t~ite59_4|} OutVars{ULTIMATE.start_main_#t~ite60=|v_ULTIMATE.start_main_#t~ite60_3|, ULTIMATE.start_main_#t~ite59=|v_ULTIMATE.start_main_#t~ite59_4|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite60] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite59|=0, |ULTIMATE.start_main_#t~ite60|=0, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [588] L798-5-->L799: Formula: (= v_~y~0_16 |v_ULTIMATE.start_main_#t~ite60_5|) InVars {ULTIMATE.start_main_#t~ite60=|v_ULTIMATE.start_main_#t~ite60_5|} OutVars{ULTIMATE.start_main_#t~ite60=|v_ULTIMATE.start_main_#t~ite60_4|, ULTIMATE.start_main_#t~ite59=|v_ULTIMATE.start_main_#t~ite59_5|, ~y~0=v_~y~0_16} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite60, ULTIMATE.start_main_#t~ite59, ~y~0] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [546] L799-->L799-2: Formula: (and (= |v_ULTIMATE.start_main_#t~ite61_3| v_~y$w_buff0_used~0_77) (or (= 0 (mod v_~y$w_buff0_used~0_77 256)) (= (mod v_~y$r_buff0_thd0~0_5 256) 0))) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_77, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_5} OutVars{ULTIMATE.start_main_#t~ite61=|v_ULTIMATE.start_main_#t~ite61_3|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_77, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_5} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite61] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite61|=0, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [529] L799-2-->L800: Formula: (= v_~y$w_buff0_used~0_78 |v_ULTIMATE.start_main_#t~ite61_5|) InVars {ULTIMATE.start_main_#t~ite61=|v_ULTIMATE.start_main_#t~ite61_5|} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_78, ULTIMATE.start_main_#t~ite61=|v_ULTIMATE.start_main_#t~ite61_4|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite61, ~y$w_buff0_used~0] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [469] L800-->L800-2: Formula: (and (or (= 0 (mod v_~y$r_buff0_thd0~0_7 256)) (= (mod v_~y$w_buff0_used~0_80 256) 0)) (or (= 0 (mod v_~y$w_buff1_used~0_44 256)) (= 0 (mod v_~y$r_buff1_thd0~0_5 256))) (= |v_ULTIMATE.start_main_#t~ite62_3| v_~y$w_buff1_used~0_44)) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_80, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_5, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_7, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_44} OutVars{ULTIMATE.start_main_#t~ite62=|v_ULTIMATE.start_main_#t~ite62_3|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_80, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_5, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_7, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_44} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite62] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite62|=0, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [671] L800-2-->L801: Formula: (= v_~y$w_buff1_used~0_45 |v_ULTIMATE.start_main_#t~ite62_5|) InVars {ULTIMATE.start_main_#t~ite62=|v_ULTIMATE.start_main_#t~ite62_5|} OutVars{ULTIMATE.start_main_#t~ite62=|v_ULTIMATE.start_main_#t~ite62_4|, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_45} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite62, ~y$w_buff1_used~0] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [601] L801-->L801-2: Formula: (and (= |v_ULTIMATE.start_main_#t~ite63_3| v_~y$r_buff0_thd0~0_9) (or (= 0 (mod v_~y$r_buff0_thd0~0_9 256)) (= 0 (mod v_~y$w_buff0_used~0_82 256)))) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_82, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_9} OutVars{ULTIMATE.start_main_#t~ite63=|v_ULTIMATE.start_main_#t~ite63_3|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_82, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_9} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite63] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite63|=0, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [609] L801-2-->L802: Formula: (= v_~y$r_buff0_thd0~0_10 |v_ULTIMATE.start_main_#t~ite63_5|) InVars {ULTIMATE.start_main_#t~ite63=|v_ULTIMATE.start_main_#t~ite63_5|} OutVars{ULTIMATE.start_main_#t~ite63=|v_ULTIMATE.start_main_#t~ite63_4|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_10} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite63, ~y$r_buff0_thd0~0] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [512] L802-->L802-2: Formula: (and (or (= 0 (mod v_~y$r_buff0_thd0~0_12 256)) (= 0 (mod v_~y$w_buff0_used~0_84 256))) (or (= 0 (mod v_~y$w_buff1_used~0_47 256)) (= (mod v_~y$r_buff1_thd0~0_7 256) 0)) (= |v_ULTIMATE.start_main_#t~ite64_3| v_~y$r_buff1_thd0~0_7)) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_84, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_7, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_12, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_47} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_84, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_7, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_12, ULTIMATE.start_main_#t~ite64=|v_ULTIMATE.start_main_#t~ite64_3|, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_47} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite64] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite64|=0, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [521] L802-2-->L807: Formula: (and (= v_~y$r_buff1_thd0~0_8 |v_ULTIMATE.start_main_#t~ite64_5|) (= v_~main$tmp_guard1~0_1 (ite (= (ite (not (and (= v_~__unbuffered_p0_EBX~0_2 0) (= 0 v_~__unbuffered_p1_EBX~0_2) (= 1 v_~__unbuffered_p1_EAX~0_2) (= v_~__unbuffered_p0_EAX~0_2 1))) 1 0) 0) 0 1))) InVars {~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_2, ~__unbuffered_p0_EBX~0=v_~__unbuffered_p0_EBX~0_2, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_2, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_2, ULTIMATE.start_main_#t~ite64=|v_ULTIMATE.start_main_#t~ite64_5|} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_2, ~__unbuffered_p0_EBX~0=v_~__unbuffered_p0_EBX~0_2, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_2, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_2, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_1, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_8, ULTIMATE.start_main_#t~ite64=|v_ULTIMATE.start_main_#t~ite64_4|} AuxVars[] AssignedVars[~main$tmp_guard1~0, ~y$r_buff1_thd0~0, ULTIMATE.start_main_#t~ite64] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [547] L807-->L807-1: Formula: (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_1| (mod v_~main$tmp_guard1~0_2 256)) InVars {~main$tmp_guard1~0=v_~main$tmp_guard1~0_2} OutVars{~main$tmp_guard1~0=v_~main$tmp_guard1~0_2, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_1|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_#in~expression] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [553] L807-1-->L5: Formula: true InVars {} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_1} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [629] L5-->L5-1: Formula: (= v_ULTIMATE.start___VERIFIER_assert_~expression_2 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_2|) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_2|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_2, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_2|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [649] L5-1-->L5-2: Formula: (= v_ULTIMATE.start___VERIFIER_assert_~expression_3 0) InVars {ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_3} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_3} AuxVars[] AssignedVars[] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [643] L5-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 #NULL.base, #NULL.offset := 0, 0; VAL [|#NULL.base|=0, |#NULL.offset|=0] [?] -1 #valid := #valid[0 := 0]; VAL [|#NULL.base|=0, |#NULL.offset|=0] [?] -1 ~__unbuffered_cnt~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0] [?] -1 ~__unbuffered_p0_EAX~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0] [?] -1 ~__unbuffered_p0_EBX~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0] [?] -1 ~__unbuffered_p1_EAX~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0] [?] -1 ~__unbuffered_p1_EBX~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0] [?] -1 ~main$tmp_guard0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0] [?] -1 ~main$tmp_guard1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [?] -1 ~x~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [?] -1 ~y~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0] [?] -1 ~y$flush_delayed~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y~0=0] [?] -1 ~y$mem_tmp~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y~0=0] [?] -1 ~y$r_buff0_thd0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y~0=0] [?] -1 ~y$r_buff0_thd1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y~0=0] [?] -1 ~y$r_buff0_thd2~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y~0=0] [?] -1 ~y$r_buff1_thd0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y~0=0] [?] -1 ~y$r_buff1_thd1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y~0=0] [?] -1 ~y$r_buff1_thd2~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y~0=0] [?] -1 ~y$read_delayed~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed~0=0, ~y~0=0] [?] -1 ~y$read_delayed_var~0.base, ~y$read_delayed_var~0.offset := 0, 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y~0=0] [?] -1 ~y$w_buff0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0~0=0, ~y~0=0] [?] -1 ~y$w_buff0_used~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y~0=0] [?] -1 ~y$w_buff1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 ~y$w_buff1_used~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 ~weak$$choice0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 ~weak$$choice2~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 havoc main_#res; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 havoc main_#t~nondet57, main_#t~nondet58, main_#t~ite60, main_#t~ite59, main_#t~ite61, main_#t~ite62, main_#t~ite63, main_#t~ite64, main_~#t1729~0.base, main_~#t1729~0.offset, main_~#t1730~0.base, main_~#t1730~0.offset; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 SUMMARY for call main_~#t1729~0.base, main_~#t1729~0.offset := #Ultimate.alloc(4); srcloc: L789 VAL [|#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 SUMMARY for call write~int(0, main_~#t1729~0.base, main_~#t1729~0.offset, 4); srcloc: L789-1 VAL [|#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] FORK -1 fork 0 P0(0, 0); VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 havoc main_#t~nondet57; VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 SUMMARY for call main_~#t1730~0.base, main_~#t1730~0.offset := #Ultimate.alloc(4); srcloc: L791 VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 SUMMARY for call write~int(1, main_~#t1730~0.base, main_~#t1730~0.offset, 4); srcloc: L791-1 VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] FORK -1 fork 1 P1(0, 0); VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset;~y$w_buff1~0 := ~y$w_buff0~0;~y$w_buff0~0 := 1;~y$w_buff1_used~0 := ~y$w_buff0_used~0;~y$w_buff0_used~0 := 1;__VERIFIER_assert_#in~expression := (if !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$w_buff0_used~0 % 256) then 1 else 0);havoc __VERIFIER_assert_~expression;__VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 assume !(0 == __VERIFIER_assert_~expression); VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 ~y$r_buff1_thd0~0 := ~y$r_buff0_thd0~0;~y$r_buff1_thd1~0 := ~y$r_buff0_thd1~0;~y$r_buff1_thd2~0 := ~y$r_buff0_thd2~0;~y$r_buff0_thd2~0 := 1;~weak$$choice0~0 := #t~nondet27;havoc #t~nondet27;~weak$$choice2~0 := #t~nondet28;havoc #t~nondet28;~y$flush_delayed~0 := ~weak$$choice2~0;~y$mem_tmp~0 := ~y~0; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 assume !((0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd2~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd2~0 % 256 && 0 == ~y$r_buff1_thd2~0 % 256)); VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 assume 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256;#t~ite29 := ~y$w_buff0~0; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite29|=1, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 #t~ite30 := #t~ite29; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite29|=1, |P1_#t~ite30|=1, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 ~y~0 := #t~ite30;havoc #t~ite29;havoc #t~ite30; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 assume 0 != ~weak$$choice2~0 % 256;#t~ite33 := ~y$w_buff0~0; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite33|=1, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 ~y$w_buff0~0 := #t~ite33;havoc #t~ite33;havoc #t~ite32;havoc #t~ite31; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 assume 0 != ~weak$$choice2~0 % 256;#t~ite36 := ~y$w_buff1~0; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite36|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 ~y$w_buff1~0 := #t~ite36;havoc #t~ite36;havoc #t~ite35;havoc #t~ite34; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 assume 0 != ~weak$$choice2~0 % 256;#t~ite39 := ~y$w_buff0_used~0; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite39|=1, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 ~y$w_buff0_used~0 := #t~ite39;havoc #t~ite38;havoc #t~ite37;havoc #t~ite39; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 assume 0 != ~weak$$choice2~0 % 256;#t~ite42 := ~y$w_buff1_used~0; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite42|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 ~y$w_buff1_used~0 := #t~ite42;havoc #t~ite42;havoc #t~ite41;havoc #t~ite40; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 assume 0 != ~weak$$choice2~0 % 256;#t~ite45 := ~y$r_buff0_thd2~0; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite45|=1, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 ~y$r_buff0_thd2~0 := #t~ite45;havoc #t~ite45;havoc #t~ite44;havoc #t~ite43; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 assume 0 != ~weak$$choice2~0 % 256;#t~ite48 := ~y$r_buff1_thd2~0; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite48|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 ~y$r_buff1_thd2~0 := #t~ite48;havoc #t~ite48;havoc #t~ite46;havoc #t~ite47;~__unbuffered_p1_EAX~0 := ~y~0; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 assume 0 != ~y$flush_delayed~0 % 256;#t~ite49 := ~y$mem_tmp~0; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite49|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 ~y~0 := #t~ite49;havoc #t~ite49;~y$flush_delayed~0 := 0;~__unbuffered_p1_EBX~0 := ~x~0; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 assume 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256;#t~ite51 := ~y$w_buff0~0; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite51|=1, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset;~x~0 := 1;~__unbuffered_p0_EAX~0 := ~x~0;~weak$$choice0~0 := #t~nondet3;havoc #t~nondet3;~weak$$choice2~0 := #t~nondet4;havoc #t~nondet4;~y$flush_delayed~0 := ~weak$$choice2~0;~y$mem_tmp~0 := ~y~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite51|=1, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 assume (0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd1~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd1~0 % 256 && 0 == ~y$r_buff1_thd1~0 % 256);#t~ite6 := ~y~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite6|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite51|=1, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 ~y~0 := #t~ite51;havoc #t~ite51;havoc #t~ite50; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite6|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 assume 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256;#t~ite52 := 0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite6|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite52|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 ~y$w_buff0_used~0 := #t~ite52;havoc #t~ite52; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite6|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256));#t~ite53 := ~y$w_buff1_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite6|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite53|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 ~y~0 := #t~ite6;havoc #t~ite6;havoc #t~ite5; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite53|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 assume 0 != ~weak$$choice2~0 % 256;#t~ite9 := ~y$w_buff0~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite9|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite53|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 ~y$w_buff0~0 := #t~ite9;havoc #t~ite7;havoc #t~ite9;havoc #t~ite8; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite53|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 assume 0 != ~weak$$choice2~0 % 256;#t~ite12 := ~y$w_buff1~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite12|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite53|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 ~y$w_buff1~0 := #t~ite12;havoc #t~ite12;havoc #t~ite10;havoc #t~ite11; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite53|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 assume 0 != ~weak$$choice2~0 % 256;#t~ite15 := ~y$w_buff0_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite15|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite53|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 ~y$w_buff0_used~0 := #t~ite15;havoc #t~ite14;havoc #t~ite13;havoc #t~ite15; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite53|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 assume 0 != ~weak$$choice2~0 % 256;#t~ite18 := ~y$w_buff1_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite18|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite53|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 ~y$w_buff1_used~0 := #t~ite53;havoc #t~ite53; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite18|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256);#t~ite54 := ~y$r_buff0_thd2~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite18|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite54|=1, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 ~y$r_buff0_thd2~0 := #t~ite54;havoc #t~ite54; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite18|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256));#t~ite55 := ~y$r_buff1_thd2~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite18|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite55|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 ~y$r_buff1_thd2~0 := #t~ite55;havoc #t~ite55;~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite18|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 ~y$w_buff1_used~0 := #t~ite18;havoc #t~ite18;havoc #t~ite17;havoc #t~ite16; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 assume 0 != ~weak$$choice2~0 % 256;#t~ite21 := ~y$r_buff0_thd1~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite21|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 ~y$r_buff0_thd1~0 := #t~ite21;havoc #t~ite21;havoc #t~ite20;havoc #t~ite19; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 assume 0 != ~weak$$choice2~0 % 256;#t~ite24 := ~y$r_buff1_thd1~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite24|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 ~y$r_buff1_thd1~0 := #t~ite24;havoc #t~ite24;havoc #t~ite22;havoc #t~ite23;~__unbuffered_p0_EBX~0 := ~y~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 assume 0 != ~y$flush_delayed~0 % 256;#t~ite25 := ~y$mem_tmp~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite25|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 ~y~0 := #t~ite25;havoc #t~ite25;~y$flush_delayed~0 := 0;~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 havoc main_#t~nondet58;~main$tmp_guard0~0 := (if 0 == (if 2 == ~__unbuffered_cnt~0 then 1 else 0) then 0 else 1); VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 assume 0 != ~main$tmp_guard0~0 % 256; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256); VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 assume !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256);main_#t~ite59 := ~y~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite59|=0, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 main_#t~ite60 := main_#t~ite59; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite59|=0, |ULTIMATE.start_main_#t~ite60|=0, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 ~y~0 := main_#t~ite60;havoc main_#t~ite60;havoc main_#t~ite59; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256);main_#t~ite61 := ~y$w_buff0_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite61|=0, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 ~y$w_buff0_used~0 := main_#t~ite61;havoc main_#t~ite61; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256));main_#t~ite62 := ~y$w_buff1_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite62|=0, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 ~y$w_buff1_used~0 := main_#t~ite62;havoc main_#t~ite62; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256);main_#t~ite63 := ~y$r_buff0_thd0~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite63|=0, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 ~y$r_buff0_thd0~0 := main_#t~ite63;havoc main_#t~ite63; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256));main_#t~ite64 := ~y$r_buff1_thd0~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite64|=0, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 ~y$r_buff1_thd0~0 := main_#t~ite64;havoc main_#t~ite64;~main$tmp_guard1~0 := (if 0 == (if !(((1 == ~__unbuffered_p0_EAX~0 && 0 == ~__unbuffered_p0_EBX~0) && 1 == ~__unbuffered_p1_EAX~0) && 0 == ~__unbuffered_p1_EBX~0) then 1 else 0) then 0 else 1); VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 __VERIFIER_assert_#in~expression := ~main$tmp_guard1~0 % 256; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 havoc __VERIFIER_assert_~expression; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 assume 0 == __VERIFIER_assert_~expression; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 assume !false; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] ----- ----- class de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder.RCFGBacktranslator [?] -1 #NULL.base, #NULL.offset := 0, 0; VAL [|#NULL.base|=0, |#NULL.offset|=0] [?] -1 #valid := #valid[0 := 0]; VAL [|#NULL.base|=0, |#NULL.offset|=0] [?] -1 ~__unbuffered_cnt~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0] [?] -1 ~__unbuffered_p0_EAX~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0] [?] -1 ~__unbuffered_p0_EBX~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0] [?] -1 ~__unbuffered_p1_EAX~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0] [?] -1 ~__unbuffered_p1_EBX~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0] [?] -1 ~main$tmp_guard0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0] [?] -1 ~main$tmp_guard1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [?] -1 ~x~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [?] -1 ~y~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0] [?] -1 ~y$flush_delayed~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y~0=0] [?] -1 ~y$mem_tmp~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y~0=0] [?] -1 ~y$r_buff0_thd0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y~0=0] [?] -1 ~y$r_buff0_thd1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y~0=0] [?] -1 ~y$r_buff0_thd2~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y~0=0] [?] -1 ~y$r_buff1_thd0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y~0=0] [?] -1 ~y$r_buff1_thd1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y~0=0] [?] -1 ~y$r_buff1_thd2~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y~0=0] [?] -1 ~y$read_delayed~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed~0=0, ~y~0=0] [?] -1 ~y$read_delayed_var~0.base, ~y$read_delayed_var~0.offset := 0, 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y~0=0] [?] -1 ~y$w_buff0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0~0=0, ~y~0=0] [?] -1 ~y$w_buff0_used~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y~0=0] [?] -1 ~y$w_buff1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 ~y$w_buff1_used~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 ~weak$$choice0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 ~weak$$choice2~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 havoc main_#res; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 havoc main_#t~nondet57, main_#t~nondet58, main_#t~ite60, main_#t~ite59, main_#t~ite61, main_#t~ite62, main_#t~ite63, main_#t~ite64, main_~#t1729~0.base, main_~#t1729~0.offset, main_~#t1730~0.base, main_~#t1730~0.offset; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 SUMMARY for call main_~#t1729~0.base, main_~#t1729~0.offset := #Ultimate.alloc(4); srcloc: L789 VAL [|#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 SUMMARY for call write~int(0, main_~#t1729~0.base, main_~#t1729~0.offset, 4); srcloc: L789-1 VAL [|#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] FORK -1 fork 0 P0(0, 0); VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 havoc main_#t~nondet57; VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 SUMMARY for call main_~#t1730~0.base, main_~#t1730~0.offset := #Ultimate.alloc(4); srcloc: L791 VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 SUMMARY for call write~int(1, main_~#t1730~0.base, main_~#t1730~0.offset, 4); srcloc: L791-1 VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] FORK -1 fork 1 P1(0, 0); VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset;~y$w_buff1~0 := ~y$w_buff0~0;~y$w_buff0~0 := 1;~y$w_buff1_used~0 := ~y$w_buff0_used~0;~y$w_buff0_used~0 := 1;__VERIFIER_assert_#in~expression := (if !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$w_buff0_used~0 % 256) then 1 else 0);havoc __VERIFIER_assert_~expression;__VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 assume !(0 == __VERIFIER_assert_~expression); VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 ~y$r_buff1_thd0~0 := ~y$r_buff0_thd0~0;~y$r_buff1_thd1~0 := ~y$r_buff0_thd1~0;~y$r_buff1_thd2~0 := ~y$r_buff0_thd2~0;~y$r_buff0_thd2~0 := 1;~weak$$choice0~0 := #t~nondet27;havoc #t~nondet27;~weak$$choice2~0 := #t~nondet28;havoc #t~nondet28;~y$flush_delayed~0 := ~weak$$choice2~0;~y$mem_tmp~0 := ~y~0; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 assume !((0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd2~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd2~0 % 256 && 0 == ~y$r_buff1_thd2~0 % 256)); VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 assume 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256;#t~ite29 := ~y$w_buff0~0; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite29|=1, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 #t~ite30 := #t~ite29; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite29|=1, |P1_#t~ite30|=1, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 ~y~0 := #t~ite30;havoc #t~ite29;havoc #t~ite30; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 assume 0 != ~weak$$choice2~0 % 256;#t~ite33 := ~y$w_buff0~0; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite33|=1, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 ~y$w_buff0~0 := #t~ite33;havoc #t~ite33;havoc #t~ite32;havoc #t~ite31; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 assume 0 != ~weak$$choice2~0 % 256;#t~ite36 := ~y$w_buff1~0; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite36|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 ~y$w_buff1~0 := #t~ite36;havoc #t~ite36;havoc #t~ite35;havoc #t~ite34; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 assume 0 != ~weak$$choice2~0 % 256;#t~ite39 := ~y$w_buff0_used~0; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite39|=1, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 ~y$w_buff0_used~0 := #t~ite39;havoc #t~ite38;havoc #t~ite37;havoc #t~ite39; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 assume 0 != ~weak$$choice2~0 % 256;#t~ite42 := ~y$w_buff1_used~0; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite42|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 ~y$w_buff1_used~0 := #t~ite42;havoc #t~ite42;havoc #t~ite41;havoc #t~ite40; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 assume 0 != ~weak$$choice2~0 % 256;#t~ite45 := ~y$r_buff0_thd2~0; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite45|=1, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 ~y$r_buff0_thd2~0 := #t~ite45;havoc #t~ite45;havoc #t~ite44;havoc #t~ite43; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 assume 0 != ~weak$$choice2~0 % 256;#t~ite48 := ~y$r_buff1_thd2~0; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite48|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 ~y$r_buff1_thd2~0 := #t~ite48;havoc #t~ite48;havoc #t~ite46;havoc #t~ite47;~__unbuffered_p1_EAX~0 := ~y~0; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 assume 0 != ~y$flush_delayed~0 % 256;#t~ite49 := ~y$mem_tmp~0; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite49|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 ~y~0 := #t~ite49;havoc #t~ite49;~y$flush_delayed~0 := 0;~__unbuffered_p1_EBX~0 := ~x~0; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 assume 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256;#t~ite51 := ~y$w_buff0~0; VAL [P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite51|=1, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset;~x~0 := 1;~__unbuffered_p0_EAX~0 := ~x~0;~weak$$choice0~0 := #t~nondet3;havoc #t~nondet3;~weak$$choice2~0 := #t~nondet4;havoc #t~nondet4;~y$flush_delayed~0 := ~weak$$choice2~0;~y$mem_tmp~0 := ~y~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite51|=1, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 assume (0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd1~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd1~0 % 256 && 0 == ~y$r_buff1_thd1~0 % 256);#t~ite6 := ~y~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite6|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite51|=1, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 ~y~0 := #t~ite51;havoc #t~ite51;havoc #t~ite50; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite6|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 assume 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256;#t~ite52 := 0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite6|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite52|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 ~y$w_buff0_used~0 := #t~ite52;havoc #t~ite52; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite6|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 0 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256));#t~ite53 := ~y$w_buff1_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite6|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite53|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [?] 1 ~y~0 := #t~ite6;havoc #t~ite6;havoc #t~ite5; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite53|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 assume 0 != ~weak$$choice2~0 % 256;#t~ite9 := ~y$w_buff0~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite9|=1, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite53|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 ~y$w_buff0~0 := #t~ite9;havoc #t~ite7;havoc #t~ite9;havoc #t~ite8; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite53|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 assume 0 != ~weak$$choice2~0 % 256;#t~ite12 := ~y$w_buff1~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite12|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite53|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 ~y$w_buff1~0 := #t~ite12;havoc #t~ite12;havoc #t~ite10;havoc #t~ite11; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite53|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 assume 0 != ~weak$$choice2~0 % 256;#t~ite15 := ~y$w_buff0_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite15|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite53|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 ~y$w_buff0_used~0 := #t~ite15;havoc #t~ite14;havoc #t~ite13;havoc #t~ite15; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite53|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 assume 0 != ~weak$$choice2~0 % 256;#t~ite18 := ~y$w_buff1_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite18|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite53|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 ~y$w_buff1_used~0 := #t~ite53;havoc #t~ite53; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite18|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256);#t~ite54 := ~y$r_buff0_thd2~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite18|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite54|=1, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 ~y$r_buff0_thd2~0 := #t~ite54;havoc #t~ite54; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite18|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256));#t~ite55 := ~y$r_buff1_thd2~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite18|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite55|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 0 ~y$r_buff1_thd2~0 := #t~ite55;havoc #t~ite55;~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite18|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 ~y$w_buff1_used~0 := #t~ite18;havoc #t~ite18;havoc #t~ite17;havoc #t~ite16; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 assume 0 != ~weak$$choice2~0 % 256;#t~ite21 := ~y$r_buff0_thd1~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite21|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 ~y$r_buff0_thd1~0 := #t~ite21;havoc #t~ite21;havoc #t~ite20;havoc #t~ite19; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 assume 0 != ~weak$$choice2~0 % 256;#t~ite24 := ~y$r_buff1_thd1~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite24|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 ~y$r_buff1_thd1~0 := #t~ite24;havoc #t~ite24;havoc #t~ite22;havoc #t~ite23;~__unbuffered_p0_EBX~0 := ~y~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 assume 0 != ~y$flush_delayed~0 % 256;#t~ite25 := ~y$mem_tmp~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P0_#t~ite25|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] 1 ~y~0 := #t~ite25;havoc #t~ite25;~y$flush_delayed~0 := 0;~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 havoc main_#t~nondet58;~main$tmp_guard0~0 := (if 0 == (if 2 == ~__unbuffered_cnt~0 then 1 else 0) then 0 else 1); VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 assume 0 != ~main$tmp_guard0~0 % 256; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256); VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 assume !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256);main_#t~ite59 := ~y~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite59|=0, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 main_#t~ite60 := main_#t~ite59; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite59|=0, |ULTIMATE.start_main_#t~ite60|=0, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 ~y~0 := main_#t~ite60;havoc main_#t~ite60;havoc main_#t~ite59; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256);main_#t~ite61 := ~y$w_buff0_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite61|=0, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 ~y$w_buff0_used~0 := main_#t~ite61;havoc main_#t~ite61; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256));main_#t~ite62 := ~y$w_buff1_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite62|=0, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 ~y$w_buff1_used~0 := main_#t~ite62;havoc main_#t~ite62; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256);main_#t~ite63 := ~y$r_buff0_thd0~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite63|=0, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 ~y$r_buff0_thd0~0 := main_#t~ite63;havoc main_#t~ite63; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256));main_#t~ite64 := ~y$r_buff1_thd0~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite64|=0, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 ~y$r_buff1_thd0~0 := main_#t~ite64;havoc main_#t~ite64;~main$tmp_guard1~0 := (if 0 == (if !(((1 == ~__unbuffered_p0_EAX~0 && 0 == ~__unbuffered_p0_EBX~0) && 1 == ~__unbuffered_p1_EAX~0) && 0 == ~__unbuffered_p1_EBX~0) then 1 else 0) then 0 else 1); VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 __VERIFIER_assert_#in~expression := ~main$tmp_guard1~0 % 256; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 havoc __VERIFIER_assert_~expression; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 assume 0 == __VERIFIER_assert_~expression; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 assume !false; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t1729~0.base|=6, |ULTIMATE.start_main_~#t1729~0.offset|=0, |ULTIMATE.start_main_~#t1730~0.base|=7, |ULTIMATE.start_main_~#t1730~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 #NULL.base, #NULL.offset := 0, 0; VAL [#NULL.base=0, #NULL.offset=0] [?] -1 #valid := #valid[0 := 0]; VAL [#NULL.base=0, #NULL.offset=0] [L672] -1 ~__unbuffered_cnt~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0] [L674] -1 ~__unbuffered_p0_EAX~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0] [L676] -1 ~__unbuffered_p0_EBX~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0] [L678] -1 ~__unbuffered_p1_EAX~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0] [L680] -1 ~__unbuffered_p1_EBX~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0] [L681] -1 ~main$tmp_guard0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0] [L682] -1 ~main$tmp_guard1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [L684] -1 ~x~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [L686] -1 ~y~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0] [L687] -1 ~y$flush_delayed~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y~0=0] [L688] -1 ~y$mem_tmp~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y~0=0] [L689] -1 ~y$r_buff0_thd0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y~0=0] [L690] -1 ~y$r_buff0_thd1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y~0=0] [L691] -1 ~y$r_buff0_thd2~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y~0=0] [L692] -1 ~y$r_buff1_thd0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y~0=0] [L693] -1 ~y$r_buff1_thd1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y~0=0] [L694] -1 ~y$r_buff1_thd2~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y~0=0] [L695] -1 ~y$read_delayed~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed~0=0, ~y~0=0] [L696] -1 ~y$read_delayed_var~0.base, ~y$read_delayed_var~0.offset := 0, 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y~0=0] [L697] -1 ~y$w_buff0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0~0=0, ~y~0=0] [L698] -1 ~y$w_buff0_used~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y~0=0] [L699] -1 ~y$w_buff1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1~0=0, ~y~0=0] [L700] -1 ~y$w_buff1_used~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L701] -1 ~weak$$choice0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L702] -1 ~weak$$choice2~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 havoc main_#res; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 havoc main_#t~nondet57, main_#t~nondet58, main_#t~ite60, main_#t~ite59, main_#t~ite61, main_#t~ite62, main_#t~ite63, main_#t~ite64, main_~#t1729~0.base, main_~#t1729~0.offset, main_~#t1730~0.base, main_~#t1730~0.offset; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L789] -1 call main_~#t1729~0.base, main_~#t1729~0.offset := #Ultimate.alloc(4); VAL [#NULL.base=0, #NULL.offset=0, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L790] -1 call write~int(0, main_~#t1729~0.base, main_~#t1729~0.offset, 4); VAL [#NULL.base=0, #NULL.offset=0, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L790] FORK -1 fork 0 P0(0, 0); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L790] -1 havoc main_#t~nondet57; VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L791] -1 call main_~#t1730~0.base, main_~#t1730~0.offset := #Ultimate.alloc(4); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L792] -1 call write~int(1, main_~#t1730~0.base, main_~#t1730~0.offset, 4); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L792] FORK -1 fork 1 P1(0, 0); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L734-L777] 0 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset; [L737] 0 ~y$w_buff1~0 := ~y$w_buff0~0; [L738] 0 ~y$w_buff0~0 := 1; [L739] 0 ~y$w_buff1_used~0 := ~y$w_buff0_used~0; [L740] 0 ~y$w_buff0_used~0 := 1; [L741] 0 __VERIFIER_assert_#in~expression := (if !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$w_buff0_used~0 % 256) then 1 else 0); [L741] 0 havoc __VERIFIER_assert_~expression; [L5] 0 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L5] 0 assume !(0 == __VERIFIER_assert_~expression); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L742] 0 ~y$r_buff1_thd0~0 := ~y$r_buff0_thd0~0; [L743] 0 ~y$r_buff1_thd1~0 := ~y$r_buff0_thd1~0; [L744] 0 ~y$r_buff1_thd2~0 := ~y$r_buff0_thd2~0; [L745] 0 ~y$r_buff0_thd2~0 := 1; [L748] 0 ~weak$$choice0~0 := #t~nondet27; [L748] 0 havoc #t~nondet27; [L749] 0 ~weak$$choice2~0 := #t~nondet28; [L749] 0 havoc #t~nondet28; [L750] 0 ~y$flush_delayed~0 := ~weak$$choice2~0; [L751] 0 ~y$mem_tmp~0 := ~y~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L752] 0 assume !((0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd2~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd2~0 % 256 && 0 == ~y$r_buff1_thd2~0 % 256)); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L752] 0 assume 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256; [L752] 0 #t~ite29 := ~y$w_buff0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite29=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L752] 0 #t~ite30 := #t~ite29; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite29=1, #t~ite30=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L752] 0 ~y~0 := #t~ite30; [L752] 0 havoc #t~ite29; [L752] 0 havoc #t~ite30; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L753] 0 assume 0 != ~weak$$choice2~0 % 256; [L753] 0 #t~ite33 := ~y$w_buff0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite33=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L753] 0 ~y$w_buff0~0 := #t~ite33; [L753] 0 havoc #t~ite33; [L753] 0 havoc #t~ite32; [L753] 0 havoc #t~ite31; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L754] 0 assume 0 != ~weak$$choice2~0 % 256; [L754] 0 #t~ite36 := ~y$w_buff1~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite36=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L754] 0 ~y$w_buff1~0 := #t~ite36; [L754] 0 havoc #t~ite36; [L754] 0 havoc #t~ite35; [L754] 0 havoc #t~ite34; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L755] 0 assume 0 != ~weak$$choice2~0 % 256; [L755] 0 #t~ite39 := ~y$w_buff0_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite39=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L755] 0 ~y$w_buff0_used~0 := #t~ite39; [L755] 0 havoc #t~ite38; [L755] 0 havoc #t~ite37; [L755] 0 havoc #t~ite39; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L756] 0 assume 0 != ~weak$$choice2~0 % 256; [L756] 0 #t~ite42 := ~y$w_buff1_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite42=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L756] 0 ~y$w_buff1_used~0 := #t~ite42; [L756] 0 havoc #t~ite42; [L756] 0 havoc #t~ite41; [L756] 0 havoc #t~ite40; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L757] 0 assume 0 != ~weak$$choice2~0 % 256; [L757] 0 #t~ite45 := ~y$r_buff0_thd2~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite45=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L757] 0 ~y$r_buff0_thd2~0 := #t~ite45; [L757] 0 havoc #t~ite45; [L757] 0 havoc #t~ite44; [L757] 0 havoc #t~ite43; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L758] 0 assume 0 != ~weak$$choice2~0 % 256; [L758] 0 #t~ite48 := ~y$r_buff1_thd2~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite48=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L758] 0 ~y$r_buff1_thd2~0 := #t~ite48; [L758] 0 havoc #t~ite48; [L758] 0 havoc #t~ite46; [L758] 0 havoc #t~ite47; [L759] 0 ~__unbuffered_p1_EAX~0 := ~y~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L760] 0 assume 0 != ~y$flush_delayed~0 % 256; [L760] 0 #t~ite49 := ~y$mem_tmp~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite49=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L760] 0 ~y~0 := #t~ite49; [L760] 0 havoc #t~ite49; [L761] 0 ~y$flush_delayed~0 := 0; [L764] 0 ~__unbuffered_p1_EBX~0 := ~x~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L767] 0 assume 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256; [L767] 0 #t~ite51 := ~y$w_buff0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite51=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L703-L733] 1 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset; [L706] 1 ~x~0 := 1; [L709] 1 ~__unbuffered_p0_EAX~0 := ~x~0; [L712] 1 ~weak$$choice0~0 := #t~nondet3; [L712] 1 havoc #t~nondet3; [L713] 1 ~weak$$choice2~0 := #t~nondet4; [L713] 1 havoc #t~nondet4; [L714] 1 ~y$flush_delayed~0 := ~weak$$choice2~0; [L715] 1 ~y$mem_tmp~0 := ~y~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite51=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L716] 1 assume (0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd1~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd1~0 % 256 && 0 == ~y$r_buff1_thd1~0 % 256); [L716] 1 #t~ite6 := ~y~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite51=1, #t~ite6=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L767] 0 ~y~0 := #t~ite51; [L767] 0 havoc #t~ite51; [L767] 0 havoc #t~ite50; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite6=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L768] 0 assume 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256; [L768] 0 #t~ite52 := 0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite52=0, #t~ite6=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L768] 0 ~y$w_buff0_used~0 := #t~ite52; [L768] 0 havoc #t~ite52; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite6=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L769] 0 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)); [L769] 0 #t~ite53 := ~y$w_buff1_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite53=0, #t~ite6=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L716] 1 ~y~0 := #t~ite6; [L716] 1 havoc #t~ite6; [L716] 1 havoc #t~ite5; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite53=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L717] 1 assume 0 != ~weak$$choice2~0 % 256; [L717] 1 #t~ite9 := ~y$w_buff0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite53=0, #t~ite9=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L717] 1 ~y$w_buff0~0 := #t~ite9; [L717] 1 havoc #t~ite7; [L717] 1 havoc #t~ite9; [L717] 1 havoc #t~ite8; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite53=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L718] 1 assume 0 != ~weak$$choice2~0 % 256; [L718] 1 #t~ite12 := ~y$w_buff1~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite12=0, #t~ite53=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L718] 1 ~y$w_buff1~0 := #t~ite12; [L718] 1 havoc #t~ite12; [L718] 1 havoc #t~ite10; [L718] 1 havoc #t~ite11; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite53=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L719] 1 assume 0 != ~weak$$choice2~0 % 256; [L719] 1 #t~ite15 := ~y$w_buff0_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite15=0, #t~ite53=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L719] 1 ~y$w_buff0_used~0 := #t~ite15; [L719] 1 havoc #t~ite14; [L719] 1 havoc #t~ite13; [L719] 1 havoc #t~ite15; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite53=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L720] 1 assume 0 != ~weak$$choice2~0 % 256; [L720] 1 #t~ite18 := ~y$w_buff1_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite18=0, #t~ite53=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L769] 0 ~y$w_buff1_used~0 := #t~ite53; [L769] 0 havoc #t~ite53; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite18=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L770] 0 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256); [L770] 0 #t~ite54 := ~y$r_buff0_thd2~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite18=0, #t~ite54=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L770] 0 ~y$r_buff0_thd2~0 := #t~ite54; [L770] 0 havoc #t~ite54; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite18=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L771] 0 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)); [L771] 0 #t~ite55 := ~y$r_buff1_thd2~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite18=0, #t~ite55=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L771] 0 ~y$r_buff1_thd2~0 := #t~ite55; [L771] 0 havoc #t~ite55; [L774] 0 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite18=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L720] 1 ~y$w_buff1_used~0 := #t~ite18; [L720] 1 havoc #t~ite18; [L720] 1 havoc #t~ite17; [L720] 1 havoc #t~ite16; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L721] 1 assume 0 != ~weak$$choice2~0 % 256; [L721] 1 #t~ite21 := ~y$r_buff0_thd1~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite21=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L721] 1 ~y$r_buff0_thd1~0 := #t~ite21; [L721] 1 havoc #t~ite21; [L721] 1 havoc #t~ite20; [L721] 1 havoc #t~ite19; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L722] 1 assume 0 != ~weak$$choice2~0 % 256; [L722] 1 #t~ite24 := ~y$r_buff1_thd1~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite24=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L722] 1 ~y$r_buff1_thd1~0 := #t~ite24; [L722] 1 havoc #t~ite24; [L722] 1 havoc #t~ite22; [L722] 1 havoc #t~ite23; [L723] 1 ~__unbuffered_p0_EBX~0 := ~y~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L724] 1 assume 0 != ~y$flush_delayed~0 % 256; [L724] 1 #t~ite25 := ~y$mem_tmp~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite25=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L724] 1 ~y~0 := #t~ite25; [L724] 1 havoc #t~ite25; [L725] 1 ~y$flush_delayed~0 := 0; [L730] 1 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L792] -1 havoc main_#t~nondet58; [L794] -1 ~main$tmp_guard0~0 := (if 0 == (if 2 == ~__unbuffered_cnt~0 then 1 else 0) then 0 else 1); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L796] -1 assume 0 != ~main$tmp_guard0~0 % 256; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L798] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L798] -1 assume !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256); [L798] -1 main_#t~ite59 := ~y~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite59=0, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L798] -1 main_#t~ite60 := main_#t~ite59; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite59=0, main_#t~ite60=0, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L798] -1 ~y~0 := main_#t~ite60; [L798] -1 havoc main_#t~ite60; [L798] -1 havoc main_#t~ite59; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L799] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256); [L799] -1 main_#t~ite61 := ~y$w_buff0_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite61=0, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L799] -1 ~y$w_buff0_used~0 := main_#t~ite61; [L799] -1 havoc main_#t~ite61; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L800] -1 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)); [L800] -1 main_#t~ite62 := ~y$w_buff1_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite62=0, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L800] -1 ~y$w_buff1_used~0 := main_#t~ite62; [L800] -1 havoc main_#t~ite62; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L801] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256); [L801] -1 main_#t~ite63 := ~y$r_buff0_thd0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite63=0, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L801] -1 ~y$r_buff0_thd0~0 := main_#t~ite63; [L801] -1 havoc main_#t~ite63; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L802] -1 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)); [L802] -1 main_#t~ite64 := ~y$r_buff1_thd0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite64=0, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L802] -1 ~y$r_buff1_thd0~0 := main_#t~ite64; [L802] -1 havoc main_#t~ite64; [L805] -1 ~main$tmp_guard1~0 := (if 0 == (if !(((1 == ~__unbuffered_p0_EAX~0 && 0 == ~__unbuffered_p0_EBX~0) && 1 == ~__unbuffered_p1_EAX~0) && 0 == ~__unbuffered_p1_EBX~0) then 1 else 0) then 0 else 1); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L807] -1 __VERIFIER_assert_#in~expression := ~main$tmp_guard1~0 % 256; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L807] -1 havoc __VERIFIER_assert_~expression; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L5] -1 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, __VERIFIER_assert_~expression=0, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L5] -1 assume 0 == __VERIFIER_assert_~expression; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, __VERIFIER_assert_~expression=0, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L5] -1 assert false; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, __VERIFIER_assert_~expression=0, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] ----- ----- class de.uni_freiburg.informatik.ultimate.boogie.preprocessor.BoogiePreprocessorBacktranslator [?] -1 #NULL.base, #NULL.offset := 0, 0; VAL [#NULL.base=0, #NULL.offset=0] [?] -1 #valid := #valid[0 := 0]; VAL [#NULL.base=0, #NULL.offset=0] [L672] -1 ~__unbuffered_cnt~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0] [L674] -1 ~__unbuffered_p0_EAX~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0] [L676] -1 ~__unbuffered_p0_EBX~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0] [L678] -1 ~__unbuffered_p1_EAX~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0] [L680] -1 ~__unbuffered_p1_EBX~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0] [L681] -1 ~main$tmp_guard0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0] [L682] -1 ~main$tmp_guard1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [L684] -1 ~x~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [L686] -1 ~y~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0] [L687] -1 ~y$flush_delayed~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y~0=0] [L688] -1 ~y$mem_tmp~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y~0=0] [L689] -1 ~y$r_buff0_thd0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y~0=0] [L690] -1 ~y$r_buff0_thd1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y~0=0] [L691] -1 ~y$r_buff0_thd2~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y~0=0] [L692] -1 ~y$r_buff1_thd0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y~0=0] [L693] -1 ~y$r_buff1_thd1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y~0=0] [L694] -1 ~y$r_buff1_thd2~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y~0=0] [L695] -1 ~y$read_delayed~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed~0=0, ~y~0=0] [L696] -1 ~y$read_delayed_var~0.base, ~y$read_delayed_var~0.offset := 0, 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y~0=0] [L697] -1 ~y$w_buff0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0~0=0, ~y~0=0] [L698] -1 ~y$w_buff0_used~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y~0=0] [L699] -1 ~y$w_buff1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1~0=0, ~y~0=0] [L700] -1 ~y$w_buff1_used~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L701] -1 ~weak$$choice0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L702] -1 ~weak$$choice2~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 havoc main_#res; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 havoc main_#t~nondet57, main_#t~nondet58, main_#t~ite60, main_#t~ite59, main_#t~ite61, main_#t~ite62, main_#t~ite63, main_#t~ite64, main_~#t1729~0.base, main_~#t1729~0.offset, main_~#t1730~0.base, main_~#t1730~0.offset; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L789] -1 call main_~#t1729~0.base, main_~#t1729~0.offset := #Ultimate.alloc(4); VAL [#NULL.base=0, #NULL.offset=0, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L790] -1 call write~int(0, main_~#t1729~0.base, main_~#t1729~0.offset, 4); VAL [#NULL.base=0, #NULL.offset=0, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L790] FORK -1 fork 0 P0(0, 0); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L790] -1 havoc main_#t~nondet57; VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L791] -1 call main_~#t1730~0.base, main_~#t1730~0.offset := #Ultimate.alloc(4); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L792] -1 call write~int(1, main_~#t1730~0.base, main_~#t1730~0.offset, 4); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L792] FORK -1 fork 1 P1(0, 0); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L734-L777] 0 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset; [L737] 0 ~y$w_buff1~0 := ~y$w_buff0~0; [L738] 0 ~y$w_buff0~0 := 1; [L739] 0 ~y$w_buff1_used~0 := ~y$w_buff0_used~0; [L740] 0 ~y$w_buff0_used~0 := 1; [L741] 0 __VERIFIER_assert_#in~expression := (if !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$w_buff0_used~0 % 256) then 1 else 0); [L741] 0 havoc __VERIFIER_assert_~expression; [L5] 0 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L5] 0 assume !(0 == __VERIFIER_assert_~expression); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L742] 0 ~y$r_buff1_thd0~0 := ~y$r_buff0_thd0~0; [L743] 0 ~y$r_buff1_thd1~0 := ~y$r_buff0_thd1~0; [L744] 0 ~y$r_buff1_thd2~0 := ~y$r_buff0_thd2~0; [L745] 0 ~y$r_buff0_thd2~0 := 1; [L748] 0 ~weak$$choice0~0 := #t~nondet27; [L748] 0 havoc #t~nondet27; [L749] 0 ~weak$$choice2~0 := #t~nondet28; [L749] 0 havoc #t~nondet28; [L750] 0 ~y$flush_delayed~0 := ~weak$$choice2~0; [L751] 0 ~y$mem_tmp~0 := ~y~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L752] 0 assume !((0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd2~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd2~0 % 256 && 0 == ~y$r_buff1_thd2~0 % 256)); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L752] 0 assume 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256; [L752] 0 #t~ite29 := ~y$w_buff0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite29=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L752] 0 #t~ite30 := #t~ite29; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite29=1, #t~ite30=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L752] 0 ~y~0 := #t~ite30; [L752] 0 havoc #t~ite29; [L752] 0 havoc #t~ite30; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L753] 0 assume 0 != ~weak$$choice2~0 % 256; [L753] 0 #t~ite33 := ~y$w_buff0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite33=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L753] 0 ~y$w_buff0~0 := #t~ite33; [L753] 0 havoc #t~ite33; [L753] 0 havoc #t~ite32; [L753] 0 havoc #t~ite31; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L754] 0 assume 0 != ~weak$$choice2~0 % 256; [L754] 0 #t~ite36 := ~y$w_buff1~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite36=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L754] 0 ~y$w_buff1~0 := #t~ite36; [L754] 0 havoc #t~ite36; [L754] 0 havoc #t~ite35; [L754] 0 havoc #t~ite34; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L755] 0 assume 0 != ~weak$$choice2~0 % 256; [L755] 0 #t~ite39 := ~y$w_buff0_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite39=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L755] 0 ~y$w_buff0_used~0 := #t~ite39; [L755] 0 havoc #t~ite38; [L755] 0 havoc #t~ite37; [L755] 0 havoc #t~ite39; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L756] 0 assume 0 != ~weak$$choice2~0 % 256; [L756] 0 #t~ite42 := ~y$w_buff1_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite42=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L756] 0 ~y$w_buff1_used~0 := #t~ite42; [L756] 0 havoc #t~ite42; [L756] 0 havoc #t~ite41; [L756] 0 havoc #t~ite40; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L757] 0 assume 0 != ~weak$$choice2~0 % 256; [L757] 0 #t~ite45 := ~y$r_buff0_thd2~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite45=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L757] 0 ~y$r_buff0_thd2~0 := #t~ite45; [L757] 0 havoc #t~ite45; [L757] 0 havoc #t~ite44; [L757] 0 havoc #t~ite43; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L758] 0 assume 0 != ~weak$$choice2~0 % 256; [L758] 0 #t~ite48 := ~y$r_buff1_thd2~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite48=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L758] 0 ~y$r_buff1_thd2~0 := #t~ite48; [L758] 0 havoc #t~ite48; [L758] 0 havoc #t~ite46; [L758] 0 havoc #t~ite47; [L759] 0 ~__unbuffered_p1_EAX~0 := ~y~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L760] 0 assume 0 != ~y$flush_delayed~0 % 256; [L760] 0 #t~ite49 := ~y$mem_tmp~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite49=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L760] 0 ~y~0 := #t~ite49; [L760] 0 havoc #t~ite49; [L761] 0 ~y$flush_delayed~0 := 0; [L764] 0 ~__unbuffered_p1_EBX~0 := ~x~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L767] 0 assume 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256; [L767] 0 #t~ite51 := ~y$w_buff0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite51=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L703-L733] 1 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset; [L706] 1 ~x~0 := 1; [L709] 1 ~__unbuffered_p0_EAX~0 := ~x~0; [L712] 1 ~weak$$choice0~0 := #t~nondet3; [L712] 1 havoc #t~nondet3; [L713] 1 ~weak$$choice2~0 := #t~nondet4; [L713] 1 havoc #t~nondet4; [L714] 1 ~y$flush_delayed~0 := ~weak$$choice2~0; [L715] 1 ~y$mem_tmp~0 := ~y~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite51=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L716] 1 assume (0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd1~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd1~0 % 256 && 0 == ~y$r_buff1_thd1~0 % 256); [L716] 1 #t~ite6 := ~y~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite51=1, #t~ite6=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L767] 0 ~y~0 := #t~ite51; [L767] 0 havoc #t~ite51; [L767] 0 havoc #t~ite50; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite6=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L768] 0 assume 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256; [L768] 0 #t~ite52 := 0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite52=0, #t~ite6=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L768] 0 ~y$w_buff0_used~0 := #t~ite52; [L768] 0 havoc #t~ite52; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite6=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L769] 0 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)); [L769] 0 #t~ite53 := ~y$w_buff1_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite53=0, #t~ite6=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L716] 1 ~y~0 := #t~ite6; [L716] 1 havoc #t~ite6; [L716] 1 havoc #t~ite5; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite53=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L717] 1 assume 0 != ~weak$$choice2~0 % 256; [L717] 1 #t~ite9 := ~y$w_buff0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite53=0, #t~ite9=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L717] 1 ~y$w_buff0~0 := #t~ite9; [L717] 1 havoc #t~ite7; [L717] 1 havoc #t~ite9; [L717] 1 havoc #t~ite8; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite53=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L718] 1 assume 0 != ~weak$$choice2~0 % 256; [L718] 1 #t~ite12 := ~y$w_buff1~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite12=0, #t~ite53=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L718] 1 ~y$w_buff1~0 := #t~ite12; [L718] 1 havoc #t~ite12; [L718] 1 havoc #t~ite10; [L718] 1 havoc #t~ite11; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite53=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L719] 1 assume 0 != ~weak$$choice2~0 % 256; [L719] 1 #t~ite15 := ~y$w_buff0_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite15=0, #t~ite53=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L719] 1 ~y$w_buff0_used~0 := #t~ite15; [L719] 1 havoc #t~ite14; [L719] 1 havoc #t~ite13; [L719] 1 havoc #t~ite15; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite53=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L720] 1 assume 0 != ~weak$$choice2~0 % 256; [L720] 1 #t~ite18 := ~y$w_buff1_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite18=0, #t~ite53=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L769] 0 ~y$w_buff1_used~0 := #t~ite53; [L769] 0 havoc #t~ite53; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite18=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L770] 0 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256); [L770] 0 #t~ite54 := ~y$r_buff0_thd2~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite18=0, #t~ite54=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L770] 0 ~y$r_buff0_thd2~0 := #t~ite54; [L770] 0 havoc #t~ite54; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite18=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L771] 0 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)); [L771] 0 #t~ite55 := ~y$r_buff1_thd2~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite18=0, #t~ite55=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L771] 0 ~y$r_buff1_thd2~0 := #t~ite55; [L771] 0 havoc #t~ite55; [L774] 0 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite18=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L720] 1 ~y$w_buff1_used~0 := #t~ite18; [L720] 1 havoc #t~ite18; [L720] 1 havoc #t~ite17; [L720] 1 havoc #t~ite16; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L721] 1 assume 0 != ~weak$$choice2~0 % 256; [L721] 1 #t~ite21 := ~y$r_buff0_thd1~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite21=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L721] 1 ~y$r_buff0_thd1~0 := #t~ite21; [L721] 1 havoc #t~ite21; [L721] 1 havoc #t~ite20; [L721] 1 havoc #t~ite19; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L722] 1 assume 0 != ~weak$$choice2~0 % 256; [L722] 1 #t~ite24 := ~y$r_buff1_thd1~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite24=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L722] 1 ~y$r_buff1_thd1~0 := #t~ite24; [L722] 1 havoc #t~ite24; [L722] 1 havoc #t~ite22; [L722] 1 havoc #t~ite23; [L723] 1 ~__unbuffered_p0_EBX~0 := ~y~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L724] 1 assume 0 != ~y$flush_delayed~0 % 256; [L724] 1 #t~ite25 := ~y$mem_tmp~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite25=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L724] 1 ~y~0 := #t~ite25; [L724] 1 havoc #t~ite25; [L725] 1 ~y$flush_delayed~0 := 0; [L730] 1 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L792] -1 havoc main_#t~nondet58; [L794] -1 ~main$tmp_guard0~0 := (if 0 == (if 2 == ~__unbuffered_cnt~0 then 1 else 0) then 0 else 1); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L796] -1 assume 0 != ~main$tmp_guard0~0 % 256; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L798] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L798] -1 assume !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256); [L798] -1 main_#t~ite59 := ~y~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite59=0, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L798] -1 main_#t~ite60 := main_#t~ite59; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite59=0, main_#t~ite60=0, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L798] -1 ~y~0 := main_#t~ite60; [L798] -1 havoc main_#t~ite60; [L798] -1 havoc main_#t~ite59; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L799] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256); [L799] -1 main_#t~ite61 := ~y$w_buff0_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite61=0, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L799] -1 ~y$w_buff0_used~0 := main_#t~ite61; [L799] -1 havoc main_#t~ite61; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L800] -1 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)); [L800] -1 main_#t~ite62 := ~y$w_buff1_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite62=0, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L800] -1 ~y$w_buff1_used~0 := main_#t~ite62; [L800] -1 havoc main_#t~ite62; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L801] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256); [L801] -1 main_#t~ite63 := ~y$r_buff0_thd0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite63=0, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L801] -1 ~y$r_buff0_thd0~0 := main_#t~ite63; [L801] -1 havoc main_#t~ite63; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L802] -1 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)); [L802] -1 main_#t~ite64 := ~y$r_buff1_thd0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite64=0, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L802] -1 ~y$r_buff1_thd0~0 := main_#t~ite64; [L802] -1 havoc main_#t~ite64; [L805] -1 ~main$tmp_guard1~0 := (if 0 == (if !(((1 == ~__unbuffered_p0_EAX~0 && 0 == ~__unbuffered_p0_EBX~0) && 1 == ~__unbuffered_p1_EAX~0) && 0 == ~__unbuffered_p1_EBX~0) then 1 else 0) then 0 else 1); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L807] -1 __VERIFIER_assert_#in~expression := ~main$tmp_guard1~0 % 256; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L807] -1 havoc __VERIFIER_assert_~expression; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L5] -1 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, __VERIFIER_assert_~expression=0, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L5] -1 assume 0 == __VERIFIER_assert_~expression; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, __VERIFIER_assert_~expression=0, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L5] -1 assert false; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, __VERIFIER_assert_~expression=0, main_~#t1729~0.base=6, main_~#t1729~0.offset=0, main_~#t1730~0.base=7, main_~#t1730~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 #NULL := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0] [?] -1 #valid[0] := 0; VAL [#NULL!base=0, #NULL!offset=0] [L672] -1 ~__unbuffered_cnt~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0] [L674] -1 ~__unbuffered_p0_EAX~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0] [L676] -1 ~__unbuffered_p0_EBX~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0] [L678] -1 ~__unbuffered_p1_EAX~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0] [L680] -1 ~__unbuffered_p1_EBX~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0] [L681] -1 ~main$tmp_guard0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0] [L682] -1 ~main$tmp_guard1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [L684] -1 ~x~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [L686] -1 ~y~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0] [L687] -1 ~y$flush_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y~0=0] [L688] -1 ~y$mem_tmp~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y~0=0] [L689] -1 ~y$r_buff0_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y~0=0] [L690] -1 ~y$r_buff0_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y~0=0] [L691] -1 ~y$r_buff0_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y~0=0] [L692] -1 ~y$r_buff1_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y~0=0] [L693] -1 ~y$r_buff1_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y~0=0] [L694] -1 ~y$r_buff1_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y~0=0] [L695] -1 ~y$read_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed~0=0, ~y~0=0] [L696] -1 ~y$read_delayed_var~0 := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y~0=0] [L697] -1 ~y$w_buff0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0~0=0, ~y~0=0] [L698] -1 ~y$w_buff0_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y~0=0] [L699] -1 ~y$w_buff1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1~0=0, ~y~0=0] [L700] -1 ~y$w_buff1_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L701] -1 ~weak$$choice0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L702] -1 ~weak$$choice2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 havoc main_#res; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 havoc main_#t~nondet57, main_#t~nondet58, main_#t~ite60, main_#t~ite59, main_#t~ite61, main_#t~ite62, main_#t~ite63, main_#t~ite64, main_~#t1729~0, main_~#t1730~0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L789] FCALL -1 call main_~#t1729~0 := #Ultimate.alloc(4); VAL [#NULL!base=0, #NULL!offset=0, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L790] FCALL -1 call write~int(0, main_~#t1729~0, 4); VAL [#NULL!base=0, #NULL!offset=0, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L790] FORK -1 fork 0 P0({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L790] -1 havoc main_#t~nondet57; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L791] FCALL -1 call main_~#t1730~0 := #Ultimate.alloc(4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L792] FCALL -1 call write~int(1, main_~#t1730~0, 4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L792] FORK -1 fork 1 P1({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L734-L777] 0 ~arg := #in~arg; [L737] 0 ~y$w_buff1~0 := ~y$w_buff0~0; [L738] 0 ~y$w_buff0~0 := 1; [L739] 0 ~y$w_buff1_used~0 := ~y$w_buff0_used~0; [L740] 0 ~y$w_buff0_used~0 := 1; [L741] 0 __VERIFIER_assert_#in~expression := (if !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$w_buff0_used~0 % 256) then 1 else 0); [L741] 0 havoc __VERIFIER_assert_~expression; [L5] 0 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L5] COND FALSE 0 !(0 == __VERIFIER_assert_~expression) VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L742] 0 ~y$r_buff1_thd0~0 := ~y$r_buff0_thd0~0; [L743] 0 ~y$r_buff1_thd1~0 := ~y$r_buff0_thd1~0; [L744] 0 ~y$r_buff1_thd2~0 := ~y$r_buff0_thd2~0; [L745] 0 ~y$r_buff0_thd2~0 := 1; [L748] 0 ~weak$$choice0~0 := #t~nondet27; [L748] 0 havoc #t~nondet27; [L749] 0 ~weak$$choice2~0 := #t~nondet28; [L749] 0 havoc #t~nondet28; [L750] 0 ~y$flush_delayed~0 := ~weak$$choice2~0; [L751] 0 ~y$mem_tmp~0 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L752] COND FALSE 0 !((0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd2~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd2~0 % 256 && 0 == ~y$r_buff1_thd2~0 % 256)) VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L752] COND TRUE 0 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256 [L752] 0 #t~ite29 := ~y$w_buff0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite29=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L752] 0 #t~ite30 := #t~ite29; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite29=1, #t~ite30=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L752] 0 ~y~0 := #t~ite30; [L752] 0 havoc #t~ite29; [L752] 0 havoc #t~ite30; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L753] COND TRUE 0 0 != ~weak$$choice2~0 % 256 [L753] 0 #t~ite33 := ~y$w_buff0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite33=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L753] 0 ~y$w_buff0~0 := #t~ite33; [L753] 0 havoc #t~ite33; [L753] 0 havoc #t~ite32; [L753] 0 havoc #t~ite31; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L754] COND TRUE 0 0 != ~weak$$choice2~0 % 256 [L754] 0 #t~ite36 := ~y$w_buff1~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite36=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L754] 0 ~y$w_buff1~0 := #t~ite36; [L754] 0 havoc #t~ite36; [L754] 0 havoc #t~ite35; [L754] 0 havoc #t~ite34; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L755] COND TRUE 0 0 != ~weak$$choice2~0 % 256 [L755] 0 #t~ite39 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite39=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L755] 0 ~y$w_buff0_used~0 := #t~ite39; [L755] 0 havoc #t~ite38; [L755] 0 havoc #t~ite37; [L755] 0 havoc #t~ite39; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L756] COND TRUE 0 0 != ~weak$$choice2~0 % 256 [L756] 0 #t~ite42 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite42=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L756] 0 ~y$w_buff1_used~0 := #t~ite42; [L756] 0 havoc #t~ite42; [L756] 0 havoc #t~ite41; [L756] 0 havoc #t~ite40; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L757] COND TRUE 0 0 != ~weak$$choice2~0 % 256 [L757] 0 #t~ite45 := ~y$r_buff0_thd2~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite45=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L757] 0 ~y$r_buff0_thd2~0 := #t~ite45; [L757] 0 havoc #t~ite45; [L757] 0 havoc #t~ite44; [L757] 0 havoc #t~ite43; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L758] COND TRUE 0 0 != ~weak$$choice2~0 % 256 [L758] 0 #t~ite48 := ~y$r_buff1_thd2~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite48=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L758] 0 ~y$r_buff1_thd2~0 := #t~ite48; [L758] 0 havoc #t~ite48; [L758] 0 havoc #t~ite46; [L758] 0 havoc #t~ite47; [L759] 0 ~__unbuffered_p1_EAX~0 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L760] COND TRUE 0 0 != ~y$flush_delayed~0 % 256 [L760] 0 #t~ite49 := ~y$mem_tmp~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite49=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L760] 0 ~y~0 := #t~ite49; [L760] 0 havoc #t~ite49; [L761] 0 ~y$flush_delayed~0 := 0; [L764] 0 ~__unbuffered_p1_EBX~0 := ~x~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L767] COND TRUE 0 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256 [L767] 0 #t~ite51 := ~y$w_buff0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite51=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L703-L733] 1 ~arg := #in~arg; [L706] 1 ~x~0 := 1; [L709] 1 ~__unbuffered_p0_EAX~0 := ~x~0; [L712] 1 ~weak$$choice0~0 := #t~nondet3; [L712] 1 havoc #t~nondet3; [L713] 1 ~weak$$choice2~0 := #t~nondet4; [L713] 1 havoc #t~nondet4; [L714] 1 ~y$flush_delayed~0 := ~weak$$choice2~0; [L715] 1 ~y$mem_tmp~0 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite51=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L716] COND TRUE 1 (0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd1~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd1~0 % 256 && 0 == ~y$r_buff1_thd1~0 % 256) [L716] 1 #t~ite6 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite51=1, #t~ite6=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L767] 0 ~y~0 := #t~ite51; [L767] 0 havoc #t~ite51; [L767] 0 havoc #t~ite50; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite6=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L768] COND TRUE 0 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256 [L768] 0 #t~ite52 := 0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite52=0, #t~ite6=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L768] 0 ~y$w_buff0_used~0 := #t~ite52; [L768] 0 havoc #t~ite52; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite6=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L769] COND FALSE 0 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)) [L769] 0 #t~ite53 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite53=0, #t~ite6=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L716] 1 ~y~0 := #t~ite6; [L716] 1 havoc #t~ite6; [L716] 1 havoc #t~ite5; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite53=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L717] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L717] 1 #t~ite9 := ~y$w_buff0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite53=0, #t~ite9=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L717] 1 ~y$w_buff0~0 := #t~ite9; [L717] 1 havoc #t~ite7; [L717] 1 havoc #t~ite9; [L717] 1 havoc #t~ite8; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite53=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L718] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L718] 1 #t~ite12 := ~y$w_buff1~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite12=0, #t~ite53=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L718] 1 ~y$w_buff1~0 := #t~ite12; [L718] 1 havoc #t~ite12; [L718] 1 havoc #t~ite10; [L718] 1 havoc #t~ite11; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite53=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L719] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L719] 1 #t~ite15 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite15=0, #t~ite53=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L719] 1 ~y$w_buff0_used~0 := #t~ite15; [L719] 1 havoc #t~ite14; [L719] 1 havoc #t~ite13; [L719] 1 havoc #t~ite15; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite53=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L720] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L720] 1 #t~ite18 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite18=0, #t~ite53=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L769] 0 ~y$w_buff1_used~0 := #t~ite53; [L769] 0 havoc #t~ite53; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite18=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L770] COND FALSE 0 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) [L770] 0 #t~ite54 := ~y$r_buff0_thd2~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite18=0, #t~ite54=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L770] 0 ~y$r_buff0_thd2~0 := #t~ite54; [L770] 0 havoc #t~ite54; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite18=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L771] COND FALSE 0 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)) [L771] 0 #t~ite55 := ~y$r_buff1_thd2~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite18=0, #t~ite55=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L771] 0 ~y$r_buff1_thd2~0 := #t~ite55; [L771] 0 havoc #t~ite55; [L774] 0 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite18=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L720] 1 ~y$w_buff1_used~0 := #t~ite18; [L720] 1 havoc #t~ite18; [L720] 1 havoc #t~ite17; [L720] 1 havoc #t~ite16; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L721] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L721] 1 #t~ite21 := ~y$r_buff0_thd1~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite21=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L721] 1 ~y$r_buff0_thd1~0 := #t~ite21; [L721] 1 havoc #t~ite21; [L721] 1 havoc #t~ite20; [L721] 1 havoc #t~ite19; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L722] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L722] 1 #t~ite24 := ~y$r_buff1_thd1~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite24=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L722] 1 ~y$r_buff1_thd1~0 := #t~ite24; [L722] 1 havoc #t~ite24; [L722] 1 havoc #t~ite22; [L722] 1 havoc #t~ite23; [L723] 1 ~__unbuffered_p0_EBX~0 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L724] COND TRUE 1 0 != ~y$flush_delayed~0 % 256 [L724] 1 #t~ite25 := ~y$mem_tmp~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite25=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L724] 1 ~y~0 := #t~ite25; [L724] 1 havoc #t~ite25; [L725] 1 ~y$flush_delayed~0 := 0; [L730] 1 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L792] -1 havoc main_#t~nondet58; [L794] -1 ~main$tmp_guard0~0 := (if 0 == (if 2 == ~__unbuffered_cnt~0 then 1 else 0) then 0 else 1); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L796] -1 assume 0 != ~main$tmp_guard0~0 % 256; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L798] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L798] COND FALSE -1 !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256) [L798] -1 main_#t~ite59 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite59=0, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L798] -1 main_#t~ite60 := main_#t~ite59; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite59=0, main_#t~ite60=0, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L798] -1 ~y~0 := main_#t~ite60; [L798] -1 havoc main_#t~ite60; [L798] -1 havoc main_#t~ite59; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L799] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) [L799] -1 main_#t~ite61 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite61=0, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L799] -1 ~y$w_buff0_used~0 := main_#t~ite61; [L799] -1 havoc main_#t~ite61; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L800] COND FALSE -1 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)) [L800] -1 main_#t~ite62 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite62=0, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L800] -1 ~y$w_buff1_used~0 := main_#t~ite62; [L800] -1 havoc main_#t~ite62; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L801] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) [L801] -1 main_#t~ite63 := ~y$r_buff0_thd0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite63=0, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L801] -1 ~y$r_buff0_thd0~0 := main_#t~ite63; [L801] -1 havoc main_#t~ite63; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L802] COND FALSE -1 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)) [L802] -1 main_#t~ite64 := ~y$r_buff1_thd0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite64=0, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L802] -1 ~y$r_buff1_thd0~0 := main_#t~ite64; [L802] -1 havoc main_#t~ite64; [L805] -1 ~main$tmp_guard1~0 := (if 0 == (if !(((1 == ~__unbuffered_p0_EAX~0 && 0 == ~__unbuffered_p0_EBX~0) && 1 == ~__unbuffered_p1_EAX~0) && 0 == ~__unbuffered_p1_EBX~0) then 1 else 0) then 0 else 1); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L807] -1 __VERIFIER_assert_#in~expression := ~main$tmp_guard1~0 % 256; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L807] -1 havoc __VERIFIER_assert_~expression; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L5] -1 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, __VERIFIER_assert_~expression=0, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L5] COND TRUE -1 0 == __VERIFIER_assert_~expression VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, __VERIFIER_assert_~expression=0, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L5] -1 assert false; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, __VERIFIER_assert_~expression=0, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] ----- ----- class de.uni_freiburg.informatik.ultimate.boogie.procedureinliner.backtranslation.InlinerBacktranslator [?] -1 #NULL := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0] [?] -1 #valid[0] := 0; VAL [#NULL!base=0, #NULL!offset=0] [L672] -1 ~__unbuffered_cnt~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0] [L674] -1 ~__unbuffered_p0_EAX~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0] [L676] -1 ~__unbuffered_p0_EBX~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0] [L678] -1 ~__unbuffered_p1_EAX~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0] [L680] -1 ~__unbuffered_p1_EBX~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0] [L681] -1 ~main$tmp_guard0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0] [L682] -1 ~main$tmp_guard1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [L684] -1 ~x~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [L686] -1 ~y~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0] [L687] -1 ~y$flush_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y~0=0] [L688] -1 ~y$mem_tmp~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y~0=0] [L689] -1 ~y$r_buff0_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y~0=0] [L690] -1 ~y$r_buff0_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y~0=0] [L691] -1 ~y$r_buff0_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y~0=0] [L692] -1 ~y$r_buff1_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y~0=0] [L693] -1 ~y$r_buff1_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y~0=0] [L694] -1 ~y$r_buff1_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y~0=0] [L695] -1 ~y$read_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed~0=0, ~y~0=0] [L696] -1 ~y$read_delayed_var~0 := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y~0=0] [L697] -1 ~y$w_buff0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0~0=0, ~y~0=0] [L698] -1 ~y$w_buff0_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y~0=0] [L699] -1 ~y$w_buff1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1~0=0, ~y~0=0] [L700] -1 ~y$w_buff1_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L701] -1 ~weak$$choice0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L702] -1 ~weak$$choice2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 havoc main_#res; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 havoc main_#t~nondet57, main_#t~nondet58, main_#t~ite60, main_#t~ite59, main_#t~ite61, main_#t~ite62, main_#t~ite63, main_#t~ite64, main_~#t1729~0, main_~#t1730~0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L789] FCALL -1 call main_~#t1729~0 := #Ultimate.alloc(4); VAL [#NULL!base=0, #NULL!offset=0, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L790] FCALL -1 call write~int(0, main_~#t1729~0, 4); VAL [#NULL!base=0, #NULL!offset=0, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L790] FORK -1 fork 0 P0({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L790] -1 havoc main_#t~nondet57; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L791] FCALL -1 call main_~#t1730~0 := #Ultimate.alloc(4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L792] FCALL -1 call write~int(1, main_~#t1730~0, 4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L792] FORK -1 fork 1 P1({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L734-L777] 0 ~arg := #in~arg; [L737] 0 ~y$w_buff1~0 := ~y$w_buff0~0; [L738] 0 ~y$w_buff0~0 := 1; [L739] 0 ~y$w_buff1_used~0 := ~y$w_buff0_used~0; [L740] 0 ~y$w_buff0_used~0 := 1; [L741] 0 __VERIFIER_assert_#in~expression := (if !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$w_buff0_used~0 % 256) then 1 else 0); [L741] 0 havoc __VERIFIER_assert_~expression; [L5] 0 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L5] COND FALSE 0 !(0 == __VERIFIER_assert_~expression) VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L742] 0 ~y$r_buff1_thd0~0 := ~y$r_buff0_thd0~0; [L743] 0 ~y$r_buff1_thd1~0 := ~y$r_buff0_thd1~0; [L744] 0 ~y$r_buff1_thd2~0 := ~y$r_buff0_thd2~0; [L745] 0 ~y$r_buff0_thd2~0 := 1; [L748] 0 ~weak$$choice0~0 := #t~nondet27; [L748] 0 havoc #t~nondet27; [L749] 0 ~weak$$choice2~0 := #t~nondet28; [L749] 0 havoc #t~nondet28; [L750] 0 ~y$flush_delayed~0 := ~weak$$choice2~0; [L751] 0 ~y$mem_tmp~0 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L752] COND FALSE 0 !((0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd2~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd2~0 % 256 && 0 == ~y$r_buff1_thd2~0 % 256)) VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L752] COND TRUE 0 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256 [L752] 0 #t~ite29 := ~y$w_buff0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite29=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L752] 0 #t~ite30 := #t~ite29; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite29=1, #t~ite30=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L752] 0 ~y~0 := #t~ite30; [L752] 0 havoc #t~ite29; [L752] 0 havoc #t~ite30; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L753] COND TRUE 0 0 != ~weak$$choice2~0 % 256 [L753] 0 #t~ite33 := ~y$w_buff0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite33=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L753] 0 ~y$w_buff0~0 := #t~ite33; [L753] 0 havoc #t~ite33; [L753] 0 havoc #t~ite32; [L753] 0 havoc #t~ite31; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L754] COND TRUE 0 0 != ~weak$$choice2~0 % 256 [L754] 0 #t~ite36 := ~y$w_buff1~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite36=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L754] 0 ~y$w_buff1~0 := #t~ite36; [L754] 0 havoc #t~ite36; [L754] 0 havoc #t~ite35; [L754] 0 havoc #t~ite34; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L755] COND TRUE 0 0 != ~weak$$choice2~0 % 256 [L755] 0 #t~ite39 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite39=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L755] 0 ~y$w_buff0_used~0 := #t~ite39; [L755] 0 havoc #t~ite38; [L755] 0 havoc #t~ite37; [L755] 0 havoc #t~ite39; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L756] COND TRUE 0 0 != ~weak$$choice2~0 % 256 [L756] 0 #t~ite42 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite42=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L756] 0 ~y$w_buff1_used~0 := #t~ite42; [L756] 0 havoc #t~ite42; [L756] 0 havoc #t~ite41; [L756] 0 havoc #t~ite40; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L757] COND TRUE 0 0 != ~weak$$choice2~0 % 256 [L757] 0 #t~ite45 := ~y$r_buff0_thd2~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite45=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L757] 0 ~y$r_buff0_thd2~0 := #t~ite45; [L757] 0 havoc #t~ite45; [L757] 0 havoc #t~ite44; [L757] 0 havoc #t~ite43; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L758] COND TRUE 0 0 != ~weak$$choice2~0 % 256 [L758] 0 #t~ite48 := ~y$r_buff1_thd2~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite48=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L758] 0 ~y$r_buff1_thd2~0 := #t~ite48; [L758] 0 havoc #t~ite48; [L758] 0 havoc #t~ite46; [L758] 0 havoc #t~ite47; [L759] 0 ~__unbuffered_p1_EAX~0 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L760] COND TRUE 0 0 != ~y$flush_delayed~0 % 256 [L760] 0 #t~ite49 := ~y$mem_tmp~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite49=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L760] 0 ~y~0 := #t~ite49; [L760] 0 havoc #t~ite49; [L761] 0 ~y$flush_delayed~0 := 0; [L764] 0 ~__unbuffered_p1_EBX~0 := ~x~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L767] COND TRUE 0 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256 [L767] 0 #t~ite51 := ~y$w_buff0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite51=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L703-L733] 1 ~arg := #in~arg; [L706] 1 ~x~0 := 1; [L709] 1 ~__unbuffered_p0_EAX~0 := ~x~0; [L712] 1 ~weak$$choice0~0 := #t~nondet3; [L712] 1 havoc #t~nondet3; [L713] 1 ~weak$$choice2~0 := #t~nondet4; [L713] 1 havoc #t~nondet4; [L714] 1 ~y$flush_delayed~0 := ~weak$$choice2~0; [L715] 1 ~y$mem_tmp~0 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite51=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L716] COND TRUE 1 (0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd1~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd1~0 % 256 && 0 == ~y$r_buff1_thd1~0 % 256) [L716] 1 #t~ite6 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite51=1, #t~ite6=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L767] 0 ~y~0 := #t~ite51; [L767] 0 havoc #t~ite51; [L767] 0 havoc #t~ite50; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite6=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L768] COND TRUE 0 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256 [L768] 0 #t~ite52 := 0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite52=0, #t~ite6=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L768] 0 ~y$w_buff0_used~0 := #t~ite52; [L768] 0 havoc #t~ite52; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite6=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L769] COND FALSE 0 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)) [L769] 0 #t~ite53 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite53=0, #t~ite6=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L716] 1 ~y~0 := #t~ite6; [L716] 1 havoc #t~ite6; [L716] 1 havoc #t~ite5; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite53=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L717] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L717] 1 #t~ite9 := ~y$w_buff0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite53=0, #t~ite9=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L717] 1 ~y$w_buff0~0 := #t~ite9; [L717] 1 havoc #t~ite7; [L717] 1 havoc #t~ite9; [L717] 1 havoc #t~ite8; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite53=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L718] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L718] 1 #t~ite12 := ~y$w_buff1~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite12=0, #t~ite53=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L718] 1 ~y$w_buff1~0 := #t~ite12; [L718] 1 havoc #t~ite12; [L718] 1 havoc #t~ite10; [L718] 1 havoc #t~ite11; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite53=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L719] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L719] 1 #t~ite15 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite15=0, #t~ite53=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L719] 1 ~y$w_buff0_used~0 := #t~ite15; [L719] 1 havoc #t~ite14; [L719] 1 havoc #t~ite13; [L719] 1 havoc #t~ite15; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite53=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L720] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L720] 1 #t~ite18 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite18=0, #t~ite53=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L769] 0 ~y$w_buff1_used~0 := #t~ite53; [L769] 0 havoc #t~ite53; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite18=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L770] COND FALSE 0 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) [L770] 0 #t~ite54 := ~y$r_buff0_thd2~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite18=0, #t~ite54=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L770] 0 ~y$r_buff0_thd2~0 := #t~ite54; [L770] 0 havoc #t~ite54; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite18=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L771] COND FALSE 0 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)) [L771] 0 #t~ite55 := ~y$r_buff1_thd2~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite18=0, #t~ite55=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L771] 0 ~y$r_buff1_thd2~0 := #t~ite55; [L771] 0 havoc #t~ite55; [L774] 0 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite18=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L720] 1 ~y$w_buff1_used~0 := #t~ite18; [L720] 1 havoc #t~ite18; [L720] 1 havoc #t~ite17; [L720] 1 havoc #t~ite16; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L721] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L721] 1 #t~ite21 := ~y$r_buff0_thd1~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite21=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L721] 1 ~y$r_buff0_thd1~0 := #t~ite21; [L721] 1 havoc #t~ite21; [L721] 1 havoc #t~ite20; [L721] 1 havoc #t~ite19; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L722] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L722] 1 #t~ite24 := ~y$r_buff1_thd1~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite24=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L722] 1 ~y$r_buff1_thd1~0 := #t~ite24; [L722] 1 havoc #t~ite24; [L722] 1 havoc #t~ite22; [L722] 1 havoc #t~ite23; [L723] 1 ~__unbuffered_p0_EBX~0 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L724] COND TRUE 1 0 != ~y$flush_delayed~0 % 256 [L724] 1 #t~ite25 := ~y$mem_tmp~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite25=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L724] 1 ~y~0 := #t~ite25; [L724] 1 havoc #t~ite25; [L725] 1 ~y$flush_delayed~0 := 0; [L730] 1 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L792] -1 havoc main_#t~nondet58; [L794] -1 ~main$tmp_guard0~0 := (if 0 == (if 2 == ~__unbuffered_cnt~0 then 1 else 0) then 0 else 1); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L796] -1 assume 0 != ~main$tmp_guard0~0 % 256; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L798] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L798] COND FALSE -1 !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256) [L798] -1 main_#t~ite59 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite59=0, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L798] -1 main_#t~ite60 := main_#t~ite59; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite59=0, main_#t~ite60=0, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L798] -1 ~y~0 := main_#t~ite60; [L798] -1 havoc main_#t~ite60; [L798] -1 havoc main_#t~ite59; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L799] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) [L799] -1 main_#t~ite61 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite61=0, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L799] -1 ~y$w_buff0_used~0 := main_#t~ite61; [L799] -1 havoc main_#t~ite61; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L800] COND FALSE -1 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)) [L800] -1 main_#t~ite62 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite62=0, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L800] -1 ~y$w_buff1_used~0 := main_#t~ite62; [L800] -1 havoc main_#t~ite62; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L801] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) [L801] -1 main_#t~ite63 := ~y$r_buff0_thd0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite63=0, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L801] -1 ~y$r_buff0_thd0~0 := main_#t~ite63; [L801] -1 havoc main_#t~ite63; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L802] COND FALSE -1 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)) [L802] -1 main_#t~ite64 := ~y$r_buff1_thd0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite64=0, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L802] -1 ~y$r_buff1_thd0~0 := main_#t~ite64; [L802] -1 havoc main_#t~ite64; [L805] -1 ~main$tmp_guard1~0 := (if 0 == (if !(((1 == ~__unbuffered_p0_EAX~0 && 0 == ~__unbuffered_p0_EBX~0) && 1 == ~__unbuffered_p1_EAX~0) && 0 == ~__unbuffered_p1_EBX~0) then 1 else 0) then 0 else 1); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L807] -1 __VERIFIER_assert_#in~expression := ~main$tmp_guard1~0 % 256; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L807] -1 havoc __VERIFIER_assert_~expression; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L5] -1 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, __VERIFIER_assert_~expression=0, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L5] COND TRUE -1 0 == __VERIFIER_assert_~expression VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, __VERIFIER_assert_~expression=0, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L5] -1 assert false; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, __VERIFIER_assert_~expression=0, main_~#t1729~0!base=6, main_~#t1729~0!offset=0, main_~#t1730~0!base=7, main_~#t1730~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 #NULL := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0] [?] -1 #valid[0] := 0; VAL [#NULL!base=0, #NULL!offset=0] [L672] -1 ~__unbuffered_cnt~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0] [L674] -1 ~__unbuffered_p0_EAX~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0] [L676] -1 ~__unbuffered_p0_EBX~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0] [L678] -1 ~__unbuffered_p1_EAX~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0] [L680] -1 ~__unbuffered_p1_EBX~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0] [L681] -1 ~main$tmp_guard0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0] [L682] -1 ~main$tmp_guard1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [L684] -1 ~x~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [L686] -1 ~y~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0] [L687] -1 ~y$flush_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y~0=0] [L688] -1 ~y$mem_tmp~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y~0=0] [L689] -1 ~y$r_buff0_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y~0=0] [L690] -1 ~y$r_buff0_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y~0=0] [L691] -1 ~y$r_buff0_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y~0=0] [L692] -1 ~y$r_buff1_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y~0=0] [L693] -1 ~y$r_buff1_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y~0=0] [L694] -1 ~y$r_buff1_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y~0=0] [L695] -1 ~y$read_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed~0=0, ~y~0=0] [L696] -1 ~y$read_delayed_var~0 := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y~0=0] [L697] -1 ~y$w_buff0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0~0=0, ~y~0=0] [L698] -1 ~y$w_buff0_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y~0=0] [L699] -1 ~y$w_buff1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1~0=0, ~y~0=0] [L700] -1 ~y$w_buff1_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L701] -1 ~weak$$choice0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L702] -1 ~weak$$choice2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L789] FCALL -1 call ~#t1729~0 := #Ultimate.alloc(4); VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L790] FCALL -1 call write~int(0, ~#t1729~0, 4); VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L790] FORK -1 fork 0 P0({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L790] -1 havoc #t~nondet57; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L791] FCALL -1 call ~#t1730~0 := #Ultimate.alloc(4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L792] FCALL -1 call write~int(1, ~#t1730~0, 4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L792] FORK -1 fork 1 P1({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L734-L777] 0 ~arg := #in~arg; [L737] 0 ~y$w_buff1~0 := ~y$w_buff0~0; [L738] 0 ~y$w_buff0~0 := 1; [L739] 0 ~y$w_buff1_used~0 := ~y$w_buff0_used~0; [L740] 0 ~y$w_buff0_used~0 := 1; [L5] 0 ~expression := #in~expression; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L5] COND FALSE 0 !(0 == ~expression) VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L742] 0 ~y$r_buff1_thd0~0 := ~y$r_buff0_thd0~0; [L743] 0 ~y$r_buff1_thd1~0 := ~y$r_buff0_thd1~0; [L744] 0 ~y$r_buff1_thd2~0 := ~y$r_buff0_thd2~0; [L745] 0 ~y$r_buff0_thd2~0 := 1; [L748] 0 ~weak$$choice0~0 := #t~nondet27; [L748] 0 havoc #t~nondet27; [L749] 0 ~weak$$choice2~0 := #t~nondet28; [L749] 0 havoc #t~nondet28; [L750] 0 ~y$flush_delayed~0 := ~weak$$choice2~0; [L751] 0 ~y$mem_tmp~0 := ~y~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L752] COND FALSE 0 !((0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd2~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd2~0 % 256 && 0 == ~y$r_buff1_thd2~0 % 256)) VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L752] COND TRUE 0 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256 [L752] 0 #t~ite29 := ~y$w_buff0~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L752] 0 #t~ite30 := #t~ite29; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L752] 0 ~y~0 := #t~ite30; [L752] 0 havoc #t~ite29; [L752] 0 havoc #t~ite30; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L753] COND TRUE 0 0 != ~weak$$choice2~0 % 256 [L753] 0 #t~ite33 := ~y$w_buff0~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L753] 0 ~y$w_buff0~0 := #t~ite33; [L753] 0 havoc #t~ite33; [L753] 0 havoc #t~ite32; [L753] 0 havoc #t~ite31; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L754] COND TRUE 0 0 != ~weak$$choice2~0 % 256 [L754] 0 #t~ite36 := ~y$w_buff1~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L754] 0 ~y$w_buff1~0 := #t~ite36; [L754] 0 havoc #t~ite36; [L754] 0 havoc #t~ite35; [L754] 0 havoc #t~ite34; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L755] COND TRUE 0 0 != ~weak$$choice2~0 % 256 [L755] 0 #t~ite39 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L755] 0 ~y$w_buff0_used~0 := #t~ite39; [L755] 0 havoc #t~ite38; [L755] 0 havoc #t~ite37; [L755] 0 havoc #t~ite39; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L756] COND TRUE 0 0 != ~weak$$choice2~0 % 256 [L756] 0 #t~ite42 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L756] 0 ~y$w_buff1_used~0 := #t~ite42; [L756] 0 havoc #t~ite42; [L756] 0 havoc #t~ite41; [L756] 0 havoc #t~ite40; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L757] COND TRUE 0 0 != ~weak$$choice2~0 % 256 [L757] 0 #t~ite45 := ~y$r_buff0_thd2~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L757] 0 ~y$r_buff0_thd2~0 := #t~ite45; [L757] 0 havoc #t~ite45; [L757] 0 havoc #t~ite44; [L757] 0 havoc #t~ite43; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L758] COND TRUE 0 0 != ~weak$$choice2~0 % 256 [L758] 0 #t~ite48 := ~y$r_buff1_thd2~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L758] 0 ~y$r_buff1_thd2~0 := #t~ite48; [L758] 0 havoc #t~ite48; [L758] 0 havoc #t~ite46; [L758] 0 havoc #t~ite47; [L759] 0 ~__unbuffered_p1_EAX~0 := ~y~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L760] COND TRUE 0 0 != ~y$flush_delayed~0 % 256 [L760] 0 #t~ite49 := ~y$mem_tmp~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L760] 0 ~y~0 := #t~ite49; [L760] 0 havoc #t~ite49; [L761] 0 ~y$flush_delayed~0 := 0; [L764] 0 ~__unbuffered_p1_EBX~0 := ~x~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L767] COND TRUE 0 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256 [L767] 0 #t~ite51 := ~y$w_buff0~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L703-L733] 1 ~arg := #in~arg; [L706] 1 ~x~0 := 1; [L709] 1 ~__unbuffered_p0_EAX~0 := ~x~0; [L712] 1 ~weak$$choice0~0 := #t~nondet3; [L712] 1 havoc #t~nondet3; [L713] 1 ~weak$$choice2~0 := #t~nondet4; [L713] 1 havoc #t~nondet4; [L714] 1 ~y$flush_delayed~0 := ~weak$$choice2~0; [L715] 1 ~y$mem_tmp~0 := ~y~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L716] COND TRUE 1 (0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd1~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd1~0 % 256 && 0 == ~y$r_buff1_thd1~0 % 256) [L716] 1 #t~ite6 := ~y~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite6=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L767] 0 ~y~0 := #t~ite51; [L767] 0 havoc #t~ite51; [L767] 0 havoc #t~ite50; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite6=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L768] COND TRUE 0 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256 [L768] 0 #t~ite52 := 0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite6=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L768] 0 ~y$w_buff0_used~0 := #t~ite52; [L768] 0 havoc #t~ite52; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite6=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L769] COND FALSE 0 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)) [L769] 0 #t~ite53 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite6=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L716] 1 ~y~0 := #t~ite6; [L716] 1 havoc #t~ite6; [L716] 1 havoc #t~ite5; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L717] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L717] 1 #t~ite9 := ~y$w_buff0~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite9=1, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L717] 1 ~y$w_buff0~0 := #t~ite9; [L717] 1 havoc #t~ite7; [L717] 1 havoc #t~ite9; [L717] 1 havoc #t~ite8; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L718] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L718] 1 #t~ite12 := ~y$w_buff1~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite12=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L718] 1 ~y$w_buff1~0 := #t~ite12; [L718] 1 havoc #t~ite12; [L718] 1 havoc #t~ite10; [L718] 1 havoc #t~ite11; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L719] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L719] 1 #t~ite15 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite15=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L719] 1 ~y$w_buff0_used~0 := #t~ite15; [L719] 1 havoc #t~ite14; [L719] 1 havoc #t~ite13; [L719] 1 havoc #t~ite15; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L720] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L720] 1 #t~ite18 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite18=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L769] 0 ~y$w_buff1_used~0 := #t~ite53; [L769] 0 havoc #t~ite53; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite18=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L770] COND FALSE 0 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) [L770] 0 #t~ite54 := ~y$r_buff0_thd2~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite18=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L770] 0 ~y$r_buff0_thd2~0 := #t~ite54; [L770] 0 havoc #t~ite54; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite18=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L771] COND FALSE 0 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)) [L771] 0 #t~ite55 := ~y$r_buff1_thd2~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite18=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L771] 0 ~y$r_buff1_thd2~0 := #t~ite55; [L771] 0 havoc #t~ite55; [L774] 0 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite18=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L720] 1 ~y$w_buff1_used~0 := #t~ite18; [L720] 1 havoc #t~ite18; [L720] 1 havoc #t~ite17; [L720] 1 havoc #t~ite16; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L721] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L721] 1 #t~ite21 := ~y$r_buff0_thd1~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite21=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L721] 1 ~y$r_buff0_thd1~0 := #t~ite21; [L721] 1 havoc #t~ite21; [L721] 1 havoc #t~ite20; [L721] 1 havoc #t~ite19; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L722] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L722] 1 #t~ite24 := ~y$r_buff1_thd1~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite24=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L722] 1 ~y$r_buff1_thd1~0 := #t~ite24; [L722] 1 havoc #t~ite24; [L722] 1 havoc #t~ite22; [L722] 1 havoc #t~ite23; [L723] 1 ~__unbuffered_p0_EBX~0 := ~y~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L724] COND TRUE 1 0 != ~y$flush_delayed~0 % 256 [L724] 1 #t~ite25 := ~y$mem_tmp~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite25=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L724] 1 ~y~0 := #t~ite25; [L724] 1 havoc #t~ite25; [L725] 1 ~y$flush_delayed~0 := 0; [L730] 1 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L792] -1 havoc #t~nondet58; [L794] -1 ~main$tmp_guard0~0 := (if 0 == (if 2 == ~__unbuffered_cnt~0 then 1 else 0) then 0 else 1); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L796] -1 assume 0 != ~main$tmp_guard0~0 % 256; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L798] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L798] COND FALSE -1 !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256) [L798] -1 #t~ite59 := ~y~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L798] -1 #t~ite60 := #t~ite59; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L798] -1 ~y~0 := #t~ite60; [L798] -1 havoc #t~ite60; [L798] -1 havoc #t~ite59; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L799] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) [L799] -1 #t~ite61 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L799] -1 ~y$w_buff0_used~0 := #t~ite61; [L799] -1 havoc #t~ite61; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L800] COND FALSE -1 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)) [L800] -1 #t~ite62 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L800] -1 ~y$w_buff1_used~0 := #t~ite62; [L800] -1 havoc #t~ite62; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L801] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) [L801] -1 #t~ite63 := ~y$r_buff0_thd0~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L801] -1 ~y$r_buff0_thd0~0 := #t~ite63; [L801] -1 havoc #t~ite63; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L802] COND FALSE -1 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)) [L802] -1 #t~ite64 := ~y$r_buff1_thd0~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L802] -1 ~y$r_buff1_thd0~0 := #t~ite64; [L802] -1 havoc #t~ite64; [L805] -1 ~main$tmp_guard1~0 := (if 0 == (if !(((1 == ~__unbuffered_p0_EAX~0 && 0 == ~__unbuffered_p0_EBX~0) && 1 == ~__unbuffered_p1_EAX~0) && 0 == ~__unbuffered_p1_EBX~0) then 1 else 0) then 0 else 1); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L5] -1 ~expression := #in~expression; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L5] COND TRUE -1 0 == ~expression VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L5] -1 assert false; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] ----- ----- class de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.CACSL2BoogieBacktranslator [?] -1 #NULL := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0] [?] -1 #valid[0] := 0; VAL [#NULL!base=0, #NULL!offset=0] [L672] -1 ~__unbuffered_cnt~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0] [L674] -1 ~__unbuffered_p0_EAX~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0] [L676] -1 ~__unbuffered_p0_EBX~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0] [L678] -1 ~__unbuffered_p1_EAX~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0] [L680] -1 ~__unbuffered_p1_EBX~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0] [L681] -1 ~main$tmp_guard0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0] [L682] -1 ~main$tmp_guard1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [L684] -1 ~x~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [L686] -1 ~y~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0] [L687] -1 ~y$flush_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y~0=0] [L688] -1 ~y$mem_tmp~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y~0=0] [L689] -1 ~y$r_buff0_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y~0=0] [L690] -1 ~y$r_buff0_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y~0=0] [L691] -1 ~y$r_buff0_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y~0=0] [L692] -1 ~y$r_buff1_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y~0=0] [L693] -1 ~y$r_buff1_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y~0=0] [L694] -1 ~y$r_buff1_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y~0=0] [L695] -1 ~y$read_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed~0=0, ~y~0=0] [L696] -1 ~y$read_delayed_var~0 := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y~0=0] [L697] -1 ~y$w_buff0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0~0=0, ~y~0=0] [L698] -1 ~y$w_buff0_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y~0=0] [L699] -1 ~y$w_buff1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1~0=0, ~y~0=0] [L700] -1 ~y$w_buff1_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L701] -1 ~weak$$choice0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L702] -1 ~weak$$choice2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L789] FCALL -1 call ~#t1729~0 := #Ultimate.alloc(4); VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L790] FCALL -1 call write~int(0, ~#t1729~0, 4); VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L790] FORK -1 fork 0 P0({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L790] -1 havoc #t~nondet57; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L791] FCALL -1 call ~#t1730~0 := #Ultimate.alloc(4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L792] FCALL -1 call write~int(1, ~#t1730~0, 4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L792] FORK -1 fork 1 P1({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L734-L777] 0 ~arg := #in~arg; [L737] 0 ~y$w_buff1~0 := ~y$w_buff0~0; [L738] 0 ~y$w_buff0~0 := 1; [L739] 0 ~y$w_buff1_used~0 := ~y$w_buff0_used~0; [L740] 0 ~y$w_buff0_used~0 := 1; [L5] 0 ~expression := #in~expression; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L5] COND FALSE 0 !(0 == ~expression) VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L742] 0 ~y$r_buff1_thd0~0 := ~y$r_buff0_thd0~0; [L743] 0 ~y$r_buff1_thd1~0 := ~y$r_buff0_thd1~0; [L744] 0 ~y$r_buff1_thd2~0 := ~y$r_buff0_thd2~0; [L745] 0 ~y$r_buff0_thd2~0 := 1; [L748] 0 ~weak$$choice0~0 := #t~nondet27; [L748] 0 havoc #t~nondet27; [L749] 0 ~weak$$choice2~0 := #t~nondet28; [L749] 0 havoc #t~nondet28; [L750] 0 ~y$flush_delayed~0 := ~weak$$choice2~0; [L751] 0 ~y$mem_tmp~0 := ~y~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L752] COND FALSE 0 !((0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd2~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd2~0 % 256 && 0 == ~y$r_buff1_thd2~0 % 256)) VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L752] COND TRUE 0 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256 [L752] 0 #t~ite29 := ~y$w_buff0~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L752] 0 #t~ite30 := #t~ite29; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L752] 0 ~y~0 := #t~ite30; [L752] 0 havoc #t~ite29; [L752] 0 havoc #t~ite30; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L753] COND TRUE 0 0 != ~weak$$choice2~0 % 256 [L753] 0 #t~ite33 := ~y$w_buff0~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L753] 0 ~y$w_buff0~0 := #t~ite33; [L753] 0 havoc #t~ite33; [L753] 0 havoc #t~ite32; [L753] 0 havoc #t~ite31; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L754] COND TRUE 0 0 != ~weak$$choice2~0 % 256 [L754] 0 #t~ite36 := ~y$w_buff1~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L754] 0 ~y$w_buff1~0 := #t~ite36; [L754] 0 havoc #t~ite36; [L754] 0 havoc #t~ite35; [L754] 0 havoc #t~ite34; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L755] COND TRUE 0 0 != ~weak$$choice2~0 % 256 [L755] 0 #t~ite39 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L755] 0 ~y$w_buff0_used~0 := #t~ite39; [L755] 0 havoc #t~ite38; [L755] 0 havoc #t~ite37; [L755] 0 havoc #t~ite39; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L756] COND TRUE 0 0 != ~weak$$choice2~0 % 256 [L756] 0 #t~ite42 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L756] 0 ~y$w_buff1_used~0 := #t~ite42; [L756] 0 havoc #t~ite42; [L756] 0 havoc #t~ite41; [L756] 0 havoc #t~ite40; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L757] COND TRUE 0 0 != ~weak$$choice2~0 % 256 [L757] 0 #t~ite45 := ~y$r_buff0_thd2~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L757] 0 ~y$r_buff0_thd2~0 := #t~ite45; [L757] 0 havoc #t~ite45; [L757] 0 havoc #t~ite44; [L757] 0 havoc #t~ite43; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L758] COND TRUE 0 0 != ~weak$$choice2~0 % 256 [L758] 0 #t~ite48 := ~y$r_buff1_thd2~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L758] 0 ~y$r_buff1_thd2~0 := #t~ite48; [L758] 0 havoc #t~ite48; [L758] 0 havoc #t~ite46; [L758] 0 havoc #t~ite47; [L759] 0 ~__unbuffered_p1_EAX~0 := ~y~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L760] COND TRUE 0 0 != ~y$flush_delayed~0 % 256 [L760] 0 #t~ite49 := ~y$mem_tmp~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L760] 0 ~y~0 := #t~ite49; [L760] 0 havoc #t~ite49; [L761] 0 ~y$flush_delayed~0 := 0; [L764] 0 ~__unbuffered_p1_EBX~0 := ~x~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L767] COND TRUE 0 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256 [L767] 0 #t~ite51 := ~y$w_buff0~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=8, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L703-L733] 1 ~arg := #in~arg; [L706] 1 ~x~0 := 1; [L709] 1 ~__unbuffered_p0_EAX~0 := ~x~0; [L712] 1 ~weak$$choice0~0 := #t~nondet3; [L712] 1 havoc #t~nondet3; [L713] 1 ~weak$$choice2~0 := #t~nondet4; [L713] 1 havoc #t~nondet4; [L714] 1 ~y$flush_delayed~0 := ~weak$$choice2~0; [L715] 1 ~y$mem_tmp~0 := ~y~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L716] COND TRUE 1 (0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd1~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd1~0 % 256 && 0 == ~y$r_buff1_thd1~0 % 256) [L716] 1 #t~ite6 := ~y~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite6=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L767] 0 ~y~0 := #t~ite51; [L767] 0 havoc #t~ite51; [L767] 0 havoc #t~ite50; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite6=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L768] COND TRUE 0 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256 [L768] 0 #t~ite52 := 0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite6=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L768] 0 ~y$w_buff0_used~0 := #t~ite52; [L768] 0 havoc #t~ite52; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite6=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L769] COND FALSE 0 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)) [L769] 0 #t~ite53 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite6=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1] [L716] 1 ~y~0 := #t~ite6; [L716] 1 havoc #t~ite6; [L716] 1 havoc #t~ite5; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L717] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L717] 1 #t~ite9 := ~y$w_buff0~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite9=1, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L717] 1 ~y$w_buff0~0 := #t~ite9; [L717] 1 havoc #t~ite7; [L717] 1 havoc #t~ite9; [L717] 1 havoc #t~ite8; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L718] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L718] 1 #t~ite12 := ~y$w_buff1~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite12=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L718] 1 ~y$w_buff1~0 := #t~ite12; [L718] 1 havoc #t~ite12; [L718] 1 havoc #t~ite10; [L718] 1 havoc #t~ite11; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L719] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L719] 1 #t~ite15 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite15=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L719] 1 ~y$w_buff0_used~0 := #t~ite15; [L719] 1 havoc #t~ite14; [L719] 1 havoc #t~ite13; [L719] 1 havoc #t~ite15; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L720] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L720] 1 #t~ite18 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite18=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L769] 0 ~y$w_buff1_used~0 := #t~ite53; [L769] 0 havoc #t~ite53; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite18=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L770] COND FALSE 0 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) [L770] 0 #t~ite54 := ~y$r_buff0_thd2~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite18=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L770] 0 ~y$r_buff0_thd2~0 := #t~ite54; [L770] 0 havoc #t~ite54; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite18=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L771] COND FALSE 0 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)) [L771] 0 #t~ite55 := ~y$r_buff1_thd2~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite18=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L771] 0 ~y$r_buff1_thd2~0 := #t~ite55; [L771] 0 havoc #t~ite55; [L774] 0 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite18=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L720] 1 ~y$w_buff1_used~0 := #t~ite18; [L720] 1 havoc #t~ite18; [L720] 1 havoc #t~ite17; [L720] 1 havoc #t~ite16; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L721] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L721] 1 #t~ite21 := ~y$r_buff0_thd1~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite21=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L721] 1 ~y$r_buff0_thd1~0 := #t~ite21; [L721] 1 havoc #t~ite21; [L721] 1 havoc #t~ite20; [L721] 1 havoc #t~ite19; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L722] COND TRUE 1 0 != ~weak$$choice2~0 % 256 [L722] 1 #t~ite24 := ~y$r_buff1_thd1~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite24=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L722] 1 ~y$r_buff1_thd1~0 := #t~ite24; [L722] 1 havoc #t~ite24; [L722] 1 havoc #t~ite22; [L722] 1 havoc #t~ite23; [L723] 1 ~__unbuffered_p0_EBX~0 := ~y~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L724] COND TRUE 1 0 != ~y$flush_delayed~0 % 256 [L724] 1 #t~ite25 := ~y$mem_tmp~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite25=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L724] 1 ~y~0 := #t~ite25; [L724] 1 havoc #t~ite25; [L725] 1 ~y$flush_delayed~0 := 0; [L730] 1 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L792] -1 havoc #t~nondet58; [L794] -1 ~main$tmp_guard0~0 := (if 0 == (if 2 == ~__unbuffered_cnt~0 then 1 else 0) then 0 else 1); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L796] -1 assume 0 != ~main$tmp_guard0~0 % 256; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L798] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L798] COND FALSE -1 !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256) [L798] -1 #t~ite59 := ~y~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L798] -1 #t~ite60 := #t~ite59; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L798] -1 ~y~0 := #t~ite60; [L798] -1 havoc #t~ite60; [L798] -1 havoc #t~ite59; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L799] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) [L799] -1 #t~ite61 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L799] -1 ~y$w_buff0_used~0 := #t~ite61; [L799] -1 havoc #t~ite61; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L800] COND FALSE -1 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)) [L800] -1 #t~ite62 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L800] -1 ~y$w_buff1_used~0 := #t~ite62; [L800] -1 havoc #t~ite62; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L801] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) [L801] -1 #t~ite63 := ~y$r_buff0_thd0~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L801] -1 ~y$r_buff0_thd0~0 := #t~ite63; [L801] -1 havoc #t~ite63; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L802] COND FALSE -1 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)) [L802] -1 #t~ite64 := ~y$r_buff1_thd0~0; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L802] -1 ~y$r_buff1_thd0~0 := #t~ite64; [L802] -1 havoc #t~ite64; [L805] -1 ~main$tmp_guard1~0 := (if 0 == (if !(((1 == ~__unbuffered_p0_EAX~0 && 0 == ~__unbuffered_p0_EBX~0) && 1 == ~__unbuffered_p1_EAX~0) && 0 == ~__unbuffered_p1_EBX~0) then 1 else 0) then 0 else 1); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L5] -1 ~expression := #in~expression; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L5] COND TRUE -1 0 == ~expression VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L5] -1 assert false; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p0_EBX~0=0, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p1_EBX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=5, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L672] -1 int __unbuffered_cnt = 0; VAL [__unbuffered_cnt=0] [L674] -1 int __unbuffered_p0_EAX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0] [L676] -1 int __unbuffered_p0_EBX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0] [L678] -1 int __unbuffered_p1_EAX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=0] [L680] -1 int __unbuffered_p1_EBX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0] [L681] -1 _Bool main$tmp_guard0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0] [L682] -1 _Bool main$tmp_guard1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0] [L684] -1 int x = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0] [L686] -1 int y = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0] [L687] -1 _Bool y$flush_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0] [L688] -1 int y$mem_tmp; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0] [L689] -1 _Bool y$r_buff0_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0] [L690] -1 _Bool y$r_buff0_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0] [L691] -1 _Bool y$r_buff0_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0] [L692] -1 _Bool y$r_buff1_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0] [L693] -1 _Bool y$r_buff1_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0] [L694] -1 _Bool y$r_buff1_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0] [L695] -1 _Bool y$read_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0] [L696] -1 int *y$read_delayed_var; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}] [L697] -1 int y$w_buff0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0] [L698] -1 _Bool y$w_buff0_used; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0] [L699] -1 int y$w_buff1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0] [L700] -1 _Bool y$w_buff1_used; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L701] -1 _Bool weak$$choice0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L702] -1 _Bool weak$$choice2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L789] -1 pthread_t t1729; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L790] FCALL, FORK -1 pthread_create(&t1729, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L791] -1 pthread_t t1730; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L792] FCALL, FORK -1 pthread_create(&t1730, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L737] 0 y$w_buff1 = y$w_buff0 [L738] 0 y$w_buff0 = 1 [L739] 0 y$w_buff1_used = y$w_buff0_used [L740] 0 y$w_buff0_used = (_Bool)1 [L5] COND FALSE 0 !(!expression) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L742] 0 y$r_buff1_thd0 = y$r_buff0_thd0 [L743] 0 y$r_buff1_thd1 = y$r_buff0_thd1 [L744] 0 y$r_buff1_thd2 = y$r_buff0_thd2 [L745] 0 y$r_buff0_thd2 = (_Bool)1 [L748] 0 weak$$choice0 = __VERIFIER_nondet_bool() [L749] 0 weak$$choice2 = __VERIFIER_nondet_bool() [L750] 0 y$flush_delayed = weak$$choice2 [L751] 0 y$mem_tmp = y VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, x=0, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L752] EXPR 0 !y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : y$w_buff1) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, x=0, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L752] EXPR 0 y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : y$w_buff1 VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, x=0, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L752] EXPR 0 !y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : y$w_buff1) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, x=0, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L752] 0 y = !y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : y$w_buff1) [L753] EXPR 0 weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : y$w_buff0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, x=0, y=1, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L753] 0 y$w_buff0 = weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : y$w_buff0)) [L754] EXPR 0 weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff1 : y$w_buff1)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, x=0, y=1, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L754] 0 y$w_buff1 = weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff1 : y$w_buff1)) [L755] EXPR 0 weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, x=0, y=1, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L755] 0 y$w_buff0_used = weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used)) [L756] EXPR 0 weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, x=0, y=1, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L756] 0 y$w_buff1_used = weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)) [L757] EXPR 0 weak$$choice2 ? y$r_buff0_thd2 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$r_buff0_thd2 : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, x=0, y=1, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L757] 0 y$r_buff0_thd2 = weak$$choice2 ? y$r_buff0_thd2 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$r_buff0_thd2 : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2)) [L758] EXPR 0 weak$$choice2 ? y$r_buff1_thd2 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$r_buff1_thd2 : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, x=0, y=1, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L758] 0 y$r_buff1_thd2 = weak$$choice2 ? y$r_buff1_thd2 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$r_buff1_thd2 : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)) [L759] 0 __unbuffered_p1_EAX = y VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, x=0, y=1, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L760] EXPR 0 y$flush_delayed ? y$mem_tmp : y VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, x=0, y=1, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L760] 0 y = y$flush_delayed ? y$mem_tmp : y [L761] 0 y$flush_delayed = (_Bool)0 [L764] 0 __unbuffered_p1_EBX = x VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L767] EXPR 0 y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L706] 1 x = 1 [L709] 1 __unbuffered_p0_EAX = x [L712] 1 weak$$choice0 = __VERIFIER_nondet_bool() [L713] 1 weak$$choice2 = __VERIFIER_nondet_bool() [L714] 1 y$flush_delayed = weak$$choice2 [L715] 1 y$mem_tmp = y VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L716] EXPR 1 !y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y : (y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : y$w_buff1) VAL [!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y : (y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : y$w_buff1)=0, __unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L767] 0 y = y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) [L768] EXPR 0 y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used VAL [!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y : (y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : y$w_buff1)=0, __unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=1, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L768] 0 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used [L769] EXPR 0 y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used VAL [!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y : (y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : y$w_buff1)=0, __unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=1, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L716] 1 y = !y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y : (y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : y$w_buff1) [L717] EXPR 1 weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : y$w_buff0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : y$w_buff0))=1, x=1, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L717] 1 y$w_buff0 = weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : y$w_buff0)) [L718] EXPR 1 weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff1 : y$w_buff1)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff1 : y$w_buff1))=0, x=1, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L718] 1 y$w_buff1 = weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff1 : y$w_buff1)) [L719] EXPR 1 weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$w_buff0_used)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$w_buff0_used))=0, x=1, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L719] 1 y$w_buff0_used = weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$w_buff0_used)) [L720] EXPR 1 weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : (_Bool)0))=0, x=1, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L769] 0 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used [L770] EXPR 0 y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2 VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : (_Bool)0))=0, x=1, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L770] 0 y$r_buff0_thd2 = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2 [L771] EXPR 0 y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$r_buff1_thd2 VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : (_Bool)0))=0, x=1, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L771] 0 y$r_buff1_thd2 = y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$r_buff1_thd2 [L774] 0 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : (_Bool)0))=0, x=1, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L720] 1 y$w_buff1_used = weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : (_Bool)0)) [L721] EXPR 1 weak$$choice2 ? y$r_buff0_thd1 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$r_buff0_thd1 : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$r_buff0_thd1)) VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, weak$$choice2 ? y$r_buff0_thd1 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$r_buff0_thd1 : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$r_buff0_thd1))=0, x=1, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L721] 1 y$r_buff0_thd1 = weak$$choice2 ? y$r_buff0_thd1 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$r_buff0_thd1 : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$r_buff0_thd1)) [L722] EXPR 1 weak$$choice2 ? y$r_buff1_thd1 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$r_buff1_thd1 : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, weak$$choice2 ? y$r_buff1_thd1 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$r_buff1_thd1 : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : (_Bool)0))=0, x=1, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L722] 1 y$r_buff1_thd1 = weak$$choice2 ? y$r_buff1_thd1 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$r_buff1_thd1 : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : (_Bool)0)) [L723] 1 __unbuffered_p0_EBX = y VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L724] EXPR 1 y$flush_delayed ? y$mem_tmp : y VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=0, y$flush_delayed=1, y$flush_delayed ? y$mem_tmp : y=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L724] 1 y = y$flush_delayed ? y$mem_tmp : y [L725] 1 y$flush_delayed = (_Bool)0 [L730] 1 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L794] -1 main$tmp_guard0 = __unbuffered_cnt == 2 VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L798] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L798] EXPR -1 y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L798] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L798] -1 y = y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) [L799] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L799] -1 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used [L800] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$w_buff1_used VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L800] -1 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$w_buff1_used [L801] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0 VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L801] -1 y$r_buff0_thd0 = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0 [L802] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$r_buff1_thd0 VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L802] -1 y$r_buff1_thd0 = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$r_buff1_thd0 [L805] -1 main$tmp_guard1 = !(__unbuffered_p0_EAX == 1 && __unbuffered_p0_EBX == 0 && __unbuffered_p1_EAX == 1 && __unbuffered_p1_EBX == 0) VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L5] COND TRUE -1 !expression VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L5] -1 __VERIFIER_error() VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] ----- [2018-11-22 22:18:42,355 INFO L145 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/working_dir_3db75dc9-7ab9-415b-ac0a-b159efe92ad4/bin-2019/uautomizer/witness.graphml [2018-11-22 22:18:42,355 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2018-11-22 22:18:42,356 INFO L168 Benchmark]: Toolchain (without parser) took 68759.37 ms. Allocated memory was 1.0 GB in the beginning and 6.4 GB in the end (delta: 5.4 GB). Free memory was 957.6 MB in the beginning and 3.8 GB in the end (delta: -2.8 GB). Peak memory consumption was 2.5 GB. Max. memory is 11.5 GB. [2018-11-22 22:18:42,357 INFO L168 Benchmark]: CDTParser took 0.12 ms. Allocated memory is still 1.0 GB. Free memory is still 985.6 MB. There was no memory consumed. Max. memory is 11.5 GB. [2018-11-22 22:18:42,357 INFO L168 Benchmark]: CACSL2BoogieTranslator took 456.41 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 124.3 MB). Free memory was 957.6 MB in the beginning and 1.1 GB in the end (delta: -144.0 MB). Peak memory consumption was 35.7 MB. Max. memory is 11.5 GB. [2018-11-22 22:18:42,357 INFO L168 Benchmark]: Boogie Procedure Inliner took 43.98 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 2.7 MB). Peak memory consumption was 2.7 MB. Max. memory is 11.5 GB. [2018-11-22 22:18:42,357 INFO L168 Benchmark]: Boogie Preprocessor took 26.91 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 2.7 MB). Peak memory consumption was 2.7 MB. Max. memory is 11.5 GB. [2018-11-22 22:18:42,358 INFO L168 Benchmark]: RCFGBuilder took 555.89 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 54.6 MB). Peak memory consumption was 54.6 MB. Max. memory is 11.5 GB. [2018-11-22 22:18:42,358 INFO L168 Benchmark]: TraceAbstraction took 62180.80 ms. Allocated memory was 1.2 GB in the beginning and 6.4 GB in the end (delta: 5.2 GB). Free memory was 1.0 GB in the beginning and 3.9 GB in the end (delta: -2.9 GB). Peak memory consumption was 2.4 GB. Max. memory is 11.5 GB. [2018-11-22 22:18:42,358 INFO L168 Benchmark]: Witness Printer took 5491.80 ms. Allocated memory is still 6.4 GB. Free memory was 3.9 GB in the beginning and 3.8 GB in the end (delta: 142.4 MB). Peak memory consumption was 142.4 MB. Max. memory is 11.5 GB. [2018-11-22 22:18:42,360 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.12 ms. Allocated memory is still 1.0 GB. Free memory is still 985.6 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 456.41 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 124.3 MB). Free memory was 957.6 MB in the beginning and 1.1 GB in the end (delta: -144.0 MB). Peak memory consumption was 35.7 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 43.98 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 2.7 MB). Peak memory consumption was 2.7 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 26.91 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 2.7 MB). Peak memory consumption was 2.7 MB. Max. memory is 11.5 GB. * RCFGBuilder took 555.89 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 54.6 MB). Peak memory consumption was 54.6 MB. Max. memory is 11.5 GB. * TraceAbstraction took 62180.80 ms. Allocated memory was 1.2 GB in the beginning and 6.4 GB in the end (delta: 5.2 GB). Free memory was 1.0 GB in the beginning and 3.9 GB in the end (delta: -2.9 GB). Peak memory consumption was 2.4 GB. Max. memory is 11.5 GB. * Witness Printer took 5491.80 ms. Allocated memory is still 6.4 GB. Free memory was 3.9 GB in the beginning and 3.8 GB in the end (delta: 142.4 MB). Peak memory consumption was 142.4 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 5]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L672] -1 int __unbuffered_cnt = 0; VAL [__unbuffered_cnt=0] [L674] -1 int __unbuffered_p0_EAX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0] [L676] -1 int __unbuffered_p0_EBX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0] [L678] -1 int __unbuffered_p1_EAX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=0] [L680] -1 int __unbuffered_p1_EBX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0] [L681] -1 _Bool main$tmp_guard0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0] [L682] -1 _Bool main$tmp_guard1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0] [L684] -1 int x = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0] [L686] -1 int y = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0] [L687] -1 _Bool y$flush_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0] [L688] -1 int y$mem_tmp; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0] [L689] -1 _Bool y$r_buff0_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0] [L690] -1 _Bool y$r_buff0_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0] [L691] -1 _Bool y$r_buff0_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0] [L692] -1 _Bool y$r_buff1_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0] [L693] -1 _Bool y$r_buff1_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0] [L694] -1 _Bool y$r_buff1_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0] [L695] -1 _Bool y$read_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0] [L696] -1 int *y$read_delayed_var; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}] [L697] -1 int y$w_buff0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0] [L698] -1 _Bool y$w_buff0_used; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0] [L699] -1 int y$w_buff1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0] [L700] -1 _Bool y$w_buff1_used; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L701] -1 _Bool weak$$choice0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L702] -1 _Bool weak$$choice2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L789] -1 pthread_t t1729; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L790] FCALL, FORK -1 pthread_create(&t1729, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L791] -1 pthread_t t1730; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L792] FCALL, FORK -1 pthread_create(&t1730, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L737] 0 y$w_buff1 = y$w_buff0 [L738] 0 y$w_buff0 = 1 [L739] 0 y$w_buff1_used = y$w_buff0_used [L740] 0 y$w_buff0_used = (_Bool)1 [L5] COND FALSE 0 !(!expression) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L742] 0 y$r_buff1_thd0 = y$r_buff0_thd0 [L743] 0 y$r_buff1_thd1 = y$r_buff0_thd1 [L744] 0 y$r_buff1_thd2 = y$r_buff0_thd2 [L745] 0 y$r_buff0_thd2 = (_Bool)1 [L748] 0 weak$$choice0 = __VERIFIER_nondet_bool() [L749] 0 weak$$choice2 = __VERIFIER_nondet_bool() [L750] 0 y$flush_delayed = weak$$choice2 [L751] 0 y$mem_tmp = y VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, x=0, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L752] EXPR 0 !y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : y$w_buff1) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, x=0, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L752] EXPR 0 y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : y$w_buff1 VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, x=0, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L752] EXPR 0 !y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : y$w_buff1) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, x=0, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L752] 0 y = !y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : y$w_buff1) [L753] EXPR 0 weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : y$w_buff0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, x=0, y=1, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L753] 0 y$w_buff0 = weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : y$w_buff0)) [L754] EXPR 0 weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff1 : y$w_buff1)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, x=0, y=1, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L754] 0 y$w_buff1 = weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff1 : y$w_buff1)) [L755] EXPR 0 weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, x=0, y=1, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L755] 0 y$w_buff0_used = weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used)) [L756] EXPR 0 weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, x=0, y=1, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L756] 0 y$w_buff1_used = weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)) [L757] EXPR 0 weak$$choice2 ? y$r_buff0_thd2 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$r_buff0_thd2 : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, x=0, y=1, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L757] 0 y$r_buff0_thd2 = weak$$choice2 ? y$r_buff0_thd2 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$r_buff0_thd2 : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2)) [L758] EXPR 0 weak$$choice2 ? y$r_buff1_thd2 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$r_buff1_thd2 : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, x=0, y=1, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L758] 0 y$r_buff1_thd2 = weak$$choice2 ? y$r_buff1_thd2 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$r_buff1_thd2 : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)) [L759] 0 __unbuffered_p1_EAX = y VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, x=0, y=1, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L760] EXPR 0 y$flush_delayed ? y$mem_tmp : y VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, x=0, y=1, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L760] 0 y = y$flush_delayed ? y$mem_tmp : y [L761] 0 y$flush_delayed = (_Bool)0 [L764] 0 __unbuffered_p1_EBX = x VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L767] EXPR 0 y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L706] 1 x = 1 [L709] 1 __unbuffered_p0_EAX = x [L712] 1 weak$$choice0 = __VERIFIER_nondet_bool() [L713] 1 weak$$choice2 = __VERIFIER_nondet_bool() [L714] 1 y$flush_delayed = weak$$choice2 [L715] 1 y$mem_tmp = y VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L716] EXPR 1 !y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y : (y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : y$w_buff1) VAL [!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y : (y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : y$w_buff1)=0, __unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L767] 0 y = y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) [L768] EXPR 0 y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used VAL [!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y : (y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : y$w_buff1)=0, __unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=1, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L768] 0 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used [L769] EXPR 0 y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used VAL [!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y : (y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : y$w_buff1)=0, __unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=1, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L716] 1 y = !y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y : (y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : y$w_buff1) [L717] EXPR 1 weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : y$w_buff0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : y$w_buff0))=1, x=1, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L717] 1 y$w_buff0 = weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : y$w_buff0)) [L718] EXPR 1 weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff1 : y$w_buff1)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff1 : y$w_buff1))=0, x=1, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L718] 1 y$w_buff1 = weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff1 : y$w_buff1)) [L719] EXPR 1 weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$w_buff0_used)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$w_buff0_used))=0, x=1, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L719] 1 y$w_buff0_used = weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$w_buff0_used)) [L720] EXPR 1 weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : (_Bool)0))=0, x=1, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L769] 0 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used [L770] EXPR 0 y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2 VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : (_Bool)0))=0, x=1, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L770] 0 y$r_buff0_thd2 = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2 [L771] EXPR 0 y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$r_buff1_thd2 VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : (_Bool)0))=0, x=1, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L771] 0 y$r_buff1_thd2 = y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$r_buff1_thd2 [L774] 0 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : (_Bool)0))=0, x=1, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L720] 1 y$w_buff1_used = weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : (_Bool)0)) [L721] EXPR 1 weak$$choice2 ? y$r_buff0_thd1 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$r_buff0_thd1 : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$r_buff0_thd1)) VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, weak$$choice2 ? y$r_buff0_thd1 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$r_buff0_thd1 : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$r_buff0_thd1))=0, x=1, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L721] 1 y$r_buff0_thd1 = weak$$choice2 ? y$r_buff0_thd1 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$r_buff0_thd1 : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$r_buff0_thd1)) [L722] EXPR 1 weak$$choice2 ? y$r_buff1_thd1 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$r_buff1_thd1 : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, weak$$choice2 ? y$r_buff1_thd1 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$r_buff1_thd1 : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : (_Bool)0))=0, x=1, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L722] 1 y$r_buff1_thd1 = weak$$choice2 ? y$r_buff1_thd1 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$r_buff1_thd1 : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : (_Bool)0)) [L723] 1 __unbuffered_p0_EBX = y VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L724] EXPR 1 y$flush_delayed ? y$mem_tmp : y VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=0, y$flush_delayed=1, y$flush_delayed ? y$mem_tmp : y=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L724] 1 y = y$flush_delayed ? y$mem_tmp : y [L725] 1 y$flush_delayed = (_Bool)0 [L730] 1 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L794] -1 main$tmp_guard0 = __unbuffered_cnt == 2 VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L798] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L798] EXPR -1 y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L798] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L798] -1 y = y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) [L799] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L799] -1 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used [L800] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$w_buff1_used VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L800] -1 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$w_buff1_used [L801] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0 VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L801] -1 y$r_buff0_thd0 = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0 [L802] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$r_buff1_thd0 VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L802] -1 y$r_buff1_thd0 = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$r_buff1_thd0 [L805] -1 main$tmp_guard1 = !(__unbuffered_p0_EAX == 1 && __unbuffered_p0_EBX == 0 && __unbuffered_p1_EAX == 1 && __unbuffered_p1_EBX == 0) VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L5] COND TRUE -1 !expression VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L5] -1 __VERIFIER_error() VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] - StatisticsResult: Ultimate Automizer benchmark data CFG has 5 procedures, 284 locations, 3 error locations. UNSAFE Result, 62.0s OverallTime, 27 OverallIterations, 1 TraceHistogramMax, 17.4s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 9823 SDtfs, 10957 SDslu, 23991 SDs, 0 SdLazy, 8631 SolverSat, 551 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 5.5s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 256 GetRequests, 64 SyntacticMatches, 20 SemanticMatches, 172 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 221 ImplicationChecksByTransitivity, 1.4s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=201216occurred in iteration=6, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 34.0s AutomataMinimizationTime, 26 MinimizatonAttempts, 433630 StatesRemovedByMinimization, 26 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.0s SsaConstructionTime, 0.2s SatisfiabilityAnalysisTime, 1.6s InterpolantComputationTime, 2207 NumberOfCodeBlocks, 2207 NumberOfCodeBlocksAsserted, 27 NumberOfCheckSat, 2078 ConstructedInterpolants, 0 QuantifiedInterpolants, 406298 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 26 InterpolantComputations, 26 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...