./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/safe030_power.opt_false-unreach-call.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version aa418289 Calling Ultimate with: java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/working_dir_5a87ce97-3d93-4e7b-9c05-09a5c351f4f7/bin-2019/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/working_dir_5a87ce97-3d93-4e7b-9c05-09a5c351f4f7/bin-2019/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/working_dir_5a87ce97-3d93-4e7b-9c05-09a5c351f4f7/bin-2019/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/working_dir_5a87ce97-3d93-4e7b-9c05-09a5c351f4f7/bin-2019/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/pthread-wmm/safe030_power.opt_false-unreach-call.i -s /tmp/vcloud-vcloud-master/worker/working_dir_5a87ce97-3d93-4e7b-9c05-09a5c351f4f7/bin-2019/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/working_dir_5a87ce97-3d93-4e7b-9c05-09a5c351f4f7/bin-2019/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 691fab8578b36371b4449c4d855bdbbbbb6262cc ....................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.23-aa41828 [2018-11-22 22:51:26,693 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-11-22 22:51:26,694 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-11-22 22:51:26,700 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-11-22 22:51:26,701 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-11-22 22:51:26,701 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-11-22 22:51:26,702 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-11-22 22:51:26,703 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-11-22 22:51:26,704 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-11-22 22:51:26,705 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-11-22 22:51:26,705 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-11-22 22:51:26,706 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-11-22 22:51:26,706 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-11-22 22:51:26,707 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-11-22 22:51:26,707 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-11-22 22:51:26,708 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-11-22 22:51:26,708 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-11-22 22:51:26,709 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-11-22 22:51:26,711 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-11-22 22:51:26,711 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-11-22 22:51:26,712 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-11-22 22:51:26,713 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-11-22 22:51:26,715 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-11-22 22:51:26,715 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-11-22 22:51:26,715 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-11-22 22:51:26,715 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-11-22 22:51:26,716 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-11-22 22:51:26,716 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-11-22 22:51:26,717 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-11-22 22:51:26,718 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-11-22 22:51:26,718 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-11-22 22:51:26,718 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-11-22 22:51:26,719 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-11-22 22:51:26,719 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-11-22 22:51:26,719 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-11-22 22:51:26,720 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-11-22 22:51:26,720 INFO L98 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/working_dir_5a87ce97-3d93-4e7b-9c05-09a5c351f4f7/bin-2019/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2018-11-22 22:51:26,727 INFO L110 SettingsManager]: Loading preferences was successful [2018-11-22 22:51:26,727 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-11-22 22:51:26,728 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-11-22 22:51:26,728 INFO L133 SettingsManager]: * ... calls to implemented procedures=ONLY_FOR_CONCURRENT_PROGRAMS [2018-11-22 22:51:26,728 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-11-22 22:51:26,728 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-11-22 22:51:26,729 INFO L133 SettingsManager]: * Use SBE=true [2018-11-22 22:51:26,729 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-11-22 22:51:26,729 INFO L133 SettingsManager]: * sizeof long=4 [2018-11-22 22:51:26,729 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-11-22 22:51:26,729 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-11-22 22:51:26,729 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-11-22 22:51:26,729 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-11-22 22:51:26,730 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-11-22 22:51:26,730 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-11-22 22:51:26,730 INFO L133 SettingsManager]: * sizeof long double=12 [2018-11-22 22:51:26,730 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-11-22 22:51:26,730 INFO L133 SettingsManager]: * Use constant arrays=true [2018-11-22 22:51:26,730 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-11-22 22:51:26,730 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-11-22 22:51:26,731 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-11-22 22:51:26,731 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-11-22 22:51:26,731 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-11-22 22:51:26,731 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-22 22:51:26,731 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-11-22 22:51:26,731 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-11-22 22:51:26,731 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-11-22 22:51:26,732 INFO L133 SettingsManager]: * Trace refinement strategy=CAMEL [2018-11-22 22:51:26,732 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-11-22 22:51:26,732 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-11-22 22:51:26,732 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/working_dir_5a87ce97-3d93-4e7b-9c05-09a5c351f4f7/bin-2019/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 691fab8578b36371b4449c4d855bdbbbbb6262cc [2018-11-22 22:51:26,757 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-11-22 22:51:26,766 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-11-22 22:51:26,769 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-11-22 22:51:26,770 INFO L271 PluginConnector]: Initializing CDTParser... [2018-11-22 22:51:26,770 INFO L276 PluginConnector]: CDTParser initialized [2018-11-22 22:51:26,771 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/working_dir_5a87ce97-3d93-4e7b-9c05-09a5c351f4f7/bin-2019/uautomizer/../../sv-benchmarks/c/pthread-wmm/safe030_power.opt_false-unreach-call.i [2018-11-22 22:51:26,815 INFO L221 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_5a87ce97-3d93-4e7b-9c05-09a5c351f4f7/bin-2019/uautomizer/data/5f1592e2d/710802f56cb44cf48a69cb357fdd799c/FLAG75b1baf5f [2018-11-22 22:51:27,199 INFO L307 CDTParser]: Found 1 translation units. [2018-11-22 22:51:27,199 INFO L161 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/working_dir_5a87ce97-3d93-4e7b-9c05-09a5c351f4f7/sv-benchmarks/c/pthread-wmm/safe030_power.opt_false-unreach-call.i [2018-11-22 22:51:27,210 INFO L355 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_5a87ce97-3d93-4e7b-9c05-09a5c351f4f7/bin-2019/uautomizer/data/5f1592e2d/710802f56cb44cf48a69cb357fdd799c/FLAG75b1baf5f [2018-11-22 22:51:27,572 INFO L363 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/working_dir_5a87ce97-3d93-4e7b-9c05-09a5c351f4f7/bin-2019/uautomizer/data/5f1592e2d/710802f56cb44cf48a69cb357fdd799c [2018-11-22 22:51:27,574 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-11-22 22:51:27,575 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2018-11-22 22:51:27,576 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-11-22 22:51:27,576 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-11-22 22:51:27,579 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-11-22 22:51:27,579 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 22.11 10:51:27" (1/1) ... [2018-11-22 22:51:27,582 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@160bb857 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.11 10:51:27, skipping insertion in model container [2018-11-22 22:51:27,582 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 22.11 10:51:27" (1/1) ... [2018-11-22 22:51:27,588 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-11-22 22:51:27,621 INFO L176 MainTranslator]: Built tables and reachable declarations [2018-11-22 22:51:27,859 INFO L201 PostProcessor]: Analyzing one entry point: main [2018-11-22 22:51:27,869 INFO L191 MainTranslator]: Completed pre-run [2018-11-22 22:51:27,975 INFO L201 PostProcessor]: Analyzing one entry point: main [2018-11-22 22:51:28,022 INFO L195 MainTranslator]: Completed translation [2018-11-22 22:51:28,022 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.11 10:51:28 WrapperNode [2018-11-22 22:51:28,022 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-11-22 22:51:28,023 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2018-11-22 22:51:28,023 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2018-11-22 22:51:28,023 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2018-11-22 22:51:28,031 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.11 10:51:28" (1/1) ... [2018-11-22 22:51:28,043 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.11 10:51:28" (1/1) ... [2018-11-22 22:51:28,060 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2018-11-22 22:51:28,060 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-11-22 22:51:28,060 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-11-22 22:51:28,060 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-11-22 22:51:28,066 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.11 10:51:28" (1/1) ... [2018-11-22 22:51:28,066 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.11 10:51:28" (1/1) ... [2018-11-22 22:51:28,068 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.11 10:51:28" (1/1) ... [2018-11-22 22:51:28,068 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.11 10:51:28" (1/1) ... [2018-11-22 22:51:28,073 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.11 10:51:28" (1/1) ... [2018-11-22 22:51:28,075 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.11 10:51:28" (1/1) ... [2018-11-22 22:51:28,077 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.11 10:51:28" (1/1) ... [2018-11-22 22:51:28,079 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-11-22 22:51:28,079 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-11-22 22:51:28,079 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-11-22 22:51:28,079 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-11-22 22:51:28,080 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.11 10:51:28" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_5a87ce97-3d93-4e7b-9c05-09a5c351f4f7/bin-2019/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-22 22:51:28,112 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-11-22 22:51:28,112 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2018-11-22 22:51:28,112 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2018-11-22 22:51:28,112 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-11-22 22:51:28,113 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2018-11-22 22:51:28,113 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2018-11-22 22:51:28,113 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2018-11-22 22:51:28,113 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2018-11-22 22:51:28,113 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2018-11-22 22:51:28,113 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2018-11-22 22:51:28,113 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2018-11-22 22:51:28,113 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-11-22 22:51:28,113 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-11-22 22:51:28,114 WARN L198 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2018-11-22 22:51:28,515 INFO L275 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-11-22 22:51:28,515 INFO L280 CfgBuilder]: Removed 8 assue(true) statements. [2018-11-22 22:51:28,515 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 22.11 10:51:28 BoogieIcfgContainer [2018-11-22 22:51:28,515 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-11-22 22:51:28,516 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-11-22 22:51:28,516 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-11-22 22:51:28,518 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-11-22 22:51:28,518 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 22.11 10:51:27" (1/3) ... [2018-11-22 22:51:28,518 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@23a35fca and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 22.11 10:51:28, skipping insertion in model container [2018-11-22 22:51:28,518 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 22.11 10:51:28" (2/3) ... [2018-11-22 22:51:28,518 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@23a35fca and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 22.11 10:51:28, skipping insertion in model container [2018-11-22 22:51:28,518 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 22.11 10:51:28" (3/3) ... [2018-11-22 22:51:28,520 INFO L112 eAbstractionObserver]: Analyzing ICFG safe030_power.opt_false-unreach-call.i [2018-11-22 22:51:28,542 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:51:28,543 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:51:28,543 WARN L317 ript$VariableManager]: TermVariabe Thread1_P0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:51:28,543 WARN L317 ript$VariableManager]: TermVariabe Thread1_P0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:51:28,543 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P0_#t~nondet3.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:51:28,543 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P0_#t~nondet3.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:51:28,544 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:51:28,544 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:51:28,544 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P0_#t~nondet3.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:51:28,544 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P0_#t~nondet3.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:51:28,544 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:51:28,544 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:51:28,545 WARN L317 ript$VariableManager]: TermVariabe Thread2_P1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:51:28,545 WARN L317 ript$VariableManager]: TermVariabe Thread2_P1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:51:28,545 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:51:28,545 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:51:28,545 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:51:28,545 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:51:28,545 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:51:28,546 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:51:28,546 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:51:28,546 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:51:28,546 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:51:28,546 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:51:28,546 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:51:28,546 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:51:28,547 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:51:28,547 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:51:28,547 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:51:28,547 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:51:28,547 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:51:28,547 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:51:28,548 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:51:28,548 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:51:28,548 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:51:28,548 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:51:28,548 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:51:28,548 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:51:28,548 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P1_#t~nondet10.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:51:28,549 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P1_#t~nondet10.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:51:28,549 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:51:28,549 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:51:28,549 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P1_#t~nondet10.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:51:28,549 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P1_#t~nondet10.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:51:28,550 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:51:28,550 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:51:28,550 WARN L317 ript$VariableManager]: TermVariabe Thread0_P2___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:51:28,550 WARN L317 ript$VariableManager]: TermVariabe Thread0_P2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:51:28,550 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P2___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:51:28,550 WARN L317 ript$VariableManager]: TermVariabe Thread0_P2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:51:28,550 WARN L317 ript$VariableManager]: TermVariabe Thread0_P2___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:51:28,550 WARN L317 ript$VariableManager]: TermVariabe Thread0_P2___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:51:28,551 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:51:28,551 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:51:28,551 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:51:28,551 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:51:28,551 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:51:28,551 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:51:28,552 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:51:28,552 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:51:28,552 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:51:28,552 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:51:28,552 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:51:28,552 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:51:28,552 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:51:28,553 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:51:28,553 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:51:28,553 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:51:28,553 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:51:28,553 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:51:28,553 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:51:28,553 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:51:28,554 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:51:28,554 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:51:28,554 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:51:28,554 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:51:28,554 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P2_#t~nondet17.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:51:28,554 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P2_#t~nondet17.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:51:28,554 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:51:28,555 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:51:28,555 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P2_#t~nondet17.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:51:28,555 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P2_#t~nondet17.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-22 22:51:28,566 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2018-11-22 22:51:28,566 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-11-22 22:51:28,571 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 3 error locations. [2018-11-22 22:51:28,580 INFO L257 AbstractCegarLoop]: Starting to check reachability of 3 error locations. [2018-11-22 22:51:28,601 INFO L133 ementStrategyFactory]: Using default assertion order modulation [2018-11-22 22:51:28,602 INFO L382 AbstractCegarLoop]: Interprodecural is true [2018-11-22 22:51:28,602 INFO L383 AbstractCegarLoop]: Hoare is true [2018-11-22 22:51:28,603 INFO L384 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-11-22 22:51:28,603 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-11-22 22:51:28,603 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-11-22 22:51:28,603 INFO L387 AbstractCegarLoop]: Difference is false [2018-11-22 22:51:28,603 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-11-22 22:51:28,603 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-11-22 22:51:28,613 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 154places, 191 transitions [2018-11-22 22:51:44,928 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 128911 states. [2018-11-22 22:51:44,929 INFO L276 IsEmpty]: Start isEmpty. Operand 128911 states. [2018-11-22 22:51:44,999 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-11-22 22:51:44,999 INFO L394 BasicCegarLoop]: Found error trace [2018-11-22 22:51:44,999 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-22 22:51:45,001 INFO L423 AbstractCegarLoop]: === Iteration 1 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-22 22:51:45,006 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-22 22:51:45,006 INFO L82 PathProgramCache]: Analyzing trace with hash -1836791117, now seen corresponding path program 1 times [2018-11-22 22:51:45,008 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-22 22:51:45,008 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-22 22:51:45,048 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:51:45,048 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-22 22:51:45,049 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:51:45,094 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-22 22:51:45,204 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-22 22:51:45,206 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-22 22:51:45,206 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-22 22:51:45,209 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-22 22:51:45,217 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-22 22:51:45,217 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-22 22:51:45,219 INFO L87 Difference]: Start difference. First operand 128911 states. Second operand 4 states. [2018-11-22 22:51:46,884 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-22 22:51:46,884 INFO L93 Difference]: Finished difference Result 233471 states and 1098323 transitions. [2018-11-22 22:51:46,885 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-22 22:51:46,886 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 42 [2018-11-22 22:51:46,886 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-22 22:51:47,756 INFO L225 Difference]: With dead ends: 233471 [2018-11-22 22:51:47,757 INFO L226 Difference]: Without dead ends: 203721 [2018-11-22 22:51:47,758 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-22 22:51:52,166 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 203721 states. [2018-11-22 22:51:54,459 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 203721 to 118891. [2018-11-22 22:51:54,460 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 118891 states. [2018-11-22 22:51:54,849 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 118891 states to 118891 states and 559774 transitions. [2018-11-22 22:51:54,850 INFO L78 Accepts]: Start accepts. Automaton has 118891 states and 559774 transitions. Word has length 42 [2018-11-22 22:51:54,851 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-22 22:51:54,851 INFO L480 AbstractCegarLoop]: Abstraction has 118891 states and 559774 transitions. [2018-11-22 22:51:54,851 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-22 22:51:54,851 INFO L276 IsEmpty]: Start isEmpty. Operand 118891 states and 559774 transitions. [2018-11-22 22:51:54,859 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2018-11-22 22:51:54,859 INFO L394 BasicCegarLoop]: Found error trace [2018-11-22 22:51:54,863 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-22 22:51:54,863 INFO L423 AbstractCegarLoop]: === Iteration 2 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-22 22:51:54,863 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-22 22:51:54,863 INFO L82 PathProgramCache]: Analyzing trace with hash -1696589112, now seen corresponding path program 1 times [2018-11-22 22:51:54,863 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-22 22:51:54,863 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-22 22:51:54,867 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:51:54,867 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-22 22:51:54,867 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:51:54,880 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-22 22:51:54,914 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-22 22:51:54,914 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-22 22:51:54,914 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-22 22:51:54,916 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-22 22:51:54,916 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-22 22:51:54,916 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-22 22:51:54,916 INFO L87 Difference]: Start difference. First operand 118891 states and 559774 transitions. Second operand 3 states. [2018-11-22 22:51:55,656 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-22 22:51:55,656 INFO L93 Difference]: Finished difference Result 118891 states and 559659 transitions. [2018-11-22 22:51:55,657 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-22 22:51:55,657 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 49 [2018-11-22 22:51:55,657 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-22 22:51:55,987 INFO L225 Difference]: With dead ends: 118891 [2018-11-22 22:51:55,987 INFO L226 Difference]: Without dead ends: 118891 [2018-11-22 22:51:55,988 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-22 22:51:56,812 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 118891 states. [2018-11-22 22:51:58,787 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 118891 to 118891. [2018-11-22 22:51:58,787 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 118891 states. [2018-11-22 22:51:59,107 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 118891 states to 118891 states and 559659 transitions. [2018-11-22 22:51:59,107 INFO L78 Accepts]: Start accepts. Automaton has 118891 states and 559659 transitions. Word has length 49 [2018-11-22 22:51:59,107 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-22 22:51:59,107 INFO L480 AbstractCegarLoop]: Abstraction has 118891 states and 559659 transitions. [2018-11-22 22:51:59,108 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-22 22:51:59,108 INFO L276 IsEmpty]: Start isEmpty. Operand 118891 states and 559659 transitions. [2018-11-22 22:51:59,112 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2018-11-22 22:51:59,112 INFO L394 BasicCegarLoop]: Found error trace [2018-11-22 22:51:59,112 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-22 22:51:59,112 INFO L423 AbstractCegarLoop]: === Iteration 3 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-22 22:51:59,112 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-22 22:51:59,112 INFO L82 PathProgramCache]: Analyzing trace with hash 46221223, now seen corresponding path program 1 times [2018-11-22 22:51:59,113 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-22 22:51:59,113 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-22 22:51:59,115 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:51:59,115 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-22 22:51:59,116 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:51:59,128 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-22 22:51:59,189 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-22 22:51:59,189 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-22 22:51:59,189 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-22 22:51:59,189 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-22 22:51:59,190 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-22 22:51:59,190 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-22 22:51:59,190 INFO L87 Difference]: Start difference. First operand 118891 states and 559659 transitions. Second operand 5 states. [2018-11-22 22:52:03,921 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-22 22:52:03,921 INFO L93 Difference]: Finished difference Result 325271 states and 1470363 transitions. [2018-11-22 22:52:03,921 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-11-22 22:52:03,921 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 49 [2018-11-22 22:52:03,921 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-22 22:52:04,803 INFO L225 Difference]: With dead ends: 325271 [2018-11-22 22:52:04,804 INFO L226 Difference]: Without dead ends: 324271 [2018-11-22 22:52:04,804 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2018-11-22 22:52:06,085 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 324271 states. [2018-11-22 22:52:09,067 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 324271 to 186421. [2018-11-22 22:52:09,067 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 186421 states. [2018-11-22 22:52:09,588 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 186421 states to 186421 states and 842758 transitions. [2018-11-22 22:52:09,588 INFO L78 Accepts]: Start accepts. Automaton has 186421 states and 842758 transitions. Word has length 49 [2018-11-22 22:52:09,588 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-22 22:52:09,589 INFO L480 AbstractCegarLoop]: Abstraction has 186421 states and 842758 transitions. [2018-11-22 22:52:09,589 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-22 22:52:09,589 INFO L276 IsEmpty]: Start isEmpty. Operand 186421 states and 842758 transitions. [2018-11-22 22:52:10,342 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 51 [2018-11-22 22:52:10,342 INFO L394 BasicCegarLoop]: Found error trace [2018-11-22 22:52:10,342 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-22 22:52:10,343 INFO L423 AbstractCegarLoop]: === Iteration 4 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-22 22:52:10,343 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-22 22:52:10,343 INFO L82 PathProgramCache]: Analyzing trace with hash 764594298, now seen corresponding path program 1 times [2018-11-22 22:52:10,343 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-22 22:52:10,343 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-22 22:52:10,344 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:52:10,344 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-22 22:52:10,344 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:52:10,352 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-22 22:52:10,392 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-22 22:52:10,393 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-22 22:52:10,393 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-22 22:52:10,393 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-22 22:52:10,393 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-22 22:52:10,393 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-22 22:52:10,394 INFO L87 Difference]: Start difference. First operand 186421 states and 842758 transitions. Second operand 4 states. [2018-11-22 22:52:11,135 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-22 22:52:11,135 INFO L93 Difference]: Finished difference Result 163597 states and 726959 transitions. [2018-11-22 22:52:11,136 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-22 22:52:11,136 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 50 [2018-11-22 22:52:11,136 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-22 22:52:11,530 INFO L225 Difference]: With dead ends: 163597 [2018-11-22 22:52:11,530 INFO L226 Difference]: Without dead ends: 160992 [2018-11-22 22:52:11,530 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-22 22:52:12,328 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 160992 states. [2018-11-22 22:52:18,101 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 160992 to 160992. [2018-11-22 22:52:18,101 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 160992 states. [2018-11-22 22:52:18,541 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 160992 states to 160992 states and 718277 transitions. [2018-11-22 22:52:18,541 INFO L78 Accepts]: Start accepts. Automaton has 160992 states and 718277 transitions. Word has length 50 [2018-11-22 22:52:18,541 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-22 22:52:18,541 INFO L480 AbstractCegarLoop]: Abstraction has 160992 states and 718277 transitions. [2018-11-22 22:52:18,541 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-22 22:52:18,541 INFO L276 IsEmpty]: Start isEmpty. Operand 160992 states and 718277 transitions. [2018-11-22 22:52:18,547 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2018-11-22 22:52:18,547 INFO L394 BasicCegarLoop]: Found error trace [2018-11-22 22:52:18,547 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-22 22:52:18,548 INFO L423 AbstractCegarLoop]: === Iteration 5 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-22 22:52:18,548 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-22 22:52:18,548 INFO L82 PathProgramCache]: Analyzing trace with hash 315183364, now seen corresponding path program 1 times [2018-11-22 22:52:18,548 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-22 22:52:18,548 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-22 22:52:18,550 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:52:18,550 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-22 22:52:18,550 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:52:18,558 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-22 22:52:18,613 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-22 22:52:18,613 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-22 22:52:18,613 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-22 22:52:18,613 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-22 22:52:18,614 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-22 22:52:18,614 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-22 22:52:18,614 INFO L87 Difference]: Start difference. First operand 160992 states and 718277 transitions. Second operand 5 states. [2018-11-22 22:52:20,671 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-22 22:52:20,671 INFO L93 Difference]: Finished difference Result 289848 states and 1287330 transitions. [2018-11-22 22:52:20,671 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-11-22 22:52:20,671 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 51 [2018-11-22 22:52:20,671 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-22 22:52:21,404 INFO L225 Difference]: With dead ends: 289848 [2018-11-22 22:52:21,404 INFO L226 Difference]: Without dead ends: 289008 [2018-11-22 22:52:21,404 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2018-11-22 22:52:22,526 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 289008 states. [2018-11-22 22:52:25,565 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 289008 to 169612. [2018-11-22 22:52:25,565 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 169612 states. [2018-11-22 22:52:31,533 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 169612 states to 169612 states and 753930 transitions. [2018-11-22 22:52:31,533 INFO L78 Accepts]: Start accepts. Automaton has 169612 states and 753930 transitions. Word has length 51 [2018-11-22 22:52:31,533 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-22 22:52:31,533 INFO L480 AbstractCegarLoop]: Abstraction has 169612 states and 753930 transitions. [2018-11-22 22:52:31,533 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-22 22:52:31,533 INFO L276 IsEmpty]: Start isEmpty. Operand 169612 states and 753930 transitions. [2018-11-22 22:52:31,552 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 59 [2018-11-22 22:52:31,553 INFO L394 BasicCegarLoop]: Found error trace [2018-11-22 22:52:31,553 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-22 22:52:31,553 INFO L423 AbstractCegarLoop]: === Iteration 6 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-22 22:52:31,553 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-22 22:52:31,553 INFO L82 PathProgramCache]: Analyzing trace with hash 336759908, now seen corresponding path program 1 times [2018-11-22 22:52:31,553 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-22 22:52:31,553 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-22 22:52:31,555 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:52:31,555 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-22 22:52:31,555 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:52:31,564 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-22 22:52:31,614 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-22 22:52:31,614 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-22 22:52:31,615 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-22 22:52:31,615 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-22 22:52:31,615 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-22 22:52:31,615 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-11-22 22:52:31,615 INFO L87 Difference]: Start difference. First operand 169612 states and 753930 transitions. Second operand 6 states. [2018-11-22 22:52:33,307 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-22 22:52:33,307 INFO L93 Difference]: Finished difference Result 292568 states and 1275883 transitions. [2018-11-22 22:52:33,307 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-11-22 22:52:33,307 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 58 [2018-11-22 22:52:33,307 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-22 22:52:34,611 INFO L225 Difference]: With dead ends: 292568 [2018-11-22 22:52:34,611 INFO L226 Difference]: Without dead ends: 291728 [2018-11-22 22:52:34,612 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 26 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=59, Invalid=151, Unknown=0, NotChecked=0, Total=210 [2018-11-22 22:52:35,736 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 291728 states. [2018-11-22 22:52:38,476 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 291728 to 164644. [2018-11-22 22:52:38,477 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 164644 states. [2018-11-22 22:52:39,807 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 164644 states to 164644 states and 731936 transitions. [2018-11-22 22:52:39,807 INFO L78 Accepts]: Start accepts. Automaton has 164644 states and 731936 transitions. Word has length 58 [2018-11-22 22:52:39,807 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-22 22:52:39,808 INFO L480 AbstractCegarLoop]: Abstraction has 164644 states and 731936 transitions. [2018-11-22 22:52:39,808 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-22 22:52:39,808 INFO L276 IsEmpty]: Start isEmpty. Operand 164644 states and 731936 transitions. [2018-11-22 22:52:39,869 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2018-11-22 22:52:39,870 INFO L394 BasicCegarLoop]: Found error trace [2018-11-22 22:52:39,870 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-22 22:52:39,870 INFO L423 AbstractCegarLoop]: === Iteration 7 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-22 22:52:39,870 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-22 22:52:39,870 INFO L82 PathProgramCache]: Analyzing trace with hash 655738884, now seen corresponding path program 1 times [2018-11-22 22:52:39,870 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-22 22:52:39,870 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-22 22:52:39,872 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:52:39,872 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-22 22:52:39,872 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:52:39,882 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-22 22:52:39,924 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-22 22:52:39,925 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-22 22:52:39,925 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-22 22:52:39,925 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-22 22:52:39,925 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-22 22:52:39,925 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-22 22:52:39,926 INFO L87 Difference]: Start difference. First operand 164644 states and 731936 transitions. Second operand 4 states. [2018-11-22 22:52:41,300 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-22 22:52:41,300 INFO L93 Difference]: Finished difference Result 264420 states and 1161188 transitions. [2018-11-22 22:52:41,301 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-22 22:52:41,301 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 65 [2018-11-22 22:52:41,301 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-22 22:52:42,800 INFO L225 Difference]: With dead ends: 264420 [2018-11-22 22:52:42,800 INFO L226 Difference]: Without dead ends: 263060 [2018-11-22 22:52:42,800 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-22 22:52:43,822 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 263060 states. [2018-11-22 22:52:51,293 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 263060 to 220276. [2018-11-22 22:52:51,294 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 220276 states. [2018-11-22 22:52:51,916 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 220276 states to 220276 states and 976572 transitions. [2018-11-22 22:52:51,916 INFO L78 Accepts]: Start accepts. Automaton has 220276 states and 976572 transitions. Word has length 65 [2018-11-22 22:52:51,917 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-22 22:52:51,917 INFO L480 AbstractCegarLoop]: Abstraction has 220276 states and 976572 transitions. [2018-11-22 22:52:51,917 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-22 22:52:51,917 INFO L276 IsEmpty]: Start isEmpty. Operand 220276 states and 976572 transitions. [2018-11-22 22:52:51,998 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2018-11-22 22:52:51,998 INFO L394 BasicCegarLoop]: Found error trace [2018-11-22 22:52:51,998 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-22 22:52:51,998 INFO L423 AbstractCegarLoop]: === Iteration 8 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-22 22:52:51,998 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-22 22:52:51,999 INFO L82 PathProgramCache]: Analyzing trace with hash 2009048581, now seen corresponding path program 1 times [2018-11-22 22:52:51,999 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-22 22:52:51,999 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-22 22:52:52,000 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:52:52,001 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-22 22:52:52,001 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:52:52,010 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-22 22:52:52,065 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-22 22:52:52,065 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-22 22:52:52,065 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-22 22:52:52,066 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-22 22:52:52,066 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-22 22:52:52,066 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2018-11-22 22:52:52,066 INFO L87 Difference]: Start difference. First operand 220276 states and 976572 transitions. Second operand 5 states. [2018-11-22 22:52:52,412 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-22 22:52:52,413 INFO L93 Difference]: Finished difference Result 78044 states and 314282 transitions. [2018-11-22 22:52:52,413 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-11-22 22:52:52,413 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 65 [2018-11-22 22:52:52,413 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-22 22:52:52,560 INFO L225 Difference]: With dead ends: 78044 [2018-11-22 22:52:52,561 INFO L226 Difference]: Without dead ends: 75732 [2018-11-22 22:52:52,561 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2018-11-22 22:52:52,770 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 75732 states. [2018-11-22 22:52:54,073 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 75732 to 75732. [2018-11-22 22:52:54,073 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 75732 states. [2018-11-22 22:52:54,236 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 75732 states to 75732 states and 305620 transitions. [2018-11-22 22:52:54,236 INFO L78 Accepts]: Start accepts. Automaton has 75732 states and 305620 transitions. Word has length 65 [2018-11-22 22:52:54,237 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-22 22:52:54,237 INFO L480 AbstractCegarLoop]: Abstraction has 75732 states and 305620 transitions. [2018-11-22 22:52:54,237 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-22 22:52:54,237 INFO L276 IsEmpty]: Start isEmpty. Operand 75732 states and 305620 transitions. [2018-11-22 22:52:54,287 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 79 [2018-11-22 22:52:54,287 INFO L394 BasicCegarLoop]: Found error trace [2018-11-22 22:52:54,287 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-22 22:52:54,287 INFO L423 AbstractCegarLoop]: === Iteration 9 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-22 22:52:54,288 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-22 22:52:54,288 INFO L82 PathProgramCache]: Analyzing trace with hash 493391520, now seen corresponding path program 1 times [2018-11-22 22:52:54,288 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-22 22:52:54,288 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-22 22:52:54,289 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:52:54,289 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-22 22:52:54,290 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:52:54,299 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-22 22:52:54,379 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-22 22:52:54,379 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-22 22:52:54,379 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-22 22:52:54,379 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-22 22:52:54,379 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-22 22:52:54,380 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-22 22:52:54,380 INFO L87 Difference]: Start difference. First operand 75732 states and 305620 transitions. Second operand 4 states. [2018-11-22 22:52:54,970 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-22 22:52:54,970 INFO L93 Difference]: Finished difference Result 105528 states and 420009 transitions. [2018-11-22 22:52:54,970 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-22 22:52:54,971 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 78 [2018-11-22 22:52:54,971 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-22 22:52:55,201 INFO L225 Difference]: With dead ends: 105528 [2018-11-22 22:52:55,201 INFO L226 Difference]: Without dead ends: 105528 [2018-11-22 22:52:55,201 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-22 22:52:55,988 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 105528 states. [2018-11-22 22:52:56,774 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 105528 to 81080. [2018-11-22 22:52:56,774 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 81080 states. [2018-11-22 22:52:56,954 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 81080 states to 81080 states and 325641 transitions. [2018-11-22 22:52:56,954 INFO L78 Accepts]: Start accepts. Automaton has 81080 states and 325641 transitions. Word has length 78 [2018-11-22 22:52:56,954 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-22 22:52:56,954 INFO L480 AbstractCegarLoop]: Abstraction has 81080 states and 325641 transitions. [2018-11-22 22:52:56,954 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-22 22:52:56,954 INFO L276 IsEmpty]: Start isEmpty. Operand 81080 states and 325641 transitions. [2018-11-22 22:52:57,009 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 79 [2018-11-22 22:52:57,010 INFO L394 BasicCegarLoop]: Found error trace [2018-11-22 22:52:57,010 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-22 22:52:57,010 INFO L423 AbstractCegarLoop]: === Iteration 10 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-22 22:52:57,010 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-22 22:52:57,010 INFO L82 PathProgramCache]: Analyzing trace with hash -191355072, now seen corresponding path program 1 times [2018-11-22 22:52:57,010 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-22 22:52:57,011 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-22 22:52:57,012 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:52:57,012 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-22 22:52:57,012 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:52:57,021 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-22 22:52:57,067 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-22 22:52:57,067 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-22 22:52:57,067 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-22 22:52:57,068 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-22 22:52:57,068 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-22 22:52:57,068 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-22 22:52:57,068 INFO L87 Difference]: Start difference. First operand 81080 states and 325641 transitions. Second operand 4 states. [2018-11-22 22:52:58,020 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-22 22:52:58,020 INFO L93 Difference]: Finished difference Result 113667 states and 450915 transitions. [2018-11-22 22:52:58,020 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-22 22:52:58,020 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 78 [2018-11-22 22:52:58,021 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-22 22:52:58,248 INFO L225 Difference]: With dead ends: 113667 [2018-11-22 22:52:58,248 INFO L226 Difference]: Without dead ends: 113667 [2018-11-22 22:52:58,248 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-22 22:52:58,480 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 113667 states. [2018-11-22 22:52:59,957 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 113667 to 102372. [2018-11-22 22:52:59,957 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 102372 states. [2018-11-22 22:53:00,201 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 102372 states to 102372 states and 408718 transitions. [2018-11-22 22:53:00,201 INFO L78 Accepts]: Start accepts. Automaton has 102372 states and 408718 transitions. Word has length 78 [2018-11-22 22:53:00,202 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-22 22:53:00,202 INFO L480 AbstractCegarLoop]: Abstraction has 102372 states and 408718 transitions. [2018-11-22 22:53:00,202 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-22 22:53:00,202 INFO L276 IsEmpty]: Start isEmpty. Operand 102372 states and 408718 transitions. [2018-11-22 22:53:00,273 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 79 [2018-11-22 22:53:00,273 INFO L394 BasicCegarLoop]: Found error trace [2018-11-22 22:53:00,273 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-22 22:53:00,273 INFO L423 AbstractCegarLoop]: === Iteration 11 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-22 22:53:00,273 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-22 22:53:00,273 INFO L82 PathProgramCache]: Analyzing trace with hash 159444865, now seen corresponding path program 1 times [2018-11-22 22:53:00,273 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-22 22:53:00,274 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-22 22:53:00,275 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:53:00,275 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-22 22:53:00,275 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:53:00,284 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-22 22:53:00,344 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-22 22:53:00,344 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-22 22:53:00,345 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-22 22:53:00,345 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-22 22:53:00,345 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-22 22:53:00,345 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2018-11-22 22:53:00,345 INFO L87 Difference]: Start difference. First operand 102372 states and 408718 transitions. Second operand 6 states. [2018-11-22 22:53:00,434 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-22 22:53:00,434 INFO L93 Difference]: Finished difference Result 16164 states and 54990 transitions. [2018-11-22 22:53:00,434 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-11-22 22:53:00,434 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 78 [2018-11-22 22:53:00,435 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-22 22:53:00,459 INFO L225 Difference]: With dead ends: 16164 [2018-11-22 22:53:00,460 INFO L226 Difference]: Without dead ends: 14072 [2018-11-22 22:53:00,460 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=42, Unknown=0, NotChecked=0, Total=72 [2018-11-22 22:53:00,486 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 14072 states. [2018-11-22 22:53:00,591 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 14072 to 13537. [2018-11-22 22:53:00,592 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13537 states. [2018-11-22 22:53:00,612 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13537 states to 13537 states and 46015 transitions. [2018-11-22 22:53:00,612 INFO L78 Accepts]: Start accepts. Automaton has 13537 states and 46015 transitions. Word has length 78 [2018-11-22 22:53:00,612 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-22 22:53:00,613 INFO L480 AbstractCegarLoop]: Abstraction has 13537 states and 46015 transitions. [2018-11-22 22:53:00,613 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-22 22:53:00,613 INFO L276 IsEmpty]: Start isEmpty. Operand 13537 states and 46015 transitions. [2018-11-22 22:53:00,625 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 98 [2018-11-22 22:53:00,625 INFO L394 BasicCegarLoop]: Found error trace [2018-11-22 22:53:00,625 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-22 22:53:00,625 INFO L423 AbstractCegarLoop]: === Iteration 12 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-22 22:53:00,626 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-22 22:53:00,626 INFO L82 PathProgramCache]: Analyzing trace with hash -2014372351, now seen corresponding path program 1 times [2018-11-22 22:53:00,626 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-22 22:53:00,626 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-22 22:53:00,627 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:53:00,627 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-22 22:53:00,627 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:53:00,633 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-22 22:53:00,684 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-22 22:53:00,685 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-22 22:53:00,685 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-22 22:53:00,685 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-22 22:53:00,685 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-22 22:53:00,685 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2018-11-22 22:53:00,685 INFO L87 Difference]: Start difference. First operand 13537 states and 46015 transitions. Second operand 5 states. [2018-11-22 22:53:00,835 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-22 22:53:00,835 INFO L93 Difference]: Finished difference Result 15422 states and 51828 transitions. [2018-11-22 22:53:00,835 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-22 22:53:00,836 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 97 [2018-11-22 22:53:00,836 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-22 22:53:00,853 INFO L225 Difference]: With dead ends: 15422 [2018-11-22 22:53:00,853 INFO L226 Difference]: Without dead ends: 15422 [2018-11-22 22:53:00,854 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2018-11-22 22:53:00,872 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15422 states. [2018-11-22 22:53:00,977 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15422 to 13947. [2018-11-22 22:53:00,977 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13947 states. [2018-11-22 22:53:00,998 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13947 states to 13947 states and 47378 transitions. [2018-11-22 22:53:00,998 INFO L78 Accepts]: Start accepts. Automaton has 13947 states and 47378 transitions. Word has length 97 [2018-11-22 22:53:00,998 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-22 22:53:00,998 INFO L480 AbstractCegarLoop]: Abstraction has 13947 states and 47378 transitions. [2018-11-22 22:53:00,998 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-22 22:53:00,998 INFO L276 IsEmpty]: Start isEmpty. Operand 13947 states and 47378 transitions. [2018-11-22 22:53:01,010 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 98 [2018-11-22 22:53:01,010 INFO L394 BasicCegarLoop]: Found error trace [2018-11-22 22:53:01,010 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-22 22:53:01,011 INFO L423 AbstractCegarLoop]: === Iteration 13 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-22 22:53:01,011 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-22 22:53:01,011 INFO L82 PathProgramCache]: Analyzing trace with hash 1097247648, now seen corresponding path program 1 times [2018-11-22 22:53:01,011 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-22 22:53:01,011 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-22 22:53:01,012 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:53:01,013 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-22 22:53:01,013 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:53:01,019 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-22 22:53:01,072 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-22 22:53:01,072 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-22 22:53:01,072 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-22 22:53:01,072 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-22 22:53:01,073 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-22 22:53:01,073 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2018-11-22 22:53:01,073 INFO L87 Difference]: Start difference. First operand 13947 states and 47378 transitions. Second operand 6 states. [2018-11-22 22:53:01,290 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-22 22:53:01,290 INFO L93 Difference]: Finished difference Result 16687 states and 55800 transitions. [2018-11-22 22:53:01,290 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-11-22 22:53:01,290 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 97 [2018-11-22 22:53:01,290 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-22 22:53:01,308 INFO L225 Difference]: With dead ends: 16687 [2018-11-22 22:53:01,309 INFO L226 Difference]: Without dead ends: 16357 [2018-11-22 22:53:01,309 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2018-11-22 22:53:01,329 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16357 states. [2018-11-22 22:53:01,447 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16357 to 15837. [2018-11-22 22:53:01,447 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15837 states. [2018-11-22 22:53:01,470 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15837 states to 15837 states and 53450 transitions. [2018-11-22 22:53:01,471 INFO L78 Accepts]: Start accepts. Automaton has 15837 states and 53450 transitions. Word has length 97 [2018-11-22 22:53:01,471 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-22 22:53:01,471 INFO L480 AbstractCegarLoop]: Abstraction has 15837 states and 53450 transitions. [2018-11-22 22:53:01,471 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-22 22:53:01,471 INFO L276 IsEmpty]: Start isEmpty. Operand 15837 states and 53450 transitions. [2018-11-22 22:53:01,485 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 98 [2018-11-22 22:53:01,485 INFO L394 BasicCegarLoop]: Found error trace [2018-11-22 22:53:01,485 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-22 22:53:01,485 INFO L423 AbstractCegarLoop]: === Iteration 14 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-22 22:53:01,485 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-22 22:53:01,485 INFO L82 PathProgramCache]: Analyzing trace with hash -2052983683, now seen corresponding path program 2 times [2018-11-22 22:53:01,485 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-22 22:53:01,486 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-22 22:53:01,486 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:53:01,486 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-22 22:53:01,486 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:53:01,492 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-22 22:53:01,544 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-22 22:53:01,544 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-22 22:53:01,544 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-22 22:53:01,544 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-22 22:53:01,545 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-22 22:53:01,545 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-22 22:53:01,545 INFO L87 Difference]: Start difference. First operand 15837 states and 53450 transitions. Second operand 5 states. [2018-11-22 22:53:01,739 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-22 22:53:01,740 INFO L93 Difference]: Finished difference Result 20664 states and 68496 transitions. [2018-11-22 22:53:01,740 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-22 22:53:01,740 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 97 [2018-11-22 22:53:01,740 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-22 22:53:01,762 INFO L225 Difference]: With dead ends: 20664 [2018-11-22 22:53:01,762 INFO L226 Difference]: Without dead ends: 20504 [2018-11-22 22:53:01,763 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=14, Invalid=16, Unknown=0, NotChecked=0, Total=30 [2018-11-22 22:53:01,786 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20504 states. [2018-11-22 22:53:02,063 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20504 to 17570. [2018-11-22 22:53:02,063 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17570 states. [2018-11-22 22:53:02,087 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17570 states to 17570 states and 58965 transitions. [2018-11-22 22:53:02,088 INFO L78 Accepts]: Start accepts. Automaton has 17570 states and 58965 transitions. Word has length 97 [2018-11-22 22:53:02,088 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-22 22:53:02,088 INFO L480 AbstractCegarLoop]: Abstraction has 17570 states and 58965 transitions. [2018-11-22 22:53:02,088 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-22 22:53:02,088 INFO L276 IsEmpty]: Start isEmpty. Operand 17570 states and 58965 transitions. [2018-11-22 22:53:02,103 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 98 [2018-11-22 22:53:02,103 INFO L394 BasicCegarLoop]: Found error trace [2018-11-22 22:53:02,103 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-22 22:53:02,104 INFO L423 AbstractCegarLoop]: === Iteration 15 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-22 22:53:02,104 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-22 22:53:02,104 INFO L82 PathProgramCache]: Analyzing trace with hash -1376937125, now seen corresponding path program 3 times [2018-11-22 22:53:02,104 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-22 22:53:02,104 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-22 22:53:02,105 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:53:02,105 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-22 22:53:02,106 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:53:02,111 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-22 22:53:02,173 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-22 22:53:02,173 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-22 22:53:02,173 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-11-22 22:53:02,174 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-11-22 22:53:02,174 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-11-22 22:53:02,174 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2018-11-22 22:53:02,174 INFO L87 Difference]: Start difference. First operand 17570 states and 58965 transitions. Second operand 7 states. [2018-11-22 22:53:02,483 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-22 22:53:02,484 INFO L93 Difference]: Finished difference Result 21535 states and 71009 transitions. [2018-11-22 22:53:02,484 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-11-22 22:53:02,484 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 97 [2018-11-22 22:53:02,484 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-22 22:53:02,507 INFO L225 Difference]: With dead ends: 21535 [2018-11-22 22:53:02,508 INFO L226 Difference]: Without dead ends: 21210 [2018-11-22 22:53:02,508 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=29, Invalid=43, Unknown=0, NotChecked=0, Total=72 [2018-11-22 22:53:02,533 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21210 states. [2018-11-22 22:53:02,678 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21210 to 17585. [2018-11-22 22:53:02,679 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17585 states. [2018-11-22 22:53:02,704 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17585 states to 17585 states and 58942 transitions. [2018-11-22 22:53:02,704 INFO L78 Accepts]: Start accepts. Automaton has 17585 states and 58942 transitions. Word has length 97 [2018-11-22 22:53:02,705 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-22 22:53:02,705 INFO L480 AbstractCegarLoop]: Abstraction has 17585 states and 58942 transitions. [2018-11-22 22:53:02,705 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-11-22 22:53:02,705 INFO L276 IsEmpty]: Start isEmpty. Operand 17585 states and 58942 transitions. [2018-11-22 22:53:02,721 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 98 [2018-11-22 22:53:02,721 INFO L394 BasicCegarLoop]: Found error trace [2018-11-22 22:53:02,721 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-22 22:53:02,721 INFO L423 AbstractCegarLoop]: === Iteration 16 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-22 22:53:02,721 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-22 22:53:02,722 INFO L82 PathProgramCache]: Analyzing trace with hash 2066828671, now seen corresponding path program 1 times [2018-11-22 22:53:02,722 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-22 22:53:02,722 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-22 22:53:02,723 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:53:02,723 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-22 22:53:02,723 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:53:02,730 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-22 22:53:02,794 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-22 22:53:02,794 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-22 22:53:02,794 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-22 22:53:02,794 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-22 22:53:02,794 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-22 22:53:02,794 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-11-22 22:53:02,795 INFO L87 Difference]: Start difference. First operand 17585 states and 58942 transitions. Second operand 6 states. [2018-11-22 22:53:02,934 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-22 22:53:02,934 INFO L93 Difference]: Finished difference Result 20760 states and 67307 transitions. [2018-11-22 22:53:02,935 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-11-22 22:53:02,935 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 97 [2018-11-22 22:53:02,935 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-22 22:53:02,958 INFO L225 Difference]: With dead ends: 20760 [2018-11-22 22:53:02,958 INFO L226 Difference]: Without dead ends: 20685 [2018-11-22 22:53:02,959 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=26, Invalid=46, Unknown=0, NotChecked=0, Total=72 [2018-11-22 22:53:02,983 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20685 states. [2018-11-22 22:53:03,134 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20685 to 18285. [2018-11-22 22:53:03,134 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18285 states. [2018-11-22 22:53:03,163 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18285 states to 18285 states and 60187 transitions. [2018-11-22 22:53:03,163 INFO L78 Accepts]: Start accepts. Automaton has 18285 states and 60187 transitions. Word has length 97 [2018-11-22 22:53:03,163 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-22 22:53:03,163 INFO L480 AbstractCegarLoop]: Abstraction has 18285 states and 60187 transitions. [2018-11-22 22:53:03,163 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-22 22:53:03,163 INFO L276 IsEmpty]: Start isEmpty. Operand 18285 states and 60187 transitions. [2018-11-22 22:53:03,181 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 98 [2018-11-22 22:53:03,181 INFO L394 BasicCegarLoop]: Found error trace [2018-11-22 22:53:03,181 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-22 22:53:03,182 INFO L423 AbstractCegarLoop]: === Iteration 17 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-22 22:53:03,182 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-22 22:53:03,182 INFO L82 PathProgramCache]: Analyzing trace with hash 1042134750, now seen corresponding path program 1 times [2018-11-22 22:53:03,182 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-22 22:53:03,182 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-22 22:53:03,183 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:53:03,184 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-22 22:53:03,184 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:53:03,192 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-22 22:53:03,236 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-22 22:53:03,236 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-22 22:53:03,237 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-22 22:53:03,237 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-22 22:53:03,237 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-22 22:53:03,237 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-22 22:53:03,237 INFO L87 Difference]: Start difference. First operand 18285 states and 60187 transitions. Second operand 5 states. [2018-11-22 22:53:03,423 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-22 22:53:03,424 INFO L93 Difference]: Finished difference Result 24187 states and 77863 transitions. [2018-11-22 22:53:03,424 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-11-22 22:53:03,424 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 97 [2018-11-22 22:53:03,424 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-22 22:53:03,449 INFO L225 Difference]: With dead ends: 24187 [2018-11-22 22:53:03,449 INFO L226 Difference]: Without dead ends: 23652 [2018-11-22 22:53:03,449 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 5 SyntacticMatches, 3 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2018-11-22 22:53:03,475 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23652 states. [2018-11-22 22:53:03,632 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23652 to 18930. [2018-11-22 22:53:03,632 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18930 states. [2018-11-22 22:53:03,659 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18930 states to 18930 states and 61813 transitions. [2018-11-22 22:53:03,659 INFO L78 Accepts]: Start accepts. Automaton has 18930 states and 61813 transitions. Word has length 97 [2018-11-22 22:53:03,660 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-22 22:53:03,660 INFO L480 AbstractCegarLoop]: Abstraction has 18930 states and 61813 transitions. [2018-11-22 22:53:03,660 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-22 22:53:03,660 INFO L276 IsEmpty]: Start isEmpty. Operand 18930 states and 61813 transitions. [2018-11-22 22:53:03,676 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 100 [2018-11-22 22:53:03,676 INFO L394 BasicCegarLoop]: Found error trace [2018-11-22 22:53:03,676 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-22 22:53:03,676 INFO L423 AbstractCegarLoop]: === Iteration 18 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-22 22:53:03,677 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-22 22:53:03,677 INFO L82 PathProgramCache]: Analyzing trace with hash -2038420724, now seen corresponding path program 1 times [2018-11-22 22:53:03,677 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-22 22:53:03,677 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-22 22:53:03,678 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:53:03,678 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-22 22:53:03,678 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:53:03,687 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-22 22:53:03,774 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-22 22:53:03,775 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-22 22:53:03,775 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-11-22 22:53:03,775 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-11-22 22:53:03,775 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-11-22 22:53:03,775 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=54, Unknown=0, NotChecked=0, Total=72 [2018-11-22 22:53:03,775 INFO L87 Difference]: Start difference. First operand 18930 states and 61813 transitions. Second operand 9 states. [2018-11-22 22:53:04,350 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-22 22:53:04,350 INFO L93 Difference]: Finished difference Result 32666 states and 104934 transitions. [2018-11-22 22:53:04,350 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-11-22 22:53:04,351 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 99 [2018-11-22 22:53:04,351 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-22 22:53:04,385 INFO L225 Difference]: With dead ends: 32666 [2018-11-22 22:53:04,386 INFO L226 Difference]: Without dead ends: 32538 [2018-11-22 22:53:04,386 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 40 GetRequests, 16 SyntacticMatches, 0 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 143 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=145, Invalid=505, Unknown=0, NotChecked=0, Total=650 [2018-11-22 22:53:04,419 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 32538 states. [2018-11-22 22:53:04,695 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 32538 to 24258. [2018-11-22 22:53:04,695 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24258 states. [2018-11-22 22:53:04,731 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24258 states to 24258 states and 78782 transitions. [2018-11-22 22:53:04,731 INFO L78 Accepts]: Start accepts. Automaton has 24258 states and 78782 transitions. Word has length 99 [2018-11-22 22:53:04,732 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-22 22:53:04,732 INFO L480 AbstractCegarLoop]: Abstraction has 24258 states and 78782 transitions. [2018-11-22 22:53:04,732 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-11-22 22:53:04,732 INFO L276 IsEmpty]: Start isEmpty. Operand 24258 states and 78782 transitions. [2018-11-22 22:53:04,754 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 100 [2018-11-22 22:53:04,754 INFO L394 BasicCegarLoop]: Found error trace [2018-11-22 22:53:04,754 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-22 22:53:04,754 INFO L423 AbstractCegarLoop]: === Iteration 19 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-22 22:53:04,754 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-22 22:53:04,754 INFO L82 PathProgramCache]: Analyzing trace with hash -793656243, now seen corresponding path program 1 times [2018-11-22 22:53:04,754 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-22 22:53:04,754 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-22 22:53:04,755 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:53:04,755 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-22 22:53:04,755 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:53:04,762 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-22 22:53:04,854 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-22 22:53:04,854 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-22 22:53:04,854 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-11-22 22:53:04,855 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-11-22 22:53:04,855 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-11-22 22:53:04,855 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2018-11-22 22:53:04,855 INFO L87 Difference]: Start difference. First operand 24258 states and 78782 transitions. Second operand 7 states. [2018-11-22 22:53:05,312 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-22 22:53:05,312 INFO L93 Difference]: Finished difference Result 38026 states and 122512 transitions. [2018-11-22 22:53:05,312 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-11-22 22:53:05,312 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 99 [2018-11-22 22:53:05,312 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-22 22:53:05,354 INFO L225 Difference]: With dead ends: 38026 [2018-11-22 22:53:05,354 INFO L226 Difference]: Without dead ends: 36926 [2018-11-22 22:53:05,354 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 11 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=39, Invalid=93, Unknown=0, NotChecked=0, Total=132 [2018-11-22 22:53:05,392 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 36926 states. [2018-11-22 22:53:05,620 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 36926 to 23748. [2018-11-22 22:53:05,620 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 23748 states. [2018-11-22 22:53:05,655 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23748 states to 23748 states and 76819 transitions. [2018-11-22 22:53:05,655 INFO L78 Accepts]: Start accepts. Automaton has 23748 states and 76819 transitions. Word has length 99 [2018-11-22 22:53:05,655 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-22 22:53:05,655 INFO L480 AbstractCegarLoop]: Abstraction has 23748 states and 76819 transitions. [2018-11-22 22:53:05,656 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-11-22 22:53:05,656 INFO L276 IsEmpty]: Start isEmpty. Operand 23748 states and 76819 transitions. [2018-11-22 22:53:05,676 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 100 [2018-11-22 22:53:05,676 INFO L394 BasicCegarLoop]: Found error trace [2018-11-22 22:53:05,676 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-22 22:53:05,677 INFO L423 AbstractCegarLoop]: === Iteration 20 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-22 22:53:05,677 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-22 22:53:05,677 INFO L82 PathProgramCache]: Analyzing trace with hash -1963977170, now seen corresponding path program 1 times [2018-11-22 22:53:05,677 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-22 22:53:05,677 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-22 22:53:05,678 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:53:05,678 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-22 22:53:05,678 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:53:05,683 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-22 22:53:05,764 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-22 22:53:05,764 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-22 22:53:05,764 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-22 22:53:05,764 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-22 22:53:05,765 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-22 22:53:05,765 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-11-22 22:53:05,765 INFO L87 Difference]: Start difference. First operand 23748 states and 76819 transitions. Second operand 6 states. [2018-11-22 22:53:05,855 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-22 22:53:05,855 INFO L93 Difference]: Finished difference Result 17635 states and 57458 transitions. [2018-11-22 22:53:05,856 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-11-22 22:53:05,856 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 99 [2018-11-22 22:53:05,856 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-22 22:53:05,875 INFO L225 Difference]: With dead ends: 17635 [2018-11-22 22:53:05,875 INFO L226 Difference]: Without dead ends: 17635 [2018-11-22 22:53:05,875 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=35, Unknown=0, NotChecked=0, Total=56 [2018-11-22 22:53:05,896 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17635 states. [2018-11-22 22:53:06,015 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17635 to 16060. [2018-11-22 22:53:06,016 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16060 states. [2018-11-22 22:53:06,039 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16060 states to 16060 states and 52773 transitions. [2018-11-22 22:53:06,039 INFO L78 Accepts]: Start accepts. Automaton has 16060 states and 52773 transitions. Word has length 99 [2018-11-22 22:53:06,039 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-22 22:53:06,039 INFO L480 AbstractCegarLoop]: Abstraction has 16060 states and 52773 transitions. [2018-11-22 22:53:06,039 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-22 22:53:06,040 INFO L276 IsEmpty]: Start isEmpty. Operand 16060 states and 52773 transitions. [2018-11-22 22:53:06,053 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 100 [2018-11-22 22:53:06,053 INFO L394 BasicCegarLoop]: Found error trace [2018-11-22 22:53:06,054 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-22 22:53:06,054 INFO L423 AbstractCegarLoop]: === Iteration 21 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-22 22:53:06,054 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-22 22:53:06,054 INFO L82 PathProgramCache]: Analyzing trace with hash -456422671, now seen corresponding path program 1 times [2018-11-22 22:53:06,054 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-22 22:53:06,054 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-22 22:53:06,055 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:53:06,055 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-22 22:53:06,055 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:53:06,062 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-22 22:53:06,112 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-22 22:53:06,112 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-22 22:53:06,112 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-11-22 22:53:06,112 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-11-22 22:53:06,112 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-11-22 22:53:06,113 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=22, Unknown=0, NotChecked=0, Total=42 [2018-11-22 22:53:06,113 INFO L87 Difference]: Start difference. First operand 16060 states and 52773 transitions. Second operand 7 states. [2018-11-22 22:53:06,281 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-22 22:53:06,281 INFO L93 Difference]: Finished difference Result 17589 states and 57474 transitions. [2018-11-22 22:53:06,282 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-11-22 22:53:06,282 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 99 [2018-11-22 22:53:06,282 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-22 22:53:06,302 INFO L225 Difference]: With dead ends: 17589 [2018-11-22 22:53:06,302 INFO L226 Difference]: Without dead ends: 17589 [2018-11-22 22:53:06,302 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=20, Invalid=22, Unknown=0, NotChecked=0, Total=42 [2018-11-22 22:53:06,324 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17589 states. [2018-11-22 22:53:06,442 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17589 to 15970. [2018-11-22 22:53:06,443 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15970 states. [2018-11-22 22:53:06,466 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15970 states to 15970 states and 52521 transitions. [2018-11-22 22:53:06,466 INFO L78 Accepts]: Start accepts. Automaton has 15970 states and 52521 transitions. Word has length 99 [2018-11-22 22:53:06,466 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-22 22:53:06,466 INFO L480 AbstractCegarLoop]: Abstraction has 15970 states and 52521 transitions. [2018-11-22 22:53:06,466 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-11-22 22:53:06,466 INFO L276 IsEmpty]: Start isEmpty. Operand 15970 states and 52521 transitions. [2018-11-22 22:53:06,480 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 100 [2018-11-22 22:53:06,480 INFO L394 BasicCegarLoop]: Found error trace [2018-11-22 22:53:06,480 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-22 22:53:06,481 INFO L423 AbstractCegarLoop]: === Iteration 22 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-22 22:53:06,481 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-22 22:53:06,481 INFO L82 PathProgramCache]: Analyzing trace with hash 954456849, now seen corresponding path program 1 times [2018-11-22 22:53:06,481 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-22 22:53:06,481 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-22 22:53:06,482 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:53:06,482 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-22 22:53:06,482 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:53:06,488 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-22 22:53:06,678 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-22 22:53:06,678 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-22 22:53:06,678 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-11-22 22:53:06,679 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-11-22 22:53:06,679 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-11-22 22:53:06,680 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=42, Unknown=0, NotChecked=0, Total=56 [2018-11-22 22:53:06,680 INFO L87 Difference]: Start difference. First operand 15970 states and 52521 transitions. Second operand 8 states. [2018-11-22 22:53:06,976 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-22 22:53:06,976 INFO L93 Difference]: Finished difference Result 20725 states and 67497 transitions. [2018-11-22 22:53:06,976 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-11-22 22:53:06,976 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 99 [2018-11-22 22:53:06,977 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-22 22:53:06,999 INFO L225 Difference]: With dead ends: 20725 [2018-11-22 22:53:07,000 INFO L226 Difference]: Without dead ends: 20597 [2018-11-22 22:53:07,000 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 15 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=43, Invalid=139, Unknown=0, NotChecked=0, Total=182 [2018-11-22 22:53:07,024 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20597 states. [2018-11-22 22:53:07,167 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20597 to 16691. [2018-11-22 22:53:07,167 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16691 states. [2018-11-22 22:53:07,190 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16691 states to 16691 states and 54567 transitions. [2018-11-22 22:53:07,190 INFO L78 Accepts]: Start accepts. Automaton has 16691 states and 54567 transitions. Word has length 99 [2018-11-22 22:53:07,191 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-22 22:53:07,191 INFO L480 AbstractCegarLoop]: Abstraction has 16691 states and 54567 transitions. [2018-11-22 22:53:07,191 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-11-22 22:53:07,191 INFO L276 IsEmpty]: Start isEmpty. Operand 16691 states and 54567 transitions. [2018-11-22 22:53:07,205 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 100 [2018-11-22 22:53:07,205 INFO L394 BasicCegarLoop]: Found error trace [2018-11-22 22:53:07,205 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-22 22:53:07,205 INFO L423 AbstractCegarLoop]: === Iteration 23 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-22 22:53:07,206 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-22 22:53:07,206 INFO L82 PathProgramCache]: Analyzing trace with hash 1916070866, now seen corresponding path program 1 times [2018-11-22 22:53:07,206 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-22 22:53:07,206 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-22 22:53:07,207 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:53:07,207 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-22 22:53:07,207 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:53:07,213 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-22 22:53:07,267 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-22 22:53:07,267 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-22 22:53:07,267 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-11-22 22:53:07,267 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-11-22 22:53:07,268 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-11-22 22:53:07,268 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2018-11-22 22:53:07,268 INFO L87 Difference]: Start difference. First operand 16691 states and 54567 transitions. Second operand 7 states. [2018-11-22 22:53:07,522 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-22 22:53:07,522 INFO L93 Difference]: Finished difference Result 22271 states and 71965 transitions. [2018-11-22 22:53:07,523 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-11-22 22:53:07,523 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 99 [2018-11-22 22:53:07,523 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-22 22:53:07,547 INFO L225 Difference]: With dead ends: 22271 [2018-11-22 22:53:07,547 INFO L226 Difference]: Without dead ends: 22271 [2018-11-22 22:53:07,548 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=39, Invalid=93, Unknown=0, NotChecked=0, Total=132 [2018-11-22 22:53:07,573 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22271 states. [2018-11-22 22:53:07,716 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22271 to 18226. [2018-11-22 22:53:07,717 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18226 states. [2018-11-22 22:53:07,741 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18226 states to 18226 states and 59616 transitions. [2018-11-22 22:53:07,741 INFO L78 Accepts]: Start accepts. Automaton has 18226 states and 59616 transitions. Word has length 99 [2018-11-22 22:53:07,741 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-22 22:53:07,741 INFO L480 AbstractCegarLoop]: Abstraction has 18226 states and 59616 transitions. [2018-11-22 22:53:07,741 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-11-22 22:53:07,742 INFO L276 IsEmpty]: Start isEmpty. Operand 18226 states and 59616 transitions. [2018-11-22 22:53:07,756 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 100 [2018-11-22 22:53:07,756 INFO L394 BasicCegarLoop]: Found error trace [2018-11-22 22:53:07,756 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-22 22:53:07,757 INFO L423 AbstractCegarLoop]: === Iteration 24 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-22 22:53:07,757 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-22 22:53:07,757 INFO L82 PathProgramCache]: Analyzing trace with hash -1134131949, now seen corresponding path program 1 times [2018-11-22 22:53:07,757 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-22 22:53:07,757 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-22 22:53:07,758 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:53:07,758 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-22 22:53:07,758 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:53:07,765 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-22 22:53:07,831 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-22 22:53:07,831 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-22 22:53:07,831 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-22 22:53:07,831 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-22 22:53:07,831 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-22 22:53:07,831 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2018-11-22 22:53:07,832 INFO L87 Difference]: Start difference. First operand 18226 states and 59616 transitions. Second operand 5 states. [2018-11-22 22:53:07,930 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-22 22:53:07,930 INFO L93 Difference]: Finished difference Result 27347 states and 90700 transitions. [2018-11-22 22:53:07,930 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-22 22:53:07,930 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 99 [2018-11-22 22:53:07,930 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-22 22:53:07,962 INFO L225 Difference]: With dead ends: 27347 [2018-11-22 22:53:07,962 INFO L226 Difference]: Without dead ends: 27347 [2018-11-22 22:53:07,962 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2018-11-22 22:53:07,993 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27347 states. [2018-11-22 22:53:08,147 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27347 to 16676. [2018-11-22 22:53:08,147 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16676 states. [2018-11-22 22:53:08,169 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16676 states to 16676 states and 53990 transitions. [2018-11-22 22:53:08,169 INFO L78 Accepts]: Start accepts. Automaton has 16676 states and 53990 transitions. Word has length 99 [2018-11-22 22:53:08,170 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-22 22:53:08,170 INFO L480 AbstractCegarLoop]: Abstraction has 16676 states and 53990 transitions. [2018-11-22 22:53:08,170 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-22 22:53:08,170 INFO L276 IsEmpty]: Start isEmpty. Operand 16676 states and 53990 transitions. [2018-11-22 22:53:08,183 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 100 [2018-11-22 22:53:08,183 INFO L394 BasicCegarLoop]: Found error trace [2018-11-22 22:53:08,183 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-22 22:53:08,183 INFO L423 AbstractCegarLoop]: === Iteration 25 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-22 22:53:08,184 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-22 22:53:08,184 INFO L82 PathProgramCache]: Analyzing trace with hash -653415533, now seen corresponding path program 1 times [2018-11-22 22:53:08,184 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-22 22:53:08,184 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-22 22:53:08,185 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:53:08,185 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-22 22:53:08,185 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:53:08,191 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-22 22:53:08,266 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-22 22:53:08,267 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-22 22:53:08,267 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-22 22:53:08,267 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-22 22:53:08,267 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-22 22:53:08,267 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-11-22 22:53:08,267 INFO L87 Difference]: Start difference. First operand 16676 states and 53990 transitions. Second operand 6 states. [2018-11-22 22:53:08,423 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-22 22:53:08,424 INFO L93 Difference]: Finished difference Result 14948 states and 47542 transitions. [2018-11-22 22:53:08,424 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-11-22 22:53:08,424 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 99 [2018-11-22 22:53:08,424 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-22 22:53:08,440 INFO L225 Difference]: With dead ends: 14948 [2018-11-22 22:53:08,440 INFO L226 Difference]: Without dead ends: 14948 [2018-11-22 22:53:08,440 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=35, Unknown=0, NotChecked=0, Total=56 [2018-11-22 22:53:08,460 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 14948 states. [2018-11-22 22:53:08,553 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 14948 to 11537. [2018-11-22 22:53:08,553 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11537 states. [2018-11-22 22:53:08,569 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11537 states to 11537 states and 37526 transitions. [2018-11-22 22:53:08,569 INFO L78 Accepts]: Start accepts. Automaton has 11537 states and 37526 transitions. Word has length 99 [2018-11-22 22:53:08,570 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-22 22:53:08,570 INFO L480 AbstractCegarLoop]: Abstraction has 11537 states and 37526 transitions. [2018-11-22 22:53:08,570 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-22 22:53:08,570 INFO L276 IsEmpty]: Start isEmpty. Operand 11537 states and 37526 transitions. [2018-11-22 22:53:08,579 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 102 [2018-11-22 22:53:08,579 INFO L394 BasicCegarLoop]: Found error trace [2018-11-22 22:53:08,579 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-22 22:53:08,580 INFO L423 AbstractCegarLoop]: === Iteration 26 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-22 22:53:08,580 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-22 22:53:08,580 INFO L82 PathProgramCache]: Analyzing trace with hash 1543607272, now seen corresponding path program 1 times [2018-11-22 22:53:08,580 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-22 22:53:08,580 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-22 22:53:08,581 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:53:08,581 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-22 22:53:08,581 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:53:08,585 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-22 22:53:08,643 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-22 22:53:08,643 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-22 22:53:08,643 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-22 22:53:08,643 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-22 22:53:08,643 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-22 22:53:08,643 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-22 22:53:08,644 INFO L87 Difference]: Start difference. First operand 11537 states and 37526 transitions. Second operand 5 states. [2018-11-22 22:53:08,784 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-22 22:53:08,784 INFO L93 Difference]: Finished difference Result 12945 states and 42038 transitions. [2018-11-22 22:53:08,785 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-11-22 22:53:08,785 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 101 [2018-11-22 22:53:08,785 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-22 22:53:08,803 INFO L225 Difference]: With dead ends: 12945 [2018-11-22 22:53:08,804 INFO L226 Difference]: Without dead ends: 12817 [2018-11-22 22:53:08,804 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2018-11-22 22:53:08,821 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 12817 states. [2018-11-22 22:53:08,950 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 12817 to 11729. [2018-11-22 22:53:08,950 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11729 states. [2018-11-22 22:53:08,967 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11729 states to 11729 states and 38086 transitions. [2018-11-22 22:53:08,967 INFO L78 Accepts]: Start accepts. Automaton has 11729 states and 38086 transitions. Word has length 101 [2018-11-22 22:53:08,967 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-22 22:53:08,967 INFO L480 AbstractCegarLoop]: Abstraction has 11729 states and 38086 transitions. [2018-11-22 22:53:08,967 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-22 22:53:08,967 INFO L276 IsEmpty]: Start isEmpty. Operand 11729 states and 38086 transitions. [2018-11-22 22:53:08,977 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 102 [2018-11-22 22:53:08,977 INFO L394 BasicCegarLoop]: Found error trace [2018-11-22 22:53:08,977 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-22 22:53:08,977 INFO L423 AbstractCegarLoop]: === Iteration 27 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-22 22:53:08,978 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-22 22:53:08,978 INFO L82 PathProgramCache]: Analyzing trace with hash -1506595543, now seen corresponding path program 1 times [2018-11-22 22:53:08,978 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-22 22:53:08,978 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-22 22:53:08,979 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:53:08,979 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-22 22:53:08,979 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:53:08,990 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-22 22:53:09,073 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-22 22:53:09,073 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-22 22:53:09,073 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-11-22 22:53:09,073 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-11-22 22:53:09,073 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-11-22 22:53:09,073 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-11-22 22:53:09,074 INFO L87 Difference]: Start difference. First operand 11729 states and 38086 transitions. Second operand 7 states. [2018-11-22 22:53:09,299 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-22 22:53:09,299 INFO L93 Difference]: Finished difference Result 22201 states and 72476 transitions. [2018-11-22 22:53:09,299 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-11-22 22:53:09,299 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 101 [2018-11-22 22:53:09,300 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-22 22:53:09,313 INFO L225 Difference]: With dead ends: 22201 [2018-11-22 22:53:09,313 INFO L226 Difference]: Without dead ends: 11329 [2018-11-22 22:53:09,314 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=33, Invalid=77, Unknown=0, NotChecked=0, Total=110 [2018-11-22 22:53:09,329 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 11329 states. [2018-11-22 22:53:09,410 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 11329 to 11069. [2018-11-22 22:53:09,410 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11069 states. [2018-11-22 22:53:09,425 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11069 states to 11069 states and 36166 transitions. [2018-11-22 22:53:09,426 INFO L78 Accepts]: Start accepts. Automaton has 11069 states and 36166 transitions. Word has length 101 [2018-11-22 22:53:09,426 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-22 22:53:09,426 INFO L480 AbstractCegarLoop]: Abstraction has 11069 states and 36166 transitions. [2018-11-22 22:53:09,426 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-11-22 22:53:09,426 INFO L276 IsEmpty]: Start isEmpty. Operand 11069 states and 36166 transitions. [2018-11-22 22:53:09,435 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 102 [2018-11-22 22:53:09,435 INFO L394 BasicCegarLoop]: Found error trace [2018-11-22 22:53:09,435 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-22 22:53:09,435 INFO L423 AbstractCegarLoop]: === Iteration 28 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-22 22:53:09,435 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-22 22:53:09,435 INFO L82 PathProgramCache]: Analyzing trace with hash -321724473, now seen corresponding path program 2 times [2018-11-22 22:53:09,435 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-22 22:53:09,435 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-22 22:53:09,436 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:53:09,436 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-22 22:53:09,436 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:53:09,443 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-22 22:53:09,512 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-22 22:53:09,512 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-22 22:53:09,512 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-11-22 22:53:09,512 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-11-22 22:53:09,512 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-11-22 22:53:09,513 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-11-22 22:53:09,513 INFO L87 Difference]: Start difference. First operand 11069 states and 36166 transitions. Second operand 7 states. [2018-11-22 22:53:09,747 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-22 22:53:09,748 INFO L93 Difference]: Finished difference Result 18645 states and 61540 transitions. [2018-11-22 22:53:09,748 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-11-22 22:53:09,748 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 101 [2018-11-22 22:53:09,749 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-22 22:53:09,758 INFO L225 Difference]: With dead ends: 18645 [2018-11-22 22:53:09,758 INFO L226 Difference]: Without dead ends: 7616 [2018-11-22 22:53:09,758 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=33, Invalid=77, Unknown=0, NotChecked=0, Total=110 [2018-11-22 22:53:09,770 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7616 states. [2018-11-22 22:53:09,824 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7616 to 7616. [2018-11-22 22:53:09,824 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7616 states. [2018-11-22 22:53:09,835 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7616 states to 7616 states and 25482 transitions. [2018-11-22 22:53:09,835 INFO L78 Accepts]: Start accepts. Automaton has 7616 states and 25482 transitions. Word has length 101 [2018-11-22 22:53:09,836 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-22 22:53:09,836 INFO L480 AbstractCegarLoop]: Abstraction has 7616 states and 25482 transitions. [2018-11-22 22:53:09,836 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-11-22 22:53:09,836 INFO L276 IsEmpty]: Start isEmpty. Operand 7616 states and 25482 transitions. [2018-11-22 22:53:09,843 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 102 [2018-11-22 22:53:09,843 INFO L394 BasicCegarLoop]: Found error trace [2018-11-22 22:53:09,843 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-22 22:53:09,843 INFO L423 AbstractCegarLoop]: === Iteration 29 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-22 22:53:09,843 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-22 22:53:09,843 INFO L82 PathProgramCache]: Analyzing trace with hash 773161459, now seen corresponding path program 3 times [2018-11-22 22:53:09,844 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-22 22:53:09,844 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-22 22:53:09,845 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:53:09,845 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-22 22:53:09,845 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:53:09,852 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-22 22:53:09,947 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-22 22:53:09,947 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-22 22:53:09,947 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2018-11-22 22:53:09,947 INFO L459 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-11-22 22:53:09,947 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-11-22 22:53:09,947 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=111, Unknown=0, NotChecked=0, Total=132 [2018-11-22 22:53:09,948 INFO L87 Difference]: Start difference. First operand 7616 states and 25482 transitions. Second operand 12 states. [2018-11-22 22:53:10,368 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-22 22:53:10,368 INFO L93 Difference]: Finished difference Result 14444 states and 48675 transitions. [2018-11-22 22:53:10,369 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-11-22 22:53:10,369 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 101 [2018-11-22 22:53:10,369 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-22 22:53:10,381 INFO L225 Difference]: With dead ends: 14444 [2018-11-22 22:53:10,381 INFO L226 Difference]: Without dead ends: 10540 [2018-11-22 22:53:10,381 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 36 GetRequests, 12 SyntacticMatches, 0 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 86 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=100, Invalid=550, Unknown=0, NotChecked=0, Total=650 [2018-11-22 22:53:10,397 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10540 states. [2018-11-22 22:53:10,467 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10540 to 9860. [2018-11-22 22:53:10,468 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9860 states. [2018-11-22 22:53:10,481 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9860 states to 9860 states and 32373 transitions. [2018-11-22 22:53:10,481 INFO L78 Accepts]: Start accepts. Automaton has 9860 states and 32373 transitions. Word has length 101 [2018-11-22 22:53:10,481 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-22 22:53:10,481 INFO L480 AbstractCegarLoop]: Abstraction has 9860 states and 32373 transitions. [2018-11-22 22:53:10,481 INFO L481 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-11-22 22:53:10,482 INFO L276 IsEmpty]: Start isEmpty. Operand 9860 states and 32373 transitions. [2018-11-22 22:53:10,490 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 102 [2018-11-22 22:53:10,490 INFO L394 BasicCegarLoop]: Found error trace [2018-11-22 22:53:10,490 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-22 22:53:10,490 INFO L423 AbstractCegarLoop]: === Iteration 30 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-22 22:53:10,490 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-22 22:53:10,490 INFO L82 PathProgramCache]: Analyzing trace with hash -350606857, now seen corresponding path program 4 times [2018-11-22 22:53:10,490 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-22 22:53:10,491 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-22 22:53:10,492 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:53:10,492 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-22 22:53:10,492 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-22 22:53:10,499 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-22 22:53:10,510 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-22 22:53:10,537 INFO L469 BasicCegarLoop]: Counterexample might be feasible ----- class de.uni_freiburg.informatik.ultimate.modelcheckerutils.cfg.transformations.BlockEncodingBacktranslator [?] -1 [505] ULTIMATE.startENTRY-->L-1: Formula: (and (= |v_#NULL.offset_1| 0) (= |v_#NULL.base_1| 0)) InVars {} OutVars{#NULL.offset=|v_#NULL.offset_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] VAL [|#NULL.base|=0, |#NULL.offset|=0] [?] -1 [375] L-1-->L672: Formula: (= |v_#valid_7| (store |v_#valid_8| 0 0)) InVars {#valid=|v_#valid_8|} OutVars{#valid=|v_#valid_7|} AuxVars[] AssignedVars[#valid] VAL [|#NULL.base|=0, |#NULL.offset|=0] [?] -1 [478] L672-->L673: Formula: (= v_~__unbuffered_cnt~0_7 0) InVars {} OutVars{~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_7} AuxVars[] AssignedVars[~__unbuffered_cnt~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0] [?] -1 [395] L673-->L674: Formula: (= v_~main$tmp_guard0~0_1 0) InVars {} OutVars{~main$tmp_guard0~0=v_~main$tmp_guard0~0_1} AuxVars[] AssignedVars[~main$tmp_guard0~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0] [?] -1 [523] L674-->L676: Formula: (= v_~main$tmp_guard1~0_3 0) InVars {} OutVars{~main$tmp_guard1~0=v_~main$tmp_guard1~0_3} AuxVars[] AssignedVars[~main$tmp_guard1~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [?] -1 [361] L676-->L678: Formula: (= v_~x~0_4 0) InVars {} OutVars{~x~0=v_~x~0_4} AuxVars[] AssignedVars[~x~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [?] -1 [441] L678-->L679: Formula: (= v_~y~0_9 0) InVars {} OutVars{~y~0=v_~y~0_9} AuxVars[] AssignedVars[~y~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0] [?] -1 [545] L679-->L680: Formula: (= v_~y$flush_delayed~0_4 0) InVars {} OutVars{~y$flush_delayed~0=v_~y$flush_delayed~0_4} AuxVars[] AssignedVars[~y$flush_delayed~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y~0=0] [?] -1 [480] L680-->L681: Formula: (= v_~y$mem_tmp~0_2 0) InVars {} OutVars{~y$mem_tmp~0=v_~y$mem_tmp~0_2} AuxVars[] AssignedVars[~y$mem_tmp~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y~0=0] [?] -1 [399] L681-->L682: Formula: (= v_~y$r_buff0_thd0~0_19 0) InVars {} OutVars{~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_19} AuxVars[] AssignedVars[~y$r_buff0_thd0~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y~0=0] [?] -1 [536] L682-->L683: Formula: (= v_~y$r_buff0_thd1~0_2 0) InVars {} OutVars{~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_2} AuxVars[] AssignedVars[~y$r_buff0_thd1~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y~0=0] [?] -1 [476] L683-->L684: Formula: (= v_~y$r_buff0_thd2~0_13 0) InVars {} OutVars{~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_13} AuxVars[] AssignedVars[~y$r_buff0_thd2~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y~0=0] [?] -1 [394] L684-->L685: Formula: (= v_~y$r_buff0_thd3~0_14 0) InVars {} OutVars{~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_14} AuxVars[] AssignedVars[~y$r_buff0_thd3~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y~0=0] [?] -1 [522] L685-->L686: Formula: (= v_~y$r_buff1_thd0~0_11 0) InVars {} OutVars{~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_11} AuxVars[] AssignedVars[~y$r_buff1_thd0~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y~0=0] [?] -1 [447] L686-->L687: Formula: (= v_~y$r_buff1_thd1~0_2 0) InVars {} OutVars{~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_2} AuxVars[] AssignedVars[~y$r_buff1_thd1~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y~0=0] [?] -1 [387] L687-->L688: Formula: (= v_~y$r_buff1_thd2~0_9 0) InVars {} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_9} AuxVars[] AssignedVars[~y$r_buff1_thd2~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y~0=0] [?] -1 [515] L688-->L689: Formula: (= v_~y$r_buff1_thd3~0_9 0) InVars {} OutVars{~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_9} AuxVars[] AssignedVars[~y$r_buff1_thd3~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y~0=0] [?] -1 [439] L689-->L690: Formula: (= v_~y$read_delayed~0_1 0) InVars {} OutVars{~y$read_delayed~0=v_~y$read_delayed~0_1} AuxVars[] AssignedVars[~y$read_delayed~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed~0=0, ~y~0=0] [?] -1 [544] L690-->L691: Formula: (and (= v_~y$read_delayed_var~0.offset_1 0) (= v_~y$read_delayed_var~0.base_1 0)) InVars {} OutVars{~y$read_delayed_var~0.base=v_~y$read_delayed_var~0.base_1, ~y$read_delayed_var~0.offset=v_~y$read_delayed_var~0.offset_1} AuxVars[] AssignedVars[~y$read_delayed_var~0.offset, ~y$read_delayed_var~0.base] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y~0=0] [?] -1 [479] L691-->L692: Formula: (= v_~y$w_buff0~0_5 0) InVars {} OutVars{~y$w_buff0~0=v_~y$w_buff0~0_5} AuxVars[] AssignedVars[~y$w_buff0~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0~0=0, ~y~0=0] [?] -1 [398] L692-->L693: Formula: (= v_~y$w_buff0_used~0_41 0) InVars {} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_41} AuxVars[] AssignedVars[~y$w_buff0_used~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y~0=0] [?] -1 [534] L693-->L694: Formula: (= v_~y$w_buff1~0_4 0) InVars {} OutVars{~y$w_buff1~0=v_~y$w_buff1~0_4} AuxVars[] AssignedVars[~y$w_buff1~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [475] L694-->L696: Formula: (= v_~y$w_buff1_used~0_25 0) InVars {} OutVars{~y$w_buff1_used~0=v_~y$w_buff1_used~0_25} AuxVars[] AssignedVars[~y$w_buff1_used~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [521] L696-->L697: Formula: (= v_~z~0_4 0) InVars {} OutVars{~z~0=v_~z~0_4} AuxVars[] AssignedVars[~z~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 [446] L697-->L698: Formula: (= v_~weak$$choice0~0_1 0) InVars {} OutVars{~weak$$choice0~0=v_~weak$$choice0~0_1} AuxVars[] AssignedVars[~weak$$choice0~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 [386] L698-->L-1-1: Formula: (= v_~weak$$choice2~0_7 0) InVars {} OutVars{~weak$$choice2~0=v_~weak$$choice2~0_7} AuxVars[] AssignedVars[~weak$$choice2~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 [535] L-1-1-->L-1-2: Formula: true InVars {} OutVars{ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_#res] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 [532] L-1-2-->L774: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~nondet27.offset=|v_ULTIMATE.start_main_#t~nondet27.offset_1|, ULTIMATE.start_main_~#t2495~0.offset=|v_ULTIMATE.start_main_~#t2495~0.offset_3|, ULTIMATE.start_main_#t~ite29=|v_ULTIMATE.start_main_#t~ite29_1|, ULTIMATE.start_main_#t~ite24=|v_ULTIMATE.start_main_#t~ite24_1|, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_5|, ULTIMATE.start_main_#t~ite25=|v_ULTIMATE.start_main_#t~ite25_1|, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_5|, ULTIMATE.start_main_#t~ite26=|v_ULTIMATE.start_main_#t~ite26_1|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_5|, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_5|, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_5|, ULTIMATE.start_main_#t~ite21=|v_ULTIMATE.start_main_#t~ite21_1|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_5|, ULTIMATE.start_main_~#t2496~0.base=|v_ULTIMATE.start_main_~#t2496~0.base_3|, ULTIMATE.start_main_#t~ite22=|v_ULTIMATE.start_main_#t~ite22_1|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_5|, ULTIMATE.start_main_#t~ite23=|v_ULTIMATE.start_main_#t~ite23_1|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_5|, ULTIMATE.start_main_~#t2494~0.base=|v_ULTIMATE.start_main_~#t2494~0.base_3|, ULTIMATE.start_main_#t~nondet28.base=|v_ULTIMATE.start_main_#t~nondet28.base_1|, ULTIMATE.start_main_#t~ite30=|v_ULTIMATE.start_main_#t~ite30_1|, ULTIMATE.start_main_#t~nondet27.base=|v_ULTIMATE.start_main_#t~nondet27.base_1|, ULTIMATE.start_main_#t~nondet28.offset=|v_ULTIMATE.start_main_#t~nondet28.offset_1|, ULTIMATE.start_main_~#t2494~0.offset=|v_ULTIMATE.start_main_~#t2494~0.offset_3|, ULTIMATE.start_main_#t~nondet20=|v_ULTIMATE.start_main_#t~nondet20_1|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_4|, ULTIMATE.start_main_#t~ite35=|v_ULTIMATE.start_main_#t~ite35_1|, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_1|, ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_4|, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_5|, ULTIMATE.start_main_#t~ite31=|v_ULTIMATE.start_main_#t~ite31_1|, ULTIMATE.start_main_#t~ite32=|v_ULTIMATE.start_main_#t~ite32_1|, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_1|, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_1|, ULTIMATE.start_main_~#t2496~0.offset=|v_ULTIMATE.start_main_~#t2496~0.offset_3|, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_5|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_5|, ULTIMATE.start_main_~#t2495~0.base=|v_ULTIMATE.start_main_~#t2495~0.base_3|, ULTIMATE.start_main_#t~nondet18=|v_ULTIMATE.start_main_#t~nondet18_1|, ULTIMATE.start_main_#t~nondet19=|v_ULTIMATE.start_main_#t~nondet19_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet27.offset, ULTIMATE.start_main_~#t2495~0.offset, ULTIMATE.start_main_#t~ite29, ULTIMATE.start_main_#t~ite24, ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite25, ULTIMATE.start_main_#t~ite46, ULTIMATE.start_main_#t~ite26, ULTIMATE.start_main_#t~ite49, ULTIMATE.start_main_#t~ite48, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite21, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_~#t2496~0.base, ULTIMATE.start_main_#t~ite22, ULTIMATE.start_main_#t~ite45, ULTIMATE.start_main_#t~ite23, ULTIMATE.start_main_#t~ite44, ULTIMATE.start_main_~#t2494~0.base, ULTIMATE.start_main_#t~nondet28.base, ULTIMATE.start_main_#t~ite30, ULTIMATE.start_main_#t~nondet27.base, ULTIMATE.start_main_#t~nondet28.offset, ULTIMATE.start_main_~#t2494~0.offset, ULTIMATE.start_main_#t~nondet20, ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~ite35, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite38, ULTIMATE.start_main_#t~ite37, ULTIMATE.start_main_#t~ite31, ULTIMATE.start_main_#t~ite32, ULTIMATE.start_main_#t~ite33, ULTIMATE.start_main_#t~ite34, ULTIMATE.start_main_~#t2496~0.offset, ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#t~ite40, ULTIMATE.start_main_~#t2495~0.base, ULTIMATE.start_main_#t~nondet18, ULTIMATE.start_main_#t~nondet19] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 [464] L774-->L774-1: Formula: (and (= |v_#length_1| (store |v_#length_2| |v_ULTIMATE.start_main_~#t2494~0.base_4| 4)) (= (store |v_#valid_10| |v_ULTIMATE.start_main_~#t2494~0.base_4| 1) |v_#valid_9|) (= 0 |v_ULTIMATE.start_main_~#t2494~0.offset_4|) (not (= |v_ULTIMATE.start_main_~#t2494~0.base_4| 0)) (= 0 (select |v_#valid_10| |v_ULTIMATE.start_main_~#t2494~0.base_4|))) InVars {#length=|v_#length_2|, #valid=|v_#valid_10|} OutVars{ULTIMATE.start_main_~#t2494~0.base=|v_ULTIMATE.start_main_~#t2494~0.base_4|, #length=|v_#length_1|, ULTIMATE.start_main_~#t2494~0.offset=|v_ULTIMATE.start_main_~#t2494~0.offset_4|, #valid=|v_#valid_9|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t2494~0.base, #valid, #length, ULTIMATE.start_main_~#t2494~0.offset] VAL [|#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 [466] L774-1-->L775: Formula: (= |v_#memory_int_1| (store |v_#memory_int_2| |v_ULTIMATE.start_main_~#t2494~0.base_5| (store (select |v_#memory_int_2| |v_ULTIMATE.start_main_~#t2494~0.base_5|) |v_ULTIMATE.start_main_~#t2494~0.offset_5| 0))) InVars {ULTIMATE.start_main_~#t2494~0.base=|v_ULTIMATE.start_main_~#t2494~0.base_5|, #memory_int=|v_#memory_int_2|, ULTIMATE.start_main_~#t2494~0.offset=|v_ULTIMATE.start_main_~#t2494~0.offset_5|} OutVars{ULTIMATE.start_main_~#t2494~0.base=|v_ULTIMATE.start_main_~#t2494~0.base_5|, #memory_int=|v_#memory_int_1|, ULTIMATE.start_main_~#t2494~0.offset=|v_ULTIMATE.start_main_~#t2494~0.offset_5|} AuxVars[] AssignedVars[#memory_int] VAL [|#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] FORK -1 [606] L775-->P0ENTRY: Formula: (and (= 0 |v_Thread1_P0_#in~arg.base_3|) (= 0 v_Thread1_P0_thidvar0_2) (= 0 |v_Thread1_P0_#in~arg.offset_3|)) InVars {} OutVars{Thread1_P0_#in~arg.base=|v_Thread1_P0_#in~arg.base_3|, Thread1_P0_#in~arg.offset=|v_Thread1_P0_#in~arg.offset_3|, Thread1_P0_thidvar0=v_Thread1_P0_thidvar0_2} AuxVars[] AssignedVars[Thread1_P0_#in~arg.base, Thread1_P0_#in~arg.offset, Thread1_P0_thidvar0] VAL [Thread1_P0_thidvar0=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 [382] L775-1-->L776: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~nondet18=|v_ULTIMATE.start_main_#t~nondet18_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet18] VAL [Thread1_P0_thidvar0=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 [509] L776-->L776-1: Formula: (and (= 0 |v_ULTIMATE.start_main_~#t2495~0.offset_4|) (not (= |v_ULTIMATE.start_main_~#t2495~0.base_4| 0)) (= |v_#valid_11| (store |v_#valid_12| |v_ULTIMATE.start_main_~#t2495~0.base_4| 1)) (= (select |v_#valid_12| |v_ULTIMATE.start_main_~#t2495~0.base_4|) 0) (= (store |v_#length_4| |v_ULTIMATE.start_main_~#t2495~0.base_4| 4) |v_#length_3|)) InVars {#length=|v_#length_4|, #valid=|v_#valid_12|} OutVars{ULTIMATE.start_main_~#t2495~0.offset=|v_ULTIMATE.start_main_~#t2495~0.offset_4|, ULTIMATE.start_main_~#t2495~0.base=|v_ULTIMATE.start_main_~#t2495~0.base_4|, #length=|v_#length_3|, #valid=|v_#valid_11|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t2495~0.offset, #valid, ULTIMATE.start_main_~#t2495~0.base, #length] VAL [Thread1_P0_thidvar0=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 [510] L776-1-->L777: Formula: (= |v_#memory_int_3| (store |v_#memory_int_4| |v_ULTIMATE.start_main_~#t2495~0.base_5| (store (select |v_#memory_int_4| |v_ULTIMATE.start_main_~#t2495~0.base_5|) |v_ULTIMATE.start_main_~#t2495~0.offset_5| 1))) InVars {#memory_int=|v_#memory_int_4|, ULTIMATE.start_main_~#t2495~0.offset=|v_ULTIMATE.start_main_~#t2495~0.offset_5|, ULTIMATE.start_main_~#t2495~0.base=|v_ULTIMATE.start_main_~#t2495~0.base_5|} OutVars{#memory_int=|v_#memory_int_3|, ULTIMATE.start_main_~#t2495~0.offset=|v_ULTIMATE.start_main_~#t2495~0.offset_5|, ULTIMATE.start_main_~#t2495~0.base=|v_ULTIMATE.start_main_~#t2495~0.base_5|} AuxVars[] AssignedVars[#memory_int] VAL [Thread1_P0_thidvar0=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] FORK -1 [607] L777-->P1ENTRY: Formula: (and (= |v_Thread2_P1_#in~arg.base_3| 0) (= v_Thread2_P1_thidvar0_2 1) (= 0 |v_Thread2_P1_#in~arg.offset_3|)) InVars {} OutVars{Thread2_P1_#in~arg.base=|v_Thread2_P1_#in~arg.base_3|, Thread2_P1_thidvar0=v_Thread2_P1_thidvar0_2, Thread2_P1_#in~arg.offset=|v_Thread2_P1_#in~arg.offset_3|} AuxVars[] AssignedVars[Thread2_P1_#in~arg.base, Thread2_P1_thidvar0, Thread2_P1_#in~arg.offset] VAL [Thread1_P0_thidvar0=0, Thread2_P1_thidvar0=1, |#NULL.base|=0, |#NULL.offset|=0, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 [434] L777-1-->L778: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~nondet19=|v_ULTIMATE.start_main_#t~nondet19_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet19] VAL [Thread1_P0_thidvar0=0, Thread2_P1_thidvar0=1, |#NULL.base|=0, |#NULL.offset|=0, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 [374] L778-->L778-1: Formula: (and (= 0 |v_ULTIMATE.start_main_~#t2496~0.offset_4|) (= |v_#length_5| (store |v_#length_6| |v_ULTIMATE.start_main_~#t2496~0.base_4| 4)) (= (store |v_#valid_14| |v_ULTIMATE.start_main_~#t2496~0.base_4| 1) |v_#valid_13|) (not (= |v_ULTIMATE.start_main_~#t2496~0.base_4| 0)) (= 0 (select |v_#valid_14| |v_ULTIMATE.start_main_~#t2496~0.base_4|))) InVars {#length=|v_#length_6|, #valid=|v_#valid_14|} OutVars{ULTIMATE.start_main_~#t2496~0.offset=|v_ULTIMATE.start_main_~#t2496~0.offset_4|, #length=|v_#length_5|, ULTIMATE.start_main_~#t2496~0.base=|v_ULTIMATE.start_main_~#t2496~0.base_4|, #valid=|v_#valid_13|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t2496~0.offset, #valid, #length, ULTIMATE.start_main_~#t2496~0.base] VAL [Thread1_P0_thidvar0=0, Thread2_P1_thidvar0=1, |#NULL.base|=0, |#NULL.offset|=0, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 [537] L778-1-->L779: Formula: (= (store |v_#memory_int_6| |v_ULTIMATE.start_main_~#t2496~0.base_5| (store (select |v_#memory_int_6| |v_ULTIMATE.start_main_~#t2496~0.base_5|) |v_ULTIMATE.start_main_~#t2496~0.offset_5| 2)) |v_#memory_int_5|) InVars {ULTIMATE.start_main_~#t2496~0.offset=|v_ULTIMATE.start_main_~#t2496~0.offset_5|, #memory_int=|v_#memory_int_6|, ULTIMATE.start_main_~#t2496~0.base=|v_ULTIMATE.start_main_~#t2496~0.base_5|} OutVars{ULTIMATE.start_main_~#t2496~0.offset=|v_ULTIMATE.start_main_~#t2496~0.offset_5|, #memory_int=|v_#memory_int_5|, ULTIMATE.start_main_~#t2496~0.base=|v_ULTIMATE.start_main_~#t2496~0.base_5|} AuxVars[] AssignedVars[#memory_int] VAL [Thread1_P0_thidvar0=0, Thread2_P1_thidvar0=1, |#NULL.base|=0, |#NULL.offset|=0, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] FORK -1 [605] L779-->P2ENTRY: Formula: (and (= |v_Thread0_P2_#in~arg.offset_3| 0) (= 0 |v_Thread0_P2_#in~arg.base_3|) (= 2 v_Thread0_P2_thidvar0_2)) InVars {} OutVars{Thread0_P2_#in~arg.base=|v_Thread0_P2_#in~arg.base_3|, Thread0_P2_thidvar0=v_Thread0_P2_thidvar0_2, Thread0_P2_#in~arg.offset=|v_Thread0_P2_#in~arg.offset_3|} AuxVars[] AssignedVars[Thread0_P2_#in~arg.base, Thread0_P2_thidvar0, Thread0_P2_#in~arg.offset] VAL [Thread0_P2_thidvar0=2, Thread1_P0_thidvar0=0, Thread2_P1_thidvar0=1, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] 0 [578] P2ENTRY-->L4: Formula: (and (= v_~y$w_buff1_used~0_15 v_~y$w_buff0_used~0_24) (= v_Thread0_P2_~arg.offset_1 |v_Thread0_P2_#in~arg.offset_1|) (= v_~y$w_buff1~0_3 v_~y$w_buff0~0_4) (= v_Thread0_P2___VERIFIER_assert_~expression_1 |v_Thread0_P2___VERIFIER_assert_#in~expression_1|) (= |v_Thread0_P2___VERIFIER_assert_#in~expression_1| (ite (not (and (not (= 0 (mod v_~y$w_buff0_used~0_23 256))) (not (= (mod v_~y$w_buff1_used~0_15 256) 0)))) 1 0)) (= v_Thread0_P2_~arg.base_1 |v_Thread0_P2_#in~arg.base_1|) (= v_~y$w_buff0~0_3 2) (= v_~y$w_buff0_used~0_23 1)) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_24, Thread0_P2_#in~arg.offset=|v_Thread0_P2_#in~arg.offset_1|, Thread0_P2_#in~arg.base=|v_Thread0_P2_#in~arg.base_1|, ~y$w_buff0~0=v_~y$w_buff0~0_4} OutVars{Thread0_P2_~arg.offset=v_Thread0_P2_~arg.offset_1, Thread0_P2_~arg.base=v_Thread0_P2_~arg.base_1, Thread0_P2___VERIFIER_assert_~expression=v_Thread0_P2___VERIFIER_assert_~expression_1, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_23, ~y$w_buff1~0=v_~y$w_buff1~0_3, Thread0_P2___VERIFIER_assert_#in~expression=|v_Thread0_P2___VERIFIER_assert_#in~expression_1|, ~y$w_buff0~0=v_~y$w_buff0~0_3, Thread0_P2_#in~arg.base=|v_Thread0_P2_#in~arg.base_1|, Thread0_P2_#in~arg.offset=|v_Thread0_P2_#in~arg.offset_1|, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_15} AuxVars[] AssignedVars[Thread0_P2_~arg.offset, Thread0_P2_~arg.base, Thread0_P2___VERIFIER_assert_~expression, ~y$w_buff0_used~0, ~y$w_buff1~0, Thread0_P2___VERIFIER_assert_#in~expression, ~y$w_buff0~0, ~y$w_buff1_used~0] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread2_P1_thidvar0=1, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] 0 [580] L4-->L4-3: Formula: (not (= 0 v_Thread0_P2___VERIFIER_assert_~expression_3)) InVars {Thread0_P2___VERIFIER_assert_~expression=v_Thread0_P2___VERIFIER_assert_~expression_3} OutVars{Thread0_P2___VERIFIER_assert_~expression=v_Thread0_P2___VERIFIER_assert_~expression_3} AuxVars[] AssignedVars[] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread2_P1_thidvar0=1, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] 0 [583] L4-3-->L752: Formula: (and (= v_~y$r_buff0_thd3~0_12 1) (= v_~z~0_2 1) (= v_~y$r_buff1_thd2~0_8 v_~y$r_buff0_thd2~0_12) (= v_~y$r_buff1_thd1~0_1 v_~y$r_buff0_thd1~0_1) (= v_~y$r_buff1_thd0~0_1 v_~y$r_buff0_thd0~0_1) (= v_~y$r_buff1_thd3~0_8 v_~y$r_buff0_thd3~0_13)) InVars {~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_13, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_1, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_12, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_1} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_8, ~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_1, ~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_8, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_12, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_1, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_12, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_1, ~z~0=v_~z~0_2, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_1} AuxVars[] AssignedVars[~y$r_buff1_thd2~0, ~y$r_buff1_thd1~0, ~y$r_buff1_thd3~0, ~y$r_buff0_thd3~0, ~z~0, ~y$r_buff1_thd0~0] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread2_P1_thidvar0=1, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 1 [552] P0ENTRY-->L712: Formula: (and (= v_Thread1_P0_~arg.base_1 |v_Thread1_P0_#in~arg.base_1|) (= v_Thread1_P0_~arg.offset_1 |v_Thread1_P0_#in~arg.offset_1|) (= v_~__unbuffered_cnt~0_1 (+ v_~__unbuffered_cnt~0_2 1)) (= v_~z~0_1 2) (= v_~x~0_1 1)) InVars {Thread1_P0_#in~arg.offset=|v_Thread1_P0_#in~arg.offset_1|, Thread1_P0_#in~arg.base=|v_Thread1_P0_#in~arg.base_1|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_2} OutVars{Thread1_P0_#in~arg.base=|v_Thread1_P0_#in~arg.base_1|, Thread1_P0_~arg.offset=v_Thread1_P0_~arg.offset_1, Thread1_P0_~arg.base=v_Thread1_P0_~arg.base_1, Thread1_P0_#in~arg.offset=|v_Thread1_P0_#in~arg.offset_1|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_1, ~z~0=v_~z~0_1, ~x~0=v_~x~0_1} AuxVars[] AssignedVars[Thread1_P0_~arg.offset, Thread1_P0_~arg.base, ~__unbuffered_cnt~0, ~z~0, ~x~0] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=2] [?] 0 [584] L752-->L752-5: Formula: (and (not (= 0 (mod v_~y$r_buff0_thd3~0_1 256))) (not (= 0 (mod v_~y$w_buff0_used~0_12 256))) (= |v_Thread0_P2_#t~ite12_1| v_~y$w_buff0~0_2)) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_12, ~y$w_buff0~0=v_~y$w_buff0~0_2, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_1} OutVars{Thread0_P2_#t~ite12=|v_Thread0_P2_#t~ite12_1|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_12, ~y$w_buff0~0=v_~y$w_buff0~0_2, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_1} AuxVars[] AssignedVars[Thread0_P2_#t~ite12] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2_#t~ite12|=2, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=2] [?] 2 [556] P1ENTRY-->L723: Formula: (and (= v_Thread2_P1_~arg.offset_1 |v_Thread2_P1_#in~arg.offset_1|) (= v_Thread2_P1_~arg.base_1 |v_Thread2_P1_#in~arg.base_1|) (= v_~x~0_2 2) (= v_~y~0_1 1)) InVars {Thread2_P1_#in~arg.base=|v_Thread2_P1_#in~arg.base_1|, Thread2_P1_#in~arg.offset=|v_Thread2_P1_#in~arg.offset_1|} OutVars{Thread2_P1_#in~arg.base=|v_Thread2_P1_#in~arg.base_1|, Thread2_P1_~arg.offset=v_Thread2_P1_~arg.offset_1, Thread2_P1_~arg.base=v_Thread2_P1_~arg.base_1, ~y~0=v_~y~0_1, ~x~0=v_~x~0_2, Thread2_P1_#in~arg.offset=|v_Thread2_P1_#in~arg.offset_1|} AuxVars[] AssignedVars[Thread2_P1_~arg.offset, Thread2_P1_~arg.base, ~y~0, ~x~0] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2_#t~ite12|=2, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=2] [?] 0 [586] L752-5-->L753: Formula: (= v_~y~0_5 |v_Thread0_P2_#t~ite12_2|) InVars {Thread0_P2_#t~ite12=|v_Thread0_P2_#t~ite12_2|} OutVars{Thread0_P2_#t~ite11=|v_Thread0_P2_#t~ite11_1|, Thread0_P2_#t~ite12=|v_Thread0_P2_#t~ite12_3|, ~y~0=v_~y~0_5} AuxVars[] AssignedVars[Thread0_P2_#t~ite11, Thread0_P2_#t~ite12, ~y~0] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] 0 [589] L753-->L753-2: Formula: (and (not (= (mod v_~y$w_buff0_used~0_14 256) 0)) (not (= (mod v_~y$r_buff0_thd3~0_3 256) 0)) (= |v_Thread0_P2_#t~ite13_1| 0)) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_14, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_3} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_14, Thread0_P2_#t~ite13=|v_Thread0_P2_#t~ite13_1|, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_3} AuxVars[] AssignedVars[Thread0_P2_#t~ite13] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2_#t~ite13|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] 0 [592] L753-2-->L754: Formula: (= v_~y$w_buff0_used~0_16 |v_Thread0_P2_#t~ite13_3|) InVars {Thread0_P2_#t~ite13=|v_Thread0_P2_#t~ite13_3|} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_16, Thread0_P2_#t~ite13=|v_Thread0_P2_#t~ite13_4|} AuxVars[] AssignedVars[~y$w_buff0_used~0, Thread0_P2_#t~ite13] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] 0 [594] L754-->L754-2: Formula: (and (or (= (mod v_~y$r_buff0_thd3~0_6 256) 0) (= (mod v_~y$w_buff0_used~0_18 256) 0)) (= |v_Thread0_P2_#t~ite14_2| v_~y$w_buff1_used~0_11) (or (= (mod v_~y$r_buff1_thd3~0_4 256) 0) (= 0 (mod v_~y$w_buff1_used~0_11 256)))) InVars {~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_4, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_18, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_6, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_11} OutVars{~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_4, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_18, Thread0_P2_#t~ite14=|v_Thread0_P2_#t~ite14_2|, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_6, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_11} AuxVars[] AssignedVars[Thread0_P2_#t~ite14] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2_#t~ite14|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] 0 [595] L754-2-->L755: Formula: (= v_~y$w_buff1_used~0_12 |v_Thread0_P2_#t~ite14_3|) InVars {Thread0_P2_#t~ite14=|v_Thread0_P2_#t~ite14_3|} OutVars{Thread0_P2_#t~ite14=|v_Thread0_P2_#t~ite14_4|, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_12} AuxVars[] AssignedVars[Thread0_P2_#t~ite14, ~y$w_buff1_used~0] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] 0 [597] L755-->L755-2: Formula: (and (or (= (mod v_~y$w_buff0_used~0_20 256) 0) (= (mod v_~y$r_buff0_thd3~0_8 256) 0)) (= |v_Thread0_P2_#t~ite15_2| v_~y$r_buff0_thd3~0_8)) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_20, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_8} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_20, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_8, Thread0_P2_#t~ite15=|v_Thread0_P2_#t~ite15_2|} AuxVars[] AssignedVars[Thread0_P2_#t~ite15] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2_#t~ite15|=1, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] 0 [598] L755-2-->L756: Formula: (= v_~y$r_buff0_thd3~0_9 |v_Thread0_P2_#t~ite15_3|) InVars {Thread0_P2_#t~ite15=|v_Thread0_P2_#t~ite15_3|} OutVars{~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_9, Thread0_P2_#t~ite15=|v_Thread0_P2_#t~ite15_4|} AuxVars[] AssignedVars[~y$r_buff0_thd3~0, Thread0_P2_#t~ite15] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] 0 [600] L756-->L756-2: Formula: (and (or (= 0 (mod v_~y$r_buff1_thd3~0_6 256)) (= 0 (mod v_~y$w_buff1_used~0_14 256))) (or (= (mod v_~y$r_buff0_thd3~0_11 256) 0) (= 0 (mod v_~y$w_buff0_used~0_22 256))) (= |v_Thread0_P2_#t~ite16_2| v_~y$r_buff1_thd3~0_6)) InVars {~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_6, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_22, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_11, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_14} OutVars{~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_6, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_22, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_11, Thread0_P2_#t~ite16=|v_Thread0_P2_#t~ite16_2|, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_14} AuxVars[] AssignedVars[Thread0_P2_#t~ite16] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2_#t~ite16|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] 0 [601] L756-2-->L761: Formula: (and (= v_~__unbuffered_cnt~0_5 (+ v_~__unbuffered_cnt~0_6 1)) (= v_~y$r_buff1_thd3~0_7 |v_Thread0_P2_#t~ite16_3|)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_6, Thread0_P2_#t~ite16=|v_Thread0_P2_#t~ite16_3|} OutVars{~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_5, ~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_7, Thread0_P2_#t~ite16=|v_Thread0_P2_#t~ite16_4|} AuxVars[] AssignedVars[~y$r_buff1_thd3~0, ~__unbuffered_cnt~0, Thread0_P2_#t~ite16] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=2, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] 2 [558] L723-->L723-2: Formula: (or (= (mod v_~y$w_buff0_used~0_4 256) 0) (= 0 (mod v_~y$r_buff0_thd2~0_5 256))) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_4, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_5} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_4, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_5} AuxVars[] AssignedVars[] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=2, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] 2 [561] L723-2-->L723-4: Formula: (and (= |v_Thread2_P1_#t~ite4_3| v_~y~0_2) (or (= (mod v_~y$r_buff1_thd2~0_4 256) 0) (= (mod v_~y$w_buff1_used~0_5 256) 0))) InVars {~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_4, ~y~0=v_~y~0_2, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_5} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_4, ~y~0=v_~y~0_2, Thread2_P1_#t~ite4=|v_Thread2_P1_#t~ite4_3|, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_5} AuxVars[] AssignedVars[Thread2_P1_#t~ite4] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |Thread2_P1_#t~ite4|=2, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=2, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] 2 [564] L723-4-->L723-5: Formula: (= |v_Thread2_P1_#t~ite5_4| |v_Thread2_P1_#t~ite4_4|) InVars {Thread2_P1_#t~ite4=|v_Thread2_P1_#t~ite4_4|} OutVars{Thread2_P1_#t~ite4=|v_Thread2_P1_#t~ite4_4|, Thread2_P1_#t~ite5=|v_Thread2_P1_#t~ite5_4|} AuxVars[] AssignedVars[Thread2_P1_#t~ite5] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |Thread2_P1_#t~ite4|=2, |Thread2_P1_#t~ite5|=2, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=2, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] 2 [559] L723-5-->L724: Formula: (= v_~y~0_3 |v_Thread2_P1_#t~ite5_2|) InVars {Thread2_P1_#t~ite5=|v_Thread2_P1_#t~ite5_2|} OutVars{~y~0=v_~y~0_3, Thread2_P1_#t~ite4=|v_Thread2_P1_#t~ite4_1|, Thread2_P1_#t~ite5=|v_Thread2_P1_#t~ite5_3|} AuxVars[] AssignedVars[~y~0, Thread2_P1_#t~ite4, Thread2_P1_#t~ite5] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=2, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] 2 [563] L724-->L724-2: Formula: (and (or (= (mod v_~y$r_buff0_thd2~0_9 256) 0) (= (mod v_~y$w_buff0_used~0_8 256) 0)) (= |v_Thread2_P1_#t~ite6_2| v_~y$w_buff0_used~0_8)) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_8, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_9} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_8, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_9, Thread2_P1_#t~ite6=|v_Thread2_P1_#t~ite6_2|} AuxVars[] AssignedVars[Thread2_P1_#t~ite6] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |Thread2_P1_#t~ite6|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=2, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] 2 [565] L724-2-->L725: Formula: (= v_~y$w_buff0_used~0_9 |v_Thread2_P1_#t~ite6_3|) InVars {Thread2_P1_#t~ite6=|v_Thread2_P1_#t~ite6_3|} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_9, Thread2_P1_#t~ite6=|v_Thread2_P1_#t~ite6_4|} AuxVars[] AssignedVars[~y$w_buff0_used~0, Thread2_P1_#t~ite6] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=2, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] 2 [567] L725-->L725-2: Formula: (and (or (= 0 (mod v_~y$r_buff0_thd2~0_11 256)) (= 0 (mod v_~y$w_buff0_used~0_11 256))) (or (= 0 (mod v_~y$w_buff1_used~0_7 256)) (= (mod v_~y$r_buff1_thd2~0_7 256) 0)) (= |v_Thread2_P1_#t~ite7_2| v_~y$w_buff1_used~0_7)) InVars {~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_7, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_11, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_11, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_7} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_7, Thread2_P1_#t~ite7=|v_Thread2_P1_#t~ite7_2|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_11, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_11, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_7} AuxVars[] AssignedVars[Thread2_P1_#t~ite7] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |Thread2_P1_#t~ite7|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=2, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] 2 [568] L725-2-->L726: Formula: (= v_~y$w_buff1_used~0_1 |v_Thread2_P1_#t~ite7_3|) InVars {Thread2_P1_#t~ite7=|v_Thread2_P1_#t~ite7_3|} OutVars{Thread2_P1_#t~ite7=|v_Thread2_P1_#t~ite7_4|, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_1} AuxVars[] AssignedVars[Thread2_P1_#t~ite7, ~y$w_buff1_used~0] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=2, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] 2 [570] L726-->L726-2: Formula: (and (= |v_Thread2_P1_#t~ite8_2| v_~y$r_buff0_thd2~0_2) (or (= (mod v_~y$r_buff0_thd2~0_2 256) 0) (= (mod v_~y$w_buff0_used~0_2 256) 0))) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_2, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_2} OutVars{Thread2_P1_#t~ite8=|v_Thread2_P1_#t~ite8_2|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_2, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_2} AuxVars[] AssignedVars[Thread2_P1_#t~ite8] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |Thread2_P1_#t~ite8|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=2, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] 2 [571] L726-2-->L727: Formula: (= v_~y$r_buff0_thd2~0_4 |v_Thread2_P1_#t~ite8_3|) InVars {Thread2_P1_#t~ite8=|v_Thread2_P1_#t~ite8_3|} OutVars{Thread2_P1_#t~ite8=|v_Thread2_P1_#t~ite8_4|, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_4} AuxVars[] AssignedVars[~y$r_buff0_thd2~0, Thread2_P1_#t~ite8] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=2, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] 2 [573] L727-->L727-2: Formula: (and (= |v_Thread2_P1_#t~ite9_2| v_~y$r_buff1_thd2~0_3) (or (= 0 (mod v_~y$r_buff0_thd2~0_7 256)) (= (mod v_~y$w_buff0_used~0_6 256) 0)) (or (= 0 (mod v_~y$w_buff1_used~0_4 256)) (= (mod v_~y$r_buff1_thd2~0_3 256) 0))) InVars {~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_3, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_6, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_7, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_4} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_3, Thread2_P1_#t~ite9=|v_Thread2_P1_#t~ite9_2|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_6, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_7, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_4} AuxVars[] AssignedVars[Thread2_P1_#t~ite9] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |Thread2_P1_#t~ite9|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=2, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] 2 [574] L727-2-->L732: Formula: (and (= v_~y$r_buff1_thd2~0_5 |v_Thread2_P1_#t~ite9_3|) (= v_~__unbuffered_cnt~0_3 (+ v_~__unbuffered_cnt~0_4 1))) InVars {Thread2_P1_#t~ite9=|v_Thread2_P1_#t~ite9_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_4} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_5, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_3, Thread2_P1_#t~ite9=|v_Thread2_P1_#t~ite9_4|} AuxVars[] AssignedVars[~y$r_buff1_thd2~0, ~__unbuffered_cnt~0, Thread2_P1_#t~ite9] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 [500] L779-1-->L783: Formula: (= v_~main$tmp_guard0~0_2 (ite (= 0 (ite (= v_~__unbuffered_cnt~0_8 3) 1 0)) 0 1)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_8} OutVars{~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_8, ULTIMATE.start_main_#t~nondet20=|v_ULTIMATE.start_main_#t~nondet20_2|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_2} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet20, ~main$tmp_guard0~0] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 [413] L783-->L785: Formula: (not (= 0 (mod v_~main$tmp_guard0~0_3 256))) InVars {~main$tmp_guard0~0=v_~main$tmp_guard0~0_3} OutVars{~main$tmp_guard0~0=v_~main$tmp_guard0~0_3} AuxVars[] AssignedVars[] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 [463] L785-->L785-2: Formula: (or (= 0 (mod v_~y$w_buff0_used~0_43 256)) (= 0 (mod v_~y$r_buff0_thd0~0_21 256))) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_43, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_21} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_43, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_21} AuxVars[] AssignedVars[] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 [470] L785-2-->L785-4: Formula: (and (or (= 0 (mod v_~y$r_buff1_thd0~0_13 256)) (= 0 (mod v_~y$w_buff1_used~0_27 256))) (= |v_ULTIMATE.start_main_#t~ite21_3| v_~y~0_10)) InVars {~y~0=v_~y~0_10, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_13, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_27} OutVars{~y~0=v_~y~0_10, ULTIMATE.start_main_#t~ite21=|v_ULTIMATE.start_main_#t~ite21_3|, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_13, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_27} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite21] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite21|=2, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 [450] L785-4-->L785-5: Formula: (= |v_ULTIMATE.start_main_#t~ite22_3| |v_ULTIMATE.start_main_#t~ite21_4|) InVars {ULTIMATE.start_main_#t~ite21=|v_ULTIMATE.start_main_#t~ite21_4|} OutVars{ULTIMATE.start_main_#t~ite21=|v_ULTIMATE.start_main_#t~ite21_4|, ULTIMATE.start_main_#t~ite22=|v_ULTIMATE.start_main_#t~ite22_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite22] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite21|=2, |ULTIMATE.start_main_#t~ite22|=2, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 [454] L785-5-->L786: Formula: (= v_~y~0_11 |v_ULTIMATE.start_main_#t~ite22_5|) InVars {ULTIMATE.start_main_#t~ite22=|v_ULTIMATE.start_main_#t~ite22_5|} OutVars{~y~0=v_~y~0_11, ULTIMATE.start_main_#t~ite21=|v_ULTIMATE.start_main_#t~ite21_5|, ULTIMATE.start_main_#t~ite22=|v_ULTIMATE.start_main_#t~ite22_4|} AuxVars[] AssignedVars[~y~0, ULTIMATE.start_main_#t~ite21, ULTIMATE.start_main_#t~ite22] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 [380] L786-->L786-2: Formula: (and (or (= 0 (mod v_~y$w_buff0_used~0_45 256)) (= 0 (mod v_~y$r_buff0_thd0~0_23 256))) (= |v_ULTIMATE.start_main_#t~ite23_3| v_~y$w_buff0_used~0_45)) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_45, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_23} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_45, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_23, ULTIMATE.start_main_#t~ite23=|v_ULTIMATE.start_main_#t~ite23_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite23] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite23|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 [385] L786-2-->L787: Formula: (= v_~y$w_buff0_used~0_46 |v_ULTIMATE.start_main_#t~ite23_5|) InVars {ULTIMATE.start_main_#t~ite23=|v_ULTIMATE.start_main_#t~ite23_5|} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_46, ULTIMATE.start_main_#t~ite23=|v_ULTIMATE.start_main_#t~ite23_4|} AuxVars[] AssignedVars[~y$w_buff0_used~0, ULTIMATE.start_main_#t~ite23] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 [508] L787-->L787-2: Formula: (and (or (= 0 (mod v_~y$w_buff1_used~0_29 256)) (= 0 (mod v_~y$r_buff1_thd0~0_15 256))) (or (= (mod v_~y$r_buff0_thd0~0_25 256) 0) (= (mod v_~y$w_buff0_used~0_48 256) 0)) (= |v_ULTIMATE.start_main_#t~ite24_3| v_~y$w_buff1_used~0_29)) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_48, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_15, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_25, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_29} OutVars{ULTIMATE.start_main_#t~ite24=|v_ULTIMATE.start_main_#t~ite24_3|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_48, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_15, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_25, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_29} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite24] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite24|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 [513] L787-2-->L788: Formula: (= v_~y$w_buff1_used~0_30 |v_ULTIMATE.start_main_#t~ite24_5|) InVars {ULTIMATE.start_main_#t~ite24=|v_ULTIMATE.start_main_#t~ite24_5|} OutVars{ULTIMATE.start_main_#t~ite24=|v_ULTIMATE.start_main_#t~ite24_4|, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_30} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite24, ~y$w_buff1_used~0] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 [430] L788-->L788-2: Formula: (and (= |v_ULTIMATE.start_main_#t~ite25_3| v_~y$r_buff0_thd0~0_27) (or (= 0 (mod v_~y$r_buff0_thd0~0_27 256)) (= 0 (mod v_~y$w_buff0_used~0_50 256)))) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_50, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_27} OutVars{ULTIMATE.start_main_#t~ite25=|v_ULTIMATE.start_main_#t~ite25_3|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_50, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_27} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite25] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite25|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 [438] L788-2-->L789: Formula: (= v_~y$r_buff0_thd0~0_28 |v_ULTIMATE.start_main_#t~ite25_5|) InVars {ULTIMATE.start_main_#t~ite25=|v_ULTIMATE.start_main_#t~ite25_5|} OutVars{ULTIMATE.start_main_#t~ite25=|v_ULTIMATE.start_main_#t~ite25_4|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_28} AuxVars[] AssignedVars[~y$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite25] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 [371] L789-->L789-2: Formula: (and (or (= (mod v_~y$r_buff0_thd0~0_30 256) 0) (= (mod v_~y$w_buff0_used~0_52 256) 0)) (= |v_ULTIMATE.start_main_#t~ite26_3| v_~y$r_buff1_thd0~0_17) (or (= 0 (mod v_~y$w_buff1_used~0_32 256)) (= 0 (mod v_~y$r_buff1_thd0~0_17 256)))) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_52, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_17, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_30, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_32} OutVars{ULTIMATE.start_main_#t~ite26=|v_ULTIMATE.start_main_#t~ite26_3|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_52, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_17, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_30, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_32} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite26] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite26|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 [540] L789-2-->L796: Formula: (and (= v_~y$flush_delayed~0_5 v_~weak$$choice2~0_8) (= v_~weak$$choice2~0_8 (ite (= 0 (+ |v_ULTIMATE.start_main_#t~nondet28.base_3| |v_ULTIMATE.start_main_#t~nondet28.offset_3|)) 0 1)) (= v_~y$r_buff1_thd0~0_18 |v_ULTIMATE.start_main_#t~ite26_5|) (= v_~weak$$choice0~0_2 (ite (= 0 (+ |v_ULTIMATE.start_main_#t~nondet27.offset_3| |v_ULTIMATE.start_main_#t~nondet27.base_3|)) 0 1)) (= v_~y$mem_tmp~0_3 v_~y~0_12)) InVars {ULTIMATE.start_main_#t~nondet27.offset=|v_ULTIMATE.start_main_#t~nondet27.offset_3|, ULTIMATE.start_main_#t~nondet28.base=|v_ULTIMATE.start_main_#t~nondet28.base_3|, ULTIMATE.start_main_#t~nondet27.base=|v_ULTIMATE.start_main_#t~nondet27.base_3|, ULTIMATE.start_main_#t~nondet28.offset=|v_ULTIMATE.start_main_#t~nondet28.offset_3|, ULTIMATE.start_main_#t~ite26=|v_ULTIMATE.start_main_#t~ite26_5|, ~y~0=v_~y~0_12} OutVars{ULTIMATE.start_main_#t~nondet27.offset=|v_ULTIMATE.start_main_#t~nondet27.offset_2|, ~weak$$choice0~0=v_~weak$$choice0~0_2, ~y$mem_tmp~0=v_~y$mem_tmp~0_3, ULTIMATE.start_main_#t~nondet28.base=|v_ULTIMATE.start_main_#t~nondet28.base_2|, ULTIMATE.start_main_#t~nondet27.base=|v_ULTIMATE.start_main_#t~nondet27.base_2|, ULTIMATE.start_main_#t~nondet28.offset=|v_ULTIMATE.start_main_#t~nondet28.offset_2|, ~y$flush_delayed~0=v_~y$flush_delayed~0_5, ULTIMATE.start_main_#t~ite26=|v_ULTIMATE.start_main_#t~ite26_4|, ~y~0=v_~y~0_12, ~weak$$choice2~0=v_~weak$$choice2~0_8, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_18} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet27.offset, ~weak$$choice0~0, ~y$mem_tmp~0, ULTIMATE.start_main_#t~nondet28.base, ULTIMATE.start_main_#t~nondet27.base, ULTIMATE.start_main_#t~nondet28.offset, ~y$flush_delayed~0, ULTIMATE.start_main_#t~ite26, ~weak$$choice2~0, ~y$r_buff1_thd0~0] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 [460] L796-->L796-5: Formula: (and (let ((.cse0 (= 0 (mod v_~y$r_buff0_thd0~0_31 256)))) (or (= 0 (mod v_~y$w_buff0_used~0_53 256)) (and (= (mod v_~y$r_buff1_thd0~0_19 256) 0) .cse0) (and .cse0 (= (mod v_~y$w_buff1_used~0_33 256) 0)))) (= |v_ULTIMATE.start_main_#t~ite30_2| v_~y~0_13)) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_53, ~y~0=v_~y~0_13, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_19, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_31, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_33} OutVars{ULTIMATE.start_main_#t~ite30=|v_ULTIMATE.start_main_#t~ite30_2|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_53, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_31, ~y~0=v_~y~0_13, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_19, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_33} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite30] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite30|=2, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 [453] L796-5-->L797: Formula: (= v_~y~0_14 |v_ULTIMATE.start_main_#t~ite30_5|) InVars {ULTIMATE.start_main_#t~ite30=|v_ULTIMATE.start_main_#t~ite30_5|} OutVars{ULTIMATE.start_main_#t~ite30=|v_ULTIMATE.start_main_#t~ite30_4|, ~y~0=v_~y~0_14, ULTIMATE.start_main_#t~ite29=|v_ULTIMATE.start_main_#t~ite29_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite30, ULTIMATE.start_main_#t~ite29, ~y~0] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 [377] L797-->L797-8: Formula: (and (= |v_ULTIMATE.start_main_#t~ite33_2| v_~y$w_buff0~0_8) (not (= (mod v_~weak$$choice2~0_9 256) 0))) InVars {~weak$$choice2~0=v_~weak$$choice2~0_9, ~y$w_buff0~0=v_~y$w_buff0~0_8} OutVars{~weak$$choice2~0=v_~weak$$choice2~0_9, ~y$w_buff0~0=v_~y$w_buff0~0_8, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite33] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite33|=2, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 [372] L797-8-->L798: Formula: (= v_~y$w_buff0~0_12 |v_ULTIMATE.start_main_#t~ite33_5|) InVars {ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_5|} OutVars{ULTIMATE.start_main_#t~ite31=|v_ULTIMATE.start_main_#t~ite31_5|, ULTIMATE.start_main_#t~ite32=|v_ULTIMATE.start_main_#t~ite32_5|, ~y$w_buff0~0=v_~y$w_buff0~0_12, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_4|} AuxVars[] AssignedVars[~y$w_buff0~0, ULTIMATE.start_main_#t~ite31, ULTIMATE.start_main_#t~ite32, ULTIMATE.start_main_#t~ite33] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 [503] L798-->L798-8: Formula: (and (not (= (mod v_~weak$$choice2~0_11 256) 0)) (= |v_ULTIMATE.start_main_#t~ite36_2| v_~y$w_buff1~0_7)) InVars {~y$w_buff1~0=v_~y$w_buff1~0_7, ~weak$$choice2~0=v_~weak$$choice2~0_11} OutVars{ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_2|, ~y$w_buff1~0=v_~y$w_buff1~0_7, ~weak$$choice2~0=v_~weak$$choice2~0_11} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite36] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite36|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 [496] L798-8-->L799: Formula: (= v_~y$w_buff1~0_11 |v_ULTIMATE.start_main_#t~ite36_5|) InVars {ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_5|} OutVars{ULTIMATE.start_main_#t~ite35=|v_ULTIMATE.start_main_#t~ite35_5|, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_4|, ~y$w_buff1~0=v_~y$w_buff1~0_11, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_5|} AuxVars[] AssignedVars[~y$w_buff1~0, ULTIMATE.start_main_#t~ite35, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite34] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 [457] L799-->L799-8: Formula: (and (not (= (mod v_~weak$$choice2~0_13 256) 0)) (= |v_ULTIMATE.start_main_#t~ite39_5| v_~y$w_buff0_used~0_65)) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_65, ~weak$$choice2~0=v_~weak$$choice2~0_13} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_65, ~weak$$choice2~0=v_~weak$$choice2~0_13, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite39] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite39|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 [420] L799-8-->L800: Formula: (= v_~y$w_buff0_used~0_28 |v_ULTIMATE.start_main_#t~ite39_3|) InVars {ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_3|} OutVars{ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_3|, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_4|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_28, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_2|} AuxVars[] AssignedVars[~y$w_buff0_used~0, ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~ite38, ULTIMATE.start_main_#t~ite37] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 [368] L800-->L800-8: Formula: (and (= |v_ULTIMATE.start_main_#t~ite42_1| v_~y$w_buff1_used~0_17) (not (= (mod v_~weak$$choice2~0_1 256) 0))) InVars {~weak$$choice2~0=v_~weak$$choice2~0_1, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_17} OutVars{~weak$$choice2~0=v_~weak$$choice2~0_1, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_1|, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_17} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite42] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite42|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 [530] L800-8-->L801: Formula: (= v_~y$w_buff1_used~0_20 |v_ULTIMATE.start_main_#t~ite42_4|) InVars {ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_4|} OutVars{ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_4|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_4|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_3|, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_20} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#t~ite40, ULTIMATE.start_main_#t~ite42, ~y$w_buff1_used~0] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 [494] L801-->L801-8: Formula: (and (= |v_ULTIMATE.start_main_#t~ite45_1| v_~y$r_buff0_thd0~0_9) (not (= 0 (mod v_~weak$$choice2~0_3 256)))) InVars {~weak$$choice2~0=v_~weak$$choice2~0_3, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_9} OutVars{~weak$$choice2~0=v_~weak$$choice2~0_3, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_9, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite45] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite45|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 [473] L801-8-->L802: Formula: (= v_~y$r_buff0_thd0~0_14 |v_ULTIMATE.start_main_#t~ite45_4|) InVars {ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_4|} OutVars{ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_4|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_14, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_3|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_4|} AuxVars[] AssignedVars[~y$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite45, ULTIMATE.start_main_#t~ite44] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 [418] L802-->L802-8: Formula: (and (not (= 0 (mod v_~weak$$choice2~0_5 256))) (= |v_ULTIMATE.start_main_#t~ite48_1| v_~y$r_buff1_thd0~0_7)) InVars {~weak$$choice2~0=v_~weak$$choice2~0_5, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_7} OutVars{ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_1|, ~weak$$choice2~0=v_~weak$$choice2~0_5, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_7} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite48] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite48|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 [412] L802-8-->L804: Formula: (and (= v_~main$tmp_guard1~0_1 (ite (= 0 (ite (not (and (= 2 v_~x~0_3) (= 2 v_~z~0_3) (= 2 v_~y~0_6))) 1 0)) 0 1)) (= v_~y$r_buff1_thd0~0_10 |v_ULTIMATE.start_main_#t~ite48_4|)) InVars {~z~0=v_~z~0_3, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_4|, ~y~0=v_~y~0_6, ~x~0=v_~x~0_3} OutVars{ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_4|, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_4|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_1, ~z~0=v_~z~0_3, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_3|, ~y~0=v_~y~0_6, ~x~0=v_~x~0_3, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_10} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite46, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite48, ~y$r_buff1_thd0~0] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 [471] L804-->L804-2: Formula: (and (= |v_ULTIMATE.start_main_#t~ite49_1| v_~y$mem_tmp~0_1) (not (= (mod v_~y$flush_delayed~0_1 256) 0))) InVars {~y$flush_delayed~0=v_~y$flush_delayed~0_1, ~y$mem_tmp~0=v_~y$mem_tmp~0_1} OutVars{~y$flush_delayed~0=v_~y$flush_delayed~0_1, ~y$mem_tmp~0=v_~y$mem_tmp~0_1, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite49] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite49|=2, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 [474] L804-2-->L807: Formula: (and (= v_~y~0_8 |v_ULTIMATE.start_main_#t~ite49_4|) (= v_~y$flush_delayed~0_3 0)) InVars {ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_4|} OutVars{~y$flush_delayed~0=v_~y$flush_delayed~0_3, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_3|, ~y~0=v_~y~0_8} AuxVars[] AssignedVars[~y$flush_delayed~0, ULTIMATE.start_main_#t~ite49, ~y~0] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 [459] L807-->L807-1: Formula: (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_1| (mod v_~main$tmp_guard1~0_2 256)) InVars {~main$tmp_guard1~0=v_~main$tmp_guard1~0_2} OutVars{~main$tmp_guard1~0=v_~main$tmp_guard1~0_2, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_1|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_#in~expression] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 [465] L807-1-->L4: Formula: true InVars {} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_1} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 [414] L4-->L4-1: Formula: (= v_ULTIMATE.start___VERIFIER_assert_~expression_2 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_2|) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_2|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_2, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_2|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 [410] L4-1-->L4-2: Formula: (= v_ULTIMATE.start___VERIFIER_assert_~expression_3 0) InVars {ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_3} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_3} AuxVars[] AssignedVars[] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 [405] L4-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 #NULL.base, #NULL.offset := 0, 0; VAL [|#NULL.base|=0, |#NULL.offset|=0] [?] -1 #valid := #valid[0 := 0]; VAL [|#NULL.base|=0, |#NULL.offset|=0] [?] -1 ~__unbuffered_cnt~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0] [?] -1 ~main$tmp_guard0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0] [?] -1 ~main$tmp_guard1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [?] -1 ~x~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [?] -1 ~y~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0] [?] -1 ~y$flush_delayed~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y~0=0] [?] -1 ~y$mem_tmp~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y~0=0] [?] -1 ~y$r_buff0_thd0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y~0=0] [?] -1 ~y$r_buff0_thd1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y~0=0] [?] -1 ~y$r_buff0_thd2~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y~0=0] [?] -1 ~y$r_buff0_thd3~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y~0=0] [?] -1 ~y$r_buff1_thd0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y~0=0] [?] -1 ~y$r_buff1_thd1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y~0=0] [?] -1 ~y$r_buff1_thd2~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y~0=0] [?] -1 ~y$r_buff1_thd3~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y~0=0] [?] -1 ~y$read_delayed~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed~0=0, ~y~0=0] [?] -1 ~y$read_delayed_var~0.base, ~y$read_delayed_var~0.offset := 0, 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y~0=0] [?] -1 ~y$w_buff0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0~0=0, ~y~0=0] [?] -1 ~y$w_buff0_used~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y~0=0] [?] -1 ~y$w_buff1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 ~y$w_buff1_used~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 ~z~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 ~weak$$choice0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 ~weak$$choice2~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 havoc main_#res; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 havoc main_#t~nondet18, main_#t~nondet19, main_#t~nondet20, main_#t~ite22, main_#t~ite21, main_#t~ite23, main_#t~ite24, main_#t~ite25, main_#t~ite26, main_#t~nondet27.base, main_#t~nondet27.offset, main_#t~nondet28.base, main_#t~nondet28.offset, main_#t~ite30, main_#t~ite29, main_#t~ite33, main_#t~ite32, main_#t~ite31, main_#t~ite36, main_#t~ite35, main_#t~ite34, main_#t~ite39, main_#t~ite38, main_#t~ite37, main_#t~ite42, main_#t~ite41, main_#t~ite40, main_#t~ite45, main_#t~ite44, main_#t~ite43, main_#t~ite48, main_#t~ite47, main_#t~ite46, main_#t~ite49, main_~#t2494~0.base, main_~#t2494~0.offset, main_~#t2495~0.base, main_~#t2495~0.offset, main_~#t2496~0.base, main_~#t2496~0.offset; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 SUMMARY for call main_~#t2494~0.base, main_~#t2494~0.offset := #Ultimate.alloc(4); srcloc: L774 VAL [|#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 SUMMARY for call write~int(0, main_~#t2494~0.base, main_~#t2494~0.offset, 4); srcloc: L774-1 VAL [|#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] FORK -1 fork 0 P0(0, 0); VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 havoc main_#t~nondet18; VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 SUMMARY for call main_~#t2495~0.base, main_~#t2495~0.offset := #Ultimate.alloc(4); srcloc: L776 VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 SUMMARY for call write~int(1, main_~#t2495~0.base, main_~#t2495~0.offset, 4); srcloc: L776-1 VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] FORK -1 fork 1 P1(0, 0); VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 havoc main_#t~nondet19; VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 SUMMARY for call main_~#t2496~0.base, main_~#t2496~0.offset := #Ultimate.alloc(4); srcloc: L778 VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 SUMMARY for call write~int(2, main_~#t2496~0.base, main_~#t2496~0.offset, 4); srcloc: L778-1 VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] FORK -1 fork 2 P2(0, 0); VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] 0 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset;~y$w_buff1~0 := ~y$w_buff0~0;~y$w_buff0~0 := 2;~y$w_buff1_used~0 := ~y$w_buff0_used~0;~y$w_buff0_used~0 := 1;__VERIFIER_assert_#in~expression := (if !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$w_buff0_used~0 % 256) then 1 else 0);havoc __VERIFIER_assert_~expression;__VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] 0 assume !(0 == __VERIFIER_assert_~expression); VAL [P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] 0 ~y$r_buff1_thd0~0 := ~y$r_buff0_thd0~0;~y$r_buff1_thd1~0 := ~y$r_buff0_thd1~0;~y$r_buff1_thd2~0 := ~y$r_buff0_thd2~0;~y$r_buff1_thd3~0 := ~y$r_buff0_thd3~0;~y$r_buff0_thd3~0 := 1;~z~0 := 1; VAL [P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 1 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset;~z~0 := 2;~x~0 := 1;~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=2] [?] 0 assume 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256;#t~ite12 := ~y$w_buff0~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite12|=2, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=2] [?] 2 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset;~x~0 := 2;~y~0 := 1; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite12|=2, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=2] [?] 0 ~y~0 := #t~ite12;havoc #t~ite11;havoc #t~ite12; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] 0 assume 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256;#t~ite13 := 0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite13|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] 0 ~y$w_buff0_used~0 := #t~ite13;havoc #t~ite13; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] 0 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd3~0 % 256));#t~ite14 := ~y$w_buff1_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite14|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] 0 ~y$w_buff1_used~0 := #t~ite14;havoc #t~ite14; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] 0 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256);#t~ite15 := ~y$r_buff0_thd3~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite15|=1, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] 0 ~y$r_buff0_thd3~0 := #t~ite15;havoc #t~ite15; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] 0 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd3~0 % 256));#t~ite16 := ~y$r_buff1_thd3~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite16|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] 0 ~y$r_buff1_thd3~0 := #t~ite16;havoc #t~ite16;~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=2, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] 2 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256); VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=2, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] 2 assume !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256);#t~ite4 := ~y~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite4|=2, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=2, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] 2 #t~ite5 := #t~ite4; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite4|=2, |P1_#t~ite5|=2, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=2, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] 2 ~y~0 := #t~ite5;havoc #t~ite5;havoc #t~ite4; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=2, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] 2 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256);#t~ite6 := ~y$w_buff0_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite6|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=2, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] 2 ~y$w_buff0_used~0 := #t~ite6;havoc #t~ite6; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=2, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] 2 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256));#t~ite7 := ~y$w_buff1_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite7|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=2, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] 2 ~y$w_buff1_used~0 := #t~ite7;havoc #t~ite7; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=2, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] 2 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256);#t~ite8 := ~y$r_buff0_thd2~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite8|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=2, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] 2 ~y$r_buff0_thd2~0 := #t~ite8;havoc #t~ite8; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=2, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] 2 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256));#t~ite9 := ~y$r_buff1_thd2~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite9|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=2, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] 2 ~y$r_buff1_thd2~0 := #t~ite9;havoc #t~ite9;~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 havoc main_#t~nondet20;~main$tmp_guard0~0 := (if 0 == (if 3 == ~__unbuffered_cnt~0 then 1 else 0) then 0 else 1); VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 assume 0 != ~main$tmp_guard0~0 % 256; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256); VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 assume !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256);main_#t~ite21 := ~y~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite21|=2, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 main_#t~ite22 := main_#t~ite21; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite21|=2, |ULTIMATE.start_main_#t~ite22|=2, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 ~y~0 := main_#t~ite22;havoc main_#t~ite21;havoc main_#t~ite22; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256);main_#t~ite23 := ~y$w_buff0_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite23|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 ~y$w_buff0_used~0 := main_#t~ite23;havoc main_#t~ite23; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256));main_#t~ite24 := ~y$w_buff1_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite24|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 ~y$w_buff1_used~0 := main_#t~ite24;havoc main_#t~ite24; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256);main_#t~ite25 := ~y$r_buff0_thd0~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite25|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 ~y$r_buff0_thd0~0 := main_#t~ite25;havoc main_#t~ite25; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256));main_#t~ite26 := ~y$r_buff1_thd0~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite26|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 ~y$r_buff1_thd0~0 := main_#t~ite26;havoc main_#t~ite26;~weak$$choice0~0 := (if 0 == main_#t~nondet27.base + main_#t~nondet27.offset then 0 else 1);havoc main_#t~nondet27.base, main_#t~nondet27.offset;~weak$$choice2~0 := (if 0 == main_#t~nondet28.base + main_#t~nondet28.offset then 0 else 1);havoc main_#t~nondet28.base, main_#t~nondet28.offset;~y$flush_delayed~0 := ~weak$$choice2~0;~y$mem_tmp~0 := ~y~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 assume (0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd0~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd0~0 % 256 && 0 == ~y$r_buff1_thd0~0 % 256);main_#t~ite30 := ~y~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite30|=2, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 ~y~0 := main_#t~ite30;havoc main_#t~ite29;havoc main_#t~ite30; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 assume 0 != ~weak$$choice2~0 % 256;main_#t~ite33 := ~y$w_buff0~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite33|=2, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 ~y$w_buff0~0 := main_#t~ite33;havoc main_#t~ite33;havoc main_#t~ite32;havoc main_#t~ite31; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 assume 0 != ~weak$$choice2~0 % 256;main_#t~ite36 := ~y$w_buff1~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite36|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 ~y$w_buff1~0 := main_#t~ite36;havoc main_#t~ite36;havoc main_#t~ite34;havoc main_#t~ite35; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 assume 0 != ~weak$$choice2~0 % 256;main_#t~ite39 := ~y$w_buff0_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite39|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 ~y$w_buff0_used~0 := main_#t~ite39;havoc main_#t~ite37;havoc main_#t~ite38;havoc main_#t~ite39; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 assume 0 != ~weak$$choice2~0 % 256;main_#t~ite42 := ~y$w_buff1_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite42|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 ~y$w_buff1_used~0 := main_#t~ite42;havoc main_#t~ite41;havoc main_#t~ite40;havoc main_#t~ite42; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 assume 0 != ~weak$$choice2~0 % 256;main_#t~ite45 := ~y$r_buff0_thd0~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite45|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 ~y$r_buff0_thd0~0 := main_#t~ite45;havoc main_#t~ite44;havoc main_#t~ite45;havoc main_#t~ite43; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 assume 0 != ~weak$$choice2~0 % 256;main_#t~ite48 := ~y$r_buff1_thd0~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite48|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 ~y$r_buff1_thd0~0 := main_#t~ite48;havoc main_#t~ite46;havoc main_#t~ite48;havoc main_#t~ite47;~main$tmp_guard1~0 := (if 0 == (if !((2 == ~x~0 && 2 == ~y~0) && 2 == ~z~0) then 1 else 0) then 0 else 1); VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 assume 0 != ~y$flush_delayed~0 % 256;main_#t~ite49 := ~y$mem_tmp~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite49|=2, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 ~y~0 := main_#t~ite49;havoc main_#t~ite49;~y$flush_delayed~0 := 0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 __VERIFIER_assert_#in~expression := ~main$tmp_guard1~0 % 256; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 havoc __VERIFIER_assert_~expression; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 assume 0 == __VERIFIER_assert_~expression; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 assume !false; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] ----- ----- class de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder.RCFGBacktranslator [?] -1 #NULL.base, #NULL.offset := 0, 0; VAL [|#NULL.base|=0, |#NULL.offset|=0] [?] -1 #valid := #valid[0 := 0]; VAL [|#NULL.base|=0, |#NULL.offset|=0] [?] -1 ~__unbuffered_cnt~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0] [?] -1 ~main$tmp_guard0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0] [?] -1 ~main$tmp_guard1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [?] -1 ~x~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [?] -1 ~y~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0] [?] -1 ~y$flush_delayed~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y~0=0] [?] -1 ~y$mem_tmp~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y~0=0] [?] -1 ~y$r_buff0_thd0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y~0=0] [?] -1 ~y$r_buff0_thd1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y~0=0] [?] -1 ~y$r_buff0_thd2~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y~0=0] [?] -1 ~y$r_buff0_thd3~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y~0=0] [?] -1 ~y$r_buff1_thd0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y~0=0] [?] -1 ~y$r_buff1_thd1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y~0=0] [?] -1 ~y$r_buff1_thd2~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y~0=0] [?] -1 ~y$r_buff1_thd3~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y~0=0] [?] -1 ~y$read_delayed~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed~0=0, ~y~0=0] [?] -1 ~y$read_delayed_var~0.base, ~y$read_delayed_var~0.offset := 0, 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y~0=0] [?] -1 ~y$w_buff0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0~0=0, ~y~0=0] [?] -1 ~y$w_buff0_used~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y~0=0] [?] -1 ~y$w_buff1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 ~y$w_buff1_used~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 ~z~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 ~weak$$choice0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 ~weak$$choice2~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 havoc main_#res; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 havoc main_#t~nondet18, main_#t~nondet19, main_#t~nondet20, main_#t~ite22, main_#t~ite21, main_#t~ite23, main_#t~ite24, main_#t~ite25, main_#t~ite26, main_#t~nondet27.base, main_#t~nondet27.offset, main_#t~nondet28.base, main_#t~nondet28.offset, main_#t~ite30, main_#t~ite29, main_#t~ite33, main_#t~ite32, main_#t~ite31, main_#t~ite36, main_#t~ite35, main_#t~ite34, main_#t~ite39, main_#t~ite38, main_#t~ite37, main_#t~ite42, main_#t~ite41, main_#t~ite40, main_#t~ite45, main_#t~ite44, main_#t~ite43, main_#t~ite48, main_#t~ite47, main_#t~ite46, main_#t~ite49, main_~#t2494~0.base, main_~#t2494~0.offset, main_~#t2495~0.base, main_~#t2495~0.offset, main_~#t2496~0.base, main_~#t2496~0.offset; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 SUMMARY for call main_~#t2494~0.base, main_~#t2494~0.offset := #Ultimate.alloc(4); srcloc: L774 VAL [|#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 SUMMARY for call write~int(0, main_~#t2494~0.base, main_~#t2494~0.offset, 4); srcloc: L774-1 VAL [|#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] FORK -1 fork 0 P0(0, 0); VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 havoc main_#t~nondet18; VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 SUMMARY for call main_~#t2495~0.base, main_~#t2495~0.offset := #Ultimate.alloc(4); srcloc: L776 VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 SUMMARY for call write~int(1, main_~#t2495~0.base, main_~#t2495~0.offset, 4); srcloc: L776-1 VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] FORK -1 fork 1 P1(0, 0); VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 havoc main_#t~nondet19; VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 SUMMARY for call main_~#t2496~0.base, main_~#t2496~0.offset := #Ultimate.alloc(4); srcloc: L778 VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 SUMMARY for call write~int(2, main_~#t2496~0.base, main_~#t2496~0.offset, 4); srcloc: L778-1 VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] FORK -1 fork 2 P2(0, 0); VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] 0 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset;~y$w_buff1~0 := ~y$w_buff0~0;~y$w_buff0~0 := 2;~y$w_buff1_used~0 := ~y$w_buff0_used~0;~y$w_buff0_used~0 := 1;__VERIFIER_assert_#in~expression := (if !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$w_buff0_used~0 % 256) then 1 else 0);havoc __VERIFIER_assert_~expression;__VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] 0 assume !(0 == __VERIFIER_assert_~expression); VAL [P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] 0 ~y$r_buff1_thd0~0 := ~y$r_buff0_thd0~0;~y$r_buff1_thd1~0 := ~y$r_buff0_thd1~0;~y$r_buff1_thd2~0 := ~y$r_buff0_thd2~0;~y$r_buff1_thd3~0 := ~y$r_buff0_thd3~0;~y$r_buff0_thd3~0 := 1;~z~0 := 1; VAL [P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 1 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset;~z~0 := 2;~x~0 := 1;~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=2] [?] 0 assume 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256;#t~ite12 := ~y$w_buff0~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite12|=2, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=2] [?] 2 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset;~x~0 := 2;~y~0 := 1; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite12|=2, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=2] [?] 0 ~y~0 := #t~ite12;havoc #t~ite11;havoc #t~ite12; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] 0 assume 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256;#t~ite13 := 0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite13|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] 0 ~y$w_buff0_used~0 := #t~ite13;havoc #t~ite13; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] 0 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd3~0 % 256));#t~ite14 := ~y$w_buff1_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite14|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] 0 ~y$w_buff1_used~0 := #t~ite14;havoc #t~ite14; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] 0 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256);#t~ite15 := ~y$r_buff0_thd3~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite15|=1, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] 0 ~y$r_buff0_thd3~0 := #t~ite15;havoc #t~ite15; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] 0 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd3~0 % 256));#t~ite16 := ~y$r_buff1_thd3~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite16|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] 0 ~y$r_buff1_thd3~0 := #t~ite16;havoc #t~ite16;~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=2, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] 2 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256); VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=2, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] 2 assume !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256);#t~ite4 := ~y~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite4|=2, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=2, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] 2 #t~ite5 := #t~ite4; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite4|=2, |P1_#t~ite5|=2, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=2, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] 2 ~y~0 := #t~ite5;havoc #t~ite5;havoc #t~ite4; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=2, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] 2 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256);#t~ite6 := ~y$w_buff0_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite6|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=2, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] 2 ~y$w_buff0_used~0 := #t~ite6;havoc #t~ite6; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=2, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] 2 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256));#t~ite7 := ~y$w_buff1_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite7|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=2, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] 2 ~y$w_buff1_used~0 := #t~ite7;havoc #t~ite7; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=2, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] 2 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256);#t~ite8 := ~y$r_buff0_thd2~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite8|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=2, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] 2 ~y$r_buff0_thd2~0 := #t~ite8;havoc #t~ite8; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=2, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] 2 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256));#t~ite9 := ~y$r_buff1_thd2~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite9|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=2, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] 2 ~y$r_buff1_thd2~0 := #t~ite9;havoc #t~ite9;~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 havoc main_#t~nondet20;~main$tmp_guard0~0 := (if 0 == (if 3 == ~__unbuffered_cnt~0 then 1 else 0) then 0 else 1); VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 assume 0 != ~main$tmp_guard0~0 % 256; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256); VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 assume !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256);main_#t~ite21 := ~y~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite21|=2, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 main_#t~ite22 := main_#t~ite21; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite21|=2, |ULTIMATE.start_main_#t~ite22|=2, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 ~y~0 := main_#t~ite22;havoc main_#t~ite21;havoc main_#t~ite22; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256);main_#t~ite23 := ~y$w_buff0_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite23|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 ~y$w_buff0_used~0 := main_#t~ite23;havoc main_#t~ite23; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256));main_#t~ite24 := ~y$w_buff1_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite24|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 ~y$w_buff1_used~0 := main_#t~ite24;havoc main_#t~ite24; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256);main_#t~ite25 := ~y$r_buff0_thd0~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite25|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 ~y$r_buff0_thd0~0 := main_#t~ite25;havoc main_#t~ite25; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256));main_#t~ite26 := ~y$r_buff1_thd0~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite26|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 ~y$r_buff1_thd0~0 := main_#t~ite26;havoc main_#t~ite26;~weak$$choice0~0 := (if 0 == main_#t~nondet27.base + main_#t~nondet27.offset then 0 else 1);havoc main_#t~nondet27.base, main_#t~nondet27.offset;~weak$$choice2~0 := (if 0 == main_#t~nondet28.base + main_#t~nondet28.offset then 0 else 1);havoc main_#t~nondet28.base, main_#t~nondet28.offset;~y$flush_delayed~0 := ~weak$$choice2~0;~y$mem_tmp~0 := ~y~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 assume (0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd0~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd0~0 % 256 && 0 == ~y$r_buff1_thd0~0 % 256);main_#t~ite30 := ~y~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite30|=2, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 ~y~0 := main_#t~ite30;havoc main_#t~ite29;havoc main_#t~ite30; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 assume 0 != ~weak$$choice2~0 % 256;main_#t~ite33 := ~y$w_buff0~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite33|=2, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 ~y$w_buff0~0 := main_#t~ite33;havoc main_#t~ite33;havoc main_#t~ite32;havoc main_#t~ite31; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 assume 0 != ~weak$$choice2~0 % 256;main_#t~ite36 := ~y$w_buff1~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite36|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 ~y$w_buff1~0 := main_#t~ite36;havoc main_#t~ite36;havoc main_#t~ite34;havoc main_#t~ite35; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 assume 0 != ~weak$$choice2~0 % 256;main_#t~ite39 := ~y$w_buff0_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite39|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 ~y$w_buff0_used~0 := main_#t~ite39;havoc main_#t~ite37;havoc main_#t~ite38;havoc main_#t~ite39; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 assume 0 != ~weak$$choice2~0 % 256;main_#t~ite42 := ~y$w_buff1_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite42|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 ~y$w_buff1_used~0 := main_#t~ite42;havoc main_#t~ite41;havoc main_#t~ite40;havoc main_#t~ite42; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 assume 0 != ~weak$$choice2~0 % 256;main_#t~ite45 := ~y$r_buff0_thd0~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite45|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 ~y$r_buff0_thd0~0 := main_#t~ite45;havoc main_#t~ite44;havoc main_#t~ite45;havoc main_#t~ite43; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 assume 0 != ~weak$$choice2~0 % 256;main_#t~ite48 := ~y$r_buff1_thd0~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite48|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 ~y$r_buff1_thd0~0 := main_#t~ite48;havoc main_#t~ite46;havoc main_#t~ite48;havoc main_#t~ite47;~main$tmp_guard1~0 := (if 0 == (if !((2 == ~x~0 && 2 == ~y~0) && 2 == ~z~0) then 1 else 0) then 0 else 1); VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 assume 0 != ~y$flush_delayed~0 % 256;main_#t~ite49 := ~y$mem_tmp~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite49|=2, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 ~y~0 := main_#t~ite49;havoc main_#t~ite49;~y$flush_delayed~0 := 0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 __VERIFIER_assert_#in~expression := ~main$tmp_guard1~0 % 256; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 havoc __VERIFIER_assert_~expression; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 assume 0 == __VERIFIER_assert_~expression; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 assume !false; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 #NULL.base, #NULL.offset := 0, 0; VAL [#NULL.base=0, #NULL.offset=0] [?] -1 #valid := #valid[0 := 0]; VAL [#NULL.base=0, #NULL.offset=0] [L672] -1 ~__unbuffered_cnt~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0] [L673] -1 ~main$tmp_guard0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0] [L674] -1 ~main$tmp_guard1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [L676] -1 ~x~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [L678] -1 ~y~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0] [L679] -1 ~y$flush_delayed~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y~0=0] [L680] -1 ~y$mem_tmp~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y~0=0] [L681] -1 ~y$r_buff0_thd0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y~0=0] [L682] -1 ~y$r_buff0_thd1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y~0=0] [L683] -1 ~y$r_buff0_thd2~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y~0=0] [L684] -1 ~y$r_buff0_thd3~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y~0=0] [L685] -1 ~y$r_buff1_thd0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y~0=0] [L686] -1 ~y$r_buff1_thd1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y~0=0] [L687] -1 ~y$r_buff1_thd2~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y~0=0] [L688] -1 ~y$r_buff1_thd3~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y~0=0] [L689] -1 ~y$read_delayed~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed~0=0, ~y~0=0] [L690] -1 ~y$read_delayed_var~0.base, ~y$read_delayed_var~0.offset := 0, 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y~0=0] [L691] -1 ~y$w_buff0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0~0=0, ~y~0=0] [L692] -1 ~y$w_buff0_used~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y~0=0] [L693] -1 ~y$w_buff1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1~0=0, ~y~0=0] [L694] -1 ~y$w_buff1_used~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L696] -1 ~z~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L697] -1 ~weak$$choice0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L698] -1 ~weak$$choice2~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 havoc main_#res; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 havoc main_#t~nondet18, main_#t~nondet19, main_#t~nondet20, main_#t~ite22, main_#t~ite21, main_#t~ite23, main_#t~ite24, main_#t~ite25, main_#t~ite26, main_#t~nondet27.base, main_#t~nondet27.offset, main_#t~nondet28.base, main_#t~nondet28.offset, main_#t~ite30, main_#t~ite29, main_#t~ite33, main_#t~ite32, main_#t~ite31, main_#t~ite36, main_#t~ite35, main_#t~ite34, main_#t~ite39, main_#t~ite38, main_#t~ite37, main_#t~ite42, main_#t~ite41, main_#t~ite40, main_#t~ite45, main_#t~ite44, main_#t~ite43, main_#t~ite48, main_#t~ite47, main_#t~ite46, main_#t~ite49, main_~#t2494~0.base, main_~#t2494~0.offset, main_~#t2495~0.base, main_~#t2495~0.offset, main_~#t2496~0.base, main_~#t2496~0.offset; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L774] -1 call main_~#t2494~0.base, main_~#t2494~0.offset := #Ultimate.alloc(4); VAL [#NULL.base=0, #NULL.offset=0, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L775] -1 call write~int(0, main_~#t2494~0.base, main_~#t2494~0.offset, 4); VAL [#NULL.base=0, #NULL.offset=0, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L775] FORK -1 fork 0 P0(0, 0); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L775] -1 havoc main_#t~nondet18; VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L776] -1 call main_~#t2495~0.base, main_~#t2495~0.offset := #Ultimate.alloc(4); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L777] -1 call write~int(1, main_~#t2495~0.base, main_~#t2495~0.offset, 4); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L777] FORK -1 fork 1 P1(0, 0); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L777] -1 havoc main_#t~nondet19; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L778] -1 call main_~#t2496~0.base, main_~#t2496~0.offset := #Ultimate.alloc(4); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L779] -1 call write~int(2, main_~#t2496~0.base, main_~#t2496~0.offset, 4); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L779] FORK -1 fork 2 P2(0, 0); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L734-L762] 0 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset; [L737] 0 ~y$w_buff1~0 := ~y$w_buff0~0; [L738] 0 ~y$w_buff0~0 := 2; [L739] 0 ~y$w_buff1_used~0 := ~y$w_buff0_used~0; [L740] 0 ~y$w_buff0_used~0 := 1; [L741] 0 __VERIFIER_assert_#in~expression := (if !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$w_buff0_used~0 % 256) then 1 else 0); [L741] 0 havoc __VERIFIER_assert_~expression; [L4] 0 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L4] 0 assume !(0 == __VERIFIER_assert_~expression); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L742] 0 ~y$r_buff1_thd0~0 := ~y$r_buff0_thd0~0; [L743] 0 ~y$r_buff1_thd1~0 := ~y$r_buff0_thd1~0; [L744] 0 ~y$r_buff1_thd2~0 := ~y$r_buff0_thd2~0; [L745] 0 ~y$r_buff1_thd3~0 := ~y$r_buff0_thd3~0; [L746] 0 ~y$r_buff0_thd3~0 := 1; [L749] 0 ~z~0 := 1; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L699-L713] 1 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset; [L702] 1 ~z~0 := 2; [L705] 1 ~x~0 := 1; [L710] 1 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=2] [L752] 0 assume 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256; [L752] 0 #t~ite12 := ~y$w_buff0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite12=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=2] [L714-L733] 2 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset; [L717] 2 ~x~0 := 2; [L720] 2 ~y~0 := 1; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite12=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=2] [L752] 0 ~y~0 := #t~ite12; [L752] 0 havoc #t~ite11; [L752] 0 havoc #t~ite12; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L753] 0 assume 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256; [L753] 0 #t~ite13 := 0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite13=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L753] 0 ~y$w_buff0_used~0 := #t~ite13; [L753] 0 havoc #t~ite13; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L754] 0 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd3~0 % 256)); [L754] 0 #t~ite14 := ~y$w_buff1_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite14=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L754] 0 ~y$w_buff1_used~0 := #t~ite14; [L754] 0 havoc #t~ite14; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L755] 0 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256); [L755] 0 #t~ite15 := ~y$r_buff0_thd3~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite15=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L755] 0 ~y$r_buff0_thd3~0 := #t~ite15; [L755] 0 havoc #t~ite15; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L756] 0 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd3~0 % 256)); [L756] 0 #t~ite16 := ~y$r_buff1_thd3~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite16=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L756] 0 ~y$r_buff1_thd3~0 := #t~ite16; [L756] 0 havoc #t~ite16; [L759] 0 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=2, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L723] 2 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=2, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L723] 2 assume !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256); [L723] 2 #t~ite4 := ~y~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=2, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L723] 2 #t~ite5 := #t~ite4; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite4=2, #t~ite5=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=2, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L723] 2 ~y~0 := #t~ite5; [L723] 2 havoc #t~ite5; [L723] 2 havoc #t~ite4; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=2, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L724] 2 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256); [L724] 2 #t~ite6 := ~y$w_buff0_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite6=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=2, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L724] 2 ~y$w_buff0_used~0 := #t~ite6; [L724] 2 havoc #t~ite6; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=2, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L725] 2 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)); [L725] 2 #t~ite7 := ~y$w_buff1_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite7=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=2, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L725] 2 ~y$w_buff1_used~0 := #t~ite7; [L725] 2 havoc #t~ite7; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=2, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L726] 2 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256); [L726] 2 #t~ite8 := ~y$r_buff0_thd2~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite8=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=2, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L726] 2 ~y$r_buff0_thd2~0 := #t~ite8; [L726] 2 havoc #t~ite8; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=2, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L727] 2 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)); [L727] 2 #t~ite9 := ~y$r_buff1_thd2~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite9=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=2, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L727] 2 ~y$r_buff1_thd2~0 := #t~ite9; [L727] 2 havoc #t~ite9; [L730] 2 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=3, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L779] -1 havoc main_#t~nondet20; [L781] -1 ~main$tmp_guard0~0 := (if 0 == (if 3 == ~__unbuffered_cnt~0 then 1 else 0) then 0 else 1); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=3, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L783] -1 assume 0 != ~main$tmp_guard0~0 % 256; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=3, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L785] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=3, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L785] -1 assume !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256); [L785] -1 main_#t~ite21 := ~y~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite21=2, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=3, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L785] -1 main_#t~ite22 := main_#t~ite21; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite21=2, main_#t~ite22=2, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=3, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L785] -1 ~y~0 := main_#t~ite22; [L785] -1 havoc main_#t~ite21; [L785] -1 havoc main_#t~ite22; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=3, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L786] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256); [L786] -1 main_#t~ite23 := ~y$w_buff0_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite23=0, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=3, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L786] -1 ~y$w_buff0_used~0 := main_#t~ite23; [L786] -1 havoc main_#t~ite23; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=3, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L787] -1 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)); [L787] -1 main_#t~ite24 := ~y$w_buff1_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite24=0, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=3, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L787] -1 ~y$w_buff1_used~0 := main_#t~ite24; [L787] -1 havoc main_#t~ite24; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=3, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L788] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256); [L788] -1 main_#t~ite25 := ~y$r_buff0_thd0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite25=0, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=3, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L788] -1 ~y$r_buff0_thd0~0 := main_#t~ite25; [L788] -1 havoc main_#t~ite25; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=3, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L789] -1 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)); [L789] -1 main_#t~ite26 := ~y$r_buff1_thd0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite26=0, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=3, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L789] -1 ~y$r_buff1_thd0~0 := main_#t~ite26; [L789] -1 havoc main_#t~ite26; [L792] -1 ~weak$$choice0~0 := (if 0 == main_#t~nondet27.base + main_#t~nondet27.offset then 0 else 1); [L792] -1 havoc main_#t~nondet27.base, main_#t~nondet27.offset; [L793] -1 ~weak$$choice2~0 := (if 0 == main_#t~nondet28.base + main_#t~nondet28.offset then 0 else 1); [L793] -1 havoc main_#t~nondet28.base, main_#t~nondet28.offset; [L794] -1 ~y$flush_delayed~0 := ~weak$$choice2~0; [L795] -1 ~y$mem_tmp~0 := ~y~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=3, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L796] -1 assume (0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd0~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd0~0 % 256 && 0 == ~y$r_buff1_thd0~0 % 256); [L796] -1 main_#t~ite30 := ~y~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite30=2, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=3, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L796] -1 ~y~0 := main_#t~ite30; [L796] -1 havoc main_#t~ite29; [L796] -1 havoc main_#t~ite30; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=3, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L797] -1 assume 0 != ~weak$$choice2~0 % 256; [L797] -1 main_#t~ite33 := ~y$w_buff0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite33=2, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=3, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L797] -1 ~y$w_buff0~0 := main_#t~ite33; [L797] -1 havoc main_#t~ite33; [L797] -1 havoc main_#t~ite32; [L797] -1 havoc main_#t~ite31; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=3, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L798] -1 assume 0 != ~weak$$choice2~0 % 256; [L798] -1 main_#t~ite36 := ~y$w_buff1~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite36=0, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=3, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L798] -1 ~y$w_buff1~0 := main_#t~ite36; [L798] -1 havoc main_#t~ite36; [L798] -1 havoc main_#t~ite34; [L798] -1 havoc main_#t~ite35; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=3, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L799] -1 assume 0 != ~weak$$choice2~0 % 256; [L799] -1 main_#t~ite39 := ~y$w_buff0_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite39=0, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=3, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L799] -1 ~y$w_buff0_used~0 := main_#t~ite39; [L799] -1 havoc main_#t~ite37; [L799] -1 havoc main_#t~ite38; [L799] -1 havoc main_#t~ite39; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=3, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L800] -1 assume 0 != ~weak$$choice2~0 % 256; [L800] -1 main_#t~ite42 := ~y$w_buff1_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite42=0, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=3, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L800] -1 ~y$w_buff1_used~0 := main_#t~ite42; [L800] -1 havoc main_#t~ite41; [L800] -1 havoc main_#t~ite40; [L800] -1 havoc main_#t~ite42; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=3, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L801] -1 assume 0 != ~weak$$choice2~0 % 256; [L801] -1 main_#t~ite45 := ~y$r_buff0_thd0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite45=0, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=3, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L801] -1 ~y$r_buff0_thd0~0 := main_#t~ite45; [L801] -1 havoc main_#t~ite44; [L801] -1 havoc main_#t~ite45; [L801] -1 havoc main_#t~ite43; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=3, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L802] -1 assume 0 != ~weak$$choice2~0 % 256; [L802] -1 main_#t~ite48 := ~y$r_buff1_thd0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite48=0, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=3, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L802] -1 ~y$r_buff1_thd0~0 := main_#t~ite48; [L802] -1 havoc main_#t~ite46; [L802] -1 havoc main_#t~ite48; [L802] -1 havoc main_#t~ite47; [L803] -1 ~main$tmp_guard1~0 := (if 0 == (if !((2 == ~x~0 && 2 == ~y~0) && 2 == ~z~0) then 1 else 0) then 0 else 1); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=3, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L804] -1 assume 0 != ~y$flush_delayed~0 % 256; [L804] -1 main_#t~ite49 := ~y$mem_tmp~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite49=2, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=3, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L804] -1 ~y~0 := main_#t~ite49; [L804] -1 havoc main_#t~ite49; [L805] -1 ~y$flush_delayed~0 := 0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=3, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L807] -1 __VERIFIER_assert_#in~expression := ~main$tmp_guard1~0 % 256; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=3, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L807] -1 havoc __VERIFIER_assert_~expression; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=3, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L4] -1 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=0, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=3, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L4] -1 assume 0 == __VERIFIER_assert_~expression; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=0, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=3, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L4] -1 assert false; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=0, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=3, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] ----- ----- class de.uni_freiburg.informatik.ultimate.boogie.preprocessor.BoogiePreprocessorBacktranslator [?] -1 #NULL.base, #NULL.offset := 0, 0; VAL [#NULL.base=0, #NULL.offset=0] [?] -1 #valid := #valid[0 := 0]; VAL [#NULL.base=0, #NULL.offset=0] [L672] -1 ~__unbuffered_cnt~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0] [L673] -1 ~main$tmp_guard0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0] [L674] -1 ~main$tmp_guard1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [L676] -1 ~x~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [L678] -1 ~y~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0] [L679] -1 ~y$flush_delayed~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y~0=0] [L680] -1 ~y$mem_tmp~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y~0=0] [L681] -1 ~y$r_buff0_thd0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y~0=0] [L682] -1 ~y$r_buff0_thd1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y~0=0] [L683] -1 ~y$r_buff0_thd2~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y~0=0] [L684] -1 ~y$r_buff0_thd3~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y~0=0] [L685] -1 ~y$r_buff1_thd0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y~0=0] [L686] -1 ~y$r_buff1_thd1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y~0=0] [L687] -1 ~y$r_buff1_thd2~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y~0=0] [L688] -1 ~y$r_buff1_thd3~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y~0=0] [L689] -1 ~y$read_delayed~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed~0=0, ~y~0=0] [L690] -1 ~y$read_delayed_var~0.base, ~y$read_delayed_var~0.offset := 0, 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y~0=0] [L691] -1 ~y$w_buff0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0~0=0, ~y~0=0] [L692] -1 ~y$w_buff0_used~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y~0=0] [L693] -1 ~y$w_buff1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1~0=0, ~y~0=0] [L694] -1 ~y$w_buff1_used~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L696] -1 ~z~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L697] -1 ~weak$$choice0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L698] -1 ~weak$$choice2~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 havoc main_#res; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 havoc main_#t~nondet18, main_#t~nondet19, main_#t~nondet20, main_#t~ite22, main_#t~ite21, main_#t~ite23, main_#t~ite24, main_#t~ite25, main_#t~ite26, main_#t~nondet27.base, main_#t~nondet27.offset, main_#t~nondet28.base, main_#t~nondet28.offset, main_#t~ite30, main_#t~ite29, main_#t~ite33, main_#t~ite32, main_#t~ite31, main_#t~ite36, main_#t~ite35, main_#t~ite34, main_#t~ite39, main_#t~ite38, main_#t~ite37, main_#t~ite42, main_#t~ite41, main_#t~ite40, main_#t~ite45, main_#t~ite44, main_#t~ite43, main_#t~ite48, main_#t~ite47, main_#t~ite46, main_#t~ite49, main_~#t2494~0.base, main_~#t2494~0.offset, main_~#t2495~0.base, main_~#t2495~0.offset, main_~#t2496~0.base, main_~#t2496~0.offset; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L774] -1 call main_~#t2494~0.base, main_~#t2494~0.offset := #Ultimate.alloc(4); VAL [#NULL.base=0, #NULL.offset=0, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L775] -1 call write~int(0, main_~#t2494~0.base, main_~#t2494~0.offset, 4); VAL [#NULL.base=0, #NULL.offset=0, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L775] FORK -1 fork 0 P0(0, 0); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L775] -1 havoc main_#t~nondet18; VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L776] -1 call main_~#t2495~0.base, main_~#t2495~0.offset := #Ultimate.alloc(4); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L777] -1 call write~int(1, main_~#t2495~0.base, main_~#t2495~0.offset, 4); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L777] FORK -1 fork 1 P1(0, 0); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L777] -1 havoc main_#t~nondet19; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L778] -1 call main_~#t2496~0.base, main_~#t2496~0.offset := #Ultimate.alloc(4); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L779] -1 call write~int(2, main_~#t2496~0.base, main_~#t2496~0.offset, 4); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L779] FORK -1 fork 2 P2(0, 0); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L734-L762] 0 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset; [L737] 0 ~y$w_buff1~0 := ~y$w_buff0~0; [L738] 0 ~y$w_buff0~0 := 2; [L739] 0 ~y$w_buff1_used~0 := ~y$w_buff0_used~0; [L740] 0 ~y$w_buff0_used~0 := 1; [L741] 0 __VERIFIER_assert_#in~expression := (if !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$w_buff0_used~0 % 256) then 1 else 0); [L741] 0 havoc __VERIFIER_assert_~expression; [L4] 0 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L4] 0 assume !(0 == __VERIFIER_assert_~expression); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L742] 0 ~y$r_buff1_thd0~0 := ~y$r_buff0_thd0~0; [L743] 0 ~y$r_buff1_thd1~0 := ~y$r_buff0_thd1~0; [L744] 0 ~y$r_buff1_thd2~0 := ~y$r_buff0_thd2~0; [L745] 0 ~y$r_buff1_thd3~0 := ~y$r_buff0_thd3~0; [L746] 0 ~y$r_buff0_thd3~0 := 1; [L749] 0 ~z~0 := 1; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L699-L713] 1 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset; [L702] 1 ~z~0 := 2; [L705] 1 ~x~0 := 1; [L710] 1 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=2] [L752] 0 assume 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256; [L752] 0 #t~ite12 := ~y$w_buff0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite12=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=2] [L714-L733] 2 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset; [L717] 2 ~x~0 := 2; [L720] 2 ~y~0 := 1; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite12=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=2] [L752] 0 ~y~0 := #t~ite12; [L752] 0 havoc #t~ite11; [L752] 0 havoc #t~ite12; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L753] 0 assume 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256; [L753] 0 #t~ite13 := 0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite13=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L753] 0 ~y$w_buff0_used~0 := #t~ite13; [L753] 0 havoc #t~ite13; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L754] 0 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd3~0 % 256)); [L754] 0 #t~ite14 := ~y$w_buff1_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite14=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L754] 0 ~y$w_buff1_used~0 := #t~ite14; [L754] 0 havoc #t~ite14; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L755] 0 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256); [L755] 0 #t~ite15 := ~y$r_buff0_thd3~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite15=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L755] 0 ~y$r_buff0_thd3~0 := #t~ite15; [L755] 0 havoc #t~ite15; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L756] 0 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd3~0 % 256)); [L756] 0 #t~ite16 := ~y$r_buff1_thd3~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite16=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L756] 0 ~y$r_buff1_thd3~0 := #t~ite16; [L756] 0 havoc #t~ite16; [L759] 0 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=2, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L723] 2 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=2, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L723] 2 assume !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256); [L723] 2 #t~ite4 := ~y~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=2, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L723] 2 #t~ite5 := #t~ite4; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite4=2, #t~ite5=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=2, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L723] 2 ~y~0 := #t~ite5; [L723] 2 havoc #t~ite5; [L723] 2 havoc #t~ite4; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=2, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L724] 2 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256); [L724] 2 #t~ite6 := ~y$w_buff0_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite6=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=2, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L724] 2 ~y$w_buff0_used~0 := #t~ite6; [L724] 2 havoc #t~ite6; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=2, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L725] 2 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)); [L725] 2 #t~ite7 := ~y$w_buff1_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite7=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=2, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L725] 2 ~y$w_buff1_used~0 := #t~ite7; [L725] 2 havoc #t~ite7; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=2, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L726] 2 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256); [L726] 2 #t~ite8 := ~y$r_buff0_thd2~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite8=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=2, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L726] 2 ~y$r_buff0_thd2~0 := #t~ite8; [L726] 2 havoc #t~ite8; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=2, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L727] 2 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)); [L727] 2 #t~ite9 := ~y$r_buff1_thd2~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite9=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=2, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L727] 2 ~y$r_buff1_thd2~0 := #t~ite9; [L727] 2 havoc #t~ite9; [L730] 2 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=3, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L779] -1 havoc main_#t~nondet20; [L781] -1 ~main$tmp_guard0~0 := (if 0 == (if 3 == ~__unbuffered_cnt~0 then 1 else 0) then 0 else 1); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=3, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L783] -1 assume 0 != ~main$tmp_guard0~0 % 256; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=3, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L785] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=3, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L785] -1 assume !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256); [L785] -1 main_#t~ite21 := ~y~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite21=2, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=3, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L785] -1 main_#t~ite22 := main_#t~ite21; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite21=2, main_#t~ite22=2, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=3, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L785] -1 ~y~0 := main_#t~ite22; [L785] -1 havoc main_#t~ite21; [L785] -1 havoc main_#t~ite22; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=3, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L786] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256); [L786] -1 main_#t~ite23 := ~y$w_buff0_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite23=0, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=3, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L786] -1 ~y$w_buff0_used~0 := main_#t~ite23; [L786] -1 havoc main_#t~ite23; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=3, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L787] -1 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)); [L787] -1 main_#t~ite24 := ~y$w_buff1_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite24=0, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=3, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L787] -1 ~y$w_buff1_used~0 := main_#t~ite24; [L787] -1 havoc main_#t~ite24; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=3, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L788] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256); [L788] -1 main_#t~ite25 := ~y$r_buff0_thd0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite25=0, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=3, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L788] -1 ~y$r_buff0_thd0~0 := main_#t~ite25; [L788] -1 havoc main_#t~ite25; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=3, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L789] -1 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)); [L789] -1 main_#t~ite26 := ~y$r_buff1_thd0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite26=0, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=3, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L789] -1 ~y$r_buff1_thd0~0 := main_#t~ite26; [L789] -1 havoc main_#t~ite26; [L792] -1 ~weak$$choice0~0 := (if 0 == main_#t~nondet27.base + main_#t~nondet27.offset then 0 else 1); [L792] -1 havoc main_#t~nondet27.base, main_#t~nondet27.offset; [L793] -1 ~weak$$choice2~0 := (if 0 == main_#t~nondet28.base + main_#t~nondet28.offset then 0 else 1); [L793] -1 havoc main_#t~nondet28.base, main_#t~nondet28.offset; [L794] -1 ~y$flush_delayed~0 := ~weak$$choice2~0; [L795] -1 ~y$mem_tmp~0 := ~y~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=3, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L796] -1 assume (0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd0~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd0~0 % 256 && 0 == ~y$r_buff1_thd0~0 % 256); [L796] -1 main_#t~ite30 := ~y~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite30=2, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=3, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L796] -1 ~y~0 := main_#t~ite30; [L796] -1 havoc main_#t~ite29; [L796] -1 havoc main_#t~ite30; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=3, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L797] -1 assume 0 != ~weak$$choice2~0 % 256; [L797] -1 main_#t~ite33 := ~y$w_buff0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite33=2, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=3, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L797] -1 ~y$w_buff0~0 := main_#t~ite33; [L797] -1 havoc main_#t~ite33; [L797] -1 havoc main_#t~ite32; [L797] -1 havoc main_#t~ite31; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=3, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L798] -1 assume 0 != ~weak$$choice2~0 % 256; [L798] -1 main_#t~ite36 := ~y$w_buff1~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite36=0, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=3, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L798] -1 ~y$w_buff1~0 := main_#t~ite36; [L798] -1 havoc main_#t~ite36; [L798] -1 havoc main_#t~ite34; [L798] -1 havoc main_#t~ite35; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=3, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L799] -1 assume 0 != ~weak$$choice2~0 % 256; [L799] -1 main_#t~ite39 := ~y$w_buff0_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite39=0, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=3, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L799] -1 ~y$w_buff0_used~0 := main_#t~ite39; [L799] -1 havoc main_#t~ite37; [L799] -1 havoc main_#t~ite38; [L799] -1 havoc main_#t~ite39; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=3, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L800] -1 assume 0 != ~weak$$choice2~0 % 256; [L800] -1 main_#t~ite42 := ~y$w_buff1_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite42=0, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=3, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L800] -1 ~y$w_buff1_used~0 := main_#t~ite42; [L800] -1 havoc main_#t~ite41; [L800] -1 havoc main_#t~ite40; [L800] -1 havoc main_#t~ite42; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=3, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L801] -1 assume 0 != ~weak$$choice2~0 % 256; [L801] -1 main_#t~ite45 := ~y$r_buff0_thd0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite45=0, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=3, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L801] -1 ~y$r_buff0_thd0~0 := main_#t~ite45; [L801] -1 havoc main_#t~ite44; [L801] -1 havoc main_#t~ite45; [L801] -1 havoc main_#t~ite43; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=3, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L802] -1 assume 0 != ~weak$$choice2~0 % 256; [L802] -1 main_#t~ite48 := ~y$r_buff1_thd0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite48=0, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=3, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L802] -1 ~y$r_buff1_thd0~0 := main_#t~ite48; [L802] -1 havoc main_#t~ite46; [L802] -1 havoc main_#t~ite48; [L802] -1 havoc main_#t~ite47; [L803] -1 ~main$tmp_guard1~0 := (if 0 == (if !((2 == ~x~0 && 2 == ~y~0) && 2 == ~z~0) then 1 else 0) then 0 else 1); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=3, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L804] -1 assume 0 != ~y$flush_delayed~0 % 256; [L804] -1 main_#t~ite49 := ~y$mem_tmp~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite49=2, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=3, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L804] -1 ~y~0 := main_#t~ite49; [L804] -1 havoc main_#t~ite49; [L805] -1 ~y$flush_delayed~0 := 0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=3, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L807] -1 __VERIFIER_assert_#in~expression := ~main$tmp_guard1~0 % 256; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=3, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L807] -1 havoc __VERIFIER_assert_~expression; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=3, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L4] -1 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=0, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=3, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L4] -1 assume 0 == __VERIFIER_assert_~expression; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=0, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=3, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L4] -1 assert false; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=0, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=3, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 #NULL := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0] [?] -1 #valid[0] := 0; VAL [#NULL!base=0, #NULL!offset=0] [L672] -1 ~__unbuffered_cnt~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0] [L673] -1 ~main$tmp_guard0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0] [L674] -1 ~main$tmp_guard1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [L676] -1 ~x~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [L678] -1 ~y~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0] [L679] -1 ~y$flush_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y~0=0] [L680] -1 ~y$mem_tmp~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y~0=0] [L681] -1 ~y$r_buff0_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y~0=0] [L682] -1 ~y$r_buff0_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y~0=0] [L683] -1 ~y$r_buff0_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y~0=0] [L684] -1 ~y$r_buff0_thd3~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y~0=0] [L685] -1 ~y$r_buff1_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y~0=0] [L686] -1 ~y$r_buff1_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y~0=0] [L687] -1 ~y$r_buff1_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y~0=0] [L688] -1 ~y$r_buff1_thd3~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y~0=0] [L689] -1 ~y$read_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed~0=0, ~y~0=0] [L690] -1 ~y$read_delayed_var~0 := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y~0=0] [L691] -1 ~y$w_buff0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0~0=0, ~y~0=0] [L692] -1 ~y$w_buff0_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y~0=0] [L693] -1 ~y$w_buff1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1~0=0, ~y~0=0] [L694] -1 ~y$w_buff1_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L696] -1 ~z~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L697] -1 ~weak$$choice0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L698] -1 ~weak$$choice2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 havoc main_#res; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 havoc main_#t~nondet18, main_#t~nondet19, main_#t~nondet20, main_#t~ite22, main_#t~ite21, main_#t~ite23, main_#t~ite24, main_#t~ite25, main_#t~ite26, main_#t~nondet27, main_#t~nondet28, main_#t~ite30, main_#t~ite29, main_#t~ite33, main_#t~ite32, main_#t~ite31, main_#t~ite36, main_#t~ite35, main_#t~ite34, main_#t~ite39, main_#t~ite38, main_#t~ite37, main_#t~ite42, main_#t~ite41, main_#t~ite40, main_#t~ite45, main_#t~ite44, main_#t~ite43, main_#t~ite48, main_#t~ite47, main_#t~ite46, main_#t~ite49, main_~#t2494~0, main_~#t2495~0, main_~#t2496~0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L774] FCALL -1 call main_~#t2494~0 := #Ultimate.alloc(4); VAL [#NULL!base=0, #NULL!offset=0, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L775] FCALL -1 call write~int(0, main_~#t2494~0, 4); VAL [#NULL!base=0, #NULL!offset=0, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L775] FORK -1 fork 0 P0({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L775] -1 havoc main_#t~nondet18; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L776] FCALL -1 call main_~#t2495~0 := #Ultimate.alloc(4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L777] FCALL -1 call write~int(1, main_~#t2495~0, 4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L777] FORK -1 fork 1 P1({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L777] -1 havoc main_#t~nondet19; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L778] FCALL -1 call main_~#t2496~0 := #Ultimate.alloc(4); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L779] FCALL -1 call write~int(2, main_~#t2496~0, 4); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L779] FORK -1 fork 2 P2({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L734-L762] 0 ~arg := #in~arg; [L737] 0 ~y$w_buff1~0 := ~y$w_buff0~0; [L738] 0 ~y$w_buff0~0 := 2; [L739] 0 ~y$w_buff1_used~0 := ~y$w_buff0_used~0; [L740] 0 ~y$w_buff0_used~0 := 1; [L741] 0 __VERIFIER_assert_#in~expression := (if !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$w_buff0_used~0 % 256) then 1 else 0); [L741] 0 havoc __VERIFIER_assert_~expression; [L4] 0 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L4] COND FALSE 0 !(0 == __VERIFIER_assert_~expression) VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L742] 0 ~y$r_buff1_thd0~0 := ~y$r_buff0_thd0~0; [L743] 0 ~y$r_buff1_thd1~0 := ~y$r_buff0_thd1~0; [L744] 0 ~y$r_buff1_thd2~0 := ~y$r_buff0_thd2~0; [L745] 0 ~y$r_buff1_thd3~0 := ~y$r_buff0_thd3~0; [L746] 0 ~y$r_buff0_thd3~0 := 1; [L749] 0 ~z~0 := 1; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L699-L713] 1 ~arg := #in~arg; [L702] 1 ~z~0 := 2; [L705] 1 ~x~0 := 1; [L710] 1 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=2] [L752] COND TRUE 0 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256 [L752] 0 #t~ite12 := ~y$w_buff0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite12=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=2] [L714-L733] 2 ~arg := #in~arg; [L717] 2 ~x~0 := 2; [L720] 2 ~y~0 := 1; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite12=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=2] [L752] 0 ~y~0 := #t~ite12; [L752] 0 havoc #t~ite11; [L752] 0 havoc #t~ite12; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L753] COND TRUE 0 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256 [L753] 0 #t~ite13 := 0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite13=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L753] 0 ~y$w_buff0_used~0 := #t~ite13; [L753] 0 havoc #t~ite13; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L754] COND FALSE 0 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd3~0 % 256)) [L754] 0 #t~ite14 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite14=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L754] 0 ~y$w_buff1_used~0 := #t~ite14; [L754] 0 havoc #t~ite14; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L755] COND FALSE 0 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256) [L755] 0 #t~ite15 := ~y$r_buff0_thd3~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite15=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L755] 0 ~y$r_buff0_thd3~0 := #t~ite15; [L755] 0 havoc #t~ite15; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L756] COND FALSE 0 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd3~0 % 256)) [L756] 0 #t~ite16 := ~y$r_buff1_thd3~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite16=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L756] 0 ~y$r_buff1_thd3~0 := #t~ite16; [L756] 0 havoc #t~ite16; [L759] 0 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=2, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L723] COND FALSE 2 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=2, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L723] COND FALSE 2 !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256) [L723] 2 #t~ite4 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=2, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L723] 2 #t~ite5 := #t~ite4; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite4=2, #t~ite5=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=2, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L723] 2 ~y~0 := #t~ite5; [L723] 2 havoc #t~ite5; [L723] 2 havoc #t~ite4; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=2, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L724] COND FALSE 2 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) [L724] 2 #t~ite6 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite6=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=2, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L724] 2 ~y$w_buff0_used~0 := #t~ite6; [L724] 2 havoc #t~ite6; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=2, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L725] COND FALSE 2 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)) [L725] 2 #t~ite7 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite7=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=2, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L725] 2 ~y$w_buff1_used~0 := #t~ite7; [L725] 2 havoc #t~ite7; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=2, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L726] COND FALSE 2 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) [L726] 2 #t~ite8 := ~y$r_buff0_thd2~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite8=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=2, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L726] 2 ~y$r_buff0_thd2~0 := #t~ite8; [L726] 2 havoc #t~ite8; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=2, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L727] COND FALSE 2 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)) [L727] 2 #t~ite9 := ~y$r_buff1_thd2~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite9=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=2, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L727] 2 ~y$r_buff1_thd2~0 := #t~ite9; [L727] 2 havoc #t~ite9; [L730] 2 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L779] -1 havoc main_#t~nondet20; [L781] -1 ~main$tmp_guard0~0 := (if 0 == (if 3 == ~__unbuffered_cnt~0 then 1 else 0) then 0 else 1); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L783] -1 assume 0 != ~main$tmp_guard0~0 % 256; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L785] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L785] COND FALSE -1 !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256) [L785] -1 main_#t~ite21 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite21=2, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L785] -1 main_#t~ite22 := main_#t~ite21; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite21=2, main_#t~ite22=2, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L785] -1 ~y~0 := main_#t~ite22; [L785] -1 havoc main_#t~ite21; [L785] -1 havoc main_#t~ite22; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L786] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) [L786] -1 main_#t~ite23 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite23=0, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L786] -1 ~y$w_buff0_used~0 := main_#t~ite23; [L786] -1 havoc main_#t~ite23; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L787] COND FALSE -1 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)) [L787] -1 main_#t~ite24 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite24=0, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L787] -1 ~y$w_buff1_used~0 := main_#t~ite24; [L787] -1 havoc main_#t~ite24; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L788] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) [L788] -1 main_#t~ite25 := ~y$r_buff0_thd0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite25=0, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L788] -1 ~y$r_buff0_thd0~0 := main_#t~ite25; [L788] -1 havoc main_#t~ite25; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L789] COND FALSE -1 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)) [L789] -1 main_#t~ite26 := ~y$r_buff1_thd0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite26=0, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L789] -1 ~y$r_buff1_thd0~0 := main_#t~ite26; [L789] -1 havoc main_#t~ite26; [L792] -1 ~weak$$choice0~0 := (if 0 == main_#t~nondet27!base + main_#t~nondet27!offset then 0 else 1); [L792] -1 havoc main_#t~nondet27; [L793] -1 ~weak$$choice2~0 := (if 0 == main_#t~nondet28!base + main_#t~nondet28!offset then 0 else 1); [L793] -1 havoc main_#t~nondet28; [L794] -1 ~y$flush_delayed~0 := ~weak$$choice2~0; [L795] -1 ~y$mem_tmp~0 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L796] COND TRUE -1 (0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd0~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd0~0 % 256 && 0 == ~y$r_buff1_thd0~0 % 256) [L796] -1 main_#t~ite30 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite30=2, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L796] -1 ~y~0 := main_#t~ite30; [L796] -1 havoc main_#t~ite29; [L796] -1 havoc main_#t~ite30; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L797] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L797] -1 main_#t~ite33 := ~y$w_buff0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite33=2, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L797] -1 ~y$w_buff0~0 := main_#t~ite33; [L797] -1 havoc main_#t~ite33; [L797] -1 havoc main_#t~ite32; [L797] -1 havoc main_#t~ite31; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L798] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L798] -1 main_#t~ite36 := ~y$w_buff1~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite36=0, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L798] -1 ~y$w_buff1~0 := main_#t~ite36; [L798] -1 havoc main_#t~ite36; [L798] -1 havoc main_#t~ite34; [L798] -1 havoc main_#t~ite35; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L799] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L799] -1 main_#t~ite39 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite39=0, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L799] -1 ~y$w_buff0_used~0 := main_#t~ite39; [L799] -1 havoc main_#t~ite37; [L799] -1 havoc main_#t~ite38; [L799] -1 havoc main_#t~ite39; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L800] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L800] -1 main_#t~ite42 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite42=0, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L800] -1 ~y$w_buff1_used~0 := main_#t~ite42; [L800] -1 havoc main_#t~ite41; [L800] -1 havoc main_#t~ite40; [L800] -1 havoc main_#t~ite42; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L801] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L801] -1 main_#t~ite45 := ~y$r_buff0_thd0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite45=0, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L801] -1 ~y$r_buff0_thd0~0 := main_#t~ite45; [L801] -1 havoc main_#t~ite44; [L801] -1 havoc main_#t~ite45; [L801] -1 havoc main_#t~ite43; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L802] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L802] -1 main_#t~ite48 := ~y$r_buff1_thd0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite48=0, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L802] -1 ~y$r_buff1_thd0~0 := main_#t~ite48; [L802] -1 havoc main_#t~ite46; [L802] -1 havoc main_#t~ite48; [L802] -1 havoc main_#t~ite47; [L803] -1 ~main$tmp_guard1~0 := (if 0 == (if !((2 == ~x~0 && 2 == ~y~0) && 2 == ~z~0) then 1 else 0) then 0 else 1); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L804] COND TRUE -1 0 != ~y$flush_delayed~0 % 256 [L804] -1 main_#t~ite49 := ~y$mem_tmp~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite49=2, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L804] -1 ~y~0 := main_#t~ite49; [L804] -1 havoc main_#t~ite49; [L805] -1 ~y$flush_delayed~0 := 0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L807] -1 __VERIFIER_assert_#in~expression := ~main$tmp_guard1~0 % 256; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L807] -1 havoc __VERIFIER_assert_~expression; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L4] -1 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=0, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L4] COND TRUE -1 0 == __VERIFIER_assert_~expression VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=0, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L4] -1 assert false; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=0, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] ----- ----- class de.uni_freiburg.informatik.ultimate.boogie.procedureinliner.backtranslation.InlinerBacktranslator [?] -1 #NULL := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0] [?] -1 #valid[0] := 0; VAL [#NULL!base=0, #NULL!offset=0] [L672] -1 ~__unbuffered_cnt~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0] [L673] -1 ~main$tmp_guard0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0] [L674] -1 ~main$tmp_guard1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [L676] -1 ~x~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [L678] -1 ~y~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0] [L679] -1 ~y$flush_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y~0=0] [L680] -1 ~y$mem_tmp~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y~0=0] [L681] -1 ~y$r_buff0_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y~0=0] [L682] -1 ~y$r_buff0_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y~0=0] [L683] -1 ~y$r_buff0_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y~0=0] [L684] -1 ~y$r_buff0_thd3~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y~0=0] [L685] -1 ~y$r_buff1_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y~0=0] [L686] -1 ~y$r_buff1_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y~0=0] [L687] -1 ~y$r_buff1_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y~0=0] [L688] -1 ~y$r_buff1_thd3~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y~0=0] [L689] -1 ~y$read_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed~0=0, ~y~0=0] [L690] -1 ~y$read_delayed_var~0 := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y~0=0] [L691] -1 ~y$w_buff0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0~0=0, ~y~0=0] [L692] -1 ~y$w_buff0_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y~0=0] [L693] -1 ~y$w_buff1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1~0=0, ~y~0=0] [L694] -1 ~y$w_buff1_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L696] -1 ~z~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L697] -1 ~weak$$choice0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L698] -1 ~weak$$choice2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 havoc main_#res; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 havoc main_#t~nondet18, main_#t~nondet19, main_#t~nondet20, main_#t~ite22, main_#t~ite21, main_#t~ite23, main_#t~ite24, main_#t~ite25, main_#t~ite26, main_#t~nondet27, main_#t~nondet28, main_#t~ite30, main_#t~ite29, main_#t~ite33, main_#t~ite32, main_#t~ite31, main_#t~ite36, main_#t~ite35, main_#t~ite34, main_#t~ite39, main_#t~ite38, main_#t~ite37, main_#t~ite42, main_#t~ite41, main_#t~ite40, main_#t~ite45, main_#t~ite44, main_#t~ite43, main_#t~ite48, main_#t~ite47, main_#t~ite46, main_#t~ite49, main_~#t2494~0, main_~#t2495~0, main_~#t2496~0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L774] FCALL -1 call main_~#t2494~0 := #Ultimate.alloc(4); VAL [#NULL!base=0, #NULL!offset=0, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L775] FCALL -1 call write~int(0, main_~#t2494~0, 4); VAL [#NULL!base=0, #NULL!offset=0, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L775] FORK -1 fork 0 P0({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L775] -1 havoc main_#t~nondet18; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L776] FCALL -1 call main_~#t2495~0 := #Ultimate.alloc(4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L777] FCALL -1 call write~int(1, main_~#t2495~0, 4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L777] FORK -1 fork 1 P1({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L777] -1 havoc main_#t~nondet19; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L778] FCALL -1 call main_~#t2496~0 := #Ultimate.alloc(4); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L779] FCALL -1 call write~int(2, main_~#t2496~0, 4); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L779] FORK -1 fork 2 P2({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L734-L762] 0 ~arg := #in~arg; [L737] 0 ~y$w_buff1~0 := ~y$w_buff0~0; [L738] 0 ~y$w_buff0~0 := 2; [L739] 0 ~y$w_buff1_used~0 := ~y$w_buff0_used~0; [L740] 0 ~y$w_buff0_used~0 := 1; [L741] 0 __VERIFIER_assert_#in~expression := (if !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$w_buff0_used~0 % 256) then 1 else 0); [L741] 0 havoc __VERIFIER_assert_~expression; [L4] 0 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L4] COND FALSE 0 !(0 == __VERIFIER_assert_~expression) VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L742] 0 ~y$r_buff1_thd0~0 := ~y$r_buff0_thd0~0; [L743] 0 ~y$r_buff1_thd1~0 := ~y$r_buff0_thd1~0; [L744] 0 ~y$r_buff1_thd2~0 := ~y$r_buff0_thd2~0; [L745] 0 ~y$r_buff1_thd3~0 := ~y$r_buff0_thd3~0; [L746] 0 ~y$r_buff0_thd3~0 := 1; [L749] 0 ~z~0 := 1; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L699-L713] 1 ~arg := #in~arg; [L702] 1 ~z~0 := 2; [L705] 1 ~x~0 := 1; [L710] 1 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=2] [L752] COND TRUE 0 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256 [L752] 0 #t~ite12 := ~y$w_buff0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite12=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=2] [L714-L733] 2 ~arg := #in~arg; [L717] 2 ~x~0 := 2; [L720] 2 ~y~0 := 1; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite12=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=2] [L752] 0 ~y~0 := #t~ite12; [L752] 0 havoc #t~ite11; [L752] 0 havoc #t~ite12; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L753] COND TRUE 0 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256 [L753] 0 #t~ite13 := 0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite13=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L753] 0 ~y$w_buff0_used~0 := #t~ite13; [L753] 0 havoc #t~ite13; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L754] COND FALSE 0 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd3~0 % 256)) [L754] 0 #t~ite14 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite14=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L754] 0 ~y$w_buff1_used~0 := #t~ite14; [L754] 0 havoc #t~ite14; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L755] COND FALSE 0 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256) [L755] 0 #t~ite15 := ~y$r_buff0_thd3~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite15=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L755] 0 ~y$r_buff0_thd3~0 := #t~ite15; [L755] 0 havoc #t~ite15; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L756] COND FALSE 0 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd3~0 % 256)) [L756] 0 #t~ite16 := ~y$r_buff1_thd3~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite16=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L756] 0 ~y$r_buff1_thd3~0 := #t~ite16; [L756] 0 havoc #t~ite16; [L759] 0 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=2, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L723] COND FALSE 2 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=2, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L723] COND FALSE 2 !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256) [L723] 2 #t~ite4 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=2, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L723] 2 #t~ite5 := #t~ite4; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite4=2, #t~ite5=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=2, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L723] 2 ~y~0 := #t~ite5; [L723] 2 havoc #t~ite5; [L723] 2 havoc #t~ite4; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=2, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L724] COND FALSE 2 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) [L724] 2 #t~ite6 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite6=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=2, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L724] 2 ~y$w_buff0_used~0 := #t~ite6; [L724] 2 havoc #t~ite6; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=2, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L725] COND FALSE 2 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)) [L725] 2 #t~ite7 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite7=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=2, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L725] 2 ~y$w_buff1_used~0 := #t~ite7; [L725] 2 havoc #t~ite7; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=2, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L726] COND FALSE 2 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) [L726] 2 #t~ite8 := ~y$r_buff0_thd2~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite8=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=2, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L726] 2 ~y$r_buff0_thd2~0 := #t~ite8; [L726] 2 havoc #t~ite8; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=2, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L727] COND FALSE 2 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)) [L727] 2 #t~ite9 := ~y$r_buff1_thd2~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite9=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=2, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L727] 2 ~y$r_buff1_thd2~0 := #t~ite9; [L727] 2 havoc #t~ite9; [L730] 2 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L779] -1 havoc main_#t~nondet20; [L781] -1 ~main$tmp_guard0~0 := (if 0 == (if 3 == ~__unbuffered_cnt~0 then 1 else 0) then 0 else 1); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L783] -1 assume 0 != ~main$tmp_guard0~0 % 256; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L785] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L785] COND FALSE -1 !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256) [L785] -1 main_#t~ite21 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite21=2, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L785] -1 main_#t~ite22 := main_#t~ite21; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite21=2, main_#t~ite22=2, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L785] -1 ~y~0 := main_#t~ite22; [L785] -1 havoc main_#t~ite21; [L785] -1 havoc main_#t~ite22; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L786] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) [L786] -1 main_#t~ite23 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite23=0, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L786] -1 ~y$w_buff0_used~0 := main_#t~ite23; [L786] -1 havoc main_#t~ite23; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L787] COND FALSE -1 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)) [L787] -1 main_#t~ite24 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite24=0, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L787] -1 ~y$w_buff1_used~0 := main_#t~ite24; [L787] -1 havoc main_#t~ite24; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L788] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) [L788] -1 main_#t~ite25 := ~y$r_buff0_thd0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite25=0, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L788] -1 ~y$r_buff0_thd0~0 := main_#t~ite25; [L788] -1 havoc main_#t~ite25; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L789] COND FALSE -1 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)) [L789] -1 main_#t~ite26 := ~y$r_buff1_thd0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite26=0, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L789] -1 ~y$r_buff1_thd0~0 := main_#t~ite26; [L789] -1 havoc main_#t~ite26; [L792] -1 ~weak$$choice0~0 := (if 0 == main_#t~nondet27!base + main_#t~nondet27!offset then 0 else 1); [L792] -1 havoc main_#t~nondet27; [L793] -1 ~weak$$choice2~0 := (if 0 == main_#t~nondet28!base + main_#t~nondet28!offset then 0 else 1); [L793] -1 havoc main_#t~nondet28; [L794] -1 ~y$flush_delayed~0 := ~weak$$choice2~0; [L795] -1 ~y$mem_tmp~0 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L796] COND TRUE -1 (0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd0~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd0~0 % 256 && 0 == ~y$r_buff1_thd0~0 % 256) [L796] -1 main_#t~ite30 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite30=2, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L796] -1 ~y~0 := main_#t~ite30; [L796] -1 havoc main_#t~ite29; [L796] -1 havoc main_#t~ite30; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L797] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L797] -1 main_#t~ite33 := ~y$w_buff0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite33=2, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L797] -1 ~y$w_buff0~0 := main_#t~ite33; [L797] -1 havoc main_#t~ite33; [L797] -1 havoc main_#t~ite32; [L797] -1 havoc main_#t~ite31; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L798] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L798] -1 main_#t~ite36 := ~y$w_buff1~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite36=0, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L798] -1 ~y$w_buff1~0 := main_#t~ite36; [L798] -1 havoc main_#t~ite36; [L798] -1 havoc main_#t~ite34; [L798] -1 havoc main_#t~ite35; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L799] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L799] -1 main_#t~ite39 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite39=0, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L799] -1 ~y$w_buff0_used~0 := main_#t~ite39; [L799] -1 havoc main_#t~ite37; [L799] -1 havoc main_#t~ite38; [L799] -1 havoc main_#t~ite39; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L800] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L800] -1 main_#t~ite42 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite42=0, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L800] -1 ~y$w_buff1_used~0 := main_#t~ite42; [L800] -1 havoc main_#t~ite41; [L800] -1 havoc main_#t~ite40; [L800] -1 havoc main_#t~ite42; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L801] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L801] -1 main_#t~ite45 := ~y$r_buff0_thd0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite45=0, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L801] -1 ~y$r_buff0_thd0~0 := main_#t~ite45; [L801] -1 havoc main_#t~ite44; [L801] -1 havoc main_#t~ite45; [L801] -1 havoc main_#t~ite43; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L802] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L802] -1 main_#t~ite48 := ~y$r_buff1_thd0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite48=0, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L802] -1 ~y$r_buff1_thd0~0 := main_#t~ite48; [L802] -1 havoc main_#t~ite46; [L802] -1 havoc main_#t~ite48; [L802] -1 havoc main_#t~ite47; [L803] -1 ~main$tmp_guard1~0 := (if 0 == (if !((2 == ~x~0 && 2 == ~y~0) && 2 == ~z~0) then 1 else 0) then 0 else 1); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L804] COND TRUE -1 0 != ~y$flush_delayed~0 % 256 [L804] -1 main_#t~ite49 := ~y$mem_tmp~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite49=2, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L804] -1 ~y~0 := main_#t~ite49; [L804] -1 havoc main_#t~ite49; [L805] -1 ~y$flush_delayed~0 := 0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L807] -1 __VERIFIER_assert_#in~expression := ~main$tmp_guard1~0 % 256; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L807] -1 havoc __VERIFIER_assert_~expression; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L4] -1 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=0, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L4] COND TRUE -1 0 == __VERIFIER_assert_~expression VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=0, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L4] -1 assert false; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=0, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 #NULL := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0] [?] -1 #valid[0] := 0; VAL [#NULL!base=0, #NULL!offset=0] [L672] -1 ~__unbuffered_cnt~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0] [L673] -1 ~main$tmp_guard0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0] [L674] -1 ~main$tmp_guard1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [L676] -1 ~x~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [L678] -1 ~y~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0] [L679] -1 ~y$flush_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y~0=0] [L680] -1 ~y$mem_tmp~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y~0=0] [L681] -1 ~y$r_buff0_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y~0=0] [L682] -1 ~y$r_buff0_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y~0=0] [L683] -1 ~y$r_buff0_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y~0=0] [L684] -1 ~y$r_buff0_thd3~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y~0=0] [L685] -1 ~y$r_buff1_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y~0=0] [L686] -1 ~y$r_buff1_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y~0=0] [L687] -1 ~y$r_buff1_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y~0=0] [L688] -1 ~y$r_buff1_thd3~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y~0=0] [L689] -1 ~y$read_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed~0=0, ~y~0=0] [L690] -1 ~y$read_delayed_var~0 := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y~0=0] [L691] -1 ~y$w_buff0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0~0=0, ~y~0=0] [L692] -1 ~y$w_buff0_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y~0=0] [L693] -1 ~y$w_buff1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1~0=0, ~y~0=0] [L694] -1 ~y$w_buff1_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L696] -1 ~z~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L697] -1 ~weak$$choice0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L698] -1 ~weak$$choice2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L774] FCALL -1 call ~#t2494~0 := #Ultimate.alloc(4); VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L775] FCALL -1 call write~int(0, ~#t2494~0, 4); VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L775] FORK -1 fork 0 P0({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L775] -1 havoc #t~nondet18; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L776] FCALL -1 call ~#t2495~0 := #Ultimate.alloc(4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L777] FCALL -1 call write~int(1, ~#t2495~0, 4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L777] FORK -1 fork 1 P1({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L777] -1 havoc #t~nondet19; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L778] FCALL -1 call ~#t2496~0 := #Ultimate.alloc(4); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L779] FCALL -1 call write~int(2, ~#t2496~0, 4); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L779] FORK -1 fork 2 P2({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L734-L762] 0 ~arg := #in~arg; [L737] 0 ~y$w_buff1~0 := ~y$w_buff0~0; [L738] 0 ~y$w_buff0~0 := 2; [L739] 0 ~y$w_buff1_used~0 := ~y$w_buff0_used~0; [L740] 0 ~y$w_buff0_used~0 := 1; [L4] 0 ~expression := #in~expression; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L4] COND FALSE 0 !(0 == ~expression) VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L742] 0 ~y$r_buff1_thd0~0 := ~y$r_buff0_thd0~0; [L743] 0 ~y$r_buff1_thd1~0 := ~y$r_buff0_thd1~0; [L744] 0 ~y$r_buff1_thd2~0 := ~y$r_buff0_thd2~0; [L745] 0 ~y$r_buff1_thd3~0 := ~y$r_buff0_thd3~0; [L746] 0 ~y$r_buff0_thd3~0 := 1; [L749] 0 ~z~0 := 1; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L699-L713] 1 ~arg := #in~arg; [L702] 1 ~z~0 := 2; [L705] 1 ~x~0 := 1; [L710] 1 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=2] [L752] COND TRUE 0 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256 [L752] 0 #t~ite12 := ~y$w_buff0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=2] [L714-L733] 2 ~arg := #in~arg; [L717] 2 ~x~0 := 2; [L720] 2 ~y~0 := 1; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=2] [L752] 0 ~y~0 := #t~ite12; [L752] 0 havoc #t~ite11; [L752] 0 havoc #t~ite12; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L753] COND TRUE 0 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256 [L753] 0 #t~ite13 := 0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L753] 0 ~y$w_buff0_used~0 := #t~ite13; [L753] 0 havoc #t~ite13; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L754] COND FALSE 0 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd3~0 % 256)) [L754] 0 #t~ite14 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L754] 0 ~y$w_buff1_used~0 := #t~ite14; [L754] 0 havoc #t~ite14; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L755] COND FALSE 0 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256) [L755] 0 #t~ite15 := ~y$r_buff0_thd3~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L755] 0 ~y$r_buff0_thd3~0 := #t~ite15; [L755] 0 havoc #t~ite15; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L756] COND FALSE 0 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd3~0 % 256)) [L756] 0 #t~ite16 := ~y$r_buff1_thd3~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L756] 0 ~y$r_buff1_thd3~0 := #t~ite16; [L756] 0 havoc #t~ite16; [L759] 0 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L723] COND FALSE 2 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L723] COND FALSE 2 !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256) [L723] 2 #t~ite4 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite4=2, ~__unbuffered_cnt~0=2, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L723] 2 #t~ite5 := #t~ite4; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite4=2, #t~ite5=2, ~__unbuffered_cnt~0=2, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L723] 2 ~y~0 := #t~ite5; [L723] 2 havoc #t~ite5; [L723] 2 havoc #t~ite4; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L724] COND FALSE 2 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) [L724] 2 #t~ite6 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite6=0, ~__unbuffered_cnt~0=2, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L724] 2 ~y$w_buff0_used~0 := #t~ite6; [L724] 2 havoc #t~ite6; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L725] COND FALSE 2 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)) [L725] 2 #t~ite7 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite7=0, ~__unbuffered_cnt~0=2, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L725] 2 ~y$w_buff1_used~0 := #t~ite7; [L725] 2 havoc #t~ite7; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L726] COND FALSE 2 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) [L726] 2 #t~ite8 := ~y$r_buff0_thd2~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite8=0, ~__unbuffered_cnt~0=2, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L726] 2 ~y$r_buff0_thd2~0 := #t~ite8; [L726] 2 havoc #t~ite8; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L727] COND FALSE 2 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)) [L727] 2 #t~ite9 := ~y$r_buff1_thd2~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite9=0, ~__unbuffered_cnt~0=2, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L727] 2 ~y$r_buff1_thd2~0 := #t~ite9; [L727] 2 havoc #t~ite9; [L730] 2 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L779] -1 havoc #t~nondet20; [L781] -1 ~main$tmp_guard0~0 := (if 0 == (if 3 == ~__unbuffered_cnt~0 then 1 else 0) then 0 else 1); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L783] -1 assume 0 != ~main$tmp_guard0~0 % 256; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L785] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L785] COND FALSE -1 !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256) [L785] -1 #t~ite21 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L785] -1 #t~ite22 := #t~ite21; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L785] -1 ~y~0 := #t~ite22; [L785] -1 havoc #t~ite21; [L785] -1 havoc #t~ite22; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L786] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) [L786] -1 #t~ite23 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L786] -1 ~y$w_buff0_used~0 := #t~ite23; [L786] -1 havoc #t~ite23; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L787] COND FALSE -1 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)) [L787] -1 #t~ite24 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L787] -1 ~y$w_buff1_used~0 := #t~ite24; [L787] -1 havoc #t~ite24; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L788] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) [L788] -1 #t~ite25 := ~y$r_buff0_thd0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L788] -1 ~y$r_buff0_thd0~0 := #t~ite25; [L788] -1 havoc #t~ite25; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L789] COND FALSE -1 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)) [L789] -1 #t~ite26 := ~y$r_buff1_thd0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L789] -1 ~y$r_buff1_thd0~0 := #t~ite26; [L789] -1 havoc #t~ite26; [L792] -1 ~weak$$choice0~0 := (if 0 == #t~nondet27!base + #t~nondet27!offset then 0 else 1); [L792] -1 havoc #t~nondet27; [L793] -1 ~weak$$choice2~0 := (if 0 == #t~nondet28!base + #t~nondet28!offset then 0 else 1); [L793] -1 havoc #t~nondet28; [L794] -1 ~y$flush_delayed~0 := ~weak$$choice2~0; [L795] -1 ~y$mem_tmp~0 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L796] COND TRUE -1 (0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd0~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd0~0 % 256 && 0 == ~y$r_buff1_thd0~0 % 256) [L796] -1 #t~ite30 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L796] -1 ~y~0 := #t~ite30; [L796] -1 havoc #t~ite29; [L796] -1 havoc #t~ite30; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L797] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L797] -1 #t~ite33 := ~y$w_buff0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L797] -1 ~y$w_buff0~0 := #t~ite33; [L797] -1 havoc #t~ite33; [L797] -1 havoc #t~ite32; [L797] -1 havoc #t~ite31; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L798] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L798] -1 #t~ite36 := ~y$w_buff1~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L798] -1 ~y$w_buff1~0 := #t~ite36; [L798] -1 havoc #t~ite36; [L798] -1 havoc #t~ite34; [L798] -1 havoc #t~ite35; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L799] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L799] -1 #t~ite39 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L799] -1 ~y$w_buff0_used~0 := #t~ite39; [L799] -1 havoc #t~ite37; [L799] -1 havoc #t~ite38; [L799] -1 havoc #t~ite39; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L800] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L800] -1 #t~ite42 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L800] -1 ~y$w_buff1_used~0 := #t~ite42; [L800] -1 havoc #t~ite41; [L800] -1 havoc #t~ite40; [L800] -1 havoc #t~ite42; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L801] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L801] -1 #t~ite45 := ~y$r_buff0_thd0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L801] -1 ~y$r_buff0_thd0~0 := #t~ite45; [L801] -1 havoc #t~ite44; [L801] -1 havoc #t~ite45; [L801] -1 havoc #t~ite43; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L802] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L802] -1 #t~ite48 := ~y$r_buff1_thd0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L802] -1 ~y$r_buff1_thd0~0 := #t~ite48; [L802] -1 havoc #t~ite46; [L802] -1 havoc #t~ite48; [L802] -1 havoc #t~ite47; [L803] -1 ~main$tmp_guard1~0 := (if 0 == (if !((2 == ~x~0 && 2 == ~y~0) && 2 == ~z~0) then 1 else 0) then 0 else 1); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L804] COND TRUE -1 0 != ~y$flush_delayed~0 % 256 [L804] -1 #t~ite49 := ~y$mem_tmp~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L804] -1 ~y~0 := #t~ite49; [L804] -1 havoc #t~ite49; [L805] -1 ~y$flush_delayed~0 := 0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L4] -1 ~expression := #in~expression; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L4] COND TRUE -1 0 == ~expression VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L4] -1 assert false; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] ----- ----- class de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.CACSL2BoogieBacktranslator [?] -1 #NULL := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0] [?] -1 #valid[0] := 0; VAL [#NULL!base=0, #NULL!offset=0] [L672] -1 ~__unbuffered_cnt~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0] [L673] -1 ~main$tmp_guard0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0] [L674] -1 ~main$tmp_guard1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [L676] -1 ~x~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [L678] -1 ~y~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0] [L679] -1 ~y$flush_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y~0=0] [L680] -1 ~y$mem_tmp~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y~0=0] [L681] -1 ~y$r_buff0_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y~0=0] [L682] -1 ~y$r_buff0_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y~0=0] [L683] -1 ~y$r_buff0_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y~0=0] [L684] -1 ~y$r_buff0_thd3~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y~0=0] [L685] -1 ~y$r_buff1_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y~0=0] [L686] -1 ~y$r_buff1_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y~0=0] [L687] -1 ~y$r_buff1_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y~0=0] [L688] -1 ~y$r_buff1_thd3~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y~0=0] [L689] -1 ~y$read_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed~0=0, ~y~0=0] [L690] -1 ~y$read_delayed_var~0 := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y~0=0] [L691] -1 ~y$w_buff0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0~0=0, ~y~0=0] [L692] -1 ~y$w_buff0_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y~0=0] [L693] -1 ~y$w_buff1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1~0=0, ~y~0=0] [L694] -1 ~y$w_buff1_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L696] -1 ~z~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L697] -1 ~weak$$choice0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L698] -1 ~weak$$choice2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L774] FCALL -1 call ~#t2494~0 := #Ultimate.alloc(4); VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L775] FCALL -1 call write~int(0, ~#t2494~0, 4); VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L775] FORK -1 fork 0 P0({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L775] -1 havoc #t~nondet18; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L776] FCALL -1 call ~#t2495~0 := #Ultimate.alloc(4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L777] FCALL -1 call write~int(1, ~#t2495~0, 4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L777] FORK -1 fork 1 P1({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L777] -1 havoc #t~nondet19; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L778] FCALL -1 call ~#t2496~0 := #Ultimate.alloc(4); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L779] FCALL -1 call write~int(2, ~#t2496~0, 4); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L779] FORK -1 fork 2 P2({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L734-L762] 0 ~arg := #in~arg; [L737] 0 ~y$w_buff1~0 := ~y$w_buff0~0; [L738] 0 ~y$w_buff0~0 := 2; [L739] 0 ~y$w_buff1_used~0 := ~y$w_buff0_used~0; [L740] 0 ~y$w_buff0_used~0 := 1; [L4] 0 ~expression := #in~expression; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L4] COND FALSE 0 !(0 == ~expression) VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L742] 0 ~y$r_buff1_thd0~0 := ~y$r_buff0_thd0~0; [L743] 0 ~y$r_buff1_thd1~0 := ~y$r_buff0_thd1~0; [L744] 0 ~y$r_buff1_thd2~0 := ~y$r_buff0_thd2~0; [L745] 0 ~y$r_buff1_thd3~0 := ~y$r_buff0_thd3~0; [L746] 0 ~y$r_buff0_thd3~0 := 1; [L749] 0 ~z~0 := 1; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L699-L713] 1 ~arg := #in~arg; [L702] 1 ~z~0 := 2; [L705] 1 ~x~0 := 1; [L710] 1 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=2] [L752] COND TRUE 0 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256 [L752] 0 #t~ite12 := ~y$w_buff0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=2] [L714-L733] 2 ~arg := #in~arg; [L717] 2 ~x~0 := 2; [L720] 2 ~y~0 := 1; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=2] [L752] 0 ~y~0 := #t~ite12; [L752] 0 havoc #t~ite11; [L752] 0 havoc #t~ite12; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L753] COND TRUE 0 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256 [L753] 0 #t~ite13 := 0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L753] 0 ~y$w_buff0_used~0 := #t~ite13; [L753] 0 havoc #t~ite13; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L754] COND FALSE 0 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd3~0 % 256)) [L754] 0 #t~ite14 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L754] 0 ~y$w_buff1_used~0 := #t~ite14; [L754] 0 havoc #t~ite14; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L755] COND FALSE 0 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256) [L755] 0 #t~ite15 := ~y$r_buff0_thd3~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L755] 0 ~y$r_buff0_thd3~0 := #t~ite15; [L755] 0 havoc #t~ite15; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L756] COND FALSE 0 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd3~0 % 256)) [L756] 0 #t~ite16 := ~y$r_buff1_thd3~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L756] 0 ~y$r_buff1_thd3~0 := #t~ite16; [L756] 0 havoc #t~ite16; [L759] 0 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L723] COND FALSE 2 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L723] COND FALSE 2 !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256) [L723] 2 #t~ite4 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite4=2, ~__unbuffered_cnt~0=2, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L723] 2 #t~ite5 := #t~ite4; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite4=2, #t~ite5=2, ~__unbuffered_cnt~0=2, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L723] 2 ~y~0 := #t~ite5; [L723] 2 havoc #t~ite5; [L723] 2 havoc #t~ite4; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L724] COND FALSE 2 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) [L724] 2 #t~ite6 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite6=0, ~__unbuffered_cnt~0=2, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L724] 2 ~y$w_buff0_used~0 := #t~ite6; [L724] 2 havoc #t~ite6; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L725] COND FALSE 2 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)) [L725] 2 #t~ite7 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite7=0, ~__unbuffered_cnt~0=2, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L725] 2 ~y$w_buff1_used~0 := #t~ite7; [L725] 2 havoc #t~ite7; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L726] COND FALSE 2 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) [L726] 2 #t~ite8 := ~y$r_buff0_thd2~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite8=0, ~__unbuffered_cnt~0=2, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L726] 2 ~y$r_buff0_thd2~0 := #t~ite8; [L726] 2 havoc #t~ite8; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L727] COND FALSE 2 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)) [L727] 2 #t~ite9 := ~y$r_buff1_thd2~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite9=0, ~__unbuffered_cnt~0=2, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L727] 2 ~y$r_buff1_thd2~0 := #t~ite9; [L727] 2 havoc #t~ite9; [L730] 2 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L779] -1 havoc #t~nondet20; [L781] -1 ~main$tmp_guard0~0 := (if 0 == (if 3 == ~__unbuffered_cnt~0 then 1 else 0) then 0 else 1); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L783] -1 assume 0 != ~main$tmp_guard0~0 % 256; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L785] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L785] COND FALSE -1 !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256) [L785] -1 #t~ite21 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L785] -1 #t~ite22 := #t~ite21; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L785] -1 ~y~0 := #t~ite22; [L785] -1 havoc #t~ite21; [L785] -1 havoc #t~ite22; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L786] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) [L786] -1 #t~ite23 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L786] -1 ~y$w_buff0_used~0 := #t~ite23; [L786] -1 havoc #t~ite23; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L787] COND FALSE -1 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)) [L787] -1 #t~ite24 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L787] -1 ~y$w_buff1_used~0 := #t~ite24; [L787] -1 havoc #t~ite24; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L788] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) [L788] -1 #t~ite25 := ~y$r_buff0_thd0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L788] -1 ~y$r_buff0_thd0~0 := #t~ite25; [L788] -1 havoc #t~ite25; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L789] COND FALSE -1 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)) [L789] -1 #t~ite26 := ~y$r_buff1_thd0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L789] -1 ~y$r_buff1_thd0~0 := #t~ite26; [L789] -1 havoc #t~ite26; [L792] -1 ~weak$$choice0~0 := (if 0 == #t~nondet27!base + #t~nondet27!offset then 0 else 1); [L792] -1 havoc #t~nondet27; [L793] -1 ~weak$$choice2~0 := (if 0 == #t~nondet28!base + #t~nondet28!offset then 0 else 1); [L793] -1 havoc #t~nondet28; [L794] -1 ~y$flush_delayed~0 := ~weak$$choice2~0; [L795] -1 ~y$mem_tmp~0 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L796] COND TRUE -1 (0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd0~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd0~0 % 256 && 0 == ~y$r_buff1_thd0~0 % 256) [L796] -1 #t~ite30 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L796] -1 ~y~0 := #t~ite30; [L796] -1 havoc #t~ite29; [L796] -1 havoc #t~ite30; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L797] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L797] -1 #t~ite33 := ~y$w_buff0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L797] -1 ~y$w_buff0~0 := #t~ite33; [L797] -1 havoc #t~ite33; [L797] -1 havoc #t~ite32; [L797] -1 havoc #t~ite31; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L798] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L798] -1 #t~ite36 := ~y$w_buff1~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L798] -1 ~y$w_buff1~0 := #t~ite36; [L798] -1 havoc #t~ite36; [L798] -1 havoc #t~ite34; [L798] -1 havoc #t~ite35; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L799] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L799] -1 #t~ite39 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L799] -1 ~y$w_buff0_used~0 := #t~ite39; [L799] -1 havoc #t~ite37; [L799] -1 havoc #t~ite38; [L799] -1 havoc #t~ite39; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L800] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L800] -1 #t~ite42 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L800] -1 ~y$w_buff1_used~0 := #t~ite42; [L800] -1 havoc #t~ite41; [L800] -1 havoc #t~ite40; [L800] -1 havoc #t~ite42; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L801] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L801] -1 #t~ite45 := ~y$r_buff0_thd0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L801] -1 ~y$r_buff0_thd0~0 := #t~ite45; [L801] -1 havoc #t~ite44; [L801] -1 havoc #t~ite45; [L801] -1 havoc #t~ite43; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L802] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L802] -1 #t~ite48 := ~y$r_buff1_thd0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L802] -1 ~y$r_buff1_thd0~0 := #t~ite48; [L802] -1 havoc #t~ite46; [L802] -1 havoc #t~ite48; [L802] -1 havoc #t~ite47; [L803] -1 ~main$tmp_guard1~0 := (if 0 == (if !((2 == ~x~0 && 2 == ~y~0) && 2 == ~z~0) then 1 else 0) then 0 else 1); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L804] COND TRUE -1 0 != ~y$flush_delayed~0 % 256 [L804] -1 #t~ite49 := ~y$mem_tmp~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L804] -1 ~y~0 := #t~ite49; [L804] -1 havoc #t~ite49; [L805] -1 ~y$flush_delayed~0 := 0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L4] -1 ~expression := #in~expression; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L4] COND TRUE -1 0 == ~expression VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L4] -1 assert false; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L672] -1 int __unbuffered_cnt = 0; VAL [__unbuffered_cnt=0] [L673] -1 _Bool main$tmp_guard0; VAL [__unbuffered_cnt=0, main$tmp_guard0=0] [L674] -1 _Bool main$tmp_guard1; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0] [L676] -1 int x = 0; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0] [L678] -1 int y = 0; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0] [L679] -1 _Bool y$flush_delayed; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0] [L680] -1 int y$mem_tmp; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0] [L681] -1 _Bool y$r_buff0_thd0; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0] [L682] -1 _Bool y$r_buff0_thd1; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0] [L683] -1 _Bool y$r_buff0_thd2; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0] [L684] -1 _Bool y$r_buff0_thd3; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0] [L685] -1 _Bool y$r_buff1_thd0; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0] [L686] -1 _Bool y$r_buff1_thd1; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0] [L687] -1 _Bool y$r_buff1_thd2; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0] [L688] -1 _Bool y$r_buff1_thd3; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0] [L689] -1 _Bool y$read_delayed; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0] [L690] -1 int *y$read_delayed_var; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}] [L691] -1 int y$w_buff0; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0] [L692] -1 _Bool y$w_buff0_used; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0] [L693] -1 int y$w_buff1; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0] [L694] -1 _Bool y$w_buff1_used; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L696] -1 int z = 0; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L697] -1 _Bool weak$$choice0; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L698] -1 _Bool weak$$choice2; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L774] -1 pthread_t t2494; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L775] FCALL, FORK -1 pthread_create(&t2494, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L776] -1 pthread_t t2495; VAL [__unbuffered_cnt=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L777] FCALL, FORK -1 pthread_create(&t2495, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L778] -1 pthread_t t2496; VAL [__unbuffered_cnt=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L779] FCALL, FORK -1 pthread_create(&t2496, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L737] 0 y$w_buff1 = y$w_buff0 [L738] 0 y$w_buff0 = 2 [L739] 0 y$w_buff1_used = y$w_buff0_used [L740] 0 y$w_buff0_used = (_Bool)1 [L4] COND FALSE 0 !(!expression) VAL [__unbuffered_cnt=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=0] [L742] 0 y$r_buff1_thd0 = y$r_buff0_thd0 [L743] 0 y$r_buff1_thd1 = y$r_buff0_thd1 [L744] 0 y$r_buff1_thd2 = y$r_buff0_thd2 [L745] 0 y$r_buff1_thd3 = y$r_buff0_thd3 [L746] 0 y$r_buff0_thd3 = (_Bool)1 [L749] 0 z = 1 VAL [__unbuffered_cnt=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L702] 1 z = 2 [L705] 1 x = 1 [L710] 1 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=1, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=2] [L752] EXPR 0 y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y) VAL [__unbuffered_cnt=1, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=2] [L717] 2 x = 2 [L720] 2 y = 1 VAL [__unbuffered_cnt=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=1, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=2] [L752] 0 y = y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y) [L753] EXPR 0 y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : y$w_buff0_used VAL [__unbuffered_cnt=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=2] [L753] 0 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : y$w_buff0_used [L754] EXPR 0 y$w_buff0_used && y$r_buff0_thd3 || y$w_buff1_used && y$r_buff1_thd3 ? (_Bool)0 : y$w_buff1_used VAL [__unbuffered_cnt=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L754] 0 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd3 || y$w_buff1_used && y$r_buff1_thd3 ? (_Bool)0 : y$w_buff1_used [L755] EXPR 0 y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : y$r_buff0_thd3 VAL [__unbuffered_cnt=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L755] 0 y$r_buff0_thd3 = y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : y$r_buff0_thd3 [L756] EXPR 0 y$w_buff0_used && y$r_buff0_thd3 || y$w_buff1_used && y$r_buff1_thd3 ? (_Bool)0 : y$r_buff1_thd3 VAL [__unbuffered_cnt=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L756] 0 y$r_buff1_thd3 = y$w_buff0_used && y$r_buff0_thd3 || y$w_buff1_used && y$r_buff1_thd3 ? (_Bool)0 : y$r_buff1_thd3 [L759] 0 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L723] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L723] EXPR 2 y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y=2, z=2] [L723] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y)=2, y$w_buff1=0, y$w_buff1_used=0, y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y=2, z=2] [L723] 2 y = y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) [L724] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L724] 2 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used [L725] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L725] 2 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used [L726] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2 VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L726] 2 y$r_buff0_thd2 = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2 [L727] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$r_buff1_thd2 VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$r_buff1_thd2=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L727] 2 y$r_buff1_thd2 = y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$r_buff1_thd2 [L730] 2 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=3, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L781] -1 main$tmp_guard0 = __unbuffered_cnt == 3 VAL [__unbuffered_cnt=3, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L785] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) VAL [__unbuffered_cnt=3, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L785] EXPR -1 y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y VAL [__unbuffered_cnt=3, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L785] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) VAL [__unbuffered_cnt=3, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L785] -1 y = y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) [L786] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used VAL [__unbuffered_cnt=3, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L786] -1 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used [L787] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$w_buff1_used VAL [__unbuffered_cnt=3, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L787] -1 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$w_buff1_used [L788] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0 VAL [__unbuffered_cnt=3, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L788] -1 y$r_buff0_thd0 = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0 [L789] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$r_buff1_thd0 VAL [__unbuffered_cnt=3, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L789] -1 y$r_buff1_thd0 = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$r_buff1_thd0 [L792] -1 weak$$choice0 = __VERIFIER_nondet_pointer() [L793] -1 weak$$choice2 = __VERIFIER_nondet_pointer() [L794] -1 y$flush_delayed = weak$$choice2 [L795] -1 y$mem_tmp = y VAL [__unbuffered_cnt=3, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L796] EXPR -1 !y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff1) VAL [__unbuffered_cnt=3, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L796] -1 y = !y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff1) [L797] EXPR -1 weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff0)) VAL [__unbuffered_cnt=3, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L797] -1 y$w_buff0 = weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff0)) [L798] EXPR -1 weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff1 : y$w_buff1)) VAL [__unbuffered_cnt=3, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L798] -1 y$w_buff1 = weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff1 : y$w_buff1)) [L799] EXPR -1 weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used)) VAL [__unbuffered_cnt=3, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L799] -1 y$w_buff0_used = weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used)) [L800] EXPR -1 weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=3, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L800] -1 y$w_buff1_used = weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L801] EXPR -1 weak$$choice2 ? y$r_buff0_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff0_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0)) VAL [__unbuffered_cnt=3, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L801] -1 y$r_buff0_thd0 = weak$$choice2 ? y$r_buff0_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff0_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0)) [L802] EXPR -1 weak$$choice2 ? y$r_buff1_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff1_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=3, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L802] -1 y$r_buff1_thd0 = weak$$choice2 ? y$r_buff1_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff1_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L803] -1 main$tmp_guard1 = !(x == 2 && y == 2 && z == 2) VAL [__unbuffered_cnt=3, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L804] EXPR -1 y$flush_delayed ? y$mem_tmp : y VAL [__unbuffered_cnt=3, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L804] -1 y = y$flush_delayed ? y$mem_tmp : y [L805] -1 y$flush_delayed = (_Bool)0 VAL [__unbuffered_cnt=3, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=2, y$flush_delayed=0, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L4] COND TRUE -1 !expression VAL [__unbuffered_cnt=3, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=2, y$flush_delayed=0, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L4] -1 __VERIFIER_error() VAL [__unbuffered_cnt=3, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=2, y$flush_delayed=0, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] ----- [2018-11-22 22:53:12,670 INFO L305 ceAbstractionStarter]: Did not count any witness invariants because Icfg is not BoogieIcfg [2018-11-22 22:53:12,671 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 22.11 10:53:12 BasicIcfg [2018-11-22 22:53:12,671 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-11-22 22:53:12,672 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2018-11-22 22:53:12,688 INFO L271 PluginConnector]: Initializing Witness Printer... [2018-11-22 22:53:12,688 INFO L276 PluginConnector]: Witness Printer initialized [2018-11-22 22:53:12,688 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 22.11 10:51:28" (3/4) ... [2018-11-22 22:53:12,690 INFO L138 WitnessPrinter]: Generating witness for reachability counterexample ----- class de.uni_freiburg.informatik.ultimate.modelcheckerutils.cfg.transformations.BlockEncodingBacktranslator [?] -1 [505] ULTIMATE.startENTRY-->L-1: Formula: (and (= |v_#NULL.offset_1| 0) (= |v_#NULL.base_1| 0)) InVars {} OutVars{#NULL.offset=|v_#NULL.offset_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] VAL [|#NULL.base|=0, |#NULL.offset|=0] [?] -1 [375] L-1-->L672: Formula: (= |v_#valid_7| (store |v_#valid_8| 0 0)) InVars {#valid=|v_#valid_8|} OutVars{#valid=|v_#valid_7|} AuxVars[] AssignedVars[#valid] VAL [|#NULL.base|=0, |#NULL.offset|=0] [?] -1 [478] L672-->L673: Formula: (= v_~__unbuffered_cnt~0_7 0) InVars {} OutVars{~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_7} AuxVars[] AssignedVars[~__unbuffered_cnt~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0] [?] -1 [395] L673-->L674: Formula: (= v_~main$tmp_guard0~0_1 0) InVars {} OutVars{~main$tmp_guard0~0=v_~main$tmp_guard0~0_1} AuxVars[] AssignedVars[~main$tmp_guard0~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0] [?] -1 [523] L674-->L676: Formula: (= v_~main$tmp_guard1~0_3 0) InVars {} OutVars{~main$tmp_guard1~0=v_~main$tmp_guard1~0_3} AuxVars[] AssignedVars[~main$tmp_guard1~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [?] -1 [361] L676-->L678: Formula: (= v_~x~0_4 0) InVars {} OutVars{~x~0=v_~x~0_4} AuxVars[] AssignedVars[~x~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [?] -1 [441] L678-->L679: Formula: (= v_~y~0_9 0) InVars {} OutVars{~y~0=v_~y~0_9} AuxVars[] AssignedVars[~y~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0] [?] -1 [545] L679-->L680: Formula: (= v_~y$flush_delayed~0_4 0) InVars {} OutVars{~y$flush_delayed~0=v_~y$flush_delayed~0_4} AuxVars[] AssignedVars[~y$flush_delayed~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y~0=0] [?] -1 [480] L680-->L681: Formula: (= v_~y$mem_tmp~0_2 0) InVars {} OutVars{~y$mem_tmp~0=v_~y$mem_tmp~0_2} AuxVars[] AssignedVars[~y$mem_tmp~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y~0=0] [?] -1 [399] L681-->L682: Formula: (= v_~y$r_buff0_thd0~0_19 0) InVars {} OutVars{~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_19} AuxVars[] AssignedVars[~y$r_buff0_thd0~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y~0=0] [?] -1 [536] L682-->L683: Formula: (= v_~y$r_buff0_thd1~0_2 0) InVars {} OutVars{~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_2} AuxVars[] AssignedVars[~y$r_buff0_thd1~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y~0=0] [?] -1 [476] L683-->L684: Formula: (= v_~y$r_buff0_thd2~0_13 0) InVars {} OutVars{~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_13} AuxVars[] AssignedVars[~y$r_buff0_thd2~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y~0=0] [?] -1 [394] L684-->L685: Formula: (= v_~y$r_buff0_thd3~0_14 0) InVars {} OutVars{~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_14} AuxVars[] AssignedVars[~y$r_buff0_thd3~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y~0=0] [?] -1 [522] L685-->L686: Formula: (= v_~y$r_buff1_thd0~0_11 0) InVars {} OutVars{~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_11} AuxVars[] AssignedVars[~y$r_buff1_thd0~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y~0=0] [?] -1 [447] L686-->L687: Formula: (= v_~y$r_buff1_thd1~0_2 0) InVars {} OutVars{~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_2} AuxVars[] AssignedVars[~y$r_buff1_thd1~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y~0=0] [?] -1 [387] L687-->L688: Formula: (= v_~y$r_buff1_thd2~0_9 0) InVars {} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_9} AuxVars[] AssignedVars[~y$r_buff1_thd2~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y~0=0] [?] -1 [515] L688-->L689: Formula: (= v_~y$r_buff1_thd3~0_9 0) InVars {} OutVars{~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_9} AuxVars[] AssignedVars[~y$r_buff1_thd3~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y~0=0] [?] -1 [439] L689-->L690: Formula: (= v_~y$read_delayed~0_1 0) InVars {} OutVars{~y$read_delayed~0=v_~y$read_delayed~0_1} AuxVars[] AssignedVars[~y$read_delayed~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed~0=0, ~y~0=0] [?] -1 [544] L690-->L691: Formula: (and (= v_~y$read_delayed_var~0.offset_1 0) (= v_~y$read_delayed_var~0.base_1 0)) InVars {} OutVars{~y$read_delayed_var~0.base=v_~y$read_delayed_var~0.base_1, ~y$read_delayed_var~0.offset=v_~y$read_delayed_var~0.offset_1} AuxVars[] AssignedVars[~y$read_delayed_var~0.offset, ~y$read_delayed_var~0.base] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y~0=0] [?] -1 [479] L691-->L692: Formula: (= v_~y$w_buff0~0_5 0) InVars {} OutVars{~y$w_buff0~0=v_~y$w_buff0~0_5} AuxVars[] AssignedVars[~y$w_buff0~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0~0=0, ~y~0=0] [?] -1 [398] L692-->L693: Formula: (= v_~y$w_buff0_used~0_41 0) InVars {} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_41} AuxVars[] AssignedVars[~y$w_buff0_used~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y~0=0] [?] -1 [534] L693-->L694: Formula: (= v_~y$w_buff1~0_4 0) InVars {} OutVars{~y$w_buff1~0=v_~y$w_buff1~0_4} AuxVars[] AssignedVars[~y$w_buff1~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [475] L694-->L696: Formula: (= v_~y$w_buff1_used~0_25 0) InVars {} OutVars{~y$w_buff1_used~0=v_~y$w_buff1_used~0_25} AuxVars[] AssignedVars[~y$w_buff1_used~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 [521] L696-->L697: Formula: (= v_~z~0_4 0) InVars {} OutVars{~z~0=v_~z~0_4} AuxVars[] AssignedVars[~z~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 [446] L697-->L698: Formula: (= v_~weak$$choice0~0_1 0) InVars {} OutVars{~weak$$choice0~0=v_~weak$$choice0~0_1} AuxVars[] AssignedVars[~weak$$choice0~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 [386] L698-->L-1-1: Formula: (= v_~weak$$choice2~0_7 0) InVars {} OutVars{~weak$$choice2~0=v_~weak$$choice2~0_7} AuxVars[] AssignedVars[~weak$$choice2~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 [535] L-1-1-->L-1-2: Formula: true InVars {} OutVars{ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_#res] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 [532] L-1-2-->L774: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~nondet27.offset=|v_ULTIMATE.start_main_#t~nondet27.offset_1|, ULTIMATE.start_main_~#t2495~0.offset=|v_ULTIMATE.start_main_~#t2495~0.offset_3|, ULTIMATE.start_main_#t~ite29=|v_ULTIMATE.start_main_#t~ite29_1|, ULTIMATE.start_main_#t~ite24=|v_ULTIMATE.start_main_#t~ite24_1|, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_5|, ULTIMATE.start_main_#t~ite25=|v_ULTIMATE.start_main_#t~ite25_1|, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_5|, ULTIMATE.start_main_#t~ite26=|v_ULTIMATE.start_main_#t~ite26_1|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_5|, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_5|, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_5|, ULTIMATE.start_main_#t~ite21=|v_ULTIMATE.start_main_#t~ite21_1|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_5|, ULTIMATE.start_main_~#t2496~0.base=|v_ULTIMATE.start_main_~#t2496~0.base_3|, ULTIMATE.start_main_#t~ite22=|v_ULTIMATE.start_main_#t~ite22_1|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_5|, ULTIMATE.start_main_#t~ite23=|v_ULTIMATE.start_main_#t~ite23_1|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_5|, ULTIMATE.start_main_~#t2494~0.base=|v_ULTIMATE.start_main_~#t2494~0.base_3|, ULTIMATE.start_main_#t~nondet28.base=|v_ULTIMATE.start_main_#t~nondet28.base_1|, ULTIMATE.start_main_#t~ite30=|v_ULTIMATE.start_main_#t~ite30_1|, ULTIMATE.start_main_#t~nondet27.base=|v_ULTIMATE.start_main_#t~nondet27.base_1|, ULTIMATE.start_main_#t~nondet28.offset=|v_ULTIMATE.start_main_#t~nondet28.offset_1|, ULTIMATE.start_main_~#t2494~0.offset=|v_ULTIMATE.start_main_~#t2494~0.offset_3|, ULTIMATE.start_main_#t~nondet20=|v_ULTIMATE.start_main_#t~nondet20_1|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_4|, ULTIMATE.start_main_#t~ite35=|v_ULTIMATE.start_main_#t~ite35_1|, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_1|, ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_4|, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_5|, ULTIMATE.start_main_#t~ite31=|v_ULTIMATE.start_main_#t~ite31_1|, ULTIMATE.start_main_#t~ite32=|v_ULTIMATE.start_main_#t~ite32_1|, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_1|, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_1|, ULTIMATE.start_main_~#t2496~0.offset=|v_ULTIMATE.start_main_~#t2496~0.offset_3|, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_5|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_5|, ULTIMATE.start_main_~#t2495~0.base=|v_ULTIMATE.start_main_~#t2495~0.base_3|, ULTIMATE.start_main_#t~nondet18=|v_ULTIMATE.start_main_#t~nondet18_1|, ULTIMATE.start_main_#t~nondet19=|v_ULTIMATE.start_main_#t~nondet19_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet27.offset, ULTIMATE.start_main_~#t2495~0.offset, ULTIMATE.start_main_#t~ite29, ULTIMATE.start_main_#t~ite24, ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite25, ULTIMATE.start_main_#t~ite46, ULTIMATE.start_main_#t~ite26, ULTIMATE.start_main_#t~ite49, ULTIMATE.start_main_#t~ite48, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite21, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_~#t2496~0.base, ULTIMATE.start_main_#t~ite22, ULTIMATE.start_main_#t~ite45, ULTIMATE.start_main_#t~ite23, ULTIMATE.start_main_#t~ite44, ULTIMATE.start_main_~#t2494~0.base, ULTIMATE.start_main_#t~nondet28.base, ULTIMATE.start_main_#t~ite30, ULTIMATE.start_main_#t~nondet27.base, ULTIMATE.start_main_#t~nondet28.offset, ULTIMATE.start_main_~#t2494~0.offset, ULTIMATE.start_main_#t~nondet20, ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~ite35, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite38, ULTIMATE.start_main_#t~ite37, ULTIMATE.start_main_#t~ite31, ULTIMATE.start_main_#t~ite32, ULTIMATE.start_main_#t~ite33, ULTIMATE.start_main_#t~ite34, ULTIMATE.start_main_~#t2496~0.offset, ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#t~ite40, ULTIMATE.start_main_~#t2495~0.base, ULTIMATE.start_main_#t~nondet18, ULTIMATE.start_main_#t~nondet19] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 [464] L774-->L774-1: Formula: (and (= |v_#length_1| (store |v_#length_2| |v_ULTIMATE.start_main_~#t2494~0.base_4| 4)) (= (store |v_#valid_10| |v_ULTIMATE.start_main_~#t2494~0.base_4| 1) |v_#valid_9|) (= 0 |v_ULTIMATE.start_main_~#t2494~0.offset_4|) (not (= |v_ULTIMATE.start_main_~#t2494~0.base_4| 0)) (= 0 (select |v_#valid_10| |v_ULTIMATE.start_main_~#t2494~0.base_4|))) InVars {#length=|v_#length_2|, #valid=|v_#valid_10|} OutVars{ULTIMATE.start_main_~#t2494~0.base=|v_ULTIMATE.start_main_~#t2494~0.base_4|, #length=|v_#length_1|, ULTIMATE.start_main_~#t2494~0.offset=|v_ULTIMATE.start_main_~#t2494~0.offset_4|, #valid=|v_#valid_9|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t2494~0.base, #valid, #length, ULTIMATE.start_main_~#t2494~0.offset] VAL [|#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 [466] L774-1-->L775: Formula: (= |v_#memory_int_1| (store |v_#memory_int_2| |v_ULTIMATE.start_main_~#t2494~0.base_5| (store (select |v_#memory_int_2| |v_ULTIMATE.start_main_~#t2494~0.base_5|) |v_ULTIMATE.start_main_~#t2494~0.offset_5| 0))) InVars {ULTIMATE.start_main_~#t2494~0.base=|v_ULTIMATE.start_main_~#t2494~0.base_5|, #memory_int=|v_#memory_int_2|, ULTIMATE.start_main_~#t2494~0.offset=|v_ULTIMATE.start_main_~#t2494~0.offset_5|} OutVars{ULTIMATE.start_main_~#t2494~0.base=|v_ULTIMATE.start_main_~#t2494~0.base_5|, #memory_int=|v_#memory_int_1|, ULTIMATE.start_main_~#t2494~0.offset=|v_ULTIMATE.start_main_~#t2494~0.offset_5|} AuxVars[] AssignedVars[#memory_int] VAL [|#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] FORK -1 [606] L775-->P0ENTRY: Formula: (and (= 0 |v_Thread1_P0_#in~arg.base_3|) (= 0 v_Thread1_P0_thidvar0_2) (= 0 |v_Thread1_P0_#in~arg.offset_3|)) InVars {} OutVars{Thread1_P0_#in~arg.base=|v_Thread1_P0_#in~arg.base_3|, Thread1_P0_#in~arg.offset=|v_Thread1_P0_#in~arg.offset_3|, Thread1_P0_thidvar0=v_Thread1_P0_thidvar0_2} AuxVars[] AssignedVars[Thread1_P0_#in~arg.base, Thread1_P0_#in~arg.offset, Thread1_P0_thidvar0] VAL [Thread1_P0_thidvar0=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 [382] L775-1-->L776: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~nondet18=|v_ULTIMATE.start_main_#t~nondet18_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet18] VAL [Thread1_P0_thidvar0=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 [509] L776-->L776-1: Formula: (and (= 0 |v_ULTIMATE.start_main_~#t2495~0.offset_4|) (not (= |v_ULTIMATE.start_main_~#t2495~0.base_4| 0)) (= |v_#valid_11| (store |v_#valid_12| |v_ULTIMATE.start_main_~#t2495~0.base_4| 1)) (= (select |v_#valid_12| |v_ULTIMATE.start_main_~#t2495~0.base_4|) 0) (= (store |v_#length_4| |v_ULTIMATE.start_main_~#t2495~0.base_4| 4) |v_#length_3|)) InVars {#length=|v_#length_4|, #valid=|v_#valid_12|} OutVars{ULTIMATE.start_main_~#t2495~0.offset=|v_ULTIMATE.start_main_~#t2495~0.offset_4|, ULTIMATE.start_main_~#t2495~0.base=|v_ULTIMATE.start_main_~#t2495~0.base_4|, #length=|v_#length_3|, #valid=|v_#valid_11|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t2495~0.offset, #valid, ULTIMATE.start_main_~#t2495~0.base, #length] VAL [Thread1_P0_thidvar0=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 [510] L776-1-->L777: Formula: (= |v_#memory_int_3| (store |v_#memory_int_4| |v_ULTIMATE.start_main_~#t2495~0.base_5| (store (select |v_#memory_int_4| |v_ULTIMATE.start_main_~#t2495~0.base_5|) |v_ULTIMATE.start_main_~#t2495~0.offset_5| 1))) InVars {#memory_int=|v_#memory_int_4|, ULTIMATE.start_main_~#t2495~0.offset=|v_ULTIMATE.start_main_~#t2495~0.offset_5|, ULTIMATE.start_main_~#t2495~0.base=|v_ULTIMATE.start_main_~#t2495~0.base_5|} OutVars{#memory_int=|v_#memory_int_3|, ULTIMATE.start_main_~#t2495~0.offset=|v_ULTIMATE.start_main_~#t2495~0.offset_5|, ULTIMATE.start_main_~#t2495~0.base=|v_ULTIMATE.start_main_~#t2495~0.base_5|} AuxVars[] AssignedVars[#memory_int] VAL [Thread1_P0_thidvar0=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] FORK -1 [607] L777-->P1ENTRY: Formula: (and (= |v_Thread2_P1_#in~arg.base_3| 0) (= v_Thread2_P1_thidvar0_2 1) (= 0 |v_Thread2_P1_#in~arg.offset_3|)) InVars {} OutVars{Thread2_P1_#in~arg.base=|v_Thread2_P1_#in~arg.base_3|, Thread2_P1_thidvar0=v_Thread2_P1_thidvar0_2, Thread2_P1_#in~arg.offset=|v_Thread2_P1_#in~arg.offset_3|} AuxVars[] AssignedVars[Thread2_P1_#in~arg.base, Thread2_P1_thidvar0, Thread2_P1_#in~arg.offset] VAL [Thread1_P0_thidvar0=0, Thread2_P1_thidvar0=1, |#NULL.base|=0, |#NULL.offset|=0, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 [434] L777-1-->L778: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~nondet19=|v_ULTIMATE.start_main_#t~nondet19_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet19] VAL [Thread1_P0_thidvar0=0, Thread2_P1_thidvar0=1, |#NULL.base|=0, |#NULL.offset|=0, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 [374] L778-->L778-1: Formula: (and (= 0 |v_ULTIMATE.start_main_~#t2496~0.offset_4|) (= |v_#length_5| (store |v_#length_6| |v_ULTIMATE.start_main_~#t2496~0.base_4| 4)) (= (store |v_#valid_14| |v_ULTIMATE.start_main_~#t2496~0.base_4| 1) |v_#valid_13|) (not (= |v_ULTIMATE.start_main_~#t2496~0.base_4| 0)) (= 0 (select |v_#valid_14| |v_ULTIMATE.start_main_~#t2496~0.base_4|))) InVars {#length=|v_#length_6|, #valid=|v_#valid_14|} OutVars{ULTIMATE.start_main_~#t2496~0.offset=|v_ULTIMATE.start_main_~#t2496~0.offset_4|, #length=|v_#length_5|, ULTIMATE.start_main_~#t2496~0.base=|v_ULTIMATE.start_main_~#t2496~0.base_4|, #valid=|v_#valid_13|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t2496~0.offset, #valid, #length, ULTIMATE.start_main_~#t2496~0.base] VAL [Thread1_P0_thidvar0=0, Thread2_P1_thidvar0=1, |#NULL.base|=0, |#NULL.offset|=0, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 [537] L778-1-->L779: Formula: (= (store |v_#memory_int_6| |v_ULTIMATE.start_main_~#t2496~0.base_5| (store (select |v_#memory_int_6| |v_ULTIMATE.start_main_~#t2496~0.base_5|) |v_ULTIMATE.start_main_~#t2496~0.offset_5| 2)) |v_#memory_int_5|) InVars {ULTIMATE.start_main_~#t2496~0.offset=|v_ULTIMATE.start_main_~#t2496~0.offset_5|, #memory_int=|v_#memory_int_6|, ULTIMATE.start_main_~#t2496~0.base=|v_ULTIMATE.start_main_~#t2496~0.base_5|} OutVars{ULTIMATE.start_main_~#t2496~0.offset=|v_ULTIMATE.start_main_~#t2496~0.offset_5|, #memory_int=|v_#memory_int_5|, ULTIMATE.start_main_~#t2496~0.base=|v_ULTIMATE.start_main_~#t2496~0.base_5|} AuxVars[] AssignedVars[#memory_int] VAL [Thread1_P0_thidvar0=0, Thread2_P1_thidvar0=1, |#NULL.base|=0, |#NULL.offset|=0, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] FORK -1 [605] L779-->P2ENTRY: Formula: (and (= |v_Thread0_P2_#in~arg.offset_3| 0) (= 0 |v_Thread0_P2_#in~arg.base_3|) (= 2 v_Thread0_P2_thidvar0_2)) InVars {} OutVars{Thread0_P2_#in~arg.base=|v_Thread0_P2_#in~arg.base_3|, Thread0_P2_thidvar0=v_Thread0_P2_thidvar0_2, Thread0_P2_#in~arg.offset=|v_Thread0_P2_#in~arg.offset_3|} AuxVars[] AssignedVars[Thread0_P2_#in~arg.base, Thread0_P2_thidvar0, Thread0_P2_#in~arg.offset] VAL [Thread0_P2_thidvar0=2, Thread1_P0_thidvar0=0, Thread2_P1_thidvar0=1, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] 0 [578] P2ENTRY-->L4: Formula: (and (= v_~y$w_buff1_used~0_15 v_~y$w_buff0_used~0_24) (= v_Thread0_P2_~arg.offset_1 |v_Thread0_P2_#in~arg.offset_1|) (= v_~y$w_buff1~0_3 v_~y$w_buff0~0_4) (= v_Thread0_P2___VERIFIER_assert_~expression_1 |v_Thread0_P2___VERIFIER_assert_#in~expression_1|) (= |v_Thread0_P2___VERIFIER_assert_#in~expression_1| (ite (not (and (not (= 0 (mod v_~y$w_buff0_used~0_23 256))) (not (= (mod v_~y$w_buff1_used~0_15 256) 0)))) 1 0)) (= v_Thread0_P2_~arg.base_1 |v_Thread0_P2_#in~arg.base_1|) (= v_~y$w_buff0~0_3 2) (= v_~y$w_buff0_used~0_23 1)) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_24, Thread0_P2_#in~arg.offset=|v_Thread0_P2_#in~arg.offset_1|, Thread0_P2_#in~arg.base=|v_Thread0_P2_#in~arg.base_1|, ~y$w_buff0~0=v_~y$w_buff0~0_4} OutVars{Thread0_P2_~arg.offset=v_Thread0_P2_~arg.offset_1, Thread0_P2_~arg.base=v_Thread0_P2_~arg.base_1, Thread0_P2___VERIFIER_assert_~expression=v_Thread0_P2___VERIFIER_assert_~expression_1, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_23, ~y$w_buff1~0=v_~y$w_buff1~0_3, Thread0_P2___VERIFIER_assert_#in~expression=|v_Thread0_P2___VERIFIER_assert_#in~expression_1|, ~y$w_buff0~0=v_~y$w_buff0~0_3, Thread0_P2_#in~arg.base=|v_Thread0_P2_#in~arg.base_1|, Thread0_P2_#in~arg.offset=|v_Thread0_P2_#in~arg.offset_1|, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_15} AuxVars[] AssignedVars[Thread0_P2_~arg.offset, Thread0_P2_~arg.base, Thread0_P2___VERIFIER_assert_~expression, ~y$w_buff0_used~0, ~y$w_buff1~0, Thread0_P2___VERIFIER_assert_#in~expression, ~y$w_buff0~0, ~y$w_buff1_used~0] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread2_P1_thidvar0=1, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] 0 [580] L4-->L4-3: Formula: (not (= 0 v_Thread0_P2___VERIFIER_assert_~expression_3)) InVars {Thread0_P2___VERIFIER_assert_~expression=v_Thread0_P2___VERIFIER_assert_~expression_3} OutVars{Thread0_P2___VERIFIER_assert_~expression=v_Thread0_P2___VERIFIER_assert_~expression_3} AuxVars[] AssignedVars[] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread2_P1_thidvar0=1, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] 0 [583] L4-3-->L752: Formula: (and (= v_~y$r_buff0_thd3~0_12 1) (= v_~z~0_2 1) (= v_~y$r_buff1_thd2~0_8 v_~y$r_buff0_thd2~0_12) (= v_~y$r_buff1_thd1~0_1 v_~y$r_buff0_thd1~0_1) (= v_~y$r_buff1_thd0~0_1 v_~y$r_buff0_thd0~0_1) (= v_~y$r_buff1_thd3~0_8 v_~y$r_buff0_thd3~0_13)) InVars {~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_13, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_1, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_12, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_1} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_8, ~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_1, ~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_8, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_12, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_1, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_12, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_1, ~z~0=v_~z~0_2, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_1} AuxVars[] AssignedVars[~y$r_buff1_thd2~0, ~y$r_buff1_thd1~0, ~y$r_buff1_thd3~0, ~y$r_buff0_thd3~0, ~z~0, ~y$r_buff1_thd0~0] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread2_P1_thidvar0=1, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 1 [552] P0ENTRY-->L712: Formula: (and (= v_Thread1_P0_~arg.base_1 |v_Thread1_P0_#in~arg.base_1|) (= v_Thread1_P0_~arg.offset_1 |v_Thread1_P0_#in~arg.offset_1|) (= v_~__unbuffered_cnt~0_1 (+ v_~__unbuffered_cnt~0_2 1)) (= v_~z~0_1 2) (= v_~x~0_1 1)) InVars {Thread1_P0_#in~arg.offset=|v_Thread1_P0_#in~arg.offset_1|, Thread1_P0_#in~arg.base=|v_Thread1_P0_#in~arg.base_1|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_2} OutVars{Thread1_P0_#in~arg.base=|v_Thread1_P0_#in~arg.base_1|, Thread1_P0_~arg.offset=v_Thread1_P0_~arg.offset_1, Thread1_P0_~arg.base=v_Thread1_P0_~arg.base_1, Thread1_P0_#in~arg.offset=|v_Thread1_P0_#in~arg.offset_1|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_1, ~z~0=v_~z~0_1, ~x~0=v_~x~0_1} AuxVars[] AssignedVars[Thread1_P0_~arg.offset, Thread1_P0_~arg.base, ~__unbuffered_cnt~0, ~z~0, ~x~0] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=2] [?] 0 [584] L752-->L752-5: Formula: (and (not (= 0 (mod v_~y$r_buff0_thd3~0_1 256))) (not (= 0 (mod v_~y$w_buff0_used~0_12 256))) (= |v_Thread0_P2_#t~ite12_1| v_~y$w_buff0~0_2)) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_12, ~y$w_buff0~0=v_~y$w_buff0~0_2, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_1} OutVars{Thread0_P2_#t~ite12=|v_Thread0_P2_#t~ite12_1|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_12, ~y$w_buff0~0=v_~y$w_buff0~0_2, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_1} AuxVars[] AssignedVars[Thread0_P2_#t~ite12] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2_#t~ite12|=2, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=2] [?] 2 [556] P1ENTRY-->L723: Formula: (and (= v_Thread2_P1_~arg.offset_1 |v_Thread2_P1_#in~arg.offset_1|) (= v_Thread2_P1_~arg.base_1 |v_Thread2_P1_#in~arg.base_1|) (= v_~x~0_2 2) (= v_~y~0_1 1)) InVars {Thread2_P1_#in~arg.base=|v_Thread2_P1_#in~arg.base_1|, Thread2_P1_#in~arg.offset=|v_Thread2_P1_#in~arg.offset_1|} OutVars{Thread2_P1_#in~arg.base=|v_Thread2_P1_#in~arg.base_1|, Thread2_P1_~arg.offset=v_Thread2_P1_~arg.offset_1, Thread2_P1_~arg.base=v_Thread2_P1_~arg.base_1, ~y~0=v_~y~0_1, ~x~0=v_~x~0_2, Thread2_P1_#in~arg.offset=|v_Thread2_P1_#in~arg.offset_1|} AuxVars[] AssignedVars[Thread2_P1_~arg.offset, Thread2_P1_~arg.base, ~y~0, ~x~0] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2_#t~ite12|=2, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=2] [?] 0 [586] L752-5-->L753: Formula: (= v_~y~0_5 |v_Thread0_P2_#t~ite12_2|) InVars {Thread0_P2_#t~ite12=|v_Thread0_P2_#t~ite12_2|} OutVars{Thread0_P2_#t~ite11=|v_Thread0_P2_#t~ite11_1|, Thread0_P2_#t~ite12=|v_Thread0_P2_#t~ite12_3|, ~y~0=v_~y~0_5} AuxVars[] AssignedVars[Thread0_P2_#t~ite11, Thread0_P2_#t~ite12, ~y~0] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] 0 [589] L753-->L753-2: Formula: (and (not (= (mod v_~y$w_buff0_used~0_14 256) 0)) (not (= (mod v_~y$r_buff0_thd3~0_3 256) 0)) (= |v_Thread0_P2_#t~ite13_1| 0)) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_14, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_3} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_14, Thread0_P2_#t~ite13=|v_Thread0_P2_#t~ite13_1|, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_3} AuxVars[] AssignedVars[Thread0_P2_#t~ite13] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2_#t~ite13|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] 0 [592] L753-2-->L754: Formula: (= v_~y$w_buff0_used~0_16 |v_Thread0_P2_#t~ite13_3|) InVars {Thread0_P2_#t~ite13=|v_Thread0_P2_#t~ite13_3|} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_16, Thread0_P2_#t~ite13=|v_Thread0_P2_#t~ite13_4|} AuxVars[] AssignedVars[~y$w_buff0_used~0, Thread0_P2_#t~ite13] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] 0 [594] L754-->L754-2: Formula: (and (or (= (mod v_~y$r_buff0_thd3~0_6 256) 0) (= (mod v_~y$w_buff0_used~0_18 256) 0)) (= |v_Thread0_P2_#t~ite14_2| v_~y$w_buff1_used~0_11) (or (= (mod v_~y$r_buff1_thd3~0_4 256) 0) (= 0 (mod v_~y$w_buff1_used~0_11 256)))) InVars {~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_4, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_18, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_6, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_11} OutVars{~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_4, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_18, Thread0_P2_#t~ite14=|v_Thread0_P2_#t~ite14_2|, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_6, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_11} AuxVars[] AssignedVars[Thread0_P2_#t~ite14] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2_#t~ite14|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] 0 [595] L754-2-->L755: Formula: (= v_~y$w_buff1_used~0_12 |v_Thread0_P2_#t~ite14_3|) InVars {Thread0_P2_#t~ite14=|v_Thread0_P2_#t~ite14_3|} OutVars{Thread0_P2_#t~ite14=|v_Thread0_P2_#t~ite14_4|, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_12} AuxVars[] AssignedVars[Thread0_P2_#t~ite14, ~y$w_buff1_used~0] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] 0 [597] L755-->L755-2: Formula: (and (or (= (mod v_~y$w_buff0_used~0_20 256) 0) (= (mod v_~y$r_buff0_thd3~0_8 256) 0)) (= |v_Thread0_P2_#t~ite15_2| v_~y$r_buff0_thd3~0_8)) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_20, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_8} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_20, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_8, Thread0_P2_#t~ite15=|v_Thread0_P2_#t~ite15_2|} AuxVars[] AssignedVars[Thread0_P2_#t~ite15] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2_#t~ite15|=1, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] 0 [598] L755-2-->L756: Formula: (= v_~y$r_buff0_thd3~0_9 |v_Thread0_P2_#t~ite15_3|) InVars {Thread0_P2_#t~ite15=|v_Thread0_P2_#t~ite15_3|} OutVars{~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_9, Thread0_P2_#t~ite15=|v_Thread0_P2_#t~ite15_4|} AuxVars[] AssignedVars[~y$r_buff0_thd3~0, Thread0_P2_#t~ite15] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] 0 [600] L756-->L756-2: Formula: (and (or (= 0 (mod v_~y$r_buff1_thd3~0_6 256)) (= 0 (mod v_~y$w_buff1_used~0_14 256))) (or (= (mod v_~y$r_buff0_thd3~0_11 256) 0) (= 0 (mod v_~y$w_buff0_used~0_22 256))) (= |v_Thread0_P2_#t~ite16_2| v_~y$r_buff1_thd3~0_6)) InVars {~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_6, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_22, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_11, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_14} OutVars{~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_6, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_22, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_11, Thread0_P2_#t~ite16=|v_Thread0_P2_#t~ite16_2|, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_14} AuxVars[] AssignedVars[Thread0_P2_#t~ite16] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2_#t~ite16|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] 0 [601] L756-2-->L761: Formula: (and (= v_~__unbuffered_cnt~0_5 (+ v_~__unbuffered_cnt~0_6 1)) (= v_~y$r_buff1_thd3~0_7 |v_Thread0_P2_#t~ite16_3|)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_6, Thread0_P2_#t~ite16=|v_Thread0_P2_#t~ite16_3|} OutVars{~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_5, ~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_7, Thread0_P2_#t~ite16=|v_Thread0_P2_#t~ite16_4|} AuxVars[] AssignedVars[~y$r_buff1_thd3~0, ~__unbuffered_cnt~0, Thread0_P2_#t~ite16] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=2, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] 2 [558] L723-->L723-2: Formula: (or (= (mod v_~y$w_buff0_used~0_4 256) 0) (= 0 (mod v_~y$r_buff0_thd2~0_5 256))) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_4, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_5} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_4, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_5} AuxVars[] AssignedVars[] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=2, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] 2 [561] L723-2-->L723-4: Formula: (and (= |v_Thread2_P1_#t~ite4_3| v_~y~0_2) (or (= (mod v_~y$r_buff1_thd2~0_4 256) 0) (= (mod v_~y$w_buff1_used~0_5 256) 0))) InVars {~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_4, ~y~0=v_~y~0_2, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_5} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_4, ~y~0=v_~y~0_2, Thread2_P1_#t~ite4=|v_Thread2_P1_#t~ite4_3|, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_5} AuxVars[] AssignedVars[Thread2_P1_#t~ite4] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |Thread2_P1_#t~ite4|=2, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=2, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] 2 [564] L723-4-->L723-5: Formula: (= |v_Thread2_P1_#t~ite5_4| |v_Thread2_P1_#t~ite4_4|) InVars {Thread2_P1_#t~ite4=|v_Thread2_P1_#t~ite4_4|} OutVars{Thread2_P1_#t~ite4=|v_Thread2_P1_#t~ite4_4|, Thread2_P1_#t~ite5=|v_Thread2_P1_#t~ite5_4|} AuxVars[] AssignedVars[Thread2_P1_#t~ite5] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |Thread2_P1_#t~ite4|=2, |Thread2_P1_#t~ite5|=2, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=2, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] 2 [559] L723-5-->L724: Formula: (= v_~y~0_3 |v_Thread2_P1_#t~ite5_2|) InVars {Thread2_P1_#t~ite5=|v_Thread2_P1_#t~ite5_2|} OutVars{~y~0=v_~y~0_3, Thread2_P1_#t~ite4=|v_Thread2_P1_#t~ite4_1|, Thread2_P1_#t~ite5=|v_Thread2_P1_#t~ite5_3|} AuxVars[] AssignedVars[~y~0, Thread2_P1_#t~ite4, Thread2_P1_#t~ite5] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=2, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] 2 [563] L724-->L724-2: Formula: (and (or (= (mod v_~y$r_buff0_thd2~0_9 256) 0) (= (mod v_~y$w_buff0_used~0_8 256) 0)) (= |v_Thread2_P1_#t~ite6_2| v_~y$w_buff0_used~0_8)) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_8, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_9} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_8, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_9, Thread2_P1_#t~ite6=|v_Thread2_P1_#t~ite6_2|} AuxVars[] AssignedVars[Thread2_P1_#t~ite6] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |Thread2_P1_#t~ite6|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=2, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] 2 [565] L724-2-->L725: Formula: (= v_~y$w_buff0_used~0_9 |v_Thread2_P1_#t~ite6_3|) InVars {Thread2_P1_#t~ite6=|v_Thread2_P1_#t~ite6_3|} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_9, Thread2_P1_#t~ite6=|v_Thread2_P1_#t~ite6_4|} AuxVars[] AssignedVars[~y$w_buff0_used~0, Thread2_P1_#t~ite6] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=2, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] 2 [567] L725-->L725-2: Formula: (and (or (= 0 (mod v_~y$r_buff0_thd2~0_11 256)) (= 0 (mod v_~y$w_buff0_used~0_11 256))) (or (= 0 (mod v_~y$w_buff1_used~0_7 256)) (= (mod v_~y$r_buff1_thd2~0_7 256) 0)) (= |v_Thread2_P1_#t~ite7_2| v_~y$w_buff1_used~0_7)) InVars {~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_7, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_11, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_11, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_7} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_7, Thread2_P1_#t~ite7=|v_Thread2_P1_#t~ite7_2|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_11, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_11, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_7} AuxVars[] AssignedVars[Thread2_P1_#t~ite7] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |Thread2_P1_#t~ite7|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=2, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] 2 [568] L725-2-->L726: Formula: (= v_~y$w_buff1_used~0_1 |v_Thread2_P1_#t~ite7_3|) InVars {Thread2_P1_#t~ite7=|v_Thread2_P1_#t~ite7_3|} OutVars{Thread2_P1_#t~ite7=|v_Thread2_P1_#t~ite7_4|, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_1} AuxVars[] AssignedVars[Thread2_P1_#t~ite7, ~y$w_buff1_used~0] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=2, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] 2 [570] L726-->L726-2: Formula: (and (= |v_Thread2_P1_#t~ite8_2| v_~y$r_buff0_thd2~0_2) (or (= (mod v_~y$r_buff0_thd2~0_2 256) 0) (= (mod v_~y$w_buff0_used~0_2 256) 0))) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_2, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_2} OutVars{Thread2_P1_#t~ite8=|v_Thread2_P1_#t~ite8_2|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_2, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_2} AuxVars[] AssignedVars[Thread2_P1_#t~ite8] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |Thread2_P1_#t~ite8|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=2, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] 2 [571] L726-2-->L727: Formula: (= v_~y$r_buff0_thd2~0_4 |v_Thread2_P1_#t~ite8_3|) InVars {Thread2_P1_#t~ite8=|v_Thread2_P1_#t~ite8_3|} OutVars{Thread2_P1_#t~ite8=|v_Thread2_P1_#t~ite8_4|, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_4} AuxVars[] AssignedVars[~y$r_buff0_thd2~0, Thread2_P1_#t~ite8] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=2, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] 2 [573] L727-->L727-2: Formula: (and (= |v_Thread2_P1_#t~ite9_2| v_~y$r_buff1_thd2~0_3) (or (= 0 (mod v_~y$r_buff0_thd2~0_7 256)) (= (mod v_~y$w_buff0_used~0_6 256) 0)) (or (= 0 (mod v_~y$w_buff1_used~0_4 256)) (= (mod v_~y$r_buff1_thd2~0_3 256) 0))) InVars {~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_3, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_6, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_7, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_4} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_3, Thread2_P1_#t~ite9=|v_Thread2_P1_#t~ite9_2|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_6, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_7, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_4} AuxVars[] AssignedVars[Thread2_P1_#t~ite9] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |Thread2_P1_#t~ite9|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=2, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] 2 [574] L727-2-->L732: Formula: (and (= v_~y$r_buff1_thd2~0_5 |v_Thread2_P1_#t~ite9_3|) (= v_~__unbuffered_cnt~0_3 (+ v_~__unbuffered_cnt~0_4 1))) InVars {Thread2_P1_#t~ite9=|v_Thread2_P1_#t~ite9_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_4} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_5, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_3, Thread2_P1_#t~ite9=|v_Thread2_P1_#t~ite9_4|} AuxVars[] AssignedVars[~y$r_buff1_thd2~0, ~__unbuffered_cnt~0, Thread2_P1_#t~ite9] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 [500] L779-1-->L783: Formula: (= v_~main$tmp_guard0~0_2 (ite (= 0 (ite (= v_~__unbuffered_cnt~0_8 3) 1 0)) 0 1)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_8} OutVars{~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_8, ULTIMATE.start_main_#t~nondet20=|v_ULTIMATE.start_main_#t~nondet20_2|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_2} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet20, ~main$tmp_guard0~0] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 [413] L783-->L785: Formula: (not (= 0 (mod v_~main$tmp_guard0~0_3 256))) InVars {~main$tmp_guard0~0=v_~main$tmp_guard0~0_3} OutVars{~main$tmp_guard0~0=v_~main$tmp_guard0~0_3} AuxVars[] AssignedVars[] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 [463] L785-->L785-2: Formula: (or (= 0 (mod v_~y$w_buff0_used~0_43 256)) (= 0 (mod v_~y$r_buff0_thd0~0_21 256))) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_43, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_21} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_43, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_21} AuxVars[] AssignedVars[] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 [470] L785-2-->L785-4: Formula: (and (or (= 0 (mod v_~y$r_buff1_thd0~0_13 256)) (= 0 (mod v_~y$w_buff1_used~0_27 256))) (= |v_ULTIMATE.start_main_#t~ite21_3| v_~y~0_10)) InVars {~y~0=v_~y~0_10, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_13, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_27} OutVars{~y~0=v_~y~0_10, ULTIMATE.start_main_#t~ite21=|v_ULTIMATE.start_main_#t~ite21_3|, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_13, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_27} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite21] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite21|=2, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 [450] L785-4-->L785-5: Formula: (= |v_ULTIMATE.start_main_#t~ite22_3| |v_ULTIMATE.start_main_#t~ite21_4|) InVars {ULTIMATE.start_main_#t~ite21=|v_ULTIMATE.start_main_#t~ite21_4|} OutVars{ULTIMATE.start_main_#t~ite21=|v_ULTIMATE.start_main_#t~ite21_4|, ULTIMATE.start_main_#t~ite22=|v_ULTIMATE.start_main_#t~ite22_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite22] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite21|=2, |ULTIMATE.start_main_#t~ite22|=2, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 [454] L785-5-->L786: Formula: (= v_~y~0_11 |v_ULTIMATE.start_main_#t~ite22_5|) InVars {ULTIMATE.start_main_#t~ite22=|v_ULTIMATE.start_main_#t~ite22_5|} OutVars{~y~0=v_~y~0_11, ULTIMATE.start_main_#t~ite21=|v_ULTIMATE.start_main_#t~ite21_5|, ULTIMATE.start_main_#t~ite22=|v_ULTIMATE.start_main_#t~ite22_4|} AuxVars[] AssignedVars[~y~0, ULTIMATE.start_main_#t~ite21, ULTIMATE.start_main_#t~ite22] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 [380] L786-->L786-2: Formula: (and (or (= 0 (mod v_~y$w_buff0_used~0_45 256)) (= 0 (mod v_~y$r_buff0_thd0~0_23 256))) (= |v_ULTIMATE.start_main_#t~ite23_3| v_~y$w_buff0_used~0_45)) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_45, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_23} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_45, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_23, ULTIMATE.start_main_#t~ite23=|v_ULTIMATE.start_main_#t~ite23_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite23] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite23|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 [385] L786-2-->L787: Formula: (= v_~y$w_buff0_used~0_46 |v_ULTIMATE.start_main_#t~ite23_5|) InVars {ULTIMATE.start_main_#t~ite23=|v_ULTIMATE.start_main_#t~ite23_5|} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_46, ULTIMATE.start_main_#t~ite23=|v_ULTIMATE.start_main_#t~ite23_4|} AuxVars[] AssignedVars[~y$w_buff0_used~0, ULTIMATE.start_main_#t~ite23] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 [508] L787-->L787-2: Formula: (and (or (= 0 (mod v_~y$w_buff1_used~0_29 256)) (= 0 (mod v_~y$r_buff1_thd0~0_15 256))) (or (= (mod v_~y$r_buff0_thd0~0_25 256) 0) (= (mod v_~y$w_buff0_used~0_48 256) 0)) (= |v_ULTIMATE.start_main_#t~ite24_3| v_~y$w_buff1_used~0_29)) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_48, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_15, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_25, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_29} OutVars{ULTIMATE.start_main_#t~ite24=|v_ULTIMATE.start_main_#t~ite24_3|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_48, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_15, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_25, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_29} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite24] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite24|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 [513] L787-2-->L788: Formula: (= v_~y$w_buff1_used~0_30 |v_ULTIMATE.start_main_#t~ite24_5|) InVars {ULTIMATE.start_main_#t~ite24=|v_ULTIMATE.start_main_#t~ite24_5|} OutVars{ULTIMATE.start_main_#t~ite24=|v_ULTIMATE.start_main_#t~ite24_4|, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_30} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite24, ~y$w_buff1_used~0] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 [430] L788-->L788-2: Formula: (and (= |v_ULTIMATE.start_main_#t~ite25_3| v_~y$r_buff0_thd0~0_27) (or (= 0 (mod v_~y$r_buff0_thd0~0_27 256)) (= 0 (mod v_~y$w_buff0_used~0_50 256)))) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_50, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_27} OutVars{ULTIMATE.start_main_#t~ite25=|v_ULTIMATE.start_main_#t~ite25_3|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_50, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_27} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite25] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite25|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 [438] L788-2-->L789: Formula: (= v_~y$r_buff0_thd0~0_28 |v_ULTIMATE.start_main_#t~ite25_5|) InVars {ULTIMATE.start_main_#t~ite25=|v_ULTIMATE.start_main_#t~ite25_5|} OutVars{ULTIMATE.start_main_#t~ite25=|v_ULTIMATE.start_main_#t~ite25_4|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_28} AuxVars[] AssignedVars[~y$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite25] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 [371] L789-->L789-2: Formula: (and (or (= (mod v_~y$r_buff0_thd0~0_30 256) 0) (= (mod v_~y$w_buff0_used~0_52 256) 0)) (= |v_ULTIMATE.start_main_#t~ite26_3| v_~y$r_buff1_thd0~0_17) (or (= 0 (mod v_~y$w_buff1_used~0_32 256)) (= 0 (mod v_~y$r_buff1_thd0~0_17 256)))) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_52, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_17, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_30, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_32} OutVars{ULTIMATE.start_main_#t~ite26=|v_ULTIMATE.start_main_#t~ite26_3|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_52, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_17, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_30, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_32} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite26] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite26|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 [540] L789-2-->L796: Formula: (and (= v_~y$flush_delayed~0_5 v_~weak$$choice2~0_8) (= v_~weak$$choice2~0_8 (ite (= 0 (+ |v_ULTIMATE.start_main_#t~nondet28.base_3| |v_ULTIMATE.start_main_#t~nondet28.offset_3|)) 0 1)) (= v_~y$r_buff1_thd0~0_18 |v_ULTIMATE.start_main_#t~ite26_5|) (= v_~weak$$choice0~0_2 (ite (= 0 (+ |v_ULTIMATE.start_main_#t~nondet27.offset_3| |v_ULTIMATE.start_main_#t~nondet27.base_3|)) 0 1)) (= v_~y$mem_tmp~0_3 v_~y~0_12)) InVars {ULTIMATE.start_main_#t~nondet27.offset=|v_ULTIMATE.start_main_#t~nondet27.offset_3|, ULTIMATE.start_main_#t~nondet28.base=|v_ULTIMATE.start_main_#t~nondet28.base_3|, ULTIMATE.start_main_#t~nondet27.base=|v_ULTIMATE.start_main_#t~nondet27.base_3|, ULTIMATE.start_main_#t~nondet28.offset=|v_ULTIMATE.start_main_#t~nondet28.offset_3|, ULTIMATE.start_main_#t~ite26=|v_ULTIMATE.start_main_#t~ite26_5|, ~y~0=v_~y~0_12} OutVars{ULTIMATE.start_main_#t~nondet27.offset=|v_ULTIMATE.start_main_#t~nondet27.offset_2|, ~weak$$choice0~0=v_~weak$$choice0~0_2, ~y$mem_tmp~0=v_~y$mem_tmp~0_3, ULTIMATE.start_main_#t~nondet28.base=|v_ULTIMATE.start_main_#t~nondet28.base_2|, ULTIMATE.start_main_#t~nondet27.base=|v_ULTIMATE.start_main_#t~nondet27.base_2|, ULTIMATE.start_main_#t~nondet28.offset=|v_ULTIMATE.start_main_#t~nondet28.offset_2|, ~y$flush_delayed~0=v_~y$flush_delayed~0_5, ULTIMATE.start_main_#t~ite26=|v_ULTIMATE.start_main_#t~ite26_4|, ~y~0=v_~y~0_12, ~weak$$choice2~0=v_~weak$$choice2~0_8, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_18} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet27.offset, ~weak$$choice0~0, ~y$mem_tmp~0, ULTIMATE.start_main_#t~nondet28.base, ULTIMATE.start_main_#t~nondet27.base, ULTIMATE.start_main_#t~nondet28.offset, ~y$flush_delayed~0, ULTIMATE.start_main_#t~ite26, ~weak$$choice2~0, ~y$r_buff1_thd0~0] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 [460] L796-->L796-5: Formula: (and (let ((.cse0 (= 0 (mod v_~y$r_buff0_thd0~0_31 256)))) (or (= 0 (mod v_~y$w_buff0_used~0_53 256)) (and (= (mod v_~y$r_buff1_thd0~0_19 256) 0) .cse0) (and .cse0 (= (mod v_~y$w_buff1_used~0_33 256) 0)))) (= |v_ULTIMATE.start_main_#t~ite30_2| v_~y~0_13)) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_53, ~y~0=v_~y~0_13, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_19, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_31, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_33} OutVars{ULTIMATE.start_main_#t~ite30=|v_ULTIMATE.start_main_#t~ite30_2|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_53, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_31, ~y~0=v_~y~0_13, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_19, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_33} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite30] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite30|=2, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 [453] L796-5-->L797: Formula: (= v_~y~0_14 |v_ULTIMATE.start_main_#t~ite30_5|) InVars {ULTIMATE.start_main_#t~ite30=|v_ULTIMATE.start_main_#t~ite30_5|} OutVars{ULTIMATE.start_main_#t~ite30=|v_ULTIMATE.start_main_#t~ite30_4|, ~y~0=v_~y~0_14, ULTIMATE.start_main_#t~ite29=|v_ULTIMATE.start_main_#t~ite29_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite30, ULTIMATE.start_main_#t~ite29, ~y~0] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 [377] L797-->L797-8: Formula: (and (= |v_ULTIMATE.start_main_#t~ite33_2| v_~y$w_buff0~0_8) (not (= (mod v_~weak$$choice2~0_9 256) 0))) InVars {~weak$$choice2~0=v_~weak$$choice2~0_9, ~y$w_buff0~0=v_~y$w_buff0~0_8} OutVars{~weak$$choice2~0=v_~weak$$choice2~0_9, ~y$w_buff0~0=v_~y$w_buff0~0_8, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite33] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite33|=2, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 [372] L797-8-->L798: Formula: (= v_~y$w_buff0~0_12 |v_ULTIMATE.start_main_#t~ite33_5|) InVars {ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_5|} OutVars{ULTIMATE.start_main_#t~ite31=|v_ULTIMATE.start_main_#t~ite31_5|, ULTIMATE.start_main_#t~ite32=|v_ULTIMATE.start_main_#t~ite32_5|, ~y$w_buff0~0=v_~y$w_buff0~0_12, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_4|} AuxVars[] AssignedVars[~y$w_buff0~0, ULTIMATE.start_main_#t~ite31, ULTIMATE.start_main_#t~ite32, ULTIMATE.start_main_#t~ite33] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 [503] L798-->L798-8: Formula: (and (not (= (mod v_~weak$$choice2~0_11 256) 0)) (= |v_ULTIMATE.start_main_#t~ite36_2| v_~y$w_buff1~0_7)) InVars {~y$w_buff1~0=v_~y$w_buff1~0_7, ~weak$$choice2~0=v_~weak$$choice2~0_11} OutVars{ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_2|, ~y$w_buff1~0=v_~y$w_buff1~0_7, ~weak$$choice2~0=v_~weak$$choice2~0_11} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite36] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite36|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 [496] L798-8-->L799: Formula: (= v_~y$w_buff1~0_11 |v_ULTIMATE.start_main_#t~ite36_5|) InVars {ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_5|} OutVars{ULTIMATE.start_main_#t~ite35=|v_ULTIMATE.start_main_#t~ite35_5|, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_4|, ~y$w_buff1~0=v_~y$w_buff1~0_11, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_5|} AuxVars[] AssignedVars[~y$w_buff1~0, ULTIMATE.start_main_#t~ite35, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite34] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 [457] L799-->L799-8: Formula: (and (not (= (mod v_~weak$$choice2~0_13 256) 0)) (= |v_ULTIMATE.start_main_#t~ite39_5| v_~y$w_buff0_used~0_65)) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_65, ~weak$$choice2~0=v_~weak$$choice2~0_13} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_65, ~weak$$choice2~0=v_~weak$$choice2~0_13, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite39] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite39|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 [420] L799-8-->L800: Formula: (= v_~y$w_buff0_used~0_28 |v_ULTIMATE.start_main_#t~ite39_3|) InVars {ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_3|} OutVars{ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_3|, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_4|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_28, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_2|} AuxVars[] AssignedVars[~y$w_buff0_used~0, ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~ite38, ULTIMATE.start_main_#t~ite37] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 [368] L800-->L800-8: Formula: (and (= |v_ULTIMATE.start_main_#t~ite42_1| v_~y$w_buff1_used~0_17) (not (= (mod v_~weak$$choice2~0_1 256) 0))) InVars {~weak$$choice2~0=v_~weak$$choice2~0_1, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_17} OutVars{~weak$$choice2~0=v_~weak$$choice2~0_1, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_1|, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_17} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite42] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite42|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 [530] L800-8-->L801: Formula: (= v_~y$w_buff1_used~0_20 |v_ULTIMATE.start_main_#t~ite42_4|) InVars {ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_4|} OutVars{ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_4|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_4|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_3|, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_20} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#t~ite40, ULTIMATE.start_main_#t~ite42, ~y$w_buff1_used~0] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 [494] L801-->L801-8: Formula: (and (= |v_ULTIMATE.start_main_#t~ite45_1| v_~y$r_buff0_thd0~0_9) (not (= 0 (mod v_~weak$$choice2~0_3 256)))) InVars {~weak$$choice2~0=v_~weak$$choice2~0_3, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_9} OutVars{~weak$$choice2~0=v_~weak$$choice2~0_3, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_9, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite45] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite45|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 [473] L801-8-->L802: Formula: (= v_~y$r_buff0_thd0~0_14 |v_ULTIMATE.start_main_#t~ite45_4|) InVars {ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_4|} OutVars{ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_4|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_14, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_3|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_4|} AuxVars[] AssignedVars[~y$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite45, ULTIMATE.start_main_#t~ite44] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 [418] L802-->L802-8: Formula: (and (not (= 0 (mod v_~weak$$choice2~0_5 256))) (= |v_ULTIMATE.start_main_#t~ite48_1| v_~y$r_buff1_thd0~0_7)) InVars {~weak$$choice2~0=v_~weak$$choice2~0_5, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_7} OutVars{ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_1|, ~weak$$choice2~0=v_~weak$$choice2~0_5, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_7} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite48] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite48|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 [412] L802-8-->L804: Formula: (and (= v_~main$tmp_guard1~0_1 (ite (= 0 (ite (not (and (= 2 v_~x~0_3) (= 2 v_~z~0_3) (= 2 v_~y~0_6))) 1 0)) 0 1)) (= v_~y$r_buff1_thd0~0_10 |v_ULTIMATE.start_main_#t~ite48_4|)) InVars {~z~0=v_~z~0_3, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_4|, ~y~0=v_~y~0_6, ~x~0=v_~x~0_3} OutVars{ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_4|, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_4|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_1, ~z~0=v_~z~0_3, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_3|, ~y~0=v_~y~0_6, ~x~0=v_~x~0_3, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_10} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite46, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite48, ~y$r_buff1_thd0~0] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 [471] L804-->L804-2: Formula: (and (= |v_ULTIMATE.start_main_#t~ite49_1| v_~y$mem_tmp~0_1) (not (= (mod v_~y$flush_delayed~0_1 256) 0))) InVars {~y$flush_delayed~0=v_~y$flush_delayed~0_1, ~y$mem_tmp~0=v_~y$mem_tmp~0_1} OutVars{~y$flush_delayed~0=v_~y$flush_delayed~0_1, ~y$mem_tmp~0=v_~y$mem_tmp~0_1, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite49] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite49|=2, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 [474] L804-2-->L807: Formula: (and (= v_~y~0_8 |v_ULTIMATE.start_main_#t~ite49_4|) (= v_~y$flush_delayed~0_3 0)) InVars {ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_4|} OutVars{~y$flush_delayed~0=v_~y$flush_delayed~0_3, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_3|, ~y~0=v_~y~0_8} AuxVars[] AssignedVars[~y$flush_delayed~0, ULTIMATE.start_main_#t~ite49, ~y~0] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 [459] L807-->L807-1: Formula: (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_1| (mod v_~main$tmp_guard1~0_2 256)) InVars {~main$tmp_guard1~0=v_~main$tmp_guard1~0_2} OutVars{~main$tmp_guard1~0=v_~main$tmp_guard1~0_2, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_1|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_#in~expression] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 [465] L807-1-->L4: Formula: true InVars {} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_1} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 [414] L4-->L4-1: Formula: (= v_ULTIMATE.start___VERIFIER_assert_~expression_2 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_2|) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_2|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_2, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_2|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 [410] L4-1-->L4-2: Formula: (= v_ULTIMATE.start___VERIFIER_assert_~expression_3 0) InVars {ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_3} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_3} AuxVars[] AssignedVars[] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 [405] L4-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] VAL [Thread0_P2___VERIFIER_assert_~expression=1, Thread0_P2_thidvar0=2, Thread0_P2_~arg.base=0, Thread0_P2_~arg.offset=0, Thread1_P0_thidvar0=0, Thread1_P0_~arg.base=0, Thread1_P0_~arg.offset=0, Thread2_P1_thidvar0=1, Thread2_P1_~arg.base=0, Thread2_P1_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P2_#in~arg.base|=0, |Thread0_P2_#in~arg.offset|=0, |Thread0_P2___VERIFIER_assert_#in~expression|=1, |Thread1_P0_#in~arg.base|=0, |Thread1_P0_#in~arg.offset|=0, |Thread2_P1_#in~arg.base|=0, |Thread2_P1_#in~arg.offset|=0, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 #NULL.base, #NULL.offset := 0, 0; VAL [|#NULL.base|=0, |#NULL.offset|=0] [?] -1 #valid := #valid[0 := 0]; VAL [|#NULL.base|=0, |#NULL.offset|=0] [?] -1 ~__unbuffered_cnt~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0] [?] -1 ~main$tmp_guard0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0] [?] -1 ~main$tmp_guard1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [?] -1 ~x~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [?] -1 ~y~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0] [?] -1 ~y$flush_delayed~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y~0=0] [?] -1 ~y$mem_tmp~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y~0=0] [?] -1 ~y$r_buff0_thd0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y~0=0] [?] -1 ~y$r_buff0_thd1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y~0=0] [?] -1 ~y$r_buff0_thd2~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y~0=0] [?] -1 ~y$r_buff0_thd3~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y~0=0] [?] -1 ~y$r_buff1_thd0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y~0=0] [?] -1 ~y$r_buff1_thd1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y~0=0] [?] -1 ~y$r_buff1_thd2~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y~0=0] [?] -1 ~y$r_buff1_thd3~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y~0=0] [?] -1 ~y$read_delayed~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed~0=0, ~y~0=0] [?] -1 ~y$read_delayed_var~0.base, ~y$read_delayed_var~0.offset := 0, 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y~0=0] [?] -1 ~y$w_buff0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0~0=0, ~y~0=0] [?] -1 ~y$w_buff0_used~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y~0=0] [?] -1 ~y$w_buff1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 ~y$w_buff1_used~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 ~z~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 ~weak$$choice0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 ~weak$$choice2~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 havoc main_#res; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 havoc main_#t~nondet18, main_#t~nondet19, main_#t~nondet20, main_#t~ite22, main_#t~ite21, main_#t~ite23, main_#t~ite24, main_#t~ite25, main_#t~ite26, main_#t~nondet27.base, main_#t~nondet27.offset, main_#t~nondet28.base, main_#t~nondet28.offset, main_#t~ite30, main_#t~ite29, main_#t~ite33, main_#t~ite32, main_#t~ite31, main_#t~ite36, main_#t~ite35, main_#t~ite34, main_#t~ite39, main_#t~ite38, main_#t~ite37, main_#t~ite42, main_#t~ite41, main_#t~ite40, main_#t~ite45, main_#t~ite44, main_#t~ite43, main_#t~ite48, main_#t~ite47, main_#t~ite46, main_#t~ite49, main_~#t2494~0.base, main_~#t2494~0.offset, main_~#t2495~0.base, main_~#t2495~0.offset, main_~#t2496~0.base, main_~#t2496~0.offset; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 SUMMARY for call main_~#t2494~0.base, main_~#t2494~0.offset := #Ultimate.alloc(4); srcloc: L774 VAL [|#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 SUMMARY for call write~int(0, main_~#t2494~0.base, main_~#t2494~0.offset, 4); srcloc: L774-1 VAL [|#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] FORK -1 fork 0 P0(0, 0); VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 havoc main_#t~nondet18; VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 SUMMARY for call main_~#t2495~0.base, main_~#t2495~0.offset := #Ultimate.alloc(4); srcloc: L776 VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 SUMMARY for call write~int(1, main_~#t2495~0.base, main_~#t2495~0.offset, 4); srcloc: L776-1 VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] FORK -1 fork 1 P1(0, 0); VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 havoc main_#t~nondet19; VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 SUMMARY for call main_~#t2496~0.base, main_~#t2496~0.offset := #Ultimate.alloc(4); srcloc: L778 VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 SUMMARY for call write~int(2, main_~#t2496~0.base, main_~#t2496~0.offset, 4); srcloc: L778-1 VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] FORK -1 fork 2 P2(0, 0); VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] 0 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset;~y$w_buff1~0 := ~y$w_buff0~0;~y$w_buff0~0 := 2;~y$w_buff1_used~0 := ~y$w_buff0_used~0;~y$w_buff0_used~0 := 1;__VERIFIER_assert_#in~expression := (if !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$w_buff0_used~0 % 256) then 1 else 0);havoc __VERIFIER_assert_~expression;__VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] 0 assume !(0 == __VERIFIER_assert_~expression); VAL [P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] 0 ~y$r_buff1_thd0~0 := ~y$r_buff0_thd0~0;~y$r_buff1_thd1~0 := ~y$r_buff0_thd1~0;~y$r_buff1_thd2~0 := ~y$r_buff0_thd2~0;~y$r_buff1_thd3~0 := ~y$r_buff0_thd3~0;~y$r_buff0_thd3~0 := 1;~z~0 := 1; VAL [P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 1 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset;~z~0 := 2;~x~0 := 1;~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=2] [?] 0 assume 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256;#t~ite12 := ~y$w_buff0~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite12|=2, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=2] [?] 2 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset;~x~0 := 2;~y~0 := 1; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite12|=2, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=2] [?] 0 ~y~0 := #t~ite12;havoc #t~ite11;havoc #t~ite12; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] 0 assume 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256;#t~ite13 := 0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite13|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] 0 ~y$w_buff0_used~0 := #t~ite13;havoc #t~ite13; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] 0 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd3~0 % 256));#t~ite14 := ~y$w_buff1_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite14|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] 0 ~y$w_buff1_used~0 := #t~ite14;havoc #t~ite14; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] 0 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256);#t~ite15 := ~y$r_buff0_thd3~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite15|=1, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] 0 ~y$r_buff0_thd3~0 := #t~ite15;havoc #t~ite15; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] 0 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd3~0 % 256));#t~ite16 := ~y$r_buff1_thd3~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite16|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] 0 ~y$r_buff1_thd3~0 := #t~ite16;havoc #t~ite16;~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=2, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] 2 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256); VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=2, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] 2 assume !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256);#t~ite4 := ~y~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite4|=2, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=2, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] 2 #t~ite5 := #t~ite4; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite4|=2, |P1_#t~ite5|=2, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=2, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] 2 ~y~0 := #t~ite5;havoc #t~ite5;havoc #t~ite4; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=2, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] 2 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256);#t~ite6 := ~y$w_buff0_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite6|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=2, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] 2 ~y$w_buff0_used~0 := #t~ite6;havoc #t~ite6; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=2, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] 2 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256));#t~ite7 := ~y$w_buff1_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite7|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=2, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] 2 ~y$w_buff1_used~0 := #t~ite7;havoc #t~ite7; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=2, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] 2 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256);#t~ite8 := ~y$r_buff0_thd2~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite8|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=2, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] 2 ~y$r_buff0_thd2~0 := #t~ite8;havoc #t~ite8; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=2, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] 2 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256));#t~ite9 := ~y$r_buff1_thd2~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite9|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=2, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] 2 ~y$r_buff1_thd2~0 := #t~ite9;havoc #t~ite9;~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 havoc main_#t~nondet20;~main$tmp_guard0~0 := (if 0 == (if 3 == ~__unbuffered_cnt~0 then 1 else 0) then 0 else 1); VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 assume 0 != ~main$tmp_guard0~0 % 256; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256); VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 assume !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256);main_#t~ite21 := ~y~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite21|=2, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 main_#t~ite22 := main_#t~ite21; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite21|=2, |ULTIMATE.start_main_#t~ite22|=2, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 ~y~0 := main_#t~ite22;havoc main_#t~ite21;havoc main_#t~ite22; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256);main_#t~ite23 := ~y$w_buff0_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite23|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 ~y$w_buff0_used~0 := main_#t~ite23;havoc main_#t~ite23; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256));main_#t~ite24 := ~y$w_buff1_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite24|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 ~y$w_buff1_used~0 := main_#t~ite24;havoc main_#t~ite24; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256);main_#t~ite25 := ~y$r_buff0_thd0~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite25|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 ~y$r_buff0_thd0~0 := main_#t~ite25;havoc main_#t~ite25; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256));main_#t~ite26 := ~y$r_buff1_thd0~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite26|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 ~y$r_buff1_thd0~0 := main_#t~ite26;havoc main_#t~ite26;~weak$$choice0~0 := (if 0 == main_#t~nondet27.base + main_#t~nondet27.offset then 0 else 1);havoc main_#t~nondet27.base, main_#t~nondet27.offset;~weak$$choice2~0 := (if 0 == main_#t~nondet28.base + main_#t~nondet28.offset then 0 else 1);havoc main_#t~nondet28.base, main_#t~nondet28.offset;~y$flush_delayed~0 := ~weak$$choice2~0;~y$mem_tmp~0 := ~y~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 assume (0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd0~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd0~0 % 256 && 0 == ~y$r_buff1_thd0~0 % 256);main_#t~ite30 := ~y~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite30|=2, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 ~y~0 := main_#t~ite30;havoc main_#t~ite29;havoc main_#t~ite30; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 assume 0 != ~weak$$choice2~0 % 256;main_#t~ite33 := ~y$w_buff0~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite33|=2, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 ~y$w_buff0~0 := main_#t~ite33;havoc main_#t~ite33;havoc main_#t~ite32;havoc main_#t~ite31; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 assume 0 != ~weak$$choice2~0 % 256;main_#t~ite36 := ~y$w_buff1~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite36|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 ~y$w_buff1~0 := main_#t~ite36;havoc main_#t~ite36;havoc main_#t~ite34;havoc main_#t~ite35; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 assume 0 != ~weak$$choice2~0 % 256;main_#t~ite39 := ~y$w_buff0_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite39|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 ~y$w_buff0_used~0 := main_#t~ite39;havoc main_#t~ite37;havoc main_#t~ite38;havoc main_#t~ite39; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 assume 0 != ~weak$$choice2~0 % 256;main_#t~ite42 := ~y$w_buff1_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite42|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 ~y$w_buff1_used~0 := main_#t~ite42;havoc main_#t~ite41;havoc main_#t~ite40;havoc main_#t~ite42; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 assume 0 != ~weak$$choice2~0 % 256;main_#t~ite45 := ~y$r_buff0_thd0~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite45|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 ~y$r_buff0_thd0~0 := main_#t~ite45;havoc main_#t~ite44;havoc main_#t~ite45;havoc main_#t~ite43; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 assume 0 != ~weak$$choice2~0 % 256;main_#t~ite48 := ~y$r_buff1_thd0~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite48|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 ~y$r_buff1_thd0~0 := main_#t~ite48;havoc main_#t~ite46;havoc main_#t~ite48;havoc main_#t~ite47;~main$tmp_guard1~0 := (if 0 == (if !((2 == ~x~0 && 2 == ~y~0) && 2 == ~z~0) then 1 else 0) then 0 else 1); VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 assume 0 != ~y$flush_delayed~0 % 256;main_#t~ite49 := ~y$mem_tmp~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite49|=2, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 ~y~0 := main_#t~ite49;havoc main_#t~ite49;~y$flush_delayed~0 := 0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 __VERIFIER_assert_#in~expression := ~main$tmp_guard1~0 % 256; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 havoc __VERIFIER_assert_~expression; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 assume 0 == __VERIFIER_assert_~expression; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 assume !false; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] ----- ----- class de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder.RCFGBacktranslator [?] -1 #NULL.base, #NULL.offset := 0, 0; VAL [|#NULL.base|=0, |#NULL.offset|=0] [?] -1 #valid := #valid[0 := 0]; VAL [|#NULL.base|=0, |#NULL.offset|=0] [?] -1 ~__unbuffered_cnt~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0] [?] -1 ~main$tmp_guard0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0] [?] -1 ~main$tmp_guard1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [?] -1 ~x~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [?] -1 ~y~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0] [?] -1 ~y$flush_delayed~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y~0=0] [?] -1 ~y$mem_tmp~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y~0=0] [?] -1 ~y$r_buff0_thd0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y~0=0] [?] -1 ~y$r_buff0_thd1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y~0=0] [?] -1 ~y$r_buff0_thd2~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y~0=0] [?] -1 ~y$r_buff0_thd3~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y~0=0] [?] -1 ~y$r_buff1_thd0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y~0=0] [?] -1 ~y$r_buff1_thd1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y~0=0] [?] -1 ~y$r_buff1_thd2~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y~0=0] [?] -1 ~y$r_buff1_thd3~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y~0=0] [?] -1 ~y$read_delayed~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed~0=0, ~y~0=0] [?] -1 ~y$read_delayed_var~0.base, ~y$read_delayed_var~0.offset := 0, 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y~0=0] [?] -1 ~y$w_buff0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0~0=0, ~y~0=0] [?] -1 ~y$w_buff0_used~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y~0=0] [?] -1 ~y$w_buff1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 ~y$w_buff1_used~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [?] -1 ~z~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 ~weak$$choice0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 ~weak$$choice2~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 havoc main_#res; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 havoc main_#t~nondet18, main_#t~nondet19, main_#t~nondet20, main_#t~ite22, main_#t~ite21, main_#t~ite23, main_#t~ite24, main_#t~ite25, main_#t~ite26, main_#t~nondet27.base, main_#t~nondet27.offset, main_#t~nondet28.base, main_#t~nondet28.offset, main_#t~ite30, main_#t~ite29, main_#t~ite33, main_#t~ite32, main_#t~ite31, main_#t~ite36, main_#t~ite35, main_#t~ite34, main_#t~ite39, main_#t~ite38, main_#t~ite37, main_#t~ite42, main_#t~ite41, main_#t~ite40, main_#t~ite45, main_#t~ite44, main_#t~ite43, main_#t~ite48, main_#t~ite47, main_#t~ite46, main_#t~ite49, main_~#t2494~0.base, main_~#t2494~0.offset, main_~#t2495~0.base, main_~#t2495~0.offset, main_~#t2496~0.base, main_~#t2496~0.offset; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 SUMMARY for call main_~#t2494~0.base, main_~#t2494~0.offset := #Ultimate.alloc(4); srcloc: L774 VAL [|#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 SUMMARY for call write~int(0, main_~#t2494~0.base, main_~#t2494~0.offset, 4); srcloc: L774-1 VAL [|#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] FORK -1 fork 0 P0(0, 0); VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 havoc main_#t~nondet18; VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 SUMMARY for call main_~#t2495~0.base, main_~#t2495~0.offset := #Ultimate.alloc(4); srcloc: L776 VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 SUMMARY for call write~int(1, main_~#t2495~0.base, main_~#t2495~0.offset, 4); srcloc: L776-1 VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] FORK -1 fork 1 P1(0, 0); VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 havoc main_#t~nondet19; VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 SUMMARY for call main_~#t2496~0.base, main_~#t2496~0.offset := #Ultimate.alloc(4); srcloc: L778 VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 SUMMARY for call write~int(2, main_~#t2496~0.base, main_~#t2496~0.offset, 4); srcloc: L778-1 VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] FORK -1 fork 2 P2(0, 0); VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] 0 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset;~y$w_buff1~0 := ~y$w_buff0~0;~y$w_buff0~0 := 2;~y$w_buff1_used~0 := ~y$w_buff0_used~0;~y$w_buff0_used~0 := 1;__VERIFIER_assert_#in~expression := (if !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$w_buff0_used~0 % 256) then 1 else 0);havoc __VERIFIER_assert_~expression;__VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] 0 assume !(0 == __VERIFIER_assert_~expression); VAL [P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] 0 ~y$r_buff1_thd0~0 := ~y$r_buff0_thd0~0;~y$r_buff1_thd1~0 := ~y$r_buff0_thd1~0;~y$r_buff1_thd2~0 := ~y$r_buff0_thd2~0;~y$r_buff1_thd3~0 := ~y$r_buff0_thd3~0;~y$r_buff0_thd3~0 := 1;~z~0 := 1; VAL [P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [?] 1 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset;~z~0 := 2;~x~0 := 1;~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=2] [?] 0 assume 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256;#t~ite12 := ~y$w_buff0~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite12|=2, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=2] [?] 2 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset;~x~0 := 2;~y~0 := 1; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite12|=2, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=2] [?] 0 ~y~0 := #t~ite12;havoc #t~ite11;havoc #t~ite12; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] 0 assume 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256;#t~ite13 := 0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite13|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] 0 ~y$w_buff0_used~0 := #t~ite13;havoc #t~ite13; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] 0 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd3~0 % 256));#t~ite14 := ~y$w_buff1_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite14|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] 0 ~y$w_buff1_used~0 := #t~ite14;havoc #t~ite14; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] 0 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256);#t~ite15 := ~y$r_buff0_thd3~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite15|=1, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] 0 ~y$r_buff0_thd3~0 := #t~ite15;havoc #t~ite15; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] 0 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd3~0 % 256));#t~ite16 := ~y$r_buff1_thd3~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite16|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=1, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] 0 ~y$r_buff1_thd3~0 := #t~ite16;havoc #t~ite16;~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=2, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] 2 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256); VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=2, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] 2 assume !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256);#t~ite4 := ~y~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite4|=2, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=2, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] 2 #t~ite5 := #t~ite4; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite4|=2, |P1_#t~ite5|=2, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=2, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] 2 ~y~0 := #t~ite5;havoc #t~ite5;havoc #t~ite4; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=2, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] 2 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256);#t~ite6 := ~y$w_buff0_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite6|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=2, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] 2 ~y$w_buff0_used~0 := #t~ite6;havoc #t~ite6; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=2, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] 2 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256));#t~ite7 := ~y$w_buff1_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite7|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=2, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] 2 ~y$w_buff1_used~0 := #t~ite7;havoc #t~ite7; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=2, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] 2 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256);#t~ite8 := ~y$r_buff0_thd2~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite8|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=2, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] 2 ~y$r_buff0_thd2~0 := #t~ite8;havoc #t~ite8; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=2, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] 2 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256));#t~ite9 := ~y$r_buff1_thd2~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite9|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=2, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] 2 ~y$r_buff1_thd2~0 := #t~ite9;havoc #t~ite9;~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 havoc main_#t~nondet20;~main$tmp_guard0~0 := (if 0 == (if 3 == ~__unbuffered_cnt~0 then 1 else 0) then 0 else 1); VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 assume 0 != ~main$tmp_guard0~0 % 256; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256); VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 assume !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256);main_#t~ite21 := ~y~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite21|=2, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 main_#t~ite22 := main_#t~ite21; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite21|=2, |ULTIMATE.start_main_#t~ite22|=2, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 ~y~0 := main_#t~ite22;havoc main_#t~ite21;havoc main_#t~ite22; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256);main_#t~ite23 := ~y$w_buff0_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite23|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 ~y$w_buff0_used~0 := main_#t~ite23;havoc main_#t~ite23; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256));main_#t~ite24 := ~y$w_buff1_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite24|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 ~y$w_buff1_used~0 := main_#t~ite24;havoc main_#t~ite24; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256);main_#t~ite25 := ~y$r_buff0_thd0~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite25|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 ~y$r_buff0_thd0~0 := main_#t~ite25;havoc main_#t~ite25; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256));main_#t~ite26 := ~y$r_buff1_thd0~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite26|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 ~y$r_buff1_thd0~0 := main_#t~ite26;havoc main_#t~ite26;~weak$$choice0~0 := (if 0 == main_#t~nondet27.base + main_#t~nondet27.offset then 0 else 1);havoc main_#t~nondet27.base, main_#t~nondet27.offset;~weak$$choice2~0 := (if 0 == main_#t~nondet28.base + main_#t~nondet28.offset then 0 else 1);havoc main_#t~nondet28.base, main_#t~nondet28.offset;~y$flush_delayed~0 := ~weak$$choice2~0;~y$mem_tmp~0 := ~y~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 assume (0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd0~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd0~0 % 256 && 0 == ~y$r_buff1_thd0~0 % 256);main_#t~ite30 := ~y~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite30|=2, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 ~y~0 := main_#t~ite30;havoc main_#t~ite29;havoc main_#t~ite30; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 assume 0 != ~weak$$choice2~0 % 256;main_#t~ite33 := ~y$w_buff0~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite33|=2, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 ~y$w_buff0~0 := main_#t~ite33;havoc main_#t~ite33;havoc main_#t~ite32;havoc main_#t~ite31; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 assume 0 != ~weak$$choice2~0 % 256;main_#t~ite36 := ~y$w_buff1~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite36|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 ~y$w_buff1~0 := main_#t~ite36;havoc main_#t~ite36;havoc main_#t~ite34;havoc main_#t~ite35; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 assume 0 != ~weak$$choice2~0 % 256;main_#t~ite39 := ~y$w_buff0_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite39|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 ~y$w_buff0_used~0 := main_#t~ite39;havoc main_#t~ite37;havoc main_#t~ite38;havoc main_#t~ite39; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 assume 0 != ~weak$$choice2~0 % 256;main_#t~ite42 := ~y$w_buff1_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite42|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 ~y$w_buff1_used~0 := main_#t~ite42;havoc main_#t~ite41;havoc main_#t~ite40;havoc main_#t~ite42; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 assume 0 != ~weak$$choice2~0 % 256;main_#t~ite45 := ~y$r_buff0_thd0~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite45|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 ~y$r_buff0_thd0~0 := main_#t~ite45;havoc main_#t~ite44;havoc main_#t~ite45;havoc main_#t~ite43; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 assume 0 != ~weak$$choice2~0 % 256;main_#t~ite48 := ~y$r_buff1_thd0~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite48|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 ~y$r_buff1_thd0~0 := main_#t~ite48;havoc main_#t~ite46;havoc main_#t~ite48;havoc main_#t~ite47;~main$tmp_guard1~0 := (if 0 == (if !((2 == ~x~0 && 2 == ~y~0) && 2 == ~z~0) then 1 else 0) then 0 else 1); VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 assume 0 != ~y$flush_delayed~0 % 256;main_#t~ite49 := ~y$mem_tmp~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_#t~ite49|=2, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 ~y~0 := main_#t~ite49;havoc main_#t~ite49;~y$flush_delayed~0 := 0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 __VERIFIER_assert_#in~expression := ~main$tmp_guard1~0 % 256; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 havoc __VERIFIER_assert_~expression; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 assume 0 == __VERIFIER_assert_~expression; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 assume !false; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1_~arg.base=0, P1_~arg.offset=0, P2___VERIFIER_assert_~expression=1, P2_~arg.base=0, P2_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2___VERIFIER_assert_#in~expression|=1, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t2494~0.base|=7, |ULTIMATE.start_main_~#t2494~0.offset|=0, |ULTIMATE.start_main_~#t2495~0.base|=5, |ULTIMATE.start_main_~#t2495~0.offset|=0, |ULTIMATE.start_main_~#t2496~0.base|=6, |ULTIMATE.start_main_~#t2496~0.offset|=0, ~__unbuffered_cnt~0=3, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 #NULL.base, #NULL.offset := 0, 0; VAL [#NULL.base=0, #NULL.offset=0] [?] -1 #valid := #valid[0 := 0]; VAL [#NULL.base=0, #NULL.offset=0] [L672] -1 ~__unbuffered_cnt~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0] [L673] -1 ~main$tmp_guard0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0] [L674] -1 ~main$tmp_guard1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [L676] -1 ~x~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [L678] -1 ~y~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0] [L679] -1 ~y$flush_delayed~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y~0=0] [L680] -1 ~y$mem_tmp~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y~0=0] [L681] -1 ~y$r_buff0_thd0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y~0=0] [L682] -1 ~y$r_buff0_thd1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y~0=0] [L683] -1 ~y$r_buff0_thd2~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y~0=0] [L684] -1 ~y$r_buff0_thd3~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y~0=0] [L685] -1 ~y$r_buff1_thd0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y~0=0] [L686] -1 ~y$r_buff1_thd1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y~0=0] [L687] -1 ~y$r_buff1_thd2~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y~0=0] [L688] -1 ~y$r_buff1_thd3~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y~0=0] [L689] -1 ~y$read_delayed~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed~0=0, ~y~0=0] [L690] -1 ~y$read_delayed_var~0.base, ~y$read_delayed_var~0.offset := 0, 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y~0=0] [L691] -1 ~y$w_buff0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0~0=0, ~y~0=0] [L692] -1 ~y$w_buff0_used~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y~0=0] [L693] -1 ~y$w_buff1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1~0=0, ~y~0=0] [L694] -1 ~y$w_buff1_used~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L696] -1 ~z~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L697] -1 ~weak$$choice0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L698] -1 ~weak$$choice2~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 havoc main_#res; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 havoc main_#t~nondet18, main_#t~nondet19, main_#t~nondet20, main_#t~ite22, main_#t~ite21, main_#t~ite23, main_#t~ite24, main_#t~ite25, main_#t~ite26, main_#t~nondet27.base, main_#t~nondet27.offset, main_#t~nondet28.base, main_#t~nondet28.offset, main_#t~ite30, main_#t~ite29, main_#t~ite33, main_#t~ite32, main_#t~ite31, main_#t~ite36, main_#t~ite35, main_#t~ite34, main_#t~ite39, main_#t~ite38, main_#t~ite37, main_#t~ite42, main_#t~ite41, main_#t~ite40, main_#t~ite45, main_#t~ite44, main_#t~ite43, main_#t~ite48, main_#t~ite47, main_#t~ite46, main_#t~ite49, main_~#t2494~0.base, main_~#t2494~0.offset, main_~#t2495~0.base, main_~#t2495~0.offset, main_~#t2496~0.base, main_~#t2496~0.offset; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L774] -1 call main_~#t2494~0.base, main_~#t2494~0.offset := #Ultimate.alloc(4); VAL [#NULL.base=0, #NULL.offset=0, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L775] -1 call write~int(0, main_~#t2494~0.base, main_~#t2494~0.offset, 4); VAL [#NULL.base=0, #NULL.offset=0, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L775] FORK -1 fork 0 P0(0, 0); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L775] -1 havoc main_#t~nondet18; VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L776] -1 call main_~#t2495~0.base, main_~#t2495~0.offset := #Ultimate.alloc(4); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L777] -1 call write~int(1, main_~#t2495~0.base, main_~#t2495~0.offset, 4); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L777] FORK -1 fork 1 P1(0, 0); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L777] -1 havoc main_#t~nondet19; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L778] -1 call main_~#t2496~0.base, main_~#t2496~0.offset := #Ultimate.alloc(4); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L779] -1 call write~int(2, main_~#t2496~0.base, main_~#t2496~0.offset, 4); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L779] FORK -1 fork 2 P2(0, 0); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L734-L762] 0 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset; [L737] 0 ~y$w_buff1~0 := ~y$w_buff0~0; [L738] 0 ~y$w_buff0~0 := 2; [L739] 0 ~y$w_buff1_used~0 := ~y$w_buff0_used~0; [L740] 0 ~y$w_buff0_used~0 := 1; [L741] 0 __VERIFIER_assert_#in~expression := (if !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$w_buff0_used~0 % 256) then 1 else 0); [L741] 0 havoc __VERIFIER_assert_~expression; [L4] 0 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L4] 0 assume !(0 == __VERIFIER_assert_~expression); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L742] 0 ~y$r_buff1_thd0~0 := ~y$r_buff0_thd0~0; [L743] 0 ~y$r_buff1_thd1~0 := ~y$r_buff0_thd1~0; [L744] 0 ~y$r_buff1_thd2~0 := ~y$r_buff0_thd2~0; [L745] 0 ~y$r_buff1_thd3~0 := ~y$r_buff0_thd3~0; [L746] 0 ~y$r_buff0_thd3~0 := 1; [L749] 0 ~z~0 := 1; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L699-L713] 1 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset; [L702] 1 ~z~0 := 2; [L705] 1 ~x~0 := 1; [L710] 1 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=2] [L752] 0 assume 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256; [L752] 0 #t~ite12 := ~y$w_buff0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite12=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=2] [L714-L733] 2 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset; [L717] 2 ~x~0 := 2; [L720] 2 ~y~0 := 1; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite12=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=2] [L752] 0 ~y~0 := #t~ite12; [L752] 0 havoc #t~ite11; [L752] 0 havoc #t~ite12; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L753] 0 assume 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256; [L753] 0 #t~ite13 := 0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite13=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L753] 0 ~y$w_buff0_used~0 := #t~ite13; [L753] 0 havoc #t~ite13; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L754] 0 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd3~0 % 256)); [L754] 0 #t~ite14 := ~y$w_buff1_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite14=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L754] 0 ~y$w_buff1_used~0 := #t~ite14; [L754] 0 havoc #t~ite14; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L755] 0 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256); [L755] 0 #t~ite15 := ~y$r_buff0_thd3~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite15=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L755] 0 ~y$r_buff0_thd3~0 := #t~ite15; [L755] 0 havoc #t~ite15; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L756] 0 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd3~0 % 256)); [L756] 0 #t~ite16 := ~y$r_buff1_thd3~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite16=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L756] 0 ~y$r_buff1_thd3~0 := #t~ite16; [L756] 0 havoc #t~ite16; [L759] 0 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=2, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L723] 2 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=2, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L723] 2 assume !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256); [L723] 2 #t~ite4 := ~y~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=2, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L723] 2 #t~ite5 := #t~ite4; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite4=2, #t~ite5=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=2, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L723] 2 ~y~0 := #t~ite5; [L723] 2 havoc #t~ite5; [L723] 2 havoc #t~ite4; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=2, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L724] 2 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256); [L724] 2 #t~ite6 := ~y$w_buff0_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite6=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=2, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L724] 2 ~y$w_buff0_used~0 := #t~ite6; [L724] 2 havoc #t~ite6; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=2, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L725] 2 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)); [L725] 2 #t~ite7 := ~y$w_buff1_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite7=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=2, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L725] 2 ~y$w_buff1_used~0 := #t~ite7; [L725] 2 havoc #t~ite7; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=2, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L726] 2 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256); [L726] 2 #t~ite8 := ~y$r_buff0_thd2~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite8=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=2, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L726] 2 ~y$r_buff0_thd2~0 := #t~ite8; [L726] 2 havoc #t~ite8; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=2, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L727] 2 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)); [L727] 2 #t~ite9 := ~y$r_buff1_thd2~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite9=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=2, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L727] 2 ~y$r_buff1_thd2~0 := #t~ite9; [L727] 2 havoc #t~ite9; [L730] 2 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=3, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L779] -1 havoc main_#t~nondet20; [L781] -1 ~main$tmp_guard0~0 := (if 0 == (if 3 == ~__unbuffered_cnt~0 then 1 else 0) then 0 else 1); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=3, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L783] -1 assume 0 != ~main$tmp_guard0~0 % 256; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=3, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L785] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=3, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L785] -1 assume !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256); [L785] -1 main_#t~ite21 := ~y~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite21=2, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=3, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L785] -1 main_#t~ite22 := main_#t~ite21; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite21=2, main_#t~ite22=2, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=3, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L785] -1 ~y~0 := main_#t~ite22; [L785] -1 havoc main_#t~ite21; [L785] -1 havoc main_#t~ite22; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=3, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L786] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256); [L786] -1 main_#t~ite23 := ~y$w_buff0_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite23=0, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=3, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L786] -1 ~y$w_buff0_used~0 := main_#t~ite23; [L786] -1 havoc main_#t~ite23; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=3, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L787] -1 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)); [L787] -1 main_#t~ite24 := ~y$w_buff1_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite24=0, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=3, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L787] -1 ~y$w_buff1_used~0 := main_#t~ite24; [L787] -1 havoc main_#t~ite24; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=3, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L788] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256); [L788] -1 main_#t~ite25 := ~y$r_buff0_thd0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite25=0, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=3, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L788] -1 ~y$r_buff0_thd0~0 := main_#t~ite25; [L788] -1 havoc main_#t~ite25; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=3, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L789] -1 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)); [L789] -1 main_#t~ite26 := ~y$r_buff1_thd0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite26=0, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=3, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L789] -1 ~y$r_buff1_thd0~0 := main_#t~ite26; [L789] -1 havoc main_#t~ite26; [L792] -1 ~weak$$choice0~0 := (if 0 == main_#t~nondet27.base + main_#t~nondet27.offset then 0 else 1); [L792] -1 havoc main_#t~nondet27.base, main_#t~nondet27.offset; [L793] -1 ~weak$$choice2~0 := (if 0 == main_#t~nondet28.base + main_#t~nondet28.offset then 0 else 1); [L793] -1 havoc main_#t~nondet28.base, main_#t~nondet28.offset; [L794] -1 ~y$flush_delayed~0 := ~weak$$choice2~0; [L795] -1 ~y$mem_tmp~0 := ~y~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=3, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L796] -1 assume (0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd0~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd0~0 % 256 && 0 == ~y$r_buff1_thd0~0 % 256); [L796] -1 main_#t~ite30 := ~y~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite30=2, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=3, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L796] -1 ~y~0 := main_#t~ite30; [L796] -1 havoc main_#t~ite29; [L796] -1 havoc main_#t~ite30; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=3, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L797] -1 assume 0 != ~weak$$choice2~0 % 256; [L797] -1 main_#t~ite33 := ~y$w_buff0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite33=2, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=3, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L797] -1 ~y$w_buff0~0 := main_#t~ite33; [L797] -1 havoc main_#t~ite33; [L797] -1 havoc main_#t~ite32; [L797] -1 havoc main_#t~ite31; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=3, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L798] -1 assume 0 != ~weak$$choice2~0 % 256; [L798] -1 main_#t~ite36 := ~y$w_buff1~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite36=0, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=3, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L798] -1 ~y$w_buff1~0 := main_#t~ite36; [L798] -1 havoc main_#t~ite36; [L798] -1 havoc main_#t~ite34; [L798] -1 havoc main_#t~ite35; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=3, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L799] -1 assume 0 != ~weak$$choice2~0 % 256; [L799] -1 main_#t~ite39 := ~y$w_buff0_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite39=0, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=3, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L799] -1 ~y$w_buff0_used~0 := main_#t~ite39; [L799] -1 havoc main_#t~ite37; [L799] -1 havoc main_#t~ite38; [L799] -1 havoc main_#t~ite39; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=3, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L800] -1 assume 0 != ~weak$$choice2~0 % 256; [L800] -1 main_#t~ite42 := ~y$w_buff1_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite42=0, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=3, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L800] -1 ~y$w_buff1_used~0 := main_#t~ite42; [L800] -1 havoc main_#t~ite41; [L800] -1 havoc main_#t~ite40; [L800] -1 havoc main_#t~ite42; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=3, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L801] -1 assume 0 != ~weak$$choice2~0 % 256; [L801] -1 main_#t~ite45 := ~y$r_buff0_thd0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite45=0, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=3, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L801] -1 ~y$r_buff0_thd0~0 := main_#t~ite45; [L801] -1 havoc main_#t~ite44; [L801] -1 havoc main_#t~ite45; [L801] -1 havoc main_#t~ite43; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=3, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L802] -1 assume 0 != ~weak$$choice2~0 % 256; [L802] -1 main_#t~ite48 := ~y$r_buff1_thd0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite48=0, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=3, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L802] -1 ~y$r_buff1_thd0~0 := main_#t~ite48; [L802] -1 havoc main_#t~ite46; [L802] -1 havoc main_#t~ite48; [L802] -1 havoc main_#t~ite47; [L803] -1 ~main$tmp_guard1~0 := (if 0 == (if !((2 == ~x~0 && 2 == ~y~0) && 2 == ~z~0) then 1 else 0) then 0 else 1); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=3, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L804] -1 assume 0 != ~y$flush_delayed~0 % 256; [L804] -1 main_#t~ite49 := ~y$mem_tmp~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite49=2, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=3, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L804] -1 ~y~0 := main_#t~ite49; [L804] -1 havoc main_#t~ite49; [L805] -1 ~y$flush_delayed~0 := 0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=3, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L807] -1 __VERIFIER_assert_#in~expression := ~main$tmp_guard1~0 % 256; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=3, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L807] -1 havoc __VERIFIER_assert_~expression; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=3, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L4] -1 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=0, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=3, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L4] -1 assume 0 == __VERIFIER_assert_~expression; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=0, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=3, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L4] -1 assert false; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=0, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=3, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] ----- ----- class de.uni_freiburg.informatik.ultimate.boogie.preprocessor.BoogiePreprocessorBacktranslator [?] -1 #NULL.base, #NULL.offset := 0, 0; VAL [#NULL.base=0, #NULL.offset=0] [?] -1 #valid := #valid[0 := 0]; VAL [#NULL.base=0, #NULL.offset=0] [L672] -1 ~__unbuffered_cnt~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0] [L673] -1 ~main$tmp_guard0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0] [L674] -1 ~main$tmp_guard1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [L676] -1 ~x~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [L678] -1 ~y~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0] [L679] -1 ~y$flush_delayed~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y~0=0] [L680] -1 ~y$mem_tmp~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y~0=0] [L681] -1 ~y$r_buff0_thd0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y~0=0] [L682] -1 ~y$r_buff0_thd1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y~0=0] [L683] -1 ~y$r_buff0_thd2~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y~0=0] [L684] -1 ~y$r_buff0_thd3~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y~0=0] [L685] -1 ~y$r_buff1_thd0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y~0=0] [L686] -1 ~y$r_buff1_thd1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y~0=0] [L687] -1 ~y$r_buff1_thd2~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y~0=0] [L688] -1 ~y$r_buff1_thd3~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y~0=0] [L689] -1 ~y$read_delayed~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed~0=0, ~y~0=0] [L690] -1 ~y$read_delayed_var~0.base, ~y$read_delayed_var~0.offset := 0, 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y~0=0] [L691] -1 ~y$w_buff0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0~0=0, ~y~0=0] [L692] -1 ~y$w_buff0_used~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y~0=0] [L693] -1 ~y$w_buff1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1~0=0, ~y~0=0] [L694] -1 ~y$w_buff1_used~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L696] -1 ~z~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L697] -1 ~weak$$choice0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L698] -1 ~weak$$choice2~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 havoc main_#res; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 havoc main_#t~nondet18, main_#t~nondet19, main_#t~nondet20, main_#t~ite22, main_#t~ite21, main_#t~ite23, main_#t~ite24, main_#t~ite25, main_#t~ite26, main_#t~nondet27.base, main_#t~nondet27.offset, main_#t~nondet28.base, main_#t~nondet28.offset, main_#t~ite30, main_#t~ite29, main_#t~ite33, main_#t~ite32, main_#t~ite31, main_#t~ite36, main_#t~ite35, main_#t~ite34, main_#t~ite39, main_#t~ite38, main_#t~ite37, main_#t~ite42, main_#t~ite41, main_#t~ite40, main_#t~ite45, main_#t~ite44, main_#t~ite43, main_#t~ite48, main_#t~ite47, main_#t~ite46, main_#t~ite49, main_~#t2494~0.base, main_~#t2494~0.offset, main_~#t2495~0.base, main_~#t2495~0.offset, main_~#t2496~0.base, main_~#t2496~0.offset; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L774] -1 call main_~#t2494~0.base, main_~#t2494~0.offset := #Ultimate.alloc(4); VAL [#NULL.base=0, #NULL.offset=0, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L775] -1 call write~int(0, main_~#t2494~0.base, main_~#t2494~0.offset, 4); VAL [#NULL.base=0, #NULL.offset=0, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L775] FORK -1 fork 0 P0(0, 0); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L775] -1 havoc main_#t~nondet18; VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L776] -1 call main_~#t2495~0.base, main_~#t2495~0.offset := #Ultimate.alloc(4); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L777] -1 call write~int(1, main_~#t2495~0.base, main_~#t2495~0.offset, 4); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L777] FORK -1 fork 1 P1(0, 0); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L777] -1 havoc main_#t~nondet19; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L778] -1 call main_~#t2496~0.base, main_~#t2496~0.offset := #Ultimate.alloc(4); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L779] -1 call write~int(2, main_~#t2496~0.base, main_~#t2496~0.offset, 4); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L779] FORK -1 fork 2 P2(0, 0); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L734-L762] 0 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset; [L737] 0 ~y$w_buff1~0 := ~y$w_buff0~0; [L738] 0 ~y$w_buff0~0 := 2; [L739] 0 ~y$w_buff1_used~0 := ~y$w_buff0_used~0; [L740] 0 ~y$w_buff0_used~0 := 1; [L741] 0 __VERIFIER_assert_#in~expression := (if !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$w_buff0_used~0 % 256) then 1 else 0); [L741] 0 havoc __VERIFIER_assert_~expression; [L4] 0 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L4] 0 assume !(0 == __VERIFIER_assert_~expression); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L742] 0 ~y$r_buff1_thd0~0 := ~y$r_buff0_thd0~0; [L743] 0 ~y$r_buff1_thd1~0 := ~y$r_buff0_thd1~0; [L744] 0 ~y$r_buff1_thd2~0 := ~y$r_buff0_thd2~0; [L745] 0 ~y$r_buff1_thd3~0 := ~y$r_buff0_thd3~0; [L746] 0 ~y$r_buff0_thd3~0 := 1; [L749] 0 ~z~0 := 1; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L699-L713] 1 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset; [L702] 1 ~z~0 := 2; [L705] 1 ~x~0 := 1; [L710] 1 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=2] [L752] 0 assume 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256; [L752] 0 #t~ite12 := ~y$w_buff0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite12=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=1, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=2] [L714-L733] 2 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset; [L717] 2 ~x~0 := 2; [L720] 2 ~y~0 := 1; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite12=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=2] [L752] 0 ~y~0 := #t~ite12; [L752] 0 havoc #t~ite11; [L752] 0 havoc #t~ite12; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L753] 0 assume 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256; [L753] 0 #t~ite13 := 0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite13=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L753] 0 ~y$w_buff0_used~0 := #t~ite13; [L753] 0 havoc #t~ite13; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L754] 0 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd3~0 % 256)); [L754] 0 #t~ite14 := ~y$w_buff1_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite14=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L754] 0 ~y$w_buff1_used~0 := #t~ite14; [L754] 0 havoc #t~ite14; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L755] 0 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256); [L755] 0 #t~ite15 := ~y$r_buff0_thd3~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite15=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L755] 0 ~y$r_buff0_thd3~0 := #t~ite15; [L755] 0 havoc #t~ite15; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L756] 0 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd3~0 % 256)); [L756] 0 #t~ite16 := ~y$r_buff1_thd3~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite16=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L756] 0 ~y$r_buff1_thd3~0 := #t~ite16; [L756] 0 havoc #t~ite16; [L759] 0 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=2, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L723] 2 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=2, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L723] 2 assume !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256); [L723] 2 #t~ite4 := ~y~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=2, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L723] 2 #t~ite5 := #t~ite4; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite4=2, #t~ite5=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=2, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L723] 2 ~y~0 := #t~ite5; [L723] 2 havoc #t~ite5; [L723] 2 havoc #t~ite4; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=2, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L724] 2 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256); [L724] 2 #t~ite6 := ~y$w_buff0_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite6=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=2, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L724] 2 ~y$w_buff0_used~0 := #t~ite6; [L724] 2 havoc #t~ite6; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=2, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L725] 2 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)); [L725] 2 #t~ite7 := ~y$w_buff1_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite7=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=2, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L725] 2 ~y$w_buff1_used~0 := #t~ite7; [L725] 2 havoc #t~ite7; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=2, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L726] 2 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256); [L726] 2 #t~ite8 := ~y$r_buff0_thd2~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite8=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=2, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L726] 2 ~y$r_buff0_thd2~0 := #t~ite8; [L726] 2 havoc #t~ite8; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=2, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L727] 2 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)); [L727] 2 #t~ite9 := ~y$r_buff1_thd2~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite9=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=2, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L727] 2 ~y$r_buff1_thd2~0 := #t~ite9; [L727] 2 havoc #t~ite9; [L730] 2 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=3, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L779] -1 havoc main_#t~nondet20; [L781] -1 ~main$tmp_guard0~0 := (if 0 == (if 3 == ~__unbuffered_cnt~0 then 1 else 0) then 0 else 1); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=3, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L783] -1 assume 0 != ~main$tmp_guard0~0 % 256; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=3, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L785] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=3, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L785] -1 assume !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256); [L785] -1 main_#t~ite21 := ~y~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite21=2, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=3, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L785] -1 main_#t~ite22 := main_#t~ite21; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite21=2, main_#t~ite22=2, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=3, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L785] -1 ~y~0 := main_#t~ite22; [L785] -1 havoc main_#t~ite21; [L785] -1 havoc main_#t~ite22; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=3, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L786] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256); [L786] -1 main_#t~ite23 := ~y$w_buff0_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite23=0, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=3, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L786] -1 ~y$w_buff0_used~0 := main_#t~ite23; [L786] -1 havoc main_#t~ite23; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=3, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L787] -1 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)); [L787] -1 main_#t~ite24 := ~y$w_buff1_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite24=0, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=3, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L787] -1 ~y$w_buff1_used~0 := main_#t~ite24; [L787] -1 havoc main_#t~ite24; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=3, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L788] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256); [L788] -1 main_#t~ite25 := ~y$r_buff0_thd0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite25=0, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=3, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L788] -1 ~y$r_buff0_thd0~0 := main_#t~ite25; [L788] -1 havoc main_#t~ite25; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=3, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L789] -1 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)); [L789] -1 main_#t~ite26 := ~y$r_buff1_thd0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite26=0, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=3, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L789] -1 ~y$r_buff1_thd0~0 := main_#t~ite26; [L789] -1 havoc main_#t~ite26; [L792] -1 ~weak$$choice0~0 := (if 0 == main_#t~nondet27.base + main_#t~nondet27.offset then 0 else 1); [L792] -1 havoc main_#t~nondet27.base, main_#t~nondet27.offset; [L793] -1 ~weak$$choice2~0 := (if 0 == main_#t~nondet28.base + main_#t~nondet28.offset then 0 else 1); [L793] -1 havoc main_#t~nondet28.base, main_#t~nondet28.offset; [L794] -1 ~y$flush_delayed~0 := ~weak$$choice2~0; [L795] -1 ~y$mem_tmp~0 := ~y~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=3, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L796] -1 assume (0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd0~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd0~0 % 256 && 0 == ~y$r_buff1_thd0~0 % 256); [L796] -1 main_#t~ite30 := ~y~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite30=2, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=3, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L796] -1 ~y~0 := main_#t~ite30; [L796] -1 havoc main_#t~ite29; [L796] -1 havoc main_#t~ite30; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=3, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L797] -1 assume 0 != ~weak$$choice2~0 % 256; [L797] -1 main_#t~ite33 := ~y$w_buff0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite33=2, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=3, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L797] -1 ~y$w_buff0~0 := main_#t~ite33; [L797] -1 havoc main_#t~ite33; [L797] -1 havoc main_#t~ite32; [L797] -1 havoc main_#t~ite31; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=3, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L798] -1 assume 0 != ~weak$$choice2~0 % 256; [L798] -1 main_#t~ite36 := ~y$w_buff1~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite36=0, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=3, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L798] -1 ~y$w_buff1~0 := main_#t~ite36; [L798] -1 havoc main_#t~ite36; [L798] -1 havoc main_#t~ite34; [L798] -1 havoc main_#t~ite35; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=3, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L799] -1 assume 0 != ~weak$$choice2~0 % 256; [L799] -1 main_#t~ite39 := ~y$w_buff0_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite39=0, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=3, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L799] -1 ~y$w_buff0_used~0 := main_#t~ite39; [L799] -1 havoc main_#t~ite37; [L799] -1 havoc main_#t~ite38; [L799] -1 havoc main_#t~ite39; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=3, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L800] -1 assume 0 != ~weak$$choice2~0 % 256; [L800] -1 main_#t~ite42 := ~y$w_buff1_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite42=0, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=3, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L800] -1 ~y$w_buff1_used~0 := main_#t~ite42; [L800] -1 havoc main_#t~ite41; [L800] -1 havoc main_#t~ite40; [L800] -1 havoc main_#t~ite42; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=3, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L801] -1 assume 0 != ~weak$$choice2~0 % 256; [L801] -1 main_#t~ite45 := ~y$r_buff0_thd0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite45=0, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=3, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L801] -1 ~y$r_buff0_thd0~0 := main_#t~ite45; [L801] -1 havoc main_#t~ite44; [L801] -1 havoc main_#t~ite45; [L801] -1 havoc main_#t~ite43; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=3, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L802] -1 assume 0 != ~weak$$choice2~0 % 256; [L802] -1 main_#t~ite48 := ~y$r_buff1_thd0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite48=0, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=3, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L802] -1 ~y$r_buff1_thd0~0 := main_#t~ite48; [L802] -1 havoc main_#t~ite46; [L802] -1 havoc main_#t~ite48; [L802] -1 havoc main_#t~ite47; [L803] -1 ~main$tmp_guard1~0 := (if 0 == (if !((2 == ~x~0 && 2 == ~y~0) && 2 == ~z~0) then 1 else 0) then 0 else 1); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=3, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L804] -1 assume 0 != ~y$flush_delayed~0 % 256; [L804] -1 main_#t~ite49 := ~y$mem_tmp~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite49=2, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=3, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L804] -1 ~y~0 := main_#t~ite49; [L804] -1 havoc main_#t~ite49; [L805] -1 ~y$flush_delayed~0 := 0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=3, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L807] -1 __VERIFIER_assert_#in~expression := ~main$tmp_guard1~0 % 256; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=3, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L807] -1 havoc __VERIFIER_assert_~expression; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=3, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L4] -1 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=0, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=3, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L4] -1 assume 0 == __VERIFIER_assert_~expression; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=0, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=3, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L4] -1 assert false; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=0, __VERIFIER_assert_~expression=1, main_~#t2494~0.base=7, main_~#t2494~0.offset=0, main_~#t2495~0.base=5, main_~#t2495~0.offset=0, main_~#t2496~0.base=6, main_~#t2496~0.offset=0, ~__unbuffered_cnt~0=3, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 #NULL := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0] [?] -1 #valid[0] := 0; VAL [#NULL!base=0, #NULL!offset=0] [L672] -1 ~__unbuffered_cnt~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0] [L673] -1 ~main$tmp_guard0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0] [L674] -1 ~main$tmp_guard1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [L676] -1 ~x~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [L678] -1 ~y~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0] [L679] -1 ~y$flush_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y~0=0] [L680] -1 ~y$mem_tmp~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y~0=0] [L681] -1 ~y$r_buff0_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y~0=0] [L682] -1 ~y$r_buff0_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y~0=0] [L683] -1 ~y$r_buff0_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y~0=0] [L684] -1 ~y$r_buff0_thd3~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y~0=0] [L685] -1 ~y$r_buff1_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y~0=0] [L686] -1 ~y$r_buff1_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y~0=0] [L687] -1 ~y$r_buff1_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y~0=0] [L688] -1 ~y$r_buff1_thd3~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y~0=0] [L689] -1 ~y$read_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed~0=0, ~y~0=0] [L690] -1 ~y$read_delayed_var~0 := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y~0=0] [L691] -1 ~y$w_buff0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0~0=0, ~y~0=0] [L692] -1 ~y$w_buff0_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y~0=0] [L693] -1 ~y$w_buff1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1~0=0, ~y~0=0] [L694] -1 ~y$w_buff1_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L696] -1 ~z~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L697] -1 ~weak$$choice0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L698] -1 ~weak$$choice2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 havoc main_#res; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 havoc main_#t~nondet18, main_#t~nondet19, main_#t~nondet20, main_#t~ite22, main_#t~ite21, main_#t~ite23, main_#t~ite24, main_#t~ite25, main_#t~ite26, main_#t~nondet27, main_#t~nondet28, main_#t~ite30, main_#t~ite29, main_#t~ite33, main_#t~ite32, main_#t~ite31, main_#t~ite36, main_#t~ite35, main_#t~ite34, main_#t~ite39, main_#t~ite38, main_#t~ite37, main_#t~ite42, main_#t~ite41, main_#t~ite40, main_#t~ite45, main_#t~ite44, main_#t~ite43, main_#t~ite48, main_#t~ite47, main_#t~ite46, main_#t~ite49, main_~#t2494~0, main_~#t2495~0, main_~#t2496~0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L774] FCALL -1 call main_~#t2494~0 := #Ultimate.alloc(4); VAL [#NULL!base=0, #NULL!offset=0, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L775] FCALL -1 call write~int(0, main_~#t2494~0, 4); VAL [#NULL!base=0, #NULL!offset=0, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L775] FORK -1 fork 0 P0({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L775] -1 havoc main_#t~nondet18; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L776] FCALL -1 call main_~#t2495~0 := #Ultimate.alloc(4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L777] FCALL -1 call write~int(1, main_~#t2495~0, 4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L777] FORK -1 fork 1 P1({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L777] -1 havoc main_#t~nondet19; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L778] FCALL -1 call main_~#t2496~0 := #Ultimate.alloc(4); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L779] FCALL -1 call write~int(2, main_~#t2496~0, 4); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L779] FORK -1 fork 2 P2({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L734-L762] 0 ~arg := #in~arg; [L737] 0 ~y$w_buff1~0 := ~y$w_buff0~0; [L738] 0 ~y$w_buff0~0 := 2; [L739] 0 ~y$w_buff1_used~0 := ~y$w_buff0_used~0; [L740] 0 ~y$w_buff0_used~0 := 1; [L741] 0 __VERIFIER_assert_#in~expression := (if !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$w_buff0_used~0 % 256) then 1 else 0); [L741] 0 havoc __VERIFIER_assert_~expression; [L4] 0 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L4] COND FALSE 0 !(0 == __VERIFIER_assert_~expression) VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L742] 0 ~y$r_buff1_thd0~0 := ~y$r_buff0_thd0~0; [L743] 0 ~y$r_buff1_thd1~0 := ~y$r_buff0_thd1~0; [L744] 0 ~y$r_buff1_thd2~0 := ~y$r_buff0_thd2~0; [L745] 0 ~y$r_buff1_thd3~0 := ~y$r_buff0_thd3~0; [L746] 0 ~y$r_buff0_thd3~0 := 1; [L749] 0 ~z~0 := 1; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L699-L713] 1 ~arg := #in~arg; [L702] 1 ~z~0 := 2; [L705] 1 ~x~0 := 1; [L710] 1 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=2] [L752] COND TRUE 0 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256 [L752] 0 #t~ite12 := ~y$w_buff0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite12=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=2] [L714-L733] 2 ~arg := #in~arg; [L717] 2 ~x~0 := 2; [L720] 2 ~y~0 := 1; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite12=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=2] [L752] 0 ~y~0 := #t~ite12; [L752] 0 havoc #t~ite11; [L752] 0 havoc #t~ite12; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L753] COND TRUE 0 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256 [L753] 0 #t~ite13 := 0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite13=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L753] 0 ~y$w_buff0_used~0 := #t~ite13; [L753] 0 havoc #t~ite13; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L754] COND FALSE 0 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd3~0 % 256)) [L754] 0 #t~ite14 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite14=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L754] 0 ~y$w_buff1_used~0 := #t~ite14; [L754] 0 havoc #t~ite14; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L755] COND FALSE 0 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256) [L755] 0 #t~ite15 := ~y$r_buff0_thd3~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite15=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L755] 0 ~y$r_buff0_thd3~0 := #t~ite15; [L755] 0 havoc #t~ite15; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L756] COND FALSE 0 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd3~0 % 256)) [L756] 0 #t~ite16 := ~y$r_buff1_thd3~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite16=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L756] 0 ~y$r_buff1_thd3~0 := #t~ite16; [L756] 0 havoc #t~ite16; [L759] 0 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=2, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L723] COND FALSE 2 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=2, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L723] COND FALSE 2 !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256) [L723] 2 #t~ite4 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=2, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L723] 2 #t~ite5 := #t~ite4; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite4=2, #t~ite5=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=2, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L723] 2 ~y~0 := #t~ite5; [L723] 2 havoc #t~ite5; [L723] 2 havoc #t~ite4; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=2, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L724] COND FALSE 2 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) [L724] 2 #t~ite6 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite6=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=2, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L724] 2 ~y$w_buff0_used~0 := #t~ite6; [L724] 2 havoc #t~ite6; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=2, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L725] COND FALSE 2 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)) [L725] 2 #t~ite7 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite7=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=2, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L725] 2 ~y$w_buff1_used~0 := #t~ite7; [L725] 2 havoc #t~ite7; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=2, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L726] COND FALSE 2 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) [L726] 2 #t~ite8 := ~y$r_buff0_thd2~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite8=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=2, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L726] 2 ~y$r_buff0_thd2~0 := #t~ite8; [L726] 2 havoc #t~ite8; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=2, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L727] COND FALSE 2 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)) [L727] 2 #t~ite9 := ~y$r_buff1_thd2~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite9=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=2, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L727] 2 ~y$r_buff1_thd2~0 := #t~ite9; [L727] 2 havoc #t~ite9; [L730] 2 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L779] -1 havoc main_#t~nondet20; [L781] -1 ~main$tmp_guard0~0 := (if 0 == (if 3 == ~__unbuffered_cnt~0 then 1 else 0) then 0 else 1); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L783] -1 assume 0 != ~main$tmp_guard0~0 % 256; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L785] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L785] COND FALSE -1 !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256) [L785] -1 main_#t~ite21 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite21=2, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L785] -1 main_#t~ite22 := main_#t~ite21; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite21=2, main_#t~ite22=2, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L785] -1 ~y~0 := main_#t~ite22; [L785] -1 havoc main_#t~ite21; [L785] -1 havoc main_#t~ite22; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L786] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) [L786] -1 main_#t~ite23 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite23=0, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L786] -1 ~y$w_buff0_used~0 := main_#t~ite23; [L786] -1 havoc main_#t~ite23; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L787] COND FALSE -1 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)) [L787] -1 main_#t~ite24 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite24=0, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L787] -1 ~y$w_buff1_used~0 := main_#t~ite24; [L787] -1 havoc main_#t~ite24; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L788] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) [L788] -1 main_#t~ite25 := ~y$r_buff0_thd0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite25=0, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L788] -1 ~y$r_buff0_thd0~0 := main_#t~ite25; [L788] -1 havoc main_#t~ite25; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L789] COND FALSE -1 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)) [L789] -1 main_#t~ite26 := ~y$r_buff1_thd0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite26=0, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L789] -1 ~y$r_buff1_thd0~0 := main_#t~ite26; [L789] -1 havoc main_#t~ite26; [L792] -1 ~weak$$choice0~0 := (if 0 == main_#t~nondet27!base + main_#t~nondet27!offset then 0 else 1); [L792] -1 havoc main_#t~nondet27; [L793] -1 ~weak$$choice2~0 := (if 0 == main_#t~nondet28!base + main_#t~nondet28!offset then 0 else 1); [L793] -1 havoc main_#t~nondet28; [L794] -1 ~y$flush_delayed~0 := ~weak$$choice2~0; [L795] -1 ~y$mem_tmp~0 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L796] COND TRUE -1 (0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd0~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd0~0 % 256 && 0 == ~y$r_buff1_thd0~0 % 256) [L796] -1 main_#t~ite30 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite30=2, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L796] -1 ~y~0 := main_#t~ite30; [L796] -1 havoc main_#t~ite29; [L796] -1 havoc main_#t~ite30; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L797] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L797] -1 main_#t~ite33 := ~y$w_buff0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite33=2, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L797] -1 ~y$w_buff0~0 := main_#t~ite33; [L797] -1 havoc main_#t~ite33; [L797] -1 havoc main_#t~ite32; [L797] -1 havoc main_#t~ite31; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L798] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L798] -1 main_#t~ite36 := ~y$w_buff1~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite36=0, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L798] -1 ~y$w_buff1~0 := main_#t~ite36; [L798] -1 havoc main_#t~ite36; [L798] -1 havoc main_#t~ite34; [L798] -1 havoc main_#t~ite35; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L799] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L799] -1 main_#t~ite39 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite39=0, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L799] -1 ~y$w_buff0_used~0 := main_#t~ite39; [L799] -1 havoc main_#t~ite37; [L799] -1 havoc main_#t~ite38; [L799] -1 havoc main_#t~ite39; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L800] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L800] -1 main_#t~ite42 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite42=0, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L800] -1 ~y$w_buff1_used~0 := main_#t~ite42; [L800] -1 havoc main_#t~ite41; [L800] -1 havoc main_#t~ite40; [L800] -1 havoc main_#t~ite42; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L801] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L801] -1 main_#t~ite45 := ~y$r_buff0_thd0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite45=0, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L801] -1 ~y$r_buff0_thd0~0 := main_#t~ite45; [L801] -1 havoc main_#t~ite44; [L801] -1 havoc main_#t~ite45; [L801] -1 havoc main_#t~ite43; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L802] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L802] -1 main_#t~ite48 := ~y$r_buff1_thd0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite48=0, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L802] -1 ~y$r_buff1_thd0~0 := main_#t~ite48; [L802] -1 havoc main_#t~ite46; [L802] -1 havoc main_#t~ite48; [L802] -1 havoc main_#t~ite47; [L803] -1 ~main$tmp_guard1~0 := (if 0 == (if !((2 == ~x~0 && 2 == ~y~0) && 2 == ~z~0) then 1 else 0) then 0 else 1); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L804] COND TRUE -1 0 != ~y$flush_delayed~0 % 256 [L804] -1 main_#t~ite49 := ~y$mem_tmp~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite49=2, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L804] -1 ~y~0 := main_#t~ite49; [L804] -1 havoc main_#t~ite49; [L805] -1 ~y$flush_delayed~0 := 0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L807] -1 __VERIFIER_assert_#in~expression := ~main$tmp_guard1~0 % 256; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L807] -1 havoc __VERIFIER_assert_~expression; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L4] -1 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=0, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L4] COND TRUE -1 0 == __VERIFIER_assert_~expression VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=0, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L4] -1 assert false; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=0, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] ----- ----- class de.uni_freiburg.informatik.ultimate.boogie.procedureinliner.backtranslation.InlinerBacktranslator [?] -1 #NULL := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0] [?] -1 #valid[0] := 0; VAL [#NULL!base=0, #NULL!offset=0] [L672] -1 ~__unbuffered_cnt~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0] [L673] -1 ~main$tmp_guard0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0] [L674] -1 ~main$tmp_guard1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [L676] -1 ~x~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [L678] -1 ~y~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0] [L679] -1 ~y$flush_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y~0=0] [L680] -1 ~y$mem_tmp~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y~0=0] [L681] -1 ~y$r_buff0_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y~0=0] [L682] -1 ~y$r_buff0_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y~0=0] [L683] -1 ~y$r_buff0_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y~0=0] [L684] -1 ~y$r_buff0_thd3~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y~0=0] [L685] -1 ~y$r_buff1_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y~0=0] [L686] -1 ~y$r_buff1_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y~0=0] [L687] -1 ~y$r_buff1_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y~0=0] [L688] -1 ~y$r_buff1_thd3~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y~0=0] [L689] -1 ~y$read_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed~0=0, ~y~0=0] [L690] -1 ~y$read_delayed_var~0 := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y~0=0] [L691] -1 ~y$w_buff0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0~0=0, ~y~0=0] [L692] -1 ~y$w_buff0_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y~0=0] [L693] -1 ~y$w_buff1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1~0=0, ~y~0=0] [L694] -1 ~y$w_buff1_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L696] -1 ~z~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L697] -1 ~weak$$choice0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L698] -1 ~weak$$choice2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 havoc main_#res; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [?] -1 havoc main_#t~nondet18, main_#t~nondet19, main_#t~nondet20, main_#t~ite22, main_#t~ite21, main_#t~ite23, main_#t~ite24, main_#t~ite25, main_#t~ite26, main_#t~nondet27, main_#t~nondet28, main_#t~ite30, main_#t~ite29, main_#t~ite33, main_#t~ite32, main_#t~ite31, main_#t~ite36, main_#t~ite35, main_#t~ite34, main_#t~ite39, main_#t~ite38, main_#t~ite37, main_#t~ite42, main_#t~ite41, main_#t~ite40, main_#t~ite45, main_#t~ite44, main_#t~ite43, main_#t~ite48, main_#t~ite47, main_#t~ite46, main_#t~ite49, main_~#t2494~0, main_~#t2495~0, main_~#t2496~0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L774] FCALL -1 call main_~#t2494~0 := #Ultimate.alloc(4); VAL [#NULL!base=0, #NULL!offset=0, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L775] FCALL -1 call write~int(0, main_~#t2494~0, 4); VAL [#NULL!base=0, #NULL!offset=0, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L775] FORK -1 fork 0 P0({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L775] -1 havoc main_#t~nondet18; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L776] FCALL -1 call main_~#t2495~0 := #Ultimate.alloc(4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L777] FCALL -1 call write~int(1, main_~#t2495~0, 4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L777] FORK -1 fork 1 P1({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L777] -1 havoc main_#t~nondet19; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L778] FCALL -1 call main_~#t2496~0 := #Ultimate.alloc(4); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L779] FCALL -1 call write~int(2, main_~#t2496~0, 4); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L779] FORK -1 fork 2 P2({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L734-L762] 0 ~arg := #in~arg; [L737] 0 ~y$w_buff1~0 := ~y$w_buff0~0; [L738] 0 ~y$w_buff0~0 := 2; [L739] 0 ~y$w_buff1_used~0 := ~y$w_buff0_used~0; [L740] 0 ~y$w_buff0_used~0 := 1; [L741] 0 __VERIFIER_assert_#in~expression := (if !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$w_buff0_used~0 % 256) then 1 else 0); [L741] 0 havoc __VERIFIER_assert_~expression; [L4] 0 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L4] COND FALSE 0 !(0 == __VERIFIER_assert_~expression) VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L742] 0 ~y$r_buff1_thd0~0 := ~y$r_buff0_thd0~0; [L743] 0 ~y$r_buff1_thd1~0 := ~y$r_buff0_thd1~0; [L744] 0 ~y$r_buff1_thd2~0 := ~y$r_buff0_thd2~0; [L745] 0 ~y$r_buff1_thd3~0 := ~y$r_buff0_thd3~0; [L746] 0 ~y$r_buff0_thd3~0 := 1; [L749] 0 ~z~0 := 1; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L699-L713] 1 ~arg := #in~arg; [L702] 1 ~z~0 := 2; [L705] 1 ~x~0 := 1; [L710] 1 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=2] [L752] COND TRUE 0 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256 [L752] 0 #t~ite12 := ~y$w_buff0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite12=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=2] [L714-L733] 2 ~arg := #in~arg; [L717] 2 ~x~0 := 2; [L720] 2 ~y~0 := 1; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite12=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=2] [L752] 0 ~y~0 := #t~ite12; [L752] 0 havoc #t~ite11; [L752] 0 havoc #t~ite12; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L753] COND TRUE 0 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256 [L753] 0 #t~ite13 := 0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite13=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L753] 0 ~y$w_buff0_used~0 := #t~ite13; [L753] 0 havoc #t~ite13; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L754] COND FALSE 0 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd3~0 % 256)) [L754] 0 #t~ite14 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite14=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L754] 0 ~y$w_buff1_used~0 := #t~ite14; [L754] 0 havoc #t~ite14; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L755] COND FALSE 0 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256) [L755] 0 #t~ite15 := ~y$r_buff0_thd3~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite15=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L755] 0 ~y$r_buff0_thd3~0 := #t~ite15; [L755] 0 havoc #t~ite15; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L756] COND FALSE 0 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd3~0 % 256)) [L756] 0 #t~ite16 := ~y$r_buff1_thd3~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite16=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L756] 0 ~y$r_buff1_thd3~0 := #t~ite16; [L756] 0 havoc #t~ite16; [L759] 0 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=2, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L723] COND FALSE 2 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=2, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L723] COND FALSE 2 !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256) [L723] 2 #t~ite4 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite4=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=2, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L723] 2 #t~ite5 := #t~ite4; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite4=2, #t~ite5=2, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=2, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L723] 2 ~y~0 := #t~ite5; [L723] 2 havoc #t~ite5; [L723] 2 havoc #t~ite4; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=2, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L724] COND FALSE 2 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) [L724] 2 #t~ite6 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite6=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=2, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L724] 2 ~y$w_buff0_used~0 := #t~ite6; [L724] 2 havoc #t~ite6; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=2, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L725] COND FALSE 2 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)) [L725] 2 #t~ite7 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite7=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=2, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L725] 2 ~y$w_buff1_used~0 := #t~ite7; [L725] 2 havoc #t~ite7; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=2, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L726] COND FALSE 2 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) [L726] 2 #t~ite8 := ~y$r_buff0_thd2~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite8=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=2, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L726] 2 ~y$r_buff0_thd2~0 := #t~ite8; [L726] 2 havoc #t~ite8; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=2, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L727] COND FALSE 2 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)) [L727] 2 #t~ite9 := ~y$r_buff1_thd2~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite9=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=2, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L727] 2 ~y$r_buff1_thd2~0 := #t~ite9; [L727] 2 havoc #t~ite9; [L730] 2 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L779] -1 havoc main_#t~nondet20; [L781] -1 ~main$tmp_guard0~0 := (if 0 == (if 3 == ~__unbuffered_cnt~0 then 1 else 0) then 0 else 1); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L783] -1 assume 0 != ~main$tmp_guard0~0 % 256; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L785] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L785] COND FALSE -1 !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256) [L785] -1 main_#t~ite21 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite21=2, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L785] -1 main_#t~ite22 := main_#t~ite21; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite21=2, main_#t~ite22=2, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L785] -1 ~y~0 := main_#t~ite22; [L785] -1 havoc main_#t~ite21; [L785] -1 havoc main_#t~ite22; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L786] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) [L786] -1 main_#t~ite23 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite23=0, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L786] -1 ~y$w_buff0_used~0 := main_#t~ite23; [L786] -1 havoc main_#t~ite23; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L787] COND FALSE -1 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)) [L787] -1 main_#t~ite24 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite24=0, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L787] -1 ~y$w_buff1_used~0 := main_#t~ite24; [L787] -1 havoc main_#t~ite24; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L788] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) [L788] -1 main_#t~ite25 := ~y$r_buff0_thd0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite25=0, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L788] -1 ~y$r_buff0_thd0~0 := main_#t~ite25; [L788] -1 havoc main_#t~ite25; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L789] COND FALSE -1 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)) [L789] -1 main_#t~ite26 := ~y$r_buff1_thd0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite26=0, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L789] -1 ~y$r_buff1_thd0~0 := main_#t~ite26; [L789] -1 havoc main_#t~ite26; [L792] -1 ~weak$$choice0~0 := (if 0 == main_#t~nondet27!base + main_#t~nondet27!offset then 0 else 1); [L792] -1 havoc main_#t~nondet27; [L793] -1 ~weak$$choice2~0 := (if 0 == main_#t~nondet28!base + main_#t~nondet28!offset then 0 else 1); [L793] -1 havoc main_#t~nondet28; [L794] -1 ~y$flush_delayed~0 := ~weak$$choice2~0; [L795] -1 ~y$mem_tmp~0 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L796] COND TRUE -1 (0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd0~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd0~0 % 256 && 0 == ~y$r_buff1_thd0~0 % 256) [L796] -1 main_#t~ite30 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite30=2, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L796] -1 ~y~0 := main_#t~ite30; [L796] -1 havoc main_#t~ite29; [L796] -1 havoc main_#t~ite30; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L797] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L797] -1 main_#t~ite33 := ~y$w_buff0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite33=2, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L797] -1 ~y$w_buff0~0 := main_#t~ite33; [L797] -1 havoc main_#t~ite33; [L797] -1 havoc main_#t~ite32; [L797] -1 havoc main_#t~ite31; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L798] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L798] -1 main_#t~ite36 := ~y$w_buff1~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite36=0, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L798] -1 ~y$w_buff1~0 := main_#t~ite36; [L798] -1 havoc main_#t~ite36; [L798] -1 havoc main_#t~ite34; [L798] -1 havoc main_#t~ite35; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L799] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L799] -1 main_#t~ite39 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite39=0, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L799] -1 ~y$w_buff0_used~0 := main_#t~ite39; [L799] -1 havoc main_#t~ite37; [L799] -1 havoc main_#t~ite38; [L799] -1 havoc main_#t~ite39; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L800] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L800] -1 main_#t~ite42 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite42=0, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L800] -1 ~y$w_buff1_used~0 := main_#t~ite42; [L800] -1 havoc main_#t~ite41; [L800] -1 havoc main_#t~ite40; [L800] -1 havoc main_#t~ite42; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L801] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L801] -1 main_#t~ite45 := ~y$r_buff0_thd0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite45=0, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L801] -1 ~y$r_buff0_thd0~0 := main_#t~ite45; [L801] -1 havoc main_#t~ite44; [L801] -1 havoc main_#t~ite45; [L801] -1 havoc main_#t~ite43; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L802] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L802] -1 main_#t~ite48 := ~y$r_buff1_thd0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite48=0, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L802] -1 ~y$r_buff1_thd0~0 := main_#t~ite48; [L802] -1 havoc main_#t~ite46; [L802] -1 havoc main_#t~ite48; [L802] -1 havoc main_#t~ite47; [L803] -1 ~main$tmp_guard1~0 := (if 0 == (if !((2 == ~x~0 && 2 == ~y~0) && 2 == ~z~0) then 1 else 0) then 0 else 1); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L804] COND TRUE -1 0 != ~y$flush_delayed~0 % 256 [L804] -1 main_#t~ite49 := ~y$mem_tmp~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite49=2, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L804] -1 ~y~0 := main_#t~ite49; [L804] -1 havoc main_#t~ite49; [L805] -1 ~y$flush_delayed~0 := 0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L807] -1 __VERIFIER_assert_#in~expression := ~main$tmp_guard1~0 % 256; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L807] -1 havoc __VERIFIER_assert_~expression; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L4] -1 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=0, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L4] COND TRUE -1 0 == __VERIFIER_assert_~expression VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=0, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L4] -1 assert false; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=0, __VERIFIER_assert_~expression=1, main_~#t2494~0!base=7, main_~#t2494~0!offset=0, main_~#t2495~0!base=5, main_~#t2495~0!offset=0, main_~#t2496~0!base=6, main_~#t2496~0!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [?] -1 #NULL := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0] [?] -1 #valid[0] := 0; VAL [#NULL!base=0, #NULL!offset=0] [L672] -1 ~__unbuffered_cnt~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0] [L673] -1 ~main$tmp_guard0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0] [L674] -1 ~main$tmp_guard1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [L676] -1 ~x~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [L678] -1 ~y~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0] [L679] -1 ~y$flush_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y~0=0] [L680] -1 ~y$mem_tmp~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y~0=0] [L681] -1 ~y$r_buff0_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y~0=0] [L682] -1 ~y$r_buff0_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y~0=0] [L683] -1 ~y$r_buff0_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y~0=0] [L684] -1 ~y$r_buff0_thd3~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y~0=0] [L685] -1 ~y$r_buff1_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y~0=0] [L686] -1 ~y$r_buff1_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y~0=0] [L687] -1 ~y$r_buff1_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y~0=0] [L688] -1 ~y$r_buff1_thd3~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y~0=0] [L689] -1 ~y$read_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed~0=0, ~y~0=0] [L690] -1 ~y$read_delayed_var~0 := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y~0=0] [L691] -1 ~y$w_buff0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0~0=0, ~y~0=0] [L692] -1 ~y$w_buff0_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y~0=0] [L693] -1 ~y$w_buff1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1~0=0, ~y~0=0] [L694] -1 ~y$w_buff1_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L696] -1 ~z~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L697] -1 ~weak$$choice0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L698] -1 ~weak$$choice2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L774] FCALL -1 call ~#t2494~0 := #Ultimate.alloc(4); VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L775] FCALL -1 call write~int(0, ~#t2494~0, 4); VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L775] FORK -1 fork 0 P0({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L775] -1 havoc #t~nondet18; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L776] FCALL -1 call ~#t2495~0 := #Ultimate.alloc(4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L777] FCALL -1 call write~int(1, ~#t2495~0, 4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L777] FORK -1 fork 1 P1({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L777] -1 havoc #t~nondet19; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L778] FCALL -1 call ~#t2496~0 := #Ultimate.alloc(4); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L779] FCALL -1 call write~int(2, ~#t2496~0, 4); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L779] FORK -1 fork 2 P2({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L734-L762] 0 ~arg := #in~arg; [L737] 0 ~y$w_buff1~0 := ~y$w_buff0~0; [L738] 0 ~y$w_buff0~0 := 2; [L739] 0 ~y$w_buff1_used~0 := ~y$w_buff0_used~0; [L740] 0 ~y$w_buff0_used~0 := 1; [L4] 0 ~expression := #in~expression; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L4] COND FALSE 0 !(0 == ~expression) VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L742] 0 ~y$r_buff1_thd0~0 := ~y$r_buff0_thd0~0; [L743] 0 ~y$r_buff1_thd1~0 := ~y$r_buff0_thd1~0; [L744] 0 ~y$r_buff1_thd2~0 := ~y$r_buff0_thd2~0; [L745] 0 ~y$r_buff1_thd3~0 := ~y$r_buff0_thd3~0; [L746] 0 ~y$r_buff0_thd3~0 := 1; [L749] 0 ~z~0 := 1; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L699-L713] 1 ~arg := #in~arg; [L702] 1 ~z~0 := 2; [L705] 1 ~x~0 := 1; [L710] 1 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=2] [L752] COND TRUE 0 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256 [L752] 0 #t~ite12 := ~y$w_buff0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=2] [L714-L733] 2 ~arg := #in~arg; [L717] 2 ~x~0 := 2; [L720] 2 ~y~0 := 1; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=2] [L752] 0 ~y~0 := #t~ite12; [L752] 0 havoc #t~ite11; [L752] 0 havoc #t~ite12; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L753] COND TRUE 0 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256 [L753] 0 #t~ite13 := 0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L753] 0 ~y$w_buff0_used~0 := #t~ite13; [L753] 0 havoc #t~ite13; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L754] COND FALSE 0 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd3~0 % 256)) [L754] 0 #t~ite14 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L754] 0 ~y$w_buff1_used~0 := #t~ite14; [L754] 0 havoc #t~ite14; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L755] COND FALSE 0 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256) [L755] 0 #t~ite15 := ~y$r_buff0_thd3~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L755] 0 ~y$r_buff0_thd3~0 := #t~ite15; [L755] 0 havoc #t~ite15; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L756] COND FALSE 0 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd3~0 % 256)) [L756] 0 #t~ite16 := ~y$r_buff1_thd3~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L756] 0 ~y$r_buff1_thd3~0 := #t~ite16; [L756] 0 havoc #t~ite16; [L759] 0 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L723] COND FALSE 2 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L723] COND FALSE 2 !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256) [L723] 2 #t~ite4 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite4=2, ~__unbuffered_cnt~0=2, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L723] 2 #t~ite5 := #t~ite4; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite4=2, #t~ite5=2, ~__unbuffered_cnt~0=2, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L723] 2 ~y~0 := #t~ite5; [L723] 2 havoc #t~ite5; [L723] 2 havoc #t~ite4; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L724] COND FALSE 2 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) [L724] 2 #t~ite6 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite6=0, ~__unbuffered_cnt~0=2, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L724] 2 ~y$w_buff0_used~0 := #t~ite6; [L724] 2 havoc #t~ite6; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L725] COND FALSE 2 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)) [L725] 2 #t~ite7 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite7=0, ~__unbuffered_cnt~0=2, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L725] 2 ~y$w_buff1_used~0 := #t~ite7; [L725] 2 havoc #t~ite7; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L726] COND FALSE 2 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) [L726] 2 #t~ite8 := ~y$r_buff0_thd2~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite8=0, ~__unbuffered_cnt~0=2, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L726] 2 ~y$r_buff0_thd2~0 := #t~ite8; [L726] 2 havoc #t~ite8; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L727] COND FALSE 2 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)) [L727] 2 #t~ite9 := ~y$r_buff1_thd2~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite9=0, ~__unbuffered_cnt~0=2, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L727] 2 ~y$r_buff1_thd2~0 := #t~ite9; [L727] 2 havoc #t~ite9; [L730] 2 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L779] -1 havoc #t~nondet20; [L781] -1 ~main$tmp_guard0~0 := (if 0 == (if 3 == ~__unbuffered_cnt~0 then 1 else 0) then 0 else 1); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L783] -1 assume 0 != ~main$tmp_guard0~0 % 256; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L785] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L785] COND FALSE -1 !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256) [L785] -1 #t~ite21 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L785] -1 #t~ite22 := #t~ite21; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L785] -1 ~y~0 := #t~ite22; [L785] -1 havoc #t~ite21; [L785] -1 havoc #t~ite22; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L786] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) [L786] -1 #t~ite23 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L786] -1 ~y$w_buff0_used~0 := #t~ite23; [L786] -1 havoc #t~ite23; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L787] COND FALSE -1 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)) [L787] -1 #t~ite24 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L787] -1 ~y$w_buff1_used~0 := #t~ite24; [L787] -1 havoc #t~ite24; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L788] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) [L788] -1 #t~ite25 := ~y$r_buff0_thd0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L788] -1 ~y$r_buff0_thd0~0 := #t~ite25; [L788] -1 havoc #t~ite25; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L789] COND FALSE -1 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)) [L789] -1 #t~ite26 := ~y$r_buff1_thd0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L789] -1 ~y$r_buff1_thd0~0 := #t~ite26; [L789] -1 havoc #t~ite26; [L792] -1 ~weak$$choice0~0 := (if 0 == #t~nondet27!base + #t~nondet27!offset then 0 else 1); [L792] -1 havoc #t~nondet27; [L793] -1 ~weak$$choice2~0 := (if 0 == #t~nondet28!base + #t~nondet28!offset then 0 else 1); [L793] -1 havoc #t~nondet28; [L794] -1 ~y$flush_delayed~0 := ~weak$$choice2~0; [L795] -1 ~y$mem_tmp~0 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L796] COND TRUE -1 (0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd0~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd0~0 % 256 && 0 == ~y$r_buff1_thd0~0 % 256) [L796] -1 #t~ite30 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L796] -1 ~y~0 := #t~ite30; [L796] -1 havoc #t~ite29; [L796] -1 havoc #t~ite30; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L797] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L797] -1 #t~ite33 := ~y$w_buff0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L797] -1 ~y$w_buff0~0 := #t~ite33; [L797] -1 havoc #t~ite33; [L797] -1 havoc #t~ite32; [L797] -1 havoc #t~ite31; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L798] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L798] -1 #t~ite36 := ~y$w_buff1~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L798] -1 ~y$w_buff1~0 := #t~ite36; [L798] -1 havoc #t~ite36; [L798] -1 havoc #t~ite34; [L798] -1 havoc #t~ite35; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L799] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L799] -1 #t~ite39 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L799] -1 ~y$w_buff0_used~0 := #t~ite39; [L799] -1 havoc #t~ite37; [L799] -1 havoc #t~ite38; [L799] -1 havoc #t~ite39; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L800] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L800] -1 #t~ite42 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L800] -1 ~y$w_buff1_used~0 := #t~ite42; [L800] -1 havoc #t~ite41; [L800] -1 havoc #t~ite40; [L800] -1 havoc #t~ite42; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L801] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L801] -1 #t~ite45 := ~y$r_buff0_thd0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L801] -1 ~y$r_buff0_thd0~0 := #t~ite45; [L801] -1 havoc #t~ite44; [L801] -1 havoc #t~ite45; [L801] -1 havoc #t~ite43; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L802] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L802] -1 #t~ite48 := ~y$r_buff1_thd0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L802] -1 ~y$r_buff1_thd0~0 := #t~ite48; [L802] -1 havoc #t~ite46; [L802] -1 havoc #t~ite48; [L802] -1 havoc #t~ite47; [L803] -1 ~main$tmp_guard1~0 := (if 0 == (if !((2 == ~x~0 && 2 == ~y~0) && 2 == ~z~0) then 1 else 0) then 0 else 1); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L804] COND TRUE -1 0 != ~y$flush_delayed~0 % 256 [L804] -1 #t~ite49 := ~y$mem_tmp~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L804] -1 ~y~0 := #t~ite49; [L804] -1 havoc #t~ite49; [L805] -1 ~y$flush_delayed~0 := 0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L4] -1 ~expression := #in~expression; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L4] COND TRUE -1 0 == ~expression VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L4] -1 assert false; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] ----- ----- class de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.CACSL2BoogieBacktranslator [?] -1 #NULL := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0] [?] -1 #valid[0] := 0; VAL [#NULL!base=0, #NULL!offset=0] [L672] -1 ~__unbuffered_cnt~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0] [L673] -1 ~main$tmp_guard0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0] [L674] -1 ~main$tmp_guard1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [L676] -1 ~x~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [L678] -1 ~y~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y~0=0] [L679] -1 ~y$flush_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y~0=0] [L680] -1 ~y$mem_tmp~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y~0=0] [L681] -1 ~y$r_buff0_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y~0=0] [L682] -1 ~y$r_buff0_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y~0=0] [L683] -1 ~y$r_buff0_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y~0=0] [L684] -1 ~y$r_buff0_thd3~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y~0=0] [L685] -1 ~y$r_buff1_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y~0=0] [L686] -1 ~y$r_buff1_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y~0=0] [L687] -1 ~y$r_buff1_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y~0=0] [L688] -1 ~y$r_buff1_thd3~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y~0=0] [L689] -1 ~y$read_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed~0=0, ~y~0=0] [L690] -1 ~y$read_delayed_var~0 := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y~0=0] [L691] -1 ~y$w_buff0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0~0=0, ~y~0=0] [L692] -1 ~y$w_buff0_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y~0=0] [L693] -1 ~y$w_buff1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1~0=0, ~y~0=0] [L694] -1 ~y$w_buff1_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0] [L696] -1 ~z~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L697] -1 ~weak$$choice0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L698] -1 ~weak$$choice2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L774] FCALL -1 call ~#t2494~0 := #Ultimate.alloc(4); VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L775] FCALL -1 call write~int(0, ~#t2494~0, 4); VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L775] FORK -1 fork 0 P0({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L775] -1 havoc #t~nondet18; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L776] FCALL -1 call ~#t2495~0 := #Ultimate.alloc(4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L777] FCALL -1 call write~int(1, ~#t2495~0, 4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L777] FORK -1 fork 1 P1({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L777] -1 havoc #t~nondet19; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L778] FCALL -1 call ~#t2496~0 := #Ultimate.alloc(4); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L779] FCALL -1 call write~int(2, ~#t2496~0, 4); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L779] FORK -1 fork 2 P2({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L734-L762] 0 ~arg := #in~arg; [L737] 0 ~y$w_buff1~0 := ~y$w_buff0~0; [L738] 0 ~y$w_buff0~0 := 2; [L739] 0 ~y$w_buff1_used~0 := ~y$w_buff0_used~0; [L740] 0 ~y$w_buff0_used~0 := 1; [L4] 0 ~expression := #in~expression; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L4] COND FALSE 0 !(0 == ~expression) VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=0] [L742] 0 ~y$r_buff1_thd0~0 := ~y$r_buff0_thd0~0; [L743] 0 ~y$r_buff1_thd1~0 := ~y$r_buff0_thd1~0; [L744] 0 ~y$r_buff1_thd2~0 := ~y$r_buff0_thd2~0; [L745] 0 ~y$r_buff1_thd3~0 := ~y$r_buff0_thd3~0; [L746] 0 ~y$r_buff0_thd3~0 := 1; [L749] 0 ~z~0 := 1; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=1] [L699-L713] 1 ~arg := #in~arg; [L702] 1 ~z~0 := 2; [L705] 1 ~x~0 := 1; [L710] 1 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=2] [L752] COND TRUE 0 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256 [L752] 0 #t~ite12 := ~y$w_buff0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=0, ~z~0=2] [L714-L733] 2 ~arg := #in~arg; [L717] 2 ~x~0 := 2; [L720] 2 ~y~0 := 1; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=1, ~z~0=2] [L752] 0 ~y~0 := #t~ite12; [L752] 0 havoc #t~ite11; [L752] 0 havoc #t~ite12; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L753] COND TRUE 0 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256 [L753] 0 #t~ite13 := 0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L753] 0 ~y$w_buff0_used~0 := #t~ite13; [L753] 0 havoc #t~ite13; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L754] COND FALSE 0 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd3~0 % 256)) [L754] 0 #t~ite14 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L754] 0 ~y$w_buff1_used~0 := #t~ite14; [L754] 0 havoc #t~ite14; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L755] COND FALSE 0 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256) [L755] 0 #t~ite15 := ~y$r_buff0_thd3~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L755] 0 ~y$r_buff0_thd3~0 := #t~ite15; [L755] 0 havoc #t~ite15; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L756] COND FALSE 0 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd3~0 % 256)) [L756] 0 #t~ite16 := ~y$r_buff1_thd3~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L756] 0 ~y$r_buff1_thd3~0 := #t~ite16; [L756] 0 havoc #t~ite16; [L759] 0 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L723] COND FALSE 2 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L723] COND FALSE 2 !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256) [L723] 2 #t~ite4 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite4=2, ~__unbuffered_cnt~0=2, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L723] 2 #t~ite5 := #t~ite4; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite4=2, #t~ite5=2, ~__unbuffered_cnt~0=2, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L723] 2 ~y~0 := #t~ite5; [L723] 2 havoc #t~ite5; [L723] 2 havoc #t~ite4; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L724] COND FALSE 2 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) [L724] 2 #t~ite6 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite6=0, ~__unbuffered_cnt~0=2, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L724] 2 ~y$w_buff0_used~0 := #t~ite6; [L724] 2 havoc #t~ite6; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L725] COND FALSE 2 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)) [L725] 2 #t~ite7 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite7=0, ~__unbuffered_cnt~0=2, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L725] 2 ~y$w_buff1_used~0 := #t~ite7; [L725] 2 havoc #t~ite7; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L726] COND FALSE 2 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) [L726] 2 #t~ite8 := ~y$r_buff0_thd2~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite8=0, ~__unbuffered_cnt~0=2, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L726] 2 ~y$r_buff0_thd2~0 := #t~ite8; [L726] 2 havoc #t~ite8; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=2, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L727] COND FALSE 2 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)) [L727] 2 #t~ite9 := ~y$r_buff1_thd2~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite9=0, ~__unbuffered_cnt~0=2, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L727] 2 ~y$r_buff1_thd2~0 := #t~ite9; [L727] 2 havoc #t~ite9; [L730] 2 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L779] -1 havoc #t~nondet20; [L781] -1 ~main$tmp_guard0~0 := (if 0 == (if 3 == ~__unbuffered_cnt~0 then 1 else 0) then 0 else 1); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L783] -1 assume 0 != ~main$tmp_guard0~0 % 256; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L785] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L785] COND FALSE -1 !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256) [L785] -1 #t~ite21 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L785] -1 #t~ite22 := #t~ite21; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L785] -1 ~y~0 := #t~ite22; [L785] -1 havoc #t~ite21; [L785] -1 havoc #t~ite22; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L786] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) [L786] -1 #t~ite23 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L786] -1 ~y$w_buff0_used~0 := #t~ite23; [L786] -1 havoc #t~ite23; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L787] COND FALSE -1 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)) [L787] -1 #t~ite24 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L787] -1 ~y$w_buff1_used~0 := #t~ite24; [L787] -1 havoc #t~ite24; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L788] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) [L788] -1 #t~ite25 := ~y$r_buff0_thd0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L788] -1 ~y$r_buff0_thd0~0 := #t~ite25; [L788] -1 havoc #t~ite25; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L789] COND FALSE -1 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)) [L789] -1 #t~ite26 := ~y$r_buff1_thd0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice2~0=0, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L789] -1 ~y$r_buff1_thd0~0 := #t~ite26; [L789] -1 havoc #t~ite26; [L792] -1 ~weak$$choice0~0 := (if 0 == #t~nondet27!base + #t~nondet27!offset then 0 else 1); [L792] -1 havoc #t~nondet27; [L793] -1 ~weak$$choice2~0 := (if 0 == #t~nondet28!base + #t~nondet28!offset then 0 else 1); [L793] -1 havoc #t~nondet28; [L794] -1 ~y$flush_delayed~0 := ~weak$$choice2~0; [L795] -1 ~y$mem_tmp~0 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L796] COND TRUE -1 (0 == ~y$w_buff0_used~0 % 256 || (0 == ~y$r_buff0_thd0~0 % 256 && 0 == ~y$w_buff1_used~0 % 256)) || (0 == ~y$r_buff0_thd0~0 % 256 && 0 == ~y$r_buff1_thd0~0 % 256) [L796] -1 #t~ite30 := ~y~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L796] -1 ~y~0 := #t~ite30; [L796] -1 havoc #t~ite29; [L796] -1 havoc #t~ite30; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L797] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L797] -1 #t~ite33 := ~y$w_buff0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L797] -1 ~y$w_buff0~0 := #t~ite33; [L797] -1 havoc #t~ite33; [L797] -1 havoc #t~ite32; [L797] -1 havoc #t~ite31; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L798] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L798] -1 #t~ite36 := ~y$w_buff1~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L798] -1 ~y$w_buff1~0 := #t~ite36; [L798] -1 havoc #t~ite36; [L798] -1 havoc #t~ite34; [L798] -1 havoc #t~ite35; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L799] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L799] -1 #t~ite39 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L799] -1 ~y$w_buff0_used~0 := #t~ite39; [L799] -1 havoc #t~ite37; [L799] -1 havoc #t~ite38; [L799] -1 havoc #t~ite39; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L800] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L800] -1 #t~ite42 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L800] -1 ~y$w_buff1_used~0 := #t~ite42; [L800] -1 havoc #t~ite41; [L800] -1 havoc #t~ite40; [L800] -1 havoc #t~ite42; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L801] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L801] -1 #t~ite45 := ~y$r_buff0_thd0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L801] -1 ~y$r_buff0_thd0~0 := #t~ite45; [L801] -1 havoc #t~ite44; [L801] -1 havoc #t~ite45; [L801] -1 havoc #t~ite43; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L802] COND TRUE -1 0 != ~weak$$choice2~0 % 256 [L802] -1 #t~ite48 := ~y$r_buff1_thd0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L802] -1 ~y$r_buff1_thd0~0 := #t~ite48; [L802] -1 havoc #t~ite46; [L802] -1 havoc #t~ite48; [L802] -1 havoc #t~ite47; [L803] -1 ~main$tmp_guard1~0 := (if 0 == (if !((2 == ~x~0 && 2 == ~y~0) && 2 == ~z~0) then 1 else 0) then 0 else 1); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L804] COND TRUE -1 0 != ~y$flush_delayed~0 % 256 [L804] -1 #t~ite49 := ~y$mem_tmp~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=1, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L804] -1 ~y~0 := #t~ite49; [L804] -1 havoc #t~ite49; [L805] -1 ~y$flush_delayed~0 := 0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L4] -1 ~expression := #in~expression; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L4] COND TRUE -1 0 == ~expression VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L4] -1 assert false; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=3, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=1, ~weak$$choice2~0=1, ~x~0=2, ~y$flush_delayed~0=0, ~y$mem_tmp~0=2, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=1, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=2, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~y~0=2, ~z~0=2] [L672] -1 int __unbuffered_cnt = 0; VAL [__unbuffered_cnt=0] [L673] -1 _Bool main$tmp_guard0; VAL [__unbuffered_cnt=0, main$tmp_guard0=0] [L674] -1 _Bool main$tmp_guard1; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0] [L676] -1 int x = 0; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0] [L678] -1 int y = 0; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0] [L679] -1 _Bool y$flush_delayed; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0] [L680] -1 int y$mem_tmp; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0] [L681] -1 _Bool y$r_buff0_thd0; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0] [L682] -1 _Bool y$r_buff0_thd1; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0] [L683] -1 _Bool y$r_buff0_thd2; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0] [L684] -1 _Bool y$r_buff0_thd3; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0] [L685] -1 _Bool y$r_buff1_thd0; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0] [L686] -1 _Bool y$r_buff1_thd1; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0] [L687] -1 _Bool y$r_buff1_thd2; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0] [L688] -1 _Bool y$r_buff1_thd3; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0] [L689] -1 _Bool y$read_delayed; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0] [L690] -1 int *y$read_delayed_var; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}] [L691] -1 int y$w_buff0; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0] [L692] -1 _Bool y$w_buff0_used; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0] [L693] -1 int y$w_buff1; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0] [L694] -1 _Bool y$w_buff1_used; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L696] -1 int z = 0; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L697] -1 _Bool weak$$choice0; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L698] -1 _Bool weak$$choice2; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L774] -1 pthread_t t2494; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L775] FCALL, FORK -1 pthread_create(&t2494, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L776] -1 pthread_t t2495; VAL [__unbuffered_cnt=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L777] FCALL, FORK -1 pthread_create(&t2495, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L778] -1 pthread_t t2496; VAL [__unbuffered_cnt=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L779] FCALL, FORK -1 pthread_create(&t2496, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L737] 0 y$w_buff1 = y$w_buff0 [L738] 0 y$w_buff0 = 2 [L739] 0 y$w_buff1_used = y$w_buff0_used [L740] 0 y$w_buff0_used = (_Bool)1 [L4] COND FALSE 0 !(!expression) VAL [__unbuffered_cnt=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=0] [L742] 0 y$r_buff1_thd0 = y$r_buff0_thd0 [L743] 0 y$r_buff1_thd1 = y$r_buff0_thd1 [L744] 0 y$r_buff1_thd2 = y$r_buff0_thd2 [L745] 0 y$r_buff1_thd3 = y$r_buff0_thd3 [L746] 0 y$r_buff0_thd3 = (_Bool)1 [L749] 0 z = 1 VAL [__unbuffered_cnt=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L702] 1 z = 2 [L705] 1 x = 1 [L710] 1 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=1, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=2] [L752] EXPR 0 y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y) VAL [__unbuffered_cnt=1, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=2] [L717] 2 x = 2 [L720] 2 y = 1 VAL [__unbuffered_cnt=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=1, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=2] [L752] 0 y = y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y) [L753] EXPR 0 y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : y$w_buff0_used VAL [__unbuffered_cnt=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=2] [L753] 0 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : y$w_buff0_used [L754] EXPR 0 y$w_buff0_used && y$r_buff0_thd3 || y$w_buff1_used && y$r_buff1_thd3 ? (_Bool)0 : y$w_buff1_used VAL [__unbuffered_cnt=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L754] 0 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd3 || y$w_buff1_used && y$r_buff1_thd3 ? (_Bool)0 : y$w_buff1_used [L755] EXPR 0 y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : y$r_buff0_thd3 VAL [__unbuffered_cnt=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L755] 0 y$r_buff0_thd3 = y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : y$r_buff0_thd3 [L756] EXPR 0 y$w_buff0_used && y$r_buff0_thd3 || y$w_buff1_used && y$r_buff1_thd3 ? (_Bool)0 : y$r_buff1_thd3 VAL [__unbuffered_cnt=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L756] 0 y$r_buff1_thd3 = y$w_buff0_used && y$r_buff0_thd3 || y$w_buff1_used && y$r_buff1_thd3 ? (_Bool)0 : y$r_buff1_thd3 [L759] 0 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L723] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L723] EXPR 2 y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y=2, z=2] [L723] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y)=2, y$w_buff1=0, y$w_buff1_used=0, y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y=2, z=2] [L723] 2 y = y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) [L724] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L724] 2 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used [L725] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L725] 2 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used [L726] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2 VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L726] 2 y$r_buff0_thd2 = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2 [L727] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$r_buff1_thd2 VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$r_buff1_thd2=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L727] 2 y$r_buff1_thd2 = y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$r_buff1_thd2 [L730] 2 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=3, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L781] -1 main$tmp_guard0 = __unbuffered_cnt == 3 VAL [__unbuffered_cnt=3, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L785] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) VAL [__unbuffered_cnt=3, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L785] EXPR -1 y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y VAL [__unbuffered_cnt=3, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L785] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) VAL [__unbuffered_cnt=3, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L785] -1 y = y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) [L786] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used VAL [__unbuffered_cnt=3, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L786] -1 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used [L787] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$w_buff1_used VAL [__unbuffered_cnt=3, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L787] -1 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$w_buff1_used [L788] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0 VAL [__unbuffered_cnt=3, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L788] -1 y$r_buff0_thd0 = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0 [L789] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$r_buff1_thd0 VAL [__unbuffered_cnt=3, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L789] -1 y$r_buff1_thd0 = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$r_buff1_thd0 [L792] -1 weak$$choice0 = __VERIFIER_nondet_pointer() [L793] -1 weak$$choice2 = __VERIFIER_nondet_pointer() [L794] -1 y$flush_delayed = weak$$choice2 [L795] -1 y$mem_tmp = y VAL [__unbuffered_cnt=3, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L796] EXPR -1 !y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff1) VAL [__unbuffered_cnt=3, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L796] -1 y = !y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff1) [L797] EXPR -1 weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff0)) VAL [__unbuffered_cnt=3, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L797] -1 y$w_buff0 = weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff0)) [L798] EXPR -1 weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff1 : y$w_buff1)) VAL [__unbuffered_cnt=3, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L798] -1 y$w_buff1 = weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff1 : y$w_buff1)) [L799] EXPR -1 weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used)) VAL [__unbuffered_cnt=3, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L799] -1 y$w_buff0_used = weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used)) [L800] EXPR -1 weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=3, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L800] -1 y$w_buff1_used = weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L801] EXPR -1 weak$$choice2 ? y$r_buff0_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff0_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0)) VAL [__unbuffered_cnt=3, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L801] -1 y$r_buff0_thd0 = weak$$choice2 ? y$r_buff0_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff0_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0)) [L802] EXPR -1 weak$$choice2 ? y$r_buff1_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff1_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=3, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L802] -1 y$r_buff1_thd0 = weak$$choice2 ? y$r_buff1_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff1_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L803] -1 main$tmp_guard1 = !(x == 2 && y == 2 && z == 2) VAL [__unbuffered_cnt=3, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L804] EXPR -1 y$flush_delayed ? y$mem_tmp : y VAL [__unbuffered_cnt=3, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L804] -1 y = y$flush_delayed ? y$mem_tmp : y [L805] -1 y$flush_delayed = (_Bool)0 VAL [__unbuffered_cnt=3, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=2, y$flush_delayed=0, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L4] COND TRUE -1 !expression VAL [__unbuffered_cnt=3, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=2, y$flush_delayed=0, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L4] -1 __VERIFIER_error() VAL [__unbuffered_cnt=3, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=2, y$flush_delayed=0, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] ----- [2018-11-22 22:53:17,794 INFO L145 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/working_dir_5a87ce97-3d93-4e7b-9c05-09a5c351f4f7/bin-2019/uautomizer/witness.graphml [2018-11-22 22:53:17,794 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2018-11-22 22:53:17,794 INFO L168 Benchmark]: Toolchain (without parser) took 110219.75 ms. Allocated memory was 1.0 GB in the beginning and 8.0 GB in the end (delta: 6.9 GB). Free memory was 956.6 MB in the beginning and 3.3 GB in the end (delta: -2.4 GB). Peak memory consumption was 4.6 GB. Max. memory is 11.5 GB. [2018-11-22 22:53:17,795 INFO L168 Benchmark]: CDTParser took 0.15 ms. Allocated memory is still 1.0 GB. Free memory is still 985.6 MB. There was no memory consumed. Max. memory is 11.5 GB. [2018-11-22 22:53:17,796 INFO L168 Benchmark]: CACSL2BoogieTranslator took 447.04 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 117.4 MB). Free memory was 956.6 MB in the beginning and 1.1 GB in the end (delta: -138.5 MB). Peak memory consumption was 35.3 MB. Max. memory is 11.5 GB. [2018-11-22 22:53:17,796 INFO L168 Benchmark]: Boogie Procedure Inliner took 36.89 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 2.7 MB). Peak memory consumption was 2.7 MB. Max. memory is 11.5 GB. [2018-11-22 22:53:17,796 INFO L168 Benchmark]: Boogie Preprocessor took 19.03 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 2.7 MB). Peak memory consumption was 2.7 MB. Max. memory is 11.5 GB. [2018-11-22 22:53:17,796 INFO L168 Benchmark]: RCFGBuilder took 436.07 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 47.2 MB). Peak memory consumption was 47.2 MB. Max. memory is 11.5 GB. [2018-11-22 22:53:17,797 INFO L168 Benchmark]: TraceAbstraction took 104155.74 ms. Allocated memory was 1.1 GB in the beginning and 8.0 GB in the end (delta: 6.8 GB). Free memory was 1.0 GB in the beginning and 3.5 GB in the end (delta: -2.4 GB). Peak memory consumption was 4.4 GB. Max. memory is 11.5 GB. [2018-11-22 22:53:17,797 INFO L168 Benchmark]: Witness Printer took 5122.14 ms. Allocated memory is still 8.0 GB. Free memory was 3.5 GB in the beginning and 3.3 GB in the end (delta: 142.9 MB). Peak memory consumption was 142.9 MB. Max. memory is 11.5 GB. [2018-11-22 22:53:17,798 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.15 ms. Allocated memory is still 1.0 GB. Free memory is still 985.6 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 447.04 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 117.4 MB). Free memory was 956.6 MB in the beginning and 1.1 GB in the end (delta: -138.5 MB). Peak memory consumption was 35.3 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 36.89 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 2.7 MB). Peak memory consumption was 2.7 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 19.03 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 2.7 MB). Peak memory consumption was 2.7 MB. Max. memory is 11.5 GB. * RCFGBuilder took 436.07 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 47.2 MB). Peak memory consumption was 47.2 MB. Max. memory is 11.5 GB. * TraceAbstraction took 104155.74 ms. Allocated memory was 1.1 GB in the beginning and 8.0 GB in the end (delta: 6.8 GB). Free memory was 1.0 GB in the beginning and 3.5 GB in the end (delta: -2.4 GB). Peak memory consumption was 4.4 GB. Max. memory is 11.5 GB. * Witness Printer took 5122.14 ms. Allocated memory is still 8.0 GB. Free memory was 3.5 GB in the beginning and 3.3 GB in the end (delta: 142.9 MB). Peak memory consumption was 142.9 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L672] -1 int __unbuffered_cnt = 0; VAL [__unbuffered_cnt=0] [L673] -1 _Bool main$tmp_guard0; VAL [__unbuffered_cnt=0, main$tmp_guard0=0] [L674] -1 _Bool main$tmp_guard1; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0] [L676] -1 int x = 0; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0] [L678] -1 int y = 0; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0] [L679] -1 _Bool y$flush_delayed; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0] [L680] -1 int y$mem_tmp; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0] [L681] -1 _Bool y$r_buff0_thd0; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0] [L682] -1 _Bool y$r_buff0_thd1; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0] [L683] -1 _Bool y$r_buff0_thd2; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0] [L684] -1 _Bool y$r_buff0_thd3; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0] [L685] -1 _Bool y$r_buff1_thd0; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0] [L686] -1 _Bool y$r_buff1_thd1; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0] [L687] -1 _Bool y$r_buff1_thd2; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0] [L688] -1 _Bool y$r_buff1_thd3; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0] [L689] -1 _Bool y$read_delayed; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0] [L690] -1 int *y$read_delayed_var; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}] [L691] -1 int y$w_buff0; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0] [L692] -1 _Bool y$w_buff0_used; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0] [L693] -1 int y$w_buff1; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0] [L694] -1 _Bool y$w_buff1_used; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L696] -1 int z = 0; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L697] -1 _Bool weak$$choice0; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L698] -1 _Bool weak$$choice2; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L774] -1 pthread_t t2494; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L775] FCALL, FORK -1 pthread_create(&t2494, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L776] -1 pthread_t t2495; VAL [__unbuffered_cnt=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L777] FCALL, FORK -1 pthread_create(&t2495, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L778] -1 pthread_t t2496; VAL [__unbuffered_cnt=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L779] FCALL, FORK -1 pthread_create(&t2496, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L737] 0 y$w_buff1 = y$w_buff0 [L738] 0 y$w_buff0 = 2 [L739] 0 y$w_buff1_used = y$w_buff0_used [L740] 0 y$w_buff0_used = (_Bool)1 [L4] COND FALSE 0 !(!expression) VAL [__unbuffered_cnt=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=0] [L742] 0 y$r_buff1_thd0 = y$r_buff0_thd0 [L743] 0 y$r_buff1_thd1 = y$r_buff0_thd1 [L744] 0 y$r_buff1_thd2 = y$r_buff0_thd2 [L745] 0 y$r_buff1_thd3 = y$r_buff0_thd3 [L746] 0 y$r_buff0_thd3 = (_Bool)1 [L749] 0 z = 1 VAL [__unbuffered_cnt=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L702] 1 z = 2 [L705] 1 x = 1 [L710] 1 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=1, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=2] [L752] EXPR 0 y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y) VAL [__unbuffered_cnt=1, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=2] [L717] 2 x = 2 [L720] 2 y = 1 VAL [__unbuffered_cnt=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=1, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=2] [L752] 0 y = y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y) [L753] EXPR 0 y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : y$w_buff0_used VAL [__unbuffered_cnt=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=2] [L753] 0 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : y$w_buff0_used [L754] EXPR 0 y$w_buff0_used && y$r_buff0_thd3 || y$w_buff1_used && y$r_buff1_thd3 ? (_Bool)0 : y$w_buff1_used VAL [__unbuffered_cnt=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L754] 0 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd3 || y$w_buff1_used && y$r_buff1_thd3 ? (_Bool)0 : y$w_buff1_used [L755] EXPR 0 y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : y$r_buff0_thd3 VAL [__unbuffered_cnt=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L755] 0 y$r_buff0_thd3 = y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : y$r_buff0_thd3 [L756] EXPR 0 y$w_buff0_used && y$r_buff0_thd3 || y$w_buff1_used && y$r_buff1_thd3 ? (_Bool)0 : y$r_buff1_thd3 VAL [__unbuffered_cnt=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L756] 0 y$r_buff1_thd3 = y$w_buff0_used && y$r_buff0_thd3 || y$w_buff1_used && y$r_buff1_thd3 ? (_Bool)0 : y$r_buff1_thd3 [L759] 0 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L723] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L723] EXPR 2 y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y=2, z=2] [L723] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y)=2, y$w_buff1=0, y$w_buff1_used=0, y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y=2, z=2] [L723] 2 y = y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) [L724] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L724] 2 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used [L725] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L725] 2 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used [L726] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2 VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L726] 2 y$r_buff0_thd2 = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2 [L727] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$r_buff1_thd2 VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$r_buff1_thd2=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L727] 2 y$r_buff1_thd2 = y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$r_buff1_thd2 [L730] 2 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=3, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L781] -1 main$tmp_guard0 = __unbuffered_cnt == 3 VAL [__unbuffered_cnt=3, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L785] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) VAL [__unbuffered_cnt=3, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L785] EXPR -1 y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y VAL [__unbuffered_cnt=3, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L785] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) VAL [__unbuffered_cnt=3, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L785] -1 y = y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) [L786] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used VAL [__unbuffered_cnt=3, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L786] -1 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used [L787] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$w_buff1_used VAL [__unbuffered_cnt=3, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L787] -1 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$w_buff1_used [L788] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0 VAL [__unbuffered_cnt=3, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L788] -1 y$r_buff0_thd0 = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0 [L789] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$r_buff1_thd0 VAL [__unbuffered_cnt=3, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L789] -1 y$r_buff1_thd0 = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$r_buff1_thd0 [L792] -1 weak$$choice0 = __VERIFIER_nondet_pointer() [L793] -1 weak$$choice2 = __VERIFIER_nondet_pointer() [L794] -1 y$flush_delayed = weak$$choice2 [L795] -1 y$mem_tmp = y VAL [__unbuffered_cnt=3, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L796] EXPR -1 !y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff1) VAL [__unbuffered_cnt=3, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L796] -1 y = !y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff1) [L797] EXPR -1 weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff0)) VAL [__unbuffered_cnt=3, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L797] -1 y$w_buff0 = weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff0)) [L798] EXPR -1 weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff1 : y$w_buff1)) VAL [__unbuffered_cnt=3, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L798] -1 y$w_buff1 = weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff1 : y$w_buff1)) [L799] EXPR -1 weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used)) VAL [__unbuffered_cnt=3, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L799] -1 y$w_buff0_used = weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used)) [L800] EXPR -1 weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=3, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L800] -1 y$w_buff1_used = weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L801] EXPR -1 weak$$choice2 ? y$r_buff0_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff0_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0)) VAL [__unbuffered_cnt=3, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L801] -1 y$r_buff0_thd0 = weak$$choice2 ? y$r_buff0_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff0_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0)) [L802] EXPR -1 weak$$choice2 ? y$r_buff1_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff1_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=3, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L802] -1 y$r_buff1_thd0 = weak$$choice2 ? y$r_buff1_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff1_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L803] -1 main$tmp_guard1 = !(x == 2 && y == 2 && z == 2) VAL [__unbuffered_cnt=3, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L804] EXPR -1 y$flush_delayed ? y$mem_tmp : y VAL [__unbuffered_cnt=3, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L804] -1 y = y$flush_delayed ? y$mem_tmp : y [L805] -1 y$flush_delayed = (_Bool)0 VAL [__unbuffered_cnt=3, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=2, y$flush_delayed=0, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L4] COND TRUE -1 !expression VAL [__unbuffered_cnt=3, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=2, y$flush_delayed=0, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L4] -1 __VERIFIER_error() VAL [__unbuffered_cnt=3, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=1, weak$$choice2=1, x=2, y=2, y$flush_delayed=0, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] - StatisticsResult: Ultimate Automizer benchmark data CFG has 7 procedures, 197 locations, 3 error locations. UNSAFE Result, 104.0s OverallTime, 30 OverallIterations, 1 TraceHistogramMax, 26.3s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 7297 SDtfs, 7436 SDslu, 17105 SDs, 0 SdLazy, 6449 SolverSat, 442 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 4.1s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 323 GetRequests, 102 SyntacticMatches, 13 SemanticMatches, 208 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 327 ImplicationChecksByTransitivity, 1.9s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=220276occurred in iteration=7, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 55.3s AutomataMinimizationTime, 29 MinimizatonAttempts, 612611 StatesRemovedByMinimization, 25 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.0s SsaConstructionTime, 0.2s SatisfiabilityAnalysisTime, 1.8s InterpolantComputationTime, 2542 NumberOfCodeBlocks, 2542 NumberOfCodeBlocksAsserted, 30 NumberOfCheckSat, 2412 ConstructedInterpolants, 0 QuantifiedInterpolants, 545836 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 29 InterpolantComputations, 29 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...