./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread/singleton_false-unreach-call.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version aa418289 Calling Ultimate with: java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/working_dir_2249d4f7-c285-46e0-ab07-7b74c49cfbb0/bin-2019/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/working_dir_2249d4f7-c285-46e0-ab07-7b74c49cfbb0/bin-2019/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/working_dir_2249d4f7-c285-46e0-ab07-7b74c49cfbb0/bin-2019/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/working_dir_2249d4f7-c285-46e0-ab07-7b74c49cfbb0/bin-2019/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/pthread/singleton_false-unreach-call.i -s /tmp/vcloud-vcloud-master/worker/working_dir_2249d4f7-c285-46e0-ab07-7b74c49cfbb0/bin-2019/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/working_dir_2249d4f7-c285-46e0-ab07-7b74c49cfbb0/bin-2019/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 7540c95af84ce36a44a847aa5fc0422896a0f0bd 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Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.23-aa41828 [2018-11-23 05:06:57,574 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-11-23 05:06:57,574 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-11-23 05:06:57,581 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-11-23 05:06:57,581 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-11-23 05:06:57,582 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-11-23 05:06:57,583 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-11-23 05:06:57,584 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-11-23 05:06:57,585 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-11-23 05:06:57,586 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-11-23 05:06:57,587 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-11-23 05:06:57,587 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-11-23 05:06:57,587 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-11-23 05:06:57,588 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-11-23 05:06:57,589 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-11-23 05:06:57,590 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-11-23 05:06:57,591 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-11-23 05:06:57,592 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-11-23 05:06:57,593 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-11-23 05:06:57,594 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-11-23 05:06:57,595 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-11-23 05:06:57,596 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-11-23 05:06:57,598 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-11-23 05:06:57,598 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-11-23 05:06:57,598 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-11-23 05:06:57,599 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-11-23 05:06:57,599 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-11-23 05:06:57,600 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-11-23 05:06:57,600 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-11-23 05:06:57,602 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-11-23 05:06:57,602 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-11-23 05:06:57,602 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-11-23 05:06:57,602 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-11-23 05:06:57,602 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-11-23 05:06:57,603 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-11-23 05:06:57,603 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-11-23 05:06:57,603 INFO L98 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/working_dir_2249d4f7-c285-46e0-ab07-7b74c49cfbb0/bin-2019/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2018-11-23 05:06:57,610 INFO L110 SettingsManager]: Loading preferences was successful [2018-11-23 05:06:57,610 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-11-23 05:06:57,610 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-11-23 05:06:57,610 INFO L133 SettingsManager]: * ... calls to implemented procedures=ONLY_FOR_CONCURRENT_PROGRAMS [2018-11-23 05:06:57,611 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-11-23 05:06:57,611 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-11-23 05:06:57,611 INFO L133 SettingsManager]: * Use SBE=true [2018-11-23 05:06:57,611 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-11-23 05:06:57,611 INFO L133 SettingsManager]: * sizeof long=4 [2018-11-23 05:06:57,612 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-11-23 05:06:57,612 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-11-23 05:06:57,612 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-11-23 05:06:57,612 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-11-23 05:06:57,612 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-11-23 05:06:57,612 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-11-23 05:06:57,612 INFO L133 SettingsManager]: * sizeof long double=12 [2018-11-23 05:06:57,612 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-11-23 05:06:57,613 INFO L133 SettingsManager]: * Use constant arrays=true [2018-11-23 05:06:57,613 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-11-23 05:06:57,613 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-11-23 05:06:57,613 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-11-23 05:06:57,613 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-11-23 05:06:57,613 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-11-23 05:06:57,613 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-23 05:06:57,614 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-11-23 05:06:57,614 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-11-23 05:06:57,614 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-11-23 05:06:57,614 INFO L133 SettingsManager]: * Trace refinement strategy=CAMEL [2018-11-23 05:06:57,614 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-11-23 05:06:57,614 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-11-23 05:06:57,614 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/working_dir_2249d4f7-c285-46e0-ab07-7b74c49cfbb0/bin-2019/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 7540c95af84ce36a44a847aa5fc0422896a0f0bd [2018-11-23 05:06:57,639 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-11-23 05:06:57,648 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-11-23 05:06:57,650 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-11-23 05:06:57,652 INFO L271 PluginConnector]: Initializing CDTParser... [2018-11-23 05:06:57,652 INFO L276 PluginConnector]: CDTParser initialized [2018-11-23 05:06:57,652 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/working_dir_2249d4f7-c285-46e0-ab07-7b74c49cfbb0/bin-2019/uautomizer/../../sv-benchmarks/c/pthread/singleton_false-unreach-call.i [2018-11-23 05:06:57,696 INFO L221 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_2249d4f7-c285-46e0-ab07-7b74c49cfbb0/bin-2019/uautomizer/data/c19e144ac/6ac66fb58915443ba575aba21431f25e/FLAGe14607c6e [2018-11-23 05:06:58,138 INFO L307 CDTParser]: Found 1 translation units. [2018-11-23 05:06:58,139 INFO L161 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/working_dir_2249d4f7-c285-46e0-ab07-7b74c49cfbb0/sv-benchmarks/c/pthread/singleton_false-unreach-call.i [2018-11-23 05:06:58,151 INFO L355 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_2249d4f7-c285-46e0-ab07-7b74c49cfbb0/bin-2019/uautomizer/data/c19e144ac/6ac66fb58915443ba575aba21431f25e/FLAGe14607c6e [2018-11-23 05:06:58,163 INFO L363 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/working_dir_2249d4f7-c285-46e0-ab07-7b74c49cfbb0/bin-2019/uautomizer/data/c19e144ac/6ac66fb58915443ba575aba21431f25e [2018-11-23 05:06:58,166 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-11-23 05:06:58,167 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2018-11-23 05:06:58,167 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-11-23 05:06:58,168 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-11-23 05:06:58,171 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-11-23 05:06:58,172 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 23.11 05:06:58" (1/1) ... [2018-11-23 05:06:58,174 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@29a78139 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 05:06:58, skipping insertion in model container [2018-11-23 05:06:58,174 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 23.11 05:06:58" (1/1) ... [2018-11-23 05:06:58,182 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-11-23 05:06:58,218 INFO L176 MainTranslator]: Built tables and reachable declarations [2018-11-23 05:06:58,496 INFO L201 PostProcessor]: Analyzing one entry point: main [2018-11-23 05:06:58,502 INFO L191 MainTranslator]: Completed pre-run [2018-11-23 05:06:58,582 INFO L201 PostProcessor]: Analyzing one entry point: main [2018-11-23 05:06:58,691 INFO L195 MainTranslator]: Completed translation [2018-11-23 05:06:58,692 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 05:06:58 WrapperNode [2018-11-23 05:06:58,692 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-11-23 05:06:58,692 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2018-11-23 05:06:58,693 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2018-11-23 05:06:58,693 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2018-11-23 05:06:58,700 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 05:06:58" (1/1) ... [2018-11-23 05:06:58,716 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 05:06:58" (1/1) ... [2018-11-23 05:06:58,732 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2018-11-23 05:06:58,733 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-11-23 05:06:58,733 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-11-23 05:06:58,733 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-11-23 05:06:58,740 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 05:06:58" (1/1) ... [2018-11-23 05:06:58,741 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 05:06:58" (1/1) ... [2018-11-23 05:06:58,743 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 05:06:58" (1/1) ... [2018-11-23 05:06:58,744 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 05:06:58" (1/1) ... [2018-11-23 05:06:58,753 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 05:06:58" (1/1) ... [2018-11-23 05:06:58,755 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 05:06:58" (1/1) ... [2018-11-23 05:06:58,757 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 05:06:58" (1/1) ... [2018-11-23 05:06:58,759 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-11-23 05:06:58,759 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-11-23 05:06:58,760 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-11-23 05:06:58,760 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-11-23 05:06:58,760 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 05:06:58" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_2249d4f7-c285-46e0-ab07-7b74c49cfbb0/bin-2019/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-23 05:06:58,809 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-11-23 05:06:58,809 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-11-23 05:06:58,809 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2018-11-23 05:06:58,810 INFO L130 BoogieDeclarations]: Found specification of procedure thread0 [2018-11-23 05:06:58,810 INFO L138 BoogieDeclarations]: Found implementation of procedure thread0 [2018-11-23 05:06:58,810 INFO L130 BoogieDeclarations]: Found specification of procedure thread1 [2018-11-23 05:06:58,810 INFO L138 BoogieDeclarations]: Found implementation of procedure thread1 [2018-11-23 05:06:58,810 INFO L130 BoogieDeclarations]: Found specification of procedure thread2 [2018-11-23 05:06:58,810 INFO L138 BoogieDeclarations]: Found implementation of procedure thread2 [2018-11-23 05:06:58,810 INFO L130 BoogieDeclarations]: Found specification of procedure thread3 [2018-11-23 05:06:58,810 INFO L138 BoogieDeclarations]: Found implementation of procedure thread3 [2018-11-23 05:06:58,810 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2018-11-23 05:06:58,811 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-11-23 05:06:58,811 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-11-23 05:06:58,813 WARN L198 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2018-11-23 05:06:59,092 INFO L275 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-11-23 05:06:59,092 INFO L280 CfgBuilder]: Removed 6 assue(true) statements. [2018-11-23 05:06:59,092 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 23.11 05:06:59 BoogieIcfgContainer [2018-11-23 05:06:59,092 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-11-23 05:06:59,093 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-11-23 05:06:59,093 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-11-23 05:06:59,096 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-11-23 05:06:59,096 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 23.11 05:06:58" (1/3) ... [2018-11-23 05:06:59,096 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@4573ece1 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 23.11 05:06:59, skipping insertion in model container [2018-11-23 05:06:59,097 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 05:06:58" (2/3) ... [2018-11-23 05:06:59,097 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@4573ece1 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 23.11 05:06:59, skipping insertion in model container [2018-11-23 05:06:59,097 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 23.11 05:06:59" (3/3) ... [2018-11-23 05:06:59,099 INFO L112 eAbstractionObserver]: Analyzing ICFG singleton_false-unreach-call.i [2018-11-23 05:06:59,132 WARN L317 ript$VariableManager]: TermVariabe |Thread2_thread0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 05:06:59,132 WARN L317 ript$VariableManager]: TermVariabe |Thread2_thread0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 05:06:59,132 WARN L317 ript$VariableManager]: TermVariabe Thread2_thread0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 05:06:59,132 WARN L317 ript$VariableManager]: TermVariabe Thread2_thread0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 05:06:59,132 WARN L317 ript$VariableManager]: TermVariabe |Thread2_thread0_~#t1~0.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 05:06:59,132 WARN L317 ript$VariableManager]: TermVariabe |Thread2_thread0_~#t1~0.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 05:06:59,133 WARN L317 ript$VariableManager]: TermVariabe |Thread2_thread0_~#t2~0.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 05:06:59,133 WARN L317 ript$VariableManager]: TermVariabe |Thread2_thread0_~#t2~0.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 05:06:59,133 WARN L317 ript$VariableManager]: TermVariabe |Thread2_thread0_~#t3~0.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 05:06:59,133 WARN L317 ript$VariableManager]: TermVariabe |Thread2_thread0_~#t3~0.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 05:06:59,133 WARN L317 ript$VariableManager]: TermVariabe |Thread2_thread0_~#t4~0.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 05:06:59,134 WARN L317 ript$VariableManager]: TermVariabe |Thread2_thread0_~#t4~0.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 05:06:59,134 WARN L317 ript$VariableManager]: TermVariabe |Thread2_thread0_~#t5~0.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 05:06:59,134 WARN L317 ript$VariableManager]: TermVariabe |Thread2_thread0_~#t5~0.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 05:06:59,134 WARN L317 ript$VariableManager]: TermVariabe |Thread2_thread0_~#t1~0.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 05:06:59,134 WARN L317 ript$VariableManager]: TermVariabe |Thread2_thread0_~#t1~0.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 05:06:59,134 WARN L317 ript$VariableManager]: TermVariabe |Thread2_thread0_#t~nondet1| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 05:06:59,135 WARN L317 ript$VariableManager]: TermVariabe |Thread2_thread0_~#t1~0.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 05:06:59,135 WARN L317 ript$VariableManager]: TermVariabe |Thread2_thread0_~#t1~0.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 05:06:59,135 WARN L317 ript$VariableManager]: TermVariabe |Thread2_thread0_#t~mem2| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 05:06:59,135 WARN L317 ript$VariableManager]: TermVariabe |Thread2_thread0_#t~mem2| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 05:06:59,136 WARN L317 ript$VariableManager]: TermVariabe |Thread2_thread0_~#t2~0.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 05:06:59,136 WARN L317 ript$VariableManager]: TermVariabe |Thread2_thread0_~#t2~0.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 05:06:59,136 WARN L317 ript$VariableManager]: TermVariabe |Thread2_thread0_#t~nondet3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 05:06:59,136 WARN L317 ript$VariableManager]: TermVariabe |Thread2_thread0_~#t3~0.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 05:06:59,136 WARN L317 ript$VariableManager]: TermVariabe |Thread2_thread0_~#t3~0.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 05:06:59,136 WARN L317 ript$VariableManager]: TermVariabe |Thread2_thread0_#t~nondet4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 05:06:59,137 WARN L317 ript$VariableManager]: TermVariabe |Thread2_thread0_~#t4~0.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 05:06:59,137 WARN L317 ript$VariableManager]: TermVariabe |Thread2_thread0_~#t4~0.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 05:06:59,137 WARN L317 ript$VariableManager]: TermVariabe |Thread2_thread0_#t~nondet5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 05:06:59,137 WARN L317 ript$VariableManager]: TermVariabe |Thread2_thread0_~#t5~0.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 05:06:59,137 WARN L317 ript$VariableManager]: TermVariabe |Thread2_thread0_~#t5~0.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 05:06:59,137 WARN L317 ript$VariableManager]: TermVariabe |Thread2_thread0_#t~nondet6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 05:06:59,137 WARN L317 ript$VariableManager]: TermVariabe |Thread2_thread0_~#t2~0.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 05:06:59,137 WARN L317 ript$VariableManager]: TermVariabe |Thread2_thread0_~#t2~0.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 05:06:59,138 WARN L317 ript$VariableManager]: TermVariabe |Thread2_thread0_#t~mem7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 05:06:59,138 WARN L317 ript$VariableManager]: TermVariabe |Thread2_thread0_#t~mem7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 05:06:59,138 WARN L317 ript$VariableManager]: TermVariabe |Thread2_thread0_~#t3~0.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 05:06:59,138 WARN L317 ript$VariableManager]: TermVariabe |Thread2_thread0_~#t3~0.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 05:06:59,138 WARN L317 ript$VariableManager]: TermVariabe |Thread2_thread0_#t~mem8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 05:06:59,138 WARN L317 ript$VariableManager]: TermVariabe |Thread2_thread0_#t~mem8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 05:06:59,138 WARN L317 ript$VariableManager]: TermVariabe |Thread2_thread0_~#t4~0.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 05:06:59,139 WARN L317 ript$VariableManager]: TermVariabe |Thread2_thread0_~#t4~0.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 05:06:59,139 WARN L317 ript$VariableManager]: TermVariabe |Thread2_thread0_#t~mem9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 05:06:59,139 WARN L317 ript$VariableManager]: TermVariabe |Thread2_thread0_#t~mem9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 05:06:59,139 WARN L317 ript$VariableManager]: TermVariabe |Thread2_thread0_~#t5~0.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 05:06:59,139 WARN L317 ript$VariableManager]: TermVariabe |Thread2_thread0_~#t5~0.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 05:06:59,139 WARN L317 ript$VariableManager]: TermVariabe |Thread2_thread0_#t~mem10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 05:06:59,140 WARN L317 ript$VariableManager]: TermVariabe |Thread2_thread0_#t~mem10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 05:06:59,140 WARN L317 ript$VariableManager]: TermVariabe |Thread2_thread0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 05:06:59,140 WARN L317 ript$VariableManager]: TermVariabe |Thread2_thread0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 05:06:59,140 WARN L317 ript$VariableManager]: TermVariabe |Thread2_thread0_~#t1~0.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 05:06:59,140 WARN L317 ript$VariableManager]: TermVariabe |Thread2_thread0_~#t1~0.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 05:06:59,140 WARN L317 ript$VariableManager]: TermVariabe |Thread2_thread0_~#t1~0.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 05:06:59,140 WARN L317 ript$VariableManager]: TermVariabe |Thread2_thread0_~#t2~0.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 05:06:59,140 WARN L317 ript$VariableManager]: TermVariabe |Thread2_thread0_~#t2~0.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 05:06:59,141 WARN L317 ript$VariableManager]: TermVariabe |Thread2_thread0_~#t2~0.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 05:06:59,141 WARN L317 ript$VariableManager]: TermVariabe |Thread2_thread0_~#t3~0.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 05:06:59,141 WARN L317 ript$VariableManager]: TermVariabe |Thread2_thread0_~#t3~0.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 05:06:59,141 WARN L317 ript$VariableManager]: TermVariabe |Thread2_thread0_~#t3~0.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 05:06:59,141 WARN L317 ript$VariableManager]: TermVariabe |Thread2_thread0_~#t4~0.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 05:06:59,141 WARN L317 ript$VariableManager]: TermVariabe |Thread2_thread0_~#t4~0.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 05:06:59,141 WARN L317 ript$VariableManager]: TermVariabe |Thread2_thread0_~#t4~0.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 05:06:59,142 WARN L317 ript$VariableManager]: TermVariabe |Thread2_thread0_~#t5~0.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 05:06:59,142 WARN L317 ript$VariableManager]: TermVariabe |Thread2_thread0_~#t5~0.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 05:06:59,142 WARN L317 ript$VariableManager]: TermVariabe |Thread2_thread0_~#t5~0.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 05:06:59,142 WARN L317 ript$VariableManager]: TermVariabe |Thread4_thread1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 05:06:59,142 WARN L317 ript$VariableManager]: TermVariabe |Thread4_thread1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 05:06:59,142 WARN L317 ript$VariableManager]: TermVariabe Thread4_thread1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 05:06:59,143 WARN L317 ript$VariableManager]: TermVariabe Thread4_thread1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 05:06:59,143 WARN L317 ript$VariableManager]: TermVariabe |Thread4_thread1_#t~malloc0.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 05:06:59,143 WARN L317 ript$VariableManager]: TermVariabe |Thread4_thread1_#t~malloc0.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 05:06:59,143 WARN L317 ript$VariableManager]: TermVariabe |Thread4_thread1_#t~malloc0.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 05:06:59,143 WARN L317 ript$VariableManager]: TermVariabe |Thread4_thread1_#t~malloc0.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 05:06:59,143 WARN L317 ript$VariableManager]: TermVariabe |Thread4_thread1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 05:06:59,144 WARN L317 ript$VariableManager]: TermVariabe |Thread4_thread1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 05:06:59,144 WARN L317 ript$VariableManager]: TermVariabe |Thread3_thread2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 05:06:59,144 WARN L317 ript$VariableManager]: TermVariabe |Thread3_thread2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 05:06:59,144 WARN L317 ript$VariableManager]: TermVariabe Thread3_thread2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 05:06:59,144 WARN L317 ript$VariableManager]: TermVariabe Thread3_thread2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 05:06:59,145 WARN L317 ript$VariableManager]: TermVariabe |Thread3_thread2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 05:06:59,145 WARN L317 ript$VariableManager]: TermVariabe |Thread3_thread2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 05:06:59,145 WARN L317 ript$VariableManager]: TermVariabe |Thread1_thread2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 05:06:59,145 WARN L317 ript$VariableManager]: TermVariabe |Thread1_thread2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 05:06:59,145 WARN L317 ript$VariableManager]: TermVariabe Thread1_thread2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 05:06:59,145 WARN L317 ript$VariableManager]: TermVariabe Thread1_thread2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 05:06:59,145 WARN L317 ript$VariableManager]: TermVariabe |Thread1_thread2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 05:06:59,146 WARN L317 ript$VariableManager]: TermVariabe |Thread1_thread2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 05:06:59,146 WARN L317 ript$VariableManager]: TermVariabe |Thread5_thread2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 05:06:59,146 WARN L317 ript$VariableManager]: TermVariabe |Thread5_thread2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 05:06:59,146 WARN L317 ript$VariableManager]: TermVariabe Thread5_thread2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 05:06:59,146 WARN L317 ript$VariableManager]: TermVariabe Thread5_thread2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 05:06:59,146 WARN L317 ript$VariableManager]: TermVariabe |Thread5_thread2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 05:06:59,147 WARN L317 ript$VariableManager]: TermVariabe |Thread5_thread2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 05:06:59,147 WARN L317 ript$VariableManager]: TermVariabe |Thread0_thread3_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 05:06:59,147 WARN L317 ript$VariableManager]: TermVariabe |Thread0_thread3_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 05:06:59,147 WARN L317 ript$VariableManager]: TermVariabe Thread0_thread3_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 05:06:59,147 WARN L317 ript$VariableManager]: TermVariabe Thread0_thread3_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 05:06:59,148 WARN L317 ript$VariableManager]: TermVariabe |Thread0_thread3_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 05:06:59,148 WARN L317 ript$VariableManager]: TermVariabe |Thread0_thread3_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 05:06:59,298 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2018-11-23 05:06:59,298 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-11-23 05:06:59,306 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 1 error locations. [2018-11-23 05:06:59,317 INFO L257 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2018-11-23 05:06:59,334 INFO L133 ementStrategyFactory]: Using default assertion order modulation [2018-11-23 05:06:59,334 INFO L382 AbstractCegarLoop]: Interprodecural is true [2018-11-23 05:06:59,334 INFO L383 AbstractCegarLoop]: Hoare is true [2018-11-23 05:06:59,334 INFO L384 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-11-23 05:06:59,335 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-11-23 05:06:59,335 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-11-23 05:06:59,335 INFO L387 AbstractCegarLoop]: Difference is false [2018-11-23 05:06:59,335 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-11-23 05:06:59,335 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-11-23 05:06:59,344 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 139places, 232 transitions [2018-11-23 05:07:01,950 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 47312 states. [2018-11-23 05:07:01,952 INFO L276 IsEmpty]: Start isEmpty. Operand 47312 states. [2018-11-23 05:07:01,959 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2018-11-23 05:07:01,960 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 05:07:01,960 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 05:07:01,962 INFO L423 AbstractCegarLoop]: === Iteration 1 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 05:07:01,965 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 05:07:01,966 INFO L82 PathProgramCache]: Analyzing trace with hash 537396033, now seen corresponding path program 1 times [2018-11-23 05:07:01,967 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 05:07:01,967 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 05:07:02,004 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 05:07:02,004 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 05:07:02,005 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 05:07:02,043 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 05:07:02,277 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 05:07:02,279 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 05:07:02,279 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-11-23 05:07:02,283 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-11-23 05:07:02,292 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-11-23 05:07:02,293 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=70, Unknown=0, NotChecked=0, Total=90 [2018-11-23 05:07:02,294 INFO L87 Difference]: Start difference. First operand 47312 states. Second operand 10 states. [2018-11-23 05:07:03,141 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 05:07:03,142 INFO L93 Difference]: Finished difference Result 53969 states and 232570 transitions. [2018-11-23 05:07:03,143 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-11-23 05:07:03,143 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 31 [2018-11-23 05:07:03,144 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 05:07:03,325 INFO L225 Difference]: With dead ends: 53969 [2018-11-23 05:07:03,326 INFO L226 Difference]: Without dead ends: 38044 [2018-11-23 05:07:03,327 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 27 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=71, Invalid=201, Unknown=0, NotChecked=0, Total=272 [2018-11-23 05:07:03,666 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 38044 states. [2018-11-23 05:07:04,304 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 38044 to 31405. [2018-11-23 05:07:04,305 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 31405 states. [2018-11-23 05:07:04,419 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 31405 states to 31405 states and 135819 transitions. [2018-11-23 05:07:04,420 INFO L78 Accepts]: Start accepts. Automaton has 31405 states and 135819 transitions. Word has length 31 [2018-11-23 05:07:04,421 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 05:07:04,421 INFO L480 AbstractCegarLoop]: Abstraction has 31405 states and 135819 transitions. [2018-11-23 05:07:04,421 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-11-23 05:07:04,421 INFO L276 IsEmpty]: Start isEmpty. Operand 31405 states and 135819 transitions. [2018-11-23 05:07:04,422 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2018-11-23 05:07:04,422 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 05:07:04,422 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 05:07:04,423 INFO L423 AbstractCegarLoop]: === Iteration 2 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 05:07:04,423 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 05:07:04,423 INFO L82 PathProgramCache]: Analyzing trace with hash -756897297, now seen corresponding path program 2 times [2018-11-23 05:07:04,423 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 05:07:04,423 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 05:07:04,426 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 05:07:04,426 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 05:07:04,426 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 05:07:04,438 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 05:07:04,555 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 05:07:04,555 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 05:07:04,556 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-11-23 05:07:04,557 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-11-23 05:07:04,557 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-11-23 05:07:04,557 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=70, Unknown=0, NotChecked=0, Total=90 [2018-11-23 05:07:04,557 INFO L87 Difference]: Start difference. First operand 31405 states and 135819 transitions. Second operand 10 states. [2018-11-23 05:07:05,307 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 05:07:05,308 INFO L93 Difference]: Finished difference Result 44657 states and 198278 transitions. [2018-11-23 05:07:05,308 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-11-23 05:07:05,308 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 31 [2018-11-23 05:07:05,308 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 05:07:05,486 INFO L225 Difference]: With dead ends: 44657 [2018-11-23 05:07:05,486 INFO L226 Difference]: Without dead ends: 44657 [2018-11-23 05:07:05,486 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 28 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=72, Invalid=200, Unknown=0, NotChecked=0, Total=272 [2018-11-23 05:07:05,653 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 44657 states. [2018-11-23 05:07:06,101 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 44657 to 31363. [2018-11-23 05:07:06,101 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 31363 states. [2018-11-23 05:07:06,520 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 31363 states to 31363 states and 135747 transitions. [2018-11-23 05:07:06,520 INFO L78 Accepts]: Start accepts. Automaton has 31363 states and 135747 transitions. Word has length 31 [2018-11-23 05:07:06,520 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 05:07:06,520 INFO L480 AbstractCegarLoop]: Abstraction has 31363 states and 135747 transitions. [2018-11-23 05:07:06,521 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-11-23 05:07:06,521 INFO L276 IsEmpty]: Start isEmpty. Operand 31363 states and 135747 transitions. [2018-11-23 05:07:06,526 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2018-11-23 05:07:06,527 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 05:07:06,527 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 05:07:06,527 INFO L423 AbstractCegarLoop]: === Iteration 3 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 05:07:06,527 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 05:07:06,527 INFO L82 PathProgramCache]: Analyzing trace with hash 825642035, now seen corresponding path program 1 times [2018-11-23 05:07:06,527 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 05:07:06,528 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 05:07:06,531 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 05:07:06,532 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-23 05:07:06,532 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 05:07:06,541 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 05:07:06,578 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 05:07:06,578 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 05:07:06,578 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-23 05:07:06,578 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-23 05:07:06,579 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-23 05:07:06,579 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-11-23 05:07:06,579 INFO L87 Difference]: Start difference. First operand 31363 states and 135747 transitions. Second operand 6 states. [2018-11-23 05:07:06,949 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 05:07:06,949 INFO L93 Difference]: Finished difference Result 67819 states and 285625 transitions. [2018-11-23 05:07:06,949 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-11-23 05:07:06,949 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 41 [2018-11-23 05:07:06,949 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 05:07:07,048 INFO L225 Difference]: With dead ends: 67819 [2018-11-23 05:07:07,048 INFO L226 Difference]: Without dead ends: 41885 [2018-11-23 05:07:07,049 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 7 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=40, Invalid=70, Unknown=0, NotChecked=0, Total=110 [2018-11-23 05:07:07,187 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 41885 states. [2018-11-23 05:07:07,604 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 41885 to 32363. [2018-11-23 05:07:07,605 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 32363 states. [2018-11-23 05:07:08,082 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 32363 states to 32363 states and 134937 transitions. [2018-11-23 05:07:08,082 INFO L78 Accepts]: Start accepts. Automaton has 32363 states and 134937 transitions. Word has length 41 [2018-11-23 05:07:08,082 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 05:07:08,082 INFO L480 AbstractCegarLoop]: Abstraction has 32363 states and 134937 transitions. [2018-11-23 05:07:08,083 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-23 05:07:08,083 INFO L276 IsEmpty]: Start isEmpty. Operand 32363 states and 134937 transitions. [2018-11-23 05:07:08,089 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2018-11-23 05:07:08,089 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 05:07:08,089 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 05:07:08,089 INFO L423 AbstractCegarLoop]: === Iteration 4 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 05:07:08,089 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 05:07:08,090 INFO L82 PathProgramCache]: Analyzing trace with hash -1767070092, now seen corresponding path program 1 times [2018-11-23 05:07:08,090 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 05:07:08,090 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 05:07:08,093 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 05:07:08,093 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 05:07:08,093 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 05:07:08,101 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 05:07:08,178 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 05:07:08,178 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 05:07:08,179 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-11-23 05:07:08,179 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-11-23 05:07:08,179 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-11-23 05:07:08,179 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2018-11-23 05:07:08,179 INFO L87 Difference]: Start difference. First operand 32363 states and 134937 transitions. Second operand 7 states. [2018-11-23 05:07:08,494 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 05:07:08,494 INFO L93 Difference]: Finished difference Result 39181 states and 163715 transitions. [2018-11-23 05:07:08,495 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-11-23 05:07:08,495 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 43 [2018-11-23 05:07:08,495 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 05:07:08,564 INFO L225 Difference]: With dead ends: 39181 [2018-11-23 05:07:08,564 INFO L226 Difference]: Without dead ends: 39109 [2018-11-23 05:07:08,565 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 18 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=47, Invalid=109, Unknown=0, NotChecked=0, Total=156 [2018-11-23 05:07:08,687 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 39109 states. [2018-11-23 05:07:09,139 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 39109 to 35466. [2018-11-23 05:07:09,139 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 35466 states. [2018-11-23 05:07:09,212 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 35466 states to 35466 states and 149245 transitions. [2018-11-23 05:07:09,212 INFO L78 Accepts]: Start accepts. Automaton has 35466 states and 149245 transitions. Word has length 43 [2018-11-23 05:07:09,212 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 05:07:09,212 INFO L480 AbstractCegarLoop]: Abstraction has 35466 states and 149245 transitions. [2018-11-23 05:07:09,212 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-11-23 05:07:09,212 INFO L276 IsEmpty]: Start isEmpty. Operand 35466 states and 149245 transitions. [2018-11-23 05:07:09,219 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2018-11-23 05:07:09,219 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 05:07:09,219 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 05:07:09,219 INFO L423 AbstractCegarLoop]: === Iteration 5 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 05:07:09,219 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 05:07:09,219 INFO L82 PathProgramCache]: Analyzing trace with hash -638377908, now seen corresponding path program 2 times [2018-11-23 05:07:09,219 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 05:07:09,219 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 05:07:09,221 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 05:07:09,221 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 05:07:09,221 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 05:07:09,231 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 05:07:09,327 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 05:07:09,328 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 05:07:09,328 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-11-23 05:07:09,328 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-11-23 05:07:09,328 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-11-23 05:07:09,328 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=71, Unknown=0, NotChecked=0, Total=90 [2018-11-23 05:07:09,328 INFO L87 Difference]: Start difference. First operand 35466 states and 149245 transitions. Second operand 10 states. [2018-11-23 05:07:09,781 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 05:07:09,781 INFO L93 Difference]: Finished difference Result 49948 states and 204487 transitions. [2018-11-23 05:07:09,782 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-11-23 05:07:09,782 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 43 [2018-11-23 05:07:09,782 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 05:07:09,860 INFO L225 Difference]: With dead ends: 49948 [2018-11-23 05:07:09,860 INFO L226 Difference]: Without dead ends: 45132 [2018-11-23 05:07:09,861 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 38 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=125, Invalid=255, Unknown=0, NotChecked=0, Total=380 [2018-11-23 05:07:10,001 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 45132 states. [2018-11-23 05:07:11,753 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 45132 to 35381. [2018-11-23 05:07:11,754 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 35381 states. [2018-11-23 05:07:11,823 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 35381 states to 35381 states and 148987 transitions. [2018-11-23 05:07:11,823 INFO L78 Accepts]: Start accepts. Automaton has 35381 states and 148987 transitions. Word has length 43 [2018-11-23 05:07:11,824 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 05:07:11,824 INFO L480 AbstractCegarLoop]: Abstraction has 35381 states and 148987 transitions. [2018-11-23 05:07:11,824 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-11-23 05:07:11,824 INFO L276 IsEmpty]: Start isEmpty. Operand 35381 states and 148987 transitions. [2018-11-23 05:07:11,830 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2018-11-23 05:07:11,830 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 05:07:11,831 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 05:07:11,831 INFO L423 AbstractCegarLoop]: === Iteration 6 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 05:07:11,831 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 05:07:11,831 INFO L82 PathProgramCache]: Analyzing trace with hash 703641554, now seen corresponding path program 1 times [2018-11-23 05:07:11,831 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 05:07:11,831 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 05:07:11,833 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 05:07:11,833 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-23 05:07:11,833 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 05:07:11,839 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 05:07:11,906 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 05:07:11,906 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 05:07:11,906 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-11-23 05:07:11,907 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-11-23 05:07:11,907 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-11-23 05:07:11,907 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2018-11-23 05:07:11,907 INFO L87 Difference]: Start difference. First operand 35381 states and 148987 transitions. Second operand 7 states. [2018-11-23 05:07:12,202 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 05:07:12,202 INFO L93 Difference]: Finished difference Result 38268 states and 158857 transitions. [2018-11-23 05:07:12,202 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-11-23 05:07:12,202 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 44 [2018-11-23 05:07:12,202 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 05:07:12,267 INFO L225 Difference]: With dead ends: 38268 [2018-11-23 05:07:12,267 INFO L226 Difference]: Without dead ends: 37788 [2018-11-23 05:07:12,267 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 18 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=47, Invalid=109, Unknown=0, NotChecked=0, Total=156 [2018-11-23 05:07:12,386 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 37788 states. [2018-11-23 05:07:12,730 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 37788 to 36092. [2018-11-23 05:07:12,730 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 36092 states. [2018-11-23 05:07:12,800 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 36092 states to 36092 states and 150963 transitions. [2018-11-23 05:07:12,801 INFO L78 Accepts]: Start accepts. Automaton has 36092 states and 150963 transitions. Word has length 44 [2018-11-23 05:07:12,801 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 05:07:12,801 INFO L480 AbstractCegarLoop]: Abstraction has 36092 states and 150963 transitions. [2018-11-23 05:07:12,801 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-11-23 05:07:12,801 INFO L276 IsEmpty]: Start isEmpty. Operand 36092 states and 150963 transitions. [2018-11-23 05:07:12,808 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2018-11-23 05:07:12,809 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 05:07:12,809 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 05:07:12,809 INFO L423 AbstractCegarLoop]: === Iteration 7 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 05:07:12,809 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 05:07:12,809 INFO L82 PathProgramCache]: Analyzing trace with hash -273083420, now seen corresponding path program 2 times [2018-11-23 05:07:12,809 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 05:07:12,809 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 05:07:12,810 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 05:07:12,811 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 05:07:12,811 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 05:07:12,817 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 05:07:13,422 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 05:07:13,423 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 05:07:13,423 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [17] imperfect sequences [] total 17 [2018-11-23 05:07:13,423 INFO L459 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-11-23 05:07:13,423 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-11-23 05:07:13,423 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=43, Invalid=229, Unknown=0, NotChecked=0, Total=272 [2018-11-23 05:07:13,423 INFO L87 Difference]: Start difference. First operand 36092 states and 150963 transitions. Second operand 17 states. [2018-11-23 05:07:14,228 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 05:07:14,229 INFO L93 Difference]: Finished difference Result 43003 states and 180466 transitions. [2018-11-23 05:07:14,229 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-11-23 05:07:14,229 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 44 [2018-11-23 05:07:14,229 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 05:07:14,305 INFO L225 Difference]: With dead ends: 43003 [2018-11-23 05:07:14,305 INFO L226 Difference]: Without dead ends: 42757 [2018-11-23 05:07:14,305 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 29 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 25 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 92 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=163, Invalid=539, Unknown=0, NotChecked=0, Total=702 [2018-11-23 05:07:14,436 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 42757 states. [2018-11-23 05:07:14,823 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 42757 to 39101. [2018-11-23 05:07:14,823 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 39101 states. [2018-11-23 05:07:14,900 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 39101 states to 39101 states and 165551 transitions. [2018-11-23 05:07:14,900 INFO L78 Accepts]: Start accepts. Automaton has 39101 states and 165551 transitions. Word has length 44 [2018-11-23 05:07:14,901 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 05:07:14,901 INFO L480 AbstractCegarLoop]: Abstraction has 39101 states and 165551 transitions. [2018-11-23 05:07:14,901 INFO L481 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-11-23 05:07:14,901 INFO L276 IsEmpty]: Start isEmpty. Operand 39101 states and 165551 transitions. [2018-11-23 05:07:14,910 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2018-11-23 05:07:14,910 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 05:07:14,910 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 05:07:14,910 INFO L423 AbstractCegarLoop]: === Iteration 8 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 05:07:14,910 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 05:07:14,911 INFO L82 PathProgramCache]: Analyzing trace with hash 1145868854, now seen corresponding path program 3 times [2018-11-23 05:07:14,911 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 05:07:14,911 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 05:07:14,912 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 05:07:14,913 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-23 05:07:14,913 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 05:07:14,918 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 05:07:15,108 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 05:07:15,109 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 05:07:15,109 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [14] imperfect sequences [] total 14 [2018-11-23 05:07:15,109 INFO L459 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-11-23 05:07:15,109 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-11-23 05:07:15,109 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=40, Invalid=142, Unknown=0, NotChecked=0, Total=182 [2018-11-23 05:07:15,110 INFO L87 Difference]: Start difference. First operand 39101 states and 165551 transitions. Second operand 14 states. [2018-11-23 05:07:15,534 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 05:07:15,534 INFO L93 Difference]: Finished difference Result 52387 states and 222062 transitions. [2018-11-23 05:07:15,534 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-11-23 05:07:15,534 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 44 [2018-11-23 05:07:15,534 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 05:07:15,635 INFO L225 Difference]: With dead ends: 52387 [2018-11-23 05:07:15,635 INFO L226 Difference]: Without dead ends: 52141 [2018-11-23 05:07:15,635 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 25 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 75 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=128, Invalid=378, Unknown=0, NotChecked=0, Total=506 [2018-11-23 05:07:15,778 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 52141 states. [2018-11-23 05:07:16,489 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 52141 to 39028. [2018-11-23 05:07:16,490 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 39028 states. [2018-11-23 05:07:16,565 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 39028 states to 39028 states and 165324 transitions. [2018-11-23 05:07:16,565 INFO L78 Accepts]: Start accepts. Automaton has 39028 states and 165324 transitions. Word has length 44 [2018-11-23 05:07:16,565 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 05:07:16,565 INFO L480 AbstractCegarLoop]: Abstraction has 39028 states and 165324 transitions. [2018-11-23 05:07:16,565 INFO L481 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-11-23 05:07:16,565 INFO L276 IsEmpty]: Start isEmpty. Operand 39028 states and 165324 transitions. [2018-11-23 05:07:16,577 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47 [2018-11-23 05:07:16,578 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 05:07:16,578 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 05:07:16,578 INFO L423 AbstractCegarLoop]: === Iteration 9 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 05:07:16,578 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 05:07:16,578 INFO L82 PathProgramCache]: Analyzing trace with hash -924841218, now seen corresponding path program 1 times [2018-11-23 05:07:16,578 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 05:07:16,578 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 05:07:16,579 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 05:07:16,579 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-23 05:07:16,579 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 05:07:16,585 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 05:07:17,047 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 05:07:17,047 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 05:07:17,047 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [20] imperfect sequences [] total 20 [2018-11-23 05:07:17,047 INFO L459 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-11-23 05:07:17,047 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-11-23 05:07:17,047 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=52, Invalid=328, Unknown=0, NotChecked=0, Total=380 [2018-11-23 05:07:17,048 INFO L87 Difference]: Start difference. First operand 39028 states and 165324 transitions. Second operand 20 states. [2018-11-23 05:07:19,164 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 05:07:19,164 INFO L93 Difference]: Finished difference Result 54953 states and 225523 transitions. [2018-11-23 05:07:19,164 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2018-11-23 05:07:19,164 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 46 [2018-11-23 05:07:19,165 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 05:07:19,278 INFO L225 Difference]: With dead ends: 54953 [2018-11-23 05:07:19,278 INFO L226 Difference]: Without dead ends: 50049 [2018-11-23 05:07:19,279 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 49 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 46 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 493 ImplicationChecksByTransitivity, 1.7s TimeCoverageRelationStatistics Valid=462, Invalid=1794, Unknown=0, NotChecked=0, Total=2256 [2018-11-23 05:07:19,423 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 50049 states. [2018-11-23 05:07:19,839 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 50049 to 39103. [2018-11-23 05:07:19,839 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 39103 states. [2018-11-23 05:07:19,920 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 39103 states to 39103 states and 165629 transitions. [2018-11-23 05:07:19,920 INFO L78 Accepts]: Start accepts. Automaton has 39103 states and 165629 transitions. Word has length 46 [2018-11-23 05:07:19,920 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 05:07:19,920 INFO L480 AbstractCegarLoop]: Abstraction has 39103 states and 165629 transitions. [2018-11-23 05:07:19,920 INFO L481 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-11-23 05:07:19,920 INFO L276 IsEmpty]: Start isEmpty. Operand 39103 states and 165629 transitions. [2018-11-23 05:07:19,933 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47 [2018-11-23 05:07:19,933 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 05:07:19,934 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 05:07:19,934 INFO L423 AbstractCegarLoop]: === Iteration 10 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 05:07:19,934 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 05:07:19,934 INFO L82 PathProgramCache]: Analyzing trace with hash -1687924148, now seen corresponding path program 2 times [2018-11-23 05:07:19,934 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 05:07:19,934 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 05:07:19,935 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 05:07:19,935 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 05:07:19,935 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 05:07:19,941 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 05:07:20,077 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 05:07:20,077 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 05:07:20,077 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2018-11-23 05:07:20,077 INFO L459 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-11-23 05:07:20,078 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-11-23 05:07:20,078 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=26, Invalid=106, Unknown=0, NotChecked=0, Total=132 [2018-11-23 05:07:20,078 INFO L87 Difference]: Start difference. First operand 39103 states and 165629 transitions. Second operand 12 states. [2018-11-23 05:07:20,208 WARN L180 SmtUtils]: Spent 106.00 ms on a formula simplification that was a NOOP. DAG size: 14 [2018-11-23 05:07:20,650 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 05:07:20,650 INFO L93 Difference]: Finished difference Result 55473 states and 227887 transitions. [2018-11-23 05:07:20,651 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-11-23 05:07:20,651 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 46 [2018-11-23 05:07:20,651 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 05:07:20,745 INFO L225 Difference]: With dead ends: 55473 [2018-11-23 05:07:20,745 INFO L226 Difference]: Without dead ends: 48829 [2018-11-23 05:07:20,745 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 27 GetRequests, 7 SyntacticMatches, 0 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 50 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=145, Invalid=317, Unknown=0, NotChecked=0, Total=462 [2018-11-23 05:07:20,881 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 48829 states. [2018-11-23 05:07:21,330 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 48829 to 38756. [2018-11-23 05:07:21,330 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 38756 states. [2018-11-23 05:07:21,414 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 38756 states to 38756 states and 164262 transitions. [2018-11-23 05:07:21,414 INFO L78 Accepts]: Start accepts. Automaton has 38756 states and 164262 transitions. Word has length 46 [2018-11-23 05:07:21,414 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 05:07:21,414 INFO L480 AbstractCegarLoop]: Abstraction has 38756 states and 164262 transitions. [2018-11-23 05:07:21,414 INFO L481 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-11-23 05:07:21,414 INFO L276 IsEmpty]: Start isEmpty. Operand 38756 states and 164262 transitions. [2018-11-23 05:07:21,427 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47 [2018-11-23 05:07:21,427 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 05:07:21,427 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 05:07:21,427 INFO L423 AbstractCegarLoop]: === Iteration 11 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 05:07:21,428 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 05:07:21,428 INFO L82 PathProgramCache]: Analyzing trace with hash -2121874178, now seen corresponding path program 1 times [2018-11-23 05:07:21,428 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 05:07:21,428 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 05:07:21,429 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 05:07:21,429 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-23 05:07:21,429 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 05:07:21,433 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 05:07:21,867 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 05:07:21,868 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 05:07:21,868 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [17] imperfect sequences [] total 17 [2018-11-23 05:07:21,868 INFO L459 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-11-23 05:07:21,868 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-11-23 05:07:21,868 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=37, Invalid=235, Unknown=0, NotChecked=0, Total=272 [2018-11-23 05:07:21,868 INFO L87 Difference]: Start difference. First operand 38756 states and 164262 transitions. Second operand 17 states. [2018-11-23 05:07:23,022 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 05:07:23,022 INFO L93 Difference]: Finished difference Result 47709 states and 201870 transitions. [2018-11-23 05:07:23,023 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-11-23 05:07:23,023 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 46 [2018-11-23 05:07:23,023 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 05:07:23,118 INFO L225 Difference]: With dead ends: 47709 [2018-11-23 05:07:23,118 INFO L226 Difference]: Without dead ends: 47403 [2018-11-23 05:07:23,118 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 31 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 85 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=173, Invalid=583, Unknown=0, NotChecked=0, Total=756 [2018-11-23 05:07:23,256 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 47403 states. [2018-11-23 05:07:23,684 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 47403 to 40796. [2018-11-23 05:07:23,684 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 40796 states. [2018-11-23 05:07:23,770 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 40796 states to 40796 states and 173951 transitions. [2018-11-23 05:07:23,770 INFO L78 Accepts]: Start accepts. Automaton has 40796 states and 173951 transitions. Word has length 46 [2018-11-23 05:07:23,770 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 05:07:23,770 INFO L480 AbstractCegarLoop]: Abstraction has 40796 states and 173951 transitions. [2018-11-23 05:07:23,770 INFO L481 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-11-23 05:07:23,770 INFO L276 IsEmpty]: Start isEmpty. Operand 40796 states and 173951 transitions. [2018-11-23 05:07:23,784 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47 [2018-11-23 05:07:23,785 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 05:07:23,785 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 05:07:23,785 INFO L423 AbstractCegarLoop]: === Iteration 12 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 05:07:23,785 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 05:07:23,785 INFO L82 PathProgramCache]: Analyzing trace with hash 89732511, now seen corresponding path program 1 times [2018-11-23 05:07:23,785 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 05:07:23,785 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 05:07:23,786 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 05:07:23,787 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 05:07:23,787 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 05:07:23,791 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 05:07:24,215 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 05:07:24,216 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 05:07:24,216 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [17] imperfect sequences [] total 17 [2018-11-23 05:07:24,216 INFO L459 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-11-23 05:07:24,216 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-11-23 05:07:24,217 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=42, Invalid=230, Unknown=0, NotChecked=0, Total=272 [2018-11-23 05:07:24,217 INFO L87 Difference]: Start difference. First operand 40796 states and 173951 transitions. Second operand 17 states. [2018-11-23 05:07:25,289 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 05:07:25,290 INFO L93 Difference]: Finished difference Result 48941 states and 207557 transitions. [2018-11-23 05:07:25,290 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-11-23 05:07:25,290 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 46 [2018-11-23 05:07:25,290 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 05:07:25,380 INFO L225 Difference]: With dead ends: 48941 [2018-11-23 05:07:25,380 INFO L226 Difference]: Without dead ends: 48635 [2018-11-23 05:07:25,381 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 31 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 27 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 128 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=176, Invalid=636, Unknown=0, NotChecked=0, Total=812 [2018-11-23 05:07:25,518 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 48635 states. [2018-11-23 05:07:25,936 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 48635 to 40772. [2018-11-23 05:07:25,937 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 40772 states. [2018-11-23 05:07:26,019 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 40772 states to 40772 states and 173863 transitions. [2018-11-23 05:07:26,019 INFO L78 Accepts]: Start accepts. Automaton has 40772 states and 173863 transitions. Word has length 46 [2018-11-23 05:07:26,019 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 05:07:26,019 INFO L480 AbstractCegarLoop]: Abstraction has 40772 states and 173863 transitions. [2018-11-23 05:07:26,019 INFO L481 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-11-23 05:07:26,019 INFO L276 IsEmpty]: Start isEmpty. Operand 40772 states and 173863 transitions. [2018-11-23 05:07:26,032 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47 [2018-11-23 05:07:26,032 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 05:07:26,032 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 05:07:26,033 INFO L423 AbstractCegarLoop]: === Iteration 13 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 05:07:26,033 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 05:07:26,033 INFO L82 PathProgramCache]: Analyzing trace with hash 1822746999, now seen corresponding path program 2 times [2018-11-23 05:07:26,033 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 05:07:26,033 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 05:07:26,035 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 05:07:26,035 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 05:07:26,035 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 05:07:26,040 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 05:07:26,525 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 05:07:26,525 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 05:07:26,525 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [17] imperfect sequences [] total 17 [2018-11-23 05:07:26,525 INFO L459 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-11-23 05:07:26,526 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-11-23 05:07:26,526 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=42, Invalid=230, Unknown=0, NotChecked=0, Total=272 [2018-11-23 05:07:26,526 INFO L87 Difference]: Start difference. First operand 40772 states and 173863 transitions. Second operand 17 states. [2018-11-23 05:07:27,517 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 05:07:27,517 INFO L93 Difference]: Finished difference Result 49993 states and 209684 transitions. [2018-11-23 05:07:27,517 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2018-11-23 05:07:27,517 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 46 [2018-11-23 05:07:27,517 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 05:07:27,619 INFO L225 Difference]: With dead ends: 49993 [2018-11-23 05:07:27,619 INFO L226 Difference]: Without dead ends: 49687 [2018-11-23 05:07:27,619 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 38 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 34 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 233 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=259, Invalid=1001, Unknown=0, NotChecked=0, Total=1260 [2018-11-23 05:07:27,761 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 49687 states. [2018-11-23 05:07:28,196 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 49687 to 38645. [2018-11-23 05:07:28,196 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 38645 states. [2018-11-23 05:07:28,275 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 38645 states to 38645 states and 163925 transitions. [2018-11-23 05:07:28,275 INFO L78 Accepts]: Start accepts. Automaton has 38645 states and 163925 transitions. Word has length 46 [2018-11-23 05:07:28,275 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 05:07:28,275 INFO L480 AbstractCegarLoop]: Abstraction has 38645 states and 163925 transitions. [2018-11-23 05:07:28,275 INFO L481 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-11-23 05:07:28,275 INFO L276 IsEmpty]: Start isEmpty. Operand 38645 states and 163925 transitions. [2018-11-23 05:07:28,287 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47 [2018-11-23 05:07:28,288 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 05:07:28,288 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 05:07:28,288 INFO L423 AbstractCegarLoop]: === Iteration 14 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 05:07:28,288 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 05:07:28,288 INFO L82 PathProgramCache]: Analyzing trace with hash 1548751685, now seen corresponding path program 1 times [2018-11-23 05:07:28,288 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 05:07:28,288 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 05:07:28,289 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 05:07:28,289 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-23 05:07:28,289 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 05:07:28,294 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 05:07:28,730 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 05:07:28,731 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 05:07:28,731 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [19] imperfect sequences [] total 19 [2018-11-23 05:07:28,731 INFO L459 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-11-23 05:07:28,731 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-11-23 05:07:28,731 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=52, Invalid=290, Unknown=0, NotChecked=0, Total=342 [2018-11-23 05:07:28,731 INFO L87 Difference]: Start difference. First operand 38645 states and 163925 transitions. Second operand 19 states. [2018-11-23 05:07:29,627 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 05:07:29,627 INFO L93 Difference]: Finished difference Result 48949 states and 208196 transitions. [2018-11-23 05:07:29,627 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-11-23 05:07:29,627 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 46 [2018-11-23 05:07:29,627 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 05:07:29,894 INFO L225 Difference]: With dead ends: 48949 [2018-11-23 05:07:29,894 INFO L226 Difference]: Without dead ends: 48703 [2018-11-23 05:07:29,895 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 31 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 27 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 120 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=182, Invalid=630, Unknown=0, NotChecked=0, Total=812 [2018-11-23 05:07:30,028 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 48703 states. [2018-11-23 05:07:30,424 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 48703 to 38308. [2018-11-23 05:07:30,424 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 38308 states. [2018-11-23 05:07:30,504 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 38308 states to 38308 states and 162641 transitions. [2018-11-23 05:07:30,504 INFO L78 Accepts]: Start accepts. Automaton has 38308 states and 162641 transitions. Word has length 46 [2018-11-23 05:07:30,505 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 05:07:30,505 INFO L480 AbstractCegarLoop]: Abstraction has 38308 states and 162641 transitions. [2018-11-23 05:07:30,505 INFO L481 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-11-23 05:07:30,505 INFO L276 IsEmpty]: Start isEmpty. Operand 38308 states and 162641 transitions. [2018-11-23 05:07:30,517 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47 [2018-11-23 05:07:30,517 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 05:07:30,517 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 05:07:30,517 INFO L423 AbstractCegarLoop]: === Iteration 15 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 05:07:30,517 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 05:07:30,517 INFO L82 PathProgramCache]: Analyzing trace with hash -475658810, now seen corresponding path program 2 times [2018-11-23 05:07:30,518 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 05:07:30,518 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 05:07:30,518 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 05:07:30,518 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 05:07:30,519 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 05:07:30,522 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 05:07:30,662 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 05:07:30,662 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 05:07:30,662 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2018-11-23 05:07:30,662 INFO L459 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-11-23 05:07:30,662 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-11-23 05:07:30,662 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=29, Invalid=103, Unknown=0, NotChecked=0, Total=132 [2018-11-23 05:07:30,662 INFO L87 Difference]: Start difference. First operand 38308 states and 162641 transitions. Second operand 12 states. [2018-11-23 05:07:31,096 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 05:07:31,096 INFO L93 Difference]: Finished difference Result 52333 states and 220932 transitions. [2018-11-23 05:07:31,097 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-11-23 05:07:31,097 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 46 [2018-11-23 05:07:31,097 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 05:07:31,203 INFO L225 Difference]: With dead ends: 52333 [2018-11-23 05:07:31,203 INFO L226 Difference]: Without dead ends: 52027 [2018-11-23 05:07:31,203 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 52 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=98, Invalid=282, Unknown=0, NotChecked=0, Total=380 [2018-11-23 05:07:31,350 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 52027 states. [2018-11-23 05:07:31,780 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 52027 to 38150. [2018-11-23 05:07:31,780 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 38150 states. [2018-11-23 05:07:31,861 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 38150 states to 38150 states and 162226 transitions. [2018-11-23 05:07:31,861 INFO L78 Accepts]: Start accepts. Automaton has 38150 states and 162226 transitions. Word has length 46 [2018-11-23 05:07:31,861 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 05:07:31,861 INFO L480 AbstractCegarLoop]: Abstraction has 38150 states and 162226 transitions. [2018-11-23 05:07:31,861 INFO L481 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-11-23 05:07:31,861 INFO L276 IsEmpty]: Start isEmpty. Operand 38150 states and 162226 transitions. [2018-11-23 05:07:31,879 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2018-11-23 05:07:31,879 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 05:07:31,880 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 05:07:31,880 INFO L423 AbstractCegarLoop]: === Iteration 16 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 05:07:31,880 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 05:07:31,880 INFO L82 PathProgramCache]: Analyzing trace with hash -712228033, now seen corresponding path program 1 times [2018-11-23 05:07:31,880 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 05:07:31,880 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 05:07:31,881 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 05:07:31,881 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-23 05:07:31,881 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 05:07:31,885 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 05:07:32,396 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 05:07:32,396 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 05:07:32,396 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [19] imperfect sequences [] total 19 [2018-11-23 05:07:32,397 INFO L459 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-11-23 05:07:32,397 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-11-23 05:07:32,397 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=51, Invalid=291, Unknown=0, NotChecked=0, Total=342 [2018-11-23 05:07:32,397 INFO L87 Difference]: Start difference. First operand 38150 states and 162226 transitions. Second operand 19 states. [2018-11-23 05:07:33,169 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 05:07:33,169 INFO L93 Difference]: Finished difference Result 46294 states and 195371 transitions. [2018-11-23 05:07:33,169 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-11-23 05:07:33,169 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 48 [2018-11-23 05:07:33,169 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 05:07:33,258 INFO L225 Difference]: With dead ends: 46294 [2018-11-23 05:07:33,258 INFO L226 Difference]: Without dead ends: 45988 [2018-11-23 05:07:33,258 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 30 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 25 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 107 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=154, Invalid=548, Unknown=0, NotChecked=0, Total=702 [2018-11-23 05:07:33,391 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 45988 states. [2018-11-23 05:07:33,801 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 45988 to 36584. [2018-11-23 05:07:33,801 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 36584 states. [2018-11-23 05:07:33,877 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 36584 states to 36584 states and 155048 transitions. [2018-11-23 05:07:33,877 INFO L78 Accepts]: Start accepts. Automaton has 36584 states and 155048 transitions. Word has length 48 [2018-11-23 05:07:33,877 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 05:07:33,877 INFO L480 AbstractCegarLoop]: Abstraction has 36584 states and 155048 transitions. [2018-11-23 05:07:33,877 INFO L481 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-11-23 05:07:33,877 INFO L276 IsEmpty]: Start isEmpty. Operand 36584 states and 155048 transitions. [2018-11-23 05:07:33,900 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2018-11-23 05:07:33,901 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 05:07:33,901 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 05:07:33,901 INFO L423 AbstractCegarLoop]: === Iteration 17 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 05:07:33,901 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 05:07:33,901 INFO L82 PathProgramCache]: Analyzing trace with hash -1120442176, now seen corresponding path program 1 times [2018-11-23 05:07:33,901 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 05:07:33,901 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 05:07:33,902 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 05:07:33,902 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 05:07:33,902 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 05:07:33,906 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 05:07:34,424 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 05:07:34,424 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 05:07:34,424 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [18] imperfect sequences [] total 18 [2018-11-23 05:07:34,424 INFO L459 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-11-23 05:07:34,424 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-11-23 05:07:34,425 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=49, Invalid=257, Unknown=0, NotChecked=0, Total=306 [2018-11-23 05:07:34,425 INFO L87 Difference]: Start difference. First operand 36584 states and 155048 transitions. Second operand 18 states. [2018-11-23 05:07:35,465 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 05:07:35,465 INFO L93 Difference]: Finished difference Result 42357 states and 177918 transitions. [2018-11-23 05:07:35,466 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-11-23 05:07:35,466 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 48 [2018-11-23 05:07:35,466 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 05:07:35,543 INFO L225 Difference]: With dead ends: 42357 [2018-11-23 05:07:35,544 INFO L226 Difference]: Without dead ends: 42051 [2018-11-23 05:07:35,544 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 32 GetRequests, 4 SyntacticMatches, 2 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 113 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=182, Invalid=574, Unknown=0, NotChecked=0, Total=756 [2018-11-23 05:07:35,678 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 42051 states. [2018-11-23 05:07:36,187 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 42051 to 34160. [2018-11-23 05:07:36,187 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 34160 states. [2018-11-23 05:07:36,253 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34160 states to 34160 states and 144012 transitions. [2018-11-23 05:07:36,254 INFO L78 Accepts]: Start accepts. Automaton has 34160 states and 144012 transitions. Word has length 48 [2018-11-23 05:07:36,254 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 05:07:36,254 INFO L480 AbstractCegarLoop]: Abstraction has 34160 states and 144012 transitions. [2018-11-23 05:07:36,254 INFO L481 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-11-23 05:07:36,254 INFO L276 IsEmpty]: Start isEmpty. Operand 34160 states and 144012 transitions. [2018-11-23 05:07:36,270 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2018-11-23 05:07:36,270 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 05:07:36,270 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 05:07:36,271 INFO L423 AbstractCegarLoop]: === Iteration 18 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 05:07:36,271 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 05:07:36,271 INFO L82 PathProgramCache]: Analyzing trace with hash 799656368, now seen corresponding path program 1 times [2018-11-23 05:07:36,271 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 05:07:36,271 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 05:07:36,272 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 05:07:36,272 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 05:07:36,272 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 05:07:36,275 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 05:07:36,325 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 05:07:36,326 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 05:07:36,326 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-11-23 05:07:36,326 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-11-23 05:07:36,326 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-11-23 05:07:36,326 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2018-11-23 05:07:36,326 INFO L87 Difference]: Start difference. First operand 34160 states and 144012 transitions. Second operand 7 states. [2018-11-23 05:07:36,596 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 05:07:36,596 INFO L93 Difference]: Finished difference Result 38880 states and 161858 transitions. [2018-11-23 05:07:36,596 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-11-23 05:07:36,597 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 49 [2018-11-23 05:07:36,597 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 05:07:36,665 INFO L225 Difference]: With dead ends: 38880 [2018-11-23 05:07:36,665 INFO L226 Difference]: Without dead ends: 38046 [2018-11-23 05:07:36,665 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 18 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=47, Invalid=109, Unknown=0, NotChecked=0, Total=156 [2018-11-23 05:07:36,784 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 38046 states. [2018-11-23 05:07:37,130 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 38046 to 36228. [2018-11-23 05:07:37,130 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 36228 states. [2018-11-23 05:07:37,203 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 36228 states to 36228 states and 152400 transitions. [2018-11-23 05:07:37,203 INFO L78 Accepts]: Start accepts. Automaton has 36228 states and 152400 transitions. Word has length 49 [2018-11-23 05:07:37,203 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 05:07:37,203 INFO L480 AbstractCegarLoop]: Abstraction has 36228 states and 152400 transitions. [2018-11-23 05:07:37,203 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-11-23 05:07:37,203 INFO L276 IsEmpty]: Start isEmpty. Operand 36228 states and 152400 transitions. [2018-11-23 05:07:37,220 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2018-11-23 05:07:37,220 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 05:07:37,220 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 05:07:37,221 INFO L423 AbstractCegarLoop]: === Iteration 19 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 05:07:37,221 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 05:07:37,221 INFO L82 PathProgramCache]: Analyzing trace with hash -1212289711, now seen corresponding path program 1 times [2018-11-23 05:07:37,221 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 05:07:37,221 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 05:07:37,222 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 05:07:37,222 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 05:07:37,222 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 05:07:37,225 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 05:07:37,398 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 05:07:37,399 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 05:07:37,399 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [14] imperfect sequences [] total 14 [2018-11-23 05:07:37,399 INFO L459 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-11-23 05:07:37,399 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-11-23 05:07:37,399 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=35, Invalid=147, Unknown=0, NotChecked=0, Total=182 [2018-11-23 05:07:37,399 INFO L87 Difference]: Start difference. First operand 36228 states and 152400 transitions. Second operand 14 states. [2018-11-23 05:07:37,976 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 05:07:37,977 INFO L93 Difference]: Finished difference Result 55817 states and 227535 transitions. [2018-11-23 05:07:37,978 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-11-23 05:07:37,978 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 49 [2018-11-23 05:07:37,978 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 05:07:38,081 INFO L225 Difference]: With dead ends: 55817 [2018-11-23 05:07:38,081 INFO L226 Difference]: Without dead ends: 41649 [2018-11-23 05:07:38,082 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 28 GetRequests, 6 SyntacticMatches, 0 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 65 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=167, Invalid=385, Unknown=0, NotChecked=0, Total=552 [2018-11-23 05:07:38,259 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 41649 states. [2018-11-23 05:07:38,658 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 41649 to 31649. [2018-11-23 05:07:38,658 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 31649 states. [2018-11-23 05:07:38,725 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 31649 states to 31649 states and 132071 transitions. [2018-11-23 05:07:38,725 INFO L78 Accepts]: Start accepts. Automaton has 31649 states and 132071 transitions. Word has length 49 [2018-11-23 05:07:38,725 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 05:07:38,726 INFO L480 AbstractCegarLoop]: Abstraction has 31649 states and 132071 transitions. [2018-11-23 05:07:38,726 INFO L481 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-11-23 05:07:38,726 INFO L276 IsEmpty]: Start isEmpty. Operand 31649 states and 132071 transitions. [2018-11-23 05:07:38,742 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2018-11-23 05:07:38,742 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 05:07:38,742 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 05:07:38,742 INFO L423 AbstractCegarLoop]: === Iteration 20 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 05:07:38,742 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 05:07:38,742 INFO L82 PathProgramCache]: Analyzing trace with hash 1269167334, now seen corresponding path program 1 times [2018-11-23 05:07:38,743 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 05:07:38,743 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 05:07:38,744 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 05:07:38,744 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 05:07:38,744 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 05:07:38,748 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 05:07:39,428 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 05:07:39,428 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 05:07:39,428 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [21] imperfect sequences [] total 21 [2018-11-23 05:07:39,429 INFO L459 AbstractCegarLoop]: Interpolant automaton has 21 states [2018-11-23 05:07:39,429 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2018-11-23 05:07:39,429 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=56, Invalid=364, Unknown=0, NotChecked=0, Total=420 [2018-11-23 05:07:39,429 INFO L87 Difference]: Start difference. First operand 31649 states and 132071 transitions. Second operand 21 states. [2018-11-23 05:07:39,925 WARN L180 SmtUtils]: Spent 111.00 ms on a formula simplification. DAG size of input: 94 DAG size of output: 60 [2018-11-23 05:07:40,054 WARN L180 SmtUtils]: Spent 109.00 ms on a formula simplification. DAG size of input: 97 DAG size of output: 63 [2018-11-23 05:07:40,674 WARN L180 SmtUtils]: Spent 118.00 ms on a formula simplification. DAG size of input: 97 DAG size of output: 61 [2018-11-23 05:07:42,237 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 05:07:42,237 INFO L93 Difference]: Finished difference Result 55168 states and 228464 transitions. [2018-11-23 05:07:42,237 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 37 states. [2018-11-23 05:07:42,237 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 49 [2018-11-23 05:07:42,237 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 05:07:42,343 INFO L225 Difference]: With dead ends: 55168 [2018-11-23 05:07:42,343 INFO L226 Difference]: Without dead ends: 54346 [2018-11-23 05:07:42,344 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 53 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 48 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 605 ImplicationChecksByTransitivity, 2.6s TimeCoverageRelationStatistics Valid=542, Invalid=1908, Unknown=0, NotChecked=0, Total=2450 [2018-11-23 05:07:42,473 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 54346 states. [2018-11-23 05:07:43,009 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 54346 to 35364. [2018-11-23 05:07:43,010 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 35364 states. [2018-11-23 05:07:43,083 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 35364 states to 35364 states and 150822 transitions. [2018-11-23 05:07:43,083 INFO L78 Accepts]: Start accepts. Automaton has 35364 states and 150822 transitions. Word has length 49 [2018-11-23 05:07:43,083 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 05:07:43,083 INFO L480 AbstractCegarLoop]: Abstraction has 35364 states and 150822 transitions. [2018-11-23 05:07:43,083 INFO L481 AbstractCegarLoop]: Interpolant automaton has 21 states. [2018-11-23 05:07:43,083 INFO L276 IsEmpty]: Start isEmpty. Operand 35364 states and 150822 transitions. [2018-11-23 05:07:43,103 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2018-11-23 05:07:43,103 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 05:07:43,103 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 05:07:43,103 INFO L423 AbstractCegarLoop]: === Iteration 21 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 05:07:43,103 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 05:07:43,103 INFO L82 PathProgramCache]: Analyzing trace with hash 710299090, now seen corresponding path program 2 times [2018-11-23 05:07:43,104 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 05:07:43,104 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 05:07:43,105 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 05:07:43,105 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 05:07:43,105 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 05:07:43,107 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 05:07:43,342 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 05:07:43,342 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 05:07:43,342 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [16] imperfect sequences [] total 16 [2018-11-23 05:07:43,343 INFO L459 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-11-23 05:07:43,343 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-11-23 05:07:43,343 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=53, Invalid=187, Unknown=0, NotChecked=0, Total=240 [2018-11-23 05:07:43,343 INFO L87 Difference]: Start difference. First operand 35364 states and 150822 transitions. Second operand 16 states. [2018-11-23 05:07:43,707 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 05:07:43,708 INFO L93 Difference]: Finished difference Result 39597 states and 166907 transitions. [2018-11-23 05:07:43,708 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-11-23 05:07:43,708 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 49 [2018-11-23 05:07:43,708 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 05:07:43,782 INFO L225 Difference]: With dead ends: 39597 [2018-11-23 05:07:43,782 INFO L226 Difference]: Without dead ends: 38958 [2018-11-23 05:07:43,782 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 65 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=100, Invalid=280, Unknown=0, NotChecked=0, Total=380 [2018-11-23 05:07:43,891 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 38958 states. [2018-11-23 05:07:44,239 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 38958 to 35364. [2018-11-23 05:07:44,240 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 35364 states. [2018-11-23 05:07:44,312 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 35364 states to 35364 states and 150822 transitions. [2018-11-23 05:07:44,312 INFO L78 Accepts]: Start accepts. Automaton has 35364 states and 150822 transitions. Word has length 49 [2018-11-23 05:07:44,312 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 05:07:44,312 INFO L480 AbstractCegarLoop]: Abstraction has 35364 states and 150822 transitions. [2018-11-23 05:07:44,312 INFO L481 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-11-23 05:07:44,312 INFO L276 IsEmpty]: Start isEmpty. Operand 35364 states and 150822 transitions. [2018-11-23 05:07:44,331 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2018-11-23 05:07:44,331 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 05:07:44,331 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 05:07:44,332 INFO L423 AbstractCegarLoop]: === Iteration 22 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 05:07:44,332 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 05:07:44,332 INFO L82 PathProgramCache]: Analyzing trace with hash 227988774, now seen corresponding path program 3 times [2018-11-23 05:07:44,332 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 05:07:44,332 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 05:07:44,333 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 05:07:44,333 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-23 05:07:44,333 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 05:07:44,336 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 05:07:44,754 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 05:07:44,754 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 05:07:44,754 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [19] imperfect sequences [] total 19 [2018-11-23 05:07:44,755 INFO L459 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-11-23 05:07:44,755 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-11-23 05:07:44,755 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=55, Invalid=287, Unknown=0, NotChecked=0, Total=342 [2018-11-23 05:07:44,755 INFO L87 Difference]: Start difference. First operand 35364 states and 150822 transitions. Second operand 19 states. [2018-11-23 05:07:45,554 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 05:07:45,554 INFO L93 Difference]: Finished difference Result 41619 states and 175078 transitions. [2018-11-23 05:07:45,554 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-11-23 05:07:45,554 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 49 [2018-11-23 05:07:45,554 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 05:07:45,632 INFO L225 Difference]: With dead ends: 41619 [2018-11-23 05:07:45,632 INFO L226 Difference]: Without dead ends: 40980 [2018-11-23 05:07:45,633 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 32 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 27 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 126 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=187, Invalid=625, Unknown=0, NotChecked=0, Total=812 [2018-11-23 05:07:45,746 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 40980 states. [2018-11-23 05:07:46,114 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 40980 to 35412. [2018-11-23 05:07:46,114 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 35412 states. [2018-11-23 05:07:46,185 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 35412 states to 35412 states and 150956 transitions. [2018-11-23 05:07:46,185 INFO L78 Accepts]: Start accepts. Automaton has 35412 states and 150956 transitions. Word has length 49 [2018-11-23 05:07:46,185 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 05:07:46,186 INFO L480 AbstractCegarLoop]: Abstraction has 35412 states and 150956 transitions. [2018-11-23 05:07:46,186 INFO L481 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-11-23 05:07:46,186 INFO L276 IsEmpty]: Start isEmpty. Operand 35412 states and 150956 transitions. [2018-11-23 05:07:46,204 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2018-11-23 05:07:46,204 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 05:07:46,204 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 05:07:46,205 INFO L423 AbstractCegarLoop]: === Iteration 23 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 05:07:46,205 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 05:07:46,205 INFO L82 PathProgramCache]: Analyzing trace with hash -344784414, now seen corresponding path program 4 times [2018-11-23 05:07:46,205 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 05:07:46,205 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 05:07:46,206 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 05:07:46,206 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-23 05:07:46,206 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 05:07:46,209 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 05:07:46,406 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 05:07:46,406 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 05:07:46,406 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [16] imperfect sequences [] total 16 [2018-11-23 05:07:46,406 INFO L459 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-11-23 05:07:46,406 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-11-23 05:07:46,406 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=53, Invalid=187, Unknown=0, NotChecked=0, Total=240 [2018-11-23 05:07:46,406 INFO L87 Difference]: Start difference. First operand 35412 states and 150956 transitions. Second operand 16 states. [2018-11-23 05:07:46,860 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 05:07:46,861 INFO L93 Difference]: Finished difference Result 44552 states and 186042 transitions. [2018-11-23 05:07:46,861 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-11-23 05:07:46,861 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 49 [2018-11-23 05:07:46,861 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 05:07:46,939 INFO L225 Difference]: With dead ends: 44552 [2018-11-23 05:07:46,939 INFO L226 Difference]: Without dead ends: 43913 [2018-11-23 05:07:46,940 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 28 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 103 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=162, Invalid=488, Unknown=0, NotChecked=0, Total=650 [2018-11-23 05:07:47,055 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 43913 states. [2018-11-23 05:07:47,419 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 43913 to 34825. [2018-11-23 05:07:47,419 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 34825 states. [2018-11-23 05:07:47,490 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34825 states to 34825 states and 148359 transitions. [2018-11-23 05:07:47,490 INFO L78 Accepts]: Start accepts. Automaton has 34825 states and 148359 transitions. Word has length 49 [2018-11-23 05:07:47,490 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 05:07:47,490 INFO L480 AbstractCegarLoop]: Abstraction has 34825 states and 148359 transitions. [2018-11-23 05:07:47,490 INFO L481 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-11-23 05:07:47,490 INFO L276 IsEmpty]: Start isEmpty. Operand 34825 states and 148359 transitions. [2018-11-23 05:07:47,512 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2018-11-23 05:07:47,512 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 05:07:47,512 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 05:07:47,512 INFO L423 AbstractCegarLoop]: === Iteration 24 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 05:07:47,512 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 05:07:47,512 INFO L82 PathProgramCache]: Analyzing trace with hash 1190448904, now seen corresponding path program 1 times [2018-11-23 05:07:47,513 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 05:07:47,513 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 05:07:47,513 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 05:07:47,513 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-23 05:07:47,514 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 05:07:47,517 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 05:07:48,077 WARN L180 SmtUtils]: Spent 199.00 ms on a formula simplification. DAG size of input: 40 DAG size of output: 35 [2018-11-23 05:07:48,346 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 05:07:48,346 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 05:07:48,346 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [21] imperfect sequences [] total 21 [2018-11-23 05:07:48,347 INFO L459 AbstractCegarLoop]: Interpolant automaton has 21 states [2018-11-23 05:07:48,347 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2018-11-23 05:07:48,347 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=55, Invalid=365, Unknown=0, NotChecked=0, Total=420 [2018-11-23 05:07:48,347 INFO L87 Difference]: Start difference. First operand 34825 states and 148359 transitions. Second operand 21 states. [2018-11-23 05:07:48,744 WARN L180 SmtUtils]: Spent 111.00 ms on a formula simplification. DAG size of input: 96 DAG size of output: 65 [2018-11-23 05:07:48,872 WARN L180 SmtUtils]: Spent 115.00 ms on a formula simplification. DAG size of input: 99 DAG size of output: 68 [2018-11-23 05:07:50,259 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 05:07:50,259 INFO L93 Difference]: Finished difference Result 36224 states and 150699 transitions. [2018-11-23 05:07:50,259 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2018-11-23 05:07:50,260 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 51 [2018-11-23 05:07:50,260 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 05:07:50,323 INFO L225 Difference]: With dead ends: 36224 [2018-11-23 05:07:50,324 INFO L226 Difference]: Without dead ends: 35180 [2018-11-23 05:07:50,324 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 46 GetRequests, 3 SyntacticMatches, 3 SemanticMatches, 40 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 367 ImplicationChecksByTransitivity, 2.1s TimeCoverageRelationStatistics Valid=381, Invalid=1341, Unknown=0, NotChecked=0, Total=1722 [2018-11-23 05:07:50,420 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 35180 states. [2018-11-23 05:07:50,735 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 35180 to 29756. [2018-11-23 05:07:50,735 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 29756 states. [2018-11-23 05:07:50,798 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29756 states to 29756 states and 124486 transitions. [2018-11-23 05:07:50,798 INFO L78 Accepts]: Start accepts. Automaton has 29756 states and 124486 transitions. Word has length 51 [2018-11-23 05:07:50,798 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 05:07:50,798 INFO L480 AbstractCegarLoop]: Abstraction has 29756 states and 124486 transitions. [2018-11-23 05:07:50,798 INFO L481 AbstractCegarLoop]: Interpolant automaton has 21 states. [2018-11-23 05:07:50,798 INFO L276 IsEmpty]: Start isEmpty. Operand 29756 states and 124486 transitions. [2018-11-23 05:07:50,818 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2018-11-23 05:07:50,819 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 05:07:50,819 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 05:07:50,819 INFO L423 AbstractCegarLoop]: === Iteration 25 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 05:07:50,819 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 05:07:50,819 INFO L82 PathProgramCache]: Analyzing trace with hash -1275829881, now seen corresponding path program 1 times [2018-11-23 05:07:50,819 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 05:07:50,819 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 05:07:50,820 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 05:07:50,820 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 05:07:50,820 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 05:07:50,824 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 05:07:51,356 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 05:07:51,356 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 05:07:51,357 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [21] imperfect sequences [] total 21 [2018-11-23 05:07:51,357 INFO L459 AbstractCegarLoop]: Interpolant automaton has 21 states [2018-11-23 05:07:51,357 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2018-11-23 05:07:51,358 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=63, Invalid=357, Unknown=0, NotChecked=0, Total=420 [2018-11-23 05:07:51,358 INFO L87 Difference]: Start difference. First operand 29756 states and 124486 transitions. Second operand 21 states. [2018-11-23 05:07:52,658 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 05:07:52,658 INFO L93 Difference]: Finished difference Result 37835 states and 157450 transitions. [2018-11-23 05:07:52,658 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2018-11-23 05:07:52,658 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 51 [2018-11-23 05:07:52,659 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 05:07:52,722 INFO L225 Difference]: With dead ends: 37835 [2018-11-23 05:07:52,722 INFO L226 Difference]: Without dead ends: 36917 [2018-11-23 05:07:52,723 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 45 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 40 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 387 ImplicationChecksByTransitivity, 1.2s TimeCoverageRelationStatistics Valid=374, Invalid=1348, Unknown=0, NotChecked=0, Total=1722 [2018-11-23 05:07:52,817 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 36917 states. [2018-11-23 05:07:53,105 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 36917 to 25502. [2018-11-23 05:07:53,105 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 25502 states. [2018-11-23 05:07:53,156 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25502 states to 25502 states and 105052 transitions. [2018-11-23 05:07:53,156 INFO L78 Accepts]: Start accepts. Automaton has 25502 states and 105052 transitions. Word has length 51 [2018-11-23 05:07:53,156 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 05:07:53,156 INFO L480 AbstractCegarLoop]: Abstraction has 25502 states and 105052 transitions. [2018-11-23 05:07:53,156 INFO L481 AbstractCegarLoop]: Interpolant automaton has 21 states. [2018-11-23 05:07:53,156 INFO L276 IsEmpty]: Start isEmpty. Operand 25502 states and 105052 transitions. [2018-11-23 05:07:53,172 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2018-11-23 05:07:53,172 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 05:07:53,172 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 05:07:53,173 INFO L423 AbstractCegarLoop]: === Iteration 26 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 05:07:53,173 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 05:07:53,173 INFO L82 PathProgramCache]: Analyzing trace with hash -1589892095, now seen corresponding path program 2 times [2018-11-23 05:07:53,173 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 05:07:53,173 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 05:07:53,174 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 05:07:53,174 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 05:07:53,174 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 05:07:53,177 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 05:07:53,926 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 05:07:53,927 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 05:07:53,927 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [21] imperfect sequences [] total 21 [2018-11-23 05:07:53,927 INFO L459 AbstractCegarLoop]: Interpolant automaton has 21 states [2018-11-23 05:07:53,927 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2018-11-23 05:07:53,927 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=55, Invalid=365, Unknown=0, NotChecked=0, Total=420 [2018-11-23 05:07:53,927 INFO L87 Difference]: Start difference. First operand 25502 states and 105052 transitions. Second operand 21 states. [2018-11-23 05:07:55,817 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 05:07:55,817 INFO L93 Difference]: Finished difference Result 38880 states and 159223 transitions. [2018-11-23 05:07:55,817 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2018-11-23 05:07:55,818 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 51 [2018-11-23 05:07:55,818 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 05:07:55,888 INFO L225 Difference]: With dead ends: 38880 [2018-11-23 05:07:55,888 INFO L226 Difference]: Without dead ends: 38574 [2018-11-23 05:07:55,889 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 44 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 39 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 339 ImplicationChecksByTransitivity, 1.7s TimeCoverageRelationStatistics Valid=326, Invalid=1314, Unknown=0, NotChecked=0, Total=1640 [2018-11-23 05:07:55,979 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 38574 states. [2018-11-23 05:07:56,336 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 38574 to 20447. [2018-11-23 05:07:56,336 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20447 states. [2018-11-23 05:07:56,375 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20447 states to 20447 states and 83415 transitions. [2018-11-23 05:07:56,375 INFO L78 Accepts]: Start accepts. Automaton has 20447 states and 83415 transitions. Word has length 51 [2018-11-23 05:07:56,375 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 05:07:56,375 INFO L480 AbstractCegarLoop]: Abstraction has 20447 states and 83415 transitions. [2018-11-23 05:07:56,375 INFO L481 AbstractCegarLoop]: Interpolant automaton has 21 states. [2018-11-23 05:07:56,375 INFO L276 IsEmpty]: Start isEmpty. Operand 20447 states and 83415 transitions. [2018-11-23 05:07:56,388 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2018-11-23 05:07:56,388 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 05:07:56,388 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 05:07:56,388 INFO L423 AbstractCegarLoop]: === Iteration 27 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 05:07:56,388 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 05:07:56,389 INFO L82 PathProgramCache]: Analyzing trace with hash 1569150769, now seen corresponding path program 1 times [2018-11-23 05:07:56,389 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 05:07:56,389 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 05:07:56,390 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 05:07:56,390 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-23 05:07:56,390 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 05:07:56,393 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 05:07:56,842 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 05:07:56,842 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 05:07:56,842 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [19] imperfect sequences [] total 19 [2018-11-23 05:07:56,843 INFO L459 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-11-23 05:07:56,843 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-11-23 05:07:56,843 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=52, Invalid=290, Unknown=0, NotChecked=0, Total=342 [2018-11-23 05:07:56,843 INFO L87 Difference]: Start difference. First operand 20447 states and 83415 transitions. Second operand 19 states. [2018-11-23 05:07:57,739 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 05:07:57,740 INFO L93 Difference]: Finished difference Result 25964 states and 104818 transitions. [2018-11-23 05:07:57,740 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-11-23 05:07:57,740 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 51 [2018-11-23 05:07:57,740 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 05:07:57,784 INFO L225 Difference]: With dead ends: 25964 [2018-11-23 05:07:57,784 INFO L226 Difference]: Without dead ends: 25595 [2018-11-23 05:07:57,784 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 34 GetRequests, 4 SyntacticMatches, 1 SemanticMatches, 29 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 159 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=195, Invalid=735, Unknown=0, NotChecked=0, Total=930 [2018-11-23 05:07:57,855 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25595 states. [2018-11-23 05:07:58,063 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25595 to 20399. [2018-11-23 05:07:58,063 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20399 states. [2018-11-23 05:07:58,101 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20399 states to 20399 states and 83215 transitions. [2018-11-23 05:07:58,101 INFO L78 Accepts]: Start accepts. Automaton has 20399 states and 83215 transitions. Word has length 51 [2018-11-23 05:07:58,101 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 05:07:58,101 INFO L480 AbstractCegarLoop]: Abstraction has 20399 states and 83215 transitions. [2018-11-23 05:07:58,101 INFO L481 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-11-23 05:07:58,101 INFO L276 IsEmpty]: Start isEmpty. Operand 20399 states and 83215 transitions. [2018-11-23 05:07:58,113 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2018-11-23 05:07:58,113 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 05:07:58,114 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 05:07:58,114 INFO L423 AbstractCegarLoop]: === Iteration 28 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 05:07:58,114 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 05:07:58,114 INFO L82 PathProgramCache]: Analyzing trace with hash 514067265, now seen corresponding path program 2 times [2018-11-23 05:07:58,114 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 05:07:58,114 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 05:07:58,115 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 05:07:58,115 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 05:07:58,115 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 05:07:58,117 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 05:07:58,593 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 05:07:58,594 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 05:07:58,594 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [19] imperfect sequences [] total 19 [2018-11-23 05:07:58,594 INFO L459 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-11-23 05:07:58,594 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-11-23 05:07:58,594 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=52, Invalid=290, Unknown=0, NotChecked=0, Total=342 [2018-11-23 05:07:58,594 INFO L87 Difference]: Start difference. First operand 20399 states and 83215 transitions. Second operand 19 states. [2018-11-23 05:07:59,627 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 05:07:59,628 INFO L93 Difference]: Finished difference Result 27038 states and 108725 transitions. [2018-11-23 05:07:59,628 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2018-11-23 05:07:59,628 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 51 [2018-11-23 05:07:59,628 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 05:07:59,673 INFO L225 Difference]: With dead ends: 27038 [2018-11-23 05:07:59,674 INFO L226 Difference]: Without dead ends: 26669 [2018-11-23 05:07:59,674 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 41 GetRequests, 4 SyntacticMatches, 1 SemanticMatches, 36 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 258 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=281, Invalid=1125, Unknown=0, NotChecked=0, Total=1406 [2018-11-23 05:07:59,746 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 26669 states. [2018-11-23 05:07:59,957 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 26669 to 20090. [2018-11-23 05:07:59,957 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20090 states. [2018-11-23 05:07:59,997 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20090 states to 20090 states and 82205 transitions. [2018-11-23 05:07:59,997 INFO L78 Accepts]: Start accepts. Automaton has 20090 states and 82205 transitions. Word has length 51 [2018-11-23 05:07:59,997 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 05:07:59,997 INFO L480 AbstractCegarLoop]: Abstraction has 20090 states and 82205 transitions. [2018-11-23 05:07:59,997 INFO L481 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-11-23 05:07:59,997 INFO L276 IsEmpty]: Start isEmpty. Operand 20090 states and 82205 transitions. [2018-11-23 05:08:00,009 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2018-11-23 05:08:00,009 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 05:08:00,009 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 05:08:00,010 INFO L423 AbstractCegarLoop]: === Iteration 29 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 05:08:00,010 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 05:08:00,010 INFO L82 PathProgramCache]: Analyzing trace with hash -292569965, now seen corresponding path program 1 times [2018-11-23 05:08:00,010 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 05:08:00,010 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 05:08:00,010 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 05:08:00,011 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-23 05:08:00,011 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 05:08:00,013 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 05:08:00,401 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 05:08:00,401 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 05:08:00,402 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [18] imperfect sequences [] total 18 [2018-11-23 05:08:00,402 INFO L459 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-11-23 05:08:00,402 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-11-23 05:08:00,402 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=53, Invalid=253, Unknown=0, NotChecked=0, Total=306 [2018-11-23 05:08:00,402 INFO L87 Difference]: Start difference. First operand 20090 states and 82205 transitions. Second operand 18 states. [2018-11-23 05:08:01,019 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 05:08:01,019 INFO L93 Difference]: Finished difference Result 26099 states and 105749 transitions. [2018-11-23 05:08:01,020 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-11-23 05:08:01,020 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 51 [2018-11-23 05:08:01,020 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 05:08:01,062 INFO L225 Difference]: With dead ends: 26099 [2018-11-23 05:08:01,062 INFO L226 Difference]: Without dead ends: 25550 [2018-11-23 05:08:01,063 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 27 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 91 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=142, Invalid=458, Unknown=0, NotChecked=0, Total=600 [2018-11-23 05:08:01,133 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25550 states. [2018-11-23 05:08:01,326 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25550 to 20034. [2018-11-23 05:08:01,326 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20034 states. [2018-11-23 05:08:01,362 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20034 states to 20034 states and 81977 transitions. [2018-11-23 05:08:01,362 INFO L78 Accepts]: Start accepts. Automaton has 20034 states and 81977 transitions. Word has length 51 [2018-11-23 05:08:01,362 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 05:08:01,362 INFO L480 AbstractCegarLoop]: Abstraction has 20034 states and 81977 transitions. [2018-11-23 05:08:01,362 INFO L481 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-11-23 05:08:01,362 INFO L276 IsEmpty]: Start isEmpty. Operand 20034 states and 81977 transitions. [2018-11-23 05:08:01,374 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2018-11-23 05:08:01,374 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 05:08:01,374 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 05:08:01,374 INFO L423 AbstractCegarLoop]: === Iteration 30 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 05:08:01,374 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 05:08:01,374 INFO L82 PathProgramCache]: Analyzing trace with hash -774880281, now seen corresponding path program 2 times [2018-11-23 05:08:01,374 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 05:08:01,374 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 05:08:01,375 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 05:08:01,375 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 05:08:01,376 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 05:08:01,379 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 05:08:01,904 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 05:08:01,904 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 05:08:01,904 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [21] imperfect sequences [] total 21 [2018-11-23 05:08:01,904 INFO L459 AbstractCegarLoop]: Interpolant automaton has 21 states [2018-11-23 05:08:01,905 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2018-11-23 05:08:01,905 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=65, Invalid=355, Unknown=0, NotChecked=0, Total=420 [2018-11-23 05:08:01,905 INFO L87 Difference]: Start difference. First operand 20034 states and 81977 transitions. Second operand 21 states. [2018-11-23 05:08:03,139 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 05:08:03,139 INFO L93 Difference]: Finished difference Result 24529 states and 99196 transitions. [2018-11-23 05:08:03,139 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2018-11-23 05:08:03,139 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 51 [2018-11-23 05:08:03,140 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 05:08:03,177 INFO L225 Difference]: With dead ends: 24529 [2018-11-23 05:08:03,177 INFO L226 Difference]: Without dead ends: 22702 [2018-11-23 05:08:03,177 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 45 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 40 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 390 ImplicationChecksByTransitivity, 1.2s TimeCoverageRelationStatistics Valid=382, Invalid=1340, Unknown=0, NotChecked=0, Total=1722 [2018-11-23 05:08:03,236 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22702 states. [2018-11-23 05:08:03,419 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22702 to 17110. [2018-11-23 05:08:03,419 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17110 states. [2018-11-23 05:08:03,570 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17110 states to 17110 states and 69704 transitions. [2018-11-23 05:08:03,570 INFO L78 Accepts]: Start accepts. Automaton has 17110 states and 69704 transitions. Word has length 51 [2018-11-23 05:08:03,570 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 05:08:03,570 INFO L480 AbstractCegarLoop]: Abstraction has 17110 states and 69704 transitions. [2018-11-23 05:08:03,570 INFO L481 AbstractCegarLoop]: Interpolant automaton has 21 states. [2018-11-23 05:08:03,570 INFO L276 IsEmpty]: Start isEmpty. Operand 17110 states and 69704 transitions. [2018-11-23 05:08:03,581 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2018-11-23 05:08:03,581 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 05:08:03,582 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 05:08:03,582 INFO L423 AbstractCegarLoop]: === Iteration 31 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 05:08:03,582 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 05:08:03,582 INFO L82 PathProgramCache]: Analyzing trace with hash -210797077, now seen corresponding path program 1 times [2018-11-23 05:08:03,582 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 05:08:03,582 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 05:08:03,583 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 05:08:03,583 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-23 05:08:03,583 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 05:08:03,585 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 05:08:03,633 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 05:08:03,633 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 05:08:03,633 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-11-23 05:08:03,633 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-11-23 05:08:03,633 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-11-23 05:08:03,633 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2018-11-23 05:08:03,634 INFO L87 Difference]: Start difference. First operand 17110 states and 69704 transitions. Second operand 7 states. [2018-11-23 05:08:03,826 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 05:08:03,826 INFO L93 Difference]: Finished difference Result 20102 states and 80003 transitions. [2018-11-23 05:08:03,826 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-11-23 05:08:03,826 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 52 [2018-11-23 05:08:03,827 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 05:08:03,857 INFO L225 Difference]: With dead ends: 20102 [2018-11-23 05:08:03,858 INFO L226 Difference]: Without dead ends: 19382 [2018-11-23 05:08:03,858 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 18 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=47, Invalid=109, Unknown=0, NotChecked=0, Total=156 [2018-11-23 05:08:03,911 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19382 states. [2018-11-23 05:08:04,084 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19382 to 18962. [2018-11-23 05:08:04,085 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18962 states. [2018-11-23 05:08:04,123 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18962 states to 18962 states and 76406 transitions. [2018-11-23 05:08:04,123 INFO L78 Accepts]: Start accepts. Automaton has 18962 states and 76406 transitions. Word has length 52 [2018-11-23 05:08:04,123 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 05:08:04,123 INFO L480 AbstractCegarLoop]: Abstraction has 18962 states and 76406 transitions. [2018-11-23 05:08:04,123 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-11-23 05:08:04,123 INFO L276 IsEmpty]: Start isEmpty. Operand 18962 states and 76406 transitions. [2018-11-23 05:08:04,137 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2018-11-23 05:08:04,137 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 05:08:04,137 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 05:08:04,137 INFO L423 AbstractCegarLoop]: === Iteration 32 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 05:08:04,137 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 05:08:04,137 INFO L82 PathProgramCache]: Analyzing trace with hash 1972668099, now seen corresponding path program 2 times [2018-11-23 05:08:04,137 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 05:08:04,137 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 05:08:04,138 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 05:08:04,138 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 05:08:04,138 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 05:08:04,141 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 05:08:04,675 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 05:08:04,675 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 05:08:04,675 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [21] imperfect sequences [] total 21 [2018-11-23 05:08:04,675 INFO L459 AbstractCegarLoop]: Interpolant automaton has 21 states [2018-11-23 05:08:04,676 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2018-11-23 05:08:04,676 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=69, Invalid=351, Unknown=0, NotChecked=0, Total=420 [2018-11-23 05:08:04,676 INFO L87 Difference]: Start difference. First operand 18962 states and 76406 transitions. Second operand 21 states. [2018-11-23 05:08:05,880 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 05:08:05,880 INFO L93 Difference]: Finished difference Result 24590 states and 97599 transitions. [2018-11-23 05:08:05,881 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2018-11-23 05:08:05,881 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 52 [2018-11-23 05:08:05,881 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 05:08:05,915 INFO L225 Difference]: With dead ends: 24590 [2018-11-23 05:08:05,915 INFO L226 Difference]: Without dead ends: 22430 [2018-11-23 05:08:05,916 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 45 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 40 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 388 ImplicationChecksByTransitivity, 1.2s TimeCoverageRelationStatistics Valid=390, Invalid=1332, Unknown=0, NotChecked=0, Total=1722 [2018-11-23 05:08:05,967 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22430 states. [2018-11-23 05:08:06,142 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22430 to 18290. [2018-11-23 05:08:06,142 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18290 states. [2018-11-23 05:08:06,178 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18290 states to 18290 states and 73678 transitions. [2018-11-23 05:08:06,178 INFO L78 Accepts]: Start accepts. Automaton has 18290 states and 73678 transitions. Word has length 52 [2018-11-23 05:08:06,178 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 05:08:06,178 INFO L480 AbstractCegarLoop]: Abstraction has 18290 states and 73678 transitions. [2018-11-23 05:08:06,178 INFO L481 AbstractCegarLoop]: Interpolant automaton has 21 states. [2018-11-23 05:08:06,178 INFO L276 IsEmpty]: Start isEmpty. Operand 18290 states and 73678 transitions. [2018-11-23 05:08:06,191 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2018-11-23 05:08:06,191 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 05:08:06,192 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 05:08:06,192 INFO L423 AbstractCegarLoop]: === Iteration 33 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 05:08:06,192 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 05:08:06,192 INFO L82 PathProgramCache]: Analyzing trace with hash 1930062503, now seen corresponding path program 3 times [2018-11-23 05:08:06,192 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 05:08:06,192 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 05:08:06,193 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 05:08:06,193 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-23 05:08:06,193 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 05:08:06,196 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 05:08:06,502 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 05:08:06,503 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 05:08:06,503 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [18] imperfect sequences [] total 18 [2018-11-23 05:08:06,503 INFO L459 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-11-23 05:08:06,503 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-11-23 05:08:06,503 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=68, Invalid=238, Unknown=0, NotChecked=0, Total=306 [2018-11-23 05:08:06,503 INFO L87 Difference]: Start difference. First operand 18290 states and 73678 transitions. Second operand 18 states. [2018-11-23 05:08:06,861 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 05:08:06,861 INFO L93 Difference]: Finished difference Result 24227 states and 94267 transitions. [2018-11-23 05:08:06,861 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-11-23 05:08:06,862 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 52 [2018-11-23 05:08:06,862 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 05:08:06,896 INFO L225 Difference]: With dead ends: 24227 [2018-11-23 05:08:06,896 INFO L226 Difference]: Without dead ends: 23507 [2018-11-23 05:08:06,896 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 31 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 27 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 134 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=200, Invalid=612, Unknown=0, NotChecked=0, Total=812 [2018-11-23 05:08:06,948 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23507 states. [2018-11-23 05:08:07,122 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23507 to 17551. [2018-11-23 05:08:07,122 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17551 states. [2018-11-23 05:08:07,157 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17551 states to 17551 states and 70727 transitions. [2018-11-23 05:08:07,157 INFO L78 Accepts]: Start accepts. Automaton has 17551 states and 70727 transitions. Word has length 52 [2018-11-23 05:08:07,157 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 05:08:07,157 INFO L480 AbstractCegarLoop]: Abstraction has 17551 states and 70727 transitions. [2018-11-23 05:08:07,157 INFO L481 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-11-23 05:08:07,157 INFO L276 IsEmpty]: Start isEmpty. Operand 17551 states and 70727 transitions. [2018-11-23 05:08:07,171 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2018-11-23 05:08:07,171 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 05:08:07,171 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 05:08:07,171 INFO L423 AbstractCegarLoop]: === Iteration 34 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 05:08:07,171 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 05:08:07,171 INFO L82 PathProgramCache]: Analyzing trace with hash 430172722, now seen corresponding path program 1 times [2018-11-23 05:08:07,171 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 05:08:07,171 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 05:08:07,172 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 05:08:07,172 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-23 05:08:07,172 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 05:08:07,175 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 05:08:07,941 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 05:08:07,941 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 05:08:07,941 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [21] imperfect sequences [] total 21 [2018-11-23 05:08:07,941 INFO L459 AbstractCegarLoop]: Interpolant automaton has 21 states [2018-11-23 05:08:07,941 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2018-11-23 05:08:07,941 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=56, Invalid=364, Unknown=0, NotChecked=0, Total=420 [2018-11-23 05:08:07,942 INFO L87 Difference]: Start difference. First operand 17551 states and 70727 transitions. Second operand 21 states. [2018-11-23 05:08:08,734 WARN L180 SmtUtils]: Spent 107.00 ms on a formula simplification. DAG size of input: 92 DAG size of output: 73 [2018-11-23 05:08:08,938 WARN L180 SmtUtils]: Spent 111.00 ms on a formula simplification. DAG size of input: 95 DAG size of output: 76 [2018-11-23 05:08:09,801 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 05:08:09,801 INFO L93 Difference]: Finished difference Result 25327 states and 100129 transitions. [2018-11-23 05:08:09,802 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2018-11-23 05:08:09,802 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 53 [2018-11-23 05:08:09,802 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 05:08:09,841 INFO L225 Difference]: With dead ends: 25327 [2018-11-23 05:08:09,841 INFO L226 Difference]: Without dead ends: 25012 [2018-11-23 05:08:09,841 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 44 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 39 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 339 ImplicationChecksByTransitivity, 1.8s TimeCoverageRelationStatistics Valid=325, Invalid=1315, Unknown=0, NotChecked=0, Total=1640 [2018-11-23 05:08:09,889 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25012 states. [2018-11-23 05:08:10,054 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25012 to 13402. [2018-11-23 05:08:10,054 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13402 states. [2018-11-23 05:08:10,080 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13402 states to 13402 states and 53709 transitions. [2018-11-23 05:08:10,081 INFO L78 Accepts]: Start accepts. Automaton has 13402 states and 53709 transitions. Word has length 53 [2018-11-23 05:08:10,081 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 05:08:10,081 INFO L480 AbstractCegarLoop]: Abstraction has 13402 states and 53709 transitions. [2018-11-23 05:08:10,081 INFO L481 AbstractCegarLoop]: Interpolant automaton has 21 states. [2018-11-23 05:08:10,081 INFO L276 IsEmpty]: Start isEmpty. Operand 13402 states and 53709 transitions. [2018-11-23 05:08:10,092 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2018-11-23 05:08:10,092 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 05:08:10,092 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 05:08:10,092 INFO L423 AbstractCegarLoop]: === Iteration 35 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 05:08:10,092 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 05:08:10,092 INFO L82 PathProgramCache]: Analyzing trace with hash -1341438564, now seen corresponding path program 1 times [2018-11-23 05:08:10,092 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 05:08:10,092 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 05:08:10,093 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 05:08:10,093 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 05:08:10,093 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 05:08:10,097 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 05:08:10,728 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 05:08:10,729 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 05:08:10,729 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [21] imperfect sequences [] total 21 [2018-11-23 05:08:10,729 INFO L459 AbstractCegarLoop]: Interpolant automaton has 21 states [2018-11-23 05:08:10,729 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2018-11-23 05:08:10,729 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=71, Invalid=349, Unknown=0, NotChecked=0, Total=420 [2018-11-23 05:08:10,729 INFO L87 Difference]: Start difference. First operand 13402 states and 53709 transitions. Second operand 21 states. [2018-11-23 05:08:11,976 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 05:08:11,976 INFO L93 Difference]: Finished difference Result 22774 states and 89010 transitions. [2018-11-23 05:08:11,976 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-11-23 05:08:11,976 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 54 [2018-11-23 05:08:11,977 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 05:08:12,010 INFO L225 Difference]: With dead ends: 22774 [2018-11-23 05:08:12,010 INFO L226 Difference]: Without dead ends: 22198 [2018-11-23 05:08:12,010 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 40 GetRequests, 4 SyntacticMatches, 1 SemanticMatches, 35 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 276 ImplicationChecksByTransitivity, 1.2s TimeCoverageRelationStatistics Valid=281, Invalid=1051, Unknown=0, NotChecked=0, Total=1332 [2018-11-23 05:08:12,055 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22198 states. [2018-11-23 05:08:12,208 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22198 to 12634. [2018-11-23 05:08:12,208 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12634 states. [2018-11-23 05:08:12,234 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12634 states to 12634 states and 50125 transitions. [2018-11-23 05:08:12,234 INFO L78 Accepts]: Start accepts. Automaton has 12634 states and 50125 transitions. Word has length 54 [2018-11-23 05:08:12,234 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 05:08:12,234 INFO L480 AbstractCegarLoop]: Abstraction has 12634 states and 50125 transitions. [2018-11-23 05:08:12,234 INFO L481 AbstractCegarLoop]: Interpolant automaton has 21 states. [2018-11-23 05:08:12,234 INFO L276 IsEmpty]: Start isEmpty. Operand 12634 states and 50125 transitions. [2018-11-23 05:08:12,245 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2018-11-23 05:08:12,245 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 05:08:12,246 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 05:08:12,246 INFO L423 AbstractCegarLoop]: === Iteration 36 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 05:08:12,246 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 05:08:12,246 INFO L82 PathProgramCache]: Analyzing trace with hash -1434717976, now seen corresponding path program 2 times [2018-11-23 05:08:12,246 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 05:08:12,246 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 05:08:12,247 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 05:08:12,247 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 05:08:12,247 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 05:08:12,251 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 05:08:12,858 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 05:08:12,858 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 05:08:12,858 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [21] imperfect sequences [] total 21 [2018-11-23 05:08:12,859 INFO L459 AbstractCegarLoop]: Interpolant automaton has 21 states [2018-11-23 05:08:12,859 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2018-11-23 05:08:12,859 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=71, Invalid=349, Unknown=0, NotChecked=0, Total=420 [2018-11-23 05:08:12,859 INFO L87 Difference]: Start difference. First operand 12634 states and 50125 transitions. Second operand 21 states. [2018-11-23 05:08:14,283 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 05:08:14,283 INFO L93 Difference]: Finished difference Result 12034 states and 46239 transitions. [2018-11-23 05:08:14,283 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 36 states. [2018-11-23 05:08:14,284 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 54 [2018-11-23 05:08:14,284 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 05:08:14,299 INFO L225 Difference]: With dead ends: 12034 [2018-11-23 05:08:14,299 INFO L226 Difference]: Without dead ends: 11458 [2018-11-23 05:08:14,300 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 51 GetRequests, 4 SyntacticMatches, 1 SemanticMatches, 46 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 514 ImplicationChecksByTransitivity, 1.4s TimeCoverageRelationStatistics Valid=443, Invalid=1813, Unknown=0, NotChecked=0, Total=2256 [2018-11-23 05:08:14,324 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 11458 states. [2018-11-23 05:08:14,397 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 11458 to 6913. [2018-11-23 05:08:14,397 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6913 states. [2018-11-23 05:08:14,409 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6913 states to 6913 states and 28314 transitions. [2018-11-23 05:08:14,409 INFO L78 Accepts]: Start accepts. Automaton has 6913 states and 28314 transitions. Word has length 54 [2018-11-23 05:08:14,410 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 05:08:14,410 INFO L480 AbstractCegarLoop]: Abstraction has 6913 states and 28314 transitions. [2018-11-23 05:08:14,410 INFO L481 AbstractCegarLoop]: Interpolant automaton has 21 states. [2018-11-23 05:08:14,410 INFO L276 IsEmpty]: Start isEmpty. Operand 6913 states and 28314 transitions. [2018-11-23 05:08:14,417 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 88 [2018-11-23 05:08:14,417 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 05:08:14,417 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 05:08:14,417 INFO L423 AbstractCegarLoop]: === Iteration 37 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 05:08:14,417 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 05:08:14,417 INFO L82 PathProgramCache]: Analyzing trace with hash 1240823866, now seen corresponding path program 1 times [2018-11-23 05:08:14,417 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 05:08:14,417 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 05:08:14,418 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 05:08:14,418 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-23 05:08:14,418 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 05:08:14,421 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 05:08:14,486 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 05:08:14,487 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 05:08:14,487 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-11-23 05:08:14,487 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-11-23 05:08:14,487 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-11-23 05:08:14,487 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=54, Unknown=0, NotChecked=0, Total=72 [2018-11-23 05:08:14,487 INFO L87 Difference]: Start difference. First operand 6913 states and 28314 transitions. Second operand 9 states. [2018-11-23 05:08:14,596 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 05:08:14,596 INFO L93 Difference]: Finished difference Result 6913 states and 28308 transitions. [2018-11-23 05:08:14,596 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-11-23 05:08:14,597 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 87 [2018-11-23 05:08:14,597 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 05:08:14,607 INFO L225 Difference]: With dead ends: 6913 [2018-11-23 05:08:14,607 INFO L226 Difference]: Without dead ends: 6868 [2018-11-23 05:08:14,607 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 9 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 13 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=69, Invalid=141, Unknown=0, NotChecked=0, Total=210 [2018-11-23 05:08:14,626 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6868 states. [2018-11-23 05:08:14,676 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6868 to 6868. [2018-11-23 05:08:14,676 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6868 states. [2018-11-23 05:08:14,688 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6868 states to 6868 states and 28122 transitions. [2018-11-23 05:08:14,688 INFO L78 Accepts]: Start accepts. Automaton has 6868 states and 28122 transitions. Word has length 87 [2018-11-23 05:08:14,689 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 05:08:14,689 INFO L480 AbstractCegarLoop]: Abstraction has 6868 states and 28122 transitions. [2018-11-23 05:08:14,689 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-11-23 05:08:14,689 INFO L276 IsEmpty]: Start isEmpty. Operand 6868 states and 28122 transitions. [2018-11-23 05:08:14,696 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 88 [2018-11-23 05:08:14,696 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 05:08:14,696 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 05:08:14,697 INFO L423 AbstractCegarLoop]: === Iteration 38 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 05:08:14,697 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 05:08:14,697 INFO L82 PathProgramCache]: Analyzing trace with hash 941155209, now seen corresponding path program 1 times [2018-11-23 05:08:14,697 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 05:08:14,697 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 05:08:14,698 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 05:08:14,698 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 05:08:14,698 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 05:08:14,701 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 05:08:14,771 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 05:08:14,771 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 05:08:14,771 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-11-23 05:08:14,771 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-11-23 05:08:14,771 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-11-23 05:08:14,771 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=54, Unknown=0, NotChecked=0, Total=72 [2018-11-23 05:08:14,772 INFO L87 Difference]: Start difference. First operand 6868 states and 28122 transitions. Second operand 9 states. [2018-11-23 05:08:14,901 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 05:08:14,901 INFO L93 Difference]: Finished difference Result 6868 states and 28116 transitions. [2018-11-23 05:08:14,901 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-11-23 05:08:14,901 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 87 [2018-11-23 05:08:14,902 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 05:08:14,911 INFO L225 Difference]: With dead ends: 6868 [2018-11-23 05:08:14,911 INFO L226 Difference]: Without dead ends: 6670 [2018-11-23 05:08:14,912 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 23 GetRequests, 9 SyntacticMatches, 1 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 13 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=69, Invalid=141, Unknown=0, NotChecked=0, Total=210 [2018-11-23 05:08:14,929 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6670 states. [2018-11-23 05:08:14,980 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6670 to 6670. [2018-11-23 05:08:14,980 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6670 states. [2018-11-23 05:08:14,991 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6670 states to 6670 states and 27300 transitions. [2018-11-23 05:08:14,992 INFO L78 Accepts]: Start accepts. Automaton has 6670 states and 27300 transitions. Word has length 87 [2018-11-23 05:08:14,992 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 05:08:14,992 INFO L480 AbstractCegarLoop]: Abstraction has 6670 states and 27300 transitions. [2018-11-23 05:08:14,992 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-11-23 05:08:14,992 INFO L276 IsEmpty]: Start isEmpty. Operand 6670 states and 27300 transitions. [2018-11-23 05:08:14,999 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 88 [2018-11-23 05:08:14,999 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 05:08:14,999 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 05:08:14,999 INFO L423 AbstractCegarLoop]: === Iteration 39 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 05:08:14,999 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 05:08:14,999 INFO L82 PathProgramCache]: Analyzing trace with hash 116030204, now seen corresponding path program 1 times [2018-11-23 05:08:14,999 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 05:08:14,999 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 05:08:15,000 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 05:08:15,000 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 05:08:15,001 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 05:08:15,005 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 05:08:15,174 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 05:08:15,174 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 05:08:15,174 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-11-23 05:08:15,175 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-11-23 05:08:15,175 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-11-23 05:08:15,175 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=71, Unknown=0, NotChecked=0, Total=90 [2018-11-23 05:08:15,175 INFO L87 Difference]: Start difference. First operand 6670 states and 27300 transitions. Second operand 10 states. [2018-11-23 05:08:15,471 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 05:08:15,471 INFO L93 Difference]: Finished difference Result 6670 states and 27264 transitions. [2018-11-23 05:08:15,472 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-11-23 05:08:15,473 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 87 [2018-11-23 05:08:15,473 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 05:08:15,487 INFO L225 Difference]: With dead ends: 6670 [2018-11-23 05:08:15,487 INFO L226 Difference]: Without dead ends: 6328 [2018-11-23 05:08:15,487 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 27 GetRequests, 9 SyntacticMatches, 3 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=85, Invalid=187, Unknown=0, NotChecked=0, Total=272 [2018-11-23 05:08:15,515 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6328 states. [2018-11-23 05:08:15,586 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6328 to 6328. [2018-11-23 05:08:15,587 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6328 states. [2018-11-23 05:08:15,603 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6328 states to 6328 states and 25848 transitions. [2018-11-23 05:08:15,603 INFO L78 Accepts]: Start accepts. Automaton has 6328 states and 25848 transitions. Word has length 87 [2018-11-23 05:08:15,603 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 05:08:15,603 INFO L480 AbstractCegarLoop]: Abstraction has 6328 states and 25848 transitions. [2018-11-23 05:08:15,603 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-11-23 05:08:15,603 INFO L276 IsEmpty]: Start isEmpty. Operand 6328 states and 25848 transitions. [2018-11-23 05:08:15,613 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 88 [2018-11-23 05:08:15,613 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 05:08:15,613 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 05:08:15,614 INFO L423 AbstractCegarLoop]: === Iteration 40 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 05:08:15,614 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 05:08:15,614 INFO L82 PathProgramCache]: Analyzing trace with hash 1769800394, now seen corresponding path program 1 times [2018-11-23 05:08:15,614 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 05:08:15,614 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 05:08:15,615 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 05:08:15,615 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 05:08:15,615 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 05:08:15,621 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-23 05:08:15,628 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-23 05:08:15,664 INFO L469 BasicCegarLoop]: Counterexample might be feasible ----- class de.uni_freiburg.informatik.ultimate.modelcheckerutils.cfg.transformations.BlockEncodingBacktranslator [?] -1 [121] ULTIMATE.startENTRY-->L-1: Formula: (and (= |v_#NULL.offset_1| 0) (= |v_#NULL.base_1| 0)) InVars {} OutVars{#NULL.offset=|v_#NULL.offset_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] VAL [|#NULL.base|=0, |#NULL.offset|=0] [?] -1 [101] L-1-->L1213: Formula: (= |v_#valid_27| (store |v_#valid_28| 0 0)) InVars {#valid=|v_#valid_28|} OutVars{#valid=|v_#valid_27|} AuxVars[] AssignedVars[#valid] VAL [|#NULL.base|=0, |#NULL.offset|=0] [?] -1 [172] L1213-->L-1-1: Formula: (and (= v_~v~0.offset_5 0) (= v_~v~0.base_5 0)) InVars {} OutVars{~v~0.offset=v_~v~0.offset_5, ~v~0.base=v_~v~0.base_5} AuxVars[] AssignedVars[~v~0.offset, ~v~0.base] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~v~0.base=0, ~v~0.offset=0] [?] -1 [165] L-1-1-->L-1-2: Formula: true InVars {} OutVars{ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_#res] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~v~0.base=0, ~v~0.offset=0] [?] -1 [162] L-1-2-->L1246: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~mem12=|v_ULTIMATE.start_main_#t~mem12_1|, ULTIMATE.start_main_#t~mem13=|v_ULTIMATE.start_main_#t~mem13_1|, ULTIMATE.start_main_~#t~0.base=|v_ULTIMATE.start_main_~#t~0.base_1|, ULTIMATE.start_main_#t~nondet11=|v_ULTIMATE.start_main_#t~nondet11_1|, ULTIMATE.start_main_~#t~0.offset=|v_ULTIMATE.start_main_~#t~0.offset_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem12, ULTIMATE.start_main_#t~mem13, ULTIMATE.start_main_#t~nondet11, ULTIMATE.start_main_~#t~0.base, ULTIMATE.start_main_~#t~0.offset] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~v~0.base=0, ~v~0.offset=0] [?] -1 [171] L1246-->L1246-1: Formula: (and (= 0 (select |v_#valid_24| |v_ULTIMATE.start_main_~#t~0.base_2|)) (not (= |v_ULTIMATE.start_main_~#t~0.base_2| 0)) (= 0 |v_ULTIMATE.start_main_~#t~0.offset_2|) (= (store |v_#length_14| |v_ULTIMATE.start_main_~#t~0.base_2| 4) |v_#length_13|) (= (store |v_#valid_24| |v_ULTIMATE.start_main_~#t~0.base_2| 1) |v_#valid_23|)) InVars {#length=|v_#length_14|, #valid=|v_#valid_24|} OutVars{ULTIMATE.start_main_~#t~0.base=|v_ULTIMATE.start_main_~#t~0.base_2|, #length=|v_#length_13|, ULTIMATE.start_main_~#t~0.offset=|v_ULTIMATE.start_main_~#t~0.offset_2|, #valid=|v_#valid_23|} AuxVars[] AssignedVars[#valid, ULTIMATE.start_main_~#t~0.base, #length, ULTIMATE.start_main_~#t~0.offset] VAL [|#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=0, ~v~0.offset=0] [?] -1 [173] L1246-1-->L1247: Formula: (= |v_#memory_int_20| (store |v_#memory_int_21| |v_ULTIMATE.start_main_~#t~0.base_3| (store (select |v_#memory_int_21| |v_ULTIMATE.start_main_~#t~0.base_3|) |v_ULTIMATE.start_main_~#t~0.offset_3| 5))) InVars {#memory_int=|v_#memory_int_21|, ULTIMATE.start_main_~#t~0.base=|v_ULTIMATE.start_main_~#t~0.base_3|, ULTIMATE.start_main_~#t~0.offset=|v_ULTIMATE.start_main_~#t~0.offset_3|} OutVars{#memory_int=|v_#memory_int_20|, ULTIMATE.start_main_~#t~0.base=|v_ULTIMATE.start_main_~#t~0.base_3|, ULTIMATE.start_main_~#t~0.offset=|v_ULTIMATE.start_main_~#t~0.offset_3|} AuxVars[] AssignedVars[#memory_int] VAL [|#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=0, ~v~0.offset=0] [?] FORK -1 [253] L1247-->thread0ENTRY: Formula: (and (= v_Thread2_thread0_thidvar0_2 5) (= |v_Thread2_thread0_#in~arg.offset_3| 0) (= 0 |v_Thread2_thread0_#in~arg.base_3|)) InVars {} OutVars{Thread2_thread0_#in~arg.offset=|v_Thread2_thread0_#in~arg.offset_3|, Thread2_thread0_#in~arg.base=|v_Thread2_thread0_#in~arg.base_3|, Thread2_thread0_thidvar0=v_Thread2_thread0_thidvar0_2} AuxVars[] AssignedVars[Thread2_thread0_#in~arg.offset, Thread2_thread0_#in~arg.base, Thread2_thread0_thidvar0] VAL [Thread2_thread0_thidvar0=5, |#NULL.base|=0, |#NULL.offset|=0, |Thread2_thread0_#in~arg.base|=0, |Thread2_thread0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=0, ~v~0.offset=0] [?] 0 [182] thread0ENTRY-->L1231: Formula: (and (= v_Thread2_thread0_~arg.offset_1 |v_Thread2_thread0_#in~arg.offset_1|) (= v_Thread2_thread0_~arg.base_1 |v_Thread2_thread0_#in~arg.base_1|)) InVars {Thread2_thread0_#in~arg.base=|v_Thread2_thread0_#in~arg.base_1|, Thread2_thread0_#in~arg.offset=|v_Thread2_thread0_#in~arg.offset_1|} OutVars{Thread2_thread0_#in~arg.base=|v_Thread2_thread0_#in~arg.base_1|, Thread2_thread0_#in~arg.offset=|v_Thread2_thread0_#in~arg.offset_1|, Thread2_thread0_~arg.base=v_Thread2_thread0_~arg.base_1, Thread2_thread0_~arg.offset=v_Thread2_thread0_~arg.offset_1} AuxVars[] AssignedVars[Thread2_thread0_~arg.base, Thread2_thread0_~arg.offset] VAL [Thread2_thread0_thidvar0=5, Thread2_thread0_~arg.base=0, Thread2_thread0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread2_thread0_#in~arg.base|=0, |Thread2_thread0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=0, ~v~0.offset=0] [?] -1 [103] L1247-1-->L1248: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~nondet11=|v_ULTIMATE.start_main_#t~nondet11_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet11] VAL [Thread2_thread0_thidvar0=5, Thread2_thread0_~arg.base=0, Thread2_thread0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread2_thread0_#in~arg.base|=0, |Thread2_thread0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=0, ~v~0.offset=0] [?] 0 [183] L1231-->L1231-1: Formula: (and (= (store |v_#valid_2| |v_Thread2_thread0_~#t1~0.base_1| 1) |v_#valid_1|) (= (select |v_#valid_2| |v_Thread2_thread0_~#t1~0.base_1|) 0) (= |v_#length_1| (store |v_#length_2| |v_Thread2_thread0_~#t1~0.base_1| 4)) (= 0 |v_Thread2_thread0_~#t1~0.offset_1|) (not (= |v_Thread2_thread0_~#t1~0.base_1| 0))) InVars {#length=|v_#length_2|, #valid=|v_#valid_2|} OutVars{#length=|v_#length_1|, Thread2_thread0_~#t1~0.base=|v_Thread2_thread0_~#t1~0.base_1|, Thread2_thread0_~#t1~0.offset=|v_Thread2_thread0_~#t1~0.offset_1|, #valid=|v_#valid_1|} AuxVars[] AssignedVars[Thread2_thread0_~#t1~0.base, Thread2_thread0_~#t1~0.offset, #valid, #length] VAL [Thread2_thread0_thidvar0=5, Thread2_thread0_~arg.base=0, Thread2_thread0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread2_thread0_#in~arg.base|=0, |Thread2_thread0_#in~arg.offset|=0, |Thread2_thread0_~#t1~0.base|=96, |Thread2_thread0_~#t1~0.offset|=0, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=0, ~v~0.offset=0] [?] 0 [184] L1231-1-->L1231-2: Formula: (and (= |v_#length_3| (store |v_#length_4| |v_Thread2_thread0_~#t2~0.base_1| 4)) (= 0 |v_Thread2_thread0_~#t2~0.offset_1|) (= (store |v_#valid_4| |v_Thread2_thread0_~#t2~0.base_1| 1) |v_#valid_3|) (= 0 (select |v_#valid_4| |v_Thread2_thread0_~#t2~0.base_1|)) (not (= |v_Thread2_thread0_~#t2~0.base_1| 0))) InVars {#length=|v_#length_4|, #valid=|v_#valid_4|} OutVars{#length=|v_#length_3|, Thread2_thread0_~#t2~0.offset=|v_Thread2_thread0_~#t2~0.offset_1|, #valid=|v_#valid_3|, Thread2_thread0_~#t2~0.base=|v_Thread2_thread0_~#t2~0.base_1|} AuxVars[] AssignedVars[Thread2_thread0_~#t2~0.offset, #valid, #length, Thread2_thread0_~#t2~0.base] VAL [Thread2_thread0_thidvar0=5, Thread2_thread0_~arg.base=0, Thread2_thread0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread2_thread0_#in~arg.base|=0, |Thread2_thread0_#in~arg.offset|=0, |Thread2_thread0_~#t1~0.base|=96, |Thread2_thread0_~#t1~0.offset|=0, |Thread2_thread0_~#t2~0.base|=93, |Thread2_thread0_~#t2~0.offset|=0, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=0, ~v~0.offset=0] [?] 0 [185] L1231-2-->L1231-3: Formula: (and (= (select |v_#valid_6| |v_Thread2_thread0_~#t3~0.base_1|) 0) (= |v_#length_5| (store |v_#length_6| |v_Thread2_thread0_~#t3~0.base_1| 4)) (= |v_#valid_5| (store |v_#valid_6| |v_Thread2_thread0_~#t3~0.base_1| 1)) (not (= |v_Thread2_thread0_~#t3~0.base_1| 0)) (= |v_Thread2_thread0_~#t3~0.offset_1| 0)) InVars {#length=|v_#length_6|, #valid=|v_#valid_6|} OutVars{Thread2_thread0_~#t3~0.offset=|v_Thread2_thread0_~#t3~0.offset_1|, #length=|v_#length_5|, Thread2_thread0_~#t3~0.base=|v_Thread2_thread0_~#t3~0.base_1|, #valid=|v_#valid_5|} AuxVars[] AssignedVars[Thread2_thread0_~#t3~0.offset, Thread2_thread0_~#t3~0.base, #valid, #length] VAL [Thread2_thread0_thidvar0=5, Thread2_thread0_~arg.base=0, Thread2_thread0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread2_thread0_#in~arg.base|=0, |Thread2_thread0_#in~arg.offset|=0, |Thread2_thread0_~#t1~0.base|=96, |Thread2_thread0_~#t1~0.offset|=0, |Thread2_thread0_~#t2~0.base|=93, |Thread2_thread0_~#t2~0.offset|=0, |Thread2_thread0_~#t3~0.base|=90, |Thread2_thread0_~#t3~0.offset|=0, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=0, ~v~0.offset=0] [?] 0 [186] L1231-3-->L1231-4: Formula: (and (= |v_Thread2_thread0_~#t4~0.offset_1| 0) (= |v_#length_7| (store |v_#length_8| |v_Thread2_thread0_~#t4~0.base_1| 4)) (= |v_#valid_7| (store |v_#valid_8| |v_Thread2_thread0_~#t4~0.base_1| 1)) (not (= |v_Thread2_thread0_~#t4~0.base_1| 0)) (= 0 (select |v_#valid_8| |v_Thread2_thread0_~#t4~0.base_1|))) InVars {#length=|v_#length_8|, #valid=|v_#valid_8|} OutVars{#length=|v_#length_7|, Thread2_thread0_~#t4~0.offset=|v_Thread2_thread0_~#t4~0.offset_1|, #valid=|v_#valid_7|, Thread2_thread0_~#t4~0.base=|v_Thread2_thread0_~#t4~0.base_1|} AuxVars[] AssignedVars[Thread2_thread0_~#t4~0.offset, #valid, #length, Thread2_thread0_~#t4~0.base] VAL [Thread2_thread0_thidvar0=5, Thread2_thread0_~arg.base=0, Thread2_thread0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread2_thread0_#in~arg.base|=0, |Thread2_thread0_#in~arg.offset|=0, |Thread2_thread0_~#t1~0.base|=96, |Thread2_thread0_~#t1~0.offset|=0, |Thread2_thread0_~#t2~0.base|=93, |Thread2_thread0_~#t2~0.offset|=0, |Thread2_thread0_~#t3~0.base|=90, |Thread2_thread0_~#t3~0.offset|=0, |Thread2_thread0_~#t4~0.base|=91, |Thread2_thread0_~#t4~0.offset|=0, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=0, ~v~0.offset=0] [?] 0 [187] L1231-4-->L1231-5: Formula: (and (= |v_Thread2_thread0_~#t5~0.offset_1| 0) (not (= |v_Thread2_thread0_~#t5~0.base_1| 0)) (= |v_#valid_9| (store |v_#valid_10| |v_Thread2_thread0_~#t5~0.base_1| 1)) (= 0 (select |v_#valid_10| |v_Thread2_thread0_~#t5~0.base_1|)) (= |v_#length_9| (store |v_#length_10| |v_Thread2_thread0_~#t5~0.base_1| 4))) InVars {#length=|v_#length_10|, #valid=|v_#valid_10|} OutVars{Thread2_thread0_~#t5~0.base=|v_Thread2_thread0_~#t5~0.base_1|, #length=|v_#length_9|, Thread2_thread0_~#t5~0.offset=|v_Thread2_thread0_~#t5~0.offset_1|, #valid=|v_#valid_9|} AuxVars[] AssignedVars[Thread2_thread0_~#t5~0.offset, #valid, Thread2_thread0_~#t5~0.base, #length] VAL [Thread2_thread0_thidvar0=5, Thread2_thread0_~arg.base=0, Thread2_thread0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread2_thread0_#in~arg.base|=0, |Thread2_thread0_#in~arg.offset|=0, |Thread2_thread0_~#t1~0.base|=96, |Thread2_thread0_~#t1~0.offset|=0, |Thread2_thread0_~#t2~0.base|=93, |Thread2_thread0_~#t2~0.offset|=0, |Thread2_thread0_~#t3~0.base|=90, |Thread2_thread0_~#t3~0.offset|=0, |Thread2_thread0_~#t4~0.base|=91, |Thread2_thread0_~#t4~0.offset|=0, |Thread2_thread0_~#t5~0.base|=95, |Thread2_thread0_~#t5~0.offset|=0, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=0, ~v~0.offset=0] [?] 0 [188] L1231-5-->L1232: Formula: (= (store |v_#memory_int_2| |v_Thread2_thread0_~#t1~0.base_2| (store (select |v_#memory_int_2| |v_Thread2_thread0_~#t1~0.base_2|) |v_Thread2_thread0_~#t1~0.offset_2| 0)) |v_#memory_int_1|) InVars {#memory_int=|v_#memory_int_2|, Thread2_thread0_~#t1~0.base=|v_Thread2_thread0_~#t1~0.base_2|, Thread2_thread0_~#t1~0.offset=|v_Thread2_thread0_~#t1~0.offset_2|} OutVars{#memory_int=|v_#memory_int_1|, Thread2_thread0_~#t1~0.base=|v_Thread2_thread0_~#t1~0.base_2|, Thread2_thread0_~#t1~0.offset=|v_Thread2_thread0_~#t1~0.offset_2|} AuxVars[] AssignedVars[#memory_int] VAL [Thread2_thread0_thidvar0=5, Thread2_thread0_~arg.base=0, Thread2_thread0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread2_thread0_#in~arg.base|=0, |Thread2_thread0_#in~arg.offset|=0, |Thread2_thread0_~#t1~0.base|=96, |Thread2_thread0_~#t1~0.offset|=0, |Thread2_thread0_~#t2~0.base|=93, |Thread2_thread0_~#t2~0.offset|=0, |Thread2_thread0_~#t3~0.base|=90, |Thread2_thread0_~#t3~0.offset|=0, |Thread2_thread0_~#t4~0.base|=91, |Thread2_thread0_~#t4~0.offset|=0, |Thread2_thread0_~#t5~0.base|=95, |Thread2_thread0_~#t5~0.offset|=0, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=0, ~v~0.offset=0] [?] FORK 0 [257] L1232-->thread1ENTRY: Formula: (and (= v_Thread4_thread1_thidvar0_4 0) (= 0 |v_Thread4_thread1_#in~arg.base_5|) (= |v_Thread4_thread1_#in~arg.offset_5| 0)) InVars {} OutVars{Thread4_thread1_thidvar0=v_Thread4_thread1_thidvar0_4, Thread4_thread1_#in~arg.base=|v_Thread4_thread1_#in~arg.base_5|, Thread4_thread1_#in~arg.offset=|v_Thread4_thread1_#in~arg.offset_5|} AuxVars[] AssignedVars[Thread4_thread1_thidvar0, Thread4_thread1_#in~arg.base, Thread4_thread1_#in~arg.offset] VAL [Thread2_thread0_thidvar0=5, Thread2_thread0_~arg.base=0, Thread2_thread0_~arg.offset=0, Thread4_thread1_thidvar0=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread2_thread0_#in~arg.base|=0, |Thread2_thread0_#in~arg.offset|=0, |Thread2_thread0_~#t1~0.base|=96, |Thread2_thread0_~#t1~0.offset|=0, |Thread2_thread0_~#t2~0.base|=93, |Thread2_thread0_~#t2~0.offset|=0, |Thread2_thread0_~#t3~0.base|=90, |Thread2_thread0_~#t3~0.offset|=0, |Thread2_thread0_~#t4~0.base|=91, |Thread2_thread0_~#t4~0.offset|=0, |Thread2_thread0_~#t5~0.base|=95, |Thread2_thread0_~#t5~0.offset|=0, |Thread4_thread1_#in~arg.base|=0, |Thread4_thread1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=0, ~v~0.offset=0] [?] 1 [230] thread1ENTRY-->L1216: Formula: (and (= v_Thread4_thread1_~arg.offset_1 |v_Thread4_thread1_#in~arg.offset_1|) (= v_Thread4_thread1_~arg.base_1 |v_Thread4_thread1_#in~arg.base_1|)) InVars {Thread4_thread1_#in~arg.offset=|v_Thread4_thread1_#in~arg.offset_1|, Thread4_thread1_#in~arg.base=|v_Thread4_thread1_#in~arg.base_1|} OutVars{Thread4_thread1_~arg.offset=v_Thread4_thread1_~arg.offset_1, Thread4_thread1_#in~arg.base=|v_Thread4_thread1_#in~arg.base_1|, Thread4_thread1_#in~arg.offset=|v_Thread4_thread1_#in~arg.offset_1|, Thread4_thread1_~arg.base=v_Thread4_thread1_~arg.base_1} AuxVars[] AssignedVars[Thread4_thread1_~arg.offset, Thread4_thread1_~arg.base] VAL [Thread2_thread0_thidvar0=5, Thread2_thread0_~arg.base=0, Thread2_thread0_~arg.offset=0, Thread4_thread1_thidvar0=0, Thread4_thread1_~arg.base=0, Thread4_thread1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread2_thread0_#in~arg.base|=0, |Thread2_thread0_#in~arg.offset|=0, |Thread2_thread0_~#t1~0.base|=96, |Thread2_thread0_~#t1~0.offset|=0, |Thread2_thread0_~#t2~0.base|=93, |Thread2_thread0_~#t2~0.offset|=0, |Thread2_thread0_~#t3~0.base|=90, |Thread2_thread0_~#t3~0.offset|=0, |Thread2_thread0_~#t4~0.base|=91, |Thread2_thread0_~#t4~0.offset|=0, |Thread2_thread0_~#t5~0.base|=95, |Thread2_thread0_~#t5~0.offset|=0, |Thread4_thread1_#in~arg.base|=0, |Thread4_thread1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=0, ~v~0.offset=0] [?] 1 [231] L1216-->L1216-1: Formula: (and (= |v_#valid_21| (store |v_#valid_22| |v_Thread4_thread1_#t~malloc0.base_1| 1)) (= |v_Thread4_thread1_#t~malloc0.offset_1| 0) (not (= 0 |v_Thread4_thread1_#t~malloc0.base_1|)) (= (store |v_#length_12| |v_Thread4_thread1_#t~malloc0.base_1| 1) |v_#length_11|) (= (select |v_#valid_22| |v_Thread4_thread1_#t~malloc0.base_1|) 0)) InVars {#length=|v_#length_12|, #valid=|v_#valid_22|} OutVars{#length=|v_#length_11|, Thread4_thread1_#t~malloc0.offset=|v_Thread4_thread1_#t~malloc0.offset_1|, Thread4_thread1_#t~malloc0.base=|v_Thread4_thread1_#t~malloc0.base_1|, #valid=|v_#valid_21|} AuxVars[] AssignedVars[Thread4_thread1_#t~malloc0.base, #valid, #length, Thread4_thread1_#t~malloc0.offset] VAL [Thread2_thread0_thidvar0=5, Thread2_thread0_~arg.base=0, Thread2_thread0_~arg.offset=0, Thread4_thread1_thidvar0=0, Thread4_thread1_~arg.base=0, Thread4_thread1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread2_thread0_#in~arg.base|=0, |Thread2_thread0_#in~arg.offset|=0, |Thread2_thread0_~#t1~0.base|=96, |Thread2_thread0_~#t1~0.offset|=0, |Thread2_thread0_~#t2~0.base|=93, |Thread2_thread0_~#t2~0.offset|=0, |Thread2_thread0_~#t3~0.base|=90, |Thread2_thread0_~#t3~0.offset|=0, |Thread2_thread0_~#t4~0.base|=91, |Thread2_thread0_~#t4~0.offset|=0, |Thread2_thread0_~#t5~0.base|=95, |Thread2_thread0_~#t5~0.offset|=0, |Thread4_thread1_#in~arg.base|=0, |Thread4_thread1_#in~arg.offset|=0, |Thread4_thread1_#t~malloc0.base|=92, |Thread4_thread1_#t~malloc0.offset|=0, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=0, ~v~0.offset=0] [?] 1 [232] L1216-1-->L1217: Formula: (and (= v_~v~0.base_1 |v_Thread4_thread1_#t~malloc0.base_2|) (= v_~v~0.offset_1 |v_Thread4_thread1_#t~malloc0.offset_2|)) InVars {Thread4_thread1_#t~malloc0.offset=|v_Thread4_thread1_#t~malloc0.offset_2|, Thread4_thread1_#t~malloc0.base=|v_Thread4_thread1_#t~malloc0.base_2|} OutVars{Thread4_thread1_#t~malloc0.offset=|v_Thread4_thread1_#t~malloc0.offset_2|, ~v~0.offset=v_~v~0.offset_1, ~v~0.base=v_~v~0.base_1, Thread4_thread1_#t~malloc0.base=|v_Thread4_thread1_#t~malloc0.base_2|} AuxVars[] AssignedVars[~v~0.offset, ~v~0.base] VAL [Thread2_thread0_thidvar0=5, Thread2_thread0_~arg.base=0, Thread2_thread0_~arg.offset=0, Thread4_thread1_thidvar0=0, Thread4_thread1_~arg.base=0, Thread4_thread1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread2_thread0_#in~arg.base|=0, |Thread2_thread0_#in~arg.offset|=0, |Thread2_thread0_~#t1~0.base|=96, |Thread2_thread0_~#t1~0.offset|=0, |Thread2_thread0_~#t2~0.base|=93, |Thread2_thread0_~#t2~0.offset|=0, |Thread2_thread0_~#t3~0.base|=90, |Thread2_thread0_~#t3~0.offset|=0, |Thread2_thread0_~#t4~0.base|=91, |Thread2_thread0_~#t4~0.offset|=0, |Thread2_thread0_~#t5~0.base|=95, |Thread2_thread0_~#t5~0.offset|=0, |Thread4_thread1_#in~arg.base|=0, |Thread4_thread1_#in~arg.offset|=0, |Thread4_thread1_#t~malloc0.base|=92, |Thread4_thread1_#t~malloc0.offset|=0, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 1 [233] L1217-->thread1FINAL: Formula: (and (= |v_Thread4_thread1_#res.offset_1| 0) (= |v_Thread4_thread1_#res.base_1| 0)) InVars {} OutVars{Thread4_thread1_#res.offset=|v_Thread4_thread1_#res.offset_1|, Thread4_thread1_#res.base=|v_Thread4_thread1_#res.base_1|} AuxVars[] AssignedVars[Thread4_thread1_#res.offset, Thread4_thread1_#res.base] VAL [Thread2_thread0_thidvar0=5, Thread2_thread0_~arg.base=0, Thread2_thread0_~arg.offset=0, Thread4_thread1_thidvar0=0, Thread4_thread1_~arg.base=0, Thread4_thread1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread2_thread0_#in~arg.base|=0, |Thread2_thread0_#in~arg.offset|=0, |Thread2_thread0_~#t1~0.base|=96, |Thread2_thread0_~#t1~0.offset|=0, |Thread2_thread0_~#t2~0.base|=93, |Thread2_thread0_~#t2~0.offset|=0, |Thread2_thread0_~#t3~0.base|=90, |Thread2_thread0_~#t3~0.offset|=0, |Thread2_thread0_~#t4~0.base|=91, |Thread2_thread0_~#t4~0.offset|=0, |Thread2_thread0_~#t5~0.base|=95, |Thread2_thread0_~#t5~0.offset|=0, |Thread4_thread1_#in~arg.base|=0, |Thread4_thread1_#in~arg.offset|=0, |Thread4_thread1_#res.base|=0, |Thread4_thread1_#res.offset|=0, |Thread4_thread1_#t~malloc0.base|=92, |Thread4_thread1_#t~malloc0.offset|=0, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 1 [234] thread1FINAL-->thread1EXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] VAL [Thread2_thread0_thidvar0=5, Thread2_thread0_~arg.base=0, Thread2_thread0_~arg.offset=0, Thread4_thread1_thidvar0=0, Thread4_thread1_~arg.base=0, Thread4_thread1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread2_thread0_#in~arg.base|=0, |Thread2_thread0_#in~arg.offset|=0, |Thread2_thread0_~#t1~0.base|=96, |Thread2_thread0_~#t1~0.offset|=0, |Thread2_thread0_~#t2~0.base|=93, |Thread2_thread0_~#t2~0.offset|=0, |Thread2_thread0_~#t3~0.base|=90, |Thread2_thread0_~#t3~0.offset|=0, |Thread2_thread0_~#t4~0.base|=91, |Thread2_thread0_~#t4~0.offset|=0, |Thread2_thread0_~#t5~0.base|=95, |Thread2_thread0_~#t5~0.offset|=0, |Thread4_thread1_#in~arg.base|=0, |Thread4_thread1_#in~arg.offset|=0, |Thread4_thread1_#res.base|=0, |Thread4_thread1_#res.offset|=0, |Thread4_thread1_#t~malloc0.base|=92, |Thread4_thread1_#t~malloc0.offset|=0, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] -1 [140] L1248-->L1248-1: Formula: (= (select (select |v_#memory_int_22| |v_ULTIMATE.start_main_~#t~0.base_4|) |v_ULTIMATE.start_main_~#t~0.offset_4|) |v_ULTIMATE.start_main_#t~mem12_2|) InVars {#memory_int=|v_#memory_int_22|, ULTIMATE.start_main_~#t~0.base=|v_ULTIMATE.start_main_~#t~0.base_4|, ULTIMATE.start_main_~#t~0.offset=|v_ULTIMATE.start_main_~#t~0.offset_4|} OutVars{#memory_int=|v_#memory_int_22|, ULTIMATE.start_main_#t~mem12=|v_ULTIMATE.start_main_#t~mem12_2|, ULTIMATE.start_main_~#t~0.base=|v_ULTIMATE.start_main_~#t~0.base_4|, ULTIMATE.start_main_~#t~0.offset=|v_ULTIMATE.start_main_~#t~0.offset_4|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem12] VAL [Thread2_thread0_thidvar0=5, Thread2_thread0_~arg.base=0, Thread2_thread0_~arg.offset=0, Thread4_thread1_thidvar0=0, Thread4_thread1_~arg.base=0, Thread4_thread1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread2_thread0_#in~arg.base|=0, |Thread2_thread0_#in~arg.offset|=0, |Thread2_thread0_~#t1~0.base|=96, |Thread2_thread0_~#t1~0.offset|=0, |Thread2_thread0_~#t2~0.base|=93, |Thread2_thread0_~#t2~0.offset|=0, |Thread2_thread0_~#t3~0.base|=90, |Thread2_thread0_~#t3~0.offset|=0, |Thread2_thread0_~#t4~0.base|=91, |Thread2_thread0_~#t4~0.offset|=0, |Thread2_thread0_~#t5~0.base|=95, |Thread2_thread0_~#t5~0.offset|=0, |Thread4_thread1_#in~arg.base|=0, |Thread4_thread1_#in~arg.offset|=0, |Thread4_thread1_#res.base|=0, |Thread4_thread1_#res.offset|=0, |Thread4_thread1_#t~malloc0.base|=92, |Thread4_thread1_#t~malloc0.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 [190] L1232-1-->L1233: Formula: true InVars {} OutVars{Thread2_thread0_#t~nondet1=|v_Thread2_thread0_#t~nondet1_1|} AuxVars[] AssignedVars[Thread2_thread0_#t~nondet1] VAL [Thread2_thread0_thidvar0=5, Thread2_thread0_~arg.base=0, Thread2_thread0_~arg.offset=0, Thread4_thread1_thidvar0=0, Thread4_thread1_~arg.base=0, Thread4_thread1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread2_thread0_#in~arg.base|=0, |Thread2_thread0_#in~arg.offset|=0, |Thread2_thread0_~#t1~0.base|=96, |Thread2_thread0_~#t1~0.offset|=0, |Thread2_thread0_~#t2~0.base|=93, |Thread2_thread0_~#t2~0.offset|=0, |Thread2_thread0_~#t3~0.base|=90, |Thread2_thread0_~#t3~0.offset|=0, |Thread2_thread0_~#t4~0.base|=91, |Thread2_thread0_~#t4~0.offset|=0, |Thread2_thread0_~#t5~0.base|=95, |Thread2_thread0_~#t5~0.offset|=0, |Thread4_thread1_#in~arg.base|=0, |Thread4_thread1_#in~arg.offset|=0, |Thread4_thread1_#res.base|=0, |Thread4_thread1_#res.offset|=0, |Thread4_thread1_#t~malloc0.base|=92, |Thread4_thread1_#t~malloc0.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 [191] L1233-->L1233-1: Formula: (= (select (select |v_#memory_int_3| |v_Thread2_thread0_~#t1~0.base_3|) |v_Thread2_thread0_~#t1~0.offset_3|) |v_Thread2_thread0_#t~mem2_1|) InVars {#memory_int=|v_#memory_int_3|, Thread2_thread0_~#t1~0.base=|v_Thread2_thread0_~#t1~0.base_3|, Thread2_thread0_~#t1~0.offset=|v_Thread2_thread0_~#t1~0.offset_3|} OutVars{#memory_int=|v_#memory_int_3|, Thread2_thread0_#t~mem2=|v_Thread2_thread0_#t~mem2_1|, Thread2_thread0_~#t1~0.base=|v_Thread2_thread0_~#t1~0.base_3|, Thread2_thread0_~#t1~0.offset=|v_Thread2_thread0_~#t1~0.offset_3|} AuxVars[] AssignedVars[Thread2_thread0_#t~mem2] VAL [Thread2_thread0_thidvar0=5, Thread2_thread0_~arg.base=0, Thread2_thread0_~arg.offset=0, Thread4_thread1_thidvar0=0, Thread4_thread1_~arg.base=0, Thread4_thread1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread2_thread0_#in~arg.base|=0, |Thread2_thread0_#in~arg.offset|=0, |Thread2_thread0_#t~mem2|=0, |Thread2_thread0_~#t1~0.base|=96, |Thread2_thread0_~#t1~0.offset|=0, |Thread2_thread0_~#t2~0.base|=93, |Thread2_thread0_~#t2~0.offset|=0, |Thread2_thread0_~#t3~0.base|=90, |Thread2_thread0_~#t3~0.offset|=0, |Thread2_thread0_~#t4~0.base|=91, |Thread2_thread0_~#t4~0.offset|=0, |Thread2_thread0_~#t5~0.base|=95, |Thread2_thread0_~#t5~0.offset|=0, |Thread4_thread1_#in~arg.base|=0, |Thread4_thread1_#in~arg.offset|=0, |Thread4_thread1_#res.base|=0, |Thread4_thread1_#res.offset|=0, |Thread4_thread1_#t~malloc0.base|=92, |Thread4_thread1_#t~malloc0.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] JOIN 1 [337] thread1EXIT-->L1233-2: Formula: (= |v_Thread2_thread0_#t~mem2_22| v_Thread4_thread1_thidvar0_32) InVars {Thread4_thread1_thidvar0=v_Thread4_thread1_thidvar0_32, Thread2_thread0_#t~mem2=|v_Thread2_thread0_#t~mem2_22|} OutVars{Thread4_thread1_thidvar0=v_Thread4_thread1_thidvar0_32, Thread2_thread0_#t~mem2=|v_Thread2_thread0_#t~mem2_22|} AuxVars[] AssignedVars[] VAL [Thread2_thread0_thidvar0=5, Thread2_thread0_~arg.base=0, Thread2_thread0_~arg.offset=0, Thread4_thread1_thidvar0=0, Thread4_thread1_~arg.base=0, Thread4_thread1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread2_thread0_#in~arg.base|=0, |Thread2_thread0_#in~arg.offset|=0, |Thread2_thread0_#t~mem2|=0, |Thread2_thread0_~#t1~0.base|=96, |Thread2_thread0_~#t1~0.offset|=0, |Thread2_thread0_~#t2~0.base|=93, |Thread2_thread0_~#t2~0.offset|=0, |Thread2_thread0_~#t3~0.base|=90, |Thread2_thread0_~#t3~0.offset|=0, |Thread2_thread0_~#t4~0.base|=91, |Thread2_thread0_~#t4~0.offset|=0, |Thread2_thread0_~#t5~0.base|=95, |Thread2_thread0_~#t5~0.offset|=0, |Thread4_thread1_#in~arg.base|=0, |Thread4_thread1_#in~arg.offset|=0, |Thread4_thread1_#res.base|=0, |Thread4_thread1_#res.offset|=0, |Thread4_thread1_#t~malloc0.base|=92, |Thread4_thread1_#t~malloc0.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 [193] L1233-2-->L1234: Formula: true InVars {} OutVars{Thread2_thread0_#t~mem2=|v_Thread2_thread0_#t~mem2_2|} AuxVars[] AssignedVars[Thread2_thread0_#t~mem2] VAL [Thread2_thread0_thidvar0=5, Thread2_thread0_~arg.base=0, Thread2_thread0_~arg.offset=0, Thread4_thread1_thidvar0=0, Thread4_thread1_~arg.base=0, Thread4_thread1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread2_thread0_#in~arg.base|=0, |Thread2_thread0_#in~arg.offset|=0, |Thread2_thread0_~#t1~0.base|=96, |Thread2_thread0_~#t1~0.offset|=0, |Thread2_thread0_~#t2~0.base|=93, |Thread2_thread0_~#t2~0.offset|=0, |Thread2_thread0_~#t3~0.base|=90, |Thread2_thread0_~#t3~0.offset|=0, |Thread2_thread0_~#t4~0.base|=91, |Thread2_thread0_~#t4~0.offset|=0, |Thread2_thread0_~#t5~0.base|=95, |Thread2_thread0_~#t5~0.offset|=0, |Thread4_thread1_#in~arg.base|=0, |Thread4_thread1_#in~arg.offset|=0, |Thread4_thread1_#res.base|=0, |Thread4_thread1_#res.offset|=0, |Thread4_thread1_#t~malloc0.base|=92, |Thread4_thread1_#t~malloc0.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 [194] L1234-->L1234-1: Formula: (= (store |v_#memory_int_5| |v_Thread2_thread0_~#t2~0.base_2| (store (select |v_#memory_int_5| |v_Thread2_thread0_~#t2~0.base_2|) |v_Thread2_thread0_~#t2~0.offset_2| 1)) |v_#memory_int_4|) InVars {#memory_int=|v_#memory_int_5|, Thread2_thread0_~#t2~0.offset=|v_Thread2_thread0_~#t2~0.offset_2|, Thread2_thread0_~#t2~0.base=|v_Thread2_thread0_~#t2~0.base_2|} OutVars{#memory_int=|v_#memory_int_4|, Thread2_thread0_~#t2~0.offset=|v_Thread2_thread0_~#t2~0.offset_2|, Thread2_thread0_~#t2~0.base=|v_Thread2_thread0_~#t2~0.base_2|} AuxVars[] AssignedVars[#memory_int] VAL [Thread2_thread0_thidvar0=5, Thread2_thread0_~arg.base=0, Thread2_thread0_~arg.offset=0, Thread4_thread1_thidvar0=0, Thread4_thread1_~arg.base=0, Thread4_thread1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread2_thread0_#in~arg.base|=0, |Thread2_thread0_#in~arg.offset|=0, |Thread2_thread0_~#t1~0.base|=96, |Thread2_thread0_~#t1~0.offset|=0, |Thread2_thread0_~#t2~0.base|=93, |Thread2_thread0_~#t2~0.offset|=0, |Thread2_thread0_~#t3~0.base|=90, |Thread2_thread0_~#t3~0.offset|=0, |Thread2_thread0_~#t4~0.base|=91, |Thread2_thread0_~#t4~0.offset|=0, |Thread2_thread0_~#t5~0.base|=95, |Thread2_thread0_~#t5~0.offset|=0, |Thread4_thread1_#in~arg.base|=0, |Thread4_thread1_#in~arg.offset|=0, |Thread4_thread1_#res.base|=0, |Thread4_thread1_#res.offset|=0, |Thread4_thread1_#t~malloc0.base|=92, |Thread4_thread1_#t~malloc0.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] FORK 0 [258] L1234-1-->thread2ENTRY: Formula: (and (= 0 |v_Thread5_thread2_#in~arg.offset_5|) (= 0 |v_Thread5_thread2_#in~arg.base_5|) (= 1 v_Thread5_thread2_thidvar0_4)) InVars {} OutVars{Thread5_thread2_thidvar0=v_Thread5_thread2_thidvar0_4, Thread5_thread2_#in~arg.base=|v_Thread5_thread2_#in~arg.base_5|, Thread5_thread2_#in~arg.offset=|v_Thread5_thread2_#in~arg.offset_5|} AuxVars[] AssignedVars[Thread5_thread2_thidvar0, Thread5_thread2_#in~arg.base, Thread5_thread2_#in~arg.offset] VAL [Thread2_thread0_thidvar0=5, Thread2_thread0_~arg.base=0, Thread2_thread0_~arg.offset=0, Thread4_thread1_thidvar0=0, Thread4_thread1_~arg.base=0, Thread4_thread1_~arg.offset=0, Thread5_thread2_thidvar0=1, |#NULL.base|=0, |#NULL.offset|=0, |Thread2_thread0_#in~arg.base|=0, |Thread2_thread0_#in~arg.offset|=0, |Thread2_thread0_~#t1~0.base|=96, |Thread2_thread0_~#t1~0.offset|=0, |Thread2_thread0_~#t2~0.base|=93, |Thread2_thread0_~#t2~0.offset|=0, |Thread2_thread0_~#t3~0.base|=90, |Thread2_thread0_~#t3~0.offset|=0, |Thread2_thread0_~#t4~0.base|=91, |Thread2_thread0_~#t4~0.offset|=0, |Thread2_thread0_~#t5~0.base|=95, |Thread2_thread0_~#t5~0.offset|=0, |Thread4_thread1_#in~arg.base|=0, |Thread4_thread1_#in~arg.offset|=0, |Thread4_thread1_#res.base|=0, |Thread4_thread1_#res.offset|=0, |Thread4_thread1_#t~malloc0.base|=92, |Thread4_thread1_#t~malloc0.offset|=0, |Thread5_thread2_#in~arg.base|=0, |Thread5_thread2_#in~arg.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 2 [243] thread2ENTRY-->L1221: Formula: (and (= v_Thread5_thread2_~arg.base_1 |v_Thread5_thread2_#in~arg.base_1|) (= v_Thread5_thread2_~arg.offset_1 |v_Thread5_thread2_#in~arg.offset_1|)) InVars {Thread5_thread2_#in~arg.offset=|v_Thread5_thread2_#in~arg.offset_1|, Thread5_thread2_#in~arg.base=|v_Thread5_thread2_#in~arg.base_1|} OutVars{Thread5_thread2_#in~arg.offset=|v_Thread5_thread2_#in~arg.offset_1|, Thread5_thread2_#in~arg.base=|v_Thread5_thread2_#in~arg.base_1|, Thread5_thread2_~arg.base=v_Thread5_thread2_~arg.base_1, Thread5_thread2_~arg.offset=v_Thread5_thread2_~arg.offset_1} AuxVars[] AssignedVars[Thread5_thread2_~arg.base, Thread5_thread2_~arg.offset] VAL [Thread2_thread0_thidvar0=5, Thread2_thread0_~arg.base=0, Thread2_thread0_~arg.offset=0, Thread4_thread1_thidvar0=0, Thread4_thread1_~arg.base=0, Thread4_thread1_~arg.offset=0, Thread5_thread2_thidvar0=1, Thread5_thread2_~arg.base=0, Thread5_thread2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread2_thread0_#in~arg.base|=0, |Thread2_thread0_#in~arg.offset|=0, |Thread2_thread0_~#t1~0.base|=96, |Thread2_thread0_~#t1~0.offset|=0, |Thread2_thread0_~#t2~0.base|=93, |Thread2_thread0_~#t2~0.offset|=0, |Thread2_thread0_~#t3~0.base|=90, |Thread2_thread0_~#t3~0.offset|=0, |Thread2_thread0_~#t4~0.base|=91, |Thread2_thread0_~#t4~0.offset|=0, |Thread2_thread0_~#t5~0.base|=95, |Thread2_thread0_~#t5~0.offset|=0, |Thread4_thread1_#in~arg.base|=0, |Thread4_thread1_#in~arg.offset|=0, |Thread4_thread1_#res.base|=0, |Thread4_thread1_#res.offset|=0, |Thread4_thread1_#t~malloc0.base|=92, |Thread4_thread1_#t~malloc0.offset|=0, |Thread5_thread2_#in~arg.base|=0, |Thread5_thread2_#in~arg.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 [196] L1234-2-->L1235: Formula: true InVars {} OutVars{Thread2_thread0_#t~nondet3=|v_Thread2_thread0_#t~nondet3_1|} AuxVars[] AssignedVars[Thread2_thread0_#t~nondet3] VAL [Thread2_thread0_thidvar0=5, Thread2_thread0_~arg.base=0, Thread2_thread0_~arg.offset=0, Thread4_thread1_thidvar0=0, Thread4_thread1_~arg.base=0, Thread4_thread1_~arg.offset=0, Thread5_thread2_thidvar0=1, Thread5_thread2_~arg.base=0, Thread5_thread2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread2_thread0_#in~arg.base|=0, |Thread2_thread0_#in~arg.offset|=0, |Thread2_thread0_~#t1~0.base|=96, |Thread2_thread0_~#t1~0.offset|=0, |Thread2_thread0_~#t2~0.base|=93, |Thread2_thread0_~#t2~0.offset|=0, |Thread2_thread0_~#t3~0.base|=90, |Thread2_thread0_~#t3~0.offset|=0, |Thread2_thread0_~#t4~0.base|=91, |Thread2_thread0_~#t4~0.offset|=0, |Thread2_thread0_~#t5~0.base|=95, |Thread2_thread0_~#t5~0.offset|=0, |Thread4_thread1_#in~arg.base|=0, |Thread4_thread1_#in~arg.offset|=0, |Thread4_thread1_#res.base|=0, |Thread4_thread1_#res.offset|=0, |Thread4_thread1_#t~malloc0.base|=92, |Thread4_thread1_#t~malloc0.offset|=0, |Thread5_thread2_#in~arg.base|=0, |Thread5_thread2_#in~arg.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 2 [244] L1221-->L1221-1: Formula: (= |v_#memory_int_16| (store |v_#memory_int_17| v_~v~0.base_2 (store (select |v_#memory_int_17| v_~v~0.base_2) v_~v~0.offset_2 88))) InVars {#memory_int=|v_#memory_int_17|, ~v~0.offset=v_~v~0.offset_2, ~v~0.base=v_~v~0.base_2} OutVars{#memory_int=|v_#memory_int_16|, ~v~0.offset=v_~v~0.offset_2, ~v~0.base=v_~v~0.base_2} AuxVars[] AssignedVars[#memory_int] VAL [Thread2_thread0_thidvar0=5, Thread2_thread0_~arg.base=0, Thread2_thread0_~arg.offset=0, Thread4_thread1_thidvar0=0, Thread4_thread1_~arg.base=0, Thread4_thread1_~arg.offset=0, Thread5_thread2_thidvar0=1, Thread5_thread2_~arg.base=0, Thread5_thread2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread2_thread0_#in~arg.base|=0, |Thread2_thread0_#in~arg.offset|=0, |Thread2_thread0_~#t1~0.base|=96, |Thread2_thread0_~#t1~0.offset|=0, |Thread2_thread0_~#t2~0.base|=93, |Thread2_thread0_~#t2~0.offset|=0, |Thread2_thread0_~#t3~0.base|=90, |Thread2_thread0_~#t3~0.offset|=0, |Thread2_thread0_~#t4~0.base|=91, |Thread2_thread0_~#t4~0.offset|=0, |Thread2_thread0_~#t5~0.base|=95, |Thread2_thread0_~#t5~0.offset|=0, |Thread4_thread1_#in~arg.base|=0, |Thread4_thread1_#in~arg.offset|=0, |Thread4_thread1_#res.base|=0, |Thread4_thread1_#res.offset|=0, |Thread4_thread1_#t~malloc0.base|=92, |Thread4_thread1_#t~malloc0.offset|=0, |Thread5_thread2_#in~arg.base|=0, |Thread5_thread2_#in~arg.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 2 [245] L1221-1-->thread2FINAL: Formula: (and (= |v_Thread5_thread2_#res.base_1| 0) (= |v_Thread5_thread2_#res.offset_1| 0)) InVars {} OutVars{Thread5_thread2_#res.offset=|v_Thread5_thread2_#res.offset_1|, Thread5_thread2_#res.base=|v_Thread5_thread2_#res.base_1|} AuxVars[] AssignedVars[Thread5_thread2_#res.base, Thread5_thread2_#res.offset] VAL [Thread2_thread0_thidvar0=5, Thread2_thread0_~arg.base=0, Thread2_thread0_~arg.offset=0, Thread4_thread1_thidvar0=0, Thread4_thread1_~arg.base=0, Thread4_thread1_~arg.offset=0, Thread5_thread2_thidvar0=1, Thread5_thread2_~arg.base=0, Thread5_thread2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread2_thread0_#in~arg.base|=0, |Thread2_thread0_#in~arg.offset|=0, |Thread2_thread0_~#t1~0.base|=96, |Thread2_thread0_~#t1~0.offset|=0, |Thread2_thread0_~#t2~0.base|=93, |Thread2_thread0_~#t2~0.offset|=0, |Thread2_thread0_~#t3~0.base|=90, |Thread2_thread0_~#t3~0.offset|=0, |Thread2_thread0_~#t4~0.base|=91, |Thread2_thread0_~#t4~0.offset|=0, |Thread2_thread0_~#t5~0.base|=95, |Thread2_thread0_~#t5~0.offset|=0, |Thread4_thread1_#in~arg.base|=0, |Thread4_thread1_#in~arg.offset|=0, |Thread4_thread1_#res.base|=0, |Thread4_thread1_#res.offset|=0, |Thread4_thread1_#t~malloc0.base|=92, |Thread4_thread1_#t~malloc0.offset|=0, |Thread5_thread2_#in~arg.base|=0, |Thread5_thread2_#in~arg.offset|=0, |Thread5_thread2_#res.base|=0, |Thread5_thread2_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 [197] L1235-->L1235-1: Formula: (= (store |v_#memory_int_7| |v_Thread2_thread0_~#t3~0.base_2| (store (select |v_#memory_int_7| |v_Thread2_thread0_~#t3~0.base_2|) |v_Thread2_thread0_~#t3~0.offset_2| 2)) |v_#memory_int_6|) InVars {Thread2_thread0_~#t3~0.offset=|v_Thread2_thread0_~#t3~0.offset_2|, #memory_int=|v_#memory_int_7|, Thread2_thread0_~#t3~0.base=|v_Thread2_thread0_~#t3~0.base_2|} OutVars{Thread2_thread0_~#t3~0.offset=|v_Thread2_thread0_~#t3~0.offset_2|, #memory_int=|v_#memory_int_6|, Thread2_thread0_~#t3~0.base=|v_Thread2_thread0_~#t3~0.base_2|} AuxVars[] AssignedVars[#memory_int] VAL [Thread2_thread0_thidvar0=5, Thread2_thread0_~arg.base=0, Thread2_thread0_~arg.offset=0, Thread4_thread1_thidvar0=0, Thread4_thread1_~arg.base=0, Thread4_thread1_~arg.offset=0, Thread5_thread2_thidvar0=1, Thread5_thread2_~arg.base=0, Thread5_thread2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread2_thread0_#in~arg.base|=0, |Thread2_thread0_#in~arg.offset|=0, |Thread2_thread0_~#t1~0.base|=96, |Thread2_thread0_~#t1~0.offset|=0, |Thread2_thread0_~#t2~0.base|=93, |Thread2_thread0_~#t2~0.offset|=0, |Thread2_thread0_~#t3~0.base|=90, |Thread2_thread0_~#t3~0.offset|=0, |Thread2_thread0_~#t4~0.base|=91, |Thread2_thread0_~#t4~0.offset|=0, |Thread2_thread0_~#t5~0.base|=95, |Thread2_thread0_~#t5~0.offset|=0, |Thread4_thread1_#in~arg.base|=0, |Thread4_thread1_#in~arg.offset|=0, |Thread4_thread1_#res.base|=0, |Thread4_thread1_#res.offset|=0, |Thread4_thread1_#t~malloc0.base|=92, |Thread4_thread1_#t~malloc0.offset|=0, |Thread5_thread2_#in~arg.base|=0, |Thread5_thread2_#in~arg.offset|=0, |Thread5_thread2_#res.base|=0, |Thread5_thread2_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] FORK 0 [259] L1235-1-->thread3ENTRY: Formula: (and (= 0 |v_Thread0_thread3_#in~arg.base_5|) (= 0 |v_Thread0_thread3_#in~arg.offset_5|) (= v_Thread0_thread3_thidvar0_4 2)) InVars {} OutVars{Thread0_thread3_thidvar0=v_Thread0_thread3_thidvar0_4, Thread0_thread3_#in~arg.offset=|v_Thread0_thread3_#in~arg.offset_5|, Thread0_thread3_#in~arg.base=|v_Thread0_thread3_#in~arg.base_5|} AuxVars[] AssignedVars[Thread0_thread3_thidvar0, Thread0_thread3_#in~arg.offset, Thread0_thread3_#in~arg.base] VAL [Thread0_thread3_thidvar0=2, Thread2_thread0_thidvar0=5, Thread2_thread0_~arg.base=0, Thread2_thread0_~arg.offset=0, Thread4_thread1_thidvar0=0, Thread4_thread1_~arg.base=0, Thread4_thread1_~arg.offset=0, Thread5_thread2_thidvar0=1, Thread5_thread2_~arg.base=0, Thread5_thread2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_thread3_#in~arg.base|=0, |Thread0_thread3_#in~arg.offset|=0, |Thread2_thread0_#in~arg.base|=0, |Thread2_thread0_#in~arg.offset|=0, |Thread2_thread0_~#t1~0.base|=96, |Thread2_thread0_~#t1~0.offset|=0, |Thread2_thread0_~#t2~0.base|=93, |Thread2_thread0_~#t2~0.offset|=0, |Thread2_thread0_~#t3~0.base|=90, |Thread2_thread0_~#t3~0.offset|=0, |Thread2_thread0_~#t4~0.base|=91, |Thread2_thread0_~#t4~0.offset|=0, |Thread2_thread0_~#t5~0.base|=95, |Thread2_thread0_~#t5~0.offset|=0, |Thread4_thread1_#in~arg.base|=0, |Thread4_thread1_#in~arg.offset|=0, |Thread4_thread1_#res.base|=0, |Thread4_thread1_#res.offset|=0, |Thread4_thread1_#t~malloc0.base|=92, |Thread4_thread1_#t~malloc0.offset|=0, |Thread5_thread2_#in~arg.base|=0, |Thread5_thread2_#in~arg.offset|=0, |Thread5_thread2_#res.base|=0, |Thread5_thread2_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 2 [246] thread2FINAL-->thread2EXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] VAL [Thread0_thread3_thidvar0=2, Thread2_thread0_thidvar0=5, Thread2_thread0_~arg.base=0, Thread2_thread0_~arg.offset=0, Thread4_thread1_thidvar0=0, Thread4_thread1_~arg.base=0, Thread4_thread1_~arg.offset=0, Thread5_thread2_thidvar0=1, Thread5_thread2_~arg.base=0, Thread5_thread2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_thread3_#in~arg.base|=0, |Thread0_thread3_#in~arg.offset|=0, |Thread2_thread0_#in~arg.base|=0, |Thread2_thread0_#in~arg.offset|=0, |Thread2_thread0_~#t1~0.base|=96, |Thread2_thread0_~#t1~0.offset|=0, |Thread2_thread0_~#t2~0.base|=93, |Thread2_thread0_~#t2~0.offset|=0, |Thread2_thread0_~#t3~0.base|=90, |Thread2_thread0_~#t3~0.offset|=0, |Thread2_thread0_~#t4~0.base|=91, |Thread2_thread0_~#t4~0.offset|=0, |Thread2_thread0_~#t5~0.base|=95, |Thread2_thread0_~#t5~0.offset|=0, |Thread4_thread1_#in~arg.base|=0, |Thread4_thread1_#in~arg.offset|=0, |Thread4_thread1_#res.base|=0, |Thread4_thread1_#res.offset|=0, |Thread4_thread1_#t~malloc0.base|=92, |Thread4_thread1_#t~malloc0.offset|=0, |Thread5_thread2_#in~arg.base|=0, |Thread5_thread2_#in~arg.offset|=0, |Thread5_thread2_#res.base|=0, |Thread5_thread2_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 [199] L1235-2-->L1236: Formula: true InVars {} OutVars{Thread2_thread0_#t~nondet4=|v_Thread2_thread0_#t~nondet4_1|} AuxVars[] AssignedVars[Thread2_thread0_#t~nondet4] VAL [Thread0_thread3_thidvar0=2, Thread2_thread0_thidvar0=5, Thread2_thread0_~arg.base=0, Thread2_thread0_~arg.offset=0, Thread4_thread1_thidvar0=0, Thread4_thread1_~arg.base=0, Thread4_thread1_~arg.offset=0, Thread5_thread2_thidvar0=1, Thread5_thread2_~arg.base=0, Thread5_thread2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_thread3_#in~arg.base|=0, |Thread0_thread3_#in~arg.offset|=0, |Thread2_thread0_#in~arg.base|=0, |Thread2_thread0_#in~arg.offset|=0, |Thread2_thread0_~#t1~0.base|=96, |Thread2_thread0_~#t1~0.offset|=0, |Thread2_thread0_~#t2~0.base|=93, |Thread2_thread0_~#t2~0.offset|=0, |Thread2_thread0_~#t3~0.base|=90, |Thread2_thread0_~#t3~0.offset|=0, |Thread2_thread0_~#t4~0.base|=91, |Thread2_thread0_~#t4~0.offset|=0, |Thread2_thread0_~#t5~0.base|=95, |Thread2_thread0_~#t5~0.offset|=0, |Thread4_thread1_#in~arg.base|=0, |Thread4_thread1_#in~arg.offset|=0, |Thread4_thread1_#res.base|=0, |Thread4_thread1_#res.offset|=0, |Thread4_thread1_#t~malloc0.base|=92, |Thread4_thread1_#t~malloc0.offset|=0, |Thread5_thread2_#in~arg.base|=0, |Thread5_thread2_#in~arg.offset|=0, |Thread5_thread2_#res.base|=0, |Thread5_thread2_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 3 [247] thread3ENTRY-->L1226: Formula: (and (= v_Thread0_thread3_~arg.offset_1 |v_Thread0_thread3_#in~arg.offset_1|) (= v_Thread0_thread3_~arg.base_1 |v_Thread0_thread3_#in~arg.base_1|)) InVars {Thread0_thread3_#in~arg.base=|v_Thread0_thread3_#in~arg.base_1|, Thread0_thread3_#in~arg.offset=|v_Thread0_thread3_#in~arg.offset_1|} OutVars{Thread0_thread3_~arg.offset=v_Thread0_thread3_~arg.offset_1, Thread0_thread3_~arg.base=v_Thread0_thread3_~arg.base_1, Thread0_thread3_#in~arg.offset=|v_Thread0_thread3_#in~arg.offset_1|, Thread0_thread3_#in~arg.base=|v_Thread0_thread3_#in~arg.base_1|} AuxVars[] AssignedVars[Thread0_thread3_~arg.offset, Thread0_thread3_~arg.base] VAL [Thread0_thread3_thidvar0=2, Thread0_thread3_~arg.base=0, Thread0_thread3_~arg.offset=0, Thread2_thread0_thidvar0=5, Thread2_thread0_~arg.base=0, Thread2_thread0_~arg.offset=0, Thread4_thread1_thidvar0=0, Thread4_thread1_~arg.base=0, Thread4_thread1_~arg.offset=0, Thread5_thread2_thidvar0=1, Thread5_thread2_~arg.base=0, Thread5_thread2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_thread3_#in~arg.base|=0, |Thread0_thread3_#in~arg.offset|=0, |Thread2_thread0_#in~arg.base|=0, |Thread2_thread0_#in~arg.offset|=0, |Thread2_thread0_~#t1~0.base|=96, |Thread2_thread0_~#t1~0.offset|=0, |Thread2_thread0_~#t2~0.base|=93, |Thread2_thread0_~#t2~0.offset|=0, |Thread2_thread0_~#t3~0.base|=90, |Thread2_thread0_~#t3~0.offset|=0, |Thread2_thread0_~#t4~0.base|=91, |Thread2_thread0_~#t4~0.offset|=0, |Thread2_thread0_~#t5~0.base|=95, |Thread2_thread0_~#t5~0.offset|=0, |Thread4_thread1_#in~arg.base|=0, |Thread4_thread1_#in~arg.offset|=0, |Thread4_thread1_#res.base|=0, |Thread4_thread1_#res.offset|=0, |Thread4_thread1_#t~malloc0.base|=92, |Thread4_thread1_#t~malloc0.offset|=0, |Thread5_thread2_#in~arg.base|=0, |Thread5_thread2_#in~arg.offset|=0, |Thread5_thread2_#res.base|=0, |Thread5_thread2_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 [200] L1236-->L1236-1: Formula: (= |v_#memory_int_8| (store |v_#memory_int_9| |v_Thread2_thread0_~#t4~0.base_2| (store (select |v_#memory_int_9| |v_Thread2_thread0_~#t4~0.base_2|) |v_Thread2_thread0_~#t4~0.offset_2| 3))) InVars {#memory_int=|v_#memory_int_9|, Thread2_thread0_~#t4~0.offset=|v_Thread2_thread0_~#t4~0.offset_2|, Thread2_thread0_~#t4~0.base=|v_Thread2_thread0_~#t4~0.base_2|} OutVars{#memory_int=|v_#memory_int_8|, Thread2_thread0_~#t4~0.offset=|v_Thread2_thread0_~#t4~0.offset_2|, Thread2_thread0_~#t4~0.base=|v_Thread2_thread0_~#t4~0.base_2|} AuxVars[] AssignedVars[#memory_int] VAL [Thread0_thread3_thidvar0=2, Thread0_thread3_~arg.base=0, Thread0_thread3_~arg.offset=0, Thread2_thread0_thidvar0=5, Thread2_thread0_~arg.base=0, Thread2_thread0_~arg.offset=0, Thread4_thread1_thidvar0=0, Thread4_thread1_~arg.base=0, Thread4_thread1_~arg.offset=0, Thread5_thread2_thidvar0=1, Thread5_thread2_~arg.base=0, Thread5_thread2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_thread3_#in~arg.base|=0, |Thread0_thread3_#in~arg.offset|=0, |Thread2_thread0_#in~arg.base|=0, |Thread2_thread0_#in~arg.offset|=0, |Thread2_thread0_~#t1~0.base|=96, |Thread2_thread0_~#t1~0.offset|=0, |Thread2_thread0_~#t2~0.base|=93, |Thread2_thread0_~#t2~0.offset|=0, |Thread2_thread0_~#t3~0.base|=90, |Thread2_thread0_~#t3~0.offset|=0, |Thread2_thread0_~#t4~0.base|=91, |Thread2_thread0_~#t4~0.offset|=0, |Thread2_thread0_~#t5~0.base|=95, |Thread2_thread0_~#t5~0.offset|=0, |Thread4_thread1_#in~arg.base|=0, |Thread4_thread1_#in~arg.offset|=0, |Thread4_thread1_#res.base|=0, |Thread4_thread1_#res.offset|=0, |Thread4_thread1_#t~malloc0.base|=92, |Thread4_thread1_#t~malloc0.offset|=0, |Thread5_thread2_#in~arg.base|=0, |Thread5_thread2_#in~arg.offset|=0, |Thread5_thread2_#res.base|=0, |Thread5_thread2_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] FORK 0 [260] L1236-1-->thread2ENTRY: Formula: (and (= v_Thread1_thread2_thidvar0_4 3) (= 0 |v_Thread1_thread2_#in~arg.offset_5|) (= 0 |v_Thread1_thread2_#in~arg.base_5|)) InVars {} OutVars{Thread1_thread2_#in~arg.base=|v_Thread1_thread2_#in~arg.base_5|, Thread1_thread2_thidvar0=v_Thread1_thread2_thidvar0_4, Thread1_thread2_#in~arg.offset=|v_Thread1_thread2_#in~arg.offset_5|} AuxVars[] AssignedVars[Thread1_thread2_#in~arg.base, Thread1_thread2_thidvar0, Thread1_thread2_#in~arg.offset] VAL [Thread0_thread3_thidvar0=2, Thread0_thread3_~arg.base=0, Thread0_thread3_~arg.offset=0, Thread1_thread2_thidvar0=3, Thread2_thread0_thidvar0=5, Thread2_thread0_~arg.base=0, Thread2_thread0_~arg.offset=0, Thread4_thread1_thidvar0=0, Thread4_thread1_~arg.base=0, Thread4_thread1_~arg.offset=0, Thread5_thread2_thidvar0=1, Thread5_thread2_~arg.base=0, Thread5_thread2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_thread3_#in~arg.base|=0, |Thread0_thread3_#in~arg.offset|=0, |Thread1_thread2_#in~arg.base|=0, |Thread1_thread2_#in~arg.offset|=0, |Thread2_thread0_#in~arg.base|=0, |Thread2_thread0_#in~arg.offset|=0, |Thread2_thread0_~#t1~0.base|=96, |Thread2_thread0_~#t1~0.offset|=0, |Thread2_thread0_~#t2~0.base|=93, |Thread2_thread0_~#t2~0.offset|=0, |Thread2_thread0_~#t3~0.base|=90, |Thread2_thread0_~#t3~0.offset|=0, |Thread2_thread0_~#t4~0.base|=91, |Thread2_thread0_~#t4~0.offset|=0, |Thread2_thread0_~#t5~0.base|=95, |Thread2_thread0_~#t5~0.offset|=0, |Thread4_thread1_#in~arg.base|=0, |Thread4_thread1_#in~arg.offset|=0, |Thread4_thread1_#res.base|=0, |Thread4_thread1_#res.offset|=0, |Thread4_thread1_#t~malloc0.base|=92, |Thread4_thread1_#t~malloc0.offset|=0, |Thread5_thread2_#in~arg.base|=0, |Thread5_thread2_#in~arg.offset|=0, |Thread5_thread2_#res.base|=0, |Thread5_thread2_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 [202] L1236-2-->L1237: Formula: true InVars {} OutVars{Thread2_thread0_#t~nondet5=|v_Thread2_thread0_#t~nondet5_1|} AuxVars[] AssignedVars[Thread2_thread0_#t~nondet5] VAL [Thread0_thread3_thidvar0=2, Thread0_thread3_~arg.base=0, Thread0_thread3_~arg.offset=0, Thread1_thread2_thidvar0=3, Thread2_thread0_thidvar0=5, Thread2_thread0_~arg.base=0, Thread2_thread0_~arg.offset=0, Thread4_thread1_thidvar0=0, Thread4_thread1_~arg.base=0, Thread4_thread1_~arg.offset=0, Thread5_thread2_thidvar0=1, Thread5_thread2_~arg.base=0, Thread5_thread2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_thread3_#in~arg.base|=0, |Thread0_thread3_#in~arg.offset|=0, |Thread1_thread2_#in~arg.base|=0, |Thread1_thread2_#in~arg.offset|=0, |Thread2_thread0_#in~arg.base|=0, |Thread2_thread0_#in~arg.offset|=0, |Thread2_thread0_~#t1~0.base|=96, |Thread2_thread0_~#t1~0.offset|=0, |Thread2_thread0_~#t2~0.base|=93, |Thread2_thread0_~#t2~0.offset|=0, |Thread2_thread0_~#t3~0.base|=90, |Thread2_thread0_~#t3~0.offset|=0, |Thread2_thread0_~#t4~0.base|=91, |Thread2_thread0_~#t4~0.offset|=0, |Thread2_thread0_~#t5~0.base|=95, |Thread2_thread0_~#t5~0.offset|=0, |Thread4_thread1_#in~arg.base|=0, |Thread4_thread1_#in~arg.offset|=0, |Thread4_thread1_#res.base|=0, |Thread4_thread1_#res.offset|=0, |Thread4_thread1_#t~malloc0.base|=92, |Thread4_thread1_#t~malloc0.offset|=0, |Thread5_thread2_#in~arg.base|=0, |Thread5_thread2_#in~arg.offset|=0, |Thread5_thread2_#res.base|=0, |Thread5_thread2_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 [203] L1237-->L1237-1: Formula: (= (store |v_#memory_int_11| |v_Thread2_thread0_~#t5~0.base_2| (store (select |v_#memory_int_11| |v_Thread2_thread0_~#t5~0.base_2|) |v_Thread2_thread0_~#t5~0.offset_2| 4)) |v_#memory_int_10|) InVars {#memory_int=|v_#memory_int_11|, Thread2_thread0_~#t5~0.base=|v_Thread2_thread0_~#t5~0.base_2|, Thread2_thread0_~#t5~0.offset=|v_Thread2_thread0_~#t5~0.offset_2|} OutVars{#memory_int=|v_#memory_int_10|, Thread2_thread0_~#t5~0.base=|v_Thread2_thread0_~#t5~0.base_2|, Thread2_thread0_~#t5~0.offset=|v_Thread2_thread0_~#t5~0.offset_2|} AuxVars[] AssignedVars[#memory_int] VAL [Thread0_thread3_thidvar0=2, Thread0_thread3_~arg.base=0, Thread0_thread3_~arg.offset=0, Thread1_thread2_thidvar0=3, Thread2_thread0_thidvar0=5, Thread2_thread0_~arg.base=0, Thread2_thread0_~arg.offset=0, Thread4_thread1_thidvar0=0, Thread4_thread1_~arg.base=0, Thread4_thread1_~arg.offset=0, Thread5_thread2_thidvar0=1, Thread5_thread2_~arg.base=0, Thread5_thread2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_thread3_#in~arg.base|=0, |Thread0_thread3_#in~arg.offset|=0, |Thread1_thread2_#in~arg.base|=0, |Thread1_thread2_#in~arg.offset|=0, |Thread2_thread0_#in~arg.base|=0, |Thread2_thread0_#in~arg.offset|=0, |Thread2_thread0_~#t1~0.base|=96, |Thread2_thread0_~#t1~0.offset|=0, |Thread2_thread0_~#t2~0.base|=93, |Thread2_thread0_~#t2~0.offset|=0, |Thread2_thread0_~#t3~0.base|=90, |Thread2_thread0_~#t3~0.offset|=0, |Thread2_thread0_~#t4~0.base|=91, |Thread2_thread0_~#t4~0.offset|=0, |Thread2_thread0_~#t5~0.base|=95, |Thread2_thread0_~#t5~0.offset|=0, |Thread4_thread1_#in~arg.base|=0, |Thread4_thread1_#in~arg.offset|=0, |Thread4_thread1_#res.base|=0, |Thread4_thread1_#res.offset|=0, |Thread4_thread1_#t~malloc0.base|=92, |Thread4_thread1_#t~malloc0.offset|=0, |Thread5_thread2_#in~arg.base|=0, |Thread5_thread2_#in~arg.offset|=0, |Thread5_thread2_#res.base|=0, |Thread5_thread2_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] FORK 0 [261] L1237-1-->thread2ENTRY: Formula: (and (= 0 |v_Thread3_thread2_#in~arg.offset_5|) (= 0 |v_Thread3_thread2_#in~arg.base_5|) (= v_Thread3_thread2_thidvar0_4 4)) InVars {} OutVars{Thread3_thread2_#in~arg.offset=|v_Thread3_thread2_#in~arg.offset_5|, Thread3_thread2_thidvar0=v_Thread3_thread2_thidvar0_4, Thread3_thread2_#in~arg.base=|v_Thread3_thread2_#in~arg.base_5|} AuxVars[] AssignedVars[Thread3_thread2_#in~arg.offset, Thread3_thread2_thidvar0, Thread3_thread2_#in~arg.base] VAL [Thread0_thread3_thidvar0=2, Thread0_thread3_~arg.base=0, Thread0_thread3_~arg.offset=0, Thread1_thread2_thidvar0=3, Thread2_thread0_thidvar0=5, Thread2_thread0_~arg.base=0, Thread2_thread0_~arg.offset=0, Thread3_thread2_thidvar0=4, Thread4_thread1_thidvar0=0, Thread4_thread1_~arg.base=0, Thread4_thread1_~arg.offset=0, Thread5_thread2_thidvar0=1, Thread5_thread2_~arg.base=0, Thread5_thread2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_thread3_#in~arg.base|=0, |Thread0_thread3_#in~arg.offset|=0, |Thread1_thread2_#in~arg.base|=0, |Thread1_thread2_#in~arg.offset|=0, |Thread2_thread0_#in~arg.base|=0, |Thread2_thread0_#in~arg.offset|=0, |Thread2_thread0_~#t1~0.base|=96, |Thread2_thread0_~#t1~0.offset|=0, |Thread2_thread0_~#t2~0.base|=93, |Thread2_thread0_~#t2~0.offset|=0, |Thread2_thread0_~#t3~0.base|=90, |Thread2_thread0_~#t3~0.offset|=0, |Thread2_thread0_~#t4~0.base|=91, |Thread2_thread0_~#t4~0.offset|=0, |Thread2_thread0_~#t5~0.base|=95, |Thread2_thread0_~#t5~0.offset|=0, |Thread3_thread2_#in~arg.base|=0, |Thread3_thread2_#in~arg.offset|=0, |Thread4_thread1_#in~arg.base|=0, |Thread4_thread1_#in~arg.offset|=0, |Thread4_thread1_#res.base|=0, |Thread4_thread1_#res.offset|=0, |Thread4_thread1_#t~malloc0.base|=92, |Thread4_thread1_#t~malloc0.offset|=0, |Thread5_thread2_#in~arg.base|=0, |Thread5_thread2_#in~arg.offset|=0, |Thread5_thread2_#res.base|=0, |Thread5_thread2_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 4 [235] thread2ENTRY-->L1221: Formula: (and (= v_Thread3_thread2_~arg.base_1 |v_Thread3_thread2_#in~arg.base_1|) (= v_Thread3_thread2_~arg.offset_1 |v_Thread3_thread2_#in~arg.offset_1|)) InVars {Thread3_thread2_#in~arg.offset=|v_Thread3_thread2_#in~arg.offset_1|, Thread3_thread2_#in~arg.base=|v_Thread3_thread2_#in~arg.base_1|} OutVars{Thread3_thread2_#in~arg.offset=|v_Thread3_thread2_#in~arg.offset_1|, Thread3_thread2_~arg.base=v_Thread3_thread2_~arg.base_1, Thread3_thread2_~arg.offset=v_Thread3_thread2_~arg.offset_1, Thread3_thread2_#in~arg.base=|v_Thread3_thread2_#in~arg.base_1|} AuxVars[] AssignedVars[Thread3_thread2_~arg.offset, Thread3_thread2_~arg.base] VAL [Thread0_thread3_thidvar0=2, Thread0_thread3_~arg.base=0, Thread0_thread3_~arg.offset=0, Thread1_thread2_thidvar0=3, Thread2_thread0_thidvar0=5, Thread2_thread0_~arg.base=0, Thread2_thread0_~arg.offset=0, Thread3_thread2_thidvar0=4, Thread3_thread2_~arg.base=0, Thread3_thread2_~arg.offset=0, Thread4_thread1_thidvar0=0, Thread4_thread1_~arg.base=0, Thread4_thread1_~arg.offset=0, Thread5_thread2_thidvar0=1, Thread5_thread2_~arg.base=0, Thread5_thread2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_thread3_#in~arg.base|=0, |Thread0_thread3_#in~arg.offset|=0, |Thread1_thread2_#in~arg.base|=0, |Thread1_thread2_#in~arg.offset|=0, |Thread2_thread0_#in~arg.base|=0, |Thread2_thread0_#in~arg.offset|=0, |Thread2_thread0_~#t1~0.base|=96, |Thread2_thread0_~#t1~0.offset|=0, |Thread2_thread0_~#t2~0.base|=93, |Thread2_thread0_~#t2~0.offset|=0, |Thread2_thread0_~#t3~0.base|=90, |Thread2_thread0_~#t3~0.offset|=0, |Thread2_thread0_~#t4~0.base|=91, |Thread2_thread0_~#t4~0.offset|=0, |Thread2_thread0_~#t5~0.base|=95, |Thread2_thread0_~#t5~0.offset|=0, |Thread3_thread2_#in~arg.base|=0, |Thread3_thread2_#in~arg.offset|=0, |Thread4_thread1_#in~arg.base|=0, |Thread4_thread1_#in~arg.offset|=0, |Thread4_thread1_#res.base|=0, |Thread4_thread1_#res.offset|=0, |Thread4_thread1_#t~malloc0.base|=92, |Thread4_thread1_#t~malloc0.offset|=0, |Thread5_thread2_#in~arg.base|=0, |Thread5_thread2_#in~arg.offset|=0, |Thread5_thread2_#res.base|=0, |Thread5_thread2_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 4 [236] L1221-->L1221-1: Formula: (= |v_#memory_int_16| (store |v_#memory_int_17| v_~v~0.base_2 (store (select |v_#memory_int_17| v_~v~0.base_2) v_~v~0.offset_2 88))) InVars {#memory_int=|v_#memory_int_17|, ~v~0.offset=v_~v~0.offset_2, ~v~0.base=v_~v~0.base_2} OutVars{#memory_int=|v_#memory_int_16|, ~v~0.offset=v_~v~0.offset_2, ~v~0.base=v_~v~0.base_2} AuxVars[] AssignedVars[#memory_int] VAL [Thread0_thread3_thidvar0=2, Thread0_thread3_~arg.base=0, Thread0_thread3_~arg.offset=0, Thread1_thread2_thidvar0=3, Thread2_thread0_thidvar0=5, Thread2_thread0_~arg.base=0, Thread2_thread0_~arg.offset=0, Thread3_thread2_thidvar0=4, Thread3_thread2_~arg.base=0, Thread3_thread2_~arg.offset=0, Thread4_thread1_thidvar0=0, Thread4_thread1_~arg.base=0, Thread4_thread1_~arg.offset=0, Thread5_thread2_thidvar0=1, Thread5_thread2_~arg.base=0, Thread5_thread2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_thread3_#in~arg.base|=0, |Thread0_thread3_#in~arg.offset|=0, |Thread1_thread2_#in~arg.base|=0, |Thread1_thread2_#in~arg.offset|=0, |Thread2_thread0_#in~arg.base|=0, |Thread2_thread0_#in~arg.offset|=0, |Thread2_thread0_~#t1~0.base|=96, |Thread2_thread0_~#t1~0.offset|=0, |Thread2_thread0_~#t2~0.base|=93, |Thread2_thread0_~#t2~0.offset|=0, |Thread2_thread0_~#t3~0.base|=90, |Thread2_thread0_~#t3~0.offset|=0, |Thread2_thread0_~#t4~0.base|=91, |Thread2_thread0_~#t4~0.offset|=0, |Thread2_thread0_~#t5~0.base|=95, |Thread2_thread0_~#t5~0.offset|=0, |Thread3_thread2_#in~arg.base|=0, |Thread3_thread2_#in~arg.offset|=0, |Thread4_thread1_#in~arg.base|=0, |Thread4_thread1_#in~arg.offset|=0, |Thread4_thread1_#res.base|=0, |Thread4_thread1_#res.offset|=0, |Thread4_thread1_#t~malloc0.base|=92, |Thread4_thread1_#t~malloc0.offset|=0, |Thread5_thread2_#in~arg.base|=0, |Thread5_thread2_#in~arg.offset|=0, |Thread5_thread2_#res.base|=0, |Thread5_thread2_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 4 [237] L1221-1-->thread2FINAL: Formula: (and (= |v_Thread3_thread2_#res.base_1| 0) (= |v_Thread3_thread2_#res.offset_1| 0)) InVars {} OutVars{Thread3_thread2_#res.offset=|v_Thread3_thread2_#res.offset_1|, Thread3_thread2_#res.base=|v_Thread3_thread2_#res.base_1|} AuxVars[] AssignedVars[Thread3_thread2_#res.base, Thread3_thread2_#res.offset] VAL [Thread0_thread3_thidvar0=2, Thread0_thread3_~arg.base=0, Thread0_thread3_~arg.offset=0, Thread1_thread2_thidvar0=3, Thread2_thread0_thidvar0=5, Thread2_thread0_~arg.base=0, Thread2_thread0_~arg.offset=0, Thread3_thread2_thidvar0=4, Thread3_thread2_~arg.base=0, Thread3_thread2_~arg.offset=0, Thread4_thread1_thidvar0=0, Thread4_thread1_~arg.base=0, Thread4_thread1_~arg.offset=0, Thread5_thread2_thidvar0=1, Thread5_thread2_~arg.base=0, Thread5_thread2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_thread3_#in~arg.base|=0, |Thread0_thread3_#in~arg.offset|=0, |Thread1_thread2_#in~arg.base|=0, |Thread1_thread2_#in~arg.offset|=0, |Thread2_thread0_#in~arg.base|=0, |Thread2_thread0_#in~arg.offset|=0, |Thread2_thread0_~#t1~0.base|=96, |Thread2_thread0_~#t1~0.offset|=0, |Thread2_thread0_~#t2~0.base|=93, |Thread2_thread0_~#t2~0.offset|=0, |Thread2_thread0_~#t3~0.base|=90, |Thread2_thread0_~#t3~0.offset|=0, |Thread2_thread0_~#t4~0.base|=91, |Thread2_thread0_~#t4~0.offset|=0, |Thread2_thread0_~#t5~0.base|=95, |Thread2_thread0_~#t5~0.offset|=0, |Thread3_thread2_#in~arg.base|=0, |Thread3_thread2_#in~arg.offset|=0, |Thread3_thread2_#res.base|=0, |Thread3_thread2_#res.offset|=0, |Thread4_thread1_#in~arg.base|=0, |Thread4_thread1_#in~arg.offset|=0, |Thread4_thread1_#res.base|=0, |Thread4_thread1_#res.offset|=0, |Thread4_thread1_#t~malloc0.base|=92, |Thread4_thread1_#t~malloc0.offset|=0, |Thread5_thread2_#in~arg.base|=0, |Thread5_thread2_#in~arg.offset|=0, |Thread5_thread2_#res.base|=0, |Thread5_thread2_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 [205] L1237-2-->L1238: Formula: true InVars {} OutVars{Thread2_thread0_#t~nondet6=|v_Thread2_thread0_#t~nondet6_1|} AuxVars[] AssignedVars[Thread2_thread0_#t~nondet6] VAL [Thread0_thread3_thidvar0=2, Thread0_thread3_~arg.base=0, Thread0_thread3_~arg.offset=0, Thread1_thread2_thidvar0=3, Thread2_thread0_thidvar0=5, Thread2_thread0_~arg.base=0, Thread2_thread0_~arg.offset=0, Thread3_thread2_thidvar0=4, Thread3_thread2_~arg.base=0, Thread3_thread2_~arg.offset=0, Thread4_thread1_thidvar0=0, Thread4_thread1_~arg.base=0, Thread4_thread1_~arg.offset=0, Thread5_thread2_thidvar0=1, Thread5_thread2_~arg.base=0, Thread5_thread2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_thread3_#in~arg.base|=0, |Thread0_thread3_#in~arg.offset|=0, |Thread1_thread2_#in~arg.base|=0, |Thread1_thread2_#in~arg.offset|=0, |Thread2_thread0_#in~arg.base|=0, |Thread2_thread0_#in~arg.offset|=0, |Thread2_thread0_~#t1~0.base|=96, |Thread2_thread0_~#t1~0.offset|=0, |Thread2_thread0_~#t2~0.base|=93, |Thread2_thread0_~#t2~0.offset|=0, |Thread2_thread0_~#t3~0.base|=90, |Thread2_thread0_~#t3~0.offset|=0, |Thread2_thread0_~#t4~0.base|=91, |Thread2_thread0_~#t4~0.offset|=0, |Thread2_thread0_~#t5~0.base|=95, |Thread2_thread0_~#t5~0.offset|=0, |Thread3_thread2_#in~arg.base|=0, |Thread3_thread2_#in~arg.offset|=0, |Thread3_thread2_#res.base|=0, |Thread3_thread2_#res.offset|=0, |Thread4_thread1_#in~arg.base|=0, |Thread4_thread1_#in~arg.offset|=0, |Thread4_thread1_#res.base|=0, |Thread4_thread1_#res.offset|=0, |Thread4_thread1_#t~malloc0.base|=92, |Thread4_thread1_#t~malloc0.offset|=0, |Thread5_thread2_#in~arg.base|=0, |Thread5_thread2_#in~arg.offset|=0, |Thread5_thread2_#res.base|=0, |Thread5_thread2_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 [206] L1238-->L1238-1: Formula: (= (select (select |v_#memory_int_12| |v_Thread2_thread0_~#t2~0.base_3|) |v_Thread2_thread0_~#t2~0.offset_3|) |v_Thread2_thread0_#t~mem7_1|) InVars {#memory_int=|v_#memory_int_12|, Thread2_thread0_~#t2~0.offset=|v_Thread2_thread0_~#t2~0.offset_3|, Thread2_thread0_~#t2~0.base=|v_Thread2_thread0_~#t2~0.base_3|} OutVars{#memory_int=|v_#memory_int_12|, Thread2_thread0_#t~mem7=|v_Thread2_thread0_#t~mem7_1|, Thread2_thread0_~#t2~0.offset=|v_Thread2_thread0_~#t2~0.offset_3|, Thread2_thread0_~#t2~0.base=|v_Thread2_thread0_~#t2~0.base_3|} AuxVars[] AssignedVars[Thread2_thread0_#t~mem7] VAL [Thread0_thread3_thidvar0=2, Thread0_thread3_~arg.base=0, Thread0_thread3_~arg.offset=0, Thread1_thread2_thidvar0=3, Thread2_thread0_thidvar0=5, Thread2_thread0_~arg.base=0, Thread2_thread0_~arg.offset=0, Thread3_thread2_thidvar0=4, Thread3_thread2_~arg.base=0, Thread3_thread2_~arg.offset=0, Thread4_thread1_thidvar0=0, Thread4_thread1_~arg.base=0, Thread4_thread1_~arg.offset=0, Thread5_thread2_thidvar0=1, Thread5_thread2_~arg.base=0, Thread5_thread2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_thread3_#in~arg.base|=0, |Thread0_thread3_#in~arg.offset|=0, |Thread1_thread2_#in~arg.base|=0, |Thread1_thread2_#in~arg.offset|=0, |Thread2_thread0_#in~arg.base|=0, |Thread2_thread0_#in~arg.offset|=0, |Thread2_thread0_#t~mem7|=1, |Thread2_thread0_~#t1~0.base|=96, |Thread2_thread0_~#t1~0.offset|=0, |Thread2_thread0_~#t2~0.base|=93, |Thread2_thread0_~#t2~0.offset|=0, |Thread2_thread0_~#t3~0.base|=90, |Thread2_thread0_~#t3~0.offset|=0, |Thread2_thread0_~#t4~0.base|=91, |Thread2_thread0_~#t4~0.offset|=0, |Thread2_thread0_~#t5~0.base|=95, |Thread2_thread0_~#t5~0.offset|=0, |Thread3_thread2_#in~arg.base|=0, |Thread3_thread2_#in~arg.offset|=0, |Thread3_thread2_#res.base|=0, |Thread3_thread2_#res.offset|=0, |Thread4_thread1_#in~arg.base|=0, |Thread4_thread1_#in~arg.offset|=0, |Thread4_thread1_#res.base|=0, |Thread4_thread1_#res.offset|=0, |Thread4_thread1_#t~malloc0.base|=92, |Thread4_thread1_#t~malloc0.offset|=0, |Thread5_thread2_#in~arg.base|=0, |Thread5_thread2_#in~arg.offset|=0, |Thread5_thread2_#res.base|=0, |Thread5_thread2_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] JOIN 2 [340] thread2EXIT-->L1238-2: Formula: (= |v_Thread2_thread0_#t~mem7_6| v_Thread5_thread2_thidvar0_34) InVars {Thread5_thread2_thidvar0=v_Thread5_thread2_thidvar0_34, Thread2_thread0_#t~mem7=|v_Thread2_thread0_#t~mem7_6|} OutVars{Thread5_thread2_thidvar0=v_Thread5_thread2_thidvar0_34, Thread2_thread0_#t~mem7=|v_Thread2_thread0_#t~mem7_6|} AuxVars[] AssignedVars[] VAL [Thread0_thread3_thidvar0=2, Thread0_thread3_~arg.base=0, Thread0_thread3_~arg.offset=0, Thread1_thread2_thidvar0=3, Thread2_thread0_thidvar0=5, Thread2_thread0_~arg.base=0, Thread2_thread0_~arg.offset=0, Thread3_thread2_thidvar0=4, Thread3_thread2_~arg.base=0, Thread3_thread2_~arg.offset=0, Thread4_thread1_thidvar0=0, Thread4_thread1_~arg.base=0, Thread4_thread1_~arg.offset=0, Thread5_thread2_thidvar0=1, Thread5_thread2_~arg.base=0, Thread5_thread2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_thread3_#in~arg.base|=0, |Thread0_thread3_#in~arg.offset|=0, |Thread1_thread2_#in~arg.base|=0, |Thread1_thread2_#in~arg.offset|=0, |Thread2_thread0_#in~arg.base|=0, |Thread2_thread0_#in~arg.offset|=0, |Thread2_thread0_#t~mem7|=1, |Thread2_thread0_~#t1~0.base|=96, |Thread2_thread0_~#t1~0.offset|=0, |Thread2_thread0_~#t2~0.base|=93, |Thread2_thread0_~#t2~0.offset|=0, |Thread2_thread0_~#t3~0.base|=90, |Thread2_thread0_~#t3~0.offset|=0, |Thread2_thread0_~#t4~0.base|=91, |Thread2_thread0_~#t4~0.offset|=0, |Thread2_thread0_~#t5~0.base|=95, |Thread2_thread0_~#t5~0.offset|=0, |Thread3_thread2_#in~arg.base|=0, |Thread3_thread2_#in~arg.offset|=0, |Thread3_thread2_#res.base|=0, |Thread3_thread2_#res.offset|=0, |Thread4_thread1_#in~arg.base|=0, |Thread4_thread1_#in~arg.offset|=0, |Thread4_thread1_#res.base|=0, |Thread4_thread1_#res.offset|=0, |Thread4_thread1_#t~malloc0.base|=92, |Thread4_thread1_#t~malloc0.offset|=0, |Thread5_thread2_#in~arg.base|=0, |Thread5_thread2_#in~arg.offset|=0, |Thread5_thread2_#res.base|=0, |Thread5_thread2_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 [208] L1238-2-->L1239: Formula: true InVars {} OutVars{Thread2_thread0_#t~mem7=|v_Thread2_thread0_#t~mem7_2|} AuxVars[] AssignedVars[Thread2_thread0_#t~mem7] VAL [Thread0_thread3_thidvar0=2, Thread0_thread3_~arg.base=0, Thread0_thread3_~arg.offset=0, Thread1_thread2_thidvar0=3, Thread2_thread0_thidvar0=5, Thread2_thread0_~arg.base=0, Thread2_thread0_~arg.offset=0, Thread3_thread2_thidvar0=4, Thread3_thread2_~arg.base=0, Thread3_thread2_~arg.offset=0, Thread4_thread1_thidvar0=0, Thread4_thread1_~arg.base=0, Thread4_thread1_~arg.offset=0, Thread5_thread2_thidvar0=1, Thread5_thread2_~arg.base=0, Thread5_thread2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_thread3_#in~arg.base|=0, |Thread0_thread3_#in~arg.offset|=0, |Thread1_thread2_#in~arg.base|=0, |Thread1_thread2_#in~arg.offset|=0, |Thread2_thread0_#in~arg.base|=0, |Thread2_thread0_#in~arg.offset|=0, |Thread2_thread0_~#t1~0.base|=96, |Thread2_thread0_~#t1~0.offset|=0, |Thread2_thread0_~#t2~0.base|=93, |Thread2_thread0_~#t2~0.offset|=0, |Thread2_thread0_~#t3~0.base|=90, |Thread2_thread0_~#t3~0.offset|=0, |Thread2_thread0_~#t4~0.base|=91, |Thread2_thread0_~#t4~0.offset|=0, |Thread2_thread0_~#t5~0.base|=95, |Thread2_thread0_~#t5~0.offset|=0, |Thread3_thread2_#in~arg.base|=0, |Thread3_thread2_#in~arg.offset|=0, |Thread3_thread2_#res.base|=0, |Thread3_thread2_#res.offset|=0, |Thread4_thread1_#in~arg.base|=0, |Thread4_thread1_#in~arg.offset|=0, |Thread4_thread1_#res.base|=0, |Thread4_thread1_#res.offset|=0, |Thread4_thread1_#t~malloc0.base|=92, |Thread4_thread1_#t~malloc0.offset|=0, |Thread5_thread2_#in~arg.base|=0, |Thread5_thread2_#in~arg.offset|=0, |Thread5_thread2_#res.base|=0, |Thread5_thread2_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 [209] L1239-->L1239-1: Formula: (= |v_Thread2_thread0_#t~mem8_1| (select (select |v_#memory_int_13| |v_Thread2_thread0_~#t3~0.base_3|) |v_Thread2_thread0_~#t3~0.offset_3|)) InVars {Thread2_thread0_~#t3~0.offset=|v_Thread2_thread0_~#t3~0.offset_3|, #memory_int=|v_#memory_int_13|, Thread2_thread0_~#t3~0.base=|v_Thread2_thread0_~#t3~0.base_3|} OutVars{Thread2_thread0_~#t3~0.offset=|v_Thread2_thread0_~#t3~0.offset_3|, #memory_int=|v_#memory_int_13|, Thread2_thread0_#t~mem8=|v_Thread2_thread0_#t~mem8_1|, Thread2_thread0_~#t3~0.base=|v_Thread2_thread0_~#t3~0.base_3|} AuxVars[] AssignedVars[Thread2_thread0_#t~mem8] VAL [Thread0_thread3_thidvar0=2, Thread0_thread3_~arg.base=0, Thread0_thread3_~arg.offset=0, Thread1_thread2_thidvar0=3, Thread2_thread0_thidvar0=5, Thread2_thread0_~arg.base=0, Thread2_thread0_~arg.offset=0, Thread3_thread2_thidvar0=4, Thread3_thread2_~arg.base=0, Thread3_thread2_~arg.offset=0, Thread4_thread1_thidvar0=0, Thread4_thread1_~arg.base=0, Thread4_thread1_~arg.offset=0, Thread5_thread2_thidvar0=1, Thread5_thread2_~arg.base=0, Thread5_thread2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_thread3_#in~arg.base|=0, |Thread0_thread3_#in~arg.offset|=0, |Thread1_thread2_#in~arg.base|=0, |Thread1_thread2_#in~arg.offset|=0, |Thread2_thread0_#in~arg.base|=0, |Thread2_thread0_#in~arg.offset|=0, |Thread2_thread0_#t~mem8|=2, |Thread2_thread0_~#t1~0.base|=96, |Thread2_thread0_~#t1~0.offset|=0, |Thread2_thread0_~#t2~0.base|=93, |Thread2_thread0_~#t2~0.offset|=0, |Thread2_thread0_~#t3~0.base|=90, |Thread2_thread0_~#t3~0.offset|=0, |Thread2_thread0_~#t4~0.base|=91, |Thread2_thread0_~#t4~0.offset|=0, |Thread2_thread0_~#t5~0.base|=95, |Thread2_thread0_~#t5~0.offset|=0, |Thread3_thread2_#in~arg.base|=0, |Thread3_thread2_#in~arg.offset|=0, |Thread3_thread2_#res.base|=0, |Thread3_thread2_#res.offset|=0, |Thread4_thread1_#in~arg.base|=0, |Thread4_thread1_#in~arg.offset|=0, |Thread4_thread1_#res.base|=0, |Thread4_thread1_#res.offset|=0, |Thread4_thread1_#t~malloc0.base|=92, |Thread4_thread1_#t~malloc0.offset|=0, |Thread5_thread2_#in~arg.base|=0, |Thread5_thread2_#in~arg.offset|=0, |Thread5_thread2_#res.base|=0, |Thread5_thread2_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 4 [238] thread2FINAL-->thread2EXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] VAL [Thread0_thread3_thidvar0=2, Thread0_thread3_~arg.base=0, Thread0_thread3_~arg.offset=0, Thread1_thread2_thidvar0=3, Thread2_thread0_thidvar0=5, Thread2_thread0_~arg.base=0, Thread2_thread0_~arg.offset=0, Thread3_thread2_thidvar0=4, Thread3_thread2_~arg.base=0, Thread3_thread2_~arg.offset=0, Thread4_thread1_thidvar0=0, Thread4_thread1_~arg.base=0, Thread4_thread1_~arg.offset=0, Thread5_thread2_thidvar0=1, Thread5_thread2_~arg.base=0, Thread5_thread2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_thread3_#in~arg.base|=0, |Thread0_thread3_#in~arg.offset|=0, |Thread1_thread2_#in~arg.base|=0, |Thread1_thread2_#in~arg.offset|=0, |Thread2_thread0_#in~arg.base|=0, |Thread2_thread0_#in~arg.offset|=0, |Thread2_thread0_#t~mem8|=2, |Thread2_thread0_~#t1~0.base|=96, |Thread2_thread0_~#t1~0.offset|=0, |Thread2_thread0_~#t2~0.base|=93, |Thread2_thread0_~#t2~0.offset|=0, |Thread2_thread0_~#t3~0.base|=90, |Thread2_thread0_~#t3~0.offset|=0, |Thread2_thread0_~#t4~0.base|=91, |Thread2_thread0_~#t4~0.offset|=0, |Thread2_thread0_~#t5~0.base|=95, |Thread2_thread0_~#t5~0.offset|=0, |Thread3_thread2_#in~arg.base|=0, |Thread3_thread2_#in~arg.offset|=0, |Thread3_thread2_#res.base|=0, |Thread3_thread2_#res.offset|=0, |Thread4_thread1_#in~arg.base|=0, |Thread4_thread1_#in~arg.offset|=0, |Thread4_thread1_#res.base|=0, |Thread4_thread1_#res.offset|=0, |Thread4_thread1_#t~malloc0.base|=92, |Thread4_thread1_#t~malloc0.offset|=0, |Thread5_thread2_#in~arg.base|=0, |Thread5_thread2_#in~arg.offset|=0, |Thread5_thread2_#res.base|=0, |Thread5_thread2_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 5 [239] thread2ENTRY-->L1221: Formula: (and (= v_Thread1_thread2_~arg.base_1 |v_Thread1_thread2_#in~arg.base_1|) (= v_Thread1_thread2_~arg.offset_1 |v_Thread1_thread2_#in~arg.offset_1|)) InVars {Thread1_thread2_#in~arg.base=|v_Thread1_thread2_#in~arg.base_1|, Thread1_thread2_#in~arg.offset=|v_Thread1_thread2_#in~arg.offset_1|} OutVars{Thread1_thread2_~arg.offset=v_Thread1_thread2_~arg.offset_1, Thread1_thread2_#in~arg.base=|v_Thread1_thread2_#in~arg.base_1|, Thread1_thread2_~arg.base=v_Thread1_thread2_~arg.base_1, Thread1_thread2_#in~arg.offset=|v_Thread1_thread2_#in~arg.offset_1|} AuxVars[] AssignedVars[Thread1_thread2_~arg.offset, Thread1_thread2_~arg.base] VAL [Thread0_thread3_thidvar0=2, Thread0_thread3_~arg.base=0, Thread0_thread3_~arg.offset=0, Thread1_thread2_thidvar0=3, Thread1_thread2_~arg.base=0, Thread1_thread2_~arg.offset=0, Thread2_thread0_thidvar0=5, Thread2_thread0_~arg.base=0, Thread2_thread0_~arg.offset=0, Thread3_thread2_thidvar0=4, Thread3_thread2_~arg.base=0, Thread3_thread2_~arg.offset=0, Thread4_thread1_thidvar0=0, Thread4_thread1_~arg.base=0, Thread4_thread1_~arg.offset=0, Thread5_thread2_thidvar0=1, Thread5_thread2_~arg.base=0, Thread5_thread2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_thread3_#in~arg.base|=0, |Thread0_thread3_#in~arg.offset|=0, |Thread1_thread2_#in~arg.base|=0, |Thread1_thread2_#in~arg.offset|=0, |Thread2_thread0_#in~arg.base|=0, |Thread2_thread0_#in~arg.offset|=0, |Thread2_thread0_#t~mem8|=2, |Thread2_thread0_~#t1~0.base|=96, |Thread2_thread0_~#t1~0.offset|=0, |Thread2_thread0_~#t2~0.base|=93, |Thread2_thread0_~#t2~0.offset|=0, |Thread2_thread0_~#t3~0.base|=90, |Thread2_thread0_~#t3~0.offset|=0, |Thread2_thread0_~#t4~0.base|=91, |Thread2_thread0_~#t4~0.offset|=0, |Thread2_thread0_~#t5~0.base|=95, |Thread2_thread0_~#t5~0.offset|=0, |Thread3_thread2_#in~arg.base|=0, |Thread3_thread2_#in~arg.offset|=0, |Thread3_thread2_#res.base|=0, |Thread3_thread2_#res.offset|=0, |Thread4_thread1_#in~arg.base|=0, |Thread4_thread1_#in~arg.offset|=0, |Thread4_thread1_#res.base|=0, |Thread4_thread1_#res.offset|=0, |Thread4_thread1_#t~malloc0.base|=92, |Thread4_thread1_#t~malloc0.offset|=0, |Thread5_thread2_#in~arg.base|=0, |Thread5_thread2_#in~arg.offset|=0, |Thread5_thread2_#res.base|=0, |Thread5_thread2_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 5 [240] L1221-->L1221-1: Formula: (= |v_#memory_int_16| (store |v_#memory_int_17| v_~v~0.base_2 (store (select |v_#memory_int_17| v_~v~0.base_2) v_~v~0.offset_2 88))) InVars {#memory_int=|v_#memory_int_17|, ~v~0.offset=v_~v~0.offset_2, ~v~0.base=v_~v~0.base_2} OutVars{#memory_int=|v_#memory_int_16|, ~v~0.offset=v_~v~0.offset_2, ~v~0.base=v_~v~0.base_2} AuxVars[] AssignedVars[#memory_int] VAL [Thread0_thread3_thidvar0=2, Thread0_thread3_~arg.base=0, Thread0_thread3_~arg.offset=0, Thread1_thread2_thidvar0=3, Thread1_thread2_~arg.base=0, Thread1_thread2_~arg.offset=0, Thread2_thread0_thidvar0=5, Thread2_thread0_~arg.base=0, Thread2_thread0_~arg.offset=0, Thread3_thread2_thidvar0=4, Thread3_thread2_~arg.base=0, Thread3_thread2_~arg.offset=0, Thread4_thread1_thidvar0=0, Thread4_thread1_~arg.base=0, Thread4_thread1_~arg.offset=0, Thread5_thread2_thidvar0=1, Thread5_thread2_~arg.base=0, Thread5_thread2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_thread3_#in~arg.base|=0, |Thread0_thread3_#in~arg.offset|=0, |Thread1_thread2_#in~arg.base|=0, |Thread1_thread2_#in~arg.offset|=0, |Thread2_thread0_#in~arg.base|=0, |Thread2_thread0_#in~arg.offset|=0, |Thread2_thread0_#t~mem8|=2, |Thread2_thread0_~#t1~0.base|=96, |Thread2_thread0_~#t1~0.offset|=0, |Thread2_thread0_~#t2~0.base|=93, |Thread2_thread0_~#t2~0.offset|=0, |Thread2_thread0_~#t3~0.base|=90, |Thread2_thread0_~#t3~0.offset|=0, |Thread2_thread0_~#t4~0.base|=91, |Thread2_thread0_~#t4~0.offset|=0, |Thread2_thread0_~#t5~0.base|=95, |Thread2_thread0_~#t5~0.offset|=0, |Thread3_thread2_#in~arg.base|=0, |Thread3_thread2_#in~arg.offset|=0, |Thread3_thread2_#res.base|=0, |Thread3_thread2_#res.offset|=0, |Thread4_thread1_#in~arg.base|=0, |Thread4_thread1_#in~arg.offset|=0, |Thread4_thread1_#res.base|=0, |Thread4_thread1_#res.offset|=0, |Thread4_thread1_#t~malloc0.base|=92, |Thread4_thread1_#t~malloc0.offset|=0, |Thread5_thread2_#in~arg.base|=0, |Thread5_thread2_#in~arg.offset|=0, |Thread5_thread2_#res.base|=0, |Thread5_thread2_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 5 [241] L1221-1-->thread2FINAL: Formula: (and (= |v_Thread1_thread2_#res.base_1| 0) (= |v_Thread1_thread2_#res.offset_1| 0)) InVars {} OutVars{Thread1_thread2_#res.base=|v_Thread1_thread2_#res.base_1|, Thread1_thread2_#res.offset=|v_Thread1_thread2_#res.offset_1|} AuxVars[] AssignedVars[Thread1_thread2_#res.offset, Thread1_thread2_#res.base] VAL [Thread0_thread3_thidvar0=2, Thread0_thread3_~arg.base=0, Thread0_thread3_~arg.offset=0, Thread1_thread2_thidvar0=3, Thread1_thread2_~arg.base=0, Thread1_thread2_~arg.offset=0, Thread2_thread0_thidvar0=5, Thread2_thread0_~arg.base=0, Thread2_thread0_~arg.offset=0, Thread3_thread2_thidvar0=4, Thread3_thread2_~arg.base=0, Thread3_thread2_~arg.offset=0, Thread4_thread1_thidvar0=0, Thread4_thread1_~arg.base=0, Thread4_thread1_~arg.offset=0, Thread5_thread2_thidvar0=1, Thread5_thread2_~arg.base=0, Thread5_thread2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_thread3_#in~arg.base|=0, |Thread0_thread3_#in~arg.offset|=0, |Thread1_thread2_#in~arg.base|=0, |Thread1_thread2_#in~arg.offset|=0, |Thread1_thread2_#res.base|=0, |Thread1_thread2_#res.offset|=0, |Thread2_thread0_#in~arg.base|=0, |Thread2_thread0_#in~arg.offset|=0, |Thread2_thread0_#t~mem8|=2, |Thread2_thread0_~#t1~0.base|=96, |Thread2_thread0_~#t1~0.offset|=0, |Thread2_thread0_~#t2~0.base|=93, |Thread2_thread0_~#t2~0.offset|=0, |Thread2_thread0_~#t3~0.base|=90, |Thread2_thread0_~#t3~0.offset|=0, |Thread2_thread0_~#t4~0.base|=91, |Thread2_thread0_~#t4~0.offset|=0, |Thread2_thread0_~#t5~0.base|=95, |Thread2_thread0_~#t5~0.offset|=0, |Thread3_thread2_#in~arg.base|=0, |Thread3_thread2_#in~arg.offset|=0, |Thread3_thread2_#res.base|=0, |Thread3_thread2_#res.offset|=0, |Thread4_thread1_#in~arg.base|=0, |Thread4_thread1_#in~arg.offset|=0, |Thread4_thread1_#res.base|=0, |Thread4_thread1_#res.offset|=0, |Thread4_thread1_#t~malloc0.base|=92, |Thread4_thread1_#t~malloc0.offset|=0, |Thread5_thread2_#in~arg.base|=0, |Thread5_thread2_#in~arg.offset|=0, |Thread5_thread2_#res.base|=0, |Thread5_thread2_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 5 [242] thread2FINAL-->thread2EXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] VAL [Thread0_thread3_thidvar0=2, Thread0_thread3_~arg.base=0, Thread0_thread3_~arg.offset=0, Thread1_thread2_thidvar0=3, Thread1_thread2_~arg.base=0, Thread1_thread2_~arg.offset=0, Thread2_thread0_thidvar0=5, Thread2_thread0_~arg.base=0, Thread2_thread0_~arg.offset=0, Thread3_thread2_thidvar0=4, Thread3_thread2_~arg.base=0, Thread3_thread2_~arg.offset=0, Thread4_thread1_thidvar0=0, Thread4_thread1_~arg.base=0, Thread4_thread1_~arg.offset=0, Thread5_thread2_thidvar0=1, Thread5_thread2_~arg.base=0, Thread5_thread2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_thread3_#in~arg.base|=0, |Thread0_thread3_#in~arg.offset|=0, |Thread1_thread2_#in~arg.base|=0, |Thread1_thread2_#in~arg.offset|=0, |Thread1_thread2_#res.base|=0, |Thread1_thread2_#res.offset|=0, |Thread2_thread0_#in~arg.base|=0, |Thread2_thread0_#in~arg.offset|=0, |Thread2_thread0_#t~mem8|=2, |Thread2_thread0_~#t1~0.base|=96, |Thread2_thread0_~#t1~0.offset|=0, |Thread2_thread0_~#t2~0.base|=93, |Thread2_thread0_~#t2~0.offset|=0, |Thread2_thread0_~#t3~0.base|=90, |Thread2_thread0_~#t3~0.offset|=0, |Thread2_thread0_~#t4~0.base|=91, |Thread2_thread0_~#t4~0.offset|=0, |Thread2_thread0_~#t5~0.base|=95, |Thread2_thread0_~#t5~0.offset|=0, |Thread3_thread2_#in~arg.base|=0, |Thread3_thread2_#in~arg.offset|=0, |Thread3_thread2_#res.base|=0, |Thread3_thread2_#res.offset|=0, |Thread4_thread1_#in~arg.base|=0, |Thread4_thread1_#in~arg.offset|=0, |Thread4_thread1_#res.base|=0, |Thread4_thread1_#res.offset|=0, |Thread4_thread1_#t~malloc0.base|=92, |Thread4_thread1_#t~malloc0.offset|=0, |Thread5_thread2_#in~arg.base|=0, |Thread5_thread2_#in~arg.offset|=0, |Thread5_thread2_#res.base|=0, |Thread5_thread2_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 3 [248] L1226-->L1226-1: Formula: (= (store |v_#memory_int_19| v_~v~0.base_3 (store (select |v_#memory_int_19| v_~v~0.base_3) v_~v~0.offset_3 89)) |v_#memory_int_18|) InVars {#memory_int=|v_#memory_int_19|, ~v~0.offset=v_~v~0.offset_3, ~v~0.base=v_~v~0.base_3} OutVars{#memory_int=|v_#memory_int_18|, ~v~0.offset=v_~v~0.offset_3, ~v~0.base=v_~v~0.base_3} AuxVars[] AssignedVars[#memory_int] VAL [Thread0_thread3_thidvar0=2, Thread0_thread3_~arg.base=0, Thread0_thread3_~arg.offset=0, Thread1_thread2_thidvar0=3, Thread1_thread2_~arg.base=0, Thread1_thread2_~arg.offset=0, Thread2_thread0_thidvar0=5, Thread2_thread0_~arg.base=0, Thread2_thread0_~arg.offset=0, Thread3_thread2_thidvar0=4, Thread3_thread2_~arg.base=0, Thread3_thread2_~arg.offset=0, Thread4_thread1_thidvar0=0, Thread4_thread1_~arg.base=0, Thread4_thread1_~arg.offset=0, Thread5_thread2_thidvar0=1, Thread5_thread2_~arg.base=0, Thread5_thread2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_thread3_#in~arg.base|=0, |Thread0_thread3_#in~arg.offset|=0, |Thread1_thread2_#in~arg.base|=0, |Thread1_thread2_#in~arg.offset|=0, |Thread1_thread2_#res.base|=0, |Thread1_thread2_#res.offset|=0, |Thread2_thread0_#in~arg.base|=0, |Thread2_thread0_#in~arg.offset|=0, |Thread2_thread0_#t~mem8|=2, |Thread2_thread0_~#t1~0.base|=96, |Thread2_thread0_~#t1~0.offset|=0, |Thread2_thread0_~#t2~0.base|=93, |Thread2_thread0_~#t2~0.offset|=0, |Thread2_thread0_~#t3~0.base|=90, |Thread2_thread0_~#t3~0.offset|=0, |Thread2_thread0_~#t4~0.base|=91, |Thread2_thread0_~#t4~0.offset|=0, |Thread2_thread0_~#t5~0.base|=95, |Thread2_thread0_~#t5~0.offset|=0, |Thread3_thread2_#in~arg.base|=0, |Thread3_thread2_#in~arg.offset|=0, |Thread3_thread2_#res.base|=0, |Thread3_thread2_#res.offset|=0, |Thread4_thread1_#in~arg.base|=0, |Thread4_thread1_#in~arg.offset|=0, |Thread4_thread1_#res.base|=0, |Thread4_thread1_#res.offset|=0, |Thread4_thread1_#t~malloc0.base|=92, |Thread4_thread1_#t~malloc0.offset|=0, |Thread5_thread2_#in~arg.base|=0, |Thread5_thread2_#in~arg.offset|=0, |Thread5_thread2_#res.base|=0, |Thread5_thread2_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 3 [249] L1226-1-->thread3FINAL: Formula: (and (= |v_Thread0_thread3_#res.offset_1| 0) (= |v_Thread0_thread3_#res.base_1| 0)) InVars {} OutVars{Thread0_thread3_#res.base=|v_Thread0_thread3_#res.base_1|, Thread0_thread3_#res.offset=|v_Thread0_thread3_#res.offset_1|} AuxVars[] AssignedVars[Thread0_thread3_#res.base, Thread0_thread3_#res.offset] VAL [Thread0_thread3_thidvar0=2, Thread0_thread3_~arg.base=0, Thread0_thread3_~arg.offset=0, Thread1_thread2_thidvar0=3, Thread1_thread2_~arg.base=0, Thread1_thread2_~arg.offset=0, Thread2_thread0_thidvar0=5, Thread2_thread0_~arg.base=0, Thread2_thread0_~arg.offset=0, Thread3_thread2_thidvar0=4, Thread3_thread2_~arg.base=0, Thread3_thread2_~arg.offset=0, Thread4_thread1_thidvar0=0, Thread4_thread1_~arg.base=0, Thread4_thread1_~arg.offset=0, Thread5_thread2_thidvar0=1, Thread5_thread2_~arg.base=0, Thread5_thread2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_thread3_#in~arg.base|=0, |Thread0_thread3_#in~arg.offset|=0, |Thread0_thread3_#res.base|=0, |Thread0_thread3_#res.offset|=0, |Thread1_thread2_#in~arg.base|=0, |Thread1_thread2_#in~arg.offset|=0, |Thread1_thread2_#res.base|=0, |Thread1_thread2_#res.offset|=0, |Thread2_thread0_#in~arg.base|=0, |Thread2_thread0_#in~arg.offset|=0, |Thread2_thread0_#t~mem8|=2, |Thread2_thread0_~#t1~0.base|=96, |Thread2_thread0_~#t1~0.offset|=0, |Thread2_thread0_~#t2~0.base|=93, |Thread2_thread0_~#t2~0.offset|=0, |Thread2_thread0_~#t3~0.base|=90, |Thread2_thread0_~#t3~0.offset|=0, |Thread2_thread0_~#t4~0.base|=91, |Thread2_thread0_~#t4~0.offset|=0, |Thread2_thread0_~#t5~0.base|=95, |Thread2_thread0_~#t5~0.offset|=0, |Thread3_thread2_#in~arg.base|=0, |Thread3_thread2_#in~arg.offset|=0, |Thread3_thread2_#res.base|=0, |Thread3_thread2_#res.offset|=0, |Thread4_thread1_#in~arg.base|=0, |Thread4_thread1_#in~arg.offset|=0, |Thread4_thread1_#res.base|=0, |Thread4_thread1_#res.offset|=0, |Thread4_thread1_#t~malloc0.base|=92, |Thread4_thread1_#t~malloc0.offset|=0, |Thread5_thread2_#in~arg.base|=0, |Thread5_thread2_#in~arg.offset|=0, |Thread5_thread2_#res.base|=0, |Thread5_thread2_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 3 [250] thread3FINAL-->thread3EXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] VAL [Thread0_thread3_thidvar0=2, Thread0_thread3_~arg.base=0, Thread0_thread3_~arg.offset=0, Thread1_thread2_thidvar0=3, Thread1_thread2_~arg.base=0, Thread1_thread2_~arg.offset=0, Thread2_thread0_thidvar0=5, Thread2_thread0_~arg.base=0, Thread2_thread0_~arg.offset=0, Thread3_thread2_thidvar0=4, Thread3_thread2_~arg.base=0, Thread3_thread2_~arg.offset=0, Thread4_thread1_thidvar0=0, Thread4_thread1_~arg.base=0, Thread4_thread1_~arg.offset=0, Thread5_thread2_thidvar0=1, Thread5_thread2_~arg.base=0, Thread5_thread2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_thread3_#in~arg.base|=0, |Thread0_thread3_#in~arg.offset|=0, |Thread0_thread3_#res.base|=0, |Thread0_thread3_#res.offset|=0, |Thread1_thread2_#in~arg.base|=0, |Thread1_thread2_#in~arg.offset|=0, |Thread1_thread2_#res.base|=0, |Thread1_thread2_#res.offset|=0, |Thread2_thread0_#in~arg.base|=0, |Thread2_thread0_#in~arg.offset|=0, |Thread2_thread0_#t~mem8|=2, |Thread2_thread0_~#t1~0.base|=96, |Thread2_thread0_~#t1~0.offset|=0, |Thread2_thread0_~#t2~0.base|=93, |Thread2_thread0_~#t2~0.offset|=0, |Thread2_thread0_~#t3~0.base|=90, |Thread2_thread0_~#t3~0.offset|=0, |Thread2_thread0_~#t4~0.base|=91, |Thread2_thread0_~#t4~0.offset|=0, |Thread2_thread0_~#t5~0.base|=95, |Thread2_thread0_~#t5~0.offset|=0, |Thread3_thread2_#in~arg.base|=0, |Thread3_thread2_#in~arg.offset|=0, |Thread3_thread2_#res.base|=0, |Thread3_thread2_#res.offset|=0, |Thread4_thread1_#in~arg.base|=0, |Thread4_thread1_#in~arg.offset|=0, |Thread4_thread1_#res.base|=0, |Thread4_thread1_#res.offset|=0, |Thread4_thread1_#t~malloc0.base|=92, |Thread4_thread1_#t~malloc0.offset|=0, |Thread5_thread2_#in~arg.base|=0, |Thread5_thread2_#in~arg.offset|=0, |Thread5_thread2_#res.base|=0, |Thread5_thread2_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] JOIN 3 [353] thread3EXIT-->L1239-2: Formula: (= |v_Thread2_thread0_#t~mem8_10| v_Thread0_thread3_thidvar0_38) InVars {Thread0_thread3_thidvar0=v_Thread0_thread3_thidvar0_38, Thread2_thread0_#t~mem8=|v_Thread2_thread0_#t~mem8_10|} OutVars{Thread0_thread3_thidvar0=v_Thread0_thread3_thidvar0_38, Thread2_thread0_#t~mem8=|v_Thread2_thread0_#t~mem8_10|} AuxVars[] AssignedVars[] VAL [Thread0_thread3_thidvar0=2, Thread0_thread3_~arg.base=0, Thread0_thread3_~arg.offset=0, Thread1_thread2_thidvar0=3, Thread1_thread2_~arg.base=0, Thread1_thread2_~arg.offset=0, Thread2_thread0_thidvar0=5, Thread2_thread0_~arg.base=0, Thread2_thread0_~arg.offset=0, Thread3_thread2_thidvar0=4, Thread3_thread2_~arg.base=0, Thread3_thread2_~arg.offset=0, Thread4_thread1_thidvar0=0, Thread4_thread1_~arg.base=0, Thread4_thread1_~arg.offset=0, Thread5_thread2_thidvar0=1, Thread5_thread2_~arg.base=0, Thread5_thread2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_thread3_#in~arg.base|=0, |Thread0_thread3_#in~arg.offset|=0, |Thread0_thread3_#res.base|=0, |Thread0_thread3_#res.offset|=0, |Thread1_thread2_#in~arg.base|=0, |Thread1_thread2_#in~arg.offset|=0, |Thread1_thread2_#res.base|=0, |Thread1_thread2_#res.offset|=0, |Thread2_thread0_#in~arg.base|=0, |Thread2_thread0_#in~arg.offset|=0, |Thread2_thread0_#t~mem8|=2, |Thread2_thread0_~#t1~0.base|=96, |Thread2_thread0_~#t1~0.offset|=0, |Thread2_thread0_~#t2~0.base|=93, |Thread2_thread0_~#t2~0.offset|=0, |Thread2_thread0_~#t3~0.base|=90, |Thread2_thread0_~#t3~0.offset|=0, |Thread2_thread0_~#t4~0.base|=91, |Thread2_thread0_~#t4~0.offset|=0, |Thread2_thread0_~#t5~0.base|=95, |Thread2_thread0_~#t5~0.offset|=0, |Thread3_thread2_#in~arg.base|=0, |Thread3_thread2_#in~arg.offset|=0, |Thread3_thread2_#res.base|=0, |Thread3_thread2_#res.offset|=0, |Thread4_thread1_#in~arg.base|=0, |Thread4_thread1_#in~arg.offset|=0, |Thread4_thread1_#res.base|=0, |Thread4_thread1_#res.offset|=0, |Thread4_thread1_#t~malloc0.base|=92, |Thread4_thread1_#t~malloc0.offset|=0, |Thread5_thread2_#in~arg.base|=0, |Thread5_thread2_#in~arg.offset|=0, |Thread5_thread2_#res.base|=0, |Thread5_thread2_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 [211] L1239-2-->L1240: Formula: true InVars {} OutVars{Thread2_thread0_#t~mem8=|v_Thread2_thread0_#t~mem8_2|} AuxVars[] AssignedVars[Thread2_thread0_#t~mem8] VAL [Thread0_thread3_thidvar0=2, Thread0_thread3_~arg.base=0, Thread0_thread3_~arg.offset=0, Thread1_thread2_thidvar0=3, Thread1_thread2_~arg.base=0, Thread1_thread2_~arg.offset=0, Thread2_thread0_thidvar0=5, Thread2_thread0_~arg.base=0, Thread2_thread0_~arg.offset=0, Thread3_thread2_thidvar0=4, Thread3_thread2_~arg.base=0, Thread3_thread2_~arg.offset=0, Thread4_thread1_thidvar0=0, Thread4_thread1_~arg.base=0, Thread4_thread1_~arg.offset=0, Thread5_thread2_thidvar0=1, Thread5_thread2_~arg.base=0, Thread5_thread2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_thread3_#in~arg.base|=0, |Thread0_thread3_#in~arg.offset|=0, |Thread0_thread3_#res.base|=0, |Thread0_thread3_#res.offset|=0, |Thread1_thread2_#in~arg.base|=0, |Thread1_thread2_#in~arg.offset|=0, |Thread1_thread2_#res.base|=0, |Thread1_thread2_#res.offset|=0, |Thread2_thread0_#in~arg.base|=0, |Thread2_thread0_#in~arg.offset|=0, |Thread2_thread0_~#t1~0.base|=96, |Thread2_thread0_~#t1~0.offset|=0, |Thread2_thread0_~#t2~0.base|=93, |Thread2_thread0_~#t2~0.offset|=0, |Thread2_thread0_~#t3~0.base|=90, |Thread2_thread0_~#t3~0.offset|=0, |Thread2_thread0_~#t4~0.base|=91, |Thread2_thread0_~#t4~0.offset|=0, |Thread2_thread0_~#t5~0.base|=95, |Thread2_thread0_~#t5~0.offset|=0, |Thread3_thread2_#in~arg.base|=0, |Thread3_thread2_#in~arg.offset|=0, |Thread3_thread2_#res.base|=0, |Thread3_thread2_#res.offset|=0, |Thread4_thread1_#in~arg.base|=0, |Thread4_thread1_#in~arg.offset|=0, |Thread4_thread1_#res.base|=0, |Thread4_thread1_#res.offset|=0, |Thread4_thread1_#t~malloc0.base|=92, |Thread4_thread1_#t~malloc0.offset|=0, |Thread5_thread2_#in~arg.base|=0, |Thread5_thread2_#in~arg.offset|=0, |Thread5_thread2_#res.base|=0, |Thread5_thread2_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 [212] L1240-->L1240-1: Formula: (= (select (select |v_#memory_int_14| |v_Thread2_thread0_~#t4~0.base_3|) |v_Thread2_thread0_~#t4~0.offset_3|) |v_Thread2_thread0_#t~mem9_1|) InVars {#memory_int=|v_#memory_int_14|, Thread2_thread0_~#t4~0.offset=|v_Thread2_thread0_~#t4~0.offset_3|, Thread2_thread0_~#t4~0.base=|v_Thread2_thread0_~#t4~0.base_3|} OutVars{#memory_int=|v_#memory_int_14|, Thread2_thread0_~#t4~0.offset=|v_Thread2_thread0_~#t4~0.offset_3|, Thread2_thread0_#t~mem9=|v_Thread2_thread0_#t~mem9_1|, Thread2_thread0_~#t4~0.base=|v_Thread2_thread0_~#t4~0.base_3|} AuxVars[] AssignedVars[Thread2_thread0_#t~mem9] VAL [Thread0_thread3_thidvar0=2, Thread0_thread3_~arg.base=0, Thread0_thread3_~arg.offset=0, Thread1_thread2_thidvar0=3, Thread1_thread2_~arg.base=0, Thread1_thread2_~arg.offset=0, Thread2_thread0_thidvar0=5, Thread2_thread0_~arg.base=0, Thread2_thread0_~arg.offset=0, Thread3_thread2_thidvar0=4, Thread3_thread2_~arg.base=0, Thread3_thread2_~arg.offset=0, Thread4_thread1_thidvar0=0, Thread4_thread1_~arg.base=0, Thread4_thread1_~arg.offset=0, Thread5_thread2_thidvar0=1, Thread5_thread2_~arg.base=0, Thread5_thread2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_thread3_#in~arg.base|=0, |Thread0_thread3_#in~arg.offset|=0, |Thread0_thread3_#res.base|=0, |Thread0_thread3_#res.offset|=0, |Thread1_thread2_#in~arg.base|=0, |Thread1_thread2_#in~arg.offset|=0, |Thread1_thread2_#res.base|=0, |Thread1_thread2_#res.offset|=0, |Thread2_thread0_#in~arg.base|=0, |Thread2_thread0_#in~arg.offset|=0, |Thread2_thread0_#t~mem9|=3, |Thread2_thread0_~#t1~0.base|=96, |Thread2_thread0_~#t1~0.offset|=0, |Thread2_thread0_~#t2~0.base|=93, |Thread2_thread0_~#t2~0.offset|=0, |Thread2_thread0_~#t3~0.base|=90, |Thread2_thread0_~#t3~0.offset|=0, |Thread2_thread0_~#t4~0.base|=91, |Thread2_thread0_~#t4~0.offset|=0, |Thread2_thread0_~#t5~0.base|=95, |Thread2_thread0_~#t5~0.offset|=0, |Thread3_thread2_#in~arg.base|=0, |Thread3_thread2_#in~arg.offset|=0, |Thread3_thread2_#res.base|=0, |Thread3_thread2_#res.offset|=0, |Thread4_thread1_#in~arg.base|=0, |Thread4_thread1_#in~arg.offset|=0, |Thread4_thread1_#res.base|=0, |Thread4_thread1_#res.offset|=0, |Thread4_thread1_#t~malloc0.base|=92, |Thread4_thread1_#t~malloc0.offset|=0, |Thread5_thread2_#in~arg.base|=0, |Thread5_thread2_#in~arg.offset|=0, |Thread5_thread2_#res.base|=0, |Thread5_thread2_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] JOIN 5 [368] thread2EXIT-->L1240-2: Formula: (= |v_Thread2_thread0_#t~mem9_18| v_Thread1_thread2_thidvar0_44) InVars {Thread1_thread2_thidvar0=v_Thread1_thread2_thidvar0_44, Thread2_thread0_#t~mem9=|v_Thread2_thread0_#t~mem9_18|} OutVars{Thread1_thread2_thidvar0=v_Thread1_thread2_thidvar0_44, Thread2_thread0_#t~mem9=|v_Thread2_thread0_#t~mem9_18|} AuxVars[] AssignedVars[] VAL [Thread0_thread3_thidvar0=2, Thread0_thread3_~arg.base=0, Thread0_thread3_~arg.offset=0, Thread1_thread2_thidvar0=3, Thread1_thread2_~arg.base=0, Thread1_thread2_~arg.offset=0, Thread2_thread0_thidvar0=5, Thread2_thread0_~arg.base=0, Thread2_thread0_~arg.offset=0, Thread3_thread2_thidvar0=4, Thread3_thread2_~arg.base=0, Thread3_thread2_~arg.offset=0, Thread4_thread1_thidvar0=0, Thread4_thread1_~arg.base=0, Thread4_thread1_~arg.offset=0, Thread5_thread2_thidvar0=1, Thread5_thread2_~arg.base=0, Thread5_thread2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_thread3_#in~arg.base|=0, |Thread0_thread3_#in~arg.offset|=0, |Thread0_thread3_#res.base|=0, |Thread0_thread3_#res.offset|=0, |Thread1_thread2_#in~arg.base|=0, |Thread1_thread2_#in~arg.offset|=0, |Thread1_thread2_#res.base|=0, |Thread1_thread2_#res.offset|=0, |Thread2_thread0_#in~arg.base|=0, |Thread2_thread0_#in~arg.offset|=0, |Thread2_thread0_#t~mem9|=3, |Thread2_thread0_~#t1~0.base|=96, |Thread2_thread0_~#t1~0.offset|=0, |Thread2_thread0_~#t2~0.base|=93, |Thread2_thread0_~#t2~0.offset|=0, |Thread2_thread0_~#t3~0.base|=90, |Thread2_thread0_~#t3~0.offset|=0, |Thread2_thread0_~#t4~0.base|=91, |Thread2_thread0_~#t4~0.offset|=0, |Thread2_thread0_~#t5~0.base|=95, |Thread2_thread0_~#t5~0.offset|=0, |Thread3_thread2_#in~arg.base|=0, |Thread3_thread2_#in~arg.offset|=0, |Thread3_thread2_#res.base|=0, |Thread3_thread2_#res.offset|=0, |Thread4_thread1_#in~arg.base|=0, |Thread4_thread1_#in~arg.offset|=0, |Thread4_thread1_#res.base|=0, |Thread4_thread1_#res.offset|=0, |Thread4_thread1_#t~malloc0.base|=92, |Thread4_thread1_#t~malloc0.offset|=0, |Thread5_thread2_#in~arg.base|=0, |Thread5_thread2_#in~arg.offset|=0, |Thread5_thread2_#res.base|=0, |Thread5_thread2_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 [214] L1240-2-->L1241: Formula: true InVars {} OutVars{Thread2_thread0_#t~mem9=|v_Thread2_thread0_#t~mem9_2|} AuxVars[] AssignedVars[Thread2_thread0_#t~mem9] VAL [Thread0_thread3_thidvar0=2, Thread0_thread3_~arg.base=0, Thread0_thread3_~arg.offset=0, Thread1_thread2_thidvar0=3, Thread1_thread2_~arg.base=0, Thread1_thread2_~arg.offset=0, Thread2_thread0_thidvar0=5, Thread2_thread0_~arg.base=0, Thread2_thread0_~arg.offset=0, Thread3_thread2_thidvar0=4, Thread3_thread2_~arg.base=0, Thread3_thread2_~arg.offset=0, Thread4_thread1_thidvar0=0, Thread4_thread1_~arg.base=0, Thread4_thread1_~arg.offset=0, Thread5_thread2_thidvar0=1, Thread5_thread2_~arg.base=0, Thread5_thread2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_thread3_#in~arg.base|=0, |Thread0_thread3_#in~arg.offset|=0, |Thread0_thread3_#res.base|=0, |Thread0_thread3_#res.offset|=0, |Thread1_thread2_#in~arg.base|=0, |Thread1_thread2_#in~arg.offset|=0, |Thread1_thread2_#res.base|=0, |Thread1_thread2_#res.offset|=0, |Thread2_thread0_#in~arg.base|=0, |Thread2_thread0_#in~arg.offset|=0, |Thread2_thread0_~#t1~0.base|=96, |Thread2_thread0_~#t1~0.offset|=0, |Thread2_thread0_~#t2~0.base|=93, |Thread2_thread0_~#t2~0.offset|=0, |Thread2_thread0_~#t3~0.base|=90, |Thread2_thread0_~#t3~0.offset|=0, |Thread2_thread0_~#t4~0.base|=91, |Thread2_thread0_~#t4~0.offset|=0, |Thread2_thread0_~#t5~0.base|=95, |Thread2_thread0_~#t5~0.offset|=0, |Thread3_thread2_#in~arg.base|=0, |Thread3_thread2_#in~arg.offset|=0, |Thread3_thread2_#res.base|=0, |Thread3_thread2_#res.offset|=0, |Thread4_thread1_#in~arg.base|=0, |Thread4_thread1_#in~arg.offset|=0, |Thread4_thread1_#res.base|=0, |Thread4_thread1_#res.offset|=0, |Thread4_thread1_#t~malloc0.base|=92, |Thread4_thread1_#t~malloc0.offset|=0, |Thread5_thread2_#in~arg.base|=0, |Thread5_thread2_#in~arg.offset|=0, |Thread5_thread2_#res.base|=0, |Thread5_thread2_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 [215] L1241-->L1241-1: Formula: (= |v_Thread2_thread0_#t~mem10_1| (select (select |v_#memory_int_15| |v_Thread2_thread0_~#t5~0.base_3|) |v_Thread2_thread0_~#t5~0.offset_3|)) InVars {#memory_int=|v_#memory_int_15|, Thread2_thread0_~#t5~0.base=|v_Thread2_thread0_~#t5~0.base_3|, Thread2_thread0_~#t5~0.offset=|v_Thread2_thread0_~#t5~0.offset_3|} OutVars{#memory_int=|v_#memory_int_15|, Thread2_thread0_~#t5~0.base=|v_Thread2_thread0_~#t5~0.base_3|, Thread2_thread0_~#t5~0.offset=|v_Thread2_thread0_~#t5~0.offset_3|, Thread2_thread0_#t~mem10=|v_Thread2_thread0_#t~mem10_1|} AuxVars[] AssignedVars[Thread2_thread0_#t~mem10] VAL [Thread0_thread3_thidvar0=2, Thread0_thread3_~arg.base=0, Thread0_thread3_~arg.offset=0, Thread1_thread2_thidvar0=3, Thread1_thread2_~arg.base=0, Thread1_thread2_~arg.offset=0, Thread2_thread0_thidvar0=5, Thread2_thread0_~arg.base=0, Thread2_thread0_~arg.offset=0, Thread3_thread2_thidvar0=4, Thread3_thread2_~arg.base=0, Thread3_thread2_~arg.offset=0, Thread4_thread1_thidvar0=0, Thread4_thread1_~arg.base=0, Thread4_thread1_~arg.offset=0, Thread5_thread2_thidvar0=1, Thread5_thread2_~arg.base=0, Thread5_thread2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_thread3_#in~arg.base|=0, |Thread0_thread3_#in~arg.offset|=0, |Thread0_thread3_#res.base|=0, |Thread0_thread3_#res.offset|=0, |Thread1_thread2_#in~arg.base|=0, |Thread1_thread2_#in~arg.offset|=0, |Thread1_thread2_#res.base|=0, |Thread1_thread2_#res.offset|=0, |Thread2_thread0_#in~arg.base|=0, |Thread2_thread0_#in~arg.offset|=0, |Thread2_thread0_#t~mem10|=4, |Thread2_thread0_~#t1~0.base|=96, |Thread2_thread0_~#t1~0.offset|=0, |Thread2_thread0_~#t2~0.base|=93, |Thread2_thread0_~#t2~0.offset|=0, |Thread2_thread0_~#t3~0.base|=90, |Thread2_thread0_~#t3~0.offset|=0, |Thread2_thread0_~#t4~0.base|=91, |Thread2_thread0_~#t4~0.offset|=0, |Thread2_thread0_~#t5~0.base|=95, |Thread2_thread0_~#t5~0.offset|=0, |Thread3_thread2_#in~arg.base|=0, |Thread3_thread2_#in~arg.offset|=0, |Thread3_thread2_#res.base|=0, |Thread3_thread2_#res.offset|=0, |Thread4_thread1_#in~arg.base|=0, |Thread4_thread1_#in~arg.offset|=0, |Thread4_thread1_#res.base|=0, |Thread4_thread1_#res.offset|=0, |Thread4_thread1_#t~malloc0.base|=92, |Thread4_thread1_#t~malloc0.offset|=0, |Thread5_thread2_#in~arg.base|=0, |Thread5_thread2_#in~arg.offset|=0, |Thread5_thread2_#res.base|=0, |Thread5_thread2_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] JOIN 4 [380] thread2EXIT-->L1241-2: Formula: (= |v_Thread2_thread0_#t~mem10_20| v_Thread3_thread2_thidvar0_46) InVars {Thread2_thread0_#t~mem10=|v_Thread2_thread0_#t~mem10_20|, Thread3_thread2_thidvar0=v_Thread3_thread2_thidvar0_46} OutVars{Thread2_thread0_#t~mem10=|v_Thread2_thread0_#t~mem10_20|, Thread3_thread2_thidvar0=v_Thread3_thread2_thidvar0_46} AuxVars[] AssignedVars[] VAL [Thread0_thread3_thidvar0=2, Thread0_thread3_~arg.base=0, Thread0_thread3_~arg.offset=0, Thread1_thread2_thidvar0=3, Thread1_thread2_~arg.base=0, Thread1_thread2_~arg.offset=0, Thread2_thread0_thidvar0=5, Thread2_thread0_~arg.base=0, Thread2_thread0_~arg.offset=0, Thread3_thread2_thidvar0=4, Thread3_thread2_~arg.base=0, Thread3_thread2_~arg.offset=0, Thread4_thread1_thidvar0=0, Thread4_thread1_~arg.base=0, Thread4_thread1_~arg.offset=0, Thread5_thread2_thidvar0=1, Thread5_thread2_~arg.base=0, Thread5_thread2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_thread3_#in~arg.base|=0, |Thread0_thread3_#in~arg.offset|=0, |Thread0_thread3_#res.base|=0, |Thread0_thread3_#res.offset|=0, |Thread1_thread2_#in~arg.base|=0, |Thread1_thread2_#in~arg.offset|=0, |Thread1_thread2_#res.base|=0, |Thread1_thread2_#res.offset|=0, |Thread2_thread0_#in~arg.base|=0, |Thread2_thread0_#in~arg.offset|=0, |Thread2_thread0_#t~mem10|=4, |Thread2_thread0_~#t1~0.base|=96, |Thread2_thread0_~#t1~0.offset|=0, |Thread2_thread0_~#t2~0.base|=93, |Thread2_thread0_~#t2~0.offset|=0, |Thread2_thread0_~#t3~0.base|=90, |Thread2_thread0_~#t3~0.offset|=0, |Thread2_thread0_~#t4~0.base|=91, |Thread2_thread0_~#t4~0.offset|=0, |Thread2_thread0_~#t5~0.base|=95, |Thread2_thread0_~#t5~0.offset|=0, |Thread3_thread2_#in~arg.base|=0, |Thread3_thread2_#in~arg.offset|=0, |Thread3_thread2_#res.base|=0, |Thread3_thread2_#res.offset|=0, |Thread4_thread1_#in~arg.base|=0, |Thread4_thread1_#in~arg.offset|=0, |Thread4_thread1_#res.base|=0, |Thread4_thread1_#res.offset|=0, |Thread4_thread1_#t~malloc0.base|=92, |Thread4_thread1_#t~malloc0.offset|=0, |Thread5_thread2_#in~arg.base|=0, |Thread5_thread2_#in~arg.offset|=0, |Thread5_thread2_#res.base|=0, |Thread5_thread2_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 [217] L1241-2-->L1242: Formula: true InVars {} OutVars{Thread2_thread0_#t~mem10=|v_Thread2_thread0_#t~mem10_2|} AuxVars[] AssignedVars[Thread2_thread0_#t~mem10] VAL [Thread0_thread3_thidvar0=2, Thread0_thread3_~arg.base=0, Thread0_thread3_~arg.offset=0, Thread1_thread2_thidvar0=3, Thread1_thread2_~arg.base=0, Thread1_thread2_~arg.offset=0, Thread2_thread0_thidvar0=5, Thread2_thread0_~arg.base=0, Thread2_thread0_~arg.offset=0, Thread3_thread2_thidvar0=4, Thread3_thread2_~arg.base=0, Thread3_thread2_~arg.offset=0, Thread4_thread1_thidvar0=0, Thread4_thread1_~arg.base=0, Thread4_thread1_~arg.offset=0, Thread5_thread2_thidvar0=1, Thread5_thread2_~arg.base=0, Thread5_thread2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_thread3_#in~arg.base|=0, |Thread0_thread3_#in~arg.offset|=0, |Thread0_thread3_#res.base|=0, |Thread0_thread3_#res.offset|=0, |Thread1_thread2_#in~arg.base|=0, |Thread1_thread2_#in~arg.offset|=0, |Thread1_thread2_#res.base|=0, |Thread1_thread2_#res.offset|=0, |Thread2_thread0_#in~arg.base|=0, |Thread2_thread0_#in~arg.offset|=0, |Thread2_thread0_~#t1~0.base|=96, |Thread2_thread0_~#t1~0.offset|=0, |Thread2_thread0_~#t2~0.base|=93, |Thread2_thread0_~#t2~0.offset|=0, |Thread2_thread0_~#t3~0.base|=90, |Thread2_thread0_~#t3~0.offset|=0, |Thread2_thread0_~#t4~0.base|=91, |Thread2_thread0_~#t4~0.offset|=0, |Thread2_thread0_~#t5~0.base|=95, |Thread2_thread0_~#t5~0.offset|=0, |Thread3_thread2_#in~arg.base|=0, |Thread3_thread2_#in~arg.offset|=0, |Thread3_thread2_#res.base|=0, |Thread3_thread2_#res.offset|=0, |Thread4_thread1_#in~arg.base|=0, |Thread4_thread1_#in~arg.offset|=0, |Thread4_thread1_#res.base|=0, |Thread4_thread1_#res.offset|=0, |Thread4_thread1_#t~malloc0.base|=92, |Thread4_thread1_#t~malloc0.offset|=0, |Thread5_thread2_#in~arg.base|=0, |Thread5_thread2_#in~arg.offset|=0, |Thread5_thread2_#res.base|=0, |Thread5_thread2_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 [218] L1242-->L1231-6: Formula: (and (= |v_Thread2_thread0_#res.base_1| 0) (= |v_Thread2_thread0_#res.offset_1| 0)) InVars {} OutVars{Thread2_thread0_#res.offset=|v_Thread2_thread0_#res.offset_1|, Thread2_thread0_#res.base=|v_Thread2_thread0_#res.base_1|} AuxVars[] AssignedVars[Thread2_thread0_#res.offset, Thread2_thread0_#res.base] VAL [Thread0_thread3_thidvar0=2, Thread0_thread3_~arg.base=0, Thread0_thread3_~arg.offset=0, Thread1_thread2_thidvar0=3, Thread1_thread2_~arg.base=0, Thread1_thread2_~arg.offset=0, Thread2_thread0_thidvar0=5, Thread2_thread0_~arg.base=0, Thread2_thread0_~arg.offset=0, Thread3_thread2_thidvar0=4, Thread3_thread2_~arg.base=0, Thread3_thread2_~arg.offset=0, Thread4_thread1_thidvar0=0, Thread4_thread1_~arg.base=0, Thread4_thread1_~arg.offset=0, Thread5_thread2_thidvar0=1, Thread5_thread2_~arg.base=0, Thread5_thread2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_thread3_#in~arg.base|=0, |Thread0_thread3_#in~arg.offset|=0, |Thread0_thread3_#res.base|=0, |Thread0_thread3_#res.offset|=0, |Thread1_thread2_#in~arg.base|=0, |Thread1_thread2_#in~arg.offset|=0, |Thread1_thread2_#res.base|=0, |Thread1_thread2_#res.offset|=0, |Thread2_thread0_#in~arg.base|=0, |Thread2_thread0_#in~arg.offset|=0, |Thread2_thread0_#res.base|=0, |Thread2_thread0_#res.offset|=0, |Thread2_thread0_~#t1~0.base|=96, |Thread2_thread0_~#t1~0.offset|=0, |Thread2_thread0_~#t2~0.base|=93, |Thread2_thread0_~#t2~0.offset|=0, |Thread2_thread0_~#t3~0.base|=90, |Thread2_thread0_~#t3~0.offset|=0, |Thread2_thread0_~#t4~0.base|=91, |Thread2_thread0_~#t4~0.offset|=0, |Thread2_thread0_~#t5~0.base|=95, |Thread2_thread0_~#t5~0.offset|=0, |Thread3_thread2_#in~arg.base|=0, |Thread3_thread2_#in~arg.offset|=0, |Thread3_thread2_#res.base|=0, |Thread3_thread2_#res.offset|=0, |Thread4_thread1_#in~arg.base|=0, |Thread4_thread1_#in~arg.offset|=0, |Thread4_thread1_#res.base|=0, |Thread4_thread1_#res.offset|=0, |Thread4_thread1_#t~malloc0.base|=92, |Thread4_thread1_#t~malloc0.offset|=0, |Thread5_thread2_#in~arg.base|=0, |Thread5_thread2_#in~arg.offset|=0, |Thread5_thread2_#res.base|=0, |Thread5_thread2_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 [219] L1231-6-->L1231-7: Formula: (= (store |v_#valid_12| |v_Thread2_thread0_~#t1~0.base_4| 0) |v_#valid_11|) InVars {Thread2_thread0_~#t1~0.base=|v_Thread2_thread0_~#t1~0.base_4|, #valid=|v_#valid_12|} OutVars{Thread2_thread0_~#t1~0.base=|v_Thread2_thread0_~#t1~0.base_4|, #valid=|v_#valid_11|} AuxVars[] AssignedVars[#valid] VAL [Thread0_thread3_thidvar0=2, Thread0_thread3_~arg.base=0, Thread0_thread3_~arg.offset=0, Thread1_thread2_thidvar0=3, Thread1_thread2_~arg.base=0, Thread1_thread2_~arg.offset=0, Thread2_thread0_thidvar0=5, Thread2_thread0_~arg.base=0, Thread2_thread0_~arg.offset=0, Thread3_thread2_thidvar0=4, Thread3_thread2_~arg.base=0, Thread3_thread2_~arg.offset=0, Thread4_thread1_thidvar0=0, Thread4_thread1_~arg.base=0, Thread4_thread1_~arg.offset=0, Thread5_thread2_thidvar0=1, Thread5_thread2_~arg.base=0, Thread5_thread2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_thread3_#in~arg.base|=0, |Thread0_thread3_#in~arg.offset|=0, |Thread0_thread3_#res.base|=0, |Thread0_thread3_#res.offset|=0, |Thread1_thread2_#in~arg.base|=0, |Thread1_thread2_#in~arg.offset|=0, |Thread1_thread2_#res.base|=0, |Thread1_thread2_#res.offset|=0, |Thread2_thread0_#in~arg.base|=0, |Thread2_thread0_#in~arg.offset|=0, |Thread2_thread0_#res.base|=0, |Thread2_thread0_#res.offset|=0, |Thread2_thread0_~#t1~0.base|=96, |Thread2_thread0_~#t1~0.offset|=0, |Thread2_thread0_~#t2~0.base|=93, |Thread2_thread0_~#t2~0.offset|=0, |Thread2_thread0_~#t3~0.base|=90, |Thread2_thread0_~#t3~0.offset|=0, |Thread2_thread0_~#t4~0.base|=91, |Thread2_thread0_~#t4~0.offset|=0, |Thread2_thread0_~#t5~0.base|=95, |Thread2_thread0_~#t5~0.offset|=0, |Thread3_thread2_#in~arg.base|=0, |Thread3_thread2_#in~arg.offset|=0, |Thread3_thread2_#res.base|=0, |Thread3_thread2_#res.offset|=0, |Thread4_thread1_#in~arg.base|=0, |Thread4_thread1_#in~arg.offset|=0, |Thread4_thread1_#res.base|=0, |Thread4_thread1_#res.offset|=0, |Thread4_thread1_#t~malloc0.base|=92, |Thread4_thread1_#t~malloc0.offset|=0, |Thread5_thread2_#in~arg.base|=0, |Thread5_thread2_#in~arg.offset|=0, |Thread5_thread2_#res.base|=0, |Thread5_thread2_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 [220] L1231-7-->L1231-8: Formula: true InVars {} OutVars{Thread2_thread0_~#t1~0.base=|v_Thread2_thread0_~#t1~0.base_5|, Thread2_thread0_~#t1~0.offset=|v_Thread2_thread0_~#t1~0.offset_4|} AuxVars[] AssignedVars[Thread2_thread0_~#t1~0.base, Thread2_thread0_~#t1~0.offset] VAL [Thread0_thread3_thidvar0=2, Thread0_thread3_~arg.base=0, Thread0_thread3_~arg.offset=0, Thread1_thread2_thidvar0=3, Thread1_thread2_~arg.base=0, Thread1_thread2_~arg.offset=0, Thread2_thread0_thidvar0=5, Thread2_thread0_~arg.base=0, Thread2_thread0_~arg.offset=0, Thread3_thread2_thidvar0=4, Thread3_thread2_~arg.base=0, Thread3_thread2_~arg.offset=0, Thread4_thread1_thidvar0=0, Thread4_thread1_~arg.base=0, Thread4_thread1_~arg.offset=0, Thread5_thread2_thidvar0=1, Thread5_thread2_~arg.base=0, Thread5_thread2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_thread3_#in~arg.base|=0, |Thread0_thread3_#in~arg.offset|=0, |Thread0_thread3_#res.base|=0, |Thread0_thread3_#res.offset|=0, |Thread1_thread2_#in~arg.base|=0, |Thread1_thread2_#in~arg.offset|=0, |Thread1_thread2_#res.base|=0, |Thread1_thread2_#res.offset|=0, |Thread2_thread0_#in~arg.base|=0, |Thread2_thread0_#in~arg.offset|=0, |Thread2_thread0_#res.base|=0, |Thread2_thread0_#res.offset|=0, |Thread2_thread0_~#t2~0.base|=93, |Thread2_thread0_~#t2~0.offset|=0, |Thread2_thread0_~#t3~0.base|=90, |Thread2_thread0_~#t3~0.offset|=0, |Thread2_thread0_~#t4~0.base|=91, |Thread2_thread0_~#t4~0.offset|=0, |Thread2_thread0_~#t5~0.base|=95, |Thread2_thread0_~#t5~0.offset|=0, |Thread3_thread2_#in~arg.base|=0, |Thread3_thread2_#in~arg.offset|=0, |Thread3_thread2_#res.base|=0, |Thread3_thread2_#res.offset|=0, |Thread4_thread1_#in~arg.base|=0, |Thread4_thread1_#in~arg.offset|=0, |Thread4_thread1_#res.base|=0, |Thread4_thread1_#res.offset|=0, |Thread4_thread1_#t~malloc0.base|=92, |Thread4_thread1_#t~malloc0.offset|=0, |Thread5_thread2_#in~arg.base|=0, |Thread5_thread2_#in~arg.offset|=0, |Thread5_thread2_#res.base|=0, |Thread5_thread2_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 [221] L1231-8-->L1231-9: Formula: (= |v_#valid_13| (store |v_#valid_14| |v_Thread2_thread0_~#t2~0.base_4| 0)) InVars {#valid=|v_#valid_14|, Thread2_thread0_~#t2~0.base=|v_Thread2_thread0_~#t2~0.base_4|} OutVars{#valid=|v_#valid_13|, Thread2_thread0_~#t2~0.base=|v_Thread2_thread0_~#t2~0.base_4|} AuxVars[] AssignedVars[#valid] VAL [Thread0_thread3_thidvar0=2, Thread0_thread3_~arg.base=0, Thread0_thread3_~arg.offset=0, Thread1_thread2_thidvar0=3, Thread1_thread2_~arg.base=0, Thread1_thread2_~arg.offset=0, Thread2_thread0_thidvar0=5, Thread2_thread0_~arg.base=0, Thread2_thread0_~arg.offset=0, Thread3_thread2_thidvar0=4, Thread3_thread2_~arg.base=0, Thread3_thread2_~arg.offset=0, Thread4_thread1_thidvar0=0, Thread4_thread1_~arg.base=0, Thread4_thread1_~arg.offset=0, Thread5_thread2_thidvar0=1, Thread5_thread2_~arg.base=0, Thread5_thread2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_thread3_#in~arg.base|=0, |Thread0_thread3_#in~arg.offset|=0, |Thread0_thread3_#res.base|=0, |Thread0_thread3_#res.offset|=0, |Thread1_thread2_#in~arg.base|=0, |Thread1_thread2_#in~arg.offset|=0, |Thread1_thread2_#res.base|=0, |Thread1_thread2_#res.offset|=0, |Thread2_thread0_#in~arg.base|=0, |Thread2_thread0_#in~arg.offset|=0, |Thread2_thread0_#res.base|=0, |Thread2_thread0_#res.offset|=0, |Thread2_thread0_~#t2~0.base|=93, |Thread2_thread0_~#t2~0.offset|=0, |Thread2_thread0_~#t3~0.base|=90, |Thread2_thread0_~#t3~0.offset|=0, |Thread2_thread0_~#t4~0.base|=91, |Thread2_thread0_~#t4~0.offset|=0, |Thread2_thread0_~#t5~0.base|=95, |Thread2_thread0_~#t5~0.offset|=0, |Thread3_thread2_#in~arg.base|=0, |Thread3_thread2_#in~arg.offset|=0, |Thread3_thread2_#res.base|=0, |Thread3_thread2_#res.offset|=0, |Thread4_thread1_#in~arg.base|=0, |Thread4_thread1_#in~arg.offset|=0, |Thread4_thread1_#res.base|=0, |Thread4_thread1_#res.offset|=0, |Thread4_thread1_#t~malloc0.base|=92, |Thread4_thread1_#t~malloc0.offset|=0, |Thread5_thread2_#in~arg.base|=0, |Thread5_thread2_#in~arg.offset|=0, |Thread5_thread2_#res.base|=0, |Thread5_thread2_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 [222] L1231-9-->L1231-10: Formula: true InVars {} OutVars{Thread2_thread0_~#t2~0.offset=|v_Thread2_thread0_~#t2~0.offset_4|, Thread2_thread0_~#t2~0.base=|v_Thread2_thread0_~#t2~0.base_5|} AuxVars[] AssignedVars[Thread2_thread0_~#t2~0.offset, Thread2_thread0_~#t2~0.base] VAL [Thread0_thread3_thidvar0=2, Thread0_thread3_~arg.base=0, Thread0_thread3_~arg.offset=0, Thread1_thread2_thidvar0=3, Thread1_thread2_~arg.base=0, Thread1_thread2_~arg.offset=0, Thread2_thread0_thidvar0=5, Thread2_thread0_~arg.base=0, Thread2_thread0_~arg.offset=0, Thread3_thread2_thidvar0=4, Thread3_thread2_~arg.base=0, Thread3_thread2_~arg.offset=0, Thread4_thread1_thidvar0=0, Thread4_thread1_~arg.base=0, Thread4_thread1_~arg.offset=0, Thread5_thread2_thidvar0=1, Thread5_thread2_~arg.base=0, Thread5_thread2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_thread3_#in~arg.base|=0, |Thread0_thread3_#in~arg.offset|=0, |Thread0_thread3_#res.base|=0, |Thread0_thread3_#res.offset|=0, |Thread1_thread2_#in~arg.base|=0, |Thread1_thread2_#in~arg.offset|=0, |Thread1_thread2_#res.base|=0, |Thread1_thread2_#res.offset|=0, |Thread2_thread0_#in~arg.base|=0, |Thread2_thread0_#in~arg.offset|=0, |Thread2_thread0_#res.base|=0, |Thread2_thread0_#res.offset|=0, |Thread2_thread0_~#t3~0.base|=90, |Thread2_thread0_~#t3~0.offset|=0, |Thread2_thread0_~#t4~0.base|=91, |Thread2_thread0_~#t4~0.offset|=0, |Thread2_thread0_~#t5~0.base|=95, |Thread2_thread0_~#t5~0.offset|=0, |Thread3_thread2_#in~arg.base|=0, |Thread3_thread2_#in~arg.offset|=0, |Thread3_thread2_#res.base|=0, |Thread3_thread2_#res.offset|=0, |Thread4_thread1_#in~arg.base|=0, |Thread4_thread1_#in~arg.offset|=0, |Thread4_thread1_#res.base|=0, |Thread4_thread1_#res.offset|=0, |Thread4_thread1_#t~malloc0.base|=92, |Thread4_thread1_#t~malloc0.offset|=0, |Thread5_thread2_#in~arg.base|=0, |Thread5_thread2_#in~arg.offset|=0, |Thread5_thread2_#res.base|=0, |Thread5_thread2_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 [223] L1231-10-->L1231-11: Formula: (= |v_#valid_15| (store |v_#valid_16| |v_Thread2_thread0_~#t3~0.base_4| 0)) InVars {Thread2_thread0_~#t3~0.base=|v_Thread2_thread0_~#t3~0.base_4|, #valid=|v_#valid_16|} OutVars{Thread2_thread0_~#t3~0.base=|v_Thread2_thread0_~#t3~0.base_4|, #valid=|v_#valid_15|} AuxVars[] AssignedVars[#valid] VAL [Thread0_thread3_thidvar0=2, Thread0_thread3_~arg.base=0, Thread0_thread3_~arg.offset=0, Thread1_thread2_thidvar0=3, Thread1_thread2_~arg.base=0, Thread1_thread2_~arg.offset=0, Thread2_thread0_thidvar0=5, Thread2_thread0_~arg.base=0, Thread2_thread0_~arg.offset=0, Thread3_thread2_thidvar0=4, Thread3_thread2_~arg.base=0, Thread3_thread2_~arg.offset=0, Thread4_thread1_thidvar0=0, Thread4_thread1_~arg.base=0, Thread4_thread1_~arg.offset=0, Thread5_thread2_thidvar0=1, Thread5_thread2_~arg.base=0, Thread5_thread2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_thread3_#in~arg.base|=0, |Thread0_thread3_#in~arg.offset|=0, |Thread0_thread3_#res.base|=0, |Thread0_thread3_#res.offset|=0, |Thread1_thread2_#in~arg.base|=0, |Thread1_thread2_#in~arg.offset|=0, |Thread1_thread2_#res.base|=0, |Thread1_thread2_#res.offset|=0, |Thread2_thread0_#in~arg.base|=0, |Thread2_thread0_#in~arg.offset|=0, |Thread2_thread0_#res.base|=0, |Thread2_thread0_#res.offset|=0, |Thread2_thread0_~#t3~0.base|=90, |Thread2_thread0_~#t3~0.offset|=0, |Thread2_thread0_~#t4~0.base|=91, |Thread2_thread0_~#t4~0.offset|=0, |Thread2_thread0_~#t5~0.base|=95, |Thread2_thread0_~#t5~0.offset|=0, |Thread3_thread2_#in~arg.base|=0, |Thread3_thread2_#in~arg.offset|=0, |Thread3_thread2_#res.base|=0, |Thread3_thread2_#res.offset|=0, |Thread4_thread1_#in~arg.base|=0, |Thread4_thread1_#in~arg.offset|=0, |Thread4_thread1_#res.base|=0, |Thread4_thread1_#res.offset|=0, |Thread4_thread1_#t~malloc0.base|=92, |Thread4_thread1_#t~malloc0.offset|=0, |Thread5_thread2_#in~arg.base|=0, |Thread5_thread2_#in~arg.offset|=0, |Thread5_thread2_#res.base|=0, |Thread5_thread2_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 [224] L1231-11-->L1231-12: Formula: true InVars {} OutVars{Thread2_thread0_~#t3~0.offset=|v_Thread2_thread0_~#t3~0.offset_4|, Thread2_thread0_~#t3~0.base=|v_Thread2_thread0_~#t3~0.base_5|} AuxVars[] AssignedVars[Thread2_thread0_~#t3~0.offset, Thread2_thread0_~#t3~0.base] VAL [Thread0_thread3_thidvar0=2, Thread0_thread3_~arg.base=0, Thread0_thread3_~arg.offset=0, Thread1_thread2_thidvar0=3, Thread1_thread2_~arg.base=0, Thread1_thread2_~arg.offset=0, Thread2_thread0_thidvar0=5, Thread2_thread0_~arg.base=0, Thread2_thread0_~arg.offset=0, Thread3_thread2_thidvar0=4, Thread3_thread2_~arg.base=0, Thread3_thread2_~arg.offset=0, Thread4_thread1_thidvar0=0, Thread4_thread1_~arg.base=0, Thread4_thread1_~arg.offset=0, Thread5_thread2_thidvar0=1, Thread5_thread2_~arg.base=0, Thread5_thread2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_thread3_#in~arg.base|=0, |Thread0_thread3_#in~arg.offset|=0, |Thread0_thread3_#res.base|=0, |Thread0_thread3_#res.offset|=0, |Thread1_thread2_#in~arg.base|=0, |Thread1_thread2_#in~arg.offset|=0, |Thread1_thread2_#res.base|=0, |Thread1_thread2_#res.offset|=0, |Thread2_thread0_#in~arg.base|=0, |Thread2_thread0_#in~arg.offset|=0, |Thread2_thread0_#res.base|=0, |Thread2_thread0_#res.offset|=0, |Thread2_thread0_~#t4~0.base|=91, |Thread2_thread0_~#t4~0.offset|=0, |Thread2_thread0_~#t5~0.base|=95, |Thread2_thread0_~#t5~0.offset|=0, |Thread3_thread2_#in~arg.base|=0, |Thread3_thread2_#in~arg.offset|=0, |Thread3_thread2_#res.base|=0, |Thread3_thread2_#res.offset|=0, |Thread4_thread1_#in~arg.base|=0, |Thread4_thread1_#in~arg.offset|=0, |Thread4_thread1_#res.base|=0, |Thread4_thread1_#res.offset|=0, |Thread4_thread1_#t~malloc0.base|=92, |Thread4_thread1_#t~malloc0.offset|=0, |Thread5_thread2_#in~arg.base|=0, |Thread5_thread2_#in~arg.offset|=0, |Thread5_thread2_#res.base|=0, |Thread5_thread2_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 [225] L1231-12-->L1231-13: Formula: (= (store |v_#valid_18| |v_Thread2_thread0_~#t4~0.base_4| 0) |v_#valid_17|) InVars {#valid=|v_#valid_18|, Thread2_thread0_~#t4~0.base=|v_Thread2_thread0_~#t4~0.base_4|} OutVars{#valid=|v_#valid_17|, Thread2_thread0_~#t4~0.base=|v_Thread2_thread0_~#t4~0.base_4|} AuxVars[] AssignedVars[#valid] VAL [Thread0_thread3_thidvar0=2, Thread0_thread3_~arg.base=0, Thread0_thread3_~arg.offset=0, Thread1_thread2_thidvar0=3, Thread1_thread2_~arg.base=0, Thread1_thread2_~arg.offset=0, Thread2_thread0_thidvar0=5, Thread2_thread0_~arg.base=0, Thread2_thread0_~arg.offset=0, Thread3_thread2_thidvar0=4, Thread3_thread2_~arg.base=0, Thread3_thread2_~arg.offset=0, Thread4_thread1_thidvar0=0, Thread4_thread1_~arg.base=0, Thread4_thread1_~arg.offset=0, Thread5_thread2_thidvar0=1, Thread5_thread2_~arg.base=0, Thread5_thread2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_thread3_#in~arg.base|=0, |Thread0_thread3_#in~arg.offset|=0, |Thread0_thread3_#res.base|=0, |Thread0_thread3_#res.offset|=0, |Thread1_thread2_#in~arg.base|=0, |Thread1_thread2_#in~arg.offset|=0, |Thread1_thread2_#res.base|=0, |Thread1_thread2_#res.offset|=0, |Thread2_thread0_#in~arg.base|=0, |Thread2_thread0_#in~arg.offset|=0, |Thread2_thread0_#res.base|=0, |Thread2_thread0_#res.offset|=0, |Thread2_thread0_~#t4~0.base|=91, |Thread2_thread0_~#t4~0.offset|=0, |Thread2_thread0_~#t5~0.base|=95, |Thread2_thread0_~#t5~0.offset|=0, |Thread3_thread2_#in~arg.base|=0, |Thread3_thread2_#in~arg.offset|=0, |Thread3_thread2_#res.base|=0, |Thread3_thread2_#res.offset|=0, |Thread4_thread1_#in~arg.base|=0, |Thread4_thread1_#in~arg.offset|=0, |Thread4_thread1_#res.base|=0, |Thread4_thread1_#res.offset|=0, |Thread4_thread1_#t~malloc0.base|=92, |Thread4_thread1_#t~malloc0.offset|=0, |Thread5_thread2_#in~arg.base|=0, |Thread5_thread2_#in~arg.offset|=0, |Thread5_thread2_#res.base|=0, |Thread5_thread2_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 [226] L1231-13-->L1231-14: Formula: true InVars {} OutVars{Thread2_thread0_~#t4~0.offset=|v_Thread2_thread0_~#t4~0.offset_4|, Thread2_thread0_~#t4~0.base=|v_Thread2_thread0_~#t4~0.base_5|} AuxVars[] AssignedVars[Thread2_thread0_~#t4~0.offset, Thread2_thread0_~#t4~0.base] VAL [Thread0_thread3_thidvar0=2, Thread0_thread3_~arg.base=0, Thread0_thread3_~arg.offset=0, Thread1_thread2_thidvar0=3, Thread1_thread2_~arg.base=0, Thread1_thread2_~arg.offset=0, Thread2_thread0_thidvar0=5, Thread2_thread0_~arg.base=0, Thread2_thread0_~arg.offset=0, Thread3_thread2_thidvar0=4, Thread3_thread2_~arg.base=0, Thread3_thread2_~arg.offset=0, Thread4_thread1_thidvar0=0, Thread4_thread1_~arg.base=0, Thread4_thread1_~arg.offset=0, Thread5_thread2_thidvar0=1, Thread5_thread2_~arg.base=0, Thread5_thread2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_thread3_#in~arg.base|=0, |Thread0_thread3_#in~arg.offset|=0, |Thread0_thread3_#res.base|=0, |Thread0_thread3_#res.offset|=0, |Thread1_thread2_#in~arg.base|=0, |Thread1_thread2_#in~arg.offset|=0, |Thread1_thread2_#res.base|=0, |Thread1_thread2_#res.offset|=0, |Thread2_thread0_#in~arg.base|=0, |Thread2_thread0_#in~arg.offset|=0, |Thread2_thread0_#res.base|=0, |Thread2_thread0_#res.offset|=0, |Thread2_thread0_~#t5~0.base|=95, |Thread2_thread0_~#t5~0.offset|=0, |Thread3_thread2_#in~arg.base|=0, |Thread3_thread2_#in~arg.offset|=0, |Thread3_thread2_#res.base|=0, |Thread3_thread2_#res.offset|=0, |Thread4_thread1_#in~arg.base|=0, |Thread4_thread1_#in~arg.offset|=0, |Thread4_thread1_#res.base|=0, |Thread4_thread1_#res.offset|=0, |Thread4_thread1_#t~malloc0.base|=92, |Thread4_thread1_#t~malloc0.offset|=0, |Thread5_thread2_#in~arg.base|=0, |Thread5_thread2_#in~arg.offset|=0, |Thread5_thread2_#res.base|=0, |Thread5_thread2_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 [227] L1231-14-->L1231-15: Formula: (= |v_#valid_19| (store |v_#valid_20| |v_Thread2_thread0_~#t5~0.base_4| 0)) InVars {Thread2_thread0_~#t5~0.base=|v_Thread2_thread0_~#t5~0.base_4|, #valid=|v_#valid_20|} OutVars{Thread2_thread0_~#t5~0.base=|v_Thread2_thread0_~#t5~0.base_4|, #valid=|v_#valid_19|} AuxVars[] AssignedVars[#valid] VAL [Thread0_thread3_thidvar0=2, Thread0_thread3_~arg.base=0, Thread0_thread3_~arg.offset=0, Thread1_thread2_thidvar0=3, Thread1_thread2_~arg.base=0, Thread1_thread2_~arg.offset=0, Thread2_thread0_thidvar0=5, Thread2_thread0_~arg.base=0, Thread2_thread0_~arg.offset=0, Thread3_thread2_thidvar0=4, Thread3_thread2_~arg.base=0, Thread3_thread2_~arg.offset=0, Thread4_thread1_thidvar0=0, Thread4_thread1_~arg.base=0, Thread4_thread1_~arg.offset=0, Thread5_thread2_thidvar0=1, Thread5_thread2_~arg.base=0, Thread5_thread2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_thread3_#in~arg.base|=0, |Thread0_thread3_#in~arg.offset|=0, |Thread0_thread3_#res.base|=0, |Thread0_thread3_#res.offset|=0, |Thread1_thread2_#in~arg.base|=0, |Thread1_thread2_#in~arg.offset|=0, |Thread1_thread2_#res.base|=0, |Thread1_thread2_#res.offset|=0, |Thread2_thread0_#in~arg.base|=0, |Thread2_thread0_#in~arg.offset|=0, |Thread2_thread0_#res.base|=0, |Thread2_thread0_#res.offset|=0, |Thread2_thread0_~#t5~0.base|=95, |Thread2_thread0_~#t5~0.offset|=0, |Thread3_thread2_#in~arg.base|=0, |Thread3_thread2_#in~arg.offset|=0, |Thread3_thread2_#res.base|=0, |Thread3_thread2_#res.offset|=0, |Thread4_thread1_#in~arg.base|=0, |Thread4_thread1_#in~arg.offset|=0, |Thread4_thread1_#res.base|=0, |Thread4_thread1_#res.offset|=0, |Thread4_thread1_#t~malloc0.base|=92, |Thread4_thread1_#t~malloc0.offset|=0, |Thread5_thread2_#in~arg.base|=0, |Thread5_thread2_#in~arg.offset|=0, |Thread5_thread2_#res.base|=0, |Thread5_thread2_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 [228] L1231-15-->thread0FINAL: Formula: true InVars {} OutVars{Thread2_thread0_~#t5~0.base=|v_Thread2_thread0_~#t5~0.base_5|, Thread2_thread0_~#t5~0.offset=|v_Thread2_thread0_~#t5~0.offset_4|} AuxVars[] AssignedVars[Thread2_thread0_~#t5~0.offset, Thread2_thread0_~#t5~0.base] VAL [Thread0_thread3_thidvar0=2, Thread0_thread3_~arg.base=0, Thread0_thread3_~arg.offset=0, Thread1_thread2_thidvar0=3, Thread1_thread2_~arg.base=0, Thread1_thread2_~arg.offset=0, Thread2_thread0_thidvar0=5, Thread2_thread0_~arg.base=0, Thread2_thread0_~arg.offset=0, Thread3_thread2_thidvar0=4, Thread3_thread2_~arg.base=0, Thread3_thread2_~arg.offset=0, Thread4_thread1_thidvar0=0, Thread4_thread1_~arg.base=0, Thread4_thread1_~arg.offset=0, Thread5_thread2_thidvar0=1, Thread5_thread2_~arg.base=0, Thread5_thread2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_thread3_#in~arg.base|=0, |Thread0_thread3_#in~arg.offset|=0, |Thread0_thread3_#res.base|=0, |Thread0_thread3_#res.offset|=0, |Thread1_thread2_#in~arg.base|=0, |Thread1_thread2_#in~arg.offset|=0, |Thread1_thread2_#res.base|=0, |Thread1_thread2_#res.offset|=0, |Thread2_thread0_#in~arg.base|=0, |Thread2_thread0_#in~arg.offset|=0, |Thread2_thread0_#res.base|=0, |Thread2_thread0_#res.offset|=0, |Thread3_thread2_#in~arg.base|=0, |Thread3_thread2_#in~arg.offset|=0, |Thread3_thread2_#res.base|=0, |Thread3_thread2_#res.offset|=0, |Thread4_thread1_#in~arg.base|=0, |Thread4_thread1_#in~arg.offset|=0, |Thread4_thread1_#res.base|=0, |Thread4_thread1_#res.offset|=0, |Thread4_thread1_#t~malloc0.base|=92, |Thread4_thread1_#t~malloc0.offset|=0, |Thread5_thread2_#in~arg.base|=0, |Thread5_thread2_#in~arg.offset|=0, |Thread5_thread2_#res.base|=0, |Thread5_thread2_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 [229] thread0FINAL-->thread0EXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] VAL [Thread0_thread3_thidvar0=2, Thread0_thread3_~arg.base=0, Thread0_thread3_~arg.offset=0, Thread1_thread2_thidvar0=3, Thread1_thread2_~arg.base=0, Thread1_thread2_~arg.offset=0, Thread2_thread0_thidvar0=5, Thread2_thread0_~arg.base=0, Thread2_thread0_~arg.offset=0, Thread3_thread2_thidvar0=4, Thread3_thread2_~arg.base=0, Thread3_thread2_~arg.offset=0, Thread4_thread1_thidvar0=0, Thread4_thread1_~arg.base=0, Thread4_thread1_~arg.offset=0, Thread5_thread2_thidvar0=1, Thread5_thread2_~arg.base=0, Thread5_thread2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_thread3_#in~arg.base|=0, |Thread0_thread3_#in~arg.offset|=0, |Thread0_thread3_#res.base|=0, |Thread0_thread3_#res.offset|=0, |Thread1_thread2_#in~arg.base|=0, |Thread1_thread2_#in~arg.offset|=0, |Thread1_thread2_#res.base|=0, |Thread1_thread2_#res.offset|=0, |Thread2_thread0_#in~arg.base|=0, |Thread2_thread0_#in~arg.offset|=0, |Thread2_thread0_#res.base|=0, |Thread2_thread0_#res.offset|=0, |Thread3_thread2_#in~arg.base|=0, |Thread3_thread2_#in~arg.offset|=0, |Thread3_thread2_#res.base|=0, |Thread3_thread2_#res.offset|=0, |Thread4_thread1_#in~arg.base|=0, |Thread4_thread1_#in~arg.offset|=0, |Thread4_thread1_#res.base|=0, |Thread4_thread1_#res.offset|=0, |Thread4_thread1_#t~malloc0.base|=92, |Thread4_thread1_#t~malloc0.offset|=0, |Thread5_thread2_#in~arg.base|=0, |Thread5_thread2_#in~arg.offset|=0, |Thread5_thread2_#res.base|=0, |Thread5_thread2_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] JOIN 0 [319] thread0EXIT-->L1248-2: Formula: (= |v_ULTIMATE.start_main_#t~mem12_9| v_Thread2_thread0_thidvar0_14) InVars {ULTIMATE.start_main_#t~mem12=|v_ULTIMATE.start_main_#t~mem12_9|, Thread2_thread0_thidvar0=v_Thread2_thread0_thidvar0_14} OutVars{ULTIMATE.start_main_#t~mem12=|v_ULTIMATE.start_main_#t~mem12_9|, Thread2_thread0_thidvar0=v_Thread2_thread0_thidvar0_14} AuxVars[] AssignedVars[] VAL [Thread0_thread3_thidvar0=2, Thread0_thread3_~arg.base=0, Thread0_thread3_~arg.offset=0, Thread1_thread2_thidvar0=3, Thread1_thread2_~arg.base=0, Thread1_thread2_~arg.offset=0, Thread2_thread0_thidvar0=5, Thread2_thread0_~arg.base=0, Thread2_thread0_~arg.offset=0, Thread3_thread2_thidvar0=4, Thread3_thread2_~arg.base=0, Thread3_thread2_~arg.offset=0, Thread4_thread1_thidvar0=0, Thread4_thread1_~arg.base=0, Thread4_thread1_~arg.offset=0, Thread5_thread2_thidvar0=1, Thread5_thread2_~arg.base=0, Thread5_thread2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_thread3_#in~arg.base|=0, |Thread0_thread3_#in~arg.offset|=0, |Thread0_thread3_#res.base|=0, |Thread0_thread3_#res.offset|=0, |Thread1_thread2_#in~arg.base|=0, |Thread1_thread2_#in~arg.offset|=0, |Thread1_thread2_#res.base|=0, |Thread1_thread2_#res.offset|=0, |Thread2_thread0_#in~arg.base|=0, |Thread2_thread0_#in~arg.offset|=0, |Thread2_thread0_#res.base|=0, |Thread2_thread0_#res.offset|=0, |Thread3_thread2_#in~arg.base|=0, |Thread3_thread2_#in~arg.offset|=0, |Thread3_thread2_#res.base|=0, |Thread3_thread2_#res.offset|=0, |Thread4_thread1_#in~arg.base|=0, |Thread4_thread1_#in~arg.offset|=0, |Thread4_thread1_#res.base|=0, |Thread4_thread1_#res.offset|=0, |Thread4_thread1_#t~malloc0.base|=92, |Thread4_thread1_#t~malloc0.offset|=0, |Thread5_thread2_#in~arg.base|=0, |Thread5_thread2_#in~arg.offset|=0, |Thread5_thread2_#res.base|=0, |Thread5_thread2_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] -1 [122] L1248-2-->L1249: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~mem12=|v_ULTIMATE.start_main_#t~mem12_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem12] VAL [Thread0_thread3_thidvar0=2, Thread0_thread3_~arg.base=0, Thread0_thread3_~arg.offset=0, Thread1_thread2_thidvar0=3, Thread1_thread2_~arg.base=0, Thread1_thread2_~arg.offset=0, Thread2_thread0_thidvar0=5, Thread2_thread0_~arg.base=0, Thread2_thread0_~arg.offset=0, Thread3_thread2_thidvar0=4, Thread3_thread2_~arg.base=0, Thread3_thread2_~arg.offset=0, Thread4_thread1_thidvar0=0, Thread4_thread1_~arg.base=0, Thread4_thread1_~arg.offset=0, Thread5_thread2_thidvar0=1, Thread5_thread2_~arg.base=0, Thread5_thread2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_thread3_#in~arg.base|=0, |Thread0_thread3_#in~arg.offset|=0, |Thread0_thread3_#res.base|=0, |Thread0_thread3_#res.offset|=0, |Thread1_thread2_#in~arg.base|=0, |Thread1_thread2_#in~arg.offset|=0, |Thread1_thread2_#res.base|=0, |Thread1_thread2_#res.offset|=0, |Thread2_thread0_#in~arg.base|=0, |Thread2_thread0_#in~arg.offset|=0, |Thread2_thread0_#res.base|=0, |Thread2_thread0_#res.offset|=0, |Thread3_thread2_#in~arg.base|=0, |Thread3_thread2_#in~arg.offset|=0, |Thread3_thread2_#res.base|=0, |Thread3_thread2_#res.offset|=0, |Thread4_thread1_#in~arg.base|=0, |Thread4_thread1_#in~arg.offset|=0, |Thread4_thread1_#res.base|=0, |Thread4_thread1_#res.offset|=0, |Thread4_thread1_#t~malloc0.base|=92, |Thread4_thread1_#t~malloc0.offset|=0, |Thread5_thread2_#in~arg.base|=0, |Thread5_thread2_#in~arg.offset|=0, |Thread5_thread2_#res.base|=0, |Thread5_thread2_#res.offset|=0, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] -1 [161] L1249-->L1249-1: Formula: (= |v_ULTIMATE.start_main_#t~mem13_2| (select (select |v_#memory_int_23| v_~v~0.base_4) v_~v~0.offset_4)) InVars {#memory_int=|v_#memory_int_23|, ~v~0.offset=v_~v~0.offset_4, ~v~0.base=v_~v~0.base_4} OutVars{#memory_int=|v_#memory_int_23|, ULTIMATE.start_main_#t~mem13=|v_ULTIMATE.start_main_#t~mem13_2|, ~v~0.offset=v_~v~0.offset_4, ~v~0.base=v_~v~0.base_4} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem13] VAL [Thread0_thread3_thidvar0=2, Thread0_thread3_~arg.base=0, Thread0_thread3_~arg.offset=0, Thread1_thread2_thidvar0=3, Thread1_thread2_~arg.base=0, Thread1_thread2_~arg.offset=0, Thread2_thread0_thidvar0=5, Thread2_thread0_~arg.base=0, Thread2_thread0_~arg.offset=0, Thread3_thread2_thidvar0=4, Thread3_thread2_~arg.base=0, Thread3_thread2_~arg.offset=0, Thread4_thread1_thidvar0=0, Thread4_thread1_~arg.base=0, Thread4_thread1_~arg.offset=0, Thread5_thread2_thidvar0=1, Thread5_thread2_~arg.base=0, Thread5_thread2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_thread3_#in~arg.base|=0, |Thread0_thread3_#in~arg.offset|=0, |Thread0_thread3_#res.base|=0, |Thread0_thread3_#res.offset|=0, |Thread1_thread2_#in~arg.base|=0, |Thread1_thread2_#in~arg.offset|=0, |Thread1_thread2_#res.base|=0, |Thread1_thread2_#res.offset|=0, |Thread2_thread0_#in~arg.base|=0, |Thread2_thread0_#in~arg.offset|=0, |Thread2_thread0_#res.base|=0, |Thread2_thread0_#res.offset|=0, |Thread3_thread2_#in~arg.base|=0, |Thread3_thread2_#in~arg.offset|=0, |Thread3_thread2_#res.base|=0, |Thread3_thread2_#res.offset|=0, |Thread4_thread1_#in~arg.base|=0, |Thread4_thread1_#in~arg.offset|=0, |Thread4_thread1_#res.base|=0, |Thread4_thread1_#res.offset|=0, |Thread4_thread1_#t~malloc0.base|=92, |Thread4_thread1_#t~malloc0.offset|=0, |Thread5_thread2_#in~arg.base|=0, |Thread5_thread2_#in~arg.offset|=0, |Thread5_thread2_#res.base|=0, |Thread5_thread2_#res.offset|=0, |ULTIMATE.start_main_#t~mem13|=89, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] -1 [166] L1249-1-->L1249-2: Formula: (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_1| (ite (= |v_ULTIMATE.start_main_#t~mem13_3| 88) 1 0)) InVars {ULTIMATE.start_main_#t~mem13=|v_ULTIMATE.start_main_#t~mem13_3|} OutVars{ULTIMATE.start_main_#t~mem13=|v_ULTIMATE.start_main_#t~mem13_3|, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_1|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_#in~expression] VAL [Thread0_thread3_thidvar0=2, Thread0_thread3_~arg.base=0, Thread0_thread3_~arg.offset=0, Thread1_thread2_thidvar0=3, Thread1_thread2_~arg.base=0, Thread1_thread2_~arg.offset=0, Thread2_thread0_thidvar0=5, Thread2_thread0_~arg.base=0, Thread2_thread0_~arg.offset=0, Thread3_thread2_thidvar0=4, Thread3_thread2_~arg.base=0, Thread3_thread2_~arg.offset=0, Thread4_thread1_thidvar0=0, Thread4_thread1_~arg.base=0, Thread4_thread1_~arg.offset=0, Thread5_thread2_thidvar0=1, Thread5_thread2_~arg.base=0, Thread5_thread2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_thread3_#in~arg.base|=0, |Thread0_thread3_#in~arg.offset|=0, |Thread0_thread3_#res.base|=0, |Thread0_thread3_#res.offset|=0, |Thread1_thread2_#in~arg.base|=0, |Thread1_thread2_#in~arg.offset|=0, |Thread1_thread2_#res.base|=0, |Thread1_thread2_#res.offset|=0, |Thread2_thread0_#in~arg.base|=0, |Thread2_thread0_#in~arg.offset|=0, |Thread2_thread0_#res.base|=0, |Thread2_thread0_#res.offset|=0, |Thread3_thread2_#in~arg.base|=0, |Thread3_thread2_#in~arg.offset|=0, |Thread3_thread2_#res.base|=0, |Thread3_thread2_#res.offset|=0, |Thread4_thread1_#in~arg.base|=0, |Thread4_thread1_#in~arg.offset|=0, |Thread4_thread1_#res.base|=0, |Thread4_thread1_#res.offset|=0, |Thread4_thread1_#t~malloc0.base|=92, |Thread4_thread1_#t~malloc0.offset|=0, |Thread5_thread2_#in~arg.base|=0, |Thread5_thread2_#in~arg.offset|=0, |Thread5_thread2_#res.base|=0, |Thread5_thread2_#res.offset|=0, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_#t~mem13|=89, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] -1 [168] L1249-2-->L1212: Formula: true InVars {} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_1} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] VAL [Thread0_thread3_thidvar0=2, Thread0_thread3_~arg.base=0, Thread0_thread3_~arg.offset=0, Thread1_thread2_thidvar0=3, Thread1_thread2_~arg.base=0, Thread1_thread2_~arg.offset=0, Thread2_thread0_thidvar0=5, Thread2_thread0_~arg.base=0, Thread2_thread0_~arg.offset=0, Thread3_thread2_thidvar0=4, Thread3_thread2_~arg.base=0, Thread3_thread2_~arg.offset=0, Thread4_thread1_thidvar0=0, Thread4_thread1_~arg.base=0, Thread4_thread1_~arg.offset=0, Thread5_thread2_thidvar0=1, Thread5_thread2_~arg.base=0, Thread5_thread2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_thread3_#in~arg.base|=0, |Thread0_thread3_#in~arg.offset|=0, |Thread0_thread3_#res.base|=0, |Thread0_thread3_#res.offset|=0, |Thread1_thread2_#in~arg.base|=0, |Thread1_thread2_#in~arg.offset|=0, |Thread1_thread2_#res.base|=0, |Thread1_thread2_#res.offset|=0, |Thread2_thread0_#in~arg.base|=0, |Thread2_thread0_#in~arg.offset|=0, |Thread2_thread0_#res.base|=0, |Thread2_thread0_#res.offset|=0, |Thread3_thread2_#in~arg.base|=0, |Thread3_thread2_#in~arg.offset|=0, |Thread3_thread2_#res.base|=0, |Thread3_thread2_#res.offset|=0, |Thread4_thread1_#in~arg.base|=0, |Thread4_thread1_#in~arg.offset|=0, |Thread4_thread1_#res.base|=0, |Thread4_thread1_#res.offset|=0, |Thread4_thread1_#t~malloc0.base|=92, |Thread4_thread1_#t~malloc0.offset|=0, |Thread5_thread2_#in~arg.base|=0, |Thread5_thread2_#in~arg.offset|=0, |Thread5_thread2_#res.base|=0, |Thread5_thread2_#res.offset|=0, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_#t~mem13|=89, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] -1 [148] L1212-->L1212-1: Formula: (= v_ULTIMATE.start___VERIFIER_assert_~expression_2 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_2|) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_2|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_2, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_2|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] VAL [Thread0_thread3_thidvar0=2, Thread0_thread3_~arg.base=0, Thread0_thread3_~arg.offset=0, Thread1_thread2_thidvar0=3, Thread1_thread2_~arg.base=0, Thread1_thread2_~arg.offset=0, Thread2_thread0_thidvar0=5, Thread2_thread0_~arg.base=0, Thread2_thread0_~arg.offset=0, Thread3_thread2_thidvar0=4, Thread3_thread2_~arg.base=0, Thread3_thread2_~arg.offset=0, Thread4_thread1_thidvar0=0, Thread4_thread1_~arg.base=0, Thread4_thread1_~arg.offset=0, Thread5_thread2_thidvar0=1, Thread5_thread2_~arg.base=0, Thread5_thread2_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_thread3_#in~arg.base|=0, |Thread0_thread3_#in~arg.offset|=0, |Thread0_thread3_#res.base|=0, |Thread0_thread3_#res.offset|=0, |Thread1_thread2_#in~arg.base|=0, |Thread1_thread2_#in~arg.offset|=0, |Thread1_thread2_#res.base|=0, |Thread1_thread2_#res.offset|=0, |Thread2_thread0_#in~arg.base|=0, |Thread2_thread0_#in~arg.offset|=0, |Thread2_thread0_#res.base|=0, |Thread2_thread0_#res.offset|=0, |Thread3_thread2_#in~arg.base|=0, |Thread3_thread2_#in~arg.offset|=0, |Thread3_thread2_#res.base|=0, |Thread3_thread2_#res.offset|=0, |Thread4_thread1_#in~arg.base|=0, |Thread4_thread1_#in~arg.offset|=0, |Thread4_thread1_#res.base|=0, |Thread4_thread1_#res.offset|=0, |Thread4_thread1_#t~malloc0.base|=92, |Thread4_thread1_#t~malloc0.offset|=0, |Thread5_thread2_#in~arg.base|=0, |Thread5_thread2_#in~arg.offset|=0, |Thread5_thread2_#res.base|=0, |Thread5_thread2_#res.offset|=0, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_#t~mem13|=89, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] -1 [150] L1212-1-->L1212-2: Formula: (= v_ULTIMATE.start___VERIFIER_assert_~expression_3 0) InVars {ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_3} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_3} AuxVars[] AssignedVars[] VAL [Thread0_thread3_thidvar0=2, Thread0_thread3_~arg.base=0, Thread0_thread3_~arg.offset=0, Thread1_thread2_thidvar0=3, Thread1_thread2_~arg.base=0, Thread1_thread2_~arg.offset=0, Thread2_thread0_thidvar0=5, Thread2_thread0_~arg.base=0, Thread2_thread0_~arg.offset=0, Thread3_thread2_thidvar0=4, Thread3_thread2_~arg.base=0, Thread3_thread2_~arg.offset=0, Thread4_thread1_thidvar0=0, Thread4_thread1_~arg.base=0, Thread4_thread1_~arg.offset=0, Thread5_thread2_thidvar0=1, Thread5_thread2_~arg.base=0, Thread5_thread2_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_thread3_#in~arg.base|=0, |Thread0_thread3_#in~arg.offset|=0, |Thread0_thread3_#res.base|=0, |Thread0_thread3_#res.offset|=0, |Thread1_thread2_#in~arg.base|=0, |Thread1_thread2_#in~arg.offset|=0, |Thread1_thread2_#res.base|=0, |Thread1_thread2_#res.offset|=0, |Thread2_thread0_#in~arg.base|=0, |Thread2_thread0_#in~arg.offset|=0, |Thread2_thread0_#res.base|=0, |Thread2_thread0_#res.offset|=0, |Thread3_thread2_#in~arg.base|=0, |Thread3_thread2_#in~arg.offset|=0, |Thread3_thread2_#res.base|=0, |Thread3_thread2_#res.offset|=0, |Thread4_thread1_#in~arg.base|=0, |Thread4_thread1_#in~arg.offset|=0, |Thread4_thread1_#res.base|=0, |Thread4_thread1_#res.offset|=0, |Thread4_thread1_#t~malloc0.base|=92, |Thread4_thread1_#t~malloc0.offset|=0, |Thread5_thread2_#in~arg.base|=0, |Thread5_thread2_#in~arg.offset|=0, |Thread5_thread2_#res.base|=0, |Thread5_thread2_#res.offset|=0, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_#t~mem13|=89, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] -1 [156] L1212-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] VAL [Thread0_thread3_thidvar0=2, Thread0_thread3_~arg.base=0, Thread0_thread3_~arg.offset=0, Thread1_thread2_thidvar0=3, Thread1_thread2_~arg.base=0, Thread1_thread2_~arg.offset=0, Thread2_thread0_thidvar0=5, Thread2_thread0_~arg.base=0, Thread2_thread0_~arg.offset=0, Thread3_thread2_thidvar0=4, Thread3_thread2_~arg.base=0, Thread3_thread2_~arg.offset=0, Thread4_thread1_thidvar0=0, Thread4_thread1_~arg.base=0, Thread4_thread1_~arg.offset=0, Thread5_thread2_thidvar0=1, Thread5_thread2_~arg.base=0, Thread5_thread2_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_thread3_#in~arg.base|=0, |Thread0_thread3_#in~arg.offset|=0, |Thread0_thread3_#res.base|=0, |Thread0_thread3_#res.offset|=0, |Thread1_thread2_#in~arg.base|=0, |Thread1_thread2_#in~arg.offset|=0, |Thread1_thread2_#res.base|=0, |Thread1_thread2_#res.offset|=0, |Thread2_thread0_#in~arg.base|=0, |Thread2_thread0_#in~arg.offset|=0, |Thread2_thread0_#res.base|=0, |Thread2_thread0_#res.offset|=0, |Thread3_thread2_#in~arg.base|=0, |Thread3_thread2_#in~arg.offset|=0, |Thread3_thread2_#res.base|=0, |Thread3_thread2_#res.offset|=0, |Thread4_thread1_#in~arg.base|=0, |Thread4_thread1_#in~arg.offset|=0, |Thread4_thread1_#res.base|=0, |Thread4_thread1_#res.offset|=0, |Thread4_thread1_#t~malloc0.base|=92, |Thread4_thread1_#t~malloc0.offset|=0, |Thread5_thread2_#in~arg.base|=0, |Thread5_thread2_#in~arg.offset|=0, |Thread5_thread2_#res.base|=0, |Thread5_thread2_#res.offset|=0, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_#t~mem13|=89, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] -1 #NULL.base, #NULL.offset := 0, 0; VAL [|#NULL.base|=0, |#NULL.offset|=0] [?] -1 #valid := #valid[0 := 0]; VAL [|#NULL.base|=0, |#NULL.offset|=0] [?] -1 ~v~0.base, ~v~0.offset := 0, 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~v~0.base=0, ~v~0.offset=0] [?] -1 havoc main_#res; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~v~0.base=0, ~v~0.offset=0] [?] -1 havoc main_#t~nondet11, main_#t~mem12, main_#t~mem13, main_~#t~0.base, main_~#t~0.offset; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~v~0.base=0, ~v~0.offset=0] [?] -1 SUMMARY for call main_~#t~0.base, main_~#t~0.offset := #Ultimate.alloc(4); srcloc: L1246 VAL [|#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=0, ~v~0.offset=0] [?] -1 SUMMARY for call write~int(5, main_~#t~0.base, main_~#t~0.offset, 4); srcloc: L1246-1 VAL [|#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=0, ~v~0.offset=0] [?] FORK -1 fork 5 thread0(0, 0); VAL [|#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=0, ~v~0.offset=0] [?] 0 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=0, ~v~0.offset=0] [?] -1 havoc main_#t~nondet11; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=0, ~v~0.offset=0] [?] 0 SUMMARY for call ~#t1~0.base, ~#t1~0.offset := #Ultimate.alloc(4); srcloc: L1231 VAL [thread0_~arg.base=0, thread0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=0, ~v~0.offset=0] [?] 0 SUMMARY for call ~#t2~0.base, ~#t2~0.offset := #Ultimate.alloc(4); srcloc: L1231-1 VAL [thread0_~arg.base=0, thread0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=0, ~v~0.offset=0] [?] 0 SUMMARY for call ~#t3~0.base, ~#t3~0.offset := #Ultimate.alloc(4); srcloc: L1231-2 VAL [thread0_~arg.base=0, thread0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=0, ~v~0.offset=0] [?] 0 SUMMARY for call ~#t4~0.base, ~#t4~0.offset := #Ultimate.alloc(4); srcloc: L1231-3 VAL [thread0_~arg.base=0, thread0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=0, ~v~0.offset=0] [?] 0 SUMMARY for call ~#t5~0.base, ~#t5~0.offset := #Ultimate.alloc(4); srcloc: L1231-4 VAL [thread0_~arg.base=0, thread0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=0, ~v~0.offset=0] [?] 0 SUMMARY for call write~int(0, ~#t1~0.base, ~#t1~0.offset, 4); srcloc: L1231-5 VAL [thread0_~arg.base=0, thread0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=0, ~v~0.offset=0] [?] FORK 0 fork 0 thread1(0, 0); VAL [thread0_~arg.base=0, thread0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=0, ~v~0.offset=0] [?] 1 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=0, ~v~0.offset=0] [?] 1 SUMMARY for call #t~malloc0.base, #t~malloc0.offset := #Ultimate.alloc(1); srcloc: L1216 VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=0, ~v~0.offset=0] [?] 1 ~v~0.base, ~v~0.offset := #t~malloc0.base, #t~malloc0.offset; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 1 #res.base, #res.offset := 0, 0; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 1 assume true; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] -1 SUMMARY for call main_#t~mem12 := read~int(main_~#t~0.base, main_~#t~0.offset, 4); srcloc: L1248 VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 havoc #t~nondet1; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 SUMMARY for call #t~mem2 := read~int(~#t1~0.base, ~#t1~0.offset, 4); srcloc: L1233 VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_#t~mem2|=0, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] JOIN 1 join #t~mem2; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_#t~mem2|=0, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 havoc #t~mem2; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 SUMMARY for call write~int(1, ~#t2~0.base, ~#t2~0.offset, 4); srcloc: L1234 VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] FORK 0 fork 1 thread2(0, 0); VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 2 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 havoc #t~nondet3; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 2 SUMMARY for call write~int(88, ~v~0.base, ~v~0.offset, 1); srcloc: L1221 VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 2 #res.base, #res.offset := 0, 0; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 SUMMARY for call write~int(2, ~#t3~0.base, ~#t3~0.offset, 4); srcloc: L1235 VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] FORK 0 fork 2 thread3(0, 0); VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 2 assume true; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 havoc #t~nondet4; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 3 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 SUMMARY for call write~int(3, ~#t4~0.base, ~#t4~0.offset, 4); srcloc: L1236 VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] FORK 0 fork 3 thread2(0, 0); VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 havoc #t~nondet5; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 SUMMARY for call write~int(4, ~#t5~0.base, ~#t5~0.offset, 4); srcloc: L1237 VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] FORK 0 fork 4 thread2(0, 0); VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 4 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 4 SUMMARY for call write~int(88, ~v~0.base, ~v~0.offset, 1); srcloc: L1221 VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 4 #res.base, #res.offset := 0, 0; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 havoc #t~nondet6; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 SUMMARY for call #t~mem7 := read~int(~#t2~0.base, ~#t2~0.offset, 4); srcloc: L1238 VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_#t~mem7|=1, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] JOIN 2 join #t~mem7; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_#t~mem7|=1, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 havoc #t~mem7; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 SUMMARY for call #t~mem8 := read~int(~#t3~0.base, ~#t3~0.offset, 4); srcloc: L1239 VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_#t~mem8|=2, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 4 assume true; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_#t~mem8|=2, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 5 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_#t~mem8|=2, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 5 SUMMARY for call write~int(88, ~v~0.base, ~v~0.offset, 1); srcloc: L1221 VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_#t~mem8|=2, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 5 #res.base, #res.offset := 0, 0; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_#t~mem8|=2, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 5 assume true; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_#t~mem8|=2, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 3 SUMMARY for call write~int(89, ~v~0.base, ~v~0.offset, 1); srcloc: L1226 VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_#t~mem8|=2, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 3 #res.base, #res.offset := 0, 0; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_#t~mem8|=2, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |thread3_#res.base|=0, |thread3_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 3 assume true; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_#t~mem8|=2, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |thread3_#res.base|=0, |thread3_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] JOIN 3 join #t~mem8; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_#t~mem8|=2, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |thread3_#res.base|=0, |thread3_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 havoc #t~mem8; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |thread3_#res.base|=0, |thread3_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 SUMMARY for call #t~mem9 := read~int(~#t4~0.base, ~#t4~0.offset, 4); srcloc: L1240 VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_#t~mem9|=3, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |thread3_#res.base|=0, |thread3_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] JOIN 5 join #t~mem9; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_#t~mem9|=3, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |thread3_#res.base|=0, |thread3_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 havoc #t~mem9; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |thread3_#res.base|=0, |thread3_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 SUMMARY for call #t~mem10 := read~int(~#t5~0.base, ~#t5~0.offset, 4); srcloc: L1241 VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_#t~mem10|=4, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |thread3_#res.base|=0, |thread3_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] JOIN 4 join #t~mem10; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_#t~mem10|=4, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |thread3_#res.base|=0, |thread3_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 havoc #t~mem10; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |thread3_#res.base|=0, |thread3_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 #res.base, #res.offset := 0, 0; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_#res.base|=0, |thread0_#res.offset|=0, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |thread3_#res.base|=0, |thread3_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 SUMMARY for call ULTIMATE.dealloc(~#t1~0.base, ~#t1~0.offset); srcloc: L1231-6 VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_#res.base|=0, |thread0_#res.offset|=0, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |thread3_#res.base|=0, |thread3_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 havoc ~#t1~0.base, ~#t1~0.offset; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_#res.base|=0, |thread0_#res.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |thread3_#res.base|=0, |thread3_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 SUMMARY for call ULTIMATE.dealloc(~#t2~0.base, ~#t2~0.offset); srcloc: L1231-8 VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_#res.base|=0, |thread0_#res.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |thread3_#res.base|=0, |thread3_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 havoc ~#t2~0.base, ~#t2~0.offset; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_#res.base|=0, |thread0_#res.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |thread3_#res.base|=0, |thread3_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 SUMMARY for call ULTIMATE.dealloc(~#t3~0.base, ~#t3~0.offset); srcloc: L1231-10 VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_#res.base|=0, |thread0_#res.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |thread3_#res.base|=0, |thread3_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 havoc ~#t3~0.base, ~#t3~0.offset; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_#res.base|=0, |thread0_#res.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |thread3_#res.base|=0, |thread3_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 SUMMARY for call ULTIMATE.dealloc(~#t4~0.base, ~#t4~0.offset); srcloc: L1231-12 VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_#res.base|=0, |thread0_#res.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |thread3_#res.base|=0, |thread3_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 havoc ~#t4~0.base, ~#t4~0.offset; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_#res.base|=0, |thread0_#res.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |thread3_#res.base|=0, |thread3_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 SUMMARY for call ULTIMATE.dealloc(~#t5~0.base, ~#t5~0.offset); srcloc: L1231-14 VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_#res.base|=0, |thread0_#res.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |thread3_#res.base|=0, |thread3_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 havoc ~#t5~0.base, ~#t5~0.offset; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_#res.base|=0, |thread0_#res.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |thread3_#res.base|=0, |thread3_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 assume true; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_#res.base|=0, |thread0_#res.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |thread3_#res.base|=0, |thread3_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] JOIN 0 join main_#t~mem12; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_#res.base|=0, |thread0_#res.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |thread3_#res.base|=0, |thread3_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] -1 havoc main_#t~mem12; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_#res.base|=0, |thread0_#res.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |thread3_#res.base|=0, |thread3_#res.offset|=0, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] -1 SUMMARY for call main_#t~mem13 := read~int(~v~0.base, ~v~0.offset, 1); srcloc: L1249 VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_#res.base|=0, |thread0_#res.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |thread3_#res.base|=0, |thread3_#res.offset|=0, |ULTIMATE.start_main_#t~mem13|=89, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] -1 __VERIFIER_assert_#in~expression := (if 88 == main_#t~mem13 then 1 else 0); VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_#res.base|=0, |thread0_#res.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |thread3_#res.base|=0, |thread3_#res.offset|=0, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_#t~mem13|=89, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] -1 havoc __VERIFIER_assert_~expression; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_#res.base|=0, |thread0_#res.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |thread3_#res.base|=0, |thread3_#res.offset|=0, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_#t~mem13|=89, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] -1 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_#res.base|=0, |thread0_#res.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |thread3_#res.base|=0, |thread3_#res.offset|=0, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_#t~mem13|=89, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] -1 assume 0 == __VERIFIER_assert_~expression; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_#res.base|=0, |thread0_#res.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |thread3_#res.base|=0, |thread3_#res.offset|=0, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_#t~mem13|=89, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] -1 assume !false; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_#res.base|=0, |thread0_#res.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |thread3_#res.base|=0, |thread3_#res.offset|=0, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_#t~mem13|=89, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] ----- ----- class de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder.RCFGBacktranslator [?] -1 #NULL.base, #NULL.offset := 0, 0; VAL [|#NULL.base|=0, |#NULL.offset|=0] [?] -1 #valid := #valid[0 := 0]; VAL [|#NULL.base|=0, |#NULL.offset|=0] [?] -1 ~v~0.base, ~v~0.offset := 0, 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~v~0.base=0, ~v~0.offset=0] [?] -1 havoc main_#res; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~v~0.base=0, ~v~0.offset=0] [?] -1 havoc main_#t~nondet11, main_#t~mem12, main_#t~mem13, main_~#t~0.base, main_~#t~0.offset; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~v~0.base=0, ~v~0.offset=0] [?] -1 SUMMARY for call main_~#t~0.base, main_~#t~0.offset := #Ultimate.alloc(4); srcloc: L1246 VAL [|#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=0, ~v~0.offset=0] [?] -1 SUMMARY for call write~int(5, main_~#t~0.base, main_~#t~0.offset, 4); srcloc: L1246-1 VAL [|#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=0, ~v~0.offset=0] [?] FORK -1 fork 5 thread0(0, 0); VAL [|#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=0, ~v~0.offset=0] [?] 0 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=0, ~v~0.offset=0] [?] -1 havoc main_#t~nondet11; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=0, ~v~0.offset=0] [?] 0 SUMMARY for call ~#t1~0.base, ~#t1~0.offset := #Ultimate.alloc(4); srcloc: L1231 VAL [thread0_~arg.base=0, thread0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=0, ~v~0.offset=0] [?] 0 SUMMARY for call ~#t2~0.base, ~#t2~0.offset := #Ultimate.alloc(4); srcloc: L1231-1 VAL [thread0_~arg.base=0, thread0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=0, ~v~0.offset=0] [?] 0 SUMMARY for call ~#t3~0.base, ~#t3~0.offset := #Ultimate.alloc(4); srcloc: L1231-2 VAL [thread0_~arg.base=0, thread0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=0, ~v~0.offset=0] [?] 0 SUMMARY for call ~#t4~0.base, ~#t4~0.offset := #Ultimate.alloc(4); srcloc: L1231-3 VAL [thread0_~arg.base=0, thread0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=0, ~v~0.offset=0] [?] 0 SUMMARY for call ~#t5~0.base, ~#t5~0.offset := #Ultimate.alloc(4); srcloc: L1231-4 VAL [thread0_~arg.base=0, thread0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=0, ~v~0.offset=0] [?] 0 SUMMARY for call write~int(0, ~#t1~0.base, ~#t1~0.offset, 4); srcloc: L1231-5 VAL [thread0_~arg.base=0, thread0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=0, ~v~0.offset=0] [?] FORK 0 fork 0 thread1(0, 0); VAL [thread0_~arg.base=0, thread0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=0, ~v~0.offset=0] [?] 1 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=0, ~v~0.offset=0] [?] 1 SUMMARY for call #t~malloc0.base, #t~malloc0.offset := #Ultimate.alloc(1); srcloc: L1216 VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=0, ~v~0.offset=0] [?] 1 ~v~0.base, ~v~0.offset := #t~malloc0.base, #t~malloc0.offset; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 1 #res.base, #res.offset := 0, 0; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 1 assume true; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] -1 SUMMARY for call main_#t~mem12 := read~int(main_~#t~0.base, main_~#t~0.offset, 4); srcloc: L1248 VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 havoc #t~nondet1; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 SUMMARY for call #t~mem2 := read~int(~#t1~0.base, ~#t1~0.offset, 4); srcloc: L1233 VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_#t~mem2|=0, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] JOIN 1 join #t~mem2; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_#t~mem2|=0, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 havoc #t~mem2; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 SUMMARY for call write~int(1, ~#t2~0.base, ~#t2~0.offset, 4); srcloc: L1234 VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] FORK 0 fork 1 thread2(0, 0); VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 2 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 havoc #t~nondet3; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 2 SUMMARY for call write~int(88, ~v~0.base, ~v~0.offset, 1); srcloc: L1221 VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 2 #res.base, #res.offset := 0, 0; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 SUMMARY for call write~int(2, ~#t3~0.base, ~#t3~0.offset, 4); srcloc: L1235 VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] FORK 0 fork 2 thread3(0, 0); VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 2 assume true; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 havoc #t~nondet4; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 3 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 SUMMARY for call write~int(3, ~#t4~0.base, ~#t4~0.offset, 4); srcloc: L1236 VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] FORK 0 fork 3 thread2(0, 0); VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 havoc #t~nondet5; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 SUMMARY for call write~int(4, ~#t5~0.base, ~#t5~0.offset, 4); srcloc: L1237 VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] FORK 0 fork 4 thread2(0, 0); VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 4 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 4 SUMMARY for call write~int(88, ~v~0.base, ~v~0.offset, 1); srcloc: L1221 VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 4 #res.base, #res.offset := 0, 0; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 havoc #t~nondet6; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 SUMMARY for call #t~mem7 := read~int(~#t2~0.base, ~#t2~0.offset, 4); srcloc: L1238 VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_#t~mem7|=1, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] JOIN 2 join #t~mem7; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_#t~mem7|=1, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 havoc #t~mem7; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 SUMMARY for call #t~mem8 := read~int(~#t3~0.base, ~#t3~0.offset, 4); srcloc: L1239 VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_#t~mem8|=2, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 4 assume true; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_#t~mem8|=2, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 5 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_#t~mem8|=2, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 5 SUMMARY for call write~int(88, ~v~0.base, ~v~0.offset, 1); srcloc: L1221 VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_#t~mem8|=2, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 5 #res.base, #res.offset := 0, 0; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_#t~mem8|=2, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 5 assume true; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_#t~mem8|=2, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 3 SUMMARY for call write~int(89, ~v~0.base, ~v~0.offset, 1); srcloc: L1226 VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_#t~mem8|=2, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 3 #res.base, #res.offset := 0, 0; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_#t~mem8|=2, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |thread3_#res.base|=0, |thread3_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 3 assume true; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_#t~mem8|=2, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |thread3_#res.base|=0, |thread3_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] JOIN 3 join #t~mem8; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_#t~mem8|=2, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |thread3_#res.base|=0, |thread3_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 havoc #t~mem8; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |thread3_#res.base|=0, |thread3_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 SUMMARY for call #t~mem9 := read~int(~#t4~0.base, ~#t4~0.offset, 4); srcloc: L1240 VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_#t~mem9|=3, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |thread3_#res.base|=0, |thread3_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] JOIN 5 join #t~mem9; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_#t~mem9|=3, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |thread3_#res.base|=0, |thread3_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 havoc #t~mem9; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |thread3_#res.base|=0, |thread3_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 SUMMARY for call #t~mem10 := read~int(~#t5~0.base, ~#t5~0.offset, 4); srcloc: L1241 VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_#t~mem10|=4, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |thread3_#res.base|=0, |thread3_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] JOIN 4 join #t~mem10; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_#t~mem10|=4, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |thread3_#res.base|=0, |thread3_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 havoc #t~mem10; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |thread3_#res.base|=0, |thread3_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 #res.base, #res.offset := 0, 0; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_#res.base|=0, |thread0_#res.offset|=0, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |thread3_#res.base|=0, |thread3_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 SUMMARY for call ULTIMATE.dealloc(~#t1~0.base, ~#t1~0.offset); srcloc: L1231-6 VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_#res.base|=0, |thread0_#res.offset|=0, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |thread3_#res.base|=0, |thread3_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 havoc ~#t1~0.base, ~#t1~0.offset; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_#res.base|=0, |thread0_#res.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |thread3_#res.base|=0, |thread3_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 SUMMARY for call ULTIMATE.dealloc(~#t2~0.base, ~#t2~0.offset); srcloc: L1231-8 VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_#res.base|=0, |thread0_#res.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |thread3_#res.base|=0, |thread3_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 havoc ~#t2~0.base, ~#t2~0.offset; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_#res.base|=0, |thread0_#res.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |thread3_#res.base|=0, |thread3_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 SUMMARY for call ULTIMATE.dealloc(~#t3~0.base, ~#t3~0.offset); srcloc: L1231-10 VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_#res.base|=0, |thread0_#res.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |thread3_#res.base|=0, |thread3_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 havoc ~#t3~0.base, ~#t3~0.offset; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_#res.base|=0, |thread0_#res.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |thread3_#res.base|=0, |thread3_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 SUMMARY for call ULTIMATE.dealloc(~#t4~0.base, ~#t4~0.offset); srcloc: L1231-12 VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_#res.base|=0, |thread0_#res.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |thread3_#res.base|=0, |thread3_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 havoc ~#t4~0.base, ~#t4~0.offset; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_#res.base|=0, |thread0_#res.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |thread3_#res.base|=0, |thread3_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 SUMMARY for call ULTIMATE.dealloc(~#t5~0.base, ~#t5~0.offset); srcloc: L1231-14 VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_#res.base|=0, |thread0_#res.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |thread3_#res.base|=0, |thread3_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 havoc ~#t5~0.base, ~#t5~0.offset; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_#res.base|=0, |thread0_#res.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |thread3_#res.base|=0, |thread3_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 assume true; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_#res.base|=0, |thread0_#res.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |thread3_#res.base|=0, |thread3_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] JOIN 0 join main_#t~mem12; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_#res.base|=0, |thread0_#res.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |thread3_#res.base|=0, |thread3_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] -1 havoc main_#t~mem12; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_#res.base|=0, |thread0_#res.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |thread3_#res.base|=0, |thread3_#res.offset|=0, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] -1 SUMMARY for call main_#t~mem13 := read~int(~v~0.base, ~v~0.offset, 1); srcloc: L1249 VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_#res.base|=0, |thread0_#res.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |thread3_#res.base|=0, |thread3_#res.offset|=0, |ULTIMATE.start_main_#t~mem13|=89, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] -1 __VERIFIER_assert_#in~expression := (if 88 == main_#t~mem13 then 1 else 0); VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_#res.base|=0, |thread0_#res.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |thread3_#res.base|=0, |thread3_#res.offset|=0, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_#t~mem13|=89, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] -1 havoc __VERIFIER_assert_~expression; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_#res.base|=0, |thread0_#res.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |thread3_#res.base|=0, |thread3_#res.offset|=0, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_#t~mem13|=89, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] -1 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_#res.base|=0, |thread0_#res.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |thread3_#res.base|=0, |thread3_#res.offset|=0, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_#t~mem13|=89, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] -1 assume 0 == __VERIFIER_assert_~expression; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_#res.base|=0, |thread0_#res.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |thread3_#res.base|=0, |thread3_#res.offset|=0, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_#t~mem13|=89, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] -1 assume !false; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_#res.base|=0, |thread0_#res.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |thread3_#res.base|=0, |thread3_#res.offset|=0, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_#t~mem13|=89, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] -1 #NULL.base, #NULL.offset := 0, 0; VAL [#NULL.base=0, #NULL.offset=0] [?] -1 #valid := #valid[0 := 0]; VAL [#NULL.base=0, #NULL.offset=0] [L1213] -1 ~v~0.base, ~v~0.offset := 0, 0; VAL [#NULL.base=0, #NULL.offset=0, ~v~0.base=0, ~v~0.offset=0] [?] -1 havoc main_#res; VAL [#NULL.base=0, #NULL.offset=0, ~v~0.base=0, ~v~0.offset=0] [?] -1 havoc main_#t~nondet11, main_#t~mem12, main_#t~mem13, main_~#t~0.base, main_~#t~0.offset; VAL [#NULL.base=0, #NULL.offset=0, ~v~0.base=0, ~v~0.offset=0] [L1246] -1 call main_~#t~0.base, main_~#t~0.offset := #Ultimate.alloc(4); VAL [#NULL.base=0, #NULL.offset=0, main_~#t~0.base=94, main_~#t~0.offset=0, ~v~0.base=0, ~v~0.offset=0] [L1247] -1 call write~int(5, main_~#t~0.base, main_~#t~0.offset, 4); VAL [#NULL.base=0, #NULL.offset=0, main_~#t~0.base=94, main_~#t~0.offset=0, ~v~0.base=0, ~v~0.offset=0] [L1247] FORK -1 fork 5 thread0(0, 0); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t~0.base=94, main_~#t~0.offset=0, ~v~0.base=0, ~v~0.offset=0] [L1229-L1243] 0 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset; VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t~0.base=94, main_~#t~0.offset=0, ~arg.base=0, ~arg.offset=0, ~v~0.base=0, ~v~0.offset=0] [L1247] -1 havoc main_#t~nondet11; VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t~0.base=94, main_~#t~0.offset=0, ~arg.base=0, ~arg.offset=0, ~v~0.base=0, ~v~0.offset=0] [L1231] 0 call ~#t1~0.base, ~#t1~0.offset := #Ultimate.alloc(4); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~arg.base=0, ~arg.offset=0, ~v~0.base=0, ~v~0.offset=0] [L1231] 0 call ~#t2~0.base, ~#t2~0.offset := #Ultimate.alloc(4); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~arg.base=0, ~arg.offset=0, ~v~0.base=0, ~v~0.offset=0] [L1231] 0 call ~#t3~0.base, ~#t3~0.offset := #Ultimate.alloc(4); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~arg.base=0, ~arg.offset=0, ~v~0.base=0, ~v~0.offset=0] [L1231] 0 call ~#t4~0.base, ~#t4~0.offset := #Ultimate.alloc(4); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~arg.base=0, ~arg.offset=0, ~v~0.base=0, ~v~0.offset=0] [L1231] 0 call ~#t5~0.base, ~#t5~0.offset := #Ultimate.alloc(4); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.offset=0, ~v~0.base=0, ~v~0.offset=0] [L1232] 0 call write~int(0, ~#t1~0.base, ~#t1~0.offset, 4); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.offset=0, ~v~0.base=0, ~v~0.offset=0] [L1232] FORK 0 fork 0 thread1(0, 0); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.offset=0, ~v~0.base=0, ~v~0.offset=0] [L1214-L1218] 1 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=0, ~v~0.offset=0] [L1216] 1 call #t~malloc0.base, #t~malloc0.offset := #Ultimate.alloc(1); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=0, ~v~0.offset=0] [L1216] 1 ~v~0.base, ~v~0.offset := #t~malloc0.base, #t~malloc0.offset; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1217] 1 #res.base, #res.offset := 0, 0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1214-L1218] 1 ensures true; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1248] -1 call main_#t~mem12 := read~int(main_~#t~0.base, main_~#t~0.offset, 4); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1232] 0 havoc #t~nondet1; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1233] 0 call #t~mem2 := read~int(~#t1~0.base, ~#t1~0.offset, 4); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, #t~mem2=0, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1233] JOIN 1 join #t~mem2; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, #t~mem2=0, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1233] 0 havoc #t~mem2; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1234] 0 call write~int(1, ~#t2~0.base, ~#t2~0.offset, 4); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1234] FORK 0 fork 1 thread2(0, 0); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1219-L1223] 2 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1234] 0 havoc #t~nondet3; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1221] 2 call write~int(88, ~v~0.base, ~v~0.offset, 1); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1222] 2 #res.base, #res.offset := 0, 0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1235] 0 call write~int(2, ~#t3~0.base, ~#t3~0.offset, 4); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1235] FORK 0 fork 2 thread3(0, 0); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1219-L1223] 2 ensures true; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1235] 0 havoc #t~nondet4; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1224-L1228] 3 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1236] 0 call write~int(3, ~#t4~0.base, ~#t4~0.offset, 4); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1236] FORK 0 fork 3 thread2(0, 0); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1236] 0 havoc #t~nondet5; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1237] 0 call write~int(4, ~#t5~0.base, ~#t5~0.offset, 4); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1237] FORK 0 fork 4 thread2(0, 0); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1219-L1223] 4 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1221] 4 call write~int(88, ~v~0.base, ~v~0.offset, 1); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1222] 4 #res.base, #res.offset := 0, 0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1237] 0 havoc #t~nondet6; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1238] 0 call #t~mem7 := read~int(~#t2~0.base, ~#t2~0.offset, 4); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, #t~mem7=1, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1238] JOIN 2 join #t~mem7; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, #t~mem7=1, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1238] 0 havoc #t~mem7; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1239] 0 call #t~mem8 := read~int(~#t3~0.base, ~#t3~0.offset, 4); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, #t~mem8=2, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1219-L1223] 4 ensures true; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, #t~mem8=2, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1219-L1223] 5 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, #t~mem8=2, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1221] 5 call write~int(88, ~v~0.base, ~v~0.offset, 1); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, #t~mem8=2, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1222] 5 #res.base, #res.offset := 0, 0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, #t~mem8=2, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1219-L1223] 5 ensures true; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, #t~mem8=2, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1226] 3 call write~int(89, ~v~0.base, ~v~0.offset, 1); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, #t~mem8=2, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1227] 3 #res.base, #res.offset := 0, 0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, #t~mem8=2, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1224-L1228] 3 ensures true; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, #t~mem8=2, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1239] JOIN 3 join #t~mem8; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, #t~mem8=2, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1239] 0 havoc #t~mem8; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1240] 0 call #t~mem9 := read~int(~#t4~0.base, ~#t4~0.offset, 4); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, #t~mem9=3, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1240] JOIN 5 join #t~mem9; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, #t~mem9=3, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1240] 0 havoc #t~mem9; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1241] 0 call #t~mem10 := read~int(~#t5~0.base, ~#t5~0.offset, 4); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, #t~mem10=4, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1241] JOIN 4 join #t~mem10; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, #t~mem10=4, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1241] 0 havoc #t~mem10; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1242] 0 #res.base, #res.offset := 0, 0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1231] 0 call ULTIMATE.dealloc(~#t1~0.base, ~#t1~0.offset); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1242] 0 havoc ~#t1~0.base, ~#t1~0.offset; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1231] 0 call ULTIMATE.dealloc(~#t2~0.base, ~#t2~0.offset); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1242] 0 havoc ~#t2~0.base, ~#t2~0.offset; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1231] 0 call ULTIMATE.dealloc(~#t3~0.base, ~#t3~0.offset); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1242] 0 havoc ~#t3~0.base, ~#t3~0.offset; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1231] 0 call ULTIMATE.dealloc(~#t4~0.base, ~#t4~0.offset); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1242] 0 havoc ~#t4~0.base, ~#t4~0.offset; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1231] 0 call ULTIMATE.dealloc(~#t5~0.base, ~#t5~0.offset); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1242] 0 havoc ~#t5~0.base, ~#t5~0.offset; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1229-L1243] 0 ensures true; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1248] JOIN 0 join main_#t~mem12; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1248] -1 havoc main_#t~mem12; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_~#t~0.base=94, main_~#t~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1249] -1 call main_#t~mem13 := read~int(~v~0.base, ~v~0.offset, 1); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_#t~mem13=89, main_~#t~0.base=94, main_~#t~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1249] -1 __VERIFIER_assert_#in~expression := (if 88 == main_#t~mem13 then 1 else 0); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, __VERIFIER_assert_#in~expression=0, main_#t~mem13=89, main_~#t~0.base=94, main_~#t~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1249] -1 havoc __VERIFIER_assert_~expression; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, __VERIFIER_assert_#in~expression=0, main_#t~mem13=89, main_~#t~0.base=94, main_~#t~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1212] -1 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=0, main_#t~mem13=89, main_~#t~0.base=94, main_~#t~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1212] -1 assume 0 == __VERIFIER_assert_~expression; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=0, main_#t~mem13=89, main_~#t~0.base=94, main_~#t~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1212] -1 assert false; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=0, main_#t~mem13=89, main_~#t~0.base=94, main_~#t~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] ----- ----- class de.uni_freiburg.informatik.ultimate.boogie.preprocessor.BoogiePreprocessorBacktranslator [?] -1 #NULL.base, #NULL.offset := 0, 0; VAL [#NULL.base=0, #NULL.offset=0] [?] -1 #valid := #valid[0 := 0]; VAL [#NULL.base=0, #NULL.offset=0] [L1213] -1 ~v~0.base, ~v~0.offset := 0, 0; VAL [#NULL.base=0, #NULL.offset=0, ~v~0.base=0, ~v~0.offset=0] [?] -1 havoc main_#res; VAL [#NULL.base=0, #NULL.offset=0, ~v~0.base=0, ~v~0.offset=0] [?] -1 havoc main_#t~nondet11, main_#t~mem12, main_#t~mem13, main_~#t~0.base, main_~#t~0.offset; VAL [#NULL.base=0, #NULL.offset=0, ~v~0.base=0, ~v~0.offset=0] [L1246] -1 call main_~#t~0.base, main_~#t~0.offset := #Ultimate.alloc(4); VAL [#NULL.base=0, #NULL.offset=0, main_~#t~0.base=94, main_~#t~0.offset=0, ~v~0.base=0, ~v~0.offset=0] [L1247] -1 call write~int(5, main_~#t~0.base, main_~#t~0.offset, 4); VAL [#NULL.base=0, #NULL.offset=0, main_~#t~0.base=94, main_~#t~0.offset=0, ~v~0.base=0, ~v~0.offset=0] [L1247] FORK -1 fork 5 thread0(0, 0); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t~0.base=94, main_~#t~0.offset=0, ~v~0.base=0, ~v~0.offset=0] [L1229-L1243] 0 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset; VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t~0.base=94, main_~#t~0.offset=0, ~arg.base=0, ~arg.offset=0, ~v~0.base=0, ~v~0.offset=0] [L1247] -1 havoc main_#t~nondet11; VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t~0.base=94, main_~#t~0.offset=0, ~arg.base=0, ~arg.offset=0, ~v~0.base=0, ~v~0.offset=0] [L1231] 0 call ~#t1~0.base, ~#t1~0.offset := #Ultimate.alloc(4); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~arg.base=0, ~arg.offset=0, ~v~0.base=0, ~v~0.offset=0] [L1231] 0 call ~#t2~0.base, ~#t2~0.offset := #Ultimate.alloc(4); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~arg.base=0, ~arg.offset=0, ~v~0.base=0, ~v~0.offset=0] [L1231] 0 call ~#t3~0.base, ~#t3~0.offset := #Ultimate.alloc(4); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~arg.base=0, ~arg.offset=0, ~v~0.base=0, ~v~0.offset=0] [L1231] 0 call ~#t4~0.base, ~#t4~0.offset := #Ultimate.alloc(4); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~arg.base=0, ~arg.offset=0, ~v~0.base=0, ~v~0.offset=0] [L1231] 0 call ~#t5~0.base, ~#t5~0.offset := #Ultimate.alloc(4); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.offset=0, ~v~0.base=0, ~v~0.offset=0] [L1232] 0 call write~int(0, ~#t1~0.base, ~#t1~0.offset, 4); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.offset=0, ~v~0.base=0, ~v~0.offset=0] [L1232] FORK 0 fork 0 thread1(0, 0); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.offset=0, ~v~0.base=0, ~v~0.offset=0] [L1214-L1218] 1 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=0, ~v~0.offset=0] [L1216] 1 call #t~malloc0.base, #t~malloc0.offset := #Ultimate.alloc(1); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=0, ~v~0.offset=0] [L1216] 1 ~v~0.base, ~v~0.offset := #t~malloc0.base, #t~malloc0.offset; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1217] 1 #res.base, #res.offset := 0, 0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1214-L1218] 1 ensures true; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1248] -1 call main_#t~mem12 := read~int(main_~#t~0.base, main_~#t~0.offset, 4); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1232] 0 havoc #t~nondet1; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1233] 0 call #t~mem2 := read~int(~#t1~0.base, ~#t1~0.offset, 4); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, #t~mem2=0, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1233] JOIN 1 join #t~mem2; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, #t~mem2=0, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1233] 0 havoc #t~mem2; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1234] 0 call write~int(1, ~#t2~0.base, ~#t2~0.offset, 4); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1234] FORK 0 fork 1 thread2(0, 0); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1219-L1223] 2 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1234] 0 havoc #t~nondet3; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1221] 2 call write~int(88, ~v~0.base, ~v~0.offset, 1); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1222] 2 #res.base, #res.offset := 0, 0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1235] 0 call write~int(2, ~#t3~0.base, ~#t3~0.offset, 4); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1235] FORK 0 fork 2 thread3(0, 0); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1219-L1223] 2 ensures true; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1235] 0 havoc #t~nondet4; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1224-L1228] 3 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1236] 0 call write~int(3, ~#t4~0.base, ~#t4~0.offset, 4); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1236] FORK 0 fork 3 thread2(0, 0); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1236] 0 havoc #t~nondet5; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1237] 0 call write~int(4, ~#t5~0.base, ~#t5~0.offset, 4); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1237] FORK 0 fork 4 thread2(0, 0); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1219-L1223] 4 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1221] 4 call write~int(88, ~v~0.base, ~v~0.offset, 1); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1222] 4 #res.base, #res.offset := 0, 0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1237] 0 havoc #t~nondet6; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1238] 0 call #t~mem7 := read~int(~#t2~0.base, ~#t2~0.offset, 4); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, #t~mem7=1, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1238] JOIN 2 join #t~mem7; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, #t~mem7=1, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1238] 0 havoc #t~mem7; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1239] 0 call #t~mem8 := read~int(~#t3~0.base, ~#t3~0.offset, 4); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, #t~mem8=2, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1219-L1223] 4 ensures true; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, #t~mem8=2, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1219-L1223] 5 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, #t~mem8=2, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1221] 5 call write~int(88, ~v~0.base, ~v~0.offset, 1); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, #t~mem8=2, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1222] 5 #res.base, #res.offset := 0, 0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, #t~mem8=2, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1219-L1223] 5 ensures true; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, #t~mem8=2, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1226] 3 call write~int(89, ~v~0.base, ~v~0.offset, 1); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, #t~mem8=2, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1227] 3 #res.base, #res.offset := 0, 0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, #t~mem8=2, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1224-L1228] 3 ensures true; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, #t~mem8=2, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1239] JOIN 3 join #t~mem8; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, #t~mem8=2, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1239] 0 havoc #t~mem8; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1240] 0 call #t~mem9 := read~int(~#t4~0.base, ~#t4~0.offset, 4); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, #t~mem9=3, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1240] JOIN 5 join #t~mem9; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, #t~mem9=3, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1240] 0 havoc #t~mem9; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1241] 0 call #t~mem10 := read~int(~#t5~0.base, ~#t5~0.offset, 4); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, #t~mem10=4, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1241] JOIN 4 join #t~mem10; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, #t~mem10=4, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1241] 0 havoc #t~mem10; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1242] 0 #res.base, #res.offset := 0, 0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1231] 0 call ULTIMATE.dealloc(~#t1~0.base, ~#t1~0.offset); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1242] 0 havoc ~#t1~0.base, ~#t1~0.offset; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1231] 0 call ULTIMATE.dealloc(~#t2~0.base, ~#t2~0.offset); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1242] 0 havoc ~#t2~0.base, ~#t2~0.offset; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1231] 0 call ULTIMATE.dealloc(~#t3~0.base, ~#t3~0.offset); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1242] 0 havoc ~#t3~0.base, ~#t3~0.offset; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1231] 0 call ULTIMATE.dealloc(~#t4~0.base, ~#t4~0.offset); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1242] 0 havoc ~#t4~0.base, ~#t4~0.offset; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1231] 0 call ULTIMATE.dealloc(~#t5~0.base, ~#t5~0.offset); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1242] 0 havoc ~#t5~0.base, ~#t5~0.offset; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1229-L1243] 0 ensures true; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1248] JOIN 0 join main_#t~mem12; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1248] -1 havoc main_#t~mem12; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_~#t~0.base=94, main_~#t~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1249] -1 call main_#t~mem13 := read~int(~v~0.base, ~v~0.offset, 1); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_#t~mem13=89, main_~#t~0.base=94, main_~#t~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1249] -1 __VERIFIER_assert_#in~expression := (if 88 == main_#t~mem13 then 1 else 0); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, __VERIFIER_assert_#in~expression=0, main_#t~mem13=89, main_~#t~0.base=94, main_~#t~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1249] -1 havoc __VERIFIER_assert_~expression; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, __VERIFIER_assert_#in~expression=0, main_#t~mem13=89, main_~#t~0.base=94, main_~#t~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1212] -1 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=0, main_#t~mem13=89, main_~#t~0.base=94, main_~#t~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1212] -1 assume 0 == __VERIFIER_assert_~expression; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=0, main_#t~mem13=89, main_~#t~0.base=94, main_~#t~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1212] -1 assert false; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=0, main_#t~mem13=89, main_~#t~0.base=94, main_~#t~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [?] -1 #NULL := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0] [?] -1 #valid[0] := 0; VAL [#NULL!base=0, #NULL!offset=0] [L1213] -1 ~v~0 := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0, ~v~0!base=0, ~v~0!offset=0] [?] -1 havoc main_#res; VAL [#NULL!base=0, #NULL!offset=0, ~v~0!base=0, ~v~0!offset=0] [?] -1 havoc main_#t~nondet11, main_#t~mem12, main_#t~mem13, main_~#t~0; VAL [#NULL!base=0, #NULL!offset=0, ~v~0!base=0, ~v~0!offset=0] [L1246] FCALL -1 call main_~#t~0 := #Ultimate.alloc(4); VAL [#NULL!base=0, #NULL!offset=0, main_~#t~0!base=94, main_~#t~0!offset=0, ~v~0!base=0, ~v~0!offset=0] [L1247] FCALL -1 call write~int(5, main_~#t~0, 4); VAL [#NULL!base=0, #NULL!offset=0, main_~#t~0!base=94, main_~#t~0!offset=0, ~v~0!base=0, ~v~0!offset=0] [L1247] FORK -1 fork 5 thread0({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t~0!base=94, main_~#t~0!offset=0, ~v~0!base=0, ~v~0!offset=0] [L1229-L1243] 0 ~arg := #in~arg; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t~0!base=94, main_~#t~0!offset=0, ~arg!base=0, ~arg!offset=0, ~v~0!base=0, ~v~0!offset=0] [L1247] -1 havoc main_#t~nondet11; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t~0!base=94, main_~#t~0!offset=0, ~arg!base=0, ~arg!offset=0, ~v~0!base=0, ~v~0!offset=0] [L1231] FCALL 0 call ~#t1~0 := #Ultimate.alloc(4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~arg!base=0, ~arg!offset=0, ~v~0!base=0, ~v~0!offset=0] [L1231] FCALL 0 call ~#t2~0 := #Ultimate.alloc(4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~arg!base=0, ~arg!offset=0, ~v~0!base=0, ~v~0!offset=0] [L1231] FCALL 0 call ~#t3~0 := #Ultimate.alloc(4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~arg!base=0, ~arg!offset=0, ~v~0!base=0, ~v~0!offset=0] [L1231] FCALL 0 call ~#t4~0 := #Ultimate.alloc(4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~arg!base=0, ~arg!offset=0, ~v~0!base=0, ~v~0!offset=0] [L1231] FCALL 0 call ~#t5~0 := #Ultimate.alloc(4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!offset=0, ~v~0!base=0, ~v~0!offset=0] [L1232] FCALL 0 call write~int(0, ~#t1~0, 4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!offset=0, ~v~0!base=0, ~v~0!offset=0] [L1232] FORK 0 fork 0 thread1({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!offset=0, ~v~0!base=0, ~v~0!offset=0] [L1214-L1218] 1 ~arg := #in~arg; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=0, ~v~0!offset=0] [L1216] FCALL 1 call #t~malloc0 := #Ultimate.alloc(1); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=0, ~v~0!offset=0] [L1216] 1 ~v~0 := #t~malloc0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1217] 1 #res := { base: 0, offset: 0 }; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1248] FCALL -1 call main_#t~mem12 := read~int(main_~#t~0, 4); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1232] 0 havoc #t~nondet1; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1233] FCALL 0 call #t~mem2 := read~int(~#t1~0, 4); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, #t~mem2=0, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1233] JOIN 1 join #t~mem2; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, #t~mem2=0, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1233] 0 havoc #t~mem2; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1234] FCALL 0 call write~int(1, ~#t2~0, 4); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1234] FORK 0 fork 1 thread2({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1219-L1223] 2 ~arg := #in~arg; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1234] 0 havoc #t~nondet3; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1221] FCALL 2 call write~int(88, { base: ~v~0!base, offset: ~v~0!offset }, 1); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1222] 2 #res := { base: 0, offset: 0 }; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1235] FCALL 0 call write~int(2, ~#t3~0, 4); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1235] FORK 0 fork 2 thread3({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1235] 0 havoc #t~nondet4; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1224-L1228] 3 ~arg := #in~arg; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1236] FCALL 0 call write~int(3, ~#t4~0, 4); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1236] FORK 0 fork 3 thread2({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1236] 0 havoc #t~nondet5; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1237] FCALL 0 call write~int(4, ~#t5~0, 4); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1237] FORK 0 fork 4 thread2({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1219-L1223] 4 ~arg := #in~arg; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1221] FCALL 4 call write~int(88, { base: ~v~0!base, offset: ~v~0!offset }, 1); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1222] 4 #res := { base: 0, offset: 0 }; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1237] 0 havoc #t~nondet6; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1238] FCALL 0 call #t~mem7 := read~int(~#t2~0, 4); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, #t~mem7=1, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1238] JOIN 2 join #t~mem7; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, #t~mem7=1, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1238] 0 havoc #t~mem7; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1239] FCALL 0 call #t~mem8 := read~int(~#t3~0, 4); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, #t~mem8=2, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1219-L1223] 5 ~arg := #in~arg; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, #t~mem8=2, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1221] FCALL 5 call write~int(88, { base: ~v~0!base, offset: ~v~0!offset }, 1); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, #t~mem8=2, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1222] 5 #res := { base: 0, offset: 0 }; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, #t~mem8=2, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1226] FCALL 3 call write~int(89, { base: ~v~0!base, offset: ~v~0!offset }, 1); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, #t~mem8=2, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1227] 3 #res := { base: 0, offset: 0 }; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, #t~mem8=2, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1239] JOIN 3 join #t~mem8; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, #t~mem8=2, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1239] 0 havoc #t~mem8; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1240] FCALL 0 call #t~mem9 := read~int(~#t4~0, 4); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, #t~mem9=3, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1240] JOIN 5 join #t~mem9; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, #t~mem9=3, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1240] 0 havoc #t~mem9; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1241] FCALL 0 call #t~mem10 := read~int(~#t5~0, 4); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, #t~mem10=4, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1241] JOIN 4 join #t~mem10; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, #t~mem10=4, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1241] 0 havoc #t~mem10; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1242] 0 #res := { base: 0, offset: 0 }; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1231] FCALL 0 call ULTIMATE.dealloc(~#t1~0); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1242] 0 havoc ~#t1~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1231] FCALL 0 call ULTIMATE.dealloc(~#t2~0); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1242] 0 havoc ~#t2~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1231] FCALL 0 call ULTIMATE.dealloc(~#t3~0); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1242] 0 havoc ~#t3~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1231] FCALL 0 call ULTIMATE.dealloc(~#t4~0); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1242] 0 havoc ~#t4~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1231] FCALL 0 call ULTIMATE.dealloc(~#t5~0); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1242] 0 havoc ~#t5~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1248] JOIN 0 join main_#t~mem12; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1248] -1 havoc main_#t~mem12; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, main_~#t~0!base=94, main_~#t~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1249] FCALL -1 call main_#t~mem13 := read~int({ base: ~v~0!base, offset: ~v~0!offset }, 1); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, main_#t~mem13=89, main_~#t~0!base=94, main_~#t~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1249] -1 __VERIFIER_assert_#in~expression := (if 88 == main_#t~mem13 then 1 else 0); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, __VERIFIER_assert_#in~expression=0, main_#t~mem13=89, main_~#t~0!base=94, main_~#t~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1249] -1 havoc __VERIFIER_assert_~expression; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, __VERIFIER_assert_#in~expression=0, main_#t~mem13=89, main_~#t~0!base=94, main_~#t~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1212] -1 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=0, main_#t~mem13=89, main_~#t~0!base=94, main_~#t~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1212] COND TRUE -1 0 == __VERIFIER_assert_~expression VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=0, main_#t~mem13=89, main_~#t~0!base=94, main_~#t~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1212] -1 assert false; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=0, main_#t~mem13=89, main_~#t~0!base=94, main_~#t~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] ----- ----- class de.uni_freiburg.informatik.ultimate.boogie.procedureinliner.backtranslation.InlinerBacktranslator [?] -1 #NULL := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0] [?] -1 #valid[0] := 0; VAL [#NULL!base=0, #NULL!offset=0] [L1213] -1 ~v~0 := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0, ~v~0!base=0, ~v~0!offset=0] [?] -1 havoc main_#res; VAL [#NULL!base=0, #NULL!offset=0, ~v~0!base=0, ~v~0!offset=0] [?] -1 havoc main_#t~nondet11, main_#t~mem12, main_#t~mem13, main_~#t~0; VAL [#NULL!base=0, #NULL!offset=0, ~v~0!base=0, ~v~0!offset=0] [L1246] FCALL -1 call main_~#t~0 := #Ultimate.alloc(4); VAL [#NULL!base=0, #NULL!offset=0, main_~#t~0!base=94, main_~#t~0!offset=0, ~v~0!base=0, ~v~0!offset=0] [L1247] FCALL -1 call write~int(5, main_~#t~0, 4); VAL [#NULL!base=0, #NULL!offset=0, main_~#t~0!base=94, main_~#t~0!offset=0, ~v~0!base=0, ~v~0!offset=0] [L1247] FORK -1 fork 5 thread0({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t~0!base=94, main_~#t~0!offset=0, ~v~0!base=0, ~v~0!offset=0] [L1229-L1243] 0 ~arg := #in~arg; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t~0!base=94, main_~#t~0!offset=0, ~arg!base=0, ~arg!offset=0, ~v~0!base=0, ~v~0!offset=0] [L1247] -1 havoc main_#t~nondet11; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t~0!base=94, main_~#t~0!offset=0, ~arg!base=0, ~arg!offset=0, ~v~0!base=0, ~v~0!offset=0] [L1231] FCALL 0 call ~#t1~0 := #Ultimate.alloc(4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~arg!base=0, ~arg!offset=0, ~v~0!base=0, ~v~0!offset=0] [L1231] FCALL 0 call ~#t2~0 := #Ultimate.alloc(4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~arg!base=0, ~arg!offset=0, ~v~0!base=0, ~v~0!offset=0] [L1231] FCALL 0 call ~#t3~0 := #Ultimate.alloc(4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~arg!base=0, ~arg!offset=0, ~v~0!base=0, ~v~0!offset=0] [L1231] FCALL 0 call ~#t4~0 := #Ultimate.alloc(4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~arg!base=0, ~arg!offset=0, ~v~0!base=0, ~v~0!offset=0] [L1231] FCALL 0 call ~#t5~0 := #Ultimate.alloc(4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!offset=0, ~v~0!base=0, ~v~0!offset=0] [L1232] FCALL 0 call write~int(0, ~#t1~0, 4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!offset=0, ~v~0!base=0, ~v~0!offset=0] [L1232] FORK 0 fork 0 thread1({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!offset=0, ~v~0!base=0, ~v~0!offset=0] [L1214-L1218] 1 ~arg := #in~arg; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=0, ~v~0!offset=0] [L1216] FCALL 1 call #t~malloc0 := #Ultimate.alloc(1); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=0, ~v~0!offset=0] [L1216] 1 ~v~0 := #t~malloc0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1217] 1 #res := { base: 0, offset: 0 }; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1248] FCALL -1 call main_#t~mem12 := read~int(main_~#t~0, 4); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1232] 0 havoc #t~nondet1; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1233] FCALL 0 call #t~mem2 := read~int(~#t1~0, 4); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, #t~mem2=0, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1233] JOIN 1 join #t~mem2; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, #t~mem2=0, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1233] 0 havoc #t~mem2; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1234] FCALL 0 call write~int(1, ~#t2~0, 4); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1234] FORK 0 fork 1 thread2({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1219-L1223] 2 ~arg := #in~arg; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1234] 0 havoc #t~nondet3; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1221] FCALL 2 call write~int(88, { base: ~v~0!base, offset: ~v~0!offset }, 1); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1222] 2 #res := { base: 0, offset: 0 }; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1235] FCALL 0 call write~int(2, ~#t3~0, 4); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1235] FORK 0 fork 2 thread3({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1235] 0 havoc #t~nondet4; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1224-L1228] 3 ~arg := #in~arg; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1236] FCALL 0 call write~int(3, ~#t4~0, 4); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1236] FORK 0 fork 3 thread2({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1236] 0 havoc #t~nondet5; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1237] FCALL 0 call write~int(4, ~#t5~0, 4); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1237] FORK 0 fork 4 thread2({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1219-L1223] 4 ~arg := #in~arg; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1221] FCALL 4 call write~int(88, { base: ~v~0!base, offset: ~v~0!offset }, 1); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1222] 4 #res := { base: 0, offset: 0 }; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1237] 0 havoc #t~nondet6; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1238] FCALL 0 call #t~mem7 := read~int(~#t2~0, 4); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, #t~mem7=1, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1238] JOIN 2 join #t~mem7; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, #t~mem7=1, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1238] 0 havoc #t~mem7; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1239] FCALL 0 call #t~mem8 := read~int(~#t3~0, 4); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, #t~mem8=2, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1219-L1223] 5 ~arg := #in~arg; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, #t~mem8=2, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1221] FCALL 5 call write~int(88, { base: ~v~0!base, offset: ~v~0!offset }, 1); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, #t~mem8=2, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1222] 5 #res := { base: 0, offset: 0 }; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, #t~mem8=2, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1226] FCALL 3 call write~int(89, { base: ~v~0!base, offset: ~v~0!offset }, 1); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, #t~mem8=2, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1227] 3 #res := { base: 0, offset: 0 }; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, #t~mem8=2, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1239] JOIN 3 join #t~mem8; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, #t~mem8=2, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1239] 0 havoc #t~mem8; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1240] FCALL 0 call #t~mem9 := read~int(~#t4~0, 4); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, #t~mem9=3, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1240] JOIN 5 join #t~mem9; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, #t~mem9=3, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1240] 0 havoc #t~mem9; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1241] FCALL 0 call #t~mem10 := read~int(~#t5~0, 4); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, #t~mem10=4, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1241] JOIN 4 join #t~mem10; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, #t~mem10=4, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1241] 0 havoc #t~mem10; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1242] 0 #res := { base: 0, offset: 0 }; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1231] FCALL 0 call ULTIMATE.dealloc(~#t1~0); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1242] 0 havoc ~#t1~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1231] FCALL 0 call ULTIMATE.dealloc(~#t2~0); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1242] 0 havoc ~#t2~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1231] FCALL 0 call ULTIMATE.dealloc(~#t3~0); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1242] 0 havoc ~#t3~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1231] FCALL 0 call ULTIMATE.dealloc(~#t4~0); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1242] 0 havoc ~#t4~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1231] FCALL 0 call ULTIMATE.dealloc(~#t5~0); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1242] 0 havoc ~#t5~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1248] JOIN 0 join main_#t~mem12; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1248] -1 havoc main_#t~mem12; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, main_~#t~0!base=94, main_~#t~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1249] FCALL -1 call main_#t~mem13 := read~int({ base: ~v~0!base, offset: ~v~0!offset }, 1); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, main_#t~mem13=89, main_~#t~0!base=94, main_~#t~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1249] -1 __VERIFIER_assert_#in~expression := (if 88 == main_#t~mem13 then 1 else 0); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, __VERIFIER_assert_#in~expression=0, main_#t~mem13=89, main_~#t~0!base=94, main_~#t~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1249] -1 havoc __VERIFIER_assert_~expression; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, __VERIFIER_assert_#in~expression=0, main_#t~mem13=89, main_~#t~0!base=94, main_~#t~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1212] -1 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=0, main_#t~mem13=89, main_~#t~0!base=94, main_~#t~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1212] COND TRUE -1 0 == __VERIFIER_assert_~expression VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=0, main_#t~mem13=89, main_~#t~0!base=94, main_~#t~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1212] -1 assert false; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=0, main_#t~mem13=89, main_~#t~0!base=94, main_~#t~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [?] -1 #NULL := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0] [?] -1 #valid[0] := 0; VAL [#NULL!base=0, #NULL!offset=0] [L1213] -1 ~v~0 := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0, ~v~0!base=0, ~v~0!offset=0] [L1246] FCALL -1 call ~#t~0 := #Ultimate.alloc(4); VAL [#NULL!base=0, #NULL!offset=0, ~v~0!base=0, ~v~0!offset=0] [L1247] FCALL -1 call write~int(5, ~#t~0, 4); VAL [#NULL!base=0, #NULL!offset=0, ~v~0!base=0, ~v~0!offset=0] [L1247] FORK -1 fork 5 thread0({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~v~0!base=0, ~v~0!offset=0] [L1229-L1243] 0 ~arg := #in~arg; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~arg!base=0, ~arg!offset=0, ~v~0!base=0, ~v~0!offset=0] [L1247] -1 havoc #t~nondet11; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~arg!base=0, ~arg!offset=0, ~v~0!base=0, ~v~0!offset=0] [L1231] FCALL 0 call ~#t1~0 := #Ultimate.alloc(4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~arg!base=0, ~arg!offset=0, ~v~0!base=0, ~v~0!offset=0] [L1231] FCALL 0 call ~#t2~0 := #Ultimate.alloc(4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~arg!base=0, ~arg!offset=0, ~v~0!base=0, ~v~0!offset=0] [L1231] FCALL 0 call ~#t3~0 := #Ultimate.alloc(4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~arg!base=0, ~arg!offset=0, ~v~0!base=0, ~v~0!offset=0] [L1231] FCALL 0 call ~#t4~0 := #Ultimate.alloc(4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~arg!base=0, ~arg!offset=0, ~v~0!base=0, ~v~0!offset=0] [L1231] FCALL 0 call ~#t5~0 := #Ultimate.alloc(4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!offset=0, ~v~0!base=0, ~v~0!offset=0] [L1232] FCALL 0 call write~int(0, ~#t1~0, 4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!offset=0, ~v~0!base=0, ~v~0!offset=0] [L1232] FORK 0 fork 0 thread1({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!offset=0, ~v~0!base=0, ~v~0!offset=0] [L1214-L1218] 1 ~arg := #in~arg; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=0, ~v~0!offset=0] [L1216] FCALL 1 call #t~malloc0 := #Ultimate.alloc(1); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=0, ~v~0!offset=0] [L1216] 1 ~v~0 := #t~malloc0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1217] 1 #res := { base: 0, offset: 0 }; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1248] FCALL -1 call #t~mem12 := read~int(~#t~0, 4); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1232] 0 havoc #t~nondet1; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1233] FCALL 0 call #t~mem2 := read~int(~#t1~0, 4); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, #t~mem2=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1233] JOIN 1 join #t~mem2; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, #t~mem2=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1233] 0 havoc #t~mem2; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1234] FCALL 0 call write~int(1, ~#t2~0, 4); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1234] FORK 0 fork 1 thread2({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1219-L1223] 2 ~arg := #in~arg; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1234] 0 havoc #t~nondet3; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1221] FCALL 2 call write~int(88, { base: ~v~0!base, offset: ~v~0!offset }, 1); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1222] 2 #res := { base: 0, offset: 0 }; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1235] FCALL 0 call write~int(2, ~#t3~0, 4); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1235] FORK 0 fork 2 thread3({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1235] 0 havoc #t~nondet4; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1224-L1228] 3 ~arg := #in~arg; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1236] FCALL 0 call write~int(3, ~#t4~0, 4); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1236] FORK 0 fork 3 thread2({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1236] 0 havoc #t~nondet5; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1237] FCALL 0 call write~int(4, ~#t5~0, 4); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1237] FORK 0 fork 4 thread2({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1219-L1223] 4 ~arg := #in~arg; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1221] FCALL 4 call write~int(88, { base: ~v~0!base, offset: ~v~0!offset }, 1); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1222] 4 #res := { base: 0, offset: 0 }; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1237] 0 havoc #t~nondet6; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1238] FCALL 0 call #t~mem7 := read~int(~#t2~0, 4); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, #t~mem7=1, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1238] JOIN 2 join #t~mem7; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, #t~mem7=1, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1238] 0 havoc #t~mem7; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1239] FCALL 0 call #t~mem8 := read~int(~#t3~0, 4); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, #t~mem8=2, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1219-L1223] 5 ~arg := #in~arg; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, #t~mem8=2, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1221] FCALL 5 call write~int(88, { base: ~v~0!base, offset: ~v~0!offset }, 1); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, #t~mem8=2, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1222] 5 #res := { base: 0, offset: 0 }; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, #t~mem8=2, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1226] FCALL 3 call write~int(89, { base: ~v~0!base, offset: ~v~0!offset }, 1); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, #t~mem8=2, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1227] 3 #res := { base: 0, offset: 0 }; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, #t~mem8=2, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1239] JOIN 3 join #t~mem8; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, #t~mem8=2, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1239] 0 havoc #t~mem8; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1240] FCALL 0 call #t~mem9 := read~int(~#t4~0, 4); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, #t~mem9=3, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1240] JOIN 5 join #t~mem9; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, #t~mem9=3, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1240] 0 havoc #t~mem9; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1241] FCALL 0 call #t~mem10 := read~int(~#t5~0, 4); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, #t~mem10=4, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1241] JOIN 4 join #t~mem10; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, #t~mem10=4, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1241] 0 havoc #t~mem10; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1242] 0 #res := { base: 0, offset: 0 }; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1231] FCALL 0 call ULTIMATE.dealloc(~#t1~0); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1242] 0 havoc ~#t1~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1231] FCALL 0 call ULTIMATE.dealloc(~#t2~0); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1242] 0 havoc ~#t2~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1231] FCALL 0 call ULTIMATE.dealloc(~#t3~0); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1242] 0 havoc ~#t3~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1231] FCALL 0 call ULTIMATE.dealloc(~#t4~0); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1242] 0 havoc ~#t4~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1231] FCALL 0 call ULTIMATE.dealloc(~#t5~0); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1242] 0 havoc ~#t5~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1248] JOIN 0 join #t~mem12; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1248] -1 havoc #t~mem12; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1249] FCALL -1 call #t~mem13 := read~int({ base: ~v~0!base, offset: ~v~0!offset }, 1); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1212] -1 ~expression := #in~expression; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1212] COND TRUE -1 0 == ~expression VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1212] -1 assert false; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] ----- ----- class de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.CACSL2BoogieBacktranslator [?] -1 #NULL := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0] [?] -1 #valid[0] := 0; VAL [#NULL!base=0, #NULL!offset=0] [L1213] -1 ~v~0 := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0, ~v~0!base=0, ~v~0!offset=0] [L1246] FCALL -1 call ~#t~0 := #Ultimate.alloc(4); VAL [#NULL!base=0, #NULL!offset=0, ~v~0!base=0, ~v~0!offset=0] [L1247] FCALL -1 call write~int(5, ~#t~0, 4); VAL [#NULL!base=0, #NULL!offset=0, ~v~0!base=0, ~v~0!offset=0] [L1247] FORK -1 fork 5 thread0({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~v~0!base=0, ~v~0!offset=0] [L1229-L1243] 0 ~arg := #in~arg; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~arg!base=0, ~arg!offset=0, ~v~0!base=0, ~v~0!offset=0] [L1247] -1 havoc #t~nondet11; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~arg!base=0, ~arg!offset=0, ~v~0!base=0, ~v~0!offset=0] [L1231] FCALL 0 call ~#t1~0 := #Ultimate.alloc(4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~arg!base=0, ~arg!offset=0, ~v~0!base=0, ~v~0!offset=0] [L1231] FCALL 0 call ~#t2~0 := #Ultimate.alloc(4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~arg!base=0, ~arg!offset=0, ~v~0!base=0, ~v~0!offset=0] [L1231] FCALL 0 call ~#t3~0 := #Ultimate.alloc(4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~arg!base=0, ~arg!offset=0, ~v~0!base=0, ~v~0!offset=0] [L1231] FCALL 0 call ~#t4~0 := #Ultimate.alloc(4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~arg!base=0, ~arg!offset=0, ~v~0!base=0, ~v~0!offset=0] [L1231] FCALL 0 call ~#t5~0 := #Ultimate.alloc(4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!offset=0, ~v~0!base=0, ~v~0!offset=0] [L1232] FCALL 0 call write~int(0, ~#t1~0, 4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!offset=0, ~v~0!base=0, ~v~0!offset=0] [L1232] FORK 0 fork 0 thread1({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!offset=0, ~v~0!base=0, ~v~0!offset=0] [L1214-L1218] 1 ~arg := #in~arg; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=0, ~v~0!offset=0] [L1216] FCALL 1 call #t~malloc0 := #Ultimate.alloc(1); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=0, ~v~0!offset=0] [L1216] 1 ~v~0 := #t~malloc0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1217] 1 #res := { base: 0, offset: 0 }; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1248] FCALL -1 call #t~mem12 := read~int(~#t~0, 4); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1232] 0 havoc #t~nondet1; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1233] FCALL 0 call #t~mem2 := read~int(~#t1~0, 4); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, #t~mem2=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1233] JOIN 1 join #t~mem2; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, #t~mem2=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1233] 0 havoc #t~mem2; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1234] FCALL 0 call write~int(1, ~#t2~0, 4); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1234] FORK 0 fork 1 thread2({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1219-L1223] 2 ~arg := #in~arg; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1234] 0 havoc #t~nondet3; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1221] FCALL 2 call write~int(88, { base: ~v~0!base, offset: ~v~0!offset }, 1); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1222] 2 #res := { base: 0, offset: 0 }; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1235] FCALL 0 call write~int(2, ~#t3~0, 4); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1235] FORK 0 fork 2 thread3({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1235] 0 havoc #t~nondet4; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1224-L1228] 3 ~arg := #in~arg; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1236] FCALL 0 call write~int(3, ~#t4~0, 4); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1236] FORK 0 fork 3 thread2({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1236] 0 havoc #t~nondet5; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1237] FCALL 0 call write~int(4, ~#t5~0, 4); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1237] FORK 0 fork 4 thread2({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1219-L1223] 4 ~arg := #in~arg; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1221] FCALL 4 call write~int(88, { base: ~v~0!base, offset: ~v~0!offset }, 1); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1222] 4 #res := { base: 0, offset: 0 }; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1237] 0 havoc #t~nondet6; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1238] FCALL 0 call #t~mem7 := read~int(~#t2~0, 4); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, #t~mem7=1, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1238] JOIN 2 join #t~mem7; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, #t~mem7=1, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1238] 0 havoc #t~mem7; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1239] FCALL 0 call #t~mem8 := read~int(~#t3~0, 4); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, #t~mem8=2, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1219-L1223] 5 ~arg := #in~arg; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, #t~mem8=2, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1221] FCALL 5 call write~int(88, { base: ~v~0!base, offset: ~v~0!offset }, 1); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, #t~mem8=2, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1222] 5 #res := { base: 0, offset: 0 }; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, #t~mem8=2, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1226] FCALL 3 call write~int(89, { base: ~v~0!base, offset: ~v~0!offset }, 1); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, #t~mem8=2, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1227] 3 #res := { base: 0, offset: 0 }; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, #t~mem8=2, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1239] JOIN 3 join #t~mem8; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, #t~mem8=2, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1239] 0 havoc #t~mem8; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1240] FCALL 0 call #t~mem9 := read~int(~#t4~0, 4); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, #t~mem9=3, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1240] JOIN 5 join #t~mem9; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, #t~mem9=3, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1240] 0 havoc #t~mem9; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1241] FCALL 0 call #t~mem10 := read~int(~#t5~0, 4); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, #t~mem10=4, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1241] JOIN 4 join #t~mem10; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, #t~mem10=4, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1241] 0 havoc #t~mem10; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1242] 0 #res := { base: 0, offset: 0 }; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1231] FCALL 0 call ULTIMATE.dealloc(~#t1~0); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1242] 0 havoc ~#t1~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1231] FCALL 0 call ULTIMATE.dealloc(~#t2~0); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1242] 0 havoc ~#t2~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1231] FCALL 0 call ULTIMATE.dealloc(~#t3~0); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1242] 0 havoc ~#t3~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1231] FCALL 0 call ULTIMATE.dealloc(~#t4~0); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1242] 0 havoc ~#t4~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1231] FCALL 0 call ULTIMATE.dealloc(~#t5~0); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1242] 0 havoc ~#t5~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1248] JOIN 0 join #t~mem12; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1248] -1 havoc #t~mem12; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1249] FCALL -1 call #t~mem13 := read~int({ base: ~v~0!base, offset: ~v~0!offset }, 1); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1212] -1 ~expression := #in~expression; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1212] COND TRUE -1 0 == ~expression VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1212] -1 assert false; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1213] -1 char *v; VAL [v={0:0}] [L1246] -1 pthread_t t; VAL [v={0:0}] [L1247] FCALL, FORK -1 pthread_create(&t, 0, thread0, 0) VAL [arg={0:0}, v={0:0}] [L1231] 0 pthread_t t1, t2, t3, t4, t5; VAL [arg={0:0}, arg={0:0}, t1={96:0}, t2={93:0}, t3={90:0}, t4={91:0}, t5={95:0}, v={0:0}] [L1232] FCALL, FORK 0 pthread_create(&t1, 0, thread1, 0) VAL [arg={0:0}, arg={0:0}, arg={0:0}, t1={96:0}, t2={93:0}, t3={90:0}, t4={91:0}, t5={95:0}, v={0:0}] [L1216] 1 v = malloc(sizeof(char)) VAL [arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, malloc(sizeof(char))={92:0}, t1={96:0}, t2={93:0}, t3={90:0}, t4={91:0}, t5={95:0}, v={92:0}] [L1217] 1 return 0; VAL [\result={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, malloc(sizeof(char))={92:0}, t1={96:0}, t2={93:0}, t3={90:0}, t4={91:0}, t5={95:0}, v={92:0}] [L1248] -1 \read(t) VAL [\result={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, malloc(sizeof(char))={92:0}, t1={96:0}, t2={93:0}, t3={90:0}, t4={91:0}, t5={95:0}, v={92:0}] [L1233] 0 \read(t1) VAL [\read(t1)=0, \result={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, malloc(sizeof(char))={92:0}, t1={96:0}, t2={93:0}, t3={90:0}, t4={91:0}, t5={95:0}, v={92:0}] [L1233] FCALL, JOIN 1 pthread_join(t1, 0) VAL [\read(t1)=0, \result={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, malloc(sizeof(char))={92:0}, t1={96:0}, t2={93:0}, t3={90:0}, t4={91:0}, t5={95:0}, v={92:0}] [L1234] FCALL, FORK 0 pthread_create(&t2, 0, thread2, 0) VAL [\result={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, malloc(sizeof(char))={92:0}, t1={96:0}, t2={93:0}, t3={90:0}, t4={91:0}, t5={95:0}, v={92:0}] [L1221] 2 v[0] = 'X' VAL [\result={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, malloc(sizeof(char))={92:0}, t1={96:0}, t2={93:0}, t3={90:0}, t4={91:0}, t5={95:0}, v={92:0}] [L1222] 2 return 0; VAL [\result={0:0}, \result={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, malloc(sizeof(char))={92:0}, t1={96:0}, t2={93:0}, t3={90:0}, t4={91:0}, t5={95:0}, v={92:0}] [L1235] FCALL, FORK 0 pthread_create(&t3, 0, thread3, 0) VAL [\result={0:0}, \result={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, malloc(sizeof(char))={92:0}, t1={96:0}, t2={93:0}, t3={90:0}, t4={91:0}, t5={95:0}, v={92:0}] [L1236] FCALL, FORK 0 pthread_create(&t4, 0, thread2, 0) VAL [\result={0:0}, \result={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, malloc(sizeof(char))={92:0}, t1={96:0}, t2={93:0}, t3={90:0}, t4={91:0}, t5={95:0}, v={92:0}] [L1237] FCALL, FORK 0 pthread_create(&t5, 0, thread2, 0) VAL [\result={0:0}, \result={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, malloc(sizeof(char))={92:0}, t1={96:0}, t2={93:0}, t3={90:0}, t4={91:0}, t5={95:0}, v={92:0}] [L1221] 4 v[0] = 'X' VAL [\result={0:0}, \result={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, malloc(sizeof(char))={92:0}, t1={96:0}, t2={93:0}, t3={90:0}, t4={91:0}, t5={95:0}, v={92:0}] [L1222] 4 return 0; VAL [\result={0:0}, \result={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, malloc(sizeof(char))={92:0}, t1={96:0}, t2={93:0}, t3={90:0}, t4={91:0}, t5={95:0}, v={92:0}] [L1238] 0 \read(t2) VAL [\read(t2)=1, \result={0:0}, \result={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, malloc(sizeof(char))={92:0}, t1={96:0}, t2={93:0}, t3={90:0}, t4={91:0}, t5={95:0}, v={92:0}] [L1238] FCALL, JOIN 2 pthread_join(t2, 0) VAL [\read(t2)=1, \result={0:0}, \result={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, malloc(sizeof(char))={92:0}, t1={96:0}, t2={93:0}, t3={90:0}, t4={91:0}, t5={95:0}, v={92:0}] [L1239] 0 \read(t3) VAL [\read(t3)=2, \result={0:0}, \result={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, malloc(sizeof(char))={92:0}, t1={96:0}, t2={93:0}, t3={90:0}, t4={91:0}, t5={95:0}, v={92:0}] [L1221] 5 v[0] = 'X' VAL [\read(t3)=2, \result={0:0}, \result={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, malloc(sizeof(char))={92:0}, t1={96:0}, t2={93:0}, t3={90:0}, t4={91:0}, t5={95:0}, v={92:0}] [L1222] 5 return 0; VAL [\read(t3)=2, \result={0:0}, \result={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, malloc(sizeof(char))={92:0}, t1={96:0}, t2={93:0}, t3={90:0}, t4={91:0}, t5={95:0}, v={92:0}] [L1226] 3 v[0] = 'Y' VAL [\read(t3)=2, \result={0:0}, \result={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, malloc(sizeof(char))={92:0}, t1={96:0}, t2={93:0}, t3={90:0}, t4={91:0}, t5={95:0}, v={92:0}] [L1227] 3 return 0; VAL [\read(t3)=2, \result={0:0}, \result={0:0}, \result={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, malloc(sizeof(char))={92:0}, t1={96:0}, t2={93:0}, t3={90:0}, t4={91:0}, t5={95:0}, v={92:0}] [L1239] FCALL, JOIN 3 pthread_join(t3, 0) VAL [\read(t3)=2, \result={0:0}, \result={0:0}, \result={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, malloc(sizeof(char))={92:0}, t1={96:0}, t2={93:0}, t3={90:0}, t4={91:0}, t5={95:0}, v={92:0}] [L1240] 0 \read(t4) VAL [\read(t4)=3, \result={0:0}, \result={0:0}, \result={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, malloc(sizeof(char))={92:0}, t1={96:0}, t2={93:0}, t3={90:0}, t4={91:0}, t5={95:0}, v={92:0}] [L1240] FCALL, JOIN 5 pthread_join(t4, 0) VAL [\read(t4)=3, \result={0:0}, \result={0:0}, \result={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, malloc(sizeof(char))={92:0}, t1={96:0}, t2={93:0}, t3={90:0}, t4={91:0}, t5={95:0}, v={92:0}] [L1241] 0 \read(t5) VAL [\read(t5)=4, \result={0:0}, \result={0:0}, \result={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, malloc(sizeof(char))={92:0}, t1={96:0}, t2={93:0}, t3={90:0}, t4={91:0}, t5={95:0}, v={92:0}] [L1241] FCALL, JOIN 4 pthread_join(t5, 0) VAL [\read(t5)=4, \result={0:0}, \result={0:0}, \result={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, malloc(sizeof(char))={92:0}, t1={96:0}, t2={93:0}, t3={90:0}, t4={91:0}, t5={95:0}, v={92:0}] [L1242] 0 return 0; VAL [\result={0:0}, \result={0:0}, \result={0:0}, \result={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, malloc(sizeof(char))={92:0}, t1={96:0}, t2={93:0}, t3={90:0}, t4={91:0}, t5={95:0}, v={92:0}] [L1242] 0 return 0; VAL [\result={0:0}, \result={0:0}, \result={0:0}, \result={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, malloc(sizeof(char))={92:0}, t2={93:0}, t3={90:0}, t4={91:0}, t5={95:0}, v={92:0}] [L1242] 0 return 0; VAL [\result={0:0}, \result={0:0}, \result={0:0}, \result={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, malloc(sizeof(char))={92:0}, t3={90:0}, t4={91:0}, t5={95:0}, v={92:0}] [L1242] 0 return 0; VAL [\result={0:0}, \result={0:0}, \result={0:0}, \result={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, malloc(sizeof(char))={92:0}, t4={91:0}, t5={95:0}, v={92:0}] [L1242] 0 return 0; VAL [\result={0:0}, \result={0:0}, \result={0:0}, \result={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, malloc(sizeof(char))={92:0}, t5={95:0}, v={92:0}] [L1242] 0 return 0; VAL [\result={0:0}, \result={0:0}, \result={0:0}, \result={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, malloc(sizeof(char))={92:0}, v={92:0}] [L1248] FCALL, JOIN 0 pthread_join(t, 0) VAL [\result={0:0}, \result={0:0}, \result={0:0}, \result={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, malloc(sizeof(char))={92:0}, v={92:0}] [L1249] -1 v[0] VAL [\result={0:0}, \result={0:0}, \result={0:0}, \result={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, malloc(sizeof(char))={92:0}, v={92:0}] [L1212] COND TRUE -1 !expression VAL [\result={0:0}, \result={0:0}, \result={0:0}, \result={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, malloc(sizeof(char))={92:0}, v={92:0}] [L1212] -1 __VERIFIER_error() VAL [\result={0:0}, \result={0:0}, \result={0:0}, \result={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, malloc(sizeof(char))={92:0}, v={92:0}] ----- [2018-11-23 05:08:17,011 INFO L305 ceAbstractionStarter]: Did not count any witness invariants because Icfg is not BoogieIcfg [2018-11-23 05:08:17,012 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 23.11 05:08:17 BasicIcfg [2018-11-23 05:08:17,012 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-11-23 05:08:17,012 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2018-11-23 05:08:17,012 INFO L271 PluginConnector]: Initializing Witness Printer... [2018-11-23 05:08:17,013 INFO L276 PluginConnector]: Witness Printer initialized [2018-11-23 05:08:17,013 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 23.11 05:06:59" (3/4) ... [2018-11-23 05:08:17,015 INFO L138 WitnessPrinter]: Generating witness for reachability counterexample ----- class de.uni_freiburg.informatik.ultimate.modelcheckerutils.cfg.transformations.BlockEncodingBacktranslator [?] -1 [121] ULTIMATE.startENTRY-->L-1: Formula: (and (= |v_#NULL.offset_1| 0) (= |v_#NULL.base_1| 0)) InVars {} OutVars{#NULL.offset=|v_#NULL.offset_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] VAL [|#NULL.base|=0, |#NULL.offset|=0] [?] -1 [101] L-1-->L1213: Formula: (= |v_#valid_27| (store |v_#valid_28| 0 0)) InVars {#valid=|v_#valid_28|} OutVars{#valid=|v_#valid_27|} AuxVars[] AssignedVars[#valid] VAL [|#NULL.base|=0, |#NULL.offset|=0] [?] -1 [172] L1213-->L-1-1: Formula: (and (= v_~v~0.offset_5 0) (= v_~v~0.base_5 0)) InVars {} OutVars{~v~0.offset=v_~v~0.offset_5, ~v~0.base=v_~v~0.base_5} AuxVars[] AssignedVars[~v~0.offset, ~v~0.base] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~v~0.base=0, ~v~0.offset=0] [?] -1 [165] L-1-1-->L-1-2: Formula: true InVars {} OutVars{ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_#res] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~v~0.base=0, ~v~0.offset=0] [?] -1 [162] L-1-2-->L1246: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~mem12=|v_ULTIMATE.start_main_#t~mem12_1|, ULTIMATE.start_main_#t~mem13=|v_ULTIMATE.start_main_#t~mem13_1|, ULTIMATE.start_main_~#t~0.base=|v_ULTIMATE.start_main_~#t~0.base_1|, ULTIMATE.start_main_#t~nondet11=|v_ULTIMATE.start_main_#t~nondet11_1|, ULTIMATE.start_main_~#t~0.offset=|v_ULTIMATE.start_main_~#t~0.offset_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem12, ULTIMATE.start_main_#t~mem13, ULTIMATE.start_main_#t~nondet11, ULTIMATE.start_main_~#t~0.base, ULTIMATE.start_main_~#t~0.offset] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~v~0.base=0, ~v~0.offset=0] [?] -1 [171] L1246-->L1246-1: Formula: (and (= 0 (select |v_#valid_24| |v_ULTIMATE.start_main_~#t~0.base_2|)) (not (= |v_ULTIMATE.start_main_~#t~0.base_2| 0)) (= 0 |v_ULTIMATE.start_main_~#t~0.offset_2|) (= (store |v_#length_14| |v_ULTIMATE.start_main_~#t~0.base_2| 4) |v_#length_13|) (= (store |v_#valid_24| |v_ULTIMATE.start_main_~#t~0.base_2| 1) |v_#valid_23|)) InVars {#length=|v_#length_14|, #valid=|v_#valid_24|} OutVars{ULTIMATE.start_main_~#t~0.base=|v_ULTIMATE.start_main_~#t~0.base_2|, #length=|v_#length_13|, ULTIMATE.start_main_~#t~0.offset=|v_ULTIMATE.start_main_~#t~0.offset_2|, #valid=|v_#valid_23|} AuxVars[] AssignedVars[#valid, ULTIMATE.start_main_~#t~0.base, #length, ULTIMATE.start_main_~#t~0.offset] VAL [|#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=0, ~v~0.offset=0] [?] -1 [173] L1246-1-->L1247: Formula: (= |v_#memory_int_20| (store |v_#memory_int_21| |v_ULTIMATE.start_main_~#t~0.base_3| (store (select |v_#memory_int_21| |v_ULTIMATE.start_main_~#t~0.base_3|) |v_ULTIMATE.start_main_~#t~0.offset_3| 5))) InVars {#memory_int=|v_#memory_int_21|, ULTIMATE.start_main_~#t~0.base=|v_ULTIMATE.start_main_~#t~0.base_3|, ULTIMATE.start_main_~#t~0.offset=|v_ULTIMATE.start_main_~#t~0.offset_3|} OutVars{#memory_int=|v_#memory_int_20|, ULTIMATE.start_main_~#t~0.base=|v_ULTIMATE.start_main_~#t~0.base_3|, ULTIMATE.start_main_~#t~0.offset=|v_ULTIMATE.start_main_~#t~0.offset_3|} AuxVars[] AssignedVars[#memory_int] VAL [|#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=0, ~v~0.offset=0] [?] FORK -1 [253] L1247-->thread0ENTRY: Formula: (and (= v_Thread2_thread0_thidvar0_2 5) (= |v_Thread2_thread0_#in~arg.offset_3| 0) (= 0 |v_Thread2_thread0_#in~arg.base_3|)) InVars {} OutVars{Thread2_thread0_#in~arg.offset=|v_Thread2_thread0_#in~arg.offset_3|, Thread2_thread0_#in~arg.base=|v_Thread2_thread0_#in~arg.base_3|, Thread2_thread0_thidvar0=v_Thread2_thread0_thidvar0_2} AuxVars[] AssignedVars[Thread2_thread0_#in~arg.offset, Thread2_thread0_#in~arg.base, Thread2_thread0_thidvar0] VAL [Thread2_thread0_thidvar0=5, |#NULL.base|=0, |#NULL.offset|=0, |Thread2_thread0_#in~arg.base|=0, |Thread2_thread0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=0, ~v~0.offset=0] [?] 0 [182] thread0ENTRY-->L1231: Formula: (and (= v_Thread2_thread0_~arg.offset_1 |v_Thread2_thread0_#in~arg.offset_1|) (= v_Thread2_thread0_~arg.base_1 |v_Thread2_thread0_#in~arg.base_1|)) InVars {Thread2_thread0_#in~arg.base=|v_Thread2_thread0_#in~arg.base_1|, Thread2_thread0_#in~arg.offset=|v_Thread2_thread0_#in~arg.offset_1|} OutVars{Thread2_thread0_#in~arg.base=|v_Thread2_thread0_#in~arg.base_1|, Thread2_thread0_#in~arg.offset=|v_Thread2_thread0_#in~arg.offset_1|, Thread2_thread0_~arg.base=v_Thread2_thread0_~arg.base_1, Thread2_thread0_~arg.offset=v_Thread2_thread0_~arg.offset_1} AuxVars[] AssignedVars[Thread2_thread0_~arg.base, Thread2_thread0_~arg.offset] VAL [Thread2_thread0_thidvar0=5, Thread2_thread0_~arg.base=0, Thread2_thread0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread2_thread0_#in~arg.base|=0, |Thread2_thread0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=0, ~v~0.offset=0] [?] -1 [103] L1247-1-->L1248: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~nondet11=|v_ULTIMATE.start_main_#t~nondet11_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet11] VAL [Thread2_thread0_thidvar0=5, Thread2_thread0_~arg.base=0, Thread2_thread0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread2_thread0_#in~arg.base|=0, |Thread2_thread0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=0, ~v~0.offset=0] [?] 0 [183] L1231-->L1231-1: Formula: (and (= (store |v_#valid_2| |v_Thread2_thread0_~#t1~0.base_1| 1) |v_#valid_1|) (= (select |v_#valid_2| |v_Thread2_thread0_~#t1~0.base_1|) 0) (= |v_#length_1| (store |v_#length_2| |v_Thread2_thread0_~#t1~0.base_1| 4)) (= 0 |v_Thread2_thread0_~#t1~0.offset_1|) (not (= |v_Thread2_thread0_~#t1~0.base_1| 0))) InVars {#length=|v_#length_2|, #valid=|v_#valid_2|} OutVars{#length=|v_#length_1|, Thread2_thread0_~#t1~0.base=|v_Thread2_thread0_~#t1~0.base_1|, Thread2_thread0_~#t1~0.offset=|v_Thread2_thread0_~#t1~0.offset_1|, #valid=|v_#valid_1|} AuxVars[] AssignedVars[Thread2_thread0_~#t1~0.base, Thread2_thread0_~#t1~0.offset, #valid, #length] VAL [Thread2_thread0_thidvar0=5, Thread2_thread0_~arg.base=0, Thread2_thread0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread2_thread0_#in~arg.base|=0, |Thread2_thread0_#in~arg.offset|=0, |Thread2_thread0_~#t1~0.base|=96, |Thread2_thread0_~#t1~0.offset|=0, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=0, ~v~0.offset=0] [?] 0 [184] L1231-1-->L1231-2: Formula: (and (= |v_#length_3| (store |v_#length_4| |v_Thread2_thread0_~#t2~0.base_1| 4)) (= 0 |v_Thread2_thread0_~#t2~0.offset_1|) (= (store |v_#valid_4| |v_Thread2_thread0_~#t2~0.base_1| 1) |v_#valid_3|) (= 0 (select |v_#valid_4| |v_Thread2_thread0_~#t2~0.base_1|)) (not (= |v_Thread2_thread0_~#t2~0.base_1| 0))) InVars {#length=|v_#length_4|, #valid=|v_#valid_4|} OutVars{#length=|v_#length_3|, Thread2_thread0_~#t2~0.offset=|v_Thread2_thread0_~#t2~0.offset_1|, #valid=|v_#valid_3|, Thread2_thread0_~#t2~0.base=|v_Thread2_thread0_~#t2~0.base_1|} AuxVars[] AssignedVars[Thread2_thread0_~#t2~0.offset, #valid, #length, Thread2_thread0_~#t2~0.base] VAL [Thread2_thread0_thidvar0=5, Thread2_thread0_~arg.base=0, Thread2_thread0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread2_thread0_#in~arg.base|=0, |Thread2_thread0_#in~arg.offset|=0, |Thread2_thread0_~#t1~0.base|=96, |Thread2_thread0_~#t1~0.offset|=0, |Thread2_thread0_~#t2~0.base|=93, |Thread2_thread0_~#t2~0.offset|=0, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=0, ~v~0.offset=0] [?] 0 [185] L1231-2-->L1231-3: Formula: (and (= (select |v_#valid_6| |v_Thread2_thread0_~#t3~0.base_1|) 0) (= |v_#length_5| (store |v_#length_6| |v_Thread2_thread0_~#t3~0.base_1| 4)) (= |v_#valid_5| (store |v_#valid_6| |v_Thread2_thread0_~#t3~0.base_1| 1)) (not (= |v_Thread2_thread0_~#t3~0.base_1| 0)) (= |v_Thread2_thread0_~#t3~0.offset_1| 0)) InVars {#length=|v_#length_6|, #valid=|v_#valid_6|} OutVars{Thread2_thread0_~#t3~0.offset=|v_Thread2_thread0_~#t3~0.offset_1|, #length=|v_#length_5|, Thread2_thread0_~#t3~0.base=|v_Thread2_thread0_~#t3~0.base_1|, #valid=|v_#valid_5|} AuxVars[] AssignedVars[Thread2_thread0_~#t3~0.offset, Thread2_thread0_~#t3~0.base, #valid, #length] VAL [Thread2_thread0_thidvar0=5, Thread2_thread0_~arg.base=0, Thread2_thread0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread2_thread0_#in~arg.base|=0, |Thread2_thread0_#in~arg.offset|=0, |Thread2_thread0_~#t1~0.base|=96, |Thread2_thread0_~#t1~0.offset|=0, |Thread2_thread0_~#t2~0.base|=93, |Thread2_thread0_~#t2~0.offset|=0, |Thread2_thread0_~#t3~0.base|=90, |Thread2_thread0_~#t3~0.offset|=0, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=0, ~v~0.offset=0] [?] 0 [186] L1231-3-->L1231-4: Formula: (and (= |v_Thread2_thread0_~#t4~0.offset_1| 0) (= |v_#length_7| (store |v_#length_8| |v_Thread2_thread0_~#t4~0.base_1| 4)) (= |v_#valid_7| (store |v_#valid_8| |v_Thread2_thread0_~#t4~0.base_1| 1)) (not (= |v_Thread2_thread0_~#t4~0.base_1| 0)) (= 0 (select |v_#valid_8| |v_Thread2_thread0_~#t4~0.base_1|))) InVars {#length=|v_#length_8|, #valid=|v_#valid_8|} OutVars{#length=|v_#length_7|, Thread2_thread0_~#t4~0.offset=|v_Thread2_thread0_~#t4~0.offset_1|, #valid=|v_#valid_7|, Thread2_thread0_~#t4~0.base=|v_Thread2_thread0_~#t4~0.base_1|} AuxVars[] AssignedVars[Thread2_thread0_~#t4~0.offset, #valid, #length, Thread2_thread0_~#t4~0.base] VAL [Thread2_thread0_thidvar0=5, Thread2_thread0_~arg.base=0, Thread2_thread0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread2_thread0_#in~arg.base|=0, |Thread2_thread0_#in~arg.offset|=0, |Thread2_thread0_~#t1~0.base|=96, |Thread2_thread0_~#t1~0.offset|=0, |Thread2_thread0_~#t2~0.base|=93, |Thread2_thread0_~#t2~0.offset|=0, |Thread2_thread0_~#t3~0.base|=90, |Thread2_thread0_~#t3~0.offset|=0, |Thread2_thread0_~#t4~0.base|=91, |Thread2_thread0_~#t4~0.offset|=0, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=0, ~v~0.offset=0] [?] 0 [187] L1231-4-->L1231-5: Formula: (and (= |v_Thread2_thread0_~#t5~0.offset_1| 0) (not (= |v_Thread2_thread0_~#t5~0.base_1| 0)) (= |v_#valid_9| (store |v_#valid_10| |v_Thread2_thread0_~#t5~0.base_1| 1)) (= 0 (select |v_#valid_10| |v_Thread2_thread0_~#t5~0.base_1|)) (= |v_#length_9| (store |v_#length_10| |v_Thread2_thread0_~#t5~0.base_1| 4))) InVars {#length=|v_#length_10|, #valid=|v_#valid_10|} OutVars{Thread2_thread0_~#t5~0.base=|v_Thread2_thread0_~#t5~0.base_1|, #length=|v_#length_9|, Thread2_thread0_~#t5~0.offset=|v_Thread2_thread0_~#t5~0.offset_1|, #valid=|v_#valid_9|} AuxVars[] AssignedVars[Thread2_thread0_~#t5~0.offset, #valid, Thread2_thread0_~#t5~0.base, #length] VAL [Thread2_thread0_thidvar0=5, Thread2_thread0_~arg.base=0, Thread2_thread0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread2_thread0_#in~arg.base|=0, |Thread2_thread0_#in~arg.offset|=0, |Thread2_thread0_~#t1~0.base|=96, |Thread2_thread0_~#t1~0.offset|=0, |Thread2_thread0_~#t2~0.base|=93, |Thread2_thread0_~#t2~0.offset|=0, |Thread2_thread0_~#t3~0.base|=90, |Thread2_thread0_~#t3~0.offset|=0, |Thread2_thread0_~#t4~0.base|=91, |Thread2_thread0_~#t4~0.offset|=0, |Thread2_thread0_~#t5~0.base|=95, |Thread2_thread0_~#t5~0.offset|=0, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=0, ~v~0.offset=0] [?] 0 [188] L1231-5-->L1232: Formula: (= (store |v_#memory_int_2| |v_Thread2_thread0_~#t1~0.base_2| (store (select |v_#memory_int_2| |v_Thread2_thread0_~#t1~0.base_2|) |v_Thread2_thread0_~#t1~0.offset_2| 0)) |v_#memory_int_1|) InVars {#memory_int=|v_#memory_int_2|, Thread2_thread0_~#t1~0.base=|v_Thread2_thread0_~#t1~0.base_2|, Thread2_thread0_~#t1~0.offset=|v_Thread2_thread0_~#t1~0.offset_2|} OutVars{#memory_int=|v_#memory_int_1|, Thread2_thread0_~#t1~0.base=|v_Thread2_thread0_~#t1~0.base_2|, Thread2_thread0_~#t1~0.offset=|v_Thread2_thread0_~#t1~0.offset_2|} AuxVars[] AssignedVars[#memory_int] VAL [Thread2_thread0_thidvar0=5, Thread2_thread0_~arg.base=0, Thread2_thread0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread2_thread0_#in~arg.base|=0, |Thread2_thread0_#in~arg.offset|=0, |Thread2_thread0_~#t1~0.base|=96, |Thread2_thread0_~#t1~0.offset|=0, |Thread2_thread0_~#t2~0.base|=93, |Thread2_thread0_~#t2~0.offset|=0, |Thread2_thread0_~#t3~0.base|=90, |Thread2_thread0_~#t3~0.offset|=0, |Thread2_thread0_~#t4~0.base|=91, |Thread2_thread0_~#t4~0.offset|=0, |Thread2_thread0_~#t5~0.base|=95, |Thread2_thread0_~#t5~0.offset|=0, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=0, ~v~0.offset=0] [?] FORK 0 [257] L1232-->thread1ENTRY: Formula: (and (= v_Thread4_thread1_thidvar0_4 0) (= 0 |v_Thread4_thread1_#in~arg.base_5|) (= |v_Thread4_thread1_#in~arg.offset_5| 0)) InVars {} OutVars{Thread4_thread1_thidvar0=v_Thread4_thread1_thidvar0_4, Thread4_thread1_#in~arg.base=|v_Thread4_thread1_#in~arg.base_5|, Thread4_thread1_#in~arg.offset=|v_Thread4_thread1_#in~arg.offset_5|} AuxVars[] AssignedVars[Thread4_thread1_thidvar0, Thread4_thread1_#in~arg.base, Thread4_thread1_#in~arg.offset] VAL [Thread2_thread0_thidvar0=5, Thread2_thread0_~arg.base=0, Thread2_thread0_~arg.offset=0, Thread4_thread1_thidvar0=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread2_thread0_#in~arg.base|=0, |Thread2_thread0_#in~arg.offset|=0, |Thread2_thread0_~#t1~0.base|=96, |Thread2_thread0_~#t1~0.offset|=0, |Thread2_thread0_~#t2~0.base|=93, |Thread2_thread0_~#t2~0.offset|=0, |Thread2_thread0_~#t3~0.base|=90, |Thread2_thread0_~#t3~0.offset|=0, |Thread2_thread0_~#t4~0.base|=91, |Thread2_thread0_~#t4~0.offset|=0, |Thread2_thread0_~#t5~0.base|=95, |Thread2_thread0_~#t5~0.offset|=0, |Thread4_thread1_#in~arg.base|=0, |Thread4_thread1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=0, ~v~0.offset=0] [?] 1 [230] thread1ENTRY-->L1216: Formula: (and (= v_Thread4_thread1_~arg.offset_1 |v_Thread4_thread1_#in~arg.offset_1|) (= v_Thread4_thread1_~arg.base_1 |v_Thread4_thread1_#in~arg.base_1|)) InVars {Thread4_thread1_#in~arg.offset=|v_Thread4_thread1_#in~arg.offset_1|, Thread4_thread1_#in~arg.base=|v_Thread4_thread1_#in~arg.base_1|} OutVars{Thread4_thread1_~arg.offset=v_Thread4_thread1_~arg.offset_1, Thread4_thread1_#in~arg.base=|v_Thread4_thread1_#in~arg.base_1|, Thread4_thread1_#in~arg.offset=|v_Thread4_thread1_#in~arg.offset_1|, Thread4_thread1_~arg.base=v_Thread4_thread1_~arg.base_1} AuxVars[] AssignedVars[Thread4_thread1_~arg.offset, Thread4_thread1_~arg.base] VAL [Thread2_thread0_thidvar0=5, Thread2_thread0_~arg.base=0, Thread2_thread0_~arg.offset=0, Thread4_thread1_thidvar0=0, Thread4_thread1_~arg.base=0, Thread4_thread1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread2_thread0_#in~arg.base|=0, |Thread2_thread0_#in~arg.offset|=0, |Thread2_thread0_~#t1~0.base|=96, |Thread2_thread0_~#t1~0.offset|=0, |Thread2_thread0_~#t2~0.base|=93, |Thread2_thread0_~#t2~0.offset|=0, |Thread2_thread0_~#t3~0.base|=90, |Thread2_thread0_~#t3~0.offset|=0, |Thread2_thread0_~#t4~0.base|=91, |Thread2_thread0_~#t4~0.offset|=0, |Thread2_thread0_~#t5~0.base|=95, |Thread2_thread0_~#t5~0.offset|=0, |Thread4_thread1_#in~arg.base|=0, |Thread4_thread1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=0, ~v~0.offset=0] [?] 1 [231] L1216-->L1216-1: Formula: (and (= |v_#valid_21| (store |v_#valid_22| |v_Thread4_thread1_#t~malloc0.base_1| 1)) (= |v_Thread4_thread1_#t~malloc0.offset_1| 0) (not (= 0 |v_Thread4_thread1_#t~malloc0.base_1|)) (= (store |v_#length_12| |v_Thread4_thread1_#t~malloc0.base_1| 1) |v_#length_11|) (= (select |v_#valid_22| |v_Thread4_thread1_#t~malloc0.base_1|) 0)) InVars {#length=|v_#length_12|, #valid=|v_#valid_22|} OutVars{#length=|v_#length_11|, Thread4_thread1_#t~malloc0.offset=|v_Thread4_thread1_#t~malloc0.offset_1|, Thread4_thread1_#t~malloc0.base=|v_Thread4_thread1_#t~malloc0.base_1|, #valid=|v_#valid_21|} AuxVars[] AssignedVars[Thread4_thread1_#t~malloc0.base, #valid, #length, Thread4_thread1_#t~malloc0.offset] VAL [Thread2_thread0_thidvar0=5, Thread2_thread0_~arg.base=0, Thread2_thread0_~arg.offset=0, Thread4_thread1_thidvar0=0, Thread4_thread1_~arg.base=0, Thread4_thread1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread2_thread0_#in~arg.base|=0, |Thread2_thread0_#in~arg.offset|=0, |Thread2_thread0_~#t1~0.base|=96, |Thread2_thread0_~#t1~0.offset|=0, |Thread2_thread0_~#t2~0.base|=93, |Thread2_thread0_~#t2~0.offset|=0, |Thread2_thread0_~#t3~0.base|=90, |Thread2_thread0_~#t3~0.offset|=0, |Thread2_thread0_~#t4~0.base|=91, |Thread2_thread0_~#t4~0.offset|=0, |Thread2_thread0_~#t5~0.base|=95, |Thread2_thread0_~#t5~0.offset|=0, |Thread4_thread1_#in~arg.base|=0, |Thread4_thread1_#in~arg.offset|=0, |Thread4_thread1_#t~malloc0.base|=92, |Thread4_thread1_#t~malloc0.offset|=0, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=0, ~v~0.offset=0] [?] 1 [232] L1216-1-->L1217: Formula: (and (= v_~v~0.base_1 |v_Thread4_thread1_#t~malloc0.base_2|) (= v_~v~0.offset_1 |v_Thread4_thread1_#t~malloc0.offset_2|)) InVars {Thread4_thread1_#t~malloc0.offset=|v_Thread4_thread1_#t~malloc0.offset_2|, Thread4_thread1_#t~malloc0.base=|v_Thread4_thread1_#t~malloc0.base_2|} OutVars{Thread4_thread1_#t~malloc0.offset=|v_Thread4_thread1_#t~malloc0.offset_2|, ~v~0.offset=v_~v~0.offset_1, ~v~0.base=v_~v~0.base_1, Thread4_thread1_#t~malloc0.base=|v_Thread4_thread1_#t~malloc0.base_2|} AuxVars[] AssignedVars[~v~0.offset, ~v~0.base] VAL [Thread2_thread0_thidvar0=5, Thread2_thread0_~arg.base=0, Thread2_thread0_~arg.offset=0, Thread4_thread1_thidvar0=0, Thread4_thread1_~arg.base=0, Thread4_thread1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread2_thread0_#in~arg.base|=0, |Thread2_thread0_#in~arg.offset|=0, |Thread2_thread0_~#t1~0.base|=96, |Thread2_thread0_~#t1~0.offset|=0, |Thread2_thread0_~#t2~0.base|=93, |Thread2_thread0_~#t2~0.offset|=0, |Thread2_thread0_~#t3~0.base|=90, |Thread2_thread0_~#t3~0.offset|=0, |Thread2_thread0_~#t4~0.base|=91, |Thread2_thread0_~#t4~0.offset|=0, |Thread2_thread0_~#t5~0.base|=95, |Thread2_thread0_~#t5~0.offset|=0, |Thread4_thread1_#in~arg.base|=0, |Thread4_thread1_#in~arg.offset|=0, |Thread4_thread1_#t~malloc0.base|=92, |Thread4_thread1_#t~malloc0.offset|=0, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 1 [233] L1217-->thread1FINAL: Formula: (and (= |v_Thread4_thread1_#res.offset_1| 0) (= |v_Thread4_thread1_#res.base_1| 0)) InVars {} OutVars{Thread4_thread1_#res.offset=|v_Thread4_thread1_#res.offset_1|, Thread4_thread1_#res.base=|v_Thread4_thread1_#res.base_1|} AuxVars[] AssignedVars[Thread4_thread1_#res.offset, Thread4_thread1_#res.base] VAL [Thread2_thread0_thidvar0=5, Thread2_thread0_~arg.base=0, Thread2_thread0_~arg.offset=0, Thread4_thread1_thidvar0=0, Thread4_thread1_~arg.base=0, Thread4_thread1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread2_thread0_#in~arg.base|=0, |Thread2_thread0_#in~arg.offset|=0, |Thread2_thread0_~#t1~0.base|=96, |Thread2_thread0_~#t1~0.offset|=0, |Thread2_thread0_~#t2~0.base|=93, |Thread2_thread0_~#t2~0.offset|=0, |Thread2_thread0_~#t3~0.base|=90, |Thread2_thread0_~#t3~0.offset|=0, |Thread2_thread0_~#t4~0.base|=91, |Thread2_thread0_~#t4~0.offset|=0, |Thread2_thread0_~#t5~0.base|=95, |Thread2_thread0_~#t5~0.offset|=0, |Thread4_thread1_#in~arg.base|=0, |Thread4_thread1_#in~arg.offset|=0, |Thread4_thread1_#res.base|=0, |Thread4_thread1_#res.offset|=0, |Thread4_thread1_#t~malloc0.base|=92, |Thread4_thread1_#t~malloc0.offset|=0, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 1 [234] thread1FINAL-->thread1EXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] VAL [Thread2_thread0_thidvar0=5, Thread2_thread0_~arg.base=0, Thread2_thread0_~arg.offset=0, Thread4_thread1_thidvar0=0, Thread4_thread1_~arg.base=0, Thread4_thread1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread2_thread0_#in~arg.base|=0, |Thread2_thread0_#in~arg.offset|=0, |Thread2_thread0_~#t1~0.base|=96, |Thread2_thread0_~#t1~0.offset|=0, |Thread2_thread0_~#t2~0.base|=93, |Thread2_thread0_~#t2~0.offset|=0, |Thread2_thread0_~#t3~0.base|=90, |Thread2_thread0_~#t3~0.offset|=0, |Thread2_thread0_~#t4~0.base|=91, |Thread2_thread0_~#t4~0.offset|=0, |Thread2_thread0_~#t5~0.base|=95, |Thread2_thread0_~#t5~0.offset|=0, |Thread4_thread1_#in~arg.base|=0, |Thread4_thread1_#in~arg.offset|=0, |Thread4_thread1_#res.base|=0, |Thread4_thread1_#res.offset|=0, |Thread4_thread1_#t~malloc0.base|=92, |Thread4_thread1_#t~malloc0.offset|=0, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] -1 [140] L1248-->L1248-1: Formula: (= (select (select |v_#memory_int_22| |v_ULTIMATE.start_main_~#t~0.base_4|) |v_ULTIMATE.start_main_~#t~0.offset_4|) |v_ULTIMATE.start_main_#t~mem12_2|) InVars {#memory_int=|v_#memory_int_22|, ULTIMATE.start_main_~#t~0.base=|v_ULTIMATE.start_main_~#t~0.base_4|, ULTIMATE.start_main_~#t~0.offset=|v_ULTIMATE.start_main_~#t~0.offset_4|} OutVars{#memory_int=|v_#memory_int_22|, ULTIMATE.start_main_#t~mem12=|v_ULTIMATE.start_main_#t~mem12_2|, ULTIMATE.start_main_~#t~0.base=|v_ULTIMATE.start_main_~#t~0.base_4|, ULTIMATE.start_main_~#t~0.offset=|v_ULTIMATE.start_main_~#t~0.offset_4|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem12] VAL [Thread2_thread0_thidvar0=5, Thread2_thread0_~arg.base=0, Thread2_thread0_~arg.offset=0, Thread4_thread1_thidvar0=0, Thread4_thread1_~arg.base=0, Thread4_thread1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread2_thread0_#in~arg.base|=0, |Thread2_thread0_#in~arg.offset|=0, |Thread2_thread0_~#t1~0.base|=96, |Thread2_thread0_~#t1~0.offset|=0, |Thread2_thread0_~#t2~0.base|=93, |Thread2_thread0_~#t2~0.offset|=0, |Thread2_thread0_~#t3~0.base|=90, |Thread2_thread0_~#t3~0.offset|=0, |Thread2_thread0_~#t4~0.base|=91, |Thread2_thread0_~#t4~0.offset|=0, |Thread2_thread0_~#t5~0.base|=95, |Thread2_thread0_~#t5~0.offset|=0, |Thread4_thread1_#in~arg.base|=0, |Thread4_thread1_#in~arg.offset|=0, |Thread4_thread1_#res.base|=0, |Thread4_thread1_#res.offset|=0, |Thread4_thread1_#t~malloc0.base|=92, |Thread4_thread1_#t~malloc0.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 [190] L1232-1-->L1233: Formula: true InVars {} OutVars{Thread2_thread0_#t~nondet1=|v_Thread2_thread0_#t~nondet1_1|} AuxVars[] AssignedVars[Thread2_thread0_#t~nondet1] VAL [Thread2_thread0_thidvar0=5, Thread2_thread0_~arg.base=0, Thread2_thread0_~arg.offset=0, Thread4_thread1_thidvar0=0, Thread4_thread1_~arg.base=0, Thread4_thread1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread2_thread0_#in~arg.base|=0, |Thread2_thread0_#in~arg.offset|=0, |Thread2_thread0_~#t1~0.base|=96, |Thread2_thread0_~#t1~0.offset|=0, |Thread2_thread0_~#t2~0.base|=93, |Thread2_thread0_~#t2~0.offset|=0, |Thread2_thread0_~#t3~0.base|=90, |Thread2_thread0_~#t3~0.offset|=0, |Thread2_thread0_~#t4~0.base|=91, |Thread2_thread0_~#t4~0.offset|=0, |Thread2_thread0_~#t5~0.base|=95, |Thread2_thread0_~#t5~0.offset|=0, |Thread4_thread1_#in~arg.base|=0, |Thread4_thread1_#in~arg.offset|=0, |Thread4_thread1_#res.base|=0, |Thread4_thread1_#res.offset|=0, |Thread4_thread1_#t~malloc0.base|=92, |Thread4_thread1_#t~malloc0.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 [191] L1233-->L1233-1: Formula: (= (select (select |v_#memory_int_3| |v_Thread2_thread0_~#t1~0.base_3|) |v_Thread2_thread0_~#t1~0.offset_3|) |v_Thread2_thread0_#t~mem2_1|) InVars {#memory_int=|v_#memory_int_3|, Thread2_thread0_~#t1~0.base=|v_Thread2_thread0_~#t1~0.base_3|, Thread2_thread0_~#t1~0.offset=|v_Thread2_thread0_~#t1~0.offset_3|} OutVars{#memory_int=|v_#memory_int_3|, Thread2_thread0_#t~mem2=|v_Thread2_thread0_#t~mem2_1|, Thread2_thread0_~#t1~0.base=|v_Thread2_thread0_~#t1~0.base_3|, Thread2_thread0_~#t1~0.offset=|v_Thread2_thread0_~#t1~0.offset_3|} AuxVars[] AssignedVars[Thread2_thread0_#t~mem2] VAL [Thread2_thread0_thidvar0=5, Thread2_thread0_~arg.base=0, Thread2_thread0_~arg.offset=0, Thread4_thread1_thidvar0=0, Thread4_thread1_~arg.base=0, Thread4_thread1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread2_thread0_#in~arg.base|=0, |Thread2_thread0_#in~arg.offset|=0, |Thread2_thread0_#t~mem2|=0, |Thread2_thread0_~#t1~0.base|=96, |Thread2_thread0_~#t1~0.offset|=0, |Thread2_thread0_~#t2~0.base|=93, |Thread2_thread0_~#t2~0.offset|=0, |Thread2_thread0_~#t3~0.base|=90, |Thread2_thread0_~#t3~0.offset|=0, |Thread2_thread0_~#t4~0.base|=91, |Thread2_thread0_~#t4~0.offset|=0, |Thread2_thread0_~#t5~0.base|=95, |Thread2_thread0_~#t5~0.offset|=0, |Thread4_thread1_#in~arg.base|=0, |Thread4_thread1_#in~arg.offset|=0, |Thread4_thread1_#res.base|=0, |Thread4_thread1_#res.offset|=0, |Thread4_thread1_#t~malloc0.base|=92, |Thread4_thread1_#t~malloc0.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] JOIN 1 [337] thread1EXIT-->L1233-2: Formula: (= |v_Thread2_thread0_#t~mem2_22| v_Thread4_thread1_thidvar0_32) InVars {Thread4_thread1_thidvar0=v_Thread4_thread1_thidvar0_32, Thread2_thread0_#t~mem2=|v_Thread2_thread0_#t~mem2_22|} OutVars{Thread4_thread1_thidvar0=v_Thread4_thread1_thidvar0_32, Thread2_thread0_#t~mem2=|v_Thread2_thread0_#t~mem2_22|} AuxVars[] AssignedVars[] VAL [Thread2_thread0_thidvar0=5, Thread2_thread0_~arg.base=0, Thread2_thread0_~arg.offset=0, Thread4_thread1_thidvar0=0, Thread4_thread1_~arg.base=0, Thread4_thread1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread2_thread0_#in~arg.base|=0, |Thread2_thread0_#in~arg.offset|=0, |Thread2_thread0_#t~mem2|=0, |Thread2_thread0_~#t1~0.base|=96, |Thread2_thread0_~#t1~0.offset|=0, |Thread2_thread0_~#t2~0.base|=93, |Thread2_thread0_~#t2~0.offset|=0, |Thread2_thread0_~#t3~0.base|=90, |Thread2_thread0_~#t3~0.offset|=0, |Thread2_thread0_~#t4~0.base|=91, |Thread2_thread0_~#t4~0.offset|=0, |Thread2_thread0_~#t5~0.base|=95, |Thread2_thread0_~#t5~0.offset|=0, |Thread4_thread1_#in~arg.base|=0, |Thread4_thread1_#in~arg.offset|=0, |Thread4_thread1_#res.base|=0, |Thread4_thread1_#res.offset|=0, |Thread4_thread1_#t~malloc0.base|=92, |Thread4_thread1_#t~malloc0.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 [193] L1233-2-->L1234: Formula: true InVars {} OutVars{Thread2_thread0_#t~mem2=|v_Thread2_thread0_#t~mem2_2|} AuxVars[] AssignedVars[Thread2_thread0_#t~mem2] VAL [Thread2_thread0_thidvar0=5, Thread2_thread0_~arg.base=0, Thread2_thread0_~arg.offset=0, Thread4_thread1_thidvar0=0, Thread4_thread1_~arg.base=0, Thread4_thread1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread2_thread0_#in~arg.base|=0, |Thread2_thread0_#in~arg.offset|=0, |Thread2_thread0_~#t1~0.base|=96, |Thread2_thread0_~#t1~0.offset|=0, |Thread2_thread0_~#t2~0.base|=93, |Thread2_thread0_~#t2~0.offset|=0, |Thread2_thread0_~#t3~0.base|=90, |Thread2_thread0_~#t3~0.offset|=0, |Thread2_thread0_~#t4~0.base|=91, |Thread2_thread0_~#t4~0.offset|=0, |Thread2_thread0_~#t5~0.base|=95, |Thread2_thread0_~#t5~0.offset|=0, |Thread4_thread1_#in~arg.base|=0, |Thread4_thread1_#in~arg.offset|=0, |Thread4_thread1_#res.base|=0, |Thread4_thread1_#res.offset|=0, |Thread4_thread1_#t~malloc0.base|=92, |Thread4_thread1_#t~malloc0.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 [194] L1234-->L1234-1: Formula: (= (store |v_#memory_int_5| |v_Thread2_thread0_~#t2~0.base_2| (store (select |v_#memory_int_5| |v_Thread2_thread0_~#t2~0.base_2|) |v_Thread2_thread0_~#t2~0.offset_2| 1)) |v_#memory_int_4|) InVars {#memory_int=|v_#memory_int_5|, Thread2_thread0_~#t2~0.offset=|v_Thread2_thread0_~#t2~0.offset_2|, Thread2_thread0_~#t2~0.base=|v_Thread2_thread0_~#t2~0.base_2|} OutVars{#memory_int=|v_#memory_int_4|, Thread2_thread0_~#t2~0.offset=|v_Thread2_thread0_~#t2~0.offset_2|, Thread2_thread0_~#t2~0.base=|v_Thread2_thread0_~#t2~0.base_2|} AuxVars[] AssignedVars[#memory_int] VAL [Thread2_thread0_thidvar0=5, Thread2_thread0_~arg.base=0, Thread2_thread0_~arg.offset=0, Thread4_thread1_thidvar0=0, Thread4_thread1_~arg.base=0, Thread4_thread1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread2_thread0_#in~arg.base|=0, |Thread2_thread0_#in~arg.offset|=0, |Thread2_thread0_~#t1~0.base|=96, |Thread2_thread0_~#t1~0.offset|=0, |Thread2_thread0_~#t2~0.base|=93, |Thread2_thread0_~#t2~0.offset|=0, |Thread2_thread0_~#t3~0.base|=90, |Thread2_thread0_~#t3~0.offset|=0, |Thread2_thread0_~#t4~0.base|=91, |Thread2_thread0_~#t4~0.offset|=0, |Thread2_thread0_~#t5~0.base|=95, |Thread2_thread0_~#t5~0.offset|=0, |Thread4_thread1_#in~arg.base|=0, |Thread4_thread1_#in~arg.offset|=0, |Thread4_thread1_#res.base|=0, |Thread4_thread1_#res.offset|=0, |Thread4_thread1_#t~malloc0.base|=92, |Thread4_thread1_#t~malloc0.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] FORK 0 [258] L1234-1-->thread2ENTRY: Formula: (and (= 0 |v_Thread5_thread2_#in~arg.offset_5|) (= 0 |v_Thread5_thread2_#in~arg.base_5|) (= 1 v_Thread5_thread2_thidvar0_4)) InVars {} OutVars{Thread5_thread2_thidvar0=v_Thread5_thread2_thidvar0_4, Thread5_thread2_#in~arg.base=|v_Thread5_thread2_#in~arg.base_5|, Thread5_thread2_#in~arg.offset=|v_Thread5_thread2_#in~arg.offset_5|} AuxVars[] AssignedVars[Thread5_thread2_thidvar0, Thread5_thread2_#in~arg.base, Thread5_thread2_#in~arg.offset] VAL [Thread2_thread0_thidvar0=5, Thread2_thread0_~arg.base=0, Thread2_thread0_~arg.offset=0, Thread4_thread1_thidvar0=0, Thread4_thread1_~arg.base=0, Thread4_thread1_~arg.offset=0, Thread5_thread2_thidvar0=1, |#NULL.base|=0, |#NULL.offset|=0, |Thread2_thread0_#in~arg.base|=0, |Thread2_thread0_#in~arg.offset|=0, |Thread2_thread0_~#t1~0.base|=96, |Thread2_thread0_~#t1~0.offset|=0, |Thread2_thread0_~#t2~0.base|=93, |Thread2_thread0_~#t2~0.offset|=0, |Thread2_thread0_~#t3~0.base|=90, |Thread2_thread0_~#t3~0.offset|=0, |Thread2_thread0_~#t4~0.base|=91, |Thread2_thread0_~#t4~0.offset|=0, |Thread2_thread0_~#t5~0.base|=95, |Thread2_thread0_~#t5~0.offset|=0, |Thread4_thread1_#in~arg.base|=0, |Thread4_thread1_#in~arg.offset|=0, |Thread4_thread1_#res.base|=0, |Thread4_thread1_#res.offset|=0, |Thread4_thread1_#t~malloc0.base|=92, |Thread4_thread1_#t~malloc0.offset|=0, |Thread5_thread2_#in~arg.base|=0, |Thread5_thread2_#in~arg.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 2 [243] thread2ENTRY-->L1221: Formula: (and (= v_Thread5_thread2_~arg.base_1 |v_Thread5_thread2_#in~arg.base_1|) (= v_Thread5_thread2_~arg.offset_1 |v_Thread5_thread2_#in~arg.offset_1|)) InVars {Thread5_thread2_#in~arg.offset=|v_Thread5_thread2_#in~arg.offset_1|, Thread5_thread2_#in~arg.base=|v_Thread5_thread2_#in~arg.base_1|} OutVars{Thread5_thread2_#in~arg.offset=|v_Thread5_thread2_#in~arg.offset_1|, Thread5_thread2_#in~arg.base=|v_Thread5_thread2_#in~arg.base_1|, Thread5_thread2_~arg.base=v_Thread5_thread2_~arg.base_1, Thread5_thread2_~arg.offset=v_Thread5_thread2_~arg.offset_1} AuxVars[] AssignedVars[Thread5_thread2_~arg.base, Thread5_thread2_~arg.offset] VAL [Thread2_thread0_thidvar0=5, Thread2_thread0_~arg.base=0, Thread2_thread0_~arg.offset=0, Thread4_thread1_thidvar0=0, Thread4_thread1_~arg.base=0, Thread4_thread1_~arg.offset=0, Thread5_thread2_thidvar0=1, Thread5_thread2_~arg.base=0, Thread5_thread2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread2_thread0_#in~arg.base|=0, |Thread2_thread0_#in~arg.offset|=0, |Thread2_thread0_~#t1~0.base|=96, |Thread2_thread0_~#t1~0.offset|=0, |Thread2_thread0_~#t2~0.base|=93, |Thread2_thread0_~#t2~0.offset|=0, |Thread2_thread0_~#t3~0.base|=90, |Thread2_thread0_~#t3~0.offset|=0, |Thread2_thread0_~#t4~0.base|=91, |Thread2_thread0_~#t4~0.offset|=0, |Thread2_thread0_~#t5~0.base|=95, |Thread2_thread0_~#t5~0.offset|=0, |Thread4_thread1_#in~arg.base|=0, |Thread4_thread1_#in~arg.offset|=0, |Thread4_thread1_#res.base|=0, |Thread4_thread1_#res.offset|=0, |Thread4_thread1_#t~malloc0.base|=92, |Thread4_thread1_#t~malloc0.offset|=0, |Thread5_thread2_#in~arg.base|=0, |Thread5_thread2_#in~arg.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 [196] L1234-2-->L1235: Formula: true InVars {} OutVars{Thread2_thread0_#t~nondet3=|v_Thread2_thread0_#t~nondet3_1|} AuxVars[] AssignedVars[Thread2_thread0_#t~nondet3] VAL [Thread2_thread0_thidvar0=5, Thread2_thread0_~arg.base=0, Thread2_thread0_~arg.offset=0, Thread4_thread1_thidvar0=0, Thread4_thread1_~arg.base=0, Thread4_thread1_~arg.offset=0, Thread5_thread2_thidvar0=1, Thread5_thread2_~arg.base=0, Thread5_thread2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread2_thread0_#in~arg.base|=0, |Thread2_thread0_#in~arg.offset|=0, |Thread2_thread0_~#t1~0.base|=96, |Thread2_thread0_~#t1~0.offset|=0, |Thread2_thread0_~#t2~0.base|=93, |Thread2_thread0_~#t2~0.offset|=0, |Thread2_thread0_~#t3~0.base|=90, |Thread2_thread0_~#t3~0.offset|=0, |Thread2_thread0_~#t4~0.base|=91, |Thread2_thread0_~#t4~0.offset|=0, |Thread2_thread0_~#t5~0.base|=95, |Thread2_thread0_~#t5~0.offset|=0, |Thread4_thread1_#in~arg.base|=0, |Thread4_thread1_#in~arg.offset|=0, |Thread4_thread1_#res.base|=0, |Thread4_thread1_#res.offset|=0, |Thread4_thread1_#t~malloc0.base|=92, |Thread4_thread1_#t~malloc0.offset|=0, |Thread5_thread2_#in~arg.base|=0, |Thread5_thread2_#in~arg.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 2 [244] L1221-->L1221-1: Formula: (= |v_#memory_int_16| (store |v_#memory_int_17| v_~v~0.base_2 (store (select |v_#memory_int_17| v_~v~0.base_2) v_~v~0.offset_2 88))) InVars {#memory_int=|v_#memory_int_17|, ~v~0.offset=v_~v~0.offset_2, ~v~0.base=v_~v~0.base_2} OutVars{#memory_int=|v_#memory_int_16|, ~v~0.offset=v_~v~0.offset_2, ~v~0.base=v_~v~0.base_2} AuxVars[] AssignedVars[#memory_int] VAL [Thread2_thread0_thidvar0=5, Thread2_thread0_~arg.base=0, Thread2_thread0_~arg.offset=0, Thread4_thread1_thidvar0=0, Thread4_thread1_~arg.base=0, Thread4_thread1_~arg.offset=0, Thread5_thread2_thidvar0=1, Thread5_thread2_~arg.base=0, Thread5_thread2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread2_thread0_#in~arg.base|=0, |Thread2_thread0_#in~arg.offset|=0, |Thread2_thread0_~#t1~0.base|=96, |Thread2_thread0_~#t1~0.offset|=0, |Thread2_thread0_~#t2~0.base|=93, |Thread2_thread0_~#t2~0.offset|=0, |Thread2_thread0_~#t3~0.base|=90, |Thread2_thread0_~#t3~0.offset|=0, |Thread2_thread0_~#t4~0.base|=91, |Thread2_thread0_~#t4~0.offset|=0, |Thread2_thread0_~#t5~0.base|=95, |Thread2_thread0_~#t5~0.offset|=0, |Thread4_thread1_#in~arg.base|=0, |Thread4_thread1_#in~arg.offset|=0, |Thread4_thread1_#res.base|=0, |Thread4_thread1_#res.offset|=0, |Thread4_thread1_#t~malloc0.base|=92, |Thread4_thread1_#t~malloc0.offset|=0, |Thread5_thread2_#in~arg.base|=0, |Thread5_thread2_#in~arg.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 2 [245] L1221-1-->thread2FINAL: Formula: (and (= |v_Thread5_thread2_#res.base_1| 0) (= |v_Thread5_thread2_#res.offset_1| 0)) InVars {} OutVars{Thread5_thread2_#res.offset=|v_Thread5_thread2_#res.offset_1|, Thread5_thread2_#res.base=|v_Thread5_thread2_#res.base_1|} AuxVars[] AssignedVars[Thread5_thread2_#res.base, Thread5_thread2_#res.offset] VAL [Thread2_thread0_thidvar0=5, Thread2_thread0_~arg.base=0, Thread2_thread0_~arg.offset=0, Thread4_thread1_thidvar0=0, Thread4_thread1_~arg.base=0, Thread4_thread1_~arg.offset=0, Thread5_thread2_thidvar0=1, Thread5_thread2_~arg.base=0, Thread5_thread2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread2_thread0_#in~arg.base|=0, |Thread2_thread0_#in~arg.offset|=0, |Thread2_thread0_~#t1~0.base|=96, |Thread2_thread0_~#t1~0.offset|=0, |Thread2_thread0_~#t2~0.base|=93, |Thread2_thread0_~#t2~0.offset|=0, |Thread2_thread0_~#t3~0.base|=90, |Thread2_thread0_~#t3~0.offset|=0, |Thread2_thread0_~#t4~0.base|=91, |Thread2_thread0_~#t4~0.offset|=0, |Thread2_thread0_~#t5~0.base|=95, |Thread2_thread0_~#t5~0.offset|=0, |Thread4_thread1_#in~arg.base|=0, |Thread4_thread1_#in~arg.offset|=0, |Thread4_thread1_#res.base|=0, |Thread4_thread1_#res.offset|=0, |Thread4_thread1_#t~malloc0.base|=92, |Thread4_thread1_#t~malloc0.offset|=0, |Thread5_thread2_#in~arg.base|=0, |Thread5_thread2_#in~arg.offset|=0, |Thread5_thread2_#res.base|=0, |Thread5_thread2_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 [197] L1235-->L1235-1: Formula: (= (store |v_#memory_int_7| |v_Thread2_thread0_~#t3~0.base_2| (store (select |v_#memory_int_7| |v_Thread2_thread0_~#t3~0.base_2|) |v_Thread2_thread0_~#t3~0.offset_2| 2)) |v_#memory_int_6|) InVars {Thread2_thread0_~#t3~0.offset=|v_Thread2_thread0_~#t3~0.offset_2|, #memory_int=|v_#memory_int_7|, Thread2_thread0_~#t3~0.base=|v_Thread2_thread0_~#t3~0.base_2|} OutVars{Thread2_thread0_~#t3~0.offset=|v_Thread2_thread0_~#t3~0.offset_2|, #memory_int=|v_#memory_int_6|, Thread2_thread0_~#t3~0.base=|v_Thread2_thread0_~#t3~0.base_2|} AuxVars[] AssignedVars[#memory_int] VAL [Thread2_thread0_thidvar0=5, Thread2_thread0_~arg.base=0, Thread2_thread0_~arg.offset=0, Thread4_thread1_thidvar0=0, Thread4_thread1_~arg.base=0, Thread4_thread1_~arg.offset=0, Thread5_thread2_thidvar0=1, Thread5_thread2_~arg.base=0, Thread5_thread2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread2_thread0_#in~arg.base|=0, |Thread2_thread0_#in~arg.offset|=0, |Thread2_thread0_~#t1~0.base|=96, |Thread2_thread0_~#t1~0.offset|=0, |Thread2_thread0_~#t2~0.base|=93, |Thread2_thread0_~#t2~0.offset|=0, |Thread2_thread0_~#t3~0.base|=90, |Thread2_thread0_~#t3~0.offset|=0, |Thread2_thread0_~#t4~0.base|=91, |Thread2_thread0_~#t4~0.offset|=0, |Thread2_thread0_~#t5~0.base|=95, |Thread2_thread0_~#t5~0.offset|=0, |Thread4_thread1_#in~arg.base|=0, |Thread4_thread1_#in~arg.offset|=0, |Thread4_thread1_#res.base|=0, |Thread4_thread1_#res.offset|=0, |Thread4_thread1_#t~malloc0.base|=92, |Thread4_thread1_#t~malloc0.offset|=0, |Thread5_thread2_#in~arg.base|=0, |Thread5_thread2_#in~arg.offset|=0, |Thread5_thread2_#res.base|=0, |Thread5_thread2_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] FORK 0 [259] L1235-1-->thread3ENTRY: Formula: (and (= 0 |v_Thread0_thread3_#in~arg.base_5|) (= 0 |v_Thread0_thread3_#in~arg.offset_5|) (= v_Thread0_thread3_thidvar0_4 2)) InVars {} OutVars{Thread0_thread3_thidvar0=v_Thread0_thread3_thidvar0_4, Thread0_thread3_#in~arg.offset=|v_Thread0_thread3_#in~arg.offset_5|, Thread0_thread3_#in~arg.base=|v_Thread0_thread3_#in~arg.base_5|} AuxVars[] AssignedVars[Thread0_thread3_thidvar0, Thread0_thread3_#in~arg.offset, Thread0_thread3_#in~arg.base] VAL [Thread0_thread3_thidvar0=2, Thread2_thread0_thidvar0=5, Thread2_thread0_~arg.base=0, Thread2_thread0_~arg.offset=0, Thread4_thread1_thidvar0=0, Thread4_thread1_~arg.base=0, Thread4_thread1_~arg.offset=0, Thread5_thread2_thidvar0=1, Thread5_thread2_~arg.base=0, Thread5_thread2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_thread3_#in~arg.base|=0, |Thread0_thread3_#in~arg.offset|=0, |Thread2_thread0_#in~arg.base|=0, |Thread2_thread0_#in~arg.offset|=0, |Thread2_thread0_~#t1~0.base|=96, |Thread2_thread0_~#t1~0.offset|=0, |Thread2_thread0_~#t2~0.base|=93, |Thread2_thread0_~#t2~0.offset|=0, |Thread2_thread0_~#t3~0.base|=90, |Thread2_thread0_~#t3~0.offset|=0, |Thread2_thread0_~#t4~0.base|=91, |Thread2_thread0_~#t4~0.offset|=0, |Thread2_thread0_~#t5~0.base|=95, |Thread2_thread0_~#t5~0.offset|=0, |Thread4_thread1_#in~arg.base|=0, |Thread4_thread1_#in~arg.offset|=0, |Thread4_thread1_#res.base|=0, |Thread4_thread1_#res.offset|=0, |Thread4_thread1_#t~malloc0.base|=92, |Thread4_thread1_#t~malloc0.offset|=0, |Thread5_thread2_#in~arg.base|=0, |Thread5_thread2_#in~arg.offset|=0, |Thread5_thread2_#res.base|=0, |Thread5_thread2_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 2 [246] thread2FINAL-->thread2EXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] VAL [Thread0_thread3_thidvar0=2, Thread2_thread0_thidvar0=5, Thread2_thread0_~arg.base=0, Thread2_thread0_~arg.offset=0, Thread4_thread1_thidvar0=0, Thread4_thread1_~arg.base=0, Thread4_thread1_~arg.offset=0, Thread5_thread2_thidvar0=1, Thread5_thread2_~arg.base=0, Thread5_thread2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_thread3_#in~arg.base|=0, |Thread0_thread3_#in~arg.offset|=0, |Thread2_thread0_#in~arg.base|=0, |Thread2_thread0_#in~arg.offset|=0, |Thread2_thread0_~#t1~0.base|=96, |Thread2_thread0_~#t1~0.offset|=0, |Thread2_thread0_~#t2~0.base|=93, |Thread2_thread0_~#t2~0.offset|=0, |Thread2_thread0_~#t3~0.base|=90, |Thread2_thread0_~#t3~0.offset|=0, |Thread2_thread0_~#t4~0.base|=91, |Thread2_thread0_~#t4~0.offset|=0, |Thread2_thread0_~#t5~0.base|=95, |Thread2_thread0_~#t5~0.offset|=0, |Thread4_thread1_#in~arg.base|=0, |Thread4_thread1_#in~arg.offset|=0, |Thread4_thread1_#res.base|=0, |Thread4_thread1_#res.offset|=0, |Thread4_thread1_#t~malloc0.base|=92, |Thread4_thread1_#t~malloc0.offset|=0, |Thread5_thread2_#in~arg.base|=0, |Thread5_thread2_#in~arg.offset|=0, |Thread5_thread2_#res.base|=0, |Thread5_thread2_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 [199] L1235-2-->L1236: Formula: true InVars {} OutVars{Thread2_thread0_#t~nondet4=|v_Thread2_thread0_#t~nondet4_1|} AuxVars[] AssignedVars[Thread2_thread0_#t~nondet4] VAL [Thread0_thread3_thidvar0=2, Thread2_thread0_thidvar0=5, Thread2_thread0_~arg.base=0, Thread2_thread0_~arg.offset=0, Thread4_thread1_thidvar0=0, Thread4_thread1_~arg.base=0, Thread4_thread1_~arg.offset=0, Thread5_thread2_thidvar0=1, Thread5_thread2_~arg.base=0, Thread5_thread2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_thread3_#in~arg.base|=0, |Thread0_thread3_#in~arg.offset|=0, |Thread2_thread0_#in~arg.base|=0, |Thread2_thread0_#in~arg.offset|=0, |Thread2_thread0_~#t1~0.base|=96, |Thread2_thread0_~#t1~0.offset|=0, |Thread2_thread0_~#t2~0.base|=93, |Thread2_thread0_~#t2~0.offset|=0, |Thread2_thread0_~#t3~0.base|=90, |Thread2_thread0_~#t3~0.offset|=0, |Thread2_thread0_~#t4~0.base|=91, |Thread2_thread0_~#t4~0.offset|=0, |Thread2_thread0_~#t5~0.base|=95, |Thread2_thread0_~#t5~0.offset|=0, |Thread4_thread1_#in~arg.base|=0, |Thread4_thread1_#in~arg.offset|=0, |Thread4_thread1_#res.base|=0, |Thread4_thread1_#res.offset|=0, |Thread4_thread1_#t~malloc0.base|=92, |Thread4_thread1_#t~malloc0.offset|=0, |Thread5_thread2_#in~arg.base|=0, |Thread5_thread2_#in~arg.offset|=0, |Thread5_thread2_#res.base|=0, |Thread5_thread2_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 3 [247] thread3ENTRY-->L1226: Formula: (and (= v_Thread0_thread3_~arg.offset_1 |v_Thread0_thread3_#in~arg.offset_1|) (= v_Thread0_thread3_~arg.base_1 |v_Thread0_thread3_#in~arg.base_1|)) InVars {Thread0_thread3_#in~arg.base=|v_Thread0_thread3_#in~arg.base_1|, Thread0_thread3_#in~arg.offset=|v_Thread0_thread3_#in~arg.offset_1|} OutVars{Thread0_thread3_~arg.offset=v_Thread0_thread3_~arg.offset_1, Thread0_thread3_~arg.base=v_Thread0_thread3_~arg.base_1, Thread0_thread3_#in~arg.offset=|v_Thread0_thread3_#in~arg.offset_1|, Thread0_thread3_#in~arg.base=|v_Thread0_thread3_#in~arg.base_1|} AuxVars[] AssignedVars[Thread0_thread3_~arg.offset, Thread0_thread3_~arg.base] VAL [Thread0_thread3_thidvar0=2, Thread0_thread3_~arg.base=0, Thread0_thread3_~arg.offset=0, Thread2_thread0_thidvar0=5, Thread2_thread0_~arg.base=0, Thread2_thread0_~arg.offset=0, Thread4_thread1_thidvar0=0, Thread4_thread1_~arg.base=0, Thread4_thread1_~arg.offset=0, Thread5_thread2_thidvar0=1, Thread5_thread2_~arg.base=0, Thread5_thread2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_thread3_#in~arg.base|=0, |Thread0_thread3_#in~arg.offset|=0, |Thread2_thread0_#in~arg.base|=0, |Thread2_thread0_#in~arg.offset|=0, |Thread2_thread0_~#t1~0.base|=96, |Thread2_thread0_~#t1~0.offset|=0, |Thread2_thread0_~#t2~0.base|=93, |Thread2_thread0_~#t2~0.offset|=0, |Thread2_thread0_~#t3~0.base|=90, |Thread2_thread0_~#t3~0.offset|=0, |Thread2_thread0_~#t4~0.base|=91, |Thread2_thread0_~#t4~0.offset|=0, |Thread2_thread0_~#t5~0.base|=95, |Thread2_thread0_~#t5~0.offset|=0, |Thread4_thread1_#in~arg.base|=0, |Thread4_thread1_#in~arg.offset|=0, |Thread4_thread1_#res.base|=0, |Thread4_thread1_#res.offset|=0, |Thread4_thread1_#t~malloc0.base|=92, |Thread4_thread1_#t~malloc0.offset|=0, |Thread5_thread2_#in~arg.base|=0, |Thread5_thread2_#in~arg.offset|=0, |Thread5_thread2_#res.base|=0, |Thread5_thread2_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 [200] L1236-->L1236-1: Formula: (= |v_#memory_int_8| (store |v_#memory_int_9| |v_Thread2_thread0_~#t4~0.base_2| (store (select |v_#memory_int_9| |v_Thread2_thread0_~#t4~0.base_2|) |v_Thread2_thread0_~#t4~0.offset_2| 3))) InVars {#memory_int=|v_#memory_int_9|, Thread2_thread0_~#t4~0.offset=|v_Thread2_thread0_~#t4~0.offset_2|, Thread2_thread0_~#t4~0.base=|v_Thread2_thread0_~#t4~0.base_2|} OutVars{#memory_int=|v_#memory_int_8|, Thread2_thread0_~#t4~0.offset=|v_Thread2_thread0_~#t4~0.offset_2|, Thread2_thread0_~#t4~0.base=|v_Thread2_thread0_~#t4~0.base_2|} AuxVars[] AssignedVars[#memory_int] VAL [Thread0_thread3_thidvar0=2, Thread0_thread3_~arg.base=0, Thread0_thread3_~arg.offset=0, Thread2_thread0_thidvar0=5, Thread2_thread0_~arg.base=0, Thread2_thread0_~arg.offset=0, Thread4_thread1_thidvar0=0, Thread4_thread1_~arg.base=0, Thread4_thread1_~arg.offset=0, Thread5_thread2_thidvar0=1, Thread5_thread2_~arg.base=0, Thread5_thread2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_thread3_#in~arg.base|=0, |Thread0_thread3_#in~arg.offset|=0, |Thread2_thread0_#in~arg.base|=0, |Thread2_thread0_#in~arg.offset|=0, |Thread2_thread0_~#t1~0.base|=96, |Thread2_thread0_~#t1~0.offset|=0, |Thread2_thread0_~#t2~0.base|=93, |Thread2_thread0_~#t2~0.offset|=0, |Thread2_thread0_~#t3~0.base|=90, |Thread2_thread0_~#t3~0.offset|=0, |Thread2_thread0_~#t4~0.base|=91, |Thread2_thread0_~#t4~0.offset|=0, |Thread2_thread0_~#t5~0.base|=95, |Thread2_thread0_~#t5~0.offset|=0, |Thread4_thread1_#in~arg.base|=0, |Thread4_thread1_#in~arg.offset|=0, |Thread4_thread1_#res.base|=0, |Thread4_thread1_#res.offset|=0, |Thread4_thread1_#t~malloc0.base|=92, |Thread4_thread1_#t~malloc0.offset|=0, |Thread5_thread2_#in~arg.base|=0, |Thread5_thread2_#in~arg.offset|=0, |Thread5_thread2_#res.base|=0, |Thread5_thread2_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] FORK 0 [260] L1236-1-->thread2ENTRY: Formula: (and (= v_Thread1_thread2_thidvar0_4 3) (= 0 |v_Thread1_thread2_#in~arg.offset_5|) (= 0 |v_Thread1_thread2_#in~arg.base_5|)) InVars {} OutVars{Thread1_thread2_#in~arg.base=|v_Thread1_thread2_#in~arg.base_5|, Thread1_thread2_thidvar0=v_Thread1_thread2_thidvar0_4, Thread1_thread2_#in~arg.offset=|v_Thread1_thread2_#in~arg.offset_5|} AuxVars[] AssignedVars[Thread1_thread2_#in~arg.base, Thread1_thread2_thidvar0, Thread1_thread2_#in~arg.offset] VAL [Thread0_thread3_thidvar0=2, Thread0_thread3_~arg.base=0, Thread0_thread3_~arg.offset=0, Thread1_thread2_thidvar0=3, Thread2_thread0_thidvar0=5, Thread2_thread0_~arg.base=0, Thread2_thread0_~arg.offset=0, Thread4_thread1_thidvar0=0, Thread4_thread1_~arg.base=0, Thread4_thread1_~arg.offset=0, Thread5_thread2_thidvar0=1, Thread5_thread2_~arg.base=0, Thread5_thread2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_thread3_#in~arg.base|=0, |Thread0_thread3_#in~arg.offset|=0, |Thread1_thread2_#in~arg.base|=0, |Thread1_thread2_#in~arg.offset|=0, |Thread2_thread0_#in~arg.base|=0, |Thread2_thread0_#in~arg.offset|=0, |Thread2_thread0_~#t1~0.base|=96, |Thread2_thread0_~#t1~0.offset|=0, |Thread2_thread0_~#t2~0.base|=93, |Thread2_thread0_~#t2~0.offset|=0, |Thread2_thread0_~#t3~0.base|=90, |Thread2_thread0_~#t3~0.offset|=0, |Thread2_thread0_~#t4~0.base|=91, |Thread2_thread0_~#t4~0.offset|=0, |Thread2_thread0_~#t5~0.base|=95, |Thread2_thread0_~#t5~0.offset|=0, |Thread4_thread1_#in~arg.base|=0, |Thread4_thread1_#in~arg.offset|=0, |Thread4_thread1_#res.base|=0, |Thread4_thread1_#res.offset|=0, |Thread4_thread1_#t~malloc0.base|=92, |Thread4_thread1_#t~malloc0.offset|=0, |Thread5_thread2_#in~arg.base|=0, |Thread5_thread2_#in~arg.offset|=0, |Thread5_thread2_#res.base|=0, |Thread5_thread2_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 [202] L1236-2-->L1237: Formula: true InVars {} OutVars{Thread2_thread0_#t~nondet5=|v_Thread2_thread0_#t~nondet5_1|} AuxVars[] AssignedVars[Thread2_thread0_#t~nondet5] VAL [Thread0_thread3_thidvar0=2, Thread0_thread3_~arg.base=0, Thread0_thread3_~arg.offset=0, Thread1_thread2_thidvar0=3, Thread2_thread0_thidvar0=5, Thread2_thread0_~arg.base=0, Thread2_thread0_~arg.offset=0, Thread4_thread1_thidvar0=0, Thread4_thread1_~arg.base=0, Thread4_thread1_~arg.offset=0, Thread5_thread2_thidvar0=1, Thread5_thread2_~arg.base=0, Thread5_thread2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_thread3_#in~arg.base|=0, |Thread0_thread3_#in~arg.offset|=0, |Thread1_thread2_#in~arg.base|=0, |Thread1_thread2_#in~arg.offset|=0, |Thread2_thread0_#in~arg.base|=0, |Thread2_thread0_#in~arg.offset|=0, |Thread2_thread0_~#t1~0.base|=96, |Thread2_thread0_~#t1~0.offset|=0, |Thread2_thread0_~#t2~0.base|=93, |Thread2_thread0_~#t2~0.offset|=0, |Thread2_thread0_~#t3~0.base|=90, |Thread2_thread0_~#t3~0.offset|=0, |Thread2_thread0_~#t4~0.base|=91, |Thread2_thread0_~#t4~0.offset|=0, |Thread2_thread0_~#t5~0.base|=95, |Thread2_thread0_~#t5~0.offset|=0, |Thread4_thread1_#in~arg.base|=0, |Thread4_thread1_#in~arg.offset|=0, |Thread4_thread1_#res.base|=0, |Thread4_thread1_#res.offset|=0, |Thread4_thread1_#t~malloc0.base|=92, |Thread4_thread1_#t~malloc0.offset|=0, |Thread5_thread2_#in~arg.base|=0, |Thread5_thread2_#in~arg.offset|=0, |Thread5_thread2_#res.base|=0, |Thread5_thread2_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 [203] L1237-->L1237-1: Formula: (= (store |v_#memory_int_11| |v_Thread2_thread0_~#t5~0.base_2| (store (select |v_#memory_int_11| |v_Thread2_thread0_~#t5~0.base_2|) |v_Thread2_thread0_~#t5~0.offset_2| 4)) |v_#memory_int_10|) InVars {#memory_int=|v_#memory_int_11|, Thread2_thread0_~#t5~0.base=|v_Thread2_thread0_~#t5~0.base_2|, Thread2_thread0_~#t5~0.offset=|v_Thread2_thread0_~#t5~0.offset_2|} OutVars{#memory_int=|v_#memory_int_10|, Thread2_thread0_~#t5~0.base=|v_Thread2_thread0_~#t5~0.base_2|, Thread2_thread0_~#t5~0.offset=|v_Thread2_thread0_~#t5~0.offset_2|} AuxVars[] AssignedVars[#memory_int] VAL [Thread0_thread3_thidvar0=2, Thread0_thread3_~arg.base=0, Thread0_thread3_~arg.offset=0, Thread1_thread2_thidvar0=3, Thread2_thread0_thidvar0=5, Thread2_thread0_~arg.base=0, Thread2_thread0_~arg.offset=0, Thread4_thread1_thidvar0=0, Thread4_thread1_~arg.base=0, Thread4_thread1_~arg.offset=0, Thread5_thread2_thidvar0=1, Thread5_thread2_~arg.base=0, Thread5_thread2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_thread3_#in~arg.base|=0, |Thread0_thread3_#in~arg.offset|=0, |Thread1_thread2_#in~arg.base|=0, |Thread1_thread2_#in~arg.offset|=0, |Thread2_thread0_#in~arg.base|=0, |Thread2_thread0_#in~arg.offset|=0, |Thread2_thread0_~#t1~0.base|=96, |Thread2_thread0_~#t1~0.offset|=0, |Thread2_thread0_~#t2~0.base|=93, |Thread2_thread0_~#t2~0.offset|=0, |Thread2_thread0_~#t3~0.base|=90, |Thread2_thread0_~#t3~0.offset|=0, |Thread2_thread0_~#t4~0.base|=91, |Thread2_thread0_~#t4~0.offset|=0, |Thread2_thread0_~#t5~0.base|=95, |Thread2_thread0_~#t5~0.offset|=0, |Thread4_thread1_#in~arg.base|=0, |Thread4_thread1_#in~arg.offset|=0, |Thread4_thread1_#res.base|=0, |Thread4_thread1_#res.offset|=0, |Thread4_thread1_#t~malloc0.base|=92, |Thread4_thread1_#t~malloc0.offset|=0, |Thread5_thread2_#in~arg.base|=0, |Thread5_thread2_#in~arg.offset|=0, |Thread5_thread2_#res.base|=0, |Thread5_thread2_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] FORK 0 [261] L1237-1-->thread2ENTRY: Formula: (and (= 0 |v_Thread3_thread2_#in~arg.offset_5|) (= 0 |v_Thread3_thread2_#in~arg.base_5|) (= v_Thread3_thread2_thidvar0_4 4)) InVars {} OutVars{Thread3_thread2_#in~arg.offset=|v_Thread3_thread2_#in~arg.offset_5|, Thread3_thread2_thidvar0=v_Thread3_thread2_thidvar0_4, Thread3_thread2_#in~arg.base=|v_Thread3_thread2_#in~arg.base_5|} AuxVars[] AssignedVars[Thread3_thread2_#in~arg.offset, Thread3_thread2_thidvar0, Thread3_thread2_#in~arg.base] VAL [Thread0_thread3_thidvar0=2, Thread0_thread3_~arg.base=0, Thread0_thread3_~arg.offset=0, Thread1_thread2_thidvar0=3, Thread2_thread0_thidvar0=5, Thread2_thread0_~arg.base=0, Thread2_thread0_~arg.offset=0, Thread3_thread2_thidvar0=4, Thread4_thread1_thidvar0=0, Thread4_thread1_~arg.base=0, Thread4_thread1_~arg.offset=0, Thread5_thread2_thidvar0=1, Thread5_thread2_~arg.base=0, Thread5_thread2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_thread3_#in~arg.base|=0, |Thread0_thread3_#in~arg.offset|=0, |Thread1_thread2_#in~arg.base|=0, |Thread1_thread2_#in~arg.offset|=0, |Thread2_thread0_#in~arg.base|=0, |Thread2_thread0_#in~arg.offset|=0, |Thread2_thread0_~#t1~0.base|=96, |Thread2_thread0_~#t1~0.offset|=0, |Thread2_thread0_~#t2~0.base|=93, |Thread2_thread0_~#t2~0.offset|=0, |Thread2_thread0_~#t3~0.base|=90, |Thread2_thread0_~#t3~0.offset|=0, |Thread2_thread0_~#t4~0.base|=91, |Thread2_thread0_~#t4~0.offset|=0, |Thread2_thread0_~#t5~0.base|=95, |Thread2_thread0_~#t5~0.offset|=0, |Thread3_thread2_#in~arg.base|=0, |Thread3_thread2_#in~arg.offset|=0, |Thread4_thread1_#in~arg.base|=0, |Thread4_thread1_#in~arg.offset|=0, |Thread4_thread1_#res.base|=0, |Thread4_thread1_#res.offset|=0, |Thread4_thread1_#t~malloc0.base|=92, |Thread4_thread1_#t~malloc0.offset|=0, |Thread5_thread2_#in~arg.base|=0, |Thread5_thread2_#in~arg.offset|=0, |Thread5_thread2_#res.base|=0, |Thread5_thread2_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 4 [235] thread2ENTRY-->L1221: Formula: (and (= v_Thread3_thread2_~arg.base_1 |v_Thread3_thread2_#in~arg.base_1|) (= v_Thread3_thread2_~arg.offset_1 |v_Thread3_thread2_#in~arg.offset_1|)) InVars {Thread3_thread2_#in~arg.offset=|v_Thread3_thread2_#in~arg.offset_1|, Thread3_thread2_#in~arg.base=|v_Thread3_thread2_#in~arg.base_1|} OutVars{Thread3_thread2_#in~arg.offset=|v_Thread3_thread2_#in~arg.offset_1|, Thread3_thread2_~arg.base=v_Thread3_thread2_~arg.base_1, Thread3_thread2_~arg.offset=v_Thread3_thread2_~arg.offset_1, Thread3_thread2_#in~arg.base=|v_Thread3_thread2_#in~arg.base_1|} AuxVars[] AssignedVars[Thread3_thread2_~arg.offset, Thread3_thread2_~arg.base] VAL [Thread0_thread3_thidvar0=2, Thread0_thread3_~arg.base=0, Thread0_thread3_~arg.offset=0, Thread1_thread2_thidvar0=3, Thread2_thread0_thidvar0=5, Thread2_thread0_~arg.base=0, Thread2_thread0_~arg.offset=0, Thread3_thread2_thidvar0=4, Thread3_thread2_~arg.base=0, Thread3_thread2_~arg.offset=0, Thread4_thread1_thidvar0=0, Thread4_thread1_~arg.base=0, Thread4_thread1_~arg.offset=0, Thread5_thread2_thidvar0=1, Thread5_thread2_~arg.base=0, Thread5_thread2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_thread3_#in~arg.base|=0, |Thread0_thread3_#in~arg.offset|=0, |Thread1_thread2_#in~arg.base|=0, |Thread1_thread2_#in~arg.offset|=0, |Thread2_thread0_#in~arg.base|=0, |Thread2_thread0_#in~arg.offset|=0, |Thread2_thread0_~#t1~0.base|=96, |Thread2_thread0_~#t1~0.offset|=0, |Thread2_thread0_~#t2~0.base|=93, |Thread2_thread0_~#t2~0.offset|=0, |Thread2_thread0_~#t3~0.base|=90, |Thread2_thread0_~#t3~0.offset|=0, |Thread2_thread0_~#t4~0.base|=91, |Thread2_thread0_~#t4~0.offset|=0, |Thread2_thread0_~#t5~0.base|=95, |Thread2_thread0_~#t5~0.offset|=0, |Thread3_thread2_#in~arg.base|=0, |Thread3_thread2_#in~arg.offset|=0, |Thread4_thread1_#in~arg.base|=0, |Thread4_thread1_#in~arg.offset|=0, |Thread4_thread1_#res.base|=0, |Thread4_thread1_#res.offset|=0, |Thread4_thread1_#t~malloc0.base|=92, |Thread4_thread1_#t~malloc0.offset|=0, |Thread5_thread2_#in~arg.base|=0, |Thread5_thread2_#in~arg.offset|=0, |Thread5_thread2_#res.base|=0, |Thread5_thread2_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 4 [236] L1221-->L1221-1: Formula: (= |v_#memory_int_16| (store |v_#memory_int_17| v_~v~0.base_2 (store (select |v_#memory_int_17| v_~v~0.base_2) v_~v~0.offset_2 88))) InVars {#memory_int=|v_#memory_int_17|, ~v~0.offset=v_~v~0.offset_2, ~v~0.base=v_~v~0.base_2} OutVars{#memory_int=|v_#memory_int_16|, ~v~0.offset=v_~v~0.offset_2, ~v~0.base=v_~v~0.base_2} AuxVars[] AssignedVars[#memory_int] VAL [Thread0_thread3_thidvar0=2, Thread0_thread3_~arg.base=0, Thread0_thread3_~arg.offset=0, Thread1_thread2_thidvar0=3, Thread2_thread0_thidvar0=5, Thread2_thread0_~arg.base=0, Thread2_thread0_~arg.offset=0, Thread3_thread2_thidvar0=4, Thread3_thread2_~arg.base=0, Thread3_thread2_~arg.offset=0, Thread4_thread1_thidvar0=0, Thread4_thread1_~arg.base=0, Thread4_thread1_~arg.offset=0, Thread5_thread2_thidvar0=1, Thread5_thread2_~arg.base=0, Thread5_thread2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_thread3_#in~arg.base|=0, |Thread0_thread3_#in~arg.offset|=0, |Thread1_thread2_#in~arg.base|=0, |Thread1_thread2_#in~arg.offset|=0, |Thread2_thread0_#in~arg.base|=0, |Thread2_thread0_#in~arg.offset|=0, |Thread2_thread0_~#t1~0.base|=96, |Thread2_thread0_~#t1~0.offset|=0, |Thread2_thread0_~#t2~0.base|=93, |Thread2_thread0_~#t2~0.offset|=0, |Thread2_thread0_~#t3~0.base|=90, |Thread2_thread0_~#t3~0.offset|=0, |Thread2_thread0_~#t4~0.base|=91, |Thread2_thread0_~#t4~0.offset|=0, |Thread2_thread0_~#t5~0.base|=95, |Thread2_thread0_~#t5~0.offset|=0, |Thread3_thread2_#in~arg.base|=0, |Thread3_thread2_#in~arg.offset|=0, |Thread4_thread1_#in~arg.base|=0, |Thread4_thread1_#in~arg.offset|=0, |Thread4_thread1_#res.base|=0, |Thread4_thread1_#res.offset|=0, |Thread4_thread1_#t~malloc0.base|=92, |Thread4_thread1_#t~malloc0.offset|=0, |Thread5_thread2_#in~arg.base|=0, |Thread5_thread2_#in~arg.offset|=0, |Thread5_thread2_#res.base|=0, |Thread5_thread2_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 4 [237] L1221-1-->thread2FINAL: Formula: (and (= |v_Thread3_thread2_#res.base_1| 0) (= |v_Thread3_thread2_#res.offset_1| 0)) InVars {} OutVars{Thread3_thread2_#res.offset=|v_Thread3_thread2_#res.offset_1|, Thread3_thread2_#res.base=|v_Thread3_thread2_#res.base_1|} AuxVars[] AssignedVars[Thread3_thread2_#res.base, Thread3_thread2_#res.offset] VAL [Thread0_thread3_thidvar0=2, Thread0_thread3_~arg.base=0, Thread0_thread3_~arg.offset=0, Thread1_thread2_thidvar0=3, Thread2_thread0_thidvar0=5, Thread2_thread0_~arg.base=0, Thread2_thread0_~arg.offset=0, Thread3_thread2_thidvar0=4, Thread3_thread2_~arg.base=0, Thread3_thread2_~arg.offset=0, Thread4_thread1_thidvar0=0, Thread4_thread1_~arg.base=0, Thread4_thread1_~arg.offset=0, Thread5_thread2_thidvar0=1, Thread5_thread2_~arg.base=0, Thread5_thread2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_thread3_#in~arg.base|=0, |Thread0_thread3_#in~arg.offset|=0, |Thread1_thread2_#in~arg.base|=0, |Thread1_thread2_#in~arg.offset|=0, |Thread2_thread0_#in~arg.base|=0, |Thread2_thread0_#in~arg.offset|=0, |Thread2_thread0_~#t1~0.base|=96, |Thread2_thread0_~#t1~0.offset|=0, |Thread2_thread0_~#t2~0.base|=93, |Thread2_thread0_~#t2~0.offset|=0, |Thread2_thread0_~#t3~0.base|=90, |Thread2_thread0_~#t3~0.offset|=0, |Thread2_thread0_~#t4~0.base|=91, |Thread2_thread0_~#t4~0.offset|=0, |Thread2_thread0_~#t5~0.base|=95, |Thread2_thread0_~#t5~0.offset|=0, |Thread3_thread2_#in~arg.base|=0, |Thread3_thread2_#in~arg.offset|=0, |Thread3_thread2_#res.base|=0, |Thread3_thread2_#res.offset|=0, |Thread4_thread1_#in~arg.base|=0, |Thread4_thread1_#in~arg.offset|=0, |Thread4_thread1_#res.base|=0, |Thread4_thread1_#res.offset|=0, |Thread4_thread1_#t~malloc0.base|=92, |Thread4_thread1_#t~malloc0.offset|=0, |Thread5_thread2_#in~arg.base|=0, |Thread5_thread2_#in~arg.offset|=0, |Thread5_thread2_#res.base|=0, |Thread5_thread2_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 [205] L1237-2-->L1238: Formula: true InVars {} OutVars{Thread2_thread0_#t~nondet6=|v_Thread2_thread0_#t~nondet6_1|} AuxVars[] AssignedVars[Thread2_thread0_#t~nondet6] VAL [Thread0_thread3_thidvar0=2, Thread0_thread3_~arg.base=0, Thread0_thread3_~arg.offset=0, Thread1_thread2_thidvar0=3, Thread2_thread0_thidvar0=5, Thread2_thread0_~arg.base=0, Thread2_thread0_~arg.offset=0, Thread3_thread2_thidvar0=4, Thread3_thread2_~arg.base=0, Thread3_thread2_~arg.offset=0, Thread4_thread1_thidvar0=0, Thread4_thread1_~arg.base=0, Thread4_thread1_~arg.offset=0, Thread5_thread2_thidvar0=1, Thread5_thread2_~arg.base=0, Thread5_thread2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_thread3_#in~arg.base|=0, |Thread0_thread3_#in~arg.offset|=0, |Thread1_thread2_#in~arg.base|=0, |Thread1_thread2_#in~arg.offset|=0, |Thread2_thread0_#in~arg.base|=0, |Thread2_thread0_#in~arg.offset|=0, |Thread2_thread0_~#t1~0.base|=96, |Thread2_thread0_~#t1~0.offset|=0, |Thread2_thread0_~#t2~0.base|=93, |Thread2_thread0_~#t2~0.offset|=0, |Thread2_thread0_~#t3~0.base|=90, |Thread2_thread0_~#t3~0.offset|=0, |Thread2_thread0_~#t4~0.base|=91, |Thread2_thread0_~#t4~0.offset|=0, |Thread2_thread0_~#t5~0.base|=95, |Thread2_thread0_~#t5~0.offset|=0, |Thread3_thread2_#in~arg.base|=0, |Thread3_thread2_#in~arg.offset|=0, |Thread3_thread2_#res.base|=0, |Thread3_thread2_#res.offset|=0, |Thread4_thread1_#in~arg.base|=0, |Thread4_thread1_#in~arg.offset|=0, |Thread4_thread1_#res.base|=0, |Thread4_thread1_#res.offset|=0, |Thread4_thread1_#t~malloc0.base|=92, |Thread4_thread1_#t~malloc0.offset|=0, |Thread5_thread2_#in~arg.base|=0, |Thread5_thread2_#in~arg.offset|=0, |Thread5_thread2_#res.base|=0, |Thread5_thread2_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 [206] L1238-->L1238-1: Formula: (= (select (select |v_#memory_int_12| |v_Thread2_thread0_~#t2~0.base_3|) |v_Thread2_thread0_~#t2~0.offset_3|) |v_Thread2_thread0_#t~mem7_1|) InVars {#memory_int=|v_#memory_int_12|, Thread2_thread0_~#t2~0.offset=|v_Thread2_thread0_~#t2~0.offset_3|, Thread2_thread0_~#t2~0.base=|v_Thread2_thread0_~#t2~0.base_3|} OutVars{#memory_int=|v_#memory_int_12|, Thread2_thread0_#t~mem7=|v_Thread2_thread0_#t~mem7_1|, Thread2_thread0_~#t2~0.offset=|v_Thread2_thread0_~#t2~0.offset_3|, Thread2_thread0_~#t2~0.base=|v_Thread2_thread0_~#t2~0.base_3|} AuxVars[] AssignedVars[Thread2_thread0_#t~mem7] VAL [Thread0_thread3_thidvar0=2, Thread0_thread3_~arg.base=0, Thread0_thread3_~arg.offset=0, Thread1_thread2_thidvar0=3, Thread2_thread0_thidvar0=5, Thread2_thread0_~arg.base=0, Thread2_thread0_~arg.offset=0, Thread3_thread2_thidvar0=4, Thread3_thread2_~arg.base=0, Thread3_thread2_~arg.offset=0, Thread4_thread1_thidvar0=0, Thread4_thread1_~arg.base=0, Thread4_thread1_~arg.offset=0, Thread5_thread2_thidvar0=1, Thread5_thread2_~arg.base=0, Thread5_thread2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_thread3_#in~arg.base|=0, |Thread0_thread3_#in~arg.offset|=0, |Thread1_thread2_#in~arg.base|=0, |Thread1_thread2_#in~arg.offset|=0, |Thread2_thread0_#in~arg.base|=0, |Thread2_thread0_#in~arg.offset|=0, |Thread2_thread0_#t~mem7|=1, |Thread2_thread0_~#t1~0.base|=96, |Thread2_thread0_~#t1~0.offset|=0, |Thread2_thread0_~#t2~0.base|=93, |Thread2_thread0_~#t2~0.offset|=0, |Thread2_thread0_~#t3~0.base|=90, |Thread2_thread0_~#t3~0.offset|=0, |Thread2_thread0_~#t4~0.base|=91, |Thread2_thread0_~#t4~0.offset|=0, |Thread2_thread0_~#t5~0.base|=95, |Thread2_thread0_~#t5~0.offset|=0, |Thread3_thread2_#in~arg.base|=0, |Thread3_thread2_#in~arg.offset|=0, |Thread3_thread2_#res.base|=0, |Thread3_thread2_#res.offset|=0, |Thread4_thread1_#in~arg.base|=0, |Thread4_thread1_#in~arg.offset|=0, |Thread4_thread1_#res.base|=0, |Thread4_thread1_#res.offset|=0, |Thread4_thread1_#t~malloc0.base|=92, |Thread4_thread1_#t~malloc0.offset|=0, |Thread5_thread2_#in~arg.base|=0, |Thread5_thread2_#in~arg.offset|=0, |Thread5_thread2_#res.base|=0, |Thread5_thread2_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] JOIN 2 [340] thread2EXIT-->L1238-2: Formula: (= |v_Thread2_thread0_#t~mem7_6| v_Thread5_thread2_thidvar0_34) InVars {Thread5_thread2_thidvar0=v_Thread5_thread2_thidvar0_34, Thread2_thread0_#t~mem7=|v_Thread2_thread0_#t~mem7_6|} OutVars{Thread5_thread2_thidvar0=v_Thread5_thread2_thidvar0_34, Thread2_thread0_#t~mem7=|v_Thread2_thread0_#t~mem7_6|} AuxVars[] AssignedVars[] VAL [Thread0_thread3_thidvar0=2, Thread0_thread3_~arg.base=0, Thread0_thread3_~arg.offset=0, Thread1_thread2_thidvar0=3, Thread2_thread0_thidvar0=5, Thread2_thread0_~arg.base=0, Thread2_thread0_~arg.offset=0, Thread3_thread2_thidvar0=4, Thread3_thread2_~arg.base=0, Thread3_thread2_~arg.offset=0, Thread4_thread1_thidvar0=0, Thread4_thread1_~arg.base=0, Thread4_thread1_~arg.offset=0, Thread5_thread2_thidvar0=1, Thread5_thread2_~arg.base=0, Thread5_thread2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_thread3_#in~arg.base|=0, |Thread0_thread3_#in~arg.offset|=0, |Thread1_thread2_#in~arg.base|=0, |Thread1_thread2_#in~arg.offset|=0, |Thread2_thread0_#in~arg.base|=0, |Thread2_thread0_#in~arg.offset|=0, |Thread2_thread0_#t~mem7|=1, |Thread2_thread0_~#t1~0.base|=96, |Thread2_thread0_~#t1~0.offset|=0, |Thread2_thread0_~#t2~0.base|=93, |Thread2_thread0_~#t2~0.offset|=0, |Thread2_thread0_~#t3~0.base|=90, |Thread2_thread0_~#t3~0.offset|=0, |Thread2_thread0_~#t4~0.base|=91, |Thread2_thread0_~#t4~0.offset|=0, |Thread2_thread0_~#t5~0.base|=95, |Thread2_thread0_~#t5~0.offset|=0, |Thread3_thread2_#in~arg.base|=0, |Thread3_thread2_#in~arg.offset|=0, |Thread3_thread2_#res.base|=0, |Thread3_thread2_#res.offset|=0, |Thread4_thread1_#in~arg.base|=0, |Thread4_thread1_#in~arg.offset|=0, |Thread4_thread1_#res.base|=0, |Thread4_thread1_#res.offset|=0, |Thread4_thread1_#t~malloc0.base|=92, |Thread4_thread1_#t~malloc0.offset|=0, |Thread5_thread2_#in~arg.base|=0, |Thread5_thread2_#in~arg.offset|=0, |Thread5_thread2_#res.base|=0, |Thread5_thread2_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 [208] L1238-2-->L1239: Formula: true InVars {} OutVars{Thread2_thread0_#t~mem7=|v_Thread2_thread0_#t~mem7_2|} AuxVars[] AssignedVars[Thread2_thread0_#t~mem7] VAL [Thread0_thread3_thidvar0=2, Thread0_thread3_~arg.base=0, Thread0_thread3_~arg.offset=0, Thread1_thread2_thidvar0=3, Thread2_thread0_thidvar0=5, Thread2_thread0_~arg.base=0, Thread2_thread0_~arg.offset=0, Thread3_thread2_thidvar0=4, Thread3_thread2_~arg.base=0, Thread3_thread2_~arg.offset=0, Thread4_thread1_thidvar0=0, Thread4_thread1_~arg.base=0, Thread4_thread1_~arg.offset=0, Thread5_thread2_thidvar0=1, Thread5_thread2_~arg.base=0, Thread5_thread2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_thread3_#in~arg.base|=0, |Thread0_thread3_#in~arg.offset|=0, |Thread1_thread2_#in~arg.base|=0, |Thread1_thread2_#in~arg.offset|=0, |Thread2_thread0_#in~arg.base|=0, |Thread2_thread0_#in~arg.offset|=0, |Thread2_thread0_~#t1~0.base|=96, |Thread2_thread0_~#t1~0.offset|=0, |Thread2_thread0_~#t2~0.base|=93, |Thread2_thread0_~#t2~0.offset|=0, |Thread2_thread0_~#t3~0.base|=90, |Thread2_thread0_~#t3~0.offset|=0, |Thread2_thread0_~#t4~0.base|=91, |Thread2_thread0_~#t4~0.offset|=0, |Thread2_thread0_~#t5~0.base|=95, |Thread2_thread0_~#t5~0.offset|=0, |Thread3_thread2_#in~arg.base|=0, |Thread3_thread2_#in~arg.offset|=0, |Thread3_thread2_#res.base|=0, |Thread3_thread2_#res.offset|=0, |Thread4_thread1_#in~arg.base|=0, |Thread4_thread1_#in~arg.offset|=0, |Thread4_thread1_#res.base|=0, |Thread4_thread1_#res.offset|=0, |Thread4_thread1_#t~malloc0.base|=92, |Thread4_thread1_#t~malloc0.offset|=0, |Thread5_thread2_#in~arg.base|=0, |Thread5_thread2_#in~arg.offset|=0, |Thread5_thread2_#res.base|=0, |Thread5_thread2_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 [209] L1239-->L1239-1: Formula: (= |v_Thread2_thread0_#t~mem8_1| (select (select |v_#memory_int_13| |v_Thread2_thread0_~#t3~0.base_3|) |v_Thread2_thread0_~#t3~0.offset_3|)) InVars {Thread2_thread0_~#t3~0.offset=|v_Thread2_thread0_~#t3~0.offset_3|, #memory_int=|v_#memory_int_13|, Thread2_thread0_~#t3~0.base=|v_Thread2_thread0_~#t3~0.base_3|} OutVars{Thread2_thread0_~#t3~0.offset=|v_Thread2_thread0_~#t3~0.offset_3|, #memory_int=|v_#memory_int_13|, Thread2_thread0_#t~mem8=|v_Thread2_thread0_#t~mem8_1|, Thread2_thread0_~#t3~0.base=|v_Thread2_thread0_~#t3~0.base_3|} AuxVars[] AssignedVars[Thread2_thread0_#t~mem8] VAL [Thread0_thread3_thidvar0=2, Thread0_thread3_~arg.base=0, Thread0_thread3_~arg.offset=0, Thread1_thread2_thidvar0=3, Thread2_thread0_thidvar0=5, Thread2_thread0_~arg.base=0, Thread2_thread0_~arg.offset=0, Thread3_thread2_thidvar0=4, Thread3_thread2_~arg.base=0, Thread3_thread2_~arg.offset=0, Thread4_thread1_thidvar0=0, Thread4_thread1_~arg.base=0, Thread4_thread1_~arg.offset=0, Thread5_thread2_thidvar0=1, Thread5_thread2_~arg.base=0, Thread5_thread2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_thread3_#in~arg.base|=0, |Thread0_thread3_#in~arg.offset|=0, |Thread1_thread2_#in~arg.base|=0, |Thread1_thread2_#in~arg.offset|=0, |Thread2_thread0_#in~arg.base|=0, |Thread2_thread0_#in~arg.offset|=0, |Thread2_thread0_#t~mem8|=2, |Thread2_thread0_~#t1~0.base|=96, |Thread2_thread0_~#t1~0.offset|=0, |Thread2_thread0_~#t2~0.base|=93, |Thread2_thread0_~#t2~0.offset|=0, |Thread2_thread0_~#t3~0.base|=90, |Thread2_thread0_~#t3~0.offset|=0, |Thread2_thread0_~#t4~0.base|=91, |Thread2_thread0_~#t4~0.offset|=0, |Thread2_thread0_~#t5~0.base|=95, |Thread2_thread0_~#t5~0.offset|=0, |Thread3_thread2_#in~arg.base|=0, |Thread3_thread2_#in~arg.offset|=0, |Thread3_thread2_#res.base|=0, |Thread3_thread2_#res.offset|=0, |Thread4_thread1_#in~arg.base|=0, |Thread4_thread1_#in~arg.offset|=0, |Thread4_thread1_#res.base|=0, |Thread4_thread1_#res.offset|=0, |Thread4_thread1_#t~malloc0.base|=92, |Thread4_thread1_#t~malloc0.offset|=0, |Thread5_thread2_#in~arg.base|=0, |Thread5_thread2_#in~arg.offset|=0, |Thread5_thread2_#res.base|=0, |Thread5_thread2_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 4 [238] thread2FINAL-->thread2EXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] VAL [Thread0_thread3_thidvar0=2, Thread0_thread3_~arg.base=0, Thread0_thread3_~arg.offset=0, Thread1_thread2_thidvar0=3, Thread2_thread0_thidvar0=5, Thread2_thread0_~arg.base=0, Thread2_thread0_~arg.offset=0, Thread3_thread2_thidvar0=4, Thread3_thread2_~arg.base=0, Thread3_thread2_~arg.offset=0, Thread4_thread1_thidvar0=0, Thread4_thread1_~arg.base=0, Thread4_thread1_~arg.offset=0, Thread5_thread2_thidvar0=1, Thread5_thread2_~arg.base=0, Thread5_thread2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_thread3_#in~arg.base|=0, |Thread0_thread3_#in~arg.offset|=0, |Thread1_thread2_#in~arg.base|=0, |Thread1_thread2_#in~arg.offset|=0, |Thread2_thread0_#in~arg.base|=0, |Thread2_thread0_#in~arg.offset|=0, |Thread2_thread0_#t~mem8|=2, |Thread2_thread0_~#t1~0.base|=96, |Thread2_thread0_~#t1~0.offset|=0, |Thread2_thread0_~#t2~0.base|=93, |Thread2_thread0_~#t2~0.offset|=0, |Thread2_thread0_~#t3~0.base|=90, |Thread2_thread0_~#t3~0.offset|=0, |Thread2_thread0_~#t4~0.base|=91, |Thread2_thread0_~#t4~0.offset|=0, |Thread2_thread0_~#t5~0.base|=95, |Thread2_thread0_~#t5~0.offset|=0, |Thread3_thread2_#in~arg.base|=0, |Thread3_thread2_#in~arg.offset|=0, |Thread3_thread2_#res.base|=0, |Thread3_thread2_#res.offset|=0, |Thread4_thread1_#in~arg.base|=0, |Thread4_thread1_#in~arg.offset|=0, |Thread4_thread1_#res.base|=0, |Thread4_thread1_#res.offset|=0, |Thread4_thread1_#t~malloc0.base|=92, |Thread4_thread1_#t~malloc0.offset|=0, |Thread5_thread2_#in~arg.base|=0, |Thread5_thread2_#in~arg.offset|=0, |Thread5_thread2_#res.base|=0, |Thread5_thread2_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 5 [239] thread2ENTRY-->L1221: Formula: (and (= v_Thread1_thread2_~arg.base_1 |v_Thread1_thread2_#in~arg.base_1|) (= v_Thread1_thread2_~arg.offset_1 |v_Thread1_thread2_#in~arg.offset_1|)) InVars {Thread1_thread2_#in~arg.base=|v_Thread1_thread2_#in~arg.base_1|, Thread1_thread2_#in~arg.offset=|v_Thread1_thread2_#in~arg.offset_1|} OutVars{Thread1_thread2_~arg.offset=v_Thread1_thread2_~arg.offset_1, Thread1_thread2_#in~arg.base=|v_Thread1_thread2_#in~arg.base_1|, Thread1_thread2_~arg.base=v_Thread1_thread2_~arg.base_1, Thread1_thread2_#in~arg.offset=|v_Thread1_thread2_#in~arg.offset_1|} AuxVars[] AssignedVars[Thread1_thread2_~arg.offset, Thread1_thread2_~arg.base] VAL [Thread0_thread3_thidvar0=2, Thread0_thread3_~arg.base=0, Thread0_thread3_~arg.offset=0, Thread1_thread2_thidvar0=3, Thread1_thread2_~arg.base=0, Thread1_thread2_~arg.offset=0, Thread2_thread0_thidvar0=5, Thread2_thread0_~arg.base=0, Thread2_thread0_~arg.offset=0, Thread3_thread2_thidvar0=4, Thread3_thread2_~arg.base=0, Thread3_thread2_~arg.offset=0, Thread4_thread1_thidvar0=0, Thread4_thread1_~arg.base=0, Thread4_thread1_~arg.offset=0, Thread5_thread2_thidvar0=1, Thread5_thread2_~arg.base=0, Thread5_thread2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_thread3_#in~arg.base|=0, |Thread0_thread3_#in~arg.offset|=0, |Thread1_thread2_#in~arg.base|=0, |Thread1_thread2_#in~arg.offset|=0, |Thread2_thread0_#in~arg.base|=0, |Thread2_thread0_#in~arg.offset|=0, |Thread2_thread0_#t~mem8|=2, |Thread2_thread0_~#t1~0.base|=96, |Thread2_thread0_~#t1~0.offset|=0, |Thread2_thread0_~#t2~0.base|=93, |Thread2_thread0_~#t2~0.offset|=0, |Thread2_thread0_~#t3~0.base|=90, |Thread2_thread0_~#t3~0.offset|=0, |Thread2_thread0_~#t4~0.base|=91, |Thread2_thread0_~#t4~0.offset|=0, |Thread2_thread0_~#t5~0.base|=95, |Thread2_thread0_~#t5~0.offset|=0, |Thread3_thread2_#in~arg.base|=0, |Thread3_thread2_#in~arg.offset|=0, |Thread3_thread2_#res.base|=0, |Thread3_thread2_#res.offset|=0, |Thread4_thread1_#in~arg.base|=0, |Thread4_thread1_#in~arg.offset|=0, |Thread4_thread1_#res.base|=0, |Thread4_thread1_#res.offset|=0, |Thread4_thread1_#t~malloc0.base|=92, |Thread4_thread1_#t~malloc0.offset|=0, |Thread5_thread2_#in~arg.base|=0, |Thread5_thread2_#in~arg.offset|=0, |Thread5_thread2_#res.base|=0, |Thread5_thread2_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 5 [240] L1221-->L1221-1: Formula: (= |v_#memory_int_16| (store |v_#memory_int_17| v_~v~0.base_2 (store (select |v_#memory_int_17| v_~v~0.base_2) v_~v~0.offset_2 88))) InVars {#memory_int=|v_#memory_int_17|, ~v~0.offset=v_~v~0.offset_2, ~v~0.base=v_~v~0.base_2} OutVars{#memory_int=|v_#memory_int_16|, ~v~0.offset=v_~v~0.offset_2, ~v~0.base=v_~v~0.base_2} AuxVars[] AssignedVars[#memory_int] VAL [Thread0_thread3_thidvar0=2, Thread0_thread3_~arg.base=0, Thread0_thread3_~arg.offset=0, Thread1_thread2_thidvar0=3, Thread1_thread2_~arg.base=0, Thread1_thread2_~arg.offset=0, Thread2_thread0_thidvar0=5, Thread2_thread0_~arg.base=0, Thread2_thread0_~arg.offset=0, Thread3_thread2_thidvar0=4, Thread3_thread2_~arg.base=0, Thread3_thread2_~arg.offset=0, Thread4_thread1_thidvar0=0, Thread4_thread1_~arg.base=0, Thread4_thread1_~arg.offset=0, Thread5_thread2_thidvar0=1, Thread5_thread2_~arg.base=0, Thread5_thread2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_thread3_#in~arg.base|=0, |Thread0_thread3_#in~arg.offset|=0, |Thread1_thread2_#in~arg.base|=0, |Thread1_thread2_#in~arg.offset|=0, |Thread2_thread0_#in~arg.base|=0, |Thread2_thread0_#in~arg.offset|=0, |Thread2_thread0_#t~mem8|=2, |Thread2_thread0_~#t1~0.base|=96, |Thread2_thread0_~#t1~0.offset|=0, |Thread2_thread0_~#t2~0.base|=93, |Thread2_thread0_~#t2~0.offset|=0, |Thread2_thread0_~#t3~0.base|=90, |Thread2_thread0_~#t3~0.offset|=0, |Thread2_thread0_~#t4~0.base|=91, |Thread2_thread0_~#t4~0.offset|=0, |Thread2_thread0_~#t5~0.base|=95, |Thread2_thread0_~#t5~0.offset|=0, |Thread3_thread2_#in~arg.base|=0, |Thread3_thread2_#in~arg.offset|=0, |Thread3_thread2_#res.base|=0, |Thread3_thread2_#res.offset|=0, |Thread4_thread1_#in~arg.base|=0, |Thread4_thread1_#in~arg.offset|=0, |Thread4_thread1_#res.base|=0, |Thread4_thread1_#res.offset|=0, |Thread4_thread1_#t~malloc0.base|=92, |Thread4_thread1_#t~malloc0.offset|=0, |Thread5_thread2_#in~arg.base|=0, |Thread5_thread2_#in~arg.offset|=0, |Thread5_thread2_#res.base|=0, |Thread5_thread2_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 5 [241] L1221-1-->thread2FINAL: Formula: (and (= |v_Thread1_thread2_#res.base_1| 0) (= |v_Thread1_thread2_#res.offset_1| 0)) InVars {} OutVars{Thread1_thread2_#res.base=|v_Thread1_thread2_#res.base_1|, Thread1_thread2_#res.offset=|v_Thread1_thread2_#res.offset_1|} AuxVars[] AssignedVars[Thread1_thread2_#res.offset, Thread1_thread2_#res.base] VAL [Thread0_thread3_thidvar0=2, Thread0_thread3_~arg.base=0, Thread0_thread3_~arg.offset=0, Thread1_thread2_thidvar0=3, Thread1_thread2_~arg.base=0, Thread1_thread2_~arg.offset=0, Thread2_thread0_thidvar0=5, Thread2_thread0_~arg.base=0, Thread2_thread0_~arg.offset=0, Thread3_thread2_thidvar0=4, Thread3_thread2_~arg.base=0, Thread3_thread2_~arg.offset=0, Thread4_thread1_thidvar0=0, Thread4_thread1_~arg.base=0, Thread4_thread1_~arg.offset=0, Thread5_thread2_thidvar0=1, Thread5_thread2_~arg.base=0, Thread5_thread2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_thread3_#in~arg.base|=0, |Thread0_thread3_#in~arg.offset|=0, |Thread1_thread2_#in~arg.base|=0, |Thread1_thread2_#in~arg.offset|=0, |Thread1_thread2_#res.base|=0, |Thread1_thread2_#res.offset|=0, |Thread2_thread0_#in~arg.base|=0, |Thread2_thread0_#in~arg.offset|=0, |Thread2_thread0_#t~mem8|=2, |Thread2_thread0_~#t1~0.base|=96, |Thread2_thread0_~#t1~0.offset|=0, |Thread2_thread0_~#t2~0.base|=93, |Thread2_thread0_~#t2~0.offset|=0, |Thread2_thread0_~#t3~0.base|=90, |Thread2_thread0_~#t3~0.offset|=0, |Thread2_thread0_~#t4~0.base|=91, |Thread2_thread0_~#t4~0.offset|=0, |Thread2_thread0_~#t5~0.base|=95, |Thread2_thread0_~#t5~0.offset|=0, |Thread3_thread2_#in~arg.base|=0, |Thread3_thread2_#in~arg.offset|=0, |Thread3_thread2_#res.base|=0, |Thread3_thread2_#res.offset|=0, |Thread4_thread1_#in~arg.base|=0, |Thread4_thread1_#in~arg.offset|=0, |Thread4_thread1_#res.base|=0, |Thread4_thread1_#res.offset|=0, |Thread4_thread1_#t~malloc0.base|=92, |Thread4_thread1_#t~malloc0.offset|=0, |Thread5_thread2_#in~arg.base|=0, |Thread5_thread2_#in~arg.offset|=0, |Thread5_thread2_#res.base|=0, |Thread5_thread2_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 5 [242] thread2FINAL-->thread2EXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] VAL [Thread0_thread3_thidvar0=2, Thread0_thread3_~arg.base=0, Thread0_thread3_~arg.offset=0, Thread1_thread2_thidvar0=3, Thread1_thread2_~arg.base=0, Thread1_thread2_~arg.offset=0, Thread2_thread0_thidvar0=5, Thread2_thread0_~arg.base=0, Thread2_thread0_~arg.offset=0, Thread3_thread2_thidvar0=4, Thread3_thread2_~arg.base=0, Thread3_thread2_~arg.offset=0, Thread4_thread1_thidvar0=0, Thread4_thread1_~arg.base=0, Thread4_thread1_~arg.offset=0, Thread5_thread2_thidvar0=1, Thread5_thread2_~arg.base=0, Thread5_thread2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_thread3_#in~arg.base|=0, |Thread0_thread3_#in~arg.offset|=0, |Thread1_thread2_#in~arg.base|=0, |Thread1_thread2_#in~arg.offset|=0, |Thread1_thread2_#res.base|=0, |Thread1_thread2_#res.offset|=0, |Thread2_thread0_#in~arg.base|=0, |Thread2_thread0_#in~arg.offset|=0, |Thread2_thread0_#t~mem8|=2, |Thread2_thread0_~#t1~0.base|=96, |Thread2_thread0_~#t1~0.offset|=0, |Thread2_thread0_~#t2~0.base|=93, |Thread2_thread0_~#t2~0.offset|=0, |Thread2_thread0_~#t3~0.base|=90, |Thread2_thread0_~#t3~0.offset|=0, |Thread2_thread0_~#t4~0.base|=91, |Thread2_thread0_~#t4~0.offset|=0, |Thread2_thread0_~#t5~0.base|=95, |Thread2_thread0_~#t5~0.offset|=0, |Thread3_thread2_#in~arg.base|=0, |Thread3_thread2_#in~arg.offset|=0, |Thread3_thread2_#res.base|=0, |Thread3_thread2_#res.offset|=0, |Thread4_thread1_#in~arg.base|=0, |Thread4_thread1_#in~arg.offset|=0, |Thread4_thread1_#res.base|=0, |Thread4_thread1_#res.offset|=0, |Thread4_thread1_#t~malloc0.base|=92, |Thread4_thread1_#t~malloc0.offset|=0, |Thread5_thread2_#in~arg.base|=0, |Thread5_thread2_#in~arg.offset|=0, |Thread5_thread2_#res.base|=0, |Thread5_thread2_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 3 [248] L1226-->L1226-1: Formula: (= (store |v_#memory_int_19| v_~v~0.base_3 (store (select |v_#memory_int_19| v_~v~0.base_3) v_~v~0.offset_3 89)) |v_#memory_int_18|) InVars {#memory_int=|v_#memory_int_19|, ~v~0.offset=v_~v~0.offset_3, ~v~0.base=v_~v~0.base_3} OutVars{#memory_int=|v_#memory_int_18|, ~v~0.offset=v_~v~0.offset_3, ~v~0.base=v_~v~0.base_3} AuxVars[] AssignedVars[#memory_int] VAL [Thread0_thread3_thidvar0=2, Thread0_thread3_~arg.base=0, Thread0_thread3_~arg.offset=0, Thread1_thread2_thidvar0=3, Thread1_thread2_~arg.base=0, Thread1_thread2_~arg.offset=0, Thread2_thread0_thidvar0=5, Thread2_thread0_~arg.base=0, Thread2_thread0_~arg.offset=0, Thread3_thread2_thidvar0=4, Thread3_thread2_~arg.base=0, Thread3_thread2_~arg.offset=0, Thread4_thread1_thidvar0=0, Thread4_thread1_~arg.base=0, Thread4_thread1_~arg.offset=0, Thread5_thread2_thidvar0=1, Thread5_thread2_~arg.base=0, Thread5_thread2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_thread3_#in~arg.base|=0, |Thread0_thread3_#in~arg.offset|=0, |Thread1_thread2_#in~arg.base|=0, |Thread1_thread2_#in~arg.offset|=0, |Thread1_thread2_#res.base|=0, |Thread1_thread2_#res.offset|=0, |Thread2_thread0_#in~arg.base|=0, |Thread2_thread0_#in~arg.offset|=0, |Thread2_thread0_#t~mem8|=2, |Thread2_thread0_~#t1~0.base|=96, |Thread2_thread0_~#t1~0.offset|=0, |Thread2_thread0_~#t2~0.base|=93, |Thread2_thread0_~#t2~0.offset|=0, |Thread2_thread0_~#t3~0.base|=90, |Thread2_thread0_~#t3~0.offset|=0, |Thread2_thread0_~#t4~0.base|=91, |Thread2_thread0_~#t4~0.offset|=0, |Thread2_thread0_~#t5~0.base|=95, |Thread2_thread0_~#t5~0.offset|=0, |Thread3_thread2_#in~arg.base|=0, |Thread3_thread2_#in~arg.offset|=0, |Thread3_thread2_#res.base|=0, |Thread3_thread2_#res.offset|=0, |Thread4_thread1_#in~arg.base|=0, |Thread4_thread1_#in~arg.offset|=0, |Thread4_thread1_#res.base|=0, |Thread4_thread1_#res.offset|=0, |Thread4_thread1_#t~malloc0.base|=92, |Thread4_thread1_#t~malloc0.offset|=0, |Thread5_thread2_#in~arg.base|=0, |Thread5_thread2_#in~arg.offset|=0, |Thread5_thread2_#res.base|=0, |Thread5_thread2_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 3 [249] L1226-1-->thread3FINAL: Formula: (and (= |v_Thread0_thread3_#res.offset_1| 0) (= |v_Thread0_thread3_#res.base_1| 0)) InVars {} OutVars{Thread0_thread3_#res.base=|v_Thread0_thread3_#res.base_1|, Thread0_thread3_#res.offset=|v_Thread0_thread3_#res.offset_1|} AuxVars[] AssignedVars[Thread0_thread3_#res.base, Thread0_thread3_#res.offset] VAL [Thread0_thread3_thidvar0=2, Thread0_thread3_~arg.base=0, Thread0_thread3_~arg.offset=0, Thread1_thread2_thidvar0=3, Thread1_thread2_~arg.base=0, Thread1_thread2_~arg.offset=0, Thread2_thread0_thidvar0=5, Thread2_thread0_~arg.base=0, Thread2_thread0_~arg.offset=0, Thread3_thread2_thidvar0=4, Thread3_thread2_~arg.base=0, Thread3_thread2_~arg.offset=0, Thread4_thread1_thidvar0=0, Thread4_thread1_~arg.base=0, Thread4_thread1_~arg.offset=0, Thread5_thread2_thidvar0=1, Thread5_thread2_~arg.base=0, Thread5_thread2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_thread3_#in~arg.base|=0, |Thread0_thread3_#in~arg.offset|=0, |Thread0_thread3_#res.base|=0, |Thread0_thread3_#res.offset|=0, |Thread1_thread2_#in~arg.base|=0, |Thread1_thread2_#in~arg.offset|=0, |Thread1_thread2_#res.base|=0, |Thread1_thread2_#res.offset|=0, |Thread2_thread0_#in~arg.base|=0, |Thread2_thread0_#in~arg.offset|=0, |Thread2_thread0_#t~mem8|=2, |Thread2_thread0_~#t1~0.base|=96, |Thread2_thread0_~#t1~0.offset|=0, |Thread2_thread0_~#t2~0.base|=93, |Thread2_thread0_~#t2~0.offset|=0, |Thread2_thread0_~#t3~0.base|=90, |Thread2_thread0_~#t3~0.offset|=0, |Thread2_thread0_~#t4~0.base|=91, |Thread2_thread0_~#t4~0.offset|=0, |Thread2_thread0_~#t5~0.base|=95, |Thread2_thread0_~#t5~0.offset|=0, |Thread3_thread2_#in~arg.base|=0, |Thread3_thread2_#in~arg.offset|=0, |Thread3_thread2_#res.base|=0, |Thread3_thread2_#res.offset|=0, |Thread4_thread1_#in~arg.base|=0, |Thread4_thread1_#in~arg.offset|=0, |Thread4_thread1_#res.base|=0, |Thread4_thread1_#res.offset|=0, |Thread4_thread1_#t~malloc0.base|=92, |Thread4_thread1_#t~malloc0.offset|=0, |Thread5_thread2_#in~arg.base|=0, |Thread5_thread2_#in~arg.offset|=0, |Thread5_thread2_#res.base|=0, |Thread5_thread2_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 3 [250] thread3FINAL-->thread3EXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] VAL [Thread0_thread3_thidvar0=2, Thread0_thread3_~arg.base=0, Thread0_thread3_~arg.offset=0, Thread1_thread2_thidvar0=3, Thread1_thread2_~arg.base=0, Thread1_thread2_~arg.offset=0, Thread2_thread0_thidvar0=5, Thread2_thread0_~arg.base=0, Thread2_thread0_~arg.offset=0, Thread3_thread2_thidvar0=4, Thread3_thread2_~arg.base=0, Thread3_thread2_~arg.offset=0, Thread4_thread1_thidvar0=0, Thread4_thread1_~arg.base=0, Thread4_thread1_~arg.offset=0, Thread5_thread2_thidvar0=1, Thread5_thread2_~arg.base=0, Thread5_thread2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_thread3_#in~arg.base|=0, |Thread0_thread3_#in~arg.offset|=0, |Thread0_thread3_#res.base|=0, |Thread0_thread3_#res.offset|=0, |Thread1_thread2_#in~arg.base|=0, |Thread1_thread2_#in~arg.offset|=0, |Thread1_thread2_#res.base|=0, |Thread1_thread2_#res.offset|=0, |Thread2_thread0_#in~arg.base|=0, |Thread2_thread0_#in~arg.offset|=0, |Thread2_thread0_#t~mem8|=2, |Thread2_thread0_~#t1~0.base|=96, |Thread2_thread0_~#t1~0.offset|=0, |Thread2_thread0_~#t2~0.base|=93, |Thread2_thread0_~#t2~0.offset|=0, |Thread2_thread0_~#t3~0.base|=90, |Thread2_thread0_~#t3~0.offset|=0, |Thread2_thread0_~#t4~0.base|=91, |Thread2_thread0_~#t4~0.offset|=0, |Thread2_thread0_~#t5~0.base|=95, |Thread2_thread0_~#t5~0.offset|=0, |Thread3_thread2_#in~arg.base|=0, |Thread3_thread2_#in~arg.offset|=0, |Thread3_thread2_#res.base|=0, |Thread3_thread2_#res.offset|=0, |Thread4_thread1_#in~arg.base|=0, |Thread4_thread1_#in~arg.offset|=0, |Thread4_thread1_#res.base|=0, |Thread4_thread1_#res.offset|=0, |Thread4_thread1_#t~malloc0.base|=92, |Thread4_thread1_#t~malloc0.offset|=0, |Thread5_thread2_#in~arg.base|=0, |Thread5_thread2_#in~arg.offset|=0, |Thread5_thread2_#res.base|=0, |Thread5_thread2_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] JOIN 3 [353] thread3EXIT-->L1239-2: Formula: (= |v_Thread2_thread0_#t~mem8_10| v_Thread0_thread3_thidvar0_38) InVars {Thread0_thread3_thidvar0=v_Thread0_thread3_thidvar0_38, Thread2_thread0_#t~mem8=|v_Thread2_thread0_#t~mem8_10|} OutVars{Thread0_thread3_thidvar0=v_Thread0_thread3_thidvar0_38, Thread2_thread0_#t~mem8=|v_Thread2_thread0_#t~mem8_10|} AuxVars[] AssignedVars[] VAL [Thread0_thread3_thidvar0=2, Thread0_thread3_~arg.base=0, Thread0_thread3_~arg.offset=0, Thread1_thread2_thidvar0=3, Thread1_thread2_~arg.base=0, Thread1_thread2_~arg.offset=0, Thread2_thread0_thidvar0=5, Thread2_thread0_~arg.base=0, Thread2_thread0_~arg.offset=0, Thread3_thread2_thidvar0=4, Thread3_thread2_~arg.base=0, Thread3_thread2_~arg.offset=0, Thread4_thread1_thidvar0=0, Thread4_thread1_~arg.base=0, Thread4_thread1_~arg.offset=0, Thread5_thread2_thidvar0=1, Thread5_thread2_~arg.base=0, Thread5_thread2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_thread3_#in~arg.base|=0, |Thread0_thread3_#in~arg.offset|=0, |Thread0_thread3_#res.base|=0, |Thread0_thread3_#res.offset|=0, |Thread1_thread2_#in~arg.base|=0, |Thread1_thread2_#in~arg.offset|=0, |Thread1_thread2_#res.base|=0, |Thread1_thread2_#res.offset|=0, |Thread2_thread0_#in~arg.base|=0, |Thread2_thread0_#in~arg.offset|=0, |Thread2_thread0_#t~mem8|=2, |Thread2_thread0_~#t1~0.base|=96, |Thread2_thread0_~#t1~0.offset|=0, |Thread2_thread0_~#t2~0.base|=93, |Thread2_thread0_~#t2~0.offset|=0, |Thread2_thread0_~#t3~0.base|=90, |Thread2_thread0_~#t3~0.offset|=0, |Thread2_thread0_~#t4~0.base|=91, |Thread2_thread0_~#t4~0.offset|=0, |Thread2_thread0_~#t5~0.base|=95, |Thread2_thread0_~#t5~0.offset|=0, |Thread3_thread2_#in~arg.base|=0, |Thread3_thread2_#in~arg.offset|=0, |Thread3_thread2_#res.base|=0, |Thread3_thread2_#res.offset|=0, |Thread4_thread1_#in~arg.base|=0, |Thread4_thread1_#in~arg.offset|=0, |Thread4_thread1_#res.base|=0, |Thread4_thread1_#res.offset|=0, |Thread4_thread1_#t~malloc0.base|=92, |Thread4_thread1_#t~malloc0.offset|=0, |Thread5_thread2_#in~arg.base|=0, |Thread5_thread2_#in~arg.offset|=0, |Thread5_thread2_#res.base|=0, |Thread5_thread2_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 [211] L1239-2-->L1240: Formula: true InVars {} OutVars{Thread2_thread0_#t~mem8=|v_Thread2_thread0_#t~mem8_2|} AuxVars[] AssignedVars[Thread2_thread0_#t~mem8] VAL [Thread0_thread3_thidvar0=2, Thread0_thread3_~arg.base=0, Thread0_thread3_~arg.offset=0, Thread1_thread2_thidvar0=3, Thread1_thread2_~arg.base=0, Thread1_thread2_~arg.offset=0, Thread2_thread0_thidvar0=5, Thread2_thread0_~arg.base=0, Thread2_thread0_~arg.offset=0, Thread3_thread2_thidvar0=4, Thread3_thread2_~arg.base=0, Thread3_thread2_~arg.offset=0, Thread4_thread1_thidvar0=0, Thread4_thread1_~arg.base=0, Thread4_thread1_~arg.offset=0, Thread5_thread2_thidvar0=1, Thread5_thread2_~arg.base=0, Thread5_thread2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_thread3_#in~arg.base|=0, |Thread0_thread3_#in~arg.offset|=0, |Thread0_thread3_#res.base|=0, |Thread0_thread3_#res.offset|=0, |Thread1_thread2_#in~arg.base|=0, |Thread1_thread2_#in~arg.offset|=0, |Thread1_thread2_#res.base|=0, |Thread1_thread2_#res.offset|=0, |Thread2_thread0_#in~arg.base|=0, |Thread2_thread0_#in~arg.offset|=0, |Thread2_thread0_~#t1~0.base|=96, |Thread2_thread0_~#t1~0.offset|=0, |Thread2_thread0_~#t2~0.base|=93, |Thread2_thread0_~#t2~0.offset|=0, |Thread2_thread0_~#t3~0.base|=90, |Thread2_thread0_~#t3~0.offset|=0, |Thread2_thread0_~#t4~0.base|=91, |Thread2_thread0_~#t4~0.offset|=0, |Thread2_thread0_~#t5~0.base|=95, |Thread2_thread0_~#t5~0.offset|=0, |Thread3_thread2_#in~arg.base|=0, |Thread3_thread2_#in~arg.offset|=0, |Thread3_thread2_#res.base|=0, |Thread3_thread2_#res.offset|=0, |Thread4_thread1_#in~arg.base|=0, |Thread4_thread1_#in~arg.offset|=0, |Thread4_thread1_#res.base|=0, |Thread4_thread1_#res.offset|=0, |Thread4_thread1_#t~malloc0.base|=92, |Thread4_thread1_#t~malloc0.offset|=0, |Thread5_thread2_#in~arg.base|=0, |Thread5_thread2_#in~arg.offset|=0, |Thread5_thread2_#res.base|=0, |Thread5_thread2_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 [212] L1240-->L1240-1: Formula: (= (select (select |v_#memory_int_14| |v_Thread2_thread0_~#t4~0.base_3|) |v_Thread2_thread0_~#t4~0.offset_3|) |v_Thread2_thread0_#t~mem9_1|) InVars {#memory_int=|v_#memory_int_14|, Thread2_thread0_~#t4~0.offset=|v_Thread2_thread0_~#t4~0.offset_3|, Thread2_thread0_~#t4~0.base=|v_Thread2_thread0_~#t4~0.base_3|} OutVars{#memory_int=|v_#memory_int_14|, Thread2_thread0_~#t4~0.offset=|v_Thread2_thread0_~#t4~0.offset_3|, Thread2_thread0_#t~mem9=|v_Thread2_thread0_#t~mem9_1|, Thread2_thread0_~#t4~0.base=|v_Thread2_thread0_~#t4~0.base_3|} AuxVars[] AssignedVars[Thread2_thread0_#t~mem9] VAL [Thread0_thread3_thidvar0=2, Thread0_thread3_~arg.base=0, Thread0_thread3_~arg.offset=0, Thread1_thread2_thidvar0=3, Thread1_thread2_~arg.base=0, Thread1_thread2_~arg.offset=0, Thread2_thread0_thidvar0=5, Thread2_thread0_~arg.base=0, Thread2_thread0_~arg.offset=0, Thread3_thread2_thidvar0=4, Thread3_thread2_~arg.base=0, Thread3_thread2_~arg.offset=0, Thread4_thread1_thidvar0=0, Thread4_thread1_~arg.base=0, Thread4_thread1_~arg.offset=0, Thread5_thread2_thidvar0=1, Thread5_thread2_~arg.base=0, Thread5_thread2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_thread3_#in~arg.base|=0, |Thread0_thread3_#in~arg.offset|=0, |Thread0_thread3_#res.base|=0, |Thread0_thread3_#res.offset|=0, |Thread1_thread2_#in~arg.base|=0, |Thread1_thread2_#in~arg.offset|=0, |Thread1_thread2_#res.base|=0, |Thread1_thread2_#res.offset|=0, |Thread2_thread0_#in~arg.base|=0, |Thread2_thread0_#in~arg.offset|=0, |Thread2_thread0_#t~mem9|=3, |Thread2_thread0_~#t1~0.base|=96, |Thread2_thread0_~#t1~0.offset|=0, |Thread2_thread0_~#t2~0.base|=93, |Thread2_thread0_~#t2~0.offset|=0, |Thread2_thread0_~#t3~0.base|=90, |Thread2_thread0_~#t3~0.offset|=0, |Thread2_thread0_~#t4~0.base|=91, |Thread2_thread0_~#t4~0.offset|=0, |Thread2_thread0_~#t5~0.base|=95, |Thread2_thread0_~#t5~0.offset|=0, |Thread3_thread2_#in~arg.base|=0, |Thread3_thread2_#in~arg.offset|=0, |Thread3_thread2_#res.base|=0, |Thread3_thread2_#res.offset|=0, |Thread4_thread1_#in~arg.base|=0, |Thread4_thread1_#in~arg.offset|=0, |Thread4_thread1_#res.base|=0, |Thread4_thread1_#res.offset|=0, |Thread4_thread1_#t~malloc0.base|=92, |Thread4_thread1_#t~malloc0.offset|=0, |Thread5_thread2_#in~arg.base|=0, |Thread5_thread2_#in~arg.offset|=0, |Thread5_thread2_#res.base|=0, |Thread5_thread2_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] JOIN 5 [368] thread2EXIT-->L1240-2: Formula: (= |v_Thread2_thread0_#t~mem9_18| v_Thread1_thread2_thidvar0_44) InVars {Thread1_thread2_thidvar0=v_Thread1_thread2_thidvar0_44, Thread2_thread0_#t~mem9=|v_Thread2_thread0_#t~mem9_18|} OutVars{Thread1_thread2_thidvar0=v_Thread1_thread2_thidvar0_44, Thread2_thread0_#t~mem9=|v_Thread2_thread0_#t~mem9_18|} AuxVars[] AssignedVars[] VAL [Thread0_thread3_thidvar0=2, Thread0_thread3_~arg.base=0, Thread0_thread3_~arg.offset=0, Thread1_thread2_thidvar0=3, Thread1_thread2_~arg.base=0, Thread1_thread2_~arg.offset=0, Thread2_thread0_thidvar0=5, Thread2_thread0_~arg.base=0, Thread2_thread0_~arg.offset=0, Thread3_thread2_thidvar0=4, Thread3_thread2_~arg.base=0, Thread3_thread2_~arg.offset=0, Thread4_thread1_thidvar0=0, Thread4_thread1_~arg.base=0, Thread4_thread1_~arg.offset=0, Thread5_thread2_thidvar0=1, Thread5_thread2_~arg.base=0, Thread5_thread2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_thread3_#in~arg.base|=0, |Thread0_thread3_#in~arg.offset|=0, |Thread0_thread3_#res.base|=0, |Thread0_thread3_#res.offset|=0, |Thread1_thread2_#in~arg.base|=0, |Thread1_thread2_#in~arg.offset|=0, |Thread1_thread2_#res.base|=0, |Thread1_thread2_#res.offset|=0, |Thread2_thread0_#in~arg.base|=0, |Thread2_thread0_#in~arg.offset|=0, |Thread2_thread0_#t~mem9|=3, |Thread2_thread0_~#t1~0.base|=96, |Thread2_thread0_~#t1~0.offset|=0, |Thread2_thread0_~#t2~0.base|=93, |Thread2_thread0_~#t2~0.offset|=0, |Thread2_thread0_~#t3~0.base|=90, |Thread2_thread0_~#t3~0.offset|=0, |Thread2_thread0_~#t4~0.base|=91, |Thread2_thread0_~#t4~0.offset|=0, |Thread2_thread0_~#t5~0.base|=95, |Thread2_thread0_~#t5~0.offset|=0, |Thread3_thread2_#in~arg.base|=0, |Thread3_thread2_#in~arg.offset|=0, |Thread3_thread2_#res.base|=0, |Thread3_thread2_#res.offset|=0, |Thread4_thread1_#in~arg.base|=0, |Thread4_thread1_#in~arg.offset|=0, |Thread4_thread1_#res.base|=0, |Thread4_thread1_#res.offset|=0, |Thread4_thread1_#t~malloc0.base|=92, |Thread4_thread1_#t~malloc0.offset|=0, |Thread5_thread2_#in~arg.base|=0, |Thread5_thread2_#in~arg.offset|=0, |Thread5_thread2_#res.base|=0, |Thread5_thread2_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 [214] L1240-2-->L1241: Formula: true InVars {} OutVars{Thread2_thread0_#t~mem9=|v_Thread2_thread0_#t~mem9_2|} AuxVars[] AssignedVars[Thread2_thread0_#t~mem9] VAL [Thread0_thread3_thidvar0=2, Thread0_thread3_~arg.base=0, Thread0_thread3_~arg.offset=0, Thread1_thread2_thidvar0=3, Thread1_thread2_~arg.base=0, Thread1_thread2_~arg.offset=0, Thread2_thread0_thidvar0=5, Thread2_thread0_~arg.base=0, Thread2_thread0_~arg.offset=0, Thread3_thread2_thidvar0=4, Thread3_thread2_~arg.base=0, Thread3_thread2_~arg.offset=0, Thread4_thread1_thidvar0=0, Thread4_thread1_~arg.base=0, Thread4_thread1_~arg.offset=0, Thread5_thread2_thidvar0=1, Thread5_thread2_~arg.base=0, Thread5_thread2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_thread3_#in~arg.base|=0, |Thread0_thread3_#in~arg.offset|=0, |Thread0_thread3_#res.base|=0, |Thread0_thread3_#res.offset|=0, |Thread1_thread2_#in~arg.base|=0, |Thread1_thread2_#in~arg.offset|=0, |Thread1_thread2_#res.base|=0, |Thread1_thread2_#res.offset|=0, |Thread2_thread0_#in~arg.base|=0, |Thread2_thread0_#in~arg.offset|=0, |Thread2_thread0_~#t1~0.base|=96, |Thread2_thread0_~#t1~0.offset|=0, |Thread2_thread0_~#t2~0.base|=93, |Thread2_thread0_~#t2~0.offset|=0, |Thread2_thread0_~#t3~0.base|=90, |Thread2_thread0_~#t3~0.offset|=0, |Thread2_thread0_~#t4~0.base|=91, |Thread2_thread0_~#t4~0.offset|=0, |Thread2_thread0_~#t5~0.base|=95, |Thread2_thread0_~#t5~0.offset|=0, |Thread3_thread2_#in~arg.base|=0, |Thread3_thread2_#in~arg.offset|=0, |Thread3_thread2_#res.base|=0, |Thread3_thread2_#res.offset|=0, |Thread4_thread1_#in~arg.base|=0, |Thread4_thread1_#in~arg.offset|=0, |Thread4_thread1_#res.base|=0, |Thread4_thread1_#res.offset|=0, |Thread4_thread1_#t~malloc0.base|=92, |Thread4_thread1_#t~malloc0.offset|=0, |Thread5_thread2_#in~arg.base|=0, |Thread5_thread2_#in~arg.offset|=0, |Thread5_thread2_#res.base|=0, |Thread5_thread2_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 [215] L1241-->L1241-1: Formula: (= |v_Thread2_thread0_#t~mem10_1| (select (select |v_#memory_int_15| |v_Thread2_thread0_~#t5~0.base_3|) |v_Thread2_thread0_~#t5~0.offset_3|)) InVars {#memory_int=|v_#memory_int_15|, Thread2_thread0_~#t5~0.base=|v_Thread2_thread0_~#t5~0.base_3|, Thread2_thread0_~#t5~0.offset=|v_Thread2_thread0_~#t5~0.offset_3|} OutVars{#memory_int=|v_#memory_int_15|, Thread2_thread0_~#t5~0.base=|v_Thread2_thread0_~#t5~0.base_3|, Thread2_thread0_~#t5~0.offset=|v_Thread2_thread0_~#t5~0.offset_3|, Thread2_thread0_#t~mem10=|v_Thread2_thread0_#t~mem10_1|} AuxVars[] AssignedVars[Thread2_thread0_#t~mem10] VAL [Thread0_thread3_thidvar0=2, Thread0_thread3_~arg.base=0, Thread0_thread3_~arg.offset=0, Thread1_thread2_thidvar0=3, Thread1_thread2_~arg.base=0, Thread1_thread2_~arg.offset=0, Thread2_thread0_thidvar0=5, Thread2_thread0_~arg.base=0, Thread2_thread0_~arg.offset=0, Thread3_thread2_thidvar0=4, Thread3_thread2_~arg.base=0, Thread3_thread2_~arg.offset=0, Thread4_thread1_thidvar0=0, Thread4_thread1_~arg.base=0, Thread4_thread1_~arg.offset=0, Thread5_thread2_thidvar0=1, Thread5_thread2_~arg.base=0, Thread5_thread2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_thread3_#in~arg.base|=0, |Thread0_thread3_#in~arg.offset|=0, |Thread0_thread3_#res.base|=0, |Thread0_thread3_#res.offset|=0, |Thread1_thread2_#in~arg.base|=0, |Thread1_thread2_#in~arg.offset|=0, |Thread1_thread2_#res.base|=0, |Thread1_thread2_#res.offset|=0, |Thread2_thread0_#in~arg.base|=0, |Thread2_thread0_#in~arg.offset|=0, |Thread2_thread0_#t~mem10|=4, |Thread2_thread0_~#t1~0.base|=96, |Thread2_thread0_~#t1~0.offset|=0, |Thread2_thread0_~#t2~0.base|=93, |Thread2_thread0_~#t2~0.offset|=0, |Thread2_thread0_~#t3~0.base|=90, |Thread2_thread0_~#t3~0.offset|=0, |Thread2_thread0_~#t4~0.base|=91, |Thread2_thread0_~#t4~0.offset|=0, |Thread2_thread0_~#t5~0.base|=95, |Thread2_thread0_~#t5~0.offset|=0, |Thread3_thread2_#in~arg.base|=0, |Thread3_thread2_#in~arg.offset|=0, |Thread3_thread2_#res.base|=0, |Thread3_thread2_#res.offset|=0, |Thread4_thread1_#in~arg.base|=0, |Thread4_thread1_#in~arg.offset|=0, |Thread4_thread1_#res.base|=0, |Thread4_thread1_#res.offset|=0, |Thread4_thread1_#t~malloc0.base|=92, |Thread4_thread1_#t~malloc0.offset|=0, |Thread5_thread2_#in~arg.base|=0, |Thread5_thread2_#in~arg.offset|=0, |Thread5_thread2_#res.base|=0, |Thread5_thread2_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] JOIN 4 [380] thread2EXIT-->L1241-2: Formula: (= |v_Thread2_thread0_#t~mem10_20| v_Thread3_thread2_thidvar0_46) InVars {Thread2_thread0_#t~mem10=|v_Thread2_thread0_#t~mem10_20|, Thread3_thread2_thidvar0=v_Thread3_thread2_thidvar0_46} OutVars{Thread2_thread0_#t~mem10=|v_Thread2_thread0_#t~mem10_20|, Thread3_thread2_thidvar0=v_Thread3_thread2_thidvar0_46} AuxVars[] AssignedVars[] VAL [Thread0_thread3_thidvar0=2, Thread0_thread3_~arg.base=0, Thread0_thread3_~arg.offset=0, Thread1_thread2_thidvar0=3, Thread1_thread2_~arg.base=0, Thread1_thread2_~arg.offset=0, Thread2_thread0_thidvar0=5, Thread2_thread0_~arg.base=0, Thread2_thread0_~arg.offset=0, Thread3_thread2_thidvar0=4, Thread3_thread2_~arg.base=0, Thread3_thread2_~arg.offset=0, Thread4_thread1_thidvar0=0, Thread4_thread1_~arg.base=0, Thread4_thread1_~arg.offset=0, Thread5_thread2_thidvar0=1, Thread5_thread2_~arg.base=0, Thread5_thread2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_thread3_#in~arg.base|=0, |Thread0_thread3_#in~arg.offset|=0, |Thread0_thread3_#res.base|=0, |Thread0_thread3_#res.offset|=0, |Thread1_thread2_#in~arg.base|=0, |Thread1_thread2_#in~arg.offset|=0, |Thread1_thread2_#res.base|=0, |Thread1_thread2_#res.offset|=0, |Thread2_thread0_#in~arg.base|=0, |Thread2_thread0_#in~arg.offset|=0, |Thread2_thread0_#t~mem10|=4, |Thread2_thread0_~#t1~0.base|=96, |Thread2_thread0_~#t1~0.offset|=0, |Thread2_thread0_~#t2~0.base|=93, |Thread2_thread0_~#t2~0.offset|=0, |Thread2_thread0_~#t3~0.base|=90, |Thread2_thread0_~#t3~0.offset|=0, |Thread2_thread0_~#t4~0.base|=91, |Thread2_thread0_~#t4~0.offset|=0, |Thread2_thread0_~#t5~0.base|=95, |Thread2_thread0_~#t5~0.offset|=0, |Thread3_thread2_#in~arg.base|=0, |Thread3_thread2_#in~arg.offset|=0, |Thread3_thread2_#res.base|=0, |Thread3_thread2_#res.offset|=0, |Thread4_thread1_#in~arg.base|=0, |Thread4_thread1_#in~arg.offset|=0, |Thread4_thread1_#res.base|=0, |Thread4_thread1_#res.offset|=0, |Thread4_thread1_#t~malloc0.base|=92, |Thread4_thread1_#t~malloc0.offset|=0, |Thread5_thread2_#in~arg.base|=0, |Thread5_thread2_#in~arg.offset|=0, |Thread5_thread2_#res.base|=0, |Thread5_thread2_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 [217] L1241-2-->L1242: Formula: true InVars {} OutVars{Thread2_thread0_#t~mem10=|v_Thread2_thread0_#t~mem10_2|} AuxVars[] AssignedVars[Thread2_thread0_#t~mem10] VAL [Thread0_thread3_thidvar0=2, Thread0_thread3_~arg.base=0, Thread0_thread3_~arg.offset=0, Thread1_thread2_thidvar0=3, Thread1_thread2_~arg.base=0, Thread1_thread2_~arg.offset=0, Thread2_thread0_thidvar0=5, Thread2_thread0_~arg.base=0, Thread2_thread0_~arg.offset=0, Thread3_thread2_thidvar0=4, Thread3_thread2_~arg.base=0, Thread3_thread2_~arg.offset=0, Thread4_thread1_thidvar0=0, Thread4_thread1_~arg.base=0, Thread4_thread1_~arg.offset=0, Thread5_thread2_thidvar0=1, Thread5_thread2_~arg.base=0, Thread5_thread2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_thread3_#in~arg.base|=0, |Thread0_thread3_#in~arg.offset|=0, |Thread0_thread3_#res.base|=0, |Thread0_thread3_#res.offset|=0, |Thread1_thread2_#in~arg.base|=0, |Thread1_thread2_#in~arg.offset|=0, |Thread1_thread2_#res.base|=0, |Thread1_thread2_#res.offset|=0, |Thread2_thread0_#in~arg.base|=0, |Thread2_thread0_#in~arg.offset|=0, |Thread2_thread0_~#t1~0.base|=96, |Thread2_thread0_~#t1~0.offset|=0, |Thread2_thread0_~#t2~0.base|=93, |Thread2_thread0_~#t2~0.offset|=0, |Thread2_thread0_~#t3~0.base|=90, |Thread2_thread0_~#t3~0.offset|=0, |Thread2_thread0_~#t4~0.base|=91, |Thread2_thread0_~#t4~0.offset|=0, |Thread2_thread0_~#t5~0.base|=95, |Thread2_thread0_~#t5~0.offset|=0, |Thread3_thread2_#in~arg.base|=0, |Thread3_thread2_#in~arg.offset|=0, |Thread3_thread2_#res.base|=0, |Thread3_thread2_#res.offset|=0, |Thread4_thread1_#in~arg.base|=0, |Thread4_thread1_#in~arg.offset|=0, |Thread4_thread1_#res.base|=0, |Thread4_thread1_#res.offset|=0, |Thread4_thread1_#t~malloc0.base|=92, |Thread4_thread1_#t~malloc0.offset|=0, |Thread5_thread2_#in~arg.base|=0, |Thread5_thread2_#in~arg.offset|=0, |Thread5_thread2_#res.base|=0, |Thread5_thread2_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 [218] L1242-->L1231-6: Formula: (and (= |v_Thread2_thread0_#res.base_1| 0) (= |v_Thread2_thread0_#res.offset_1| 0)) InVars {} OutVars{Thread2_thread0_#res.offset=|v_Thread2_thread0_#res.offset_1|, Thread2_thread0_#res.base=|v_Thread2_thread0_#res.base_1|} AuxVars[] AssignedVars[Thread2_thread0_#res.offset, Thread2_thread0_#res.base] VAL [Thread0_thread3_thidvar0=2, Thread0_thread3_~arg.base=0, Thread0_thread3_~arg.offset=0, Thread1_thread2_thidvar0=3, Thread1_thread2_~arg.base=0, Thread1_thread2_~arg.offset=0, Thread2_thread0_thidvar0=5, Thread2_thread0_~arg.base=0, Thread2_thread0_~arg.offset=0, Thread3_thread2_thidvar0=4, Thread3_thread2_~arg.base=0, Thread3_thread2_~arg.offset=0, Thread4_thread1_thidvar0=0, Thread4_thread1_~arg.base=0, Thread4_thread1_~arg.offset=0, Thread5_thread2_thidvar0=1, Thread5_thread2_~arg.base=0, Thread5_thread2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_thread3_#in~arg.base|=0, |Thread0_thread3_#in~arg.offset|=0, |Thread0_thread3_#res.base|=0, |Thread0_thread3_#res.offset|=0, |Thread1_thread2_#in~arg.base|=0, |Thread1_thread2_#in~arg.offset|=0, |Thread1_thread2_#res.base|=0, |Thread1_thread2_#res.offset|=0, |Thread2_thread0_#in~arg.base|=0, |Thread2_thread0_#in~arg.offset|=0, |Thread2_thread0_#res.base|=0, |Thread2_thread0_#res.offset|=0, |Thread2_thread0_~#t1~0.base|=96, |Thread2_thread0_~#t1~0.offset|=0, |Thread2_thread0_~#t2~0.base|=93, |Thread2_thread0_~#t2~0.offset|=0, |Thread2_thread0_~#t3~0.base|=90, |Thread2_thread0_~#t3~0.offset|=0, |Thread2_thread0_~#t4~0.base|=91, |Thread2_thread0_~#t4~0.offset|=0, |Thread2_thread0_~#t5~0.base|=95, |Thread2_thread0_~#t5~0.offset|=0, |Thread3_thread2_#in~arg.base|=0, |Thread3_thread2_#in~arg.offset|=0, |Thread3_thread2_#res.base|=0, |Thread3_thread2_#res.offset|=0, |Thread4_thread1_#in~arg.base|=0, |Thread4_thread1_#in~arg.offset|=0, |Thread4_thread1_#res.base|=0, |Thread4_thread1_#res.offset|=0, |Thread4_thread1_#t~malloc0.base|=92, |Thread4_thread1_#t~malloc0.offset|=0, |Thread5_thread2_#in~arg.base|=0, |Thread5_thread2_#in~arg.offset|=0, |Thread5_thread2_#res.base|=0, |Thread5_thread2_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 [219] L1231-6-->L1231-7: Formula: (= (store |v_#valid_12| |v_Thread2_thread0_~#t1~0.base_4| 0) |v_#valid_11|) InVars {Thread2_thread0_~#t1~0.base=|v_Thread2_thread0_~#t1~0.base_4|, #valid=|v_#valid_12|} OutVars{Thread2_thread0_~#t1~0.base=|v_Thread2_thread0_~#t1~0.base_4|, #valid=|v_#valid_11|} AuxVars[] AssignedVars[#valid] VAL [Thread0_thread3_thidvar0=2, Thread0_thread3_~arg.base=0, Thread0_thread3_~arg.offset=0, Thread1_thread2_thidvar0=3, Thread1_thread2_~arg.base=0, Thread1_thread2_~arg.offset=0, Thread2_thread0_thidvar0=5, Thread2_thread0_~arg.base=0, Thread2_thread0_~arg.offset=0, Thread3_thread2_thidvar0=4, Thread3_thread2_~arg.base=0, Thread3_thread2_~arg.offset=0, Thread4_thread1_thidvar0=0, Thread4_thread1_~arg.base=0, Thread4_thread1_~arg.offset=0, Thread5_thread2_thidvar0=1, Thread5_thread2_~arg.base=0, Thread5_thread2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_thread3_#in~arg.base|=0, |Thread0_thread3_#in~arg.offset|=0, |Thread0_thread3_#res.base|=0, |Thread0_thread3_#res.offset|=0, |Thread1_thread2_#in~arg.base|=0, |Thread1_thread2_#in~arg.offset|=0, |Thread1_thread2_#res.base|=0, |Thread1_thread2_#res.offset|=0, |Thread2_thread0_#in~arg.base|=0, |Thread2_thread0_#in~arg.offset|=0, |Thread2_thread0_#res.base|=0, |Thread2_thread0_#res.offset|=0, |Thread2_thread0_~#t1~0.base|=96, |Thread2_thread0_~#t1~0.offset|=0, |Thread2_thread0_~#t2~0.base|=93, |Thread2_thread0_~#t2~0.offset|=0, |Thread2_thread0_~#t3~0.base|=90, |Thread2_thread0_~#t3~0.offset|=0, |Thread2_thread0_~#t4~0.base|=91, |Thread2_thread0_~#t4~0.offset|=0, |Thread2_thread0_~#t5~0.base|=95, |Thread2_thread0_~#t5~0.offset|=0, |Thread3_thread2_#in~arg.base|=0, |Thread3_thread2_#in~arg.offset|=0, |Thread3_thread2_#res.base|=0, |Thread3_thread2_#res.offset|=0, |Thread4_thread1_#in~arg.base|=0, |Thread4_thread1_#in~arg.offset|=0, |Thread4_thread1_#res.base|=0, |Thread4_thread1_#res.offset|=0, |Thread4_thread1_#t~malloc0.base|=92, |Thread4_thread1_#t~malloc0.offset|=0, |Thread5_thread2_#in~arg.base|=0, |Thread5_thread2_#in~arg.offset|=0, |Thread5_thread2_#res.base|=0, |Thread5_thread2_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 [220] L1231-7-->L1231-8: Formula: true InVars {} OutVars{Thread2_thread0_~#t1~0.base=|v_Thread2_thread0_~#t1~0.base_5|, Thread2_thread0_~#t1~0.offset=|v_Thread2_thread0_~#t1~0.offset_4|} AuxVars[] AssignedVars[Thread2_thread0_~#t1~0.base, Thread2_thread0_~#t1~0.offset] VAL [Thread0_thread3_thidvar0=2, Thread0_thread3_~arg.base=0, Thread0_thread3_~arg.offset=0, Thread1_thread2_thidvar0=3, Thread1_thread2_~arg.base=0, Thread1_thread2_~arg.offset=0, Thread2_thread0_thidvar0=5, Thread2_thread0_~arg.base=0, Thread2_thread0_~arg.offset=0, Thread3_thread2_thidvar0=4, Thread3_thread2_~arg.base=0, Thread3_thread2_~arg.offset=0, Thread4_thread1_thidvar0=0, Thread4_thread1_~arg.base=0, Thread4_thread1_~arg.offset=0, Thread5_thread2_thidvar0=1, Thread5_thread2_~arg.base=0, Thread5_thread2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_thread3_#in~arg.base|=0, |Thread0_thread3_#in~arg.offset|=0, |Thread0_thread3_#res.base|=0, |Thread0_thread3_#res.offset|=0, |Thread1_thread2_#in~arg.base|=0, |Thread1_thread2_#in~arg.offset|=0, |Thread1_thread2_#res.base|=0, |Thread1_thread2_#res.offset|=0, |Thread2_thread0_#in~arg.base|=0, |Thread2_thread0_#in~arg.offset|=0, |Thread2_thread0_#res.base|=0, |Thread2_thread0_#res.offset|=0, |Thread2_thread0_~#t2~0.base|=93, |Thread2_thread0_~#t2~0.offset|=0, |Thread2_thread0_~#t3~0.base|=90, |Thread2_thread0_~#t3~0.offset|=0, |Thread2_thread0_~#t4~0.base|=91, |Thread2_thread0_~#t4~0.offset|=0, |Thread2_thread0_~#t5~0.base|=95, |Thread2_thread0_~#t5~0.offset|=0, |Thread3_thread2_#in~arg.base|=0, |Thread3_thread2_#in~arg.offset|=0, |Thread3_thread2_#res.base|=0, |Thread3_thread2_#res.offset|=0, |Thread4_thread1_#in~arg.base|=0, |Thread4_thread1_#in~arg.offset|=0, |Thread4_thread1_#res.base|=0, |Thread4_thread1_#res.offset|=0, |Thread4_thread1_#t~malloc0.base|=92, |Thread4_thread1_#t~malloc0.offset|=0, |Thread5_thread2_#in~arg.base|=0, |Thread5_thread2_#in~arg.offset|=0, |Thread5_thread2_#res.base|=0, |Thread5_thread2_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 [221] L1231-8-->L1231-9: Formula: (= |v_#valid_13| (store |v_#valid_14| |v_Thread2_thread0_~#t2~0.base_4| 0)) InVars {#valid=|v_#valid_14|, Thread2_thread0_~#t2~0.base=|v_Thread2_thread0_~#t2~0.base_4|} OutVars{#valid=|v_#valid_13|, Thread2_thread0_~#t2~0.base=|v_Thread2_thread0_~#t2~0.base_4|} AuxVars[] AssignedVars[#valid] VAL [Thread0_thread3_thidvar0=2, Thread0_thread3_~arg.base=0, Thread0_thread3_~arg.offset=0, Thread1_thread2_thidvar0=3, Thread1_thread2_~arg.base=0, Thread1_thread2_~arg.offset=0, Thread2_thread0_thidvar0=5, Thread2_thread0_~arg.base=0, Thread2_thread0_~arg.offset=0, Thread3_thread2_thidvar0=4, Thread3_thread2_~arg.base=0, Thread3_thread2_~arg.offset=0, Thread4_thread1_thidvar0=0, Thread4_thread1_~arg.base=0, Thread4_thread1_~arg.offset=0, Thread5_thread2_thidvar0=1, Thread5_thread2_~arg.base=0, Thread5_thread2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_thread3_#in~arg.base|=0, |Thread0_thread3_#in~arg.offset|=0, |Thread0_thread3_#res.base|=0, |Thread0_thread3_#res.offset|=0, |Thread1_thread2_#in~arg.base|=0, |Thread1_thread2_#in~arg.offset|=0, |Thread1_thread2_#res.base|=0, |Thread1_thread2_#res.offset|=0, |Thread2_thread0_#in~arg.base|=0, |Thread2_thread0_#in~arg.offset|=0, |Thread2_thread0_#res.base|=0, |Thread2_thread0_#res.offset|=0, |Thread2_thread0_~#t2~0.base|=93, |Thread2_thread0_~#t2~0.offset|=0, |Thread2_thread0_~#t3~0.base|=90, |Thread2_thread0_~#t3~0.offset|=0, |Thread2_thread0_~#t4~0.base|=91, |Thread2_thread0_~#t4~0.offset|=0, |Thread2_thread0_~#t5~0.base|=95, |Thread2_thread0_~#t5~0.offset|=0, |Thread3_thread2_#in~arg.base|=0, |Thread3_thread2_#in~arg.offset|=0, |Thread3_thread2_#res.base|=0, |Thread3_thread2_#res.offset|=0, |Thread4_thread1_#in~arg.base|=0, |Thread4_thread1_#in~arg.offset|=0, |Thread4_thread1_#res.base|=0, |Thread4_thread1_#res.offset|=0, |Thread4_thread1_#t~malloc0.base|=92, |Thread4_thread1_#t~malloc0.offset|=0, |Thread5_thread2_#in~arg.base|=0, |Thread5_thread2_#in~arg.offset|=0, |Thread5_thread2_#res.base|=0, |Thread5_thread2_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 [222] L1231-9-->L1231-10: Formula: true InVars {} OutVars{Thread2_thread0_~#t2~0.offset=|v_Thread2_thread0_~#t2~0.offset_4|, Thread2_thread0_~#t2~0.base=|v_Thread2_thread0_~#t2~0.base_5|} AuxVars[] AssignedVars[Thread2_thread0_~#t2~0.offset, Thread2_thread0_~#t2~0.base] VAL [Thread0_thread3_thidvar0=2, Thread0_thread3_~arg.base=0, Thread0_thread3_~arg.offset=0, Thread1_thread2_thidvar0=3, Thread1_thread2_~arg.base=0, Thread1_thread2_~arg.offset=0, Thread2_thread0_thidvar0=5, Thread2_thread0_~arg.base=0, Thread2_thread0_~arg.offset=0, Thread3_thread2_thidvar0=4, Thread3_thread2_~arg.base=0, Thread3_thread2_~arg.offset=0, Thread4_thread1_thidvar0=0, Thread4_thread1_~arg.base=0, Thread4_thread1_~arg.offset=0, Thread5_thread2_thidvar0=1, Thread5_thread2_~arg.base=0, Thread5_thread2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_thread3_#in~arg.base|=0, |Thread0_thread3_#in~arg.offset|=0, |Thread0_thread3_#res.base|=0, |Thread0_thread3_#res.offset|=0, |Thread1_thread2_#in~arg.base|=0, |Thread1_thread2_#in~arg.offset|=0, |Thread1_thread2_#res.base|=0, |Thread1_thread2_#res.offset|=0, |Thread2_thread0_#in~arg.base|=0, |Thread2_thread0_#in~arg.offset|=0, |Thread2_thread0_#res.base|=0, |Thread2_thread0_#res.offset|=0, |Thread2_thread0_~#t3~0.base|=90, |Thread2_thread0_~#t3~0.offset|=0, |Thread2_thread0_~#t4~0.base|=91, |Thread2_thread0_~#t4~0.offset|=0, |Thread2_thread0_~#t5~0.base|=95, |Thread2_thread0_~#t5~0.offset|=0, |Thread3_thread2_#in~arg.base|=0, |Thread3_thread2_#in~arg.offset|=0, |Thread3_thread2_#res.base|=0, |Thread3_thread2_#res.offset|=0, |Thread4_thread1_#in~arg.base|=0, |Thread4_thread1_#in~arg.offset|=0, |Thread4_thread1_#res.base|=0, |Thread4_thread1_#res.offset|=0, |Thread4_thread1_#t~malloc0.base|=92, |Thread4_thread1_#t~malloc0.offset|=0, |Thread5_thread2_#in~arg.base|=0, |Thread5_thread2_#in~arg.offset|=0, |Thread5_thread2_#res.base|=0, |Thread5_thread2_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 [223] L1231-10-->L1231-11: Formula: (= |v_#valid_15| (store |v_#valid_16| |v_Thread2_thread0_~#t3~0.base_4| 0)) InVars {Thread2_thread0_~#t3~0.base=|v_Thread2_thread0_~#t3~0.base_4|, #valid=|v_#valid_16|} OutVars{Thread2_thread0_~#t3~0.base=|v_Thread2_thread0_~#t3~0.base_4|, #valid=|v_#valid_15|} AuxVars[] AssignedVars[#valid] VAL [Thread0_thread3_thidvar0=2, Thread0_thread3_~arg.base=0, Thread0_thread3_~arg.offset=0, Thread1_thread2_thidvar0=3, Thread1_thread2_~arg.base=0, Thread1_thread2_~arg.offset=0, Thread2_thread0_thidvar0=5, Thread2_thread0_~arg.base=0, Thread2_thread0_~arg.offset=0, Thread3_thread2_thidvar0=4, Thread3_thread2_~arg.base=0, Thread3_thread2_~arg.offset=0, Thread4_thread1_thidvar0=0, Thread4_thread1_~arg.base=0, Thread4_thread1_~arg.offset=0, Thread5_thread2_thidvar0=1, Thread5_thread2_~arg.base=0, Thread5_thread2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_thread3_#in~arg.base|=0, |Thread0_thread3_#in~arg.offset|=0, |Thread0_thread3_#res.base|=0, |Thread0_thread3_#res.offset|=0, |Thread1_thread2_#in~arg.base|=0, |Thread1_thread2_#in~arg.offset|=0, |Thread1_thread2_#res.base|=0, |Thread1_thread2_#res.offset|=0, |Thread2_thread0_#in~arg.base|=0, |Thread2_thread0_#in~arg.offset|=0, |Thread2_thread0_#res.base|=0, |Thread2_thread0_#res.offset|=0, |Thread2_thread0_~#t3~0.base|=90, |Thread2_thread0_~#t3~0.offset|=0, |Thread2_thread0_~#t4~0.base|=91, |Thread2_thread0_~#t4~0.offset|=0, |Thread2_thread0_~#t5~0.base|=95, |Thread2_thread0_~#t5~0.offset|=0, |Thread3_thread2_#in~arg.base|=0, |Thread3_thread2_#in~arg.offset|=0, |Thread3_thread2_#res.base|=0, |Thread3_thread2_#res.offset|=0, |Thread4_thread1_#in~arg.base|=0, |Thread4_thread1_#in~arg.offset|=0, |Thread4_thread1_#res.base|=0, |Thread4_thread1_#res.offset|=0, |Thread4_thread1_#t~malloc0.base|=92, |Thread4_thread1_#t~malloc0.offset|=0, |Thread5_thread2_#in~arg.base|=0, |Thread5_thread2_#in~arg.offset|=0, |Thread5_thread2_#res.base|=0, |Thread5_thread2_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 [224] L1231-11-->L1231-12: Formula: true InVars {} OutVars{Thread2_thread0_~#t3~0.offset=|v_Thread2_thread0_~#t3~0.offset_4|, Thread2_thread0_~#t3~0.base=|v_Thread2_thread0_~#t3~0.base_5|} AuxVars[] AssignedVars[Thread2_thread0_~#t3~0.offset, Thread2_thread0_~#t3~0.base] VAL [Thread0_thread3_thidvar0=2, Thread0_thread3_~arg.base=0, Thread0_thread3_~arg.offset=0, Thread1_thread2_thidvar0=3, Thread1_thread2_~arg.base=0, Thread1_thread2_~arg.offset=0, Thread2_thread0_thidvar0=5, Thread2_thread0_~arg.base=0, Thread2_thread0_~arg.offset=0, Thread3_thread2_thidvar0=4, Thread3_thread2_~arg.base=0, Thread3_thread2_~arg.offset=0, Thread4_thread1_thidvar0=0, Thread4_thread1_~arg.base=0, Thread4_thread1_~arg.offset=0, Thread5_thread2_thidvar0=1, Thread5_thread2_~arg.base=0, Thread5_thread2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_thread3_#in~arg.base|=0, |Thread0_thread3_#in~arg.offset|=0, |Thread0_thread3_#res.base|=0, |Thread0_thread3_#res.offset|=0, |Thread1_thread2_#in~arg.base|=0, |Thread1_thread2_#in~arg.offset|=0, |Thread1_thread2_#res.base|=0, |Thread1_thread2_#res.offset|=0, |Thread2_thread0_#in~arg.base|=0, |Thread2_thread0_#in~arg.offset|=0, |Thread2_thread0_#res.base|=0, |Thread2_thread0_#res.offset|=0, |Thread2_thread0_~#t4~0.base|=91, |Thread2_thread0_~#t4~0.offset|=0, |Thread2_thread0_~#t5~0.base|=95, |Thread2_thread0_~#t5~0.offset|=0, |Thread3_thread2_#in~arg.base|=0, |Thread3_thread2_#in~arg.offset|=0, |Thread3_thread2_#res.base|=0, |Thread3_thread2_#res.offset|=0, |Thread4_thread1_#in~arg.base|=0, |Thread4_thread1_#in~arg.offset|=0, |Thread4_thread1_#res.base|=0, |Thread4_thread1_#res.offset|=0, |Thread4_thread1_#t~malloc0.base|=92, |Thread4_thread1_#t~malloc0.offset|=0, |Thread5_thread2_#in~arg.base|=0, |Thread5_thread2_#in~arg.offset|=0, |Thread5_thread2_#res.base|=0, |Thread5_thread2_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 [225] L1231-12-->L1231-13: Formula: (= (store |v_#valid_18| |v_Thread2_thread0_~#t4~0.base_4| 0) |v_#valid_17|) InVars {#valid=|v_#valid_18|, Thread2_thread0_~#t4~0.base=|v_Thread2_thread0_~#t4~0.base_4|} OutVars{#valid=|v_#valid_17|, Thread2_thread0_~#t4~0.base=|v_Thread2_thread0_~#t4~0.base_4|} AuxVars[] AssignedVars[#valid] VAL [Thread0_thread3_thidvar0=2, Thread0_thread3_~arg.base=0, Thread0_thread3_~arg.offset=0, Thread1_thread2_thidvar0=3, Thread1_thread2_~arg.base=0, Thread1_thread2_~arg.offset=0, Thread2_thread0_thidvar0=5, Thread2_thread0_~arg.base=0, Thread2_thread0_~arg.offset=0, Thread3_thread2_thidvar0=4, Thread3_thread2_~arg.base=0, Thread3_thread2_~arg.offset=0, Thread4_thread1_thidvar0=0, Thread4_thread1_~arg.base=0, Thread4_thread1_~arg.offset=0, Thread5_thread2_thidvar0=1, Thread5_thread2_~arg.base=0, Thread5_thread2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_thread3_#in~arg.base|=0, |Thread0_thread3_#in~arg.offset|=0, |Thread0_thread3_#res.base|=0, |Thread0_thread3_#res.offset|=0, |Thread1_thread2_#in~arg.base|=0, |Thread1_thread2_#in~arg.offset|=0, |Thread1_thread2_#res.base|=0, |Thread1_thread2_#res.offset|=0, |Thread2_thread0_#in~arg.base|=0, |Thread2_thread0_#in~arg.offset|=0, |Thread2_thread0_#res.base|=0, |Thread2_thread0_#res.offset|=0, |Thread2_thread0_~#t4~0.base|=91, |Thread2_thread0_~#t4~0.offset|=0, |Thread2_thread0_~#t5~0.base|=95, |Thread2_thread0_~#t5~0.offset|=0, |Thread3_thread2_#in~arg.base|=0, |Thread3_thread2_#in~arg.offset|=0, |Thread3_thread2_#res.base|=0, |Thread3_thread2_#res.offset|=0, |Thread4_thread1_#in~arg.base|=0, |Thread4_thread1_#in~arg.offset|=0, |Thread4_thread1_#res.base|=0, |Thread4_thread1_#res.offset|=0, |Thread4_thread1_#t~malloc0.base|=92, |Thread4_thread1_#t~malloc0.offset|=0, |Thread5_thread2_#in~arg.base|=0, |Thread5_thread2_#in~arg.offset|=0, |Thread5_thread2_#res.base|=0, |Thread5_thread2_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 [226] L1231-13-->L1231-14: Formula: true InVars {} OutVars{Thread2_thread0_~#t4~0.offset=|v_Thread2_thread0_~#t4~0.offset_4|, Thread2_thread0_~#t4~0.base=|v_Thread2_thread0_~#t4~0.base_5|} AuxVars[] AssignedVars[Thread2_thread0_~#t4~0.offset, Thread2_thread0_~#t4~0.base] VAL [Thread0_thread3_thidvar0=2, Thread0_thread3_~arg.base=0, Thread0_thread3_~arg.offset=0, Thread1_thread2_thidvar0=3, Thread1_thread2_~arg.base=0, Thread1_thread2_~arg.offset=0, Thread2_thread0_thidvar0=5, Thread2_thread0_~arg.base=0, Thread2_thread0_~arg.offset=0, Thread3_thread2_thidvar0=4, Thread3_thread2_~arg.base=0, Thread3_thread2_~arg.offset=0, Thread4_thread1_thidvar0=0, Thread4_thread1_~arg.base=0, Thread4_thread1_~arg.offset=0, Thread5_thread2_thidvar0=1, Thread5_thread2_~arg.base=0, Thread5_thread2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_thread3_#in~arg.base|=0, |Thread0_thread3_#in~arg.offset|=0, |Thread0_thread3_#res.base|=0, |Thread0_thread3_#res.offset|=0, |Thread1_thread2_#in~arg.base|=0, |Thread1_thread2_#in~arg.offset|=0, |Thread1_thread2_#res.base|=0, |Thread1_thread2_#res.offset|=0, |Thread2_thread0_#in~arg.base|=0, |Thread2_thread0_#in~arg.offset|=0, |Thread2_thread0_#res.base|=0, |Thread2_thread0_#res.offset|=0, |Thread2_thread0_~#t5~0.base|=95, |Thread2_thread0_~#t5~0.offset|=0, |Thread3_thread2_#in~arg.base|=0, |Thread3_thread2_#in~arg.offset|=0, |Thread3_thread2_#res.base|=0, |Thread3_thread2_#res.offset|=0, |Thread4_thread1_#in~arg.base|=0, |Thread4_thread1_#in~arg.offset|=0, |Thread4_thread1_#res.base|=0, |Thread4_thread1_#res.offset|=0, |Thread4_thread1_#t~malloc0.base|=92, |Thread4_thread1_#t~malloc0.offset|=0, |Thread5_thread2_#in~arg.base|=0, |Thread5_thread2_#in~arg.offset|=0, |Thread5_thread2_#res.base|=0, |Thread5_thread2_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 [227] L1231-14-->L1231-15: Formula: (= |v_#valid_19| (store |v_#valid_20| |v_Thread2_thread0_~#t5~0.base_4| 0)) InVars {Thread2_thread0_~#t5~0.base=|v_Thread2_thread0_~#t5~0.base_4|, #valid=|v_#valid_20|} OutVars{Thread2_thread0_~#t5~0.base=|v_Thread2_thread0_~#t5~0.base_4|, #valid=|v_#valid_19|} AuxVars[] AssignedVars[#valid] VAL [Thread0_thread3_thidvar0=2, Thread0_thread3_~arg.base=0, Thread0_thread3_~arg.offset=0, Thread1_thread2_thidvar0=3, Thread1_thread2_~arg.base=0, Thread1_thread2_~arg.offset=0, Thread2_thread0_thidvar0=5, Thread2_thread0_~arg.base=0, Thread2_thread0_~arg.offset=0, Thread3_thread2_thidvar0=4, Thread3_thread2_~arg.base=0, Thread3_thread2_~arg.offset=0, Thread4_thread1_thidvar0=0, Thread4_thread1_~arg.base=0, Thread4_thread1_~arg.offset=0, Thread5_thread2_thidvar0=1, Thread5_thread2_~arg.base=0, Thread5_thread2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_thread3_#in~arg.base|=0, |Thread0_thread3_#in~arg.offset|=0, |Thread0_thread3_#res.base|=0, |Thread0_thread3_#res.offset|=0, |Thread1_thread2_#in~arg.base|=0, |Thread1_thread2_#in~arg.offset|=0, |Thread1_thread2_#res.base|=0, |Thread1_thread2_#res.offset|=0, |Thread2_thread0_#in~arg.base|=0, |Thread2_thread0_#in~arg.offset|=0, |Thread2_thread0_#res.base|=0, |Thread2_thread0_#res.offset|=0, |Thread2_thread0_~#t5~0.base|=95, |Thread2_thread0_~#t5~0.offset|=0, |Thread3_thread2_#in~arg.base|=0, |Thread3_thread2_#in~arg.offset|=0, |Thread3_thread2_#res.base|=0, |Thread3_thread2_#res.offset|=0, |Thread4_thread1_#in~arg.base|=0, |Thread4_thread1_#in~arg.offset|=0, |Thread4_thread1_#res.base|=0, |Thread4_thread1_#res.offset|=0, |Thread4_thread1_#t~malloc0.base|=92, |Thread4_thread1_#t~malloc0.offset|=0, |Thread5_thread2_#in~arg.base|=0, |Thread5_thread2_#in~arg.offset|=0, |Thread5_thread2_#res.base|=0, |Thread5_thread2_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 [228] L1231-15-->thread0FINAL: Formula: true InVars {} OutVars{Thread2_thread0_~#t5~0.base=|v_Thread2_thread0_~#t5~0.base_5|, Thread2_thread0_~#t5~0.offset=|v_Thread2_thread0_~#t5~0.offset_4|} AuxVars[] AssignedVars[Thread2_thread0_~#t5~0.offset, Thread2_thread0_~#t5~0.base] VAL [Thread0_thread3_thidvar0=2, Thread0_thread3_~arg.base=0, Thread0_thread3_~arg.offset=0, Thread1_thread2_thidvar0=3, Thread1_thread2_~arg.base=0, Thread1_thread2_~arg.offset=0, Thread2_thread0_thidvar0=5, Thread2_thread0_~arg.base=0, Thread2_thread0_~arg.offset=0, Thread3_thread2_thidvar0=4, Thread3_thread2_~arg.base=0, Thread3_thread2_~arg.offset=0, Thread4_thread1_thidvar0=0, Thread4_thread1_~arg.base=0, Thread4_thread1_~arg.offset=0, Thread5_thread2_thidvar0=1, Thread5_thread2_~arg.base=0, Thread5_thread2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_thread3_#in~arg.base|=0, |Thread0_thread3_#in~arg.offset|=0, |Thread0_thread3_#res.base|=0, |Thread0_thread3_#res.offset|=0, |Thread1_thread2_#in~arg.base|=0, |Thread1_thread2_#in~arg.offset|=0, |Thread1_thread2_#res.base|=0, |Thread1_thread2_#res.offset|=0, |Thread2_thread0_#in~arg.base|=0, |Thread2_thread0_#in~arg.offset|=0, |Thread2_thread0_#res.base|=0, |Thread2_thread0_#res.offset|=0, |Thread3_thread2_#in~arg.base|=0, |Thread3_thread2_#in~arg.offset|=0, |Thread3_thread2_#res.base|=0, |Thread3_thread2_#res.offset|=0, |Thread4_thread1_#in~arg.base|=0, |Thread4_thread1_#in~arg.offset|=0, |Thread4_thread1_#res.base|=0, |Thread4_thread1_#res.offset|=0, |Thread4_thread1_#t~malloc0.base|=92, |Thread4_thread1_#t~malloc0.offset|=0, |Thread5_thread2_#in~arg.base|=0, |Thread5_thread2_#in~arg.offset|=0, |Thread5_thread2_#res.base|=0, |Thread5_thread2_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 [229] thread0FINAL-->thread0EXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] VAL [Thread0_thread3_thidvar0=2, Thread0_thread3_~arg.base=0, Thread0_thread3_~arg.offset=0, Thread1_thread2_thidvar0=3, Thread1_thread2_~arg.base=0, Thread1_thread2_~arg.offset=0, Thread2_thread0_thidvar0=5, Thread2_thread0_~arg.base=0, Thread2_thread0_~arg.offset=0, Thread3_thread2_thidvar0=4, Thread3_thread2_~arg.base=0, Thread3_thread2_~arg.offset=0, Thread4_thread1_thidvar0=0, Thread4_thread1_~arg.base=0, Thread4_thread1_~arg.offset=0, Thread5_thread2_thidvar0=1, Thread5_thread2_~arg.base=0, Thread5_thread2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_thread3_#in~arg.base|=0, |Thread0_thread3_#in~arg.offset|=0, |Thread0_thread3_#res.base|=0, |Thread0_thread3_#res.offset|=0, |Thread1_thread2_#in~arg.base|=0, |Thread1_thread2_#in~arg.offset|=0, |Thread1_thread2_#res.base|=0, |Thread1_thread2_#res.offset|=0, |Thread2_thread0_#in~arg.base|=0, |Thread2_thread0_#in~arg.offset|=0, |Thread2_thread0_#res.base|=0, |Thread2_thread0_#res.offset|=0, |Thread3_thread2_#in~arg.base|=0, |Thread3_thread2_#in~arg.offset|=0, |Thread3_thread2_#res.base|=0, |Thread3_thread2_#res.offset|=0, |Thread4_thread1_#in~arg.base|=0, |Thread4_thread1_#in~arg.offset|=0, |Thread4_thread1_#res.base|=0, |Thread4_thread1_#res.offset|=0, |Thread4_thread1_#t~malloc0.base|=92, |Thread4_thread1_#t~malloc0.offset|=0, |Thread5_thread2_#in~arg.base|=0, |Thread5_thread2_#in~arg.offset|=0, |Thread5_thread2_#res.base|=0, |Thread5_thread2_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] JOIN 0 [319] thread0EXIT-->L1248-2: Formula: (= |v_ULTIMATE.start_main_#t~mem12_9| v_Thread2_thread0_thidvar0_14) InVars {ULTIMATE.start_main_#t~mem12=|v_ULTIMATE.start_main_#t~mem12_9|, Thread2_thread0_thidvar0=v_Thread2_thread0_thidvar0_14} OutVars{ULTIMATE.start_main_#t~mem12=|v_ULTIMATE.start_main_#t~mem12_9|, Thread2_thread0_thidvar0=v_Thread2_thread0_thidvar0_14} AuxVars[] AssignedVars[] VAL [Thread0_thread3_thidvar0=2, Thread0_thread3_~arg.base=0, Thread0_thread3_~arg.offset=0, Thread1_thread2_thidvar0=3, Thread1_thread2_~arg.base=0, Thread1_thread2_~arg.offset=0, Thread2_thread0_thidvar0=5, Thread2_thread0_~arg.base=0, Thread2_thread0_~arg.offset=0, Thread3_thread2_thidvar0=4, Thread3_thread2_~arg.base=0, Thread3_thread2_~arg.offset=0, Thread4_thread1_thidvar0=0, Thread4_thread1_~arg.base=0, Thread4_thread1_~arg.offset=0, Thread5_thread2_thidvar0=1, Thread5_thread2_~arg.base=0, Thread5_thread2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_thread3_#in~arg.base|=0, |Thread0_thread3_#in~arg.offset|=0, |Thread0_thread3_#res.base|=0, |Thread0_thread3_#res.offset|=0, |Thread1_thread2_#in~arg.base|=0, |Thread1_thread2_#in~arg.offset|=0, |Thread1_thread2_#res.base|=0, |Thread1_thread2_#res.offset|=0, |Thread2_thread0_#in~arg.base|=0, |Thread2_thread0_#in~arg.offset|=0, |Thread2_thread0_#res.base|=0, |Thread2_thread0_#res.offset|=0, |Thread3_thread2_#in~arg.base|=0, |Thread3_thread2_#in~arg.offset|=0, |Thread3_thread2_#res.base|=0, |Thread3_thread2_#res.offset|=0, |Thread4_thread1_#in~arg.base|=0, |Thread4_thread1_#in~arg.offset|=0, |Thread4_thread1_#res.base|=0, |Thread4_thread1_#res.offset|=0, |Thread4_thread1_#t~malloc0.base|=92, |Thread4_thread1_#t~malloc0.offset|=0, |Thread5_thread2_#in~arg.base|=0, |Thread5_thread2_#in~arg.offset|=0, |Thread5_thread2_#res.base|=0, |Thread5_thread2_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] -1 [122] L1248-2-->L1249: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~mem12=|v_ULTIMATE.start_main_#t~mem12_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem12] VAL [Thread0_thread3_thidvar0=2, Thread0_thread3_~arg.base=0, Thread0_thread3_~arg.offset=0, Thread1_thread2_thidvar0=3, Thread1_thread2_~arg.base=0, Thread1_thread2_~arg.offset=0, Thread2_thread0_thidvar0=5, Thread2_thread0_~arg.base=0, Thread2_thread0_~arg.offset=0, Thread3_thread2_thidvar0=4, Thread3_thread2_~arg.base=0, Thread3_thread2_~arg.offset=0, Thread4_thread1_thidvar0=0, Thread4_thread1_~arg.base=0, Thread4_thread1_~arg.offset=0, Thread5_thread2_thidvar0=1, Thread5_thread2_~arg.base=0, Thread5_thread2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_thread3_#in~arg.base|=0, |Thread0_thread3_#in~arg.offset|=0, |Thread0_thread3_#res.base|=0, |Thread0_thread3_#res.offset|=0, |Thread1_thread2_#in~arg.base|=0, |Thread1_thread2_#in~arg.offset|=0, |Thread1_thread2_#res.base|=0, |Thread1_thread2_#res.offset|=0, |Thread2_thread0_#in~arg.base|=0, |Thread2_thread0_#in~arg.offset|=0, |Thread2_thread0_#res.base|=0, |Thread2_thread0_#res.offset|=0, |Thread3_thread2_#in~arg.base|=0, |Thread3_thread2_#in~arg.offset|=0, |Thread3_thread2_#res.base|=0, |Thread3_thread2_#res.offset|=0, |Thread4_thread1_#in~arg.base|=0, |Thread4_thread1_#in~arg.offset|=0, |Thread4_thread1_#res.base|=0, |Thread4_thread1_#res.offset|=0, |Thread4_thread1_#t~malloc0.base|=92, |Thread4_thread1_#t~malloc0.offset|=0, |Thread5_thread2_#in~arg.base|=0, |Thread5_thread2_#in~arg.offset|=0, |Thread5_thread2_#res.base|=0, |Thread5_thread2_#res.offset|=0, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] -1 [161] L1249-->L1249-1: Formula: (= |v_ULTIMATE.start_main_#t~mem13_2| (select (select |v_#memory_int_23| v_~v~0.base_4) v_~v~0.offset_4)) InVars {#memory_int=|v_#memory_int_23|, ~v~0.offset=v_~v~0.offset_4, ~v~0.base=v_~v~0.base_4} OutVars{#memory_int=|v_#memory_int_23|, ULTIMATE.start_main_#t~mem13=|v_ULTIMATE.start_main_#t~mem13_2|, ~v~0.offset=v_~v~0.offset_4, ~v~0.base=v_~v~0.base_4} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem13] VAL [Thread0_thread3_thidvar0=2, Thread0_thread3_~arg.base=0, Thread0_thread3_~arg.offset=0, Thread1_thread2_thidvar0=3, Thread1_thread2_~arg.base=0, Thread1_thread2_~arg.offset=0, Thread2_thread0_thidvar0=5, Thread2_thread0_~arg.base=0, Thread2_thread0_~arg.offset=0, Thread3_thread2_thidvar0=4, Thread3_thread2_~arg.base=0, Thread3_thread2_~arg.offset=0, Thread4_thread1_thidvar0=0, Thread4_thread1_~arg.base=0, Thread4_thread1_~arg.offset=0, Thread5_thread2_thidvar0=1, Thread5_thread2_~arg.base=0, Thread5_thread2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_thread3_#in~arg.base|=0, |Thread0_thread3_#in~arg.offset|=0, |Thread0_thread3_#res.base|=0, |Thread0_thread3_#res.offset|=0, |Thread1_thread2_#in~arg.base|=0, |Thread1_thread2_#in~arg.offset|=0, |Thread1_thread2_#res.base|=0, |Thread1_thread2_#res.offset|=0, |Thread2_thread0_#in~arg.base|=0, |Thread2_thread0_#in~arg.offset|=0, |Thread2_thread0_#res.base|=0, |Thread2_thread0_#res.offset|=0, |Thread3_thread2_#in~arg.base|=0, |Thread3_thread2_#in~arg.offset|=0, |Thread3_thread2_#res.base|=0, |Thread3_thread2_#res.offset|=0, |Thread4_thread1_#in~arg.base|=0, |Thread4_thread1_#in~arg.offset|=0, |Thread4_thread1_#res.base|=0, |Thread4_thread1_#res.offset|=0, |Thread4_thread1_#t~malloc0.base|=92, |Thread4_thread1_#t~malloc0.offset|=0, |Thread5_thread2_#in~arg.base|=0, |Thread5_thread2_#in~arg.offset|=0, |Thread5_thread2_#res.base|=0, |Thread5_thread2_#res.offset|=0, |ULTIMATE.start_main_#t~mem13|=89, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] -1 [166] L1249-1-->L1249-2: Formula: (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_1| (ite (= |v_ULTIMATE.start_main_#t~mem13_3| 88) 1 0)) InVars {ULTIMATE.start_main_#t~mem13=|v_ULTIMATE.start_main_#t~mem13_3|} OutVars{ULTIMATE.start_main_#t~mem13=|v_ULTIMATE.start_main_#t~mem13_3|, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_1|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_#in~expression] VAL [Thread0_thread3_thidvar0=2, Thread0_thread3_~arg.base=0, Thread0_thread3_~arg.offset=0, Thread1_thread2_thidvar0=3, Thread1_thread2_~arg.base=0, Thread1_thread2_~arg.offset=0, Thread2_thread0_thidvar0=5, Thread2_thread0_~arg.base=0, Thread2_thread0_~arg.offset=0, Thread3_thread2_thidvar0=4, Thread3_thread2_~arg.base=0, Thread3_thread2_~arg.offset=0, Thread4_thread1_thidvar0=0, Thread4_thread1_~arg.base=0, Thread4_thread1_~arg.offset=0, Thread5_thread2_thidvar0=1, Thread5_thread2_~arg.base=0, Thread5_thread2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_thread3_#in~arg.base|=0, |Thread0_thread3_#in~arg.offset|=0, |Thread0_thread3_#res.base|=0, |Thread0_thread3_#res.offset|=0, |Thread1_thread2_#in~arg.base|=0, |Thread1_thread2_#in~arg.offset|=0, |Thread1_thread2_#res.base|=0, |Thread1_thread2_#res.offset|=0, |Thread2_thread0_#in~arg.base|=0, |Thread2_thread0_#in~arg.offset|=0, |Thread2_thread0_#res.base|=0, |Thread2_thread0_#res.offset|=0, |Thread3_thread2_#in~arg.base|=0, |Thread3_thread2_#in~arg.offset|=0, |Thread3_thread2_#res.base|=0, |Thread3_thread2_#res.offset|=0, |Thread4_thread1_#in~arg.base|=0, |Thread4_thread1_#in~arg.offset|=0, |Thread4_thread1_#res.base|=0, |Thread4_thread1_#res.offset|=0, |Thread4_thread1_#t~malloc0.base|=92, |Thread4_thread1_#t~malloc0.offset|=0, |Thread5_thread2_#in~arg.base|=0, |Thread5_thread2_#in~arg.offset|=0, |Thread5_thread2_#res.base|=0, |Thread5_thread2_#res.offset|=0, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_#t~mem13|=89, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] -1 [168] L1249-2-->L1212: Formula: true InVars {} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_1} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] VAL [Thread0_thread3_thidvar0=2, Thread0_thread3_~arg.base=0, Thread0_thread3_~arg.offset=0, Thread1_thread2_thidvar0=3, Thread1_thread2_~arg.base=0, Thread1_thread2_~arg.offset=0, Thread2_thread0_thidvar0=5, Thread2_thread0_~arg.base=0, Thread2_thread0_~arg.offset=0, Thread3_thread2_thidvar0=4, Thread3_thread2_~arg.base=0, Thread3_thread2_~arg.offset=0, Thread4_thread1_thidvar0=0, Thread4_thread1_~arg.base=0, Thread4_thread1_~arg.offset=0, Thread5_thread2_thidvar0=1, Thread5_thread2_~arg.base=0, Thread5_thread2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_thread3_#in~arg.base|=0, |Thread0_thread3_#in~arg.offset|=0, |Thread0_thread3_#res.base|=0, |Thread0_thread3_#res.offset|=0, |Thread1_thread2_#in~arg.base|=0, |Thread1_thread2_#in~arg.offset|=0, |Thread1_thread2_#res.base|=0, |Thread1_thread2_#res.offset|=0, |Thread2_thread0_#in~arg.base|=0, |Thread2_thread0_#in~arg.offset|=0, |Thread2_thread0_#res.base|=0, |Thread2_thread0_#res.offset|=0, |Thread3_thread2_#in~arg.base|=0, |Thread3_thread2_#in~arg.offset|=0, |Thread3_thread2_#res.base|=0, |Thread3_thread2_#res.offset|=0, |Thread4_thread1_#in~arg.base|=0, |Thread4_thread1_#in~arg.offset|=0, |Thread4_thread1_#res.base|=0, |Thread4_thread1_#res.offset|=0, |Thread4_thread1_#t~malloc0.base|=92, |Thread4_thread1_#t~malloc0.offset|=0, |Thread5_thread2_#in~arg.base|=0, |Thread5_thread2_#in~arg.offset|=0, |Thread5_thread2_#res.base|=0, |Thread5_thread2_#res.offset|=0, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_#t~mem13|=89, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] -1 [148] L1212-->L1212-1: Formula: (= v_ULTIMATE.start___VERIFIER_assert_~expression_2 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_2|) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_2|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_2, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_2|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] VAL [Thread0_thread3_thidvar0=2, Thread0_thread3_~arg.base=0, Thread0_thread3_~arg.offset=0, Thread1_thread2_thidvar0=3, Thread1_thread2_~arg.base=0, Thread1_thread2_~arg.offset=0, Thread2_thread0_thidvar0=5, Thread2_thread0_~arg.base=0, Thread2_thread0_~arg.offset=0, Thread3_thread2_thidvar0=4, Thread3_thread2_~arg.base=0, Thread3_thread2_~arg.offset=0, Thread4_thread1_thidvar0=0, Thread4_thread1_~arg.base=0, Thread4_thread1_~arg.offset=0, Thread5_thread2_thidvar0=1, Thread5_thread2_~arg.base=0, Thread5_thread2_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_thread3_#in~arg.base|=0, |Thread0_thread3_#in~arg.offset|=0, |Thread0_thread3_#res.base|=0, |Thread0_thread3_#res.offset|=0, |Thread1_thread2_#in~arg.base|=0, |Thread1_thread2_#in~arg.offset|=0, |Thread1_thread2_#res.base|=0, |Thread1_thread2_#res.offset|=0, |Thread2_thread0_#in~arg.base|=0, |Thread2_thread0_#in~arg.offset|=0, |Thread2_thread0_#res.base|=0, |Thread2_thread0_#res.offset|=0, |Thread3_thread2_#in~arg.base|=0, |Thread3_thread2_#in~arg.offset|=0, |Thread3_thread2_#res.base|=0, |Thread3_thread2_#res.offset|=0, |Thread4_thread1_#in~arg.base|=0, |Thread4_thread1_#in~arg.offset|=0, |Thread4_thread1_#res.base|=0, |Thread4_thread1_#res.offset|=0, |Thread4_thread1_#t~malloc0.base|=92, |Thread4_thread1_#t~malloc0.offset|=0, |Thread5_thread2_#in~arg.base|=0, |Thread5_thread2_#in~arg.offset|=0, |Thread5_thread2_#res.base|=0, |Thread5_thread2_#res.offset|=0, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_#t~mem13|=89, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] -1 [150] L1212-1-->L1212-2: Formula: (= v_ULTIMATE.start___VERIFIER_assert_~expression_3 0) InVars {ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_3} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_3} AuxVars[] AssignedVars[] VAL [Thread0_thread3_thidvar0=2, Thread0_thread3_~arg.base=0, Thread0_thread3_~arg.offset=0, Thread1_thread2_thidvar0=3, Thread1_thread2_~arg.base=0, Thread1_thread2_~arg.offset=0, Thread2_thread0_thidvar0=5, Thread2_thread0_~arg.base=0, Thread2_thread0_~arg.offset=0, Thread3_thread2_thidvar0=4, Thread3_thread2_~arg.base=0, Thread3_thread2_~arg.offset=0, Thread4_thread1_thidvar0=0, Thread4_thread1_~arg.base=0, Thread4_thread1_~arg.offset=0, Thread5_thread2_thidvar0=1, Thread5_thread2_~arg.base=0, Thread5_thread2_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_thread3_#in~arg.base|=0, |Thread0_thread3_#in~arg.offset|=0, |Thread0_thread3_#res.base|=0, |Thread0_thread3_#res.offset|=0, |Thread1_thread2_#in~arg.base|=0, |Thread1_thread2_#in~arg.offset|=0, |Thread1_thread2_#res.base|=0, |Thread1_thread2_#res.offset|=0, |Thread2_thread0_#in~arg.base|=0, |Thread2_thread0_#in~arg.offset|=0, |Thread2_thread0_#res.base|=0, |Thread2_thread0_#res.offset|=0, |Thread3_thread2_#in~arg.base|=0, |Thread3_thread2_#in~arg.offset|=0, |Thread3_thread2_#res.base|=0, |Thread3_thread2_#res.offset|=0, |Thread4_thread1_#in~arg.base|=0, |Thread4_thread1_#in~arg.offset|=0, |Thread4_thread1_#res.base|=0, |Thread4_thread1_#res.offset|=0, |Thread4_thread1_#t~malloc0.base|=92, |Thread4_thread1_#t~malloc0.offset|=0, |Thread5_thread2_#in~arg.base|=0, |Thread5_thread2_#in~arg.offset|=0, |Thread5_thread2_#res.base|=0, |Thread5_thread2_#res.offset|=0, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_#t~mem13|=89, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] -1 [156] L1212-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] VAL [Thread0_thread3_thidvar0=2, Thread0_thread3_~arg.base=0, Thread0_thread3_~arg.offset=0, Thread1_thread2_thidvar0=3, Thread1_thread2_~arg.base=0, Thread1_thread2_~arg.offset=0, Thread2_thread0_thidvar0=5, Thread2_thread0_~arg.base=0, Thread2_thread0_~arg.offset=0, Thread3_thread2_thidvar0=4, Thread3_thread2_~arg.base=0, Thread3_thread2_~arg.offset=0, Thread4_thread1_thidvar0=0, Thread4_thread1_~arg.base=0, Thread4_thread1_~arg.offset=0, Thread5_thread2_thidvar0=1, Thread5_thread2_~arg.base=0, Thread5_thread2_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_thread3_#in~arg.base|=0, |Thread0_thread3_#in~arg.offset|=0, |Thread0_thread3_#res.base|=0, |Thread0_thread3_#res.offset|=0, |Thread1_thread2_#in~arg.base|=0, |Thread1_thread2_#in~arg.offset|=0, |Thread1_thread2_#res.base|=0, |Thread1_thread2_#res.offset|=0, |Thread2_thread0_#in~arg.base|=0, |Thread2_thread0_#in~arg.offset|=0, |Thread2_thread0_#res.base|=0, |Thread2_thread0_#res.offset|=0, |Thread3_thread2_#in~arg.base|=0, |Thread3_thread2_#in~arg.offset|=0, |Thread3_thread2_#res.base|=0, |Thread3_thread2_#res.offset|=0, |Thread4_thread1_#in~arg.base|=0, |Thread4_thread1_#in~arg.offset|=0, |Thread4_thread1_#res.base|=0, |Thread4_thread1_#res.offset|=0, |Thread4_thread1_#t~malloc0.base|=92, |Thread4_thread1_#t~malloc0.offset|=0, |Thread5_thread2_#in~arg.base|=0, |Thread5_thread2_#in~arg.offset|=0, |Thread5_thread2_#res.base|=0, |Thread5_thread2_#res.offset|=0, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_#t~mem13|=89, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] -1 #NULL.base, #NULL.offset := 0, 0; VAL [|#NULL.base|=0, |#NULL.offset|=0] [?] -1 #valid := #valid[0 := 0]; VAL [|#NULL.base|=0, |#NULL.offset|=0] [?] -1 ~v~0.base, ~v~0.offset := 0, 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~v~0.base=0, ~v~0.offset=0] [?] -1 havoc main_#res; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~v~0.base=0, ~v~0.offset=0] [?] -1 havoc main_#t~nondet11, main_#t~mem12, main_#t~mem13, main_~#t~0.base, main_~#t~0.offset; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~v~0.base=0, ~v~0.offset=0] [?] -1 SUMMARY for call main_~#t~0.base, main_~#t~0.offset := #Ultimate.alloc(4); srcloc: L1246 VAL [|#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=0, ~v~0.offset=0] [?] -1 SUMMARY for call write~int(5, main_~#t~0.base, main_~#t~0.offset, 4); srcloc: L1246-1 VAL [|#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=0, ~v~0.offset=0] [?] FORK -1 fork 5 thread0(0, 0); VAL [|#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=0, ~v~0.offset=0] [?] 0 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=0, ~v~0.offset=0] [?] -1 havoc main_#t~nondet11; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=0, ~v~0.offset=0] [?] 0 SUMMARY for call ~#t1~0.base, ~#t1~0.offset := #Ultimate.alloc(4); srcloc: L1231 VAL [thread0_~arg.base=0, thread0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=0, ~v~0.offset=0] [?] 0 SUMMARY for call ~#t2~0.base, ~#t2~0.offset := #Ultimate.alloc(4); srcloc: L1231-1 VAL [thread0_~arg.base=0, thread0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=0, ~v~0.offset=0] [?] 0 SUMMARY for call ~#t3~0.base, ~#t3~0.offset := #Ultimate.alloc(4); srcloc: L1231-2 VAL [thread0_~arg.base=0, thread0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=0, ~v~0.offset=0] [?] 0 SUMMARY for call ~#t4~0.base, ~#t4~0.offset := #Ultimate.alloc(4); srcloc: L1231-3 VAL [thread0_~arg.base=0, thread0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=0, ~v~0.offset=0] [?] 0 SUMMARY for call ~#t5~0.base, ~#t5~0.offset := #Ultimate.alloc(4); srcloc: L1231-4 VAL [thread0_~arg.base=0, thread0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=0, ~v~0.offset=0] [?] 0 SUMMARY for call write~int(0, ~#t1~0.base, ~#t1~0.offset, 4); srcloc: L1231-5 VAL [thread0_~arg.base=0, thread0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=0, ~v~0.offset=0] [?] FORK 0 fork 0 thread1(0, 0); VAL [thread0_~arg.base=0, thread0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=0, ~v~0.offset=0] [?] 1 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=0, ~v~0.offset=0] [?] 1 SUMMARY for call #t~malloc0.base, #t~malloc0.offset := #Ultimate.alloc(1); srcloc: L1216 VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=0, ~v~0.offset=0] [?] 1 ~v~0.base, ~v~0.offset := #t~malloc0.base, #t~malloc0.offset; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 1 #res.base, #res.offset := 0, 0; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 1 assume true; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] -1 SUMMARY for call main_#t~mem12 := read~int(main_~#t~0.base, main_~#t~0.offset, 4); srcloc: L1248 VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 havoc #t~nondet1; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 SUMMARY for call #t~mem2 := read~int(~#t1~0.base, ~#t1~0.offset, 4); srcloc: L1233 VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_#t~mem2|=0, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] JOIN 1 join #t~mem2; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_#t~mem2|=0, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 havoc #t~mem2; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 SUMMARY for call write~int(1, ~#t2~0.base, ~#t2~0.offset, 4); srcloc: L1234 VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] FORK 0 fork 1 thread2(0, 0); VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 2 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 havoc #t~nondet3; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 2 SUMMARY for call write~int(88, ~v~0.base, ~v~0.offset, 1); srcloc: L1221 VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 2 #res.base, #res.offset := 0, 0; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 SUMMARY for call write~int(2, ~#t3~0.base, ~#t3~0.offset, 4); srcloc: L1235 VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] FORK 0 fork 2 thread3(0, 0); VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 2 assume true; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 havoc #t~nondet4; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 3 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 SUMMARY for call write~int(3, ~#t4~0.base, ~#t4~0.offset, 4); srcloc: L1236 VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] FORK 0 fork 3 thread2(0, 0); VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 havoc #t~nondet5; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 SUMMARY for call write~int(4, ~#t5~0.base, ~#t5~0.offset, 4); srcloc: L1237 VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] FORK 0 fork 4 thread2(0, 0); VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 4 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 4 SUMMARY for call write~int(88, ~v~0.base, ~v~0.offset, 1); srcloc: L1221 VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 4 #res.base, #res.offset := 0, 0; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 havoc #t~nondet6; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 SUMMARY for call #t~mem7 := read~int(~#t2~0.base, ~#t2~0.offset, 4); srcloc: L1238 VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_#t~mem7|=1, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] JOIN 2 join #t~mem7; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_#t~mem7|=1, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 havoc #t~mem7; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 SUMMARY for call #t~mem8 := read~int(~#t3~0.base, ~#t3~0.offset, 4); srcloc: L1239 VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_#t~mem8|=2, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 4 assume true; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_#t~mem8|=2, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 5 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_#t~mem8|=2, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 5 SUMMARY for call write~int(88, ~v~0.base, ~v~0.offset, 1); srcloc: L1221 VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_#t~mem8|=2, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 5 #res.base, #res.offset := 0, 0; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_#t~mem8|=2, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 5 assume true; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_#t~mem8|=2, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 3 SUMMARY for call write~int(89, ~v~0.base, ~v~0.offset, 1); srcloc: L1226 VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_#t~mem8|=2, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 3 #res.base, #res.offset := 0, 0; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_#t~mem8|=2, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |thread3_#res.base|=0, |thread3_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 3 assume true; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_#t~mem8|=2, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |thread3_#res.base|=0, |thread3_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] JOIN 3 join #t~mem8; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_#t~mem8|=2, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |thread3_#res.base|=0, |thread3_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 havoc #t~mem8; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |thread3_#res.base|=0, |thread3_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 SUMMARY for call #t~mem9 := read~int(~#t4~0.base, ~#t4~0.offset, 4); srcloc: L1240 VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_#t~mem9|=3, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |thread3_#res.base|=0, |thread3_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] JOIN 5 join #t~mem9; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_#t~mem9|=3, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |thread3_#res.base|=0, |thread3_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 havoc #t~mem9; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |thread3_#res.base|=0, |thread3_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 SUMMARY for call #t~mem10 := read~int(~#t5~0.base, ~#t5~0.offset, 4); srcloc: L1241 VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_#t~mem10|=4, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |thread3_#res.base|=0, |thread3_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] JOIN 4 join #t~mem10; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_#t~mem10|=4, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |thread3_#res.base|=0, |thread3_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 havoc #t~mem10; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |thread3_#res.base|=0, |thread3_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 #res.base, #res.offset := 0, 0; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_#res.base|=0, |thread0_#res.offset|=0, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |thread3_#res.base|=0, |thread3_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 SUMMARY for call ULTIMATE.dealloc(~#t1~0.base, ~#t1~0.offset); srcloc: L1231-6 VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_#res.base|=0, |thread0_#res.offset|=0, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |thread3_#res.base|=0, |thread3_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 havoc ~#t1~0.base, ~#t1~0.offset; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_#res.base|=0, |thread0_#res.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |thread3_#res.base|=0, |thread3_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 SUMMARY for call ULTIMATE.dealloc(~#t2~0.base, ~#t2~0.offset); srcloc: L1231-8 VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_#res.base|=0, |thread0_#res.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |thread3_#res.base|=0, |thread3_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 havoc ~#t2~0.base, ~#t2~0.offset; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_#res.base|=0, |thread0_#res.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |thread3_#res.base|=0, |thread3_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 SUMMARY for call ULTIMATE.dealloc(~#t3~0.base, ~#t3~0.offset); srcloc: L1231-10 VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_#res.base|=0, |thread0_#res.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |thread3_#res.base|=0, |thread3_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 havoc ~#t3~0.base, ~#t3~0.offset; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_#res.base|=0, |thread0_#res.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |thread3_#res.base|=0, |thread3_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 SUMMARY for call ULTIMATE.dealloc(~#t4~0.base, ~#t4~0.offset); srcloc: L1231-12 VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_#res.base|=0, |thread0_#res.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |thread3_#res.base|=0, |thread3_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 havoc ~#t4~0.base, ~#t4~0.offset; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_#res.base|=0, |thread0_#res.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |thread3_#res.base|=0, |thread3_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 SUMMARY for call ULTIMATE.dealloc(~#t5~0.base, ~#t5~0.offset); srcloc: L1231-14 VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_#res.base|=0, |thread0_#res.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |thread3_#res.base|=0, |thread3_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 havoc ~#t5~0.base, ~#t5~0.offset; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_#res.base|=0, |thread0_#res.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |thread3_#res.base|=0, |thread3_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 assume true; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_#res.base|=0, |thread0_#res.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |thread3_#res.base|=0, |thread3_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] JOIN 0 join main_#t~mem12; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_#res.base|=0, |thread0_#res.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |thread3_#res.base|=0, |thread3_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] -1 havoc main_#t~mem12; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_#res.base|=0, |thread0_#res.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |thread3_#res.base|=0, |thread3_#res.offset|=0, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] -1 SUMMARY for call main_#t~mem13 := read~int(~v~0.base, ~v~0.offset, 1); srcloc: L1249 VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_#res.base|=0, |thread0_#res.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |thread3_#res.base|=0, |thread3_#res.offset|=0, |ULTIMATE.start_main_#t~mem13|=89, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] -1 __VERIFIER_assert_#in~expression := (if 88 == main_#t~mem13 then 1 else 0); VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_#res.base|=0, |thread0_#res.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |thread3_#res.base|=0, |thread3_#res.offset|=0, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_#t~mem13|=89, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] -1 havoc __VERIFIER_assert_~expression; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_#res.base|=0, |thread0_#res.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |thread3_#res.base|=0, |thread3_#res.offset|=0, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_#t~mem13|=89, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] -1 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_#res.base|=0, |thread0_#res.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |thread3_#res.base|=0, |thread3_#res.offset|=0, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_#t~mem13|=89, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] -1 assume 0 == __VERIFIER_assert_~expression; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_#res.base|=0, |thread0_#res.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |thread3_#res.base|=0, |thread3_#res.offset|=0, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_#t~mem13|=89, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] -1 assume !false; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_#res.base|=0, |thread0_#res.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |thread3_#res.base|=0, |thread3_#res.offset|=0, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_#t~mem13|=89, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] ----- ----- class de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder.RCFGBacktranslator [?] -1 #NULL.base, #NULL.offset := 0, 0; VAL [|#NULL.base|=0, |#NULL.offset|=0] [?] -1 #valid := #valid[0 := 0]; VAL [|#NULL.base|=0, |#NULL.offset|=0] [?] -1 ~v~0.base, ~v~0.offset := 0, 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~v~0.base=0, ~v~0.offset=0] [?] -1 havoc main_#res; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~v~0.base=0, ~v~0.offset=0] [?] -1 havoc main_#t~nondet11, main_#t~mem12, main_#t~mem13, main_~#t~0.base, main_~#t~0.offset; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~v~0.base=0, ~v~0.offset=0] [?] -1 SUMMARY for call main_~#t~0.base, main_~#t~0.offset := #Ultimate.alloc(4); srcloc: L1246 VAL [|#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=0, ~v~0.offset=0] [?] -1 SUMMARY for call write~int(5, main_~#t~0.base, main_~#t~0.offset, 4); srcloc: L1246-1 VAL [|#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=0, ~v~0.offset=0] [?] FORK -1 fork 5 thread0(0, 0); VAL [|#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=0, ~v~0.offset=0] [?] 0 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=0, ~v~0.offset=0] [?] -1 havoc main_#t~nondet11; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=0, ~v~0.offset=0] [?] 0 SUMMARY for call ~#t1~0.base, ~#t1~0.offset := #Ultimate.alloc(4); srcloc: L1231 VAL [thread0_~arg.base=0, thread0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=0, ~v~0.offset=0] [?] 0 SUMMARY for call ~#t2~0.base, ~#t2~0.offset := #Ultimate.alloc(4); srcloc: L1231-1 VAL [thread0_~arg.base=0, thread0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=0, ~v~0.offset=0] [?] 0 SUMMARY for call ~#t3~0.base, ~#t3~0.offset := #Ultimate.alloc(4); srcloc: L1231-2 VAL [thread0_~arg.base=0, thread0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=0, ~v~0.offset=0] [?] 0 SUMMARY for call ~#t4~0.base, ~#t4~0.offset := #Ultimate.alloc(4); srcloc: L1231-3 VAL [thread0_~arg.base=0, thread0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=0, ~v~0.offset=0] [?] 0 SUMMARY for call ~#t5~0.base, ~#t5~0.offset := #Ultimate.alloc(4); srcloc: L1231-4 VAL [thread0_~arg.base=0, thread0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=0, ~v~0.offset=0] [?] 0 SUMMARY for call write~int(0, ~#t1~0.base, ~#t1~0.offset, 4); srcloc: L1231-5 VAL [thread0_~arg.base=0, thread0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=0, ~v~0.offset=0] [?] FORK 0 fork 0 thread1(0, 0); VAL [thread0_~arg.base=0, thread0_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=0, ~v~0.offset=0] [?] 1 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=0, ~v~0.offset=0] [?] 1 SUMMARY for call #t~malloc0.base, #t~malloc0.offset := #Ultimate.alloc(1); srcloc: L1216 VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=0, ~v~0.offset=0] [?] 1 ~v~0.base, ~v~0.offset := #t~malloc0.base, #t~malloc0.offset; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 1 #res.base, #res.offset := 0, 0; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 1 assume true; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] -1 SUMMARY for call main_#t~mem12 := read~int(main_~#t~0.base, main_~#t~0.offset, 4); srcloc: L1248 VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 havoc #t~nondet1; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 SUMMARY for call #t~mem2 := read~int(~#t1~0.base, ~#t1~0.offset, 4); srcloc: L1233 VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_#t~mem2|=0, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] JOIN 1 join #t~mem2; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_#t~mem2|=0, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 havoc #t~mem2; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 SUMMARY for call write~int(1, ~#t2~0.base, ~#t2~0.offset, 4); srcloc: L1234 VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] FORK 0 fork 1 thread2(0, 0); VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 2 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 havoc #t~nondet3; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 2 SUMMARY for call write~int(88, ~v~0.base, ~v~0.offset, 1); srcloc: L1221 VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 2 #res.base, #res.offset := 0, 0; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 SUMMARY for call write~int(2, ~#t3~0.base, ~#t3~0.offset, 4); srcloc: L1235 VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] FORK 0 fork 2 thread3(0, 0); VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 2 assume true; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 havoc #t~nondet4; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 3 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 SUMMARY for call write~int(3, ~#t4~0.base, ~#t4~0.offset, 4); srcloc: L1236 VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] FORK 0 fork 3 thread2(0, 0); VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 havoc #t~nondet5; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 SUMMARY for call write~int(4, ~#t5~0.base, ~#t5~0.offset, 4); srcloc: L1237 VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] FORK 0 fork 4 thread2(0, 0); VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 4 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 4 SUMMARY for call write~int(88, ~v~0.base, ~v~0.offset, 1); srcloc: L1221 VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 4 #res.base, #res.offset := 0, 0; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 havoc #t~nondet6; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 SUMMARY for call #t~mem7 := read~int(~#t2~0.base, ~#t2~0.offset, 4); srcloc: L1238 VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_#t~mem7|=1, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] JOIN 2 join #t~mem7; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_#t~mem7|=1, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 havoc #t~mem7; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 SUMMARY for call #t~mem8 := read~int(~#t3~0.base, ~#t3~0.offset, 4); srcloc: L1239 VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_#t~mem8|=2, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 4 assume true; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_#t~mem8|=2, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 5 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_#t~mem8|=2, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 5 SUMMARY for call write~int(88, ~v~0.base, ~v~0.offset, 1); srcloc: L1221 VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_#t~mem8|=2, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 5 #res.base, #res.offset := 0, 0; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_#t~mem8|=2, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 5 assume true; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_#t~mem8|=2, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 3 SUMMARY for call write~int(89, ~v~0.base, ~v~0.offset, 1); srcloc: L1226 VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_#t~mem8|=2, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 3 #res.base, #res.offset := 0, 0; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_#t~mem8|=2, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |thread3_#res.base|=0, |thread3_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 3 assume true; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_#t~mem8|=2, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |thread3_#res.base|=0, |thread3_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] JOIN 3 join #t~mem8; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_#t~mem8|=2, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |thread3_#res.base|=0, |thread3_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 havoc #t~mem8; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |thread3_#res.base|=0, |thread3_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 SUMMARY for call #t~mem9 := read~int(~#t4~0.base, ~#t4~0.offset, 4); srcloc: L1240 VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_#t~mem9|=3, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |thread3_#res.base|=0, |thread3_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] JOIN 5 join #t~mem9; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_#t~mem9|=3, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |thread3_#res.base|=0, |thread3_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 havoc #t~mem9; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |thread3_#res.base|=0, |thread3_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 SUMMARY for call #t~mem10 := read~int(~#t5~0.base, ~#t5~0.offset, 4); srcloc: L1241 VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_#t~mem10|=4, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |thread3_#res.base|=0, |thread3_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] JOIN 4 join #t~mem10; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_#t~mem10|=4, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |thread3_#res.base|=0, |thread3_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 havoc #t~mem10; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |thread3_#res.base|=0, |thread3_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 #res.base, #res.offset := 0, 0; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_#res.base|=0, |thread0_#res.offset|=0, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |thread3_#res.base|=0, |thread3_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 SUMMARY for call ULTIMATE.dealloc(~#t1~0.base, ~#t1~0.offset); srcloc: L1231-6 VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_#res.base|=0, |thread0_#res.offset|=0, |thread0_~#t1~0.base|=96, |thread0_~#t1~0.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |thread3_#res.base|=0, |thread3_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 havoc ~#t1~0.base, ~#t1~0.offset; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_#res.base|=0, |thread0_#res.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |thread3_#res.base|=0, |thread3_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 SUMMARY for call ULTIMATE.dealloc(~#t2~0.base, ~#t2~0.offset); srcloc: L1231-8 VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_#res.base|=0, |thread0_#res.offset|=0, |thread0_~#t2~0.base|=93, |thread0_~#t2~0.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |thread3_#res.base|=0, |thread3_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 havoc ~#t2~0.base, ~#t2~0.offset; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_#res.base|=0, |thread0_#res.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |thread3_#res.base|=0, |thread3_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 SUMMARY for call ULTIMATE.dealloc(~#t3~0.base, ~#t3~0.offset); srcloc: L1231-10 VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_#res.base|=0, |thread0_#res.offset|=0, |thread0_~#t3~0.base|=90, |thread0_~#t3~0.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |thread3_#res.base|=0, |thread3_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 havoc ~#t3~0.base, ~#t3~0.offset; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_#res.base|=0, |thread0_#res.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |thread3_#res.base|=0, |thread3_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 SUMMARY for call ULTIMATE.dealloc(~#t4~0.base, ~#t4~0.offset); srcloc: L1231-12 VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_#res.base|=0, |thread0_#res.offset|=0, |thread0_~#t4~0.base|=91, |thread0_~#t4~0.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |thread3_#res.base|=0, |thread3_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 havoc ~#t4~0.base, ~#t4~0.offset; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_#res.base|=0, |thread0_#res.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |thread3_#res.base|=0, |thread3_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 SUMMARY for call ULTIMATE.dealloc(~#t5~0.base, ~#t5~0.offset); srcloc: L1231-14 VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_#res.base|=0, |thread0_#res.offset|=0, |thread0_~#t5~0.base|=95, |thread0_~#t5~0.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |thread3_#res.base|=0, |thread3_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 havoc ~#t5~0.base, ~#t5~0.offset; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_#res.base|=0, |thread0_#res.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |thread3_#res.base|=0, |thread3_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] 0 assume true; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_#res.base|=0, |thread0_#res.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |thread3_#res.base|=0, |thread3_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] JOIN 0 join main_#t~mem12; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_#res.base|=0, |thread0_#res.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |thread3_#res.base|=0, |thread3_#res.offset|=0, |ULTIMATE.start_main_#t~mem12|=5, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] -1 havoc main_#t~mem12; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_#res.base|=0, |thread0_#res.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |thread3_#res.base|=0, |thread3_#res.offset|=0, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] -1 SUMMARY for call main_#t~mem13 := read~int(~v~0.base, ~v~0.offset, 1); srcloc: L1249 VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_#res.base|=0, |thread0_#res.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |thread3_#res.base|=0, |thread3_#res.offset|=0, |ULTIMATE.start_main_#t~mem13|=89, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] -1 __VERIFIER_assert_#in~expression := (if 88 == main_#t~mem13 then 1 else 0); VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_#res.base|=0, |thread0_#res.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |thread3_#res.base|=0, |thread3_#res.offset|=0, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_#t~mem13|=89, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] -1 havoc __VERIFIER_assert_~expression; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_#res.base|=0, |thread0_#res.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |thread3_#res.base|=0, |thread3_#res.offset|=0, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_#t~mem13|=89, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] -1 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_#res.base|=0, |thread0_#res.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |thread3_#res.base|=0, |thread3_#res.offset|=0, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_#t~mem13|=89, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] -1 assume 0 == __VERIFIER_assert_~expression; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_#res.base|=0, |thread0_#res.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |thread3_#res.base|=0, |thread3_#res.offset|=0, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_#t~mem13|=89, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] -1 assume !false; VAL [thread0_~arg.base=0, thread0_~arg.offset=0, thread1_~arg.base=0, thread1_~arg.offset=0, thread2_~arg.base=0, thread2_~arg.offset=0, thread3_~arg.base=0, thread3_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |thread0_#in~arg.base|=0, |thread0_#in~arg.offset|=0, |thread0_#res.base|=0, |thread0_#res.offset|=0, |thread1_#in~arg.base|=0, |thread1_#in~arg.offset|=0, |thread1_#res.base|=0, |thread1_#res.offset|=0, |thread1_#t~malloc0.base|=92, |thread1_#t~malloc0.offset|=0, |thread2_#in~arg.base|=0, |thread2_#in~arg.offset|=0, |thread2_#res.base|=0, |thread2_#res.offset|=0, |thread3_#in~arg.base|=0, |thread3_#in~arg.offset|=0, |thread3_#res.base|=0, |thread3_#res.offset|=0, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_#t~mem13|=89, |ULTIMATE.start_main_~#t~0.base|=94, |ULTIMATE.start_main_~#t~0.offset|=0, ~v~0.base=92, ~v~0.offset=0] [?] -1 #NULL.base, #NULL.offset := 0, 0; VAL [#NULL.base=0, #NULL.offset=0] [?] -1 #valid := #valid[0 := 0]; VAL [#NULL.base=0, #NULL.offset=0] [L1213] -1 ~v~0.base, ~v~0.offset := 0, 0; VAL [#NULL.base=0, #NULL.offset=0, ~v~0.base=0, ~v~0.offset=0] [?] -1 havoc main_#res; VAL [#NULL.base=0, #NULL.offset=0, ~v~0.base=0, ~v~0.offset=0] [?] -1 havoc main_#t~nondet11, main_#t~mem12, main_#t~mem13, main_~#t~0.base, main_~#t~0.offset; VAL [#NULL.base=0, #NULL.offset=0, ~v~0.base=0, ~v~0.offset=0] [L1246] -1 call main_~#t~0.base, main_~#t~0.offset := #Ultimate.alloc(4); VAL [#NULL.base=0, #NULL.offset=0, main_~#t~0.base=94, main_~#t~0.offset=0, ~v~0.base=0, ~v~0.offset=0] [L1247] -1 call write~int(5, main_~#t~0.base, main_~#t~0.offset, 4); VAL [#NULL.base=0, #NULL.offset=0, main_~#t~0.base=94, main_~#t~0.offset=0, ~v~0.base=0, ~v~0.offset=0] [L1247] FORK -1 fork 5 thread0(0, 0); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t~0.base=94, main_~#t~0.offset=0, ~v~0.base=0, ~v~0.offset=0] [L1229-L1243] 0 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset; VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t~0.base=94, main_~#t~0.offset=0, ~arg.base=0, ~arg.offset=0, ~v~0.base=0, ~v~0.offset=0] [L1247] -1 havoc main_#t~nondet11; VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t~0.base=94, main_~#t~0.offset=0, ~arg.base=0, ~arg.offset=0, ~v~0.base=0, ~v~0.offset=0] [L1231] 0 call ~#t1~0.base, ~#t1~0.offset := #Ultimate.alloc(4); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~arg.base=0, ~arg.offset=0, ~v~0.base=0, ~v~0.offset=0] [L1231] 0 call ~#t2~0.base, ~#t2~0.offset := #Ultimate.alloc(4); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~arg.base=0, ~arg.offset=0, ~v~0.base=0, ~v~0.offset=0] [L1231] 0 call ~#t3~0.base, ~#t3~0.offset := #Ultimate.alloc(4); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~arg.base=0, ~arg.offset=0, ~v~0.base=0, ~v~0.offset=0] [L1231] 0 call ~#t4~0.base, ~#t4~0.offset := #Ultimate.alloc(4); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~arg.base=0, ~arg.offset=0, ~v~0.base=0, ~v~0.offset=0] [L1231] 0 call ~#t5~0.base, ~#t5~0.offset := #Ultimate.alloc(4); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.offset=0, ~v~0.base=0, ~v~0.offset=0] [L1232] 0 call write~int(0, ~#t1~0.base, ~#t1~0.offset, 4); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.offset=0, ~v~0.base=0, ~v~0.offset=0] [L1232] FORK 0 fork 0 thread1(0, 0); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.offset=0, ~v~0.base=0, ~v~0.offset=0] [L1214-L1218] 1 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=0, ~v~0.offset=0] [L1216] 1 call #t~malloc0.base, #t~malloc0.offset := #Ultimate.alloc(1); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=0, ~v~0.offset=0] [L1216] 1 ~v~0.base, ~v~0.offset := #t~malloc0.base, #t~malloc0.offset; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1217] 1 #res.base, #res.offset := 0, 0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1214-L1218] 1 ensures true; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1248] -1 call main_#t~mem12 := read~int(main_~#t~0.base, main_~#t~0.offset, 4); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1232] 0 havoc #t~nondet1; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1233] 0 call #t~mem2 := read~int(~#t1~0.base, ~#t1~0.offset, 4); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, #t~mem2=0, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1233] JOIN 1 join #t~mem2; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, #t~mem2=0, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1233] 0 havoc #t~mem2; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1234] 0 call write~int(1, ~#t2~0.base, ~#t2~0.offset, 4); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1234] FORK 0 fork 1 thread2(0, 0); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1219-L1223] 2 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1234] 0 havoc #t~nondet3; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1221] 2 call write~int(88, ~v~0.base, ~v~0.offset, 1); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1222] 2 #res.base, #res.offset := 0, 0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1235] 0 call write~int(2, ~#t3~0.base, ~#t3~0.offset, 4); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1235] FORK 0 fork 2 thread3(0, 0); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1219-L1223] 2 ensures true; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1235] 0 havoc #t~nondet4; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1224-L1228] 3 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1236] 0 call write~int(3, ~#t4~0.base, ~#t4~0.offset, 4); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1236] FORK 0 fork 3 thread2(0, 0); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1236] 0 havoc #t~nondet5; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1237] 0 call write~int(4, ~#t5~0.base, ~#t5~0.offset, 4); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1237] FORK 0 fork 4 thread2(0, 0); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1219-L1223] 4 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1221] 4 call write~int(88, ~v~0.base, ~v~0.offset, 1); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1222] 4 #res.base, #res.offset := 0, 0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1237] 0 havoc #t~nondet6; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1238] 0 call #t~mem7 := read~int(~#t2~0.base, ~#t2~0.offset, 4); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, #t~mem7=1, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1238] JOIN 2 join #t~mem7; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, #t~mem7=1, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1238] 0 havoc #t~mem7; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1239] 0 call #t~mem8 := read~int(~#t3~0.base, ~#t3~0.offset, 4); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, #t~mem8=2, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1219-L1223] 4 ensures true; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, #t~mem8=2, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1219-L1223] 5 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, #t~mem8=2, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1221] 5 call write~int(88, ~v~0.base, ~v~0.offset, 1); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, #t~mem8=2, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1222] 5 #res.base, #res.offset := 0, 0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, #t~mem8=2, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1219-L1223] 5 ensures true; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, #t~mem8=2, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1226] 3 call write~int(89, ~v~0.base, ~v~0.offset, 1); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, #t~mem8=2, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1227] 3 #res.base, #res.offset := 0, 0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, #t~mem8=2, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1224-L1228] 3 ensures true; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, #t~mem8=2, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1239] JOIN 3 join #t~mem8; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, #t~mem8=2, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1239] 0 havoc #t~mem8; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1240] 0 call #t~mem9 := read~int(~#t4~0.base, ~#t4~0.offset, 4); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, #t~mem9=3, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1240] JOIN 5 join #t~mem9; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, #t~mem9=3, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1240] 0 havoc #t~mem9; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1241] 0 call #t~mem10 := read~int(~#t5~0.base, ~#t5~0.offset, 4); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, #t~mem10=4, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1241] JOIN 4 join #t~mem10; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, #t~mem10=4, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1241] 0 havoc #t~mem10; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1242] 0 #res.base, #res.offset := 0, 0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1231] 0 call ULTIMATE.dealloc(~#t1~0.base, ~#t1~0.offset); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1242] 0 havoc ~#t1~0.base, ~#t1~0.offset; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1231] 0 call ULTIMATE.dealloc(~#t2~0.base, ~#t2~0.offset); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1242] 0 havoc ~#t2~0.base, ~#t2~0.offset; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1231] 0 call ULTIMATE.dealloc(~#t3~0.base, ~#t3~0.offset); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1242] 0 havoc ~#t3~0.base, ~#t3~0.offset; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1231] 0 call ULTIMATE.dealloc(~#t4~0.base, ~#t4~0.offset); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1242] 0 havoc ~#t4~0.base, ~#t4~0.offset; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1231] 0 call ULTIMATE.dealloc(~#t5~0.base, ~#t5~0.offset); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1242] 0 havoc ~#t5~0.base, ~#t5~0.offset; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1229-L1243] 0 ensures true; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1248] JOIN 0 join main_#t~mem12; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1248] -1 havoc main_#t~mem12; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_~#t~0.base=94, main_~#t~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1249] -1 call main_#t~mem13 := read~int(~v~0.base, ~v~0.offset, 1); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_#t~mem13=89, main_~#t~0.base=94, main_~#t~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1249] -1 __VERIFIER_assert_#in~expression := (if 88 == main_#t~mem13 then 1 else 0); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, __VERIFIER_assert_#in~expression=0, main_#t~mem13=89, main_~#t~0.base=94, main_~#t~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1249] -1 havoc __VERIFIER_assert_~expression; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, __VERIFIER_assert_#in~expression=0, main_#t~mem13=89, main_~#t~0.base=94, main_~#t~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1212] -1 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=0, main_#t~mem13=89, main_~#t~0.base=94, main_~#t~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1212] -1 assume 0 == __VERIFIER_assert_~expression; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=0, main_#t~mem13=89, main_~#t~0.base=94, main_~#t~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1212] -1 assert false; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=0, main_#t~mem13=89, main_~#t~0.base=94, main_~#t~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] ----- ----- class de.uni_freiburg.informatik.ultimate.boogie.preprocessor.BoogiePreprocessorBacktranslator [?] -1 #NULL.base, #NULL.offset := 0, 0; VAL [#NULL.base=0, #NULL.offset=0] [?] -1 #valid := #valid[0 := 0]; VAL [#NULL.base=0, #NULL.offset=0] [L1213] -1 ~v~0.base, ~v~0.offset := 0, 0; VAL [#NULL.base=0, #NULL.offset=0, ~v~0.base=0, ~v~0.offset=0] [?] -1 havoc main_#res; VAL [#NULL.base=0, #NULL.offset=0, ~v~0.base=0, ~v~0.offset=0] [?] -1 havoc main_#t~nondet11, main_#t~mem12, main_#t~mem13, main_~#t~0.base, main_~#t~0.offset; VAL [#NULL.base=0, #NULL.offset=0, ~v~0.base=0, ~v~0.offset=0] [L1246] -1 call main_~#t~0.base, main_~#t~0.offset := #Ultimate.alloc(4); VAL [#NULL.base=0, #NULL.offset=0, main_~#t~0.base=94, main_~#t~0.offset=0, ~v~0.base=0, ~v~0.offset=0] [L1247] -1 call write~int(5, main_~#t~0.base, main_~#t~0.offset, 4); VAL [#NULL.base=0, #NULL.offset=0, main_~#t~0.base=94, main_~#t~0.offset=0, ~v~0.base=0, ~v~0.offset=0] [L1247] FORK -1 fork 5 thread0(0, 0); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t~0.base=94, main_~#t~0.offset=0, ~v~0.base=0, ~v~0.offset=0] [L1229-L1243] 0 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset; VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t~0.base=94, main_~#t~0.offset=0, ~arg.base=0, ~arg.offset=0, ~v~0.base=0, ~v~0.offset=0] [L1247] -1 havoc main_#t~nondet11; VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t~0.base=94, main_~#t~0.offset=0, ~arg.base=0, ~arg.offset=0, ~v~0.base=0, ~v~0.offset=0] [L1231] 0 call ~#t1~0.base, ~#t1~0.offset := #Ultimate.alloc(4); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~arg.base=0, ~arg.offset=0, ~v~0.base=0, ~v~0.offset=0] [L1231] 0 call ~#t2~0.base, ~#t2~0.offset := #Ultimate.alloc(4); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~arg.base=0, ~arg.offset=0, ~v~0.base=0, ~v~0.offset=0] [L1231] 0 call ~#t3~0.base, ~#t3~0.offset := #Ultimate.alloc(4); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~arg.base=0, ~arg.offset=0, ~v~0.base=0, ~v~0.offset=0] [L1231] 0 call ~#t4~0.base, ~#t4~0.offset := #Ultimate.alloc(4); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~arg.base=0, ~arg.offset=0, ~v~0.base=0, ~v~0.offset=0] [L1231] 0 call ~#t5~0.base, ~#t5~0.offset := #Ultimate.alloc(4); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.offset=0, ~v~0.base=0, ~v~0.offset=0] [L1232] 0 call write~int(0, ~#t1~0.base, ~#t1~0.offset, 4); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.offset=0, ~v~0.base=0, ~v~0.offset=0] [L1232] FORK 0 fork 0 thread1(0, 0); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.offset=0, ~v~0.base=0, ~v~0.offset=0] [L1214-L1218] 1 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=0, ~v~0.offset=0] [L1216] 1 call #t~malloc0.base, #t~malloc0.offset := #Ultimate.alloc(1); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=0, ~v~0.offset=0] [L1216] 1 ~v~0.base, ~v~0.offset := #t~malloc0.base, #t~malloc0.offset; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1217] 1 #res.base, #res.offset := 0, 0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1214-L1218] 1 ensures true; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1248] -1 call main_#t~mem12 := read~int(main_~#t~0.base, main_~#t~0.offset, 4); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1232] 0 havoc #t~nondet1; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1233] 0 call #t~mem2 := read~int(~#t1~0.base, ~#t1~0.offset, 4); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, #t~mem2=0, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1233] JOIN 1 join #t~mem2; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, #t~mem2=0, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1233] 0 havoc #t~mem2; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1234] 0 call write~int(1, ~#t2~0.base, ~#t2~0.offset, 4); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1234] FORK 0 fork 1 thread2(0, 0); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1219-L1223] 2 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1234] 0 havoc #t~nondet3; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1221] 2 call write~int(88, ~v~0.base, ~v~0.offset, 1); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1222] 2 #res.base, #res.offset := 0, 0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1235] 0 call write~int(2, ~#t3~0.base, ~#t3~0.offset, 4); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1235] FORK 0 fork 2 thread3(0, 0); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1219-L1223] 2 ensures true; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1235] 0 havoc #t~nondet4; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1224-L1228] 3 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1236] 0 call write~int(3, ~#t4~0.base, ~#t4~0.offset, 4); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1236] FORK 0 fork 3 thread2(0, 0); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1236] 0 havoc #t~nondet5; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1237] 0 call write~int(4, ~#t5~0.base, ~#t5~0.offset, 4); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1237] FORK 0 fork 4 thread2(0, 0); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1219-L1223] 4 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1221] 4 call write~int(88, ~v~0.base, ~v~0.offset, 1); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1222] 4 #res.base, #res.offset := 0, 0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1237] 0 havoc #t~nondet6; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1238] 0 call #t~mem7 := read~int(~#t2~0.base, ~#t2~0.offset, 4); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, #t~mem7=1, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1238] JOIN 2 join #t~mem7; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, #t~mem7=1, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1238] 0 havoc #t~mem7; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1239] 0 call #t~mem8 := read~int(~#t3~0.base, ~#t3~0.offset, 4); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, #t~mem8=2, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1219-L1223] 4 ensures true; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, #t~mem8=2, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1219-L1223] 5 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, #t~mem8=2, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1221] 5 call write~int(88, ~v~0.base, ~v~0.offset, 1); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, #t~mem8=2, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1222] 5 #res.base, #res.offset := 0, 0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, #t~mem8=2, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1219-L1223] 5 ensures true; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, #t~mem8=2, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1226] 3 call write~int(89, ~v~0.base, ~v~0.offset, 1); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, #t~mem8=2, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1227] 3 #res.base, #res.offset := 0, 0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, #t~mem8=2, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1224-L1228] 3 ensures true; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, #t~mem8=2, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1239] JOIN 3 join #t~mem8; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, #t~mem8=2, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1239] 0 havoc #t~mem8; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1240] 0 call #t~mem9 := read~int(~#t4~0.base, ~#t4~0.offset, 4); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, #t~mem9=3, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1240] JOIN 5 join #t~mem9; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, #t~mem9=3, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1240] 0 havoc #t~mem9; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1241] 0 call #t~mem10 := read~int(~#t5~0.base, ~#t5~0.offset, 4); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, #t~mem10=4, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1241] JOIN 4 join #t~mem10; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, #t~mem10=4, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1241] 0 havoc #t~mem10; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1242] 0 #res.base, #res.offset := 0, 0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1231] 0 call ULTIMATE.dealloc(~#t1~0.base, ~#t1~0.offset); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t1~0.base=96, ~#t1~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1242] 0 havoc ~#t1~0.base, ~#t1~0.offset; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1231] 0 call ULTIMATE.dealloc(~#t2~0.base, ~#t2~0.offset); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t2~0.base=93, ~#t2~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1242] 0 havoc ~#t2~0.base, ~#t2~0.offset; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1231] 0 call ULTIMATE.dealloc(~#t3~0.base, ~#t3~0.offset); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t3~0.base=90, ~#t3~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1242] 0 havoc ~#t3~0.base, ~#t3~0.offset; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1231] 0 call ULTIMATE.dealloc(~#t4~0.base, ~#t4~0.offset); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t4~0.base=91, ~#t4~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1242] 0 havoc ~#t4~0.base, ~#t4~0.offset; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1231] 0 call ULTIMATE.dealloc(~#t5~0.base, ~#t5~0.offset); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~#t5~0.base=95, ~#t5~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1242] 0 havoc ~#t5~0.base, ~#t5~0.offset; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1229-L1243] 0 ensures true; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1248] JOIN 0 join main_#t~mem12; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_#t~mem12=5, main_~#t~0.base=94, main_~#t~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1248] -1 havoc main_#t~mem12; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_~#t~0.base=94, main_~#t~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1249] -1 call main_#t~mem13 := read~int(~v~0.base, ~v~0.offset, 1); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, main_#t~mem13=89, main_~#t~0.base=94, main_~#t~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1249] -1 __VERIFIER_assert_#in~expression := (if 88 == main_#t~mem13 then 1 else 0); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, __VERIFIER_assert_#in~expression=0, main_#t~mem13=89, main_~#t~0.base=94, main_~#t~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1249] -1 havoc __VERIFIER_assert_~expression; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, __VERIFIER_assert_#in~expression=0, main_#t~mem13=89, main_~#t~0.base=94, main_~#t~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1212] -1 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=0, main_#t~mem13=89, main_~#t~0.base=94, main_~#t~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1212] -1 assume 0 == __VERIFIER_assert_~expression; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=0, main_#t~mem13=89, main_~#t~0.base=94, main_~#t~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [L1212] -1 assert false; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #res.base=0, #res.base=0, #res.base=0, #res.base=0, #res.offset=0, #res.offset=0, #res.offset=0, #res.offset=0, #t~malloc0.base=92, #t~malloc0.offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=0, main_#t~mem13=89, main_~#t~0.base=94, main_~#t~0.offset=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~v~0.base=92, ~v~0.offset=0] [?] -1 #NULL := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0] [?] -1 #valid[0] := 0; VAL [#NULL!base=0, #NULL!offset=0] [L1213] -1 ~v~0 := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0, ~v~0!base=0, ~v~0!offset=0] [?] -1 havoc main_#res; VAL [#NULL!base=0, #NULL!offset=0, ~v~0!base=0, ~v~0!offset=0] [?] -1 havoc main_#t~nondet11, main_#t~mem12, main_#t~mem13, main_~#t~0; VAL [#NULL!base=0, #NULL!offset=0, ~v~0!base=0, ~v~0!offset=0] [L1246] FCALL -1 call main_~#t~0 := #Ultimate.alloc(4); VAL [#NULL!base=0, #NULL!offset=0, main_~#t~0!base=94, main_~#t~0!offset=0, ~v~0!base=0, ~v~0!offset=0] [L1247] FCALL -1 call write~int(5, main_~#t~0, 4); VAL [#NULL!base=0, #NULL!offset=0, main_~#t~0!base=94, main_~#t~0!offset=0, ~v~0!base=0, ~v~0!offset=0] [L1247] FORK -1 fork 5 thread0({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t~0!base=94, main_~#t~0!offset=0, ~v~0!base=0, ~v~0!offset=0] [L1229-L1243] 0 ~arg := #in~arg; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t~0!base=94, main_~#t~0!offset=0, ~arg!base=0, ~arg!offset=0, ~v~0!base=0, ~v~0!offset=0] [L1247] -1 havoc main_#t~nondet11; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t~0!base=94, main_~#t~0!offset=0, ~arg!base=0, ~arg!offset=0, ~v~0!base=0, ~v~0!offset=0] [L1231] FCALL 0 call ~#t1~0 := #Ultimate.alloc(4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~arg!base=0, ~arg!offset=0, ~v~0!base=0, ~v~0!offset=0] [L1231] FCALL 0 call ~#t2~0 := #Ultimate.alloc(4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~arg!base=0, ~arg!offset=0, ~v~0!base=0, ~v~0!offset=0] [L1231] FCALL 0 call ~#t3~0 := #Ultimate.alloc(4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~arg!base=0, ~arg!offset=0, ~v~0!base=0, ~v~0!offset=0] [L1231] FCALL 0 call ~#t4~0 := #Ultimate.alloc(4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~arg!base=0, ~arg!offset=0, ~v~0!base=0, ~v~0!offset=0] [L1231] FCALL 0 call ~#t5~0 := #Ultimate.alloc(4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!offset=0, ~v~0!base=0, ~v~0!offset=0] [L1232] FCALL 0 call write~int(0, ~#t1~0, 4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!offset=0, ~v~0!base=0, ~v~0!offset=0] [L1232] FORK 0 fork 0 thread1({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!offset=0, ~v~0!base=0, ~v~0!offset=0] [L1214-L1218] 1 ~arg := #in~arg; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=0, ~v~0!offset=0] [L1216] FCALL 1 call #t~malloc0 := #Ultimate.alloc(1); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=0, ~v~0!offset=0] [L1216] 1 ~v~0 := #t~malloc0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1217] 1 #res := { base: 0, offset: 0 }; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1248] FCALL -1 call main_#t~mem12 := read~int(main_~#t~0, 4); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1232] 0 havoc #t~nondet1; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1233] FCALL 0 call #t~mem2 := read~int(~#t1~0, 4); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, #t~mem2=0, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1233] JOIN 1 join #t~mem2; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, #t~mem2=0, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1233] 0 havoc #t~mem2; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1234] FCALL 0 call write~int(1, ~#t2~0, 4); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1234] FORK 0 fork 1 thread2({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1219-L1223] 2 ~arg := #in~arg; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1234] 0 havoc #t~nondet3; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1221] FCALL 2 call write~int(88, { base: ~v~0!base, offset: ~v~0!offset }, 1); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1222] 2 #res := { base: 0, offset: 0 }; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1235] FCALL 0 call write~int(2, ~#t3~0, 4); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1235] FORK 0 fork 2 thread3({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1235] 0 havoc #t~nondet4; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1224-L1228] 3 ~arg := #in~arg; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1236] FCALL 0 call write~int(3, ~#t4~0, 4); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1236] FORK 0 fork 3 thread2({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1236] 0 havoc #t~nondet5; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1237] FCALL 0 call write~int(4, ~#t5~0, 4); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1237] FORK 0 fork 4 thread2({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1219-L1223] 4 ~arg := #in~arg; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1221] FCALL 4 call write~int(88, { base: ~v~0!base, offset: ~v~0!offset }, 1); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1222] 4 #res := { base: 0, offset: 0 }; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1237] 0 havoc #t~nondet6; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1238] FCALL 0 call #t~mem7 := read~int(~#t2~0, 4); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, #t~mem7=1, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1238] JOIN 2 join #t~mem7; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, #t~mem7=1, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1238] 0 havoc #t~mem7; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1239] FCALL 0 call #t~mem8 := read~int(~#t3~0, 4); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, #t~mem8=2, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1219-L1223] 5 ~arg := #in~arg; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, #t~mem8=2, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1221] FCALL 5 call write~int(88, { base: ~v~0!base, offset: ~v~0!offset }, 1); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, #t~mem8=2, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1222] 5 #res := { base: 0, offset: 0 }; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, #t~mem8=2, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1226] FCALL 3 call write~int(89, { base: ~v~0!base, offset: ~v~0!offset }, 1); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, #t~mem8=2, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1227] 3 #res := { base: 0, offset: 0 }; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, #t~mem8=2, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1239] JOIN 3 join #t~mem8; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, #t~mem8=2, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1239] 0 havoc #t~mem8; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1240] FCALL 0 call #t~mem9 := read~int(~#t4~0, 4); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, #t~mem9=3, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1240] JOIN 5 join #t~mem9; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, #t~mem9=3, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1240] 0 havoc #t~mem9; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1241] FCALL 0 call #t~mem10 := read~int(~#t5~0, 4); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, #t~mem10=4, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1241] JOIN 4 join #t~mem10; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, #t~mem10=4, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1241] 0 havoc #t~mem10; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1242] 0 #res := { base: 0, offset: 0 }; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1231] FCALL 0 call ULTIMATE.dealloc(~#t1~0); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1242] 0 havoc ~#t1~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1231] FCALL 0 call ULTIMATE.dealloc(~#t2~0); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1242] 0 havoc ~#t2~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1231] FCALL 0 call ULTIMATE.dealloc(~#t3~0); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1242] 0 havoc ~#t3~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1231] FCALL 0 call ULTIMATE.dealloc(~#t4~0); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1242] 0 havoc ~#t4~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1231] FCALL 0 call ULTIMATE.dealloc(~#t5~0); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1242] 0 havoc ~#t5~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1248] JOIN 0 join main_#t~mem12; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1248] -1 havoc main_#t~mem12; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, main_~#t~0!base=94, main_~#t~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1249] FCALL -1 call main_#t~mem13 := read~int({ base: ~v~0!base, offset: ~v~0!offset }, 1); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, main_#t~mem13=89, main_~#t~0!base=94, main_~#t~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1249] -1 __VERIFIER_assert_#in~expression := (if 88 == main_#t~mem13 then 1 else 0); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, __VERIFIER_assert_#in~expression=0, main_#t~mem13=89, main_~#t~0!base=94, main_~#t~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1249] -1 havoc __VERIFIER_assert_~expression; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, __VERIFIER_assert_#in~expression=0, main_#t~mem13=89, main_~#t~0!base=94, main_~#t~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1212] -1 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=0, main_#t~mem13=89, main_~#t~0!base=94, main_~#t~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1212] COND TRUE -1 0 == __VERIFIER_assert_~expression VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=0, main_#t~mem13=89, main_~#t~0!base=94, main_~#t~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1212] -1 assert false; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=0, main_#t~mem13=89, main_~#t~0!base=94, main_~#t~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] ----- ----- class de.uni_freiburg.informatik.ultimate.boogie.procedureinliner.backtranslation.InlinerBacktranslator [?] -1 #NULL := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0] [?] -1 #valid[0] := 0; VAL [#NULL!base=0, #NULL!offset=0] [L1213] -1 ~v~0 := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0, ~v~0!base=0, ~v~0!offset=0] [?] -1 havoc main_#res; VAL [#NULL!base=0, #NULL!offset=0, ~v~0!base=0, ~v~0!offset=0] [?] -1 havoc main_#t~nondet11, main_#t~mem12, main_#t~mem13, main_~#t~0; VAL [#NULL!base=0, #NULL!offset=0, ~v~0!base=0, ~v~0!offset=0] [L1246] FCALL -1 call main_~#t~0 := #Ultimate.alloc(4); VAL [#NULL!base=0, #NULL!offset=0, main_~#t~0!base=94, main_~#t~0!offset=0, ~v~0!base=0, ~v~0!offset=0] [L1247] FCALL -1 call write~int(5, main_~#t~0, 4); VAL [#NULL!base=0, #NULL!offset=0, main_~#t~0!base=94, main_~#t~0!offset=0, ~v~0!base=0, ~v~0!offset=0] [L1247] FORK -1 fork 5 thread0({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t~0!base=94, main_~#t~0!offset=0, ~v~0!base=0, ~v~0!offset=0] [L1229-L1243] 0 ~arg := #in~arg; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t~0!base=94, main_~#t~0!offset=0, ~arg!base=0, ~arg!offset=0, ~v~0!base=0, ~v~0!offset=0] [L1247] -1 havoc main_#t~nondet11; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t~0!base=94, main_~#t~0!offset=0, ~arg!base=0, ~arg!offset=0, ~v~0!base=0, ~v~0!offset=0] [L1231] FCALL 0 call ~#t1~0 := #Ultimate.alloc(4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~arg!base=0, ~arg!offset=0, ~v~0!base=0, ~v~0!offset=0] [L1231] FCALL 0 call ~#t2~0 := #Ultimate.alloc(4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~arg!base=0, ~arg!offset=0, ~v~0!base=0, ~v~0!offset=0] [L1231] FCALL 0 call ~#t3~0 := #Ultimate.alloc(4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~arg!base=0, ~arg!offset=0, ~v~0!base=0, ~v~0!offset=0] [L1231] FCALL 0 call ~#t4~0 := #Ultimate.alloc(4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~arg!base=0, ~arg!offset=0, ~v~0!base=0, ~v~0!offset=0] [L1231] FCALL 0 call ~#t5~0 := #Ultimate.alloc(4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!offset=0, ~v~0!base=0, ~v~0!offset=0] [L1232] FCALL 0 call write~int(0, ~#t1~0, 4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!offset=0, ~v~0!base=0, ~v~0!offset=0] [L1232] FORK 0 fork 0 thread1({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!offset=0, ~v~0!base=0, ~v~0!offset=0] [L1214-L1218] 1 ~arg := #in~arg; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=0, ~v~0!offset=0] [L1216] FCALL 1 call #t~malloc0 := #Ultimate.alloc(1); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=0, ~v~0!offset=0] [L1216] 1 ~v~0 := #t~malloc0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1217] 1 #res := { base: 0, offset: 0 }; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1248] FCALL -1 call main_#t~mem12 := read~int(main_~#t~0, 4); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1232] 0 havoc #t~nondet1; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1233] FCALL 0 call #t~mem2 := read~int(~#t1~0, 4); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, #t~mem2=0, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1233] JOIN 1 join #t~mem2; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, #t~mem2=0, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1233] 0 havoc #t~mem2; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1234] FCALL 0 call write~int(1, ~#t2~0, 4); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1234] FORK 0 fork 1 thread2({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1219-L1223] 2 ~arg := #in~arg; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1234] 0 havoc #t~nondet3; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1221] FCALL 2 call write~int(88, { base: ~v~0!base, offset: ~v~0!offset }, 1); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1222] 2 #res := { base: 0, offset: 0 }; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1235] FCALL 0 call write~int(2, ~#t3~0, 4); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1235] FORK 0 fork 2 thread3({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1235] 0 havoc #t~nondet4; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1224-L1228] 3 ~arg := #in~arg; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1236] FCALL 0 call write~int(3, ~#t4~0, 4); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1236] FORK 0 fork 3 thread2({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1236] 0 havoc #t~nondet5; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1237] FCALL 0 call write~int(4, ~#t5~0, 4); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1237] FORK 0 fork 4 thread2({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1219-L1223] 4 ~arg := #in~arg; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1221] FCALL 4 call write~int(88, { base: ~v~0!base, offset: ~v~0!offset }, 1); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1222] 4 #res := { base: 0, offset: 0 }; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1237] 0 havoc #t~nondet6; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1238] FCALL 0 call #t~mem7 := read~int(~#t2~0, 4); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, #t~mem7=1, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1238] JOIN 2 join #t~mem7; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, #t~mem7=1, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1238] 0 havoc #t~mem7; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1239] FCALL 0 call #t~mem8 := read~int(~#t3~0, 4); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, #t~mem8=2, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1219-L1223] 5 ~arg := #in~arg; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, #t~mem8=2, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1221] FCALL 5 call write~int(88, { base: ~v~0!base, offset: ~v~0!offset }, 1); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, #t~mem8=2, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1222] 5 #res := { base: 0, offset: 0 }; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, #t~mem8=2, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1226] FCALL 3 call write~int(89, { base: ~v~0!base, offset: ~v~0!offset }, 1); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, #t~mem8=2, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1227] 3 #res := { base: 0, offset: 0 }; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, #t~mem8=2, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1239] JOIN 3 join #t~mem8; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, #t~mem8=2, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1239] 0 havoc #t~mem8; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1240] FCALL 0 call #t~mem9 := read~int(~#t4~0, 4); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, #t~mem9=3, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1240] JOIN 5 join #t~mem9; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, #t~mem9=3, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1240] 0 havoc #t~mem9; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1241] FCALL 0 call #t~mem10 := read~int(~#t5~0, 4); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, #t~mem10=4, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1241] JOIN 4 join #t~mem10; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, #t~mem10=4, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1241] 0 havoc #t~mem10; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1242] 0 #res := { base: 0, offset: 0 }; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1231] FCALL 0 call ULTIMATE.dealloc(~#t1~0); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1242] 0 havoc ~#t1~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1231] FCALL 0 call ULTIMATE.dealloc(~#t2~0); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1242] 0 havoc ~#t2~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1231] FCALL 0 call ULTIMATE.dealloc(~#t3~0); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1242] 0 havoc ~#t3~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1231] FCALL 0 call ULTIMATE.dealloc(~#t4~0); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1242] 0 havoc ~#t4~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1231] FCALL 0 call ULTIMATE.dealloc(~#t5~0); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1242] 0 havoc ~#t5~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1248] JOIN 0 join main_#t~mem12; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, main_#t~mem12=5, main_~#t~0!base=94, main_~#t~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1248] -1 havoc main_#t~mem12; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, main_~#t~0!base=94, main_~#t~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1249] FCALL -1 call main_#t~mem13 := read~int({ base: ~v~0!base, offset: ~v~0!offset }, 1); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, main_#t~mem13=89, main_~#t~0!base=94, main_~#t~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1249] -1 __VERIFIER_assert_#in~expression := (if 88 == main_#t~mem13 then 1 else 0); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, __VERIFIER_assert_#in~expression=0, main_#t~mem13=89, main_~#t~0!base=94, main_~#t~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1249] -1 havoc __VERIFIER_assert_~expression; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, __VERIFIER_assert_#in~expression=0, main_#t~mem13=89, main_~#t~0!base=94, main_~#t~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1212] -1 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=0, main_#t~mem13=89, main_~#t~0!base=94, main_~#t~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1212] COND TRUE -1 0 == __VERIFIER_assert_~expression VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=0, main_#t~mem13=89, main_~#t~0!base=94, main_~#t~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1212] -1 assert false; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_~expression=0, main_#t~mem13=89, main_~#t~0!base=94, main_~#t~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [?] -1 #NULL := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0] [?] -1 #valid[0] := 0; VAL [#NULL!base=0, #NULL!offset=0] [L1213] -1 ~v~0 := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0, ~v~0!base=0, ~v~0!offset=0] [L1246] FCALL -1 call ~#t~0 := #Ultimate.alloc(4); VAL [#NULL!base=0, #NULL!offset=0, ~v~0!base=0, ~v~0!offset=0] [L1247] FCALL -1 call write~int(5, ~#t~0, 4); VAL [#NULL!base=0, #NULL!offset=0, ~v~0!base=0, ~v~0!offset=0] [L1247] FORK -1 fork 5 thread0({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~v~0!base=0, ~v~0!offset=0] [L1229-L1243] 0 ~arg := #in~arg; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~arg!base=0, ~arg!offset=0, ~v~0!base=0, ~v~0!offset=0] [L1247] -1 havoc #t~nondet11; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~arg!base=0, ~arg!offset=0, ~v~0!base=0, ~v~0!offset=0] [L1231] FCALL 0 call ~#t1~0 := #Ultimate.alloc(4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~arg!base=0, ~arg!offset=0, ~v~0!base=0, ~v~0!offset=0] [L1231] FCALL 0 call ~#t2~0 := #Ultimate.alloc(4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~arg!base=0, ~arg!offset=0, ~v~0!base=0, ~v~0!offset=0] [L1231] FCALL 0 call ~#t3~0 := #Ultimate.alloc(4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~arg!base=0, ~arg!offset=0, ~v~0!base=0, ~v~0!offset=0] [L1231] FCALL 0 call ~#t4~0 := #Ultimate.alloc(4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~arg!base=0, ~arg!offset=0, ~v~0!base=0, ~v~0!offset=0] [L1231] FCALL 0 call ~#t5~0 := #Ultimate.alloc(4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!offset=0, ~v~0!base=0, ~v~0!offset=0] [L1232] FCALL 0 call write~int(0, ~#t1~0, 4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!offset=0, ~v~0!base=0, ~v~0!offset=0] [L1232] FORK 0 fork 0 thread1({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!offset=0, ~v~0!base=0, ~v~0!offset=0] [L1214-L1218] 1 ~arg := #in~arg; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=0, ~v~0!offset=0] [L1216] FCALL 1 call #t~malloc0 := #Ultimate.alloc(1); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=0, ~v~0!offset=0] [L1216] 1 ~v~0 := #t~malloc0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1217] 1 #res := { base: 0, offset: 0 }; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1248] FCALL -1 call #t~mem12 := read~int(~#t~0, 4); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1232] 0 havoc #t~nondet1; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1233] FCALL 0 call #t~mem2 := read~int(~#t1~0, 4); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, #t~mem2=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1233] JOIN 1 join #t~mem2; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, #t~mem2=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1233] 0 havoc #t~mem2; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1234] FCALL 0 call write~int(1, ~#t2~0, 4); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1234] FORK 0 fork 1 thread2({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1219-L1223] 2 ~arg := #in~arg; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1234] 0 havoc #t~nondet3; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1221] FCALL 2 call write~int(88, { base: ~v~0!base, offset: ~v~0!offset }, 1); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1222] 2 #res := { base: 0, offset: 0 }; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1235] FCALL 0 call write~int(2, ~#t3~0, 4); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1235] FORK 0 fork 2 thread3({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1235] 0 havoc #t~nondet4; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1224-L1228] 3 ~arg := #in~arg; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1236] FCALL 0 call write~int(3, ~#t4~0, 4); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1236] FORK 0 fork 3 thread2({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1236] 0 havoc #t~nondet5; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1237] FCALL 0 call write~int(4, ~#t5~0, 4); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1237] FORK 0 fork 4 thread2({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1219-L1223] 4 ~arg := #in~arg; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1221] FCALL 4 call write~int(88, { base: ~v~0!base, offset: ~v~0!offset }, 1); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1222] 4 #res := { base: 0, offset: 0 }; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1237] 0 havoc #t~nondet6; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1238] FCALL 0 call #t~mem7 := read~int(~#t2~0, 4); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, #t~mem7=1, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1238] JOIN 2 join #t~mem7; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, #t~mem7=1, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1238] 0 havoc #t~mem7; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1239] FCALL 0 call #t~mem8 := read~int(~#t3~0, 4); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, #t~mem8=2, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1219-L1223] 5 ~arg := #in~arg; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, #t~mem8=2, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1221] FCALL 5 call write~int(88, { base: ~v~0!base, offset: ~v~0!offset }, 1); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, #t~mem8=2, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1222] 5 #res := { base: 0, offset: 0 }; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, #t~mem8=2, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1226] FCALL 3 call write~int(89, { base: ~v~0!base, offset: ~v~0!offset }, 1); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, #t~mem8=2, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1227] 3 #res := { base: 0, offset: 0 }; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, #t~mem8=2, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1239] JOIN 3 join #t~mem8; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, #t~mem8=2, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1239] 0 havoc #t~mem8; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1240] FCALL 0 call #t~mem9 := read~int(~#t4~0, 4); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, #t~mem9=3, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1240] JOIN 5 join #t~mem9; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, #t~mem9=3, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1240] 0 havoc #t~mem9; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1241] FCALL 0 call #t~mem10 := read~int(~#t5~0, 4); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, #t~mem10=4, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1241] JOIN 4 join #t~mem10; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, #t~mem10=4, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1241] 0 havoc #t~mem10; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1242] 0 #res := { base: 0, offset: 0 }; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1231] FCALL 0 call ULTIMATE.dealloc(~#t1~0); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1242] 0 havoc ~#t1~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1231] FCALL 0 call ULTIMATE.dealloc(~#t2~0); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1242] 0 havoc ~#t2~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1231] FCALL 0 call ULTIMATE.dealloc(~#t3~0); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1242] 0 havoc ~#t3~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1231] FCALL 0 call ULTIMATE.dealloc(~#t4~0); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1242] 0 havoc ~#t4~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1231] FCALL 0 call ULTIMATE.dealloc(~#t5~0); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1242] 0 havoc ~#t5~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1248] JOIN 0 join #t~mem12; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1248] -1 havoc #t~mem12; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1249] FCALL -1 call #t~mem13 := read~int({ base: ~v~0!base, offset: ~v~0!offset }, 1); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1212] -1 ~expression := #in~expression; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1212] COND TRUE -1 0 == ~expression VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1212] -1 assert false; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] ----- ----- class de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.CACSL2BoogieBacktranslator [?] -1 #NULL := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0] [?] -1 #valid[0] := 0; VAL [#NULL!base=0, #NULL!offset=0] [L1213] -1 ~v~0 := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0, ~v~0!base=0, ~v~0!offset=0] [L1246] FCALL -1 call ~#t~0 := #Ultimate.alloc(4); VAL [#NULL!base=0, #NULL!offset=0, ~v~0!base=0, ~v~0!offset=0] [L1247] FCALL -1 call write~int(5, ~#t~0, 4); VAL [#NULL!base=0, #NULL!offset=0, ~v~0!base=0, ~v~0!offset=0] [L1247] FORK -1 fork 5 thread0({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~v~0!base=0, ~v~0!offset=0] [L1229-L1243] 0 ~arg := #in~arg; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~arg!base=0, ~arg!offset=0, ~v~0!base=0, ~v~0!offset=0] [L1247] -1 havoc #t~nondet11; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~arg!base=0, ~arg!offset=0, ~v~0!base=0, ~v~0!offset=0] [L1231] FCALL 0 call ~#t1~0 := #Ultimate.alloc(4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~arg!base=0, ~arg!offset=0, ~v~0!base=0, ~v~0!offset=0] [L1231] FCALL 0 call ~#t2~0 := #Ultimate.alloc(4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~arg!base=0, ~arg!offset=0, ~v~0!base=0, ~v~0!offset=0] [L1231] FCALL 0 call ~#t3~0 := #Ultimate.alloc(4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~arg!base=0, ~arg!offset=0, ~v~0!base=0, ~v~0!offset=0] [L1231] FCALL 0 call ~#t4~0 := #Ultimate.alloc(4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~arg!base=0, ~arg!offset=0, ~v~0!base=0, ~v~0!offset=0] [L1231] FCALL 0 call ~#t5~0 := #Ultimate.alloc(4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!offset=0, ~v~0!base=0, ~v~0!offset=0] [L1232] FCALL 0 call write~int(0, ~#t1~0, 4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!offset=0, ~v~0!base=0, ~v~0!offset=0] [L1232] FORK 0 fork 0 thread1({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!offset=0, ~v~0!base=0, ~v~0!offset=0] [L1214-L1218] 1 ~arg := #in~arg; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=0, ~v~0!offset=0] [L1216] FCALL 1 call #t~malloc0 := #Ultimate.alloc(1); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=0, ~v~0!offset=0] [L1216] 1 ~v~0 := #t~malloc0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1217] 1 #res := { base: 0, offset: 0 }; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1248] FCALL -1 call #t~mem12 := read~int(~#t~0, 4); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1232] 0 havoc #t~nondet1; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1233] FCALL 0 call #t~mem2 := read~int(~#t1~0, 4); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, #t~mem2=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1233] JOIN 1 join #t~mem2; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, #t~mem2=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1233] 0 havoc #t~mem2; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1234] FCALL 0 call write~int(1, ~#t2~0, 4); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1234] FORK 0 fork 1 thread2({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1219-L1223] 2 ~arg := #in~arg; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1234] 0 havoc #t~nondet3; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1221] FCALL 2 call write~int(88, { base: ~v~0!base, offset: ~v~0!offset }, 1); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1222] 2 #res := { base: 0, offset: 0 }; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1235] FCALL 0 call write~int(2, ~#t3~0, 4); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1235] FORK 0 fork 2 thread3({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1235] 0 havoc #t~nondet4; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1224-L1228] 3 ~arg := #in~arg; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1236] FCALL 0 call write~int(3, ~#t4~0, 4); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1236] FORK 0 fork 3 thread2({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1236] 0 havoc #t~nondet5; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1237] FCALL 0 call write~int(4, ~#t5~0, 4); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1237] FORK 0 fork 4 thread2({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1219-L1223] 4 ~arg := #in~arg; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1221] FCALL 4 call write~int(88, { base: ~v~0!base, offset: ~v~0!offset }, 1); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1222] 4 #res := { base: 0, offset: 0 }; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1237] 0 havoc #t~nondet6; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1238] FCALL 0 call #t~mem7 := read~int(~#t2~0, 4); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, #t~mem7=1, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1238] JOIN 2 join #t~mem7; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, #t~mem7=1, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1238] 0 havoc #t~mem7; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1239] FCALL 0 call #t~mem8 := read~int(~#t3~0, 4); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, #t~mem8=2, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1219-L1223] 5 ~arg := #in~arg; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, #t~mem8=2, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1221] FCALL 5 call write~int(88, { base: ~v~0!base, offset: ~v~0!offset }, 1); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, #t~mem8=2, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1222] 5 #res := { base: 0, offset: 0 }; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, #t~mem8=2, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1226] FCALL 3 call write~int(89, { base: ~v~0!base, offset: ~v~0!offset }, 1); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, #t~mem8=2, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1227] 3 #res := { base: 0, offset: 0 }; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, #t~mem8=2, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1239] JOIN 3 join #t~mem8; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, #t~mem8=2, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1239] 0 havoc #t~mem8; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1240] FCALL 0 call #t~mem9 := read~int(~#t4~0, 4); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, #t~mem9=3, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1240] JOIN 5 join #t~mem9; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, #t~mem9=3, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1240] 0 havoc #t~mem9; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1241] FCALL 0 call #t~mem10 := read~int(~#t5~0, 4); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, #t~mem10=4, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1241] JOIN 4 join #t~mem10; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, #t~mem10=4, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1241] 0 havoc #t~mem10; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1242] 0 #res := { base: 0, offset: 0 }; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1231] FCALL 0 call ULTIMATE.dealloc(~#t1~0); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~#t1~0!base=96, ~#t1~0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1242] 0 havoc ~#t1~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1231] FCALL 0 call ULTIMATE.dealloc(~#t2~0); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~#t2~0!base=93, ~#t2~0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1242] 0 havoc ~#t2~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1231] FCALL 0 call ULTIMATE.dealloc(~#t3~0); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~#t3~0!base=90, ~#t3~0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1242] 0 havoc ~#t3~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1231] FCALL 0 call ULTIMATE.dealloc(~#t4~0); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~#t4~0!base=91, ~#t4~0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1242] 0 havoc ~#t4~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1231] FCALL 0 call ULTIMATE.dealloc(~#t5~0); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~#t5~0!base=95, ~#t5~0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1242] 0 havoc ~#t5~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1248] JOIN 0 join #t~mem12; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1248] -1 havoc #t~mem12; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1249] FCALL -1 call #t~mem13 := read~int({ base: ~v~0!base, offset: ~v~0!offset }, 1); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1212] -1 ~expression := #in~expression; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1212] COND TRUE -1 0 == ~expression VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1212] -1 assert false; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #res!base=0, #res!base=0, #res!base=0, #res!base=0, #res!offset=0, #res!offset=0, #res!offset=0, #res!offset=0, #t~malloc0!base=92, #t~malloc0!offset=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~v~0!base=92, ~v~0!offset=0] [L1213] -1 char *v; VAL [v={0:0}] [L1246] -1 pthread_t t; VAL [v={0:0}] [L1247] FCALL, FORK -1 pthread_create(&t, 0, thread0, 0) VAL [arg={0:0}, v={0:0}] [L1231] 0 pthread_t t1, t2, t3, t4, t5; VAL [arg={0:0}, arg={0:0}, t1={96:0}, t2={93:0}, t3={90:0}, t4={91:0}, t5={95:0}, v={0:0}] [L1232] FCALL, FORK 0 pthread_create(&t1, 0, thread1, 0) VAL [arg={0:0}, arg={0:0}, arg={0:0}, t1={96:0}, t2={93:0}, t3={90:0}, t4={91:0}, t5={95:0}, v={0:0}] [L1216] 1 v = malloc(sizeof(char)) VAL [arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, malloc(sizeof(char))={92:0}, t1={96:0}, t2={93:0}, t3={90:0}, t4={91:0}, t5={95:0}, v={92:0}] [L1217] 1 return 0; VAL [\result={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, malloc(sizeof(char))={92:0}, t1={96:0}, t2={93:0}, t3={90:0}, t4={91:0}, t5={95:0}, v={92:0}] [L1248] -1 \read(t) VAL [\result={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, malloc(sizeof(char))={92:0}, t1={96:0}, t2={93:0}, t3={90:0}, t4={91:0}, t5={95:0}, v={92:0}] [L1233] 0 \read(t1) VAL [\read(t1)=0, \result={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, malloc(sizeof(char))={92:0}, t1={96:0}, t2={93:0}, t3={90:0}, t4={91:0}, t5={95:0}, v={92:0}] [L1233] FCALL, JOIN 1 pthread_join(t1, 0) VAL [\read(t1)=0, \result={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, malloc(sizeof(char))={92:0}, t1={96:0}, t2={93:0}, t3={90:0}, t4={91:0}, t5={95:0}, v={92:0}] [L1234] FCALL, FORK 0 pthread_create(&t2, 0, thread2, 0) VAL [\result={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, malloc(sizeof(char))={92:0}, t1={96:0}, t2={93:0}, t3={90:0}, t4={91:0}, t5={95:0}, v={92:0}] [L1221] 2 v[0] = 'X' VAL [\result={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, malloc(sizeof(char))={92:0}, t1={96:0}, t2={93:0}, t3={90:0}, t4={91:0}, t5={95:0}, v={92:0}] [L1222] 2 return 0; VAL [\result={0:0}, \result={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, malloc(sizeof(char))={92:0}, t1={96:0}, t2={93:0}, t3={90:0}, t4={91:0}, t5={95:0}, v={92:0}] [L1235] FCALL, FORK 0 pthread_create(&t3, 0, thread3, 0) VAL [\result={0:0}, \result={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, malloc(sizeof(char))={92:0}, t1={96:0}, t2={93:0}, t3={90:0}, t4={91:0}, t5={95:0}, v={92:0}] [L1236] FCALL, FORK 0 pthread_create(&t4, 0, thread2, 0) VAL [\result={0:0}, \result={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, malloc(sizeof(char))={92:0}, t1={96:0}, t2={93:0}, t3={90:0}, t4={91:0}, t5={95:0}, v={92:0}] [L1237] FCALL, FORK 0 pthread_create(&t5, 0, thread2, 0) VAL [\result={0:0}, \result={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, malloc(sizeof(char))={92:0}, t1={96:0}, t2={93:0}, t3={90:0}, t4={91:0}, t5={95:0}, v={92:0}] [L1221] 4 v[0] = 'X' VAL [\result={0:0}, \result={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, malloc(sizeof(char))={92:0}, t1={96:0}, t2={93:0}, t3={90:0}, t4={91:0}, t5={95:0}, v={92:0}] [L1222] 4 return 0; VAL [\result={0:0}, \result={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, malloc(sizeof(char))={92:0}, t1={96:0}, t2={93:0}, t3={90:0}, t4={91:0}, t5={95:0}, v={92:0}] [L1238] 0 \read(t2) VAL [\read(t2)=1, \result={0:0}, \result={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, malloc(sizeof(char))={92:0}, t1={96:0}, t2={93:0}, t3={90:0}, t4={91:0}, t5={95:0}, v={92:0}] [L1238] FCALL, JOIN 2 pthread_join(t2, 0) VAL [\read(t2)=1, \result={0:0}, \result={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, malloc(sizeof(char))={92:0}, t1={96:0}, t2={93:0}, t3={90:0}, t4={91:0}, t5={95:0}, v={92:0}] [L1239] 0 \read(t3) VAL [\read(t3)=2, \result={0:0}, \result={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, malloc(sizeof(char))={92:0}, t1={96:0}, t2={93:0}, t3={90:0}, t4={91:0}, t5={95:0}, v={92:0}] [L1221] 5 v[0] = 'X' VAL [\read(t3)=2, \result={0:0}, \result={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, malloc(sizeof(char))={92:0}, t1={96:0}, t2={93:0}, t3={90:0}, t4={91:0}, t5={95:0}, v={92:0}] [L1222] 5 return 0; VAL [\read(t3)=2, \result={0:0}, \result={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, malloc(sizeof(char))={92:0}, t1={96:0}, t2={93:0}, t3={90:0}, t4={91:0}, t5={95:0}, v={92:0}] [L1226] 3 v[0] = 'Y' VAL [\read(t3)=2, \result={0:0}, \result={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, malloc(sizeof(char))={92:0}, t1={96:0}, t2={93:0}, t3={90:0}, t4={91:0}, t5={95:0}, v={92:0}] [L1227] 3 return 0; VAL [\read(t3)=2, \result={0:0}, \result={0:0}, \result={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, malloc(sizeof(char))={92:0}, t1={96:0}, t2={93:0}, t3={90:0}, t4={91:0}, t5={95:0}, v={92:0}] [L1239] FCALL, JOIN 3 pthread_join(t3, 0) VAL [\read(t3)=2, \result={0:0}, \result={0:0}, \result={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, malloc(sizeof(char))={92:0}, t1={96:0}, t2={93:0}, t3={90:0}, t4={91:0}, t5={95:0}, v={92:0}] [L1240] 0 \read(t4) VAL [\read(t4)=3, \result={0:0}, \result={0:0}, \result={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, malloc(sizeof(char))={92:0}, t1={96:0}, t2={93:0}, t3={90:0}, t4={91:0}, t5={95:0}, v={92:0}] [L1240] FCALL, JOIN 5 pthread_join(t4, 0) VAL [\read(t4)=3, \result={0:0}, \result={0:0}, \result={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, malloc(sizeof(char))={92:0}, t1={96:0}, t2={93:0}, t3={90:0}, t4={91:0}, t5={95:0}, v={92:0}] [L1241] 0 \read(t5) VAL [\read(t5)=4, \result={0:0}, \result={0:0}, \result={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, malloc(sizeof(char))={92:0}, t1={96:0}, t2={93:0}, t3={90:0}, t4={91:0}, t5={95:0}, v={92:0}] [L1241] FCALL, JOIN 4 pthread_join(t5, 0) VAL [\read(t5)=4, \result={0:0}, \result={0:0}, \result={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, malloc(sizeof(char))={92:0}, t1={96:0}, t2={93:0}, t3={90:0}, t4={91:0}, t5={95:0}, v={92:0}] [L1242] 0 return 0; VAL [\result={0:0}, \result={0:0}, \result={0:0}, \result={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, malloc(sizeof(char))={92:0}, t1={96:0}, t2={93:0}, t3={90:0}, t4={91:0}, t5={95:0}, v={92:0}] [L1242] 0 return 0; VAL [\result={0:0}, \result={0:0}, \result={0:0}, \result={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, malloc(sizeof(char))={92:0}, t2={93:0}, t3={90:0}, t4={91:0}, t5={95:0}, v={92:0}] [L1242] 0 return 0; VAL [\result={0:0}, \result={0:0}, \result={0:0}, \result={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, malloc(sizeof(char))={92:0}, t3={90:0}, t4={91:0}, t5={95:0}, v={92:0}] [L1242] 0 return 0; VAL [\result={0:0}, \result={0:0}, \result={0:0}, \result={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, malloc(sizeof(char))={92:0}, t4={91:0}, t5={95:0}, v={92:0}] [L1242] 0 return 0; VAL [\result={0:0}, \result={0:0}, \result={0:0}, \result={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, malloc(sizeof(char))={92:0}, t5={95:0}, v={92:0}] [L1242] 0 return 0; VAL [\result={0:0}, \result={0:0}, \result={0:0}, \result={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, malloc(sizeof(char))={92:0}, v={92:0}] [L1248] FCALL, JOIN 0 pthread_join(t, 0) VAL [\result={0:0}, \result={0:0}, \result={0:0}, \result={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, malloc(sizeof(char))={92:0}, v={92:0}] [L1249] -1 v[0] VAL [\result={0:0}, \result={0:0}, \result={0:0}, \result={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, malloc(sizeof(char))={92:0}, v={92:0}] [L1212] COND TRUE -1 !expression VAL [\result={0:0}, \result={0:0}, \result={0:0}, \result={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, malloc(sizeof(char))={92:0}, v={92:0}] [L1212] -1 __VERIFIER_error() VAL [\result={0:0}, \result={0:0}, \result={0:0}, \result={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, malloc(sizeof(char))={92:0}, v={92:0}] ----- [2018-11-23 05:08:19,796 INFO L145 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/working_dir_2249d4f7-c285-46e0-ab07-7b74c49cfbb0/bin-2019/uautomizer/witness.graphml [2018-11-23 05:08:19,797 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2018-11-23 05:08:19,797 INFO L168 Benchmark]: Toolchain (without parser) took 81631.25 ms. Allocated memory was 1.0 GB in the beginning and 5.3 GB in the end (delta: 4.3 GB). Free memory was 956.4 MB in the beginning and 2.5 GB in the end (delta: -1.6 GB). Peak memory consumption was 2.8 GB. Max. memory is 11.5 GB. [2018-11-23 05:08:19,798 INFO L168 Benchmark]: CDTParser took 0.14 ms. Allocated memory is still 1.0 GB. Free memory is still 985.4 MB. There was no memory consumed. Max. memory is 11.5 GB. [2018-11-23 05:08:19,798 INFO L168 Benchmark]: CACSL2BoogieTranslator took 524.65 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 155.2 MB). Free memory was 956.4 MB in the beginning and 1.1 GB in the end (delta: -140.9 MB). Peak memory consumption was 39.0 MB. Max. memory is 11.5 GB. [2018-11-23 05:08:19,798 INFO L168 Benchmark]: Boogie Procedure Inliner took 39.98 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 6.8 MB). Peak memory consumption was 6.8 MB. Max. memory is 11.5 GB. [2018-11-23 05:08:19,799 INFO L168 Benchmark]: Boogie Preprocessor took 26.39 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2018-11-23 05:08:19,799 INFO L168 Benchmark]: RCFGBuilder took 333.07 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 28.3 MB). Peak memory consumption was 28.3 MB. Max. memory is 11.5 GB. [2018-11-23 05:08:19,799 INFO L168 Benchmark]: TraceAbstraction took 77919.05 ms. Allocated memory was 1.2 GB in the beginning and 5.3 GB in the end (delta: 4.2 GB). Free memory was 1.1 GB in the beginning and 2.7 GB in the end (delta: -1.6 GB). Peak memory consumption was 2.6 GB. Max. memory is 11.5 GB. [2018-11-23 05:08:19,799 INFO L168 Benchmark]: Witness Printer took 2784.29 ms. Allocated memory is still 5.3 GB. Free memory was 2.7 GB in the beginning and 2.5 GB in the end (delta: 134.2 MB). Peak memory consumption was 134.2 MB. Max. memory is 11.5 GB. [2018-11-23 05:08:19,801 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.14 ms. Allocated memory is still 1.0 GB. Free memory is still 985.4 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 524.65 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 155.2 MB). Free memory was 956.4 MB in the beginning and 1.1 GB in the end (delta: -140.9 MB). Peak memory consumption was 39.0 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 39.98 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 6.8 MB). Peak memory consumption was 6.8 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 26.39 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 333.07 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 28.3 MB). Peak memory consumption was 28.3 MB. Max. memory is 11.5 GB. * TraceAbstraction took 77919.05 ms. Allocated memory was 1.2 GB in the beginning and 5.3 GB in the end (delta: 4.2 GB). Free memory was 1.1 GB in the beginning and 2.7 GB in the end (delta: -1.6 GB). Peak memory consumption was 2.6 GB. Max. memory is 11.5 GB. * Witness Printer took 2784.29 ms. Allocated memory is still 5.3 GB. Free memory was 2.7 GB in the beginning and 2.5 GB in the end (delta: 134.2 MB). Peak memory consumption was 134.2 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 1212]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L1213] -1 char *v; VAL [v={0:0}] [L1246] -1 pthread_t t; VAL [v={0:0}] [L1247] FCALL, FORK -1 pthread_create(&t, 0, thread0, 0) VAL [arg={0:0}, v={0:0}] [L1231] 0 pthread_t t1, t2, t3, t4, t5; VAL [arg={0:0}, arg={0:0}, t1={96:0}, t2={93:0}, t3={90:0}, t4={91:0}, t5={95:0}, v={0:0}] [L1232] FCALL, FORK 0 pthread_create(&t1, 0, thread1, 0) VAL [arg={0:0}, arg={0:0}, arg={0:0}, t1={96:0}, t2={93:0}, t3={90:0}, t4={91:0}, t5={95:0}, v={0:0}] [L1216] 1 v = malloc(sizeof(char)) VAL [arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, malloc(sizeof(char))={92:0}, t1={96:0}, t2={93:0}, t3={90:0}, t4={91:0}, t5={95:0}, v={92:0}] [L1217] 1 return 0; VAL [\result={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, malloc(sizeof(char))={92:0}, t1={96:0}, t2={93:0}, t3={90:0}, t4={91:0}, t5={95:0}, v={92:0}] [L1248] -1 \read(t) VAL [\result={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, malloc(sizeof(char))={92:0}, t1={96:0}, t2={93:0}, t3={90:0}, t4={91:0}, t5={95:0}, v={92:0}] [L1233] 0 \read(t1) VAL [\read(t1)=0, \result={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, malloc(sizeof(char))={92:0}, t1={96:0}, t2={93:0}, t3={90:0}, t4={91:0}, t5={95:0}, v={92:0}] [L1233] FCALL, JOIN 1 pthread_join(t1, 0) VAL [\read(t1)=0, \result={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, malloc(sizeof(char))={92:0}, t1={96:0}, t2={93:0}, t3={90:0}, t4={91:0}, t5={95:0}, v={92:0}] [L1234] FCALL, FORK 0 pthread_create(&t2, 0, thread2, 0) VAL [\result={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, malloc(sizeof(char))={92:0}, t1={96:0}, t2={93:0}, t3={90:0}, t4={91:0}, t5={95:0}, v={92:0}] [L1221] 2 v[0] = 'X' VAL [\result={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, malloc(sizeof(char))={92:0}, t1={96:0}, t2={93:0}, t3={90:0}, t4={91:0}, t5={95:0}, v={92:0}] [L1222] 2 return 0; VAL [\result={0:0}, \result={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, malloc(sizeof(char))={92:0}, t1={96:0}, t2={93:0}, t3={90:0}, t4={91:0}, t5={95:0}, v={92:0}] [L1235] FCALL, FORK 0 pthread_create(&t3, 0, thread3, 0) VAL [\result={0:0}, \result={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, malloc(sizeof(char))={92:0}, t1={96:0}, t2={93:0}, t3={90:0}, t4={91:0}, t5={95:0}, v={92:0}] [L1236] FCALL, FORK 0 pthread_create(&t4, 0, thread2, 0) VAL [\result={0:0}, \result={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, malloc(sizeof(char))={92:0}, t1={96:0}, t2={93:0}, t3={90:0}, t4={91:0}, t5={95:0}, v={92:0}] [L1237] FCALL, FORK 0 pthread_create(&t5, 0, thread2, 0) VAL [\result={0:0}, \result={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, malloc(sizeof(char))={92:0}, t1={96:0}, t2={93:0}, t3={90:0}, t4={91:0}, t5={95:0}, v={92:0}] [L1221] 4 v[0] = 'X' VAL [\result={0:0}, \result={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, malloc(sizeof(char))={92:0}, t1={96:0}, t2={93:0}, t3={90:0}, t4={91:0}, t5={95:0}, v={92:0}] [L1222] 4 return 0; VAL [\result={0:0}, \result={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, malloc(sizeof(char))={92:0}, t1={96:0}, t2={93:0}, t3={90:0}, t4={91:0}, t5={95:0}, v={92:0}] [L1238] 0 \read(t2) VAL [\read(t2)=1, \result={0:0}, \result={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, malloc(sizeof(char))={92:0}, t1={96:0}, t2={93:0}, t3={90:0}, t4={91:0}, t5={95:0}, v={92:0}] [L1238] FCALL, JOIN 2 pthread_join(t2, 0) VAL [\read(t2)=1, \result={0:0}, \result={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, malloc(sizeof(char))={92:0}, t1={96:0}, t2={93:0}, t3={90:0}, t4={91:0}, t5={95:0}, v={92:0}] [L1239] 0 \read(t3) VAL [\read(t3)=2, \result={0:0}, \result={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, malloc(sizeof(char))={92:0}, t1={96:0}, t2={93:0}, t3={90:0}, t4={91:0}, t5={95:0}, v={92:0}] [L1221] 5 v[0] = 'X' VAL [\read(t3)=2, \result={0:0}, \result={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, malloc(sizeof(char))={92:0}, t1={96:0}, t2={93:0}, t3={90:0}, t4={91:0}, t5={95:0}, v={92:0}] [L1222] 5 return 0; VAL [\read(t3)=2, \result={0:0}, \result={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, malloc(sizeof(char))={92:0}, t1={96:0}, t2={93:0}, t3={90:0}, t4={91:0}, t5={95:0}, v={92:0}] [L1226] 3 v[0] = 'Y' VAL [\read(t3)=2, \result={0:0}, \result={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, malloc(sizeof(char))={92:0}, t1={96:0}, t2={93:0}, t3={90:0}, t4={91:0}, t5={95:0}, v={92:0}] [L1227] 3 return 0; VAL [\read(t3)=2, \result={0:0}, \result={0:0}, \result={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, malloc(sizeof(char))={92:0}, t1={96:0}, t2={93:0}, t3={90:0}, t4={91:0}, t5={95:0}, v={92:0}] [L1239] FCALL, JOIN 3 pthread_join(t3, 0) VAL [\read(t3)=2, \result={0:0}, \result={0:0}, \result={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, malloc(sizeof(char))={92:0}, t1={96:0}, t2={93:0}, t3={90:0}, t4={91:0}, t5={95:0}, v={92:0}] [L1240] 0 \read(t4) VAL [\read(t4)=3, \result={0:0}, \result={0:0}, \result={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, malloc(sizeof(char))={92:0}, t1={96:0}, t2={93:0}, t3={90:0}, t4={91:0}, t5={95:0}, v={92:0}] [L1240] FCALL, JOIN 5 pthread_join(t4, 0) VAL [\read(t4)=3, \result={0:0}, \result={0:0}, \result={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, malloc(sizeof(char))={92:0}, t1={96:0}, t2={93:0}, t3={90:0}, t4={91:0}, t5={95:0}, v={92:0}] [L1241] 0 \read(t5) VAL [\read(t5)=4, \result={0:0}, \result={0:0}, \result={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, malloc(sizeof(char))={92:0}, t1={96:0}, t2={93:0}, t3={90:0}, t4={91:0}, t5={95:0}, v={92:0}] [L1241] FCALL, JOIN 4 pthread_join(t5, 0) VAL [\read(t5)=4, \result={0:0}, \result={0:0}, \result={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, malloc(sizeof(char))={92:0}, t1={96:0}, t2={93:0}, t3={90:0}, t4={91:0}, t5={95:0}, v={92:0}] [L1242] 0 return 0; VAL [\result={0:0}, \result={0:0}, \result={0:0}, \result={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, malloc(sizeof(char))={92:0}, t1={96:0}, t2={93:0}, t3={90:0}, t4={91:0}, t5={95:0}, v={92:0}] [L1242] 0 return 0; VAL [\result={0:0}, \result={0:0}, \result={0:0}, \result={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, malloc(sizeof(char))={92:0}, t2={93:0}, t3={90:0}, t4={91:0}, t5={95:0}, v={92:0}] [L1242] 0 return 0; VAL [\result={0:0}, \result={0:0}, \result={0:0}, \result={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, malloc(sizeof(char))={92:0}, t3={90:0}, t4={91:0}, t5={95:0}, v={92:0}] [L1242] 0 return 0; VAL [\result={0:0}, \result={0:0}, \result={0:0}, \result={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, malloc(sizeof(char))={92:0}, t4={91:0}, t5={95:0}, v={92:0}] [L1242] 0 return 0; VAL [\result={0:0}, \result={0:0}, \result={0:0}, \result={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, malloc(sizeof(char))={92:0}, t5={95:0}, v={92:0}] [L1242] 0 return 0; VAL [\result={0:0}, \result={0:0}, \result={0:0}, \result={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, malloc(sizeof(char))={92:0}, v={92:0}] [L1248] FCALL, JOIN 0 pthread_join(t, 0) VAL [\result={0:0}, \result={0:0}, \result={0:0}, \result={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, malloc(sizeof(char))={92:0}, v={92:0}] [L1249] -1 v[0] VAL [\result={0:0}, \result={0:0}, \result={0:0}, \result={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, malloc(sizeof(char))={92:0}, v={92:0}] [L1212] COND TRUE -1 !expression VAL [\result={0:0}, \result={0:0}, \result={0:0}, \result={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, malloc(sizeof(char))={92:0}, v={92:0}] [L1212] -1 __VERIFIER_error() VAL [\result={0:0}, \result={0:0}, \result={0:0}, \result={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, malloc(sizeof(char))={92:0}, v={92:0}] - StatisticsResult: Ultimate Automizer benchmark data CFG has 11 procedures, 166 locations, 1 error locations. UNSAFE Result, 77.6s OverallTime, 40 OverallIterations, 1 TraceHistogramMax, 37.3s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 7720 SDtfs, 22631 SDslu, 50523 SDs, 0 SdLazy, 23138 SolverSat, 3034 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 10.7s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 1207 GetRequests, 151 SyntacticMatches, 46 SemanticMatches, 1010 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6368 ImplicationChecksByTransitivity, 28.6s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=47312occurred in iteration=0, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 21.5s AutomataMinimizationTime, 39 MinimizatonAttempts, 292546 StatesRemovedByMinimization, 36 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.0s SsaConstructionTime, 0.1s SatisfiabilityAnalysisTime, 13.6s InterpolantComputationTime, 2055 NumberOfCodeBlocks, 2055 NumberOfCodeBlocksAsserted, 40 NumberOfCheckSat, 1929 ConstructedInterpolants, 0 QuantifiedInterpolants, 1799036 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 39 InterpolantComputations, 39 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...