./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/thin001_power.opt_false-unreach-call.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version aa418289 Calling Ultimate with: java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/working_dir_43f24f51-8c4d-4eb7-b701-5adb5d5acaf7/bin-2019/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/working_dir_43f24f51-8c4d-4eb7-b701-5adb5d5acaf7/bin-2019/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/working_dir_43f24f51-8c4d-4eb7-b701-5adb5d5acaf7/bin-2019/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/working_dir_43f24f51-8c4d-4eb7-b701-5adb5d5acaf7/bin-2019/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/pthread-wmm/thin001_power.opt_false-unreach-call.i -s /tmp/vcloud-vcloud-master/worker/working_dir_43f24f51-8c4d-4eb7-b701-5adb5d5acaf7/bin-2019/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/working_dir_43f24f51-8c4d-4eb7-b701-5adb5d5acaf7/bin-2019/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 0565341d48a13ae8e32e38d25cc35ee0d392a001 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Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.23-aa41828 [2018-11-23 13:15:01,393 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-11-23 13:15:01,393 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-11-23 13:15:01,400 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-11-23 13:15:01,401 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-11-23 13:15:01,401 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-11-23 13:15:01,402 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-11-23 13:15:01,403 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-11-23 13:15:01,404 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-11-23 13:15:01,405 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-11-23 13:15:01,405 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-11-23 13:15:01,406 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-11-23 13:15:01,406 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-11-23 13:15:01,407 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-11-23 13:15:01,408 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-11-23 13:15:01,408 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-11-23 13:15:01,409 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-11-23 13:15:01,410 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-11-23 13:15:01,411 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-11-23 13:15:01,412 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-11-23 13:15:01,413 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-11-23 13:15:01,414 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-11-23 13:15:01,416 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-11-23 13:15:01,416 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-11-23 13:15:01,416 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-11-23 13:15:01,417 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-11-23 13:15:01,417 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-11-23 13:15:01,418 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-11-23 13:15:01,418 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-11-23 13:15:01,419 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-11-23 13:15:01,419 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-11-23 13:15:01,420 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-11-23 13:15:01,420 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-11-23 13:15:01,420 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-11-23 13:15:01,421 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-11-23 13:15:01,421 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-11-23 13:15:01,421 INFO L98 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/working_dir_43f24f51-8c4d-4eb7-b701-5adb5d5acaf7/bin-2019/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2018-11-23 13:15:01,431 INFO L110 SettingsManager]: Loading preferences was successful [2018-11-23 13:15:01,432 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-11-23 13:15:01,432 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-11-23 13:15:01,432 INFO L133 SettingsManager]: * ... calls to implemented procedures=ONLY_FOR_CONCURRENT_PROGRAMS [2018-11-23 13:15:01,433 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-11-23 13:15:01,433 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-11-23 13:15:01,433 INFO L133 SettingsManager]: * Use SBE=true [2018-11-23 13:15:01,433 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-11-23 13:15:01,433 INFO L133 SettingsManager]: * sizeof long=4 [2018-11-23 13:15:01,433 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-11-23 13:15:01,434 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-11-23 13:15:01,434 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-11-23 13:15:01,434 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-11-23 13:15:01,434 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-11-23 13:15:01,434 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-11-23 13:15:01,434 INFO L133 SettingsManager]: * sizeof long double=12 [2018-11-23 13:15:01,434 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-11-23 13:15:01,434 INFO L133 SettingsManager]: * Use constant arrays=true [2018-11-23 13:15:01,434 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-11-23 13:15:01,435 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-11-23 13:15:01,435 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-11-23 13:15:01,435 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-11-23 13:15:01,435 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-11-23 13:15:01,435 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-23 13:15:01,435 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-11-23 13:15:01,435 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-11-23 13:15:01,435 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-11-23 13:15:01,435 INFO L133 SettingsManager]: * Trace refinement strategy=CAMEL [2018-11-23 13:15:01,435 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-11-23 13:15:01,436 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-11-23 13:15:01,436 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/working_dir_43f24f51-8c4d-4eb7-b701-5adb5d5acaf7/bin-2019/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 0565341d48a13ae8e32e38d25cc35ee0d392a001 [2018-11-23 13:15:01,457 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-11-23 13:15:01,465 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-11-23 13:15:01,467 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-11-23 13:15:01,467 INFO L271 PluginConnector]: Initializing CDTParser... [2018-11-23 13:15:01,468 INFO L276 PluginConnector]: CDTParser initialized [2018-11-23 13:15:01,468 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/working_dir_43f24f51-8c4d-4eb7-b701-5adb5d5acaf7/bin-2019/uautomizer/../../sv-benchmarks/c/pthread-wmm/thin001_power.opt_false-unreach-call.i [2018-11-23 13:15:01,503 INFO L221 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_43f24f51-8c4d-4eb7-b701-5adb5d5acaf7/bin-2019/uautomizer/data/5f6e0a143/9f8ec9ad3d254eb5857063b0fc1e0897/FLAG610351d67 [2018-11-23 13:15:01,857 INFO L307 CDTParser]: Found 1 translation units. [2018-11-23 13:15:01,857 INFO L161 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/working_dir_43f24f51-8c4d-4eb7-b701-5adb5d5acaf7/sv-benchmarks/c/pthread-wmm/thin001_power.opt_false-unreach-call.i [2018-11-23 13:15:01,866 INFO L355 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_43f24f51-8c4d-4eb7-b701-5adb5d5acaf7/bin-2019/uautomizer/data/5f6e0a143/9f8ec9ad3d254eb5857063b0fc1e0897/FLAG610351d67 [2018-11-23 13:15:01,878 INFO L363 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/working_dir_43f24f51-8c4d-4eb7-b701-5adb5d5acaf7/bin-2019/uautomizer/data/5f6e0a143/9f8ec9ad3d254eb5857063b0fc1e0897 [2018-11-23 13:15:01,880 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-11-23 13:15:01,882 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2018-11-23 13:15:01,882 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-11-23 13:15:01,882 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-11-23 13:15:01,885 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-11-23 13:15:01,886 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 23.11 01:15:01" (1/1) ... [2018-11-23 13:15:01,888 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@7befe0c1 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 01:15:01, skipping insertion in model container [2018-11-23 13:15:01,889 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 23.11 01:15:01" (1/1) ... [2018-11-23 13:15:01,897 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-11-23 13:15:01,934 INFO L176 MainTranslator]: Built tables and reachable declarations [2018-11-23 13:15:02,192 INFO L201 PostProcessor]: Analyzing one entry point: main [2018-11-23 13:15:02,202 INFO L191 MainTranslator]: Completed pre-run [2018-11-23 13:15:02,305 INFO L201 PostProcessor]: Analyzing one entry point: main [2018-11-23 13:15:02,354 INFO L195 MainTranslator]: Completed translation [2018-11-23 13:15:02,354 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 01:15:02 WrapperNode [2018-11-23 13:15:02,354 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-11-23 13:15:02,355 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2018-11-23 13:15:02,355 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2018-11-23 13:15:02,355 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2018-11-23 13:15:02,362 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 01:15:02" (1/1) ... [2018-11-23 13:15:02,380 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 01:15:02" (1/1) ... [2018-11-23 13:15:02,398 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2018-11-23 13:15:02,398 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-11-23 13:15:02,398 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-11-23 13:15:02,399 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-11-23 13:15:02,404 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 01:15:02" (1/1) ... [2018-11-23 13:15:02,404 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 01:15:02" (1/1) ... [2018-11-23 13:15:02,407 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 01:15:02" (1/1) ... [2018-11-23 13:15:02,407 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 01:15:02" (1/1) ... [2018-11-23 13:15:02,414 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 01:15:02" (1/1) ... [2018-11-23 13:15:02,418 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 01:15:02" (1/1) ... [2018-11-23 13:15:02,420 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 01:15:02" (1/1) ... [2018-11-23 13:15:02,423 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-11-23 13:15:02,423 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-11-23 13:15:02,423 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-11-23 13:15:02,424 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-11-23 13:15:02,424 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 01:15:02" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_43f24f51-8c4d-4eb7-b701-5adb5d5acaf7/bin-2019/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-23 13:15:02,463 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-11-23 13:15:02,463 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2018-11-23 13:15:02,463 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2018-11-23 13:15:02,463 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2018-11-23 13:15:02,463 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-11-23 13:15:02,463 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2018-11-23 13:15:02,464 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2018-11-23 13:15:02,464 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2018-11-23 13:15:02,464 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2018-11-23 13:15:02,464 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2018-11-23 13:15:02,464 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2018-11-23 13:15:02,464 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2018-11-23 13:15:02,464 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2018-11-23 13:15:02,464 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-11-23 13:15:02,464 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-11-23 13:15:02,465 WARN L198 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2018-11-23 13:15:02,997 INFO L275 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-11-23 13:15:02,997 INFO L280 CfgBuilder]: Removed 8 assue(true) statements. [2018-11-23 13:15:02,998 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 23.11 01:15:02 BoogieIcfgContainer [2018-11-23 13:15:02,998 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-11-23 13:15:02,998 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-11-23 13:15:02,998 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-11-23 13:15:03,000 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-11-23 13:15:03,000 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 23.11 01:15:01" (1/3) ... [2018-11-23 13:15:03,001 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@34378116 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 23.11 01:15:03, skipping insertion in model container [2018-11-23 13:15:03,001 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 01:15:02" (2/3) ... [2018-11-23 13:15:03,001 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@34378116 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 23.11 01:15:03, skipping insertion in model container [2018-11-23 13:15:03,001 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 23.11 01:15:02" (3/3) ... [2018-11-23 13:15:03,003 INFO L112 eAbstractionObserver]: Analyzing ICFG thin001_power.opt_false-unreach-call.i [2018-11-23 13:15:03,033 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,033 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,034 WARN L317 ript$VariableManager]: TermVariabe Thread0_P0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,034 WARN L317 ript$VariableManager]: TermVariabe Thread0_P0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,034 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~nondet3.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,034 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~nondet3.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,034 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,034 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,034 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~nondet3.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,034 WARN L317 ript$VariableManager]: TermVariabe |Thread0_P0_#t~nondet3.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,035 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,035 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,035 WARN L317 ript$VariableManager]: TermVariabe Thread1_P1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,035 WARN L317 ript$VariableManager]: TermVariabe Thread1_P1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,035 WARN L317 ript$VariableManager]: TermVariabe Thread1_P1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,035 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,035 WARN L317 ript$VariableManager]: TermVariabe Thread1_P1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,035 WARN L317 ript$VariableManager]: TermVariabe Thread1_P1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,036 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,036 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,036 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~mem4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,036 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,036 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,036 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,036 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,036 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~mem4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,037 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,037 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,037 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,037 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,037 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,037 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,037 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,037 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,037 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,038 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,038 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,038 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,038 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,038 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,038 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,039 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,039 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,039 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,039 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet11.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,039 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet11.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,039 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,040 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,040 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet11.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,040 WARN L317 ript$VariableManager]: TermVariabe |Thread1_P1_#t~nondet11.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,041 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~nondet13.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,041 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~nondet12.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,041 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~nondet13.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,041 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,041 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~nondet15.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,041 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,041 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~nondet12.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,042 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~nondet15.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,042 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~nondet13.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,042 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~nondet12.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,042 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~nondet13.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,042 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~nondet15.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,042 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~nondet12.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,042 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~nondet15.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,043 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~mem14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,043 WARN L317 ript$VariableManager]: TermVariabe Thread2_P2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,043 WARN L317 ript$VariableManager]: TermVariabe Thread2_P2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,043 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~mem16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,043 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,044 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,044 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~mem16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,044 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~mem17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,044 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,044 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~mem21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,044 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,044 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,044 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,045 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,045 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,045 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,045 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,045 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,045 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,045 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,046 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,046 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,046 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,046 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,046 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,046 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,046 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,047 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,047 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~mem17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,047 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,047 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,047 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,047 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,047 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,048 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,048 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,048 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,048 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,048 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,048 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,049 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,049 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,049 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~mem21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,049 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,049 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,049 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,049 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,049 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,050 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,050 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,050 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,050 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,050 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,050 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,050 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,051 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,051 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,051 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,051 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,051 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,051 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,051 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,052 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,052 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,052 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,052 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,052 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,052 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,052 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,053 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,053 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,053 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,053 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,053 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,053 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,054 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,054 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,054 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,054 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,054 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,054 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,055 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,055 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,055 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite46| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,055 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,055 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,055 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,056 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,056 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,056 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,056 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,056 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite46| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,056 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite45| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,056 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite46| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,056 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,057 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite44| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,057 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,057 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite45| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,057 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,057 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,057 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,057 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,058 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,058 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite51| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,058 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite45| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,058 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite46| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,058 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite44| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,058 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,058 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,059 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,059 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,059 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite51| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,059 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite49| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,059 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite47| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,059 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite48| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,059 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite50| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,059 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite51| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,060 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite50| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,060 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite44| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,060 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite45| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,060 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,060 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,060 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,061 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite57| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,061 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite50| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,061 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite51| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,061 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite49| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,061 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,061 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite44| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,061 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,062 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,062 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite57| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,062 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~mem58| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,062 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite56| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,062 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite57| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,062 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite54| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,062 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite55| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,062 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite52| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,062 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite53| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,063 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite56| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,063 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite49| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,063 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite50| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,063 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite48| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,063 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,063 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,063 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite60| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,064 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~mem59| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,064 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite60| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,064 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite56| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,064 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite57| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,064 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite55| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,064 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite48| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,065 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite49| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,065 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite47| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,065 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite47| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,065 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite60| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,065 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~mem59| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,065 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite60| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,065 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite55| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,066 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite56| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,066 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite47| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,066 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite48| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,066 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite63| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,066 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite52| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,066 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite52| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,066 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite53| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,067 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite53| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,067 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite63| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,067 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~mem61| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,067 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite63| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,067 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite62| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,067 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite62| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,067 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~mem61| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,067 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite62| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,068 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite52| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,068 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite54| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,068 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite53| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,068 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite54| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,068 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite64| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,068 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite64| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,068 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite62| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,068 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite63| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,069 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite54| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,069 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite55| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,069 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite64| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,069 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite64| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,069 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite65| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,069 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite65| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,069 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite65| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,069 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite65| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,070 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite66| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,070 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite66| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,070 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite66| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,070 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite66| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,070 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite67| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,070 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite67| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,071 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite67| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,071 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~ite67| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,071 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~nondet68.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,071 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~nondet68.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,071 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,071 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,071 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~nondet68.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,071 WARN L317 ript$VariableManager]: TermVariabe |Thread2_P2_#t~nondet68.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2018-11-23 13:15:03,088 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2018-11-23 13:15:03,088 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-11-23 13:15:03,095 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 3 error locations. [2018-11-23 13:15:03,109 INFO L257 AbstractCegarLoop]: Starting to check reachability of 3 error locations. [2018-11-23 13:15:03,130 INFO L133 ementStrategyFactory]: Using default assertion order modulation [2018-11-23 13:15:03,131 INFO L382 AbstractCegarLoop]: Interprodecural is true [2018-11-23 13:15:03,131 INFO L383 AbstractCegarLoop]: Hoare is true [2018-11-23 13:15:03,131 INFO L384 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-11-23 13:15:03,131 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-11-23 13:15:03,131 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-11-23 13:15:03,132 INFO L387 AbstractCegarLoop]: Difference is false [2018-11-23 13:15:03,132 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-11-23 13:15:03,132 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-11-23 13:15:03,143 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 217places, 275 transitions [2018-11-23 13:16:27,252 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 346782 states. [2018-11-23 13:16:27,253 INFO L276 IsEmpty]: Start isEmpty. Operand 346782 states. [2018-11-23 13:16:27,260 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2018-11-23 13:16:27,261 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 13:16:27,261 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 13:16:27,263 INFO L423 AbstractCegarLoop]: === Iteration 1 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 13:16:27,266 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 13:16:27,267 INFO L82 PathProgramCache]: Analyzing trace with hash -1575025892, now seen corresponding path program 1 times [2018-11-23 13:16:27,268 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 13:16:27,268 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 13:16:27,304 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 13:16:27,304 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 13:16:27,304 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 13:16:27,347 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 13:16:27,452 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 13:16:27,455 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 13:16:27,455 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-23 13:16:27,458 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-23 13:16:27,470 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-23 13:16:27,470 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-23 13:16:27,472 INFO L87 Difference]: Start difference. First operand 346782 states. Second operand 4 states. [2018-11-23 13:16:35,401 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 13:16:35,401 INFO L93 Difference]: Finished difference Result 604682 states and 2849651 transitions. [2018-11-23 13:16:35,402 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-23 13:16:35,403 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 59 [2018-11-23 13:16:35,403 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 13:16:36,888 INFO L225 Difference]: With dead ends: 604682 [2018-11-23 13:16:36,888 INFO L226 Difference]: Without dead ends: 434932 [2018-11-23 13:16:36,890 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-23 13:16:39,766 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 434932 states. [2018-11-23 13:16:45,050 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 434932 to 269012. [2018-11-23 13:16:45,051 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 269012 states. [2018-11-23 13:16:45,922 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 269012 states to 269012 states and 1271315 transitions. [2018-11-23 13:16:45,923 INFO L78 Accepts]: Start accepts. Automaton has 269012 states and 1271315 transitions. Word has length 59 [2018-11-23 13:16:45,924 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 13:16:45,924 INFO L480 AbstractCegarLoop]: Abstraction has 269012 states and 1271315 transitions. [2018-11-23 13:16:45,924 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-23 13:16:45,924 INFO L276 IsEmpty]: Start isEmpty. Operand 269012 states and 1271315 transitions. [2018-11-23 13:16:45,937 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 72 [2018-11-23 13:16:45,937 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 13:16:45,938 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 13:16:45,938 INFO L423 AbstractCegarLoop]: === Iteration 2 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 13:16:45,938 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 13:16:45,938 INFO L82 PathProgramCache]: Analyzing trace with hash -1682673917, now seen corresponding path program 1 times [2018-11-23 13:16:45,938 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 13:16:45,938 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 13:16:45,943 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 13:16:45,944 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 13:16:45,944 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 13:16:45,964 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 13:16:46,042 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 13:16:46,042 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 13:16:46,042 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-23 13:16:46,044 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-23 13:16:46,044 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-23 13:16:46,044 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-23 13:16:46,045 INFO L87 Difference]: Start difference. First operand 269012 states and 1271315 transitions. Second operand 4 states. [2018-11-23 13:16:53,677 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 13:16:53,678 INFO L93 Difference]: Finished difference Result 237806 states and 1098321 transitions. [2018-11-23 13:16:53,678 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-23 13:16:53,678 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 71 [2018-11-23 13:16:53,678 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 13:16:54,304 INFO L225 Difference]: With dead ends: 237806 [2018-11-23 13:16:54,304 INFO L226 Difference]: Without dead ends: 229076 [2018-11-23 13:16:54,304 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-23 13:16:56,209 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 229076 states. [2018-11-23 13:16:58,760 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 229076 to 229076. [2018-11-23 13:16:58,760 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 229076 states. [2018-11-23 13:17:00,012 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 229076 states to 229076 states and 1065775 transitions. [2018-11-23 13:17:00,013 INFO L78 Accepts]: Start accepts. Automaton has 229076 states and 1065775 transitions. Word has length 71 [2018-11-23 13:17:00,014 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 13:17:00,014 INFO L480 AbstractCegarLoop]: Abstraction has 229076 states and 1065775 transitions. [2018-11-23 13:17:00,014 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-23 13:17:00,014 INFO L276 IsEmpty]: Start isEmpty. Operand 229076 states and 1065775 transitions. [2018-11-23 13:17:00,022 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2018-11-23 13:17:00,022 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 13:17:00,022 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 13:17:00,023 INFO L423 AbstractCegarLoop]: === Iteration 3 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 13:17:00,023 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 13:17:00,023 INFO L82 PathProgramCache]: Analyzing trace with hash 112998639, now seen corresponding path program 1 times [2018-11-23 13:17:00,023 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 13:17:00,023 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 13:17:00,025 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 13:17:00,025 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 13:17:00,026 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 13:17:00,040 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 13:17:00,097 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 13:17:00,097 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 13:17:00,097 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-23 13:17:00,097 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-23 13:17:00,097 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-23 13:17:00,098 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2018-11-23 13:17:00,098 INFO L87 Difference]: Start difference. First operand 229076 states and 1065775 transitions. Second operand 5 states. [2018-11-23 13:17:00,371 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 13:17:00,371 INFO L93 Difference]: Finished difference Result 62964 states and 259111 transitions. [2018-11-23 13:17:00,372 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-11-23 13:17:00,372 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 72 [2018-11-23 13:17:00,372 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 13:17:00,481 INFO L225 Difference]: With dead ends: 62964 [2018-11-23 13:17:00,481 INFO L226 Difference]: Without dead ends: 55536 [2018-11-23 13:17:00,481 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2018-11-23 13:17:00,640 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 55536 states. [2018-11-23 13:17:01,114 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 55536 to 54660. [2018-11-23 13:17:01,115 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 54660 states. [2018-11-23 13:17:01,232 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 54660 states to 54660 states and 224891 transitions. [2018-11-23 13:17:01,232 INFO L78 Accepts]: Start accepts. Automaton has 54660 states and 224891 transitions. Word has length 72 [2018-11-23 13:17:01,232 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 13:17:01,232 INFO L480 AbstractCegarLoop]: Abstraction has 54660 states and 224891 transitions. [2018-11-23 13:17:01,232 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-23 13:17:01,232 INFO L276 IsEmpty]: Start isEmpty. Operand 54660 states and 224891 transitions. [2018-11-23 13:17:01,235 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2018-11-23 13:17:01,235 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 13:17:01,235 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 13:17:01,235 INFO L423 AbstractCegarLoop]: === Iteration 4 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 13:17:01,235 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 13:17:01,235 INFO L82 PathProgramCache]: Analyzing trace with hash -1640714172, now seen corresponding path program 1 times [2018-11-23 13:17:01,236 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 13:17:01,236 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 13:17:01,237 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 13:17:01,237 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 13:17:01,237 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 13:17:01,255 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 13:17:01,334 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 13:17:01,334 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 13:17:01,334 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-23 13:17:01,335 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-23 13:17:01,335 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-23 13:17:01,335 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2018-11-23 13:17:01,335 INFO L87 Difference]: Start difference. First operand 54660 states and 224891 transitions. Second operand 6 states. [2018-11-23 13:17:04,232 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 13:17:04,232 INFO L93 Difference]: Finished difference Result 117028 states and 470836 transitions. [2018-11-23 13:17:04,232 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-11-23 13:17:04,232 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 72 [2018-11-23 13:17:04,232 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 13:17:04,469 INFO L225 Difference]: With dead ends: 117028 [2018-11-23 13:17:04,469 INFO L226 Difference]: Without dead ends: 116528 [2018-11-23 13:17:04,470 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=36, Invalid=74, Unknown=0, NotChecked=0, Total=110 [2018-11-23 13:17:04,729 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 116528 states. [2018-11-23 13:17:05,606 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 116528 to 70499. [2018-11-23 13:17:05,606 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 70499 states. [2018-11-23 13:17:05,754 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 70499 states to 70499 states and 284728 transitions. [2018-11-23 13:17:05,754 INFO L78 Accepts]: Start accepts. Automaton has 70499 states and 284728 transitions. Word has length 72 [2018-11-23 13:17:05,754 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 13:17:05,754 INFO L480 AbstractCegarLoop]: Abstraction has 70499 states and 284728 transitions. [2018-11-23 13:17:05,754 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-23 13:17:05,754 INFO L276 IsEmpty]: Start isEmpty. Operand 70499 states and 284728 transitions. [2018-11-23 13:17:05,758 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 75 [2018-11-23 13:17:05,758 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 13:17:05,758 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 13:17:05,758 INFO L423 AbstractCegarLoop]: === Iteration 5 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 13:17:05,758 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 13:17:06,016 INFO L82 PathProgramCache]: Analyzing trace with hash 523567789, now seen corresponding path program 1 times [2018-11-23 13:17:06,016 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 13:17:06,016 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 13:17:06,018 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 13:17:06,018 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 13:17:06,018 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 13:17:06,027 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 13:17:06,046 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 13:17:06,046 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 13:17:06,046 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-23 13:17:06,046 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-23 13:17:06,046 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-23 13:17:06,046 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-23 13:17:06,047 INFO L87 Difference]: Start difference. First operand 70499 states and 284728 transitions. Second operand 3 states. [2018-11-23 13:17:06,436 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 13:17:06,436 INFO L93 Difference]: Finished difference Result 99897 states and 398052 transitions. [2018-11-23 13:17:06,436 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-23 13:17:06,437 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 74 [2018-11-23 13:17:06,437 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 13:17:06,641 INFO L225 Difference]: With dead ends: 99897 [2018-11-23 13:17:06,641 INFO L226 Difference]: Without dead ends: 99897 [2018-11-23 13:17:06,642 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-23 13:17:06,878 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 99897 states. [2018-11-23 13:17:07,700 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 99897 to 78575. [2018-11-23 13:17:07,701 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 78575 states. [2018-11-23 13:17:08,357 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 78575 states to 78575 states and 313492 transitions. [2018-11-23 13:17:08,358 INFO L78 Accepts]: Start accepts. Automaton has 78575 states and 313492 transitions. Word has length 74 [2018-11-23 13:17:08,358 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 13:17:08,358 INFO L480 AbstractCegarLoop]: Abstraction has 78575 states and 313492 transitions. [2018-11-23 13:17:08,358 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-23 13:17:08,358 INFO L276 IsEmpty]: Start isEmpty. Operand 78575 states and 313492 transitions. [2018-11-23 13:17:08,364 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 79 [2018-11-23 13:17:08,364 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 13:17:08,364 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 13:17:08,364 INFO L423 AbstractCegarLoop]: === Iteration 6 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 13:17:08,364 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 13:17:08,364 INFO L82 PathProgramCache]: Analyzing trace with hash -690257246, now seen corresponding path program 1 times [2018-11-23 13:17:08,364 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 13:17:08,364 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 13:17:08,366 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 13:17:08,366 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 13:17:08,366 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 13:17:08,379 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 13:17:08,477 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 13:17:08,477 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 13:17:08,477 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-11-23 13:17:08,477 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-11-23 13:17:08,478 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-11-23 13:17:08,478 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2018-11-23 13:17:08,478 INFO L87 Difference]: Start difference. First operand 78575 states and 313492 transitions. Second operand 7 states. [2018-11-23 13:17:09,264 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 13:17:09,264 INFO L93 Difference]: Finished difference Result 104973 states and 415691 transitions. [2018-11-23 13:17:09,264 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-11-23 13:17:09,264 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 78 [2018-11-23 13:17:09,265 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 13:17:09,484 INFO L225 Difference]: With dead ends: 104973 [2018-11-23 13:17:09,484 INFO L226 Difference]: Without dead ends: 104443 [2018-11-23 13:17:09,484 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 49 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=81, Invalid=225, Unknown=0, NotChecked=0, Total=306 [2018-11-23 13:17:09,727 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 104443 states. [2018-11-23 13:17:10,857 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 104443 to 78092. [2018-11-23 13:17:10,857 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 78092 states. [2018-11-23 13:17:11,024 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 78092 states to 78092 states and 312344 transitions. [2018-11-23 13:17:11,024 INFO L78 Accepts]: Start accepts. Automaton has 78092 states and 312344 transitions. Word has length 78 [2018-11-23 13:17:11,025 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 13:17:11,025 INFO L480 AbstractCegarLoop]: Abstraction has 78092 states and 312344 transitions. [2018-11-23 13:17:11,025 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-11-23 13:17:11,025 INFO L276 IsEmpty]: Start isEmpty. Operand 78092 states and 312344 transitions. [2018-11-23 13:17:11,042 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 87 [2018-11-23 13:17:11,042 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 13:17:11,042 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 13:17:11,042 INFO L423 AbstractCegarLoop]: === Iteration 7 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 13:17:11,042 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 13:17:11,042 INFO L82 PathProgramCache]: Analyzing trace with hash 1434670274, now seen corresponding path program 1 times [2018-11-23 13:17:11,042 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 13:17:11,043 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 13:17:11,044 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 13:17:11,044 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 13:17:11,044 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 13:17:11,053 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 13:17:11,106 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 13:17:11,106 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 13:17:11,107 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-23 13:17:11,107 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-23 13:17:11,107 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-23 13:17:11,107 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-23 13:17:11,107 INFO L87 Difference]: Start difference. First operand 78092 states and 312344 transitions. Second operand 4 states. [2018-11-23 13:17:11,493 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 13:17:11,493 INFO L93 Difference]: Finished difference Result 85627 states and 342574 transitions. [2018-11-23 13:17:11,494 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-23 13:17:11,494 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 86 [2018-11-23 13:17:11,494 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 13:17:11,667 INFO L225 Difference]: With dead ends: 85627 [2018-11-23 13:17:11,668 INFO L226 Difference]: Without dead ends: 85627 [2018-11-23 13:17:11,668 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-23 13:17:11,878 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 85627 states. [2018-11-23 13:17:12,927 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 85627 to 80612. [2018-11-23 13:17:12,928 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 80612 states. [2018-11-23 13:17:13,099 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 80612 states to 80612 states and 322364 transitions. [2018-11-23 13:17:13,100 INFO L78 Accepts]: Start accepts. Automaton has 80612 states and 322364 transitions. Word has length 86 [2018-11-23 13:17:13,100 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 13:17:13,100 INFO L480 AbstractCegarLoop]: Abstraction has 80612 states and 322364 transitions. [2018-11-23 13:17:13,100 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-23 13:17:13,100 INFO L276 IsEmpty]: Start isEmpty. Operand 80612 states and 322364 transitions. [2018-11-23 13:17:13,116 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 87 [2018-11-23 13:17:13,117 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 13:17:13,117 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 13:17:13,117 INFO L423 AbstractCegarLoop]: === Iteration 8 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 13:17:13,117 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 13:17:13,117 INFO L82 PathProgramCache]: Analyzing trace with hash -1117486687, now seen corresponding path program 1 times [2018-11-23 13:17:13,117 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 13:17:13,117 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 13:17:13,119 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 13:17:13,119 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 13:17:13,119 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 13:17:13,130 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 13:17:13,311 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 13:17:13,311 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 13:17:13,311 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-11-23 13:17:13,311 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-11-23 13:17:13,311 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-11-23 13:17:13,311 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=25, Invalid=65, Unknown=0, NotChecked=0, Total=90 [2018-11-23 13:17:13,312 INFO L87 Difference]: Start difference. First operand 80612 states and 322364 transitions. Second operand 10 states. [2018-11-23 13:17:14,346 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 13:17:14,346 INFO L93 Difference]: Finished difference Result 111736 states and 437776 transitions. [2018-11-23 13:17:14,346 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-11-23 13:17:14,346 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 86 [2018-11-23 13:17:14,347 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 13:17:14,574 INFO L225 Difference]: With dead ends: 111736 [2018-11-23 13:17:14,575 INFO L226 Difference]: Without dead ends: 111381 [2018-11-23 13:17:14,575 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 4 SyntacticMatches, 1 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 85 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=136, Invalid=370, Unknown=0, NotChecked=0, Total=506 [2018-11-23 13:17:14,828 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 111381 states. [2018-11-23 13:17:16,086 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 111381 to 91754. [2018-11-23 13:17:16,086 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 91754 states. [2018-11-23 13:17:16,288 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 91754 states to 91754 states and 363901 transitions. [2018-11-23 13:17:16,288 INFO L78 Accepts]: Start accepts. Automaton has 91754 states and 363901 transitions. Word has length 86 [2018-11-23 13:17:16,288 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 13:17:16,288 INFO L480 AbstractCegarLoop]: Abstraction has 91754 states and 363901 transitions. [2018-11-23 13:17:16,288 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-11-23 13:17:16,288 INFO L276 IsEmpty]: Start isEmpty. Operand 91754 states and 363901 transitions. [2018-11-23 13:17:16,323 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 93 [2018-11-23 13:17:16,323 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 13:17:16,323 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 13:17:16,323 INFO L423 AbstractCegarLoop]: === Iteration 9 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 13:17:16,324 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 13:17:16,324 INFO L82 PathProgramCache]: Analyzing trace with hash -683354241, now seen corresponding path program 1 times [2018-11-23 13:17:16,324 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 13:17:16,324 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 13:17:16,325 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 13:17:16,325 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 13:17:16,325 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 13:17:16,332 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 13:17:16,375 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 13:17:16,375 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 13:17:16,375 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-23 13:17:16,375 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-23 13:17:16,375 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-23 13:17:16,375 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-23 13:17:16,376 INFO L87 Difference]: Start difference. First operand 91754 states and 363901 transitions. Second operand 3 states. [2018-11-23 13:17:16,832 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 13:17:16,832 INFO L93 Difference]: Finished difference Result 110538 states and 435126 transitions. [2018-11-23 13:17:16,832 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-23 13:17:16,832 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 92 [2018-11-23 13:17:16,832 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 13:17:17,052 INFO L225 Difference]: With dead ends: 110538 [2018-11-23 13:17:17,052 INFO L226 Difference]: Without dead ends: 110538 [2018-11-23 13:17:17,053 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-23 13:17:17,721 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 110538 states. [2018-11-23 13:17:18,586 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 110538 to 89632. [2018-11-23 13:17:18,586 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 89632 states. [2018-11-23 13:17:18,777 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 89632 states to 89632 states and 351874 transitions. [2018-11-23 13:17:18,777 INFO L78 Accepts]: Start accepts. Automaton has 89632 states and 351874 transitions. Word has length 92 [2018-11-23 13:17:18,777 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 13:17:18,778 INFO L480 AbstractCegarLoop]: Abstraction has 89632 states and 351874 transitions. [2018-11-23 13:17:18,778 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-23 13:17:18,778 INFO L276 IsEmpty]: Start isEmpty. Operand 89632 states and 351874 transitions. [2018-11-23 13:17:18,811 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 94 [2018-11-23 13:17:18,811 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 13:17:18,811 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 13:17:18,811 INFO L423 AbstractCegarLoop]: === Iteration 10 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 13:17:18,812 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 13:17:18,812 INFO L82 PathProgramCache]: Analyzing trace with hash 192568783, now seen corresponding path program 1 times [2018-11-23 13:17:18,812 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 13:17:18,812 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 13:17:18,813 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 13:17:18,813 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 13:17:18,813 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 13:17:18,823 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 13:17:18,886 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 13:17:18,886 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 13:17:18,886 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-23 13:17:18,886 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-23 13:17:18,887 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-23 13:17:18,887 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-23 13:17:18,887 INFO L87 Difference]: Start difference. First operand 89632 states and 351874 transitions. Second operand 4 states. [2018-11-23 13:17:19,496 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 13:17:19,496 INFO L93 Difference]: Finished difference Result 119085 states and 458214 transitions. [2018-11-23 13:17:19,496 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-23 13:17:19,497 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 93 [2018-11-23 13:17:19,497 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 13:17:20,036 INFO L225 Difference]: With dead ends: 119085 [2018-11-23 13:17:20,036 INFO L226 Difference]: Without dead ends: 119085 [2018-11-23 13:17:20,036 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-23 13:17:20,287 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 119085 states. [2018-11-23 13:17:21,290 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 119085 to 103759. [2018-11-23 13:17:21,291 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 103759 states. [2018-11-23 13:17:21,517 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 103759 states to 103759 states and 402755 transitions. [2018-11-23 13:17:21,517 INFO L78 Accepts]: Start accepts. Automaton has 103759 states and 402755 transitions. Word has length 93 [2018-11-23 13:17:21,517 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 13:17:21,517 INFO L480 AbstractCegarLoop]: Abstraction has 103759 states and 402755 transitions. [2018-11-23 13:17:21,517 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-23 13:17:21,517 INFO L276 IsEmpty]: Start isEmpty. Operand 103759 states and 402755 transitions. [2018-11-23 13:17:21,567 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 94 [2018-11-23 13:17:21,567 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 13:17:21,567 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 13:17:21,567 INFO L423 AbstractCegarLoop]: === Iteration 11 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 13:17:21,567 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 13:17:21,568 INFO L82 PathProgramCache]: Analyzing trace with hash 203884910, now seen corresponding path program 1 times [2018-11-23 13:17:21,568 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 13:17:21,568 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 13:17:21,568 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 13:17:21,569 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 13:17:21,569 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 13:17:21,576 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 13:17:21,627 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 13:17:21,627 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 13:17:21,628 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-23 13:17:21,628 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-23 13:17:21,628 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-23 13:17:21,628 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-23 13:17:21,628 INFO L87 Difference]: Start difference. First operand 103759 states and 402755 transitions. Second operand 3 states. [2018-11-23 13:17:22,444 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 13:17:22,444 INFO L93 Difference]: Finished difference Result 107236 states and 414613 transitions. [2018-11-23 13:17:22,445 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-23 13:17:22,445 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 93 [2018-11-23 13:17:22,445 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 13:17:22,652 INFO L225 Difference]: With dead ends: 107236 [2018-11-23 13:17:22,652 INFO L226 Difference]: Without dead ends: 107236 [2018-11-23 13:17:22,652 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-23 13:17:22,902 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 107236 states. [2018-11-23 13:17:23,885 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 107236 to 106055. [2018-11-23 13:17:23,885 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 106055 states. [2018-11-23 13:17:24,116 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 106055 states to 106055 states and 410410 transitions. [2018-11-23 13:17:24,116 INFO L78 Accepts]: Start accepts. Automaton has 106055 states and 410410 transitions. Word has length 93 [2018-11-23 13:17:24,116 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 13:17:24,116 INFO L480 AbstractCegarLoop]: Abstraction has 106055 states and 410410 transitions. [2018-11-23 13:17:24,116 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-23 13:17:24,117 INFO L276 IsEmpty]: Start isEmpty. Operand 106055 states and 410410 transitions. [2018-11-23 13:17:24,162 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2018-11-23 13:17:24,162 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 13:17:24,162 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 13:17:24,162 INFO L423 AbstractCegarLoop]: === Iteration 12 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 13:17:24,163 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 13:17:24,163 INFO L82 PathProgramCache]: Analyzing trace with hash -1562608461, now seen corresponding path program 1 times [2018-11-23 13:17:24,163 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 13:17:24,163 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 13:17:24,164 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 13:17:24,164 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 13:17:24,165 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 13:17:24,172 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 13:17:24,226 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 13:17:24,226 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 13:17:24,226 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-23 13:17:24,226 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-23 13:17:24,226 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-23 13:17:24,227 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2018-11-23 13:17:24,227 INFO L87 Difference]: Start difference. First operand 106055 states and 410410 transitions. Second operand 6 states. [2018-11-23 13:17:25,515 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 13:17:25,515 INFO L93 Difference]: Finished difference Result 138332 states and 525656 transitions. [2018-11-23 13:17:25,516 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-11-23 13:17:25,516 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 95 [2018-11-23 13:17:25,516 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 13:17:25,786 INFO L225 Difference]: With dead ends: 138332 [2018-11-23 13:17:25,786 INFO L226 Difference]: Without dead ends: 137832 [2018-11-23 13:17:25,786 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2018-11-23 13:17:26,073 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 137832 states. [2018-11-23 13:17:27,771 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 137832 to 118845. [2018-11-23 13:17:27,771 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 118845 states. [2018-11-23 13:17:28,032 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 118845 states to 118845 states and 455877 transitions. [2018-11-23 13:17:28,032 INFO L78 Accepts]: Start accepts. Automaton has 118845 states and 455877 transitions. Word has length 95 [2018-11-23 13:17:28,032 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 13:17:28,032 INFO L480 AbstractCegarLoop]: Abstraction has 118845 states and 455877 transitions. [2018-11-23 13:17:28,032 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-23 13:17:28,032 INFO L276 IsEmpty]: Start isEmpty. Operand 118845 states and 455877 transitions. [2018-11-23 13:17:28,084 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2018-11-23 13:17:28,084 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 13:17:28,084 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 13:17:28,084 INFO L423 AbstractCegarLoop]: === Iteration 13 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 13:17:28,084 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 13:17:28,084 INFO L82 PathProgramCache]: Analyzing trace with hash -1551292334, now seen corresponding path program 1 times [2018-11-23 13:17:28,084 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 13:17:28,084 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 13:17:28,085 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 13:17:28,085 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 13:17:28,085 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 13:17:28,093 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 13:17:28,172 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 13:17:28,172 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 13:17:28,173 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-23 13:17:28,173 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-23 13:17:28,173 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-23 13:17:28,173 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-11-23 13:17:28,173 INFO L87 Difference]: Start difference. First operand 118845 states and 455877 transitions. Second operand 6 states. [2018-11-23 13:17:28,952 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 13:17:28,952 INFO L93 Difference]: Finished difference Result 133218 states and 498309 transitions. [2018-11-23 13:17:28,953 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-11-23 13:17:28,953 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 95 [2018-11-23 13:17:28,953 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 13:17:29,204 INFO L225 Difference]: With dead ends: 133218 [2018-11-23 13:17:29,204 INFO L226 Difference]: Without dead ends: 133218 [2018-11-23 13:17:29,204 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=26, Invalid=46, Unknown=0, NotChecked=0, Total=72 [2018-11-23 13:17:29,483 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 133218 states. [2018-11-23 13:17:34,238 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 133218 to 121746. [2018-11-23 13:17:34,239 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 121746 states. [2018-11-23 13:17:34,501 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 121746 states to 121746 states and 460619 transitions. [2018-11-23 13:17:34,501 INFO L78 Accepts]: Start accepts. Automaton has 121746 states and 460619 transitions. Word has length 95 [2018-11-23 13:17:34,501 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 13:17:34,501 INFO L480 AbstractCegarLoop]: Abstraction has 121746 states and 460619 transitions. [2018-11-23 13:17:34,501 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-23 13:17:34,501 INFO L276 IsEmpty]: Start isEmpty. Operand 121746 states and 460619 transitions. [2018-11-23 13:17:34,554 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2018-11-23 13:17:34,554 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 13:17:34,554 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 13:17:34,554 INFO L423 AbstractCegarLoop]: === Iteration 14 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 13:17:34,554 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 13:17:34,555 INFO L82 PathProgramCache]: Analyzing trace with hash -1520272527, now seen corresponding path program 1 times [2018-11-23 13:17:34,555 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 13:17:34,555 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 13:17:34,556 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 13:17:34,556 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 13:17:34,556 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 13:17:34,563 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 13:17:34,625 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 13:17:34,626 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 13:17:34,626 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-23 13:17:34,626 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-23 13:17:34,626 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-23 13:17:34,626 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-23 13:17:34,627 INFO L87 Difference]: Start difference. First operand 121746 states and 460619 transitions. Second operand 5 states. [2018-11-23 13:17:35,372 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 13:17:35,372 INFO L93 Difference]: Finished difference Result 151316 states and 564452 transitions. [2018-11-23 13:17:35,372 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-11-23 13:17:35,373 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 95 [2018-11-23 13:17:35,373 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 13:17:35,666 INFO L225 Difference]: With dead ends: 151316 [2018-11-23 13:17:35,666 INFO L226 Difference]: Without dead ends: 151316 [2018-11-23 13:17:35,666 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 3 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2018-11-23 13:17:35,969 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 151316 states. [2018-11-23 13:17:37,597 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 151316 to 140748. [2018-11-23 13:17:37,597 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 140748 states. [2018-11-23 13:17:37,900 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 140748 states to 140748 states and 524720 transitions. [2018-11-23 13:17:37,900 INFO L78 Accepts]: Start accepts. Automaton has 140748 states and 524720 transitions. Word has length 95 [2018-11-23 13:17:37,900 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 13:17:37,900 INFO L480 AbstractCegarLoop]: Abstraction has 140748 states and 524720 transitions. [2018-11-23 13:17:37,900 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-23 13:17:37,900 INFO L276 IsEmpty]: Start isEmpty. Operand 140748 states and 524720 transitions. [2018-11-23 13:17:37,961 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2018-11-23 13:17:37,961 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 13:17:37,961 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 13:17:37,961 INFO L423 AbstractCegarLoop]: === Iteration 15 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 13:17:37,961 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 13:17:37,961 INFO L82 PathProgramCache]: Analyzing trace with hash 1777622416, now seen corresponding path program 1 times [2018-11-23 13:17:37,961 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 13:17:37,961 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 13:17:37,962 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 13:17:37,963 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 13:17:37,963 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 13:17:37,970 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 13:17:38,019 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 13:17:38,019 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 13:17:38,019 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-23 13:17:38,020 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-23 13:17:38,020 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-23 13:17:38,020 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-23 13:17:38,020 INFO L87 Difference]: Start difference. First operand 140748 states and 524720 transitions. Second operand 5 states. [2018-11-23 13:17:39,040 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 13:17:39,040 INFO L93 Difference]: Finished difference Result 206315 states and 766646 transitions. [2018-11-23 13:17:39,041 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-11-23 13:17:39,041 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 95 [2018-11-23 13:17:39,041 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 13:17:39,470 INFO L225 Difference]: With dead ends: 206315 [2018-11-23 13:17:39,470 INFO L226 Difference]: Without dead ends: 206315 [2018-11-23 13:17:39,470 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 3 SyntacticMatches, 3 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2018-11-23 13:17:39,842 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 206315 states. [2018-11-23 13:17:42,226 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 206315 to 175062. [2018-11-23 13:17:42,226 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 175062 states. [2018-11-23 13:17:42,624 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 175062 states to 175062 states and 650421 transitions. [2018-11-23 13:17:42,625 INFO L78 Accepts]: Start accepts. Automaton has 175062 states and 650421 transitions. Word has length 95 [2018-11-23 13:17:42,625 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 13:17:42,625 INFO L480 AbstractCegarLoop]: Abstraction has 175062 states and 650421 transitions. [2018-11-23 13:17:42,625 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-23 13:17:42,625 INFO L276 IsEmpty]: Start isEmpty. Operand 175062 states and 650421 transitions. [2018-11-23 13:17:42,698 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2018-11-23 13:17:42,698 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 13:17:42,698 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 13:17:42,699 INFO L423 AbstractCegarLoop]: === Iteration 16 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 13:17:42,699 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 13:17:42,699 INFO L82 PathProgramCache]: Analyzing trace with hash -19328943, now seen corresponding path program 1 times [2018-11-23 13:17:42,699 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 13:17:42,699 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 13:17:42,700 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 13:17:42,700 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 13:17:42,700 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 13:17:42,707 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 13:17:42,766 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 13:17:42,766 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 13:17:42,766 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-23 13:17:42,767 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-23 13:17:42,767 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-23 13:17:42,767 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2018-11-23 13:17:42,767 INFO L87 Difference]: Start difference. First operand 175062 states and 650421 transitions. Second operand 6 states. [2018-11-23 13:17:42,944 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 13:17:42,944 INFO L93 Difference]: Finished difference Result 54182 states and 168525 transitions. [2018-11-23 13:17:42,944 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-11-23 13:17:42,944 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 95 [2018-11-23 13:17:42,944 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 13:17:42,996 INFO L225 Difference]: With dead ends: 54182 [2018-11-23 13:17:42,996 INFO L226 Difference]: Without dead ends: 44774 [2018-11-23 13:17:42,996 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=42, Unknown=0, NotChecked=0, Total=72 [2018-11-23 13:17:43,051 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 44774 states. [2018-11-23 13:17:43,730 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 44774 to 38449. [2018-11-23 13:17:43,730 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 38449 states. [2018-11-23 13:17:43,782 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 38449 states to 38449 states and 117604 transitions. [2018-11-23 13:17:43,782 INFO L78 Accepts]: Start accepts. Automaton has 38449 states and 117604 transitions. Word has length 95 [2018-11-23 13:17:43,783 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 13:17:43,783 INFO L480 AbstractCegarLoop]: Abstraction has 38449 states and 117604 transitions. [2018-11-23 13:17:43,783 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-23 13:17:43,783 INFO L276 IsEmpty]: Start isEmpty. Operand 38449 states and 117604 transitions. [2018-11-23 13:17:43,809 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 99 [2018-11-23 13:17:43,809 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 13:17:43,809 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 13:17:43,809 INFO L423 AbstractCegarLoop]: === Iteration 17 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 13:17:43,809 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 13:17:43,809 INFO L82 PathProgramCache]: Analyzing trace with hash 3877787, now seen corresponding path program 1 times [2018-11-23 13:17:43,809 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 13:17:43,809 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 13:17:43,811 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 13:17:43,811 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 13:17:43,811 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 13:17:43,817 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 13:17:43,884 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 13:17:43,885 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 13:17:43,885 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-23 13:17:43,885 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-23 13:17:43,885 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-23 13:17:43,885 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-23 13:17:43,885 INFO L87 Difference]: Start difference. First operand 38449 states and 117604 transitions. Second operand 5 states. [2018-11-23 13:17:44,096 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 13:17:44,096 INFO L93 Difference]: Finished difference Result 43859 states and 134447 transitions. [2018-11-23 13:17:44,096 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-11-23 13:17:44,097 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 98 [2018-11-23 13:17:44,097 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 13:17:44,144 INFO L225 Difference]: With dead ends: 43859 [2018-11-23 13:17:44,144 INFO L226 Difference]: Without dead ends: 43859 [2018-11-23 13:17:44,145 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2018-11-23 13:17:44,201 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 43859 states. [2018-11-23 13:17:44,503 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 43859 to 38564. [2018-11-23 13:17:44,504 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 38564 states. [2018-11-23 13:17:44,556 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 38564 states to 38564 states and 117926 transitions. [2018-11-23 13:17:44,557 INFO L78 Accepts]: Start accepts. Automaton has 38564 states and 117926 transitions. Word has length 98 [2018-11-23 13:17:44,557 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 13:17:44,557 INFO L480 AbstractCegarLoop]: Abstraction has 38564 states and 117926 transitions. [2018-11-23 13:17:44,557 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-23 13:17:44,557 INFO L276 IsEmpty]: Start isEmpty. Operand 38564 states and 117926 transitions. [2018-11-23 13:17:44,583 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 99 [2018-11-23 13:17:44,583 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 13:17:44,583 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 13:17:44,583 INFO L423 AbstractCegarLoop]: === Iteration 18 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 13:17:44,583 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 13:17:44,583 INFO L82 PathProgramCache]: Analyzing trace with hash 1746688122, now seen corresponding path program 1 times [2018-11-23 13:17:44,583 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 13:17:44,583 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 13:17:44,584 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 13:17:44,584 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 13:17:44,584 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 13:17:44,590 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 13:17:44,669 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 13:17:44,669 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 13:17:44,669 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-23 13:17:44,669 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-23 13:17:44,669 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-23 13:17:44,669 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-23 13:17:44,670 INFO L87 Difference]: Start difference. First operand 38564 states and 117926 transitions. Second operand 5 states. [2018-11-23 13:17:44,857 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 13:17:44,857 INFO L93 Difference]: Finished difference Result 49646 states and 153106 transitions. [2018-11-23 13:17:44,858 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-11-23 13:17:44,858 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 98 [2018-11-23 13:17:44,858 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 13:17:44,913 INFO L225 Difference]: With dead ends: 49646 [2018-11-23 13:17:44,913 INFO L226 Difference]: Without dead ends: 49646 [2018-11-23 13:17:44,913 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=14, Invalid=16, Unknown=0, NotChecked=0, Total=30 [2018-11-23 13:17:44,974 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 49646 states. [2018-11-23 13:17:45,293 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 49646 to 39434. [2018-11-23 13:17:45,294 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 39434 states. [2018-11-23 13:17:45,347 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 39434 states to 39434 states and 120372 transitions. [2018-11-23 13:17:45,347 INFO L78 Accepts]: Start accepts. Automaton has 39434 states and 120372 transitions. Word has length 98 [2018-11-23 13:17:45,347 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 13:17:45,347 INFO L480 AbstractCegarLoop]: Abstraction has 39434 states and 120372 transitions. [2018-11-23 13:17:45,348 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-23 13:17:45,348 INFO L276 IsEmpty]: Start isEmpty. Operand 39434 states and 120372 transitions. [2018-11-23 13:17:45,387 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 99 [2018-11-23 13:17:45,387 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 13:17:45,387 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 13:17:45,387 INFO L423 AbstractCegarLoop]: === Iteration 19 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 13:17:45,387 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 13:17:45,387 INFO L82 PathProgramCache]: Analyzing trace with hash -50263237, now seen corresponding path program 1 times [2018-11-23 13:17:45,387 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 13:17:45,387 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 13:17:45,389 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 13:17:45,389 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 13:17:45,389 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 13:17:45,395 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 13:17:45,521 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 13:17:45,522 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 13:17:45,522 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-23 13:17:45,522 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-23 13:17:45,522 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-23 13:17:45,522 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2018-11-23 13:17:45,522 INFO L87 Difference]: Start difference. First operand 39434 states and 120372 transitions. Second operand 6 states. [2018-11-23 13:17:45,981 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 13:17:45,981 INFO L93 Difference]: Finished difference Result 78743 states and 240695 transitions. [2018-11-23 13:17:45,981 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-11-23 13:17:45,981 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 98 [2018-11-23 13:17:45,981 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 13:17:46,070 INFO L225 Difference]: With dead ends: 78743 [2018-11-23 13:17:46,070 INFO L226 Difference]: Without dead ends: 78148 [2018-11-23 13:17:46,070 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 4 SyntacticMatches, 1 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=54, Invalid=102, Unknown=0, NotChecked=0, Total=156 [2018-11-23 13:17:46,158 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 78148 states. [2018-11-23 13:17:46,685 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 78148 to 42604. [2018-11-23 13:17:46,685 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 42604 states. [2018-11-23 13:17:46,742 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 42604 states to 42604 states and 129633 transitions. [2018-11-23 13:17:46,742 INFO L78 Accepts]: Start accepts. Automaton has 42604 states and 129633 transitions. Word has length 98 [2018-11-23 13:17:46,742 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 13:17:46,742 INFO L480 AbstractCegarLoop]: Abstraction has 42604 states and 129633 transitions. [2018-11-23 13:17:46,742 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-23 13:17:46,743 INFO L276 IsEmpty]: Start isEmpty. Operand 42604 states and 129633 transitions. [2018-11-23 13:17:46,777 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 121 [2018-11-23 13:17:46,777 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 13:17:46,777 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 13:17:46,777 INFO L423 AbstractCegarLoop]: === Iteration 20 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 13:17:46,777 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 13:17:46,778 INFO L82 PathProgramCache]: Analyzing trace with hash -1781331274, now seen corresponding path program 1 times [2018-11-23 13:17:46,778 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 13:17:46,778 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 13:17:46,778 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 13:17:46,778 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 13:17:46,778 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 13:17:46,786 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 13:17:46,832 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 13:17:46,833 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 13:17:46,833 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-23 13:17:46,833 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-23 13:17:46,833 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-23 13:17:46,833 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2018-11-23 13:17:46,834 INFO L87 Difference]: Start difference. First operand 42604 states and 129633 transitions. Second operand 4 states. [2018-11-23 13:17:47,218 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 13:17:47,218 INFO L93 Difference]: Finished difference Result 62480 states and 187989 transitions. [2018-11-23 13:17:47,218 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-23 13:17:47,218 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 120 [2018-11-23 13:17:47,218 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 13:17:47,286 INFO L225 Difference]: With dead ends: 62480 [2018-11-23 13:17:47,286 INFO L226 Difference]: Without dead ends: 62480 [2018-11-23 13:17:47,287 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2018-11-23 13:17:47,360 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 62480 states. [2018-11-23 13:17:47,790 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 62480 to 48289. [2018-11-23 13:17:47,790 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 48289 states. [2018-11-23 13:17:47,856 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 48289 states to 48289 states and 145076 transitions. [2018-11-23 13:17:47,856 INFO L78 Accepts]: Start accepts. Automaton has 48289 states and 145076 transitions. Word has length 120 [2018-11-23 13:17:47,856 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 13:17:47,856 INFO L480 AbstractCegarLoop]: Abstraction has 48289 states and 145076 transitions. [2018-11-23 13:17:47,856 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-23 13:17:47,856 INFO L276 IsEmpty]: Start isEmpty. Operand 48289 states and 145076 transitions. [2018-11-23 13:17:47,895 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 121 [2018-11-23 13:17:47,895 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 13:17:47,895 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 13:17:47,895 INFO L423 AbstractCegarLoop]: === Iteration 21 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 13:17:47,895 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 13:17:47,895 INFO L82 PathProgramCache]: Analyzing trace with hash 31090648, now seen corresponding path program 2 times [2018-11-23 13:17:47,895 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 13:17:47,895 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 13:17:47,896 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 13:17:47,896 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 13:17:47,896 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 13:17:47,902 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 13:17:47,966 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 13:17:47,966 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 13:17:47,966 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-23 13:17:47,967 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-23 13:17:47,967 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-23 13:17:47,967 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-23 13:17:47,967 INFO L87 Difference]: Start difference. First operand 48289 states and 145076 transitions. Second operand 4 states. [2018-11-23 13:17:48,142 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 13:17:48,142 INFO L93 Difference]: Finished difference Result 50299 states and 150564 transitions. [2018-11-23 13:17:48,142 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-23 13:17:48,142 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 120 [2018-11-23 13:17:48,142 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 13:17:48,196 INFO L225 Difference]: With dead ends: 50299 [2018-11-23 13:17:48,196 INFO L226 Difference]: Without dead ends: 50299 [2018-11-23 13:17:48,197 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-23 13:17:48,259 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 50299 states. [2018-11-23 13:17:48,641 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 50299 to 47504. [2018-11-23 13:17:48,641 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 47504 states. [2018-11-23 13:17:48,704 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 47504 states to 47504 states and 142478 transitions. [2018-11-23 13:17:48,704 INFO L78 Accepts]: Start accepts. Automaton has 47504 states and 142478 transitions. Word has length 120 [2018-11-23 13:17:48,704 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 13:17:48,704 INFO L480 AbstractCegarLoop]: Abstraction has 47504 states and 142478 transitions. [2018-11-23 13:17:48,704 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-23 13:17:48,704 INFO L276 IsEmpty]: Start isEmpty. Operand 47504 states and 142478 transitions. [2018-11-23 13:17:48,741 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 123 [2018-11-23 13:17:48,741 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 13:17:48,741 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 13:17:48,741 INFO L423 AbstractCegarLoop]: === Iteration 22 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 13:17:48,742 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 13:17:48,742 INFO L82 PathProgramCache]: Analyzing trace with hash -1310233714, now seen corresponding path program 1 times [2018-11-23 13:17:48,742 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 13:17:48,742 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 13:17:48,743 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 13:17:48,743 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-23 13:17:48,743 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 13:17:48,749 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 13:17:48,830 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 13:17:48,830 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 13:17:48,830 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-11-23 13:17:48,830 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-11-23 13:17:48,830 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-11-23 13:17:48,830 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=22, Unknown=0, NotChecked=0, Total=42 [2018-11-23 13:17:48,830 INFO L87 Difference]: Start difference. First operand 47504 states and 142478 transitions. Second operand 7 states. [2018-11-23 13:17:49,467 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 13:17:49,468 INFO L93 Difference]: Finished difference Result 62172 states and 185188 transitions. [2018-11-23 13:17:49,468 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-11-23 13:17:49,468 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 122 [2018-11-23 13:17:49,468 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 13:17:49,527 INFO L225 Difference]: With dead ends: 62172 [2018-11-23 13:17:49,527 INFO L226 Difference]: Without dead ends: 62172 [2018-11-23 13:17:49,527 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=20, Invalid=22, Unknown=0, NotChecked=0, Total=42 [2018-11-23 13:17:49,599 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 62172 states. [2018-11-23 13:17:50,020 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 62172 to 49479. [2018-11-23 13:17:50,020 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 49479 states. [2018-11-23 13:17:50,091 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 49479 states to 49479 states and 148578 transitions. [2018-11-23 13:17:50,091 INFO L78 Accepts]: Start accepts. Automaton has 49479 states and 148578 transitions. Word has length 122 [2018-11-23 13:17:50,091 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 13:17:50,091 INFO L480 AbstractCegarLoop]: Abstraction has 49479 states and 148578 transitions. [2018-11-23 13:17:50,091 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-11-23 13:17:50,091 INFO L276 IsEmpty]: Start isEmpty. Operand 49479 states and 148578 transitions. [2018-11-23 13:17:50,136 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 123 [2018-11-23 13:17:50,136 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 13:17:50,136 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 13:17:50,136 INFO L423 AbstractCegarLoop]: === Iteration 23 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 13:17:50,136 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 13:17:50,136 INFO L82 PathProgramCache]: Analyzing trace with hash 1496518141, now seen corresponding path program 1 times [2018-11-23 13:17:50,137 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 13:17:50,137 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 13:17:50,137 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 13:17:50,137 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 13:17:50,137 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 13:17:50,144 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 13:17:50,221 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 13:17:50,221 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 13:17:50,221 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-23 13:17:50,221 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-23 13:17:50,221 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-23 13:17:50,221 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-23 13:17:50,222 INFO L87 Difference]: Start difference. First operand 49479 states and 148578 transitions. Second operand 5 states. [2018-11-23 13:17:50,420 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 13:17:50,420 INFO L93 Difference]: Finished difference Result 58964 states and 176786 transitions. [2018-11-23 13:17:50,421 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-11-23 13:17:50,421 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 122 [2018-11-23 13:17:50,421 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 13:17:50,485 INFO L225 Difference]: With dead ends: 58964 [2018-11-23 13:17:50,485 INFO L226 Difference]: Without dead ends: 58964 [2018-11-23 13:17:50,485 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2018-11-23 13:17:50,555 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 58964 states. [2018-11-23 13:17:50,986 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 58964 to 49799. [2018-11-23 13:17:50,986 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 49799 states. [2018-11-23 13:17:51,058 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 49799 states to 49799 states and 149269 transitions. [2018-11-23 13:17:51,058 INFO L78 Accepts]: Start accepts. Automaton has 49799 states and 149269 transitions. Word has length 122 [2018-11-23 13:17:51,059 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 13:17:51,059 INFO L480 AbstractCegarLoop]: Abstraction has 49799 states and 149269 transitions. [2018-11-23 13:17:51,059 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-23 13:17:51,059 INFO L276 IsEmpty]: Start isEmpty. Operand 49799 states and 149269 transitions. [2018-11-23 13:17:51,104 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 123 [2018-11-23 13:17:51,104 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 13:17:51,104 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 13:17:51,104 INFO L423 AbstractCegarLoop]: === Iteration 24 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 13:17:51,104 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 13:17:51,104 INFO L82 PathProgramCache]: Analyzing trace with hash 1847318078, now seen corresponding path program 1 times [2018-11-23 13:17:51,104 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 13:17:51,105 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 13:17:51,105 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 13:17:51,105 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 13:17:51,105 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 13:17:51,112 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 13:17:51,172 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 13:17:51,172 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 13:17:51,172 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-23 13:17:51,172 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-23 13:17:51,173 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-23 13:17:51,173 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-23 13:17:51,173 INFO L87 Difference]: Start difference. First operand 49799 states and 149269 transitions. Second operand 5 states. [2018-11-23 13:17:51,657 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 13:17:51,658 INFO L93 Difference]: Finished difference Result 76094 states and 228745 transitions. [2018-11-23 13:17:51,658 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-11-23 13:17:51,658 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 122 [2018-11-23 13:17:51,658 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 13:17:51,741 INFO L225 Difference]: With dead ends: 76094 [2018-11-23 13:17:51,741 INFO L226 Difference]: Without dead ends: 75704 [2018-11-23 13:17:51,741 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 6 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2018-11-23 13:17:51,828 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 75704 states. [2018-11-23 13:17:52,458 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 75704 to 55389. [2018-11-23 13:17:52,459 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 55389 states. [2018-11-23 13:17:52,537 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 55389 states to 55389 states and 166466 transitions. [2018-11-23 13:17:52,537 INFO L78 Accepts]: Start accepts. Automaton has 55389 states and 166466 transitions. Word has length 122 [2018-11-23 13:17:52,537 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 13:17:52,537 INFO L480 AbstractCegarLoop]: Abstraction has 55389 states and 166466 transitions. [2018-11-23 13:17:52,537 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-23 13:17:52,537 INFO L276 IsEmpty]: Start isEmpty. Operand 55389 states and 166466 transitions. [2018-11-23 13:17:52,587 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 123 [2018-11-23 13:17:52,587 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 13:17:52,587 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 13:17:52,587 INFO L423 AbstractCegarLoop]: === Iteration 25 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 13:17:52,587 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 13:17:52,588 INFO L82 PathProgramCache]: Analyzing trace with hash 1878337885, now seen corresponding path program 1 times [2018-11-23 13:17:52,588 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 13:17:52,588 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 13:17:52,589 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 13:17:52,589 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 13:17:52,589 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 13:17:52,594 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 13:17:52,680 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 13:17:52,680 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 13:17:52,680 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-23 13:17:52,680 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-23 13:17:52,681 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-23 13:17:52,681 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2018-11-23 13:17:52,681 INFO L87 Difference]: Start difference. First operand 55389 states and 166466 transitions. Second operand 6 states. [2018-11-23 13:17:52,898 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 13:17:52,898 INFO L93 Difference]: Finished difference Result 55453 states and 166098 transitions. [2018-11-23 13:17:52,899 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-11-23 13:17:52,899 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 122 [2018-11-23 13:17:52,899 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 13:17:52,957 INFO L225 Difference]: With dead ends: 55453 [2018-11-23 13:17:52,958 INFO L226 Difference]: Without dead ends: 55453 [2018-11-23 13:17:52,958 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=16, Invalid=26, Unknown=0, NotChecked=0, Total=42 [2018-11-23 13:17:53,024 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 55453 states. [2018-11-23 13:17:53,470 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 55453 to 49129. [2018-11-23 13:17:53,470 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 49129 states. [2018-11-23 13:17:53,535 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 49129 states to 49129 states and 146817 transitions. [2018-11-23 13:17:53,535 INFO L78 Accepts]: Start accepts. Automaton has 49129 states and 146817 transitions. Word has length 122 [2018-11-23 13:17:53,535 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 13:17:53,535 INFO L480 AbstractCegarLoop]: Abstraction has 49129 states and 146817 transitions. [2018-11-23 13:17:53,535 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-23 13:17:53,535 INFO L276 IsEmpty]: Start isEmpty. Operand 49129 states and 146817 transitions. [2018-11-23 13:17:53,573 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 125 [2018-11-23 13:17:53,573 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 13:17:53,573 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 13:17:53,573 INFO L423 AbstractCegarLoop]: === Iteration 26 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 13:17:53,574 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 13:17:53,574 INFO L82 PathProgramCache]: Analyzing trace with hash -866231605, now seen corresponding path program 1 times [2018-11-23 13:17:53,574 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 13:17:53,574 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 13:17:53,574 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 13:17:53,575 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 13:17:53,575 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 13:17:53,581 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 13:17:53,635 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 13:17:53,635 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 13:17:53,635 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-23 13:17:53,635 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-23 13:17:53,635 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-23 13:17:53,635 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-23 13:17:53,635 INFO L87 Difference]: Start difference. First operand 49129 states and 146817 transitions. Second operand 4 states. [2018-11-23 13:17:53,904 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 13:17:53,904 INFO L93 Difference]: Finished difference Result 56119 states and 167499 transitions. [2018-11-23 13:17:53,904 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-23 13:17:53,904 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 124 [2018-11-23 13:17:53,904 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 13:17:53,964 INFO L225 Difference]: With dead ends: 56119 [2018-11-23 13:17:53,964 INFO L226 Difference]: Without dead ends: 55884 [2018-11-23 13:17:53,965 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-11-23 13:17:54,033 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 55884 states. [2018-11-23 13:17:54,460 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 55884 to 50674. [2018-11-23 13:17:54,461 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 50674 states. [2018-11-23 13:17:54,533 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 50674 states to 50674 states and 151213 transitions. [2018-11-23 13:17:54,534 INFO L78 Accepts]: Start accepts. Automaton has 50674 states and 151213 transitions. Word has length 124 [2018-11-23 13:17:54,534 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 13:17:54,534 INFO L480 AbstractCegarLoop]: Abstraction has 50674 states and 151213 transitions. [2018-11-23 13:17:54,534 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-23 13:17:54,534 INFO L276 IsEmpty]: Start isEmpty. Operand 50674 states and 151213 transitions. [2018-11-23 13:17:54,580 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 125 [2018-11-23 13:17:54,580 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 13:17:54,580 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 13:17:54,580 INFO L423 AbstractCegarLoop]: === Iteration 27 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 13:17:54,580 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 13:17:54,580 INFO L82 PathProgramCache]: Analyzing trace with hash 95382412, now seen corresponding path program 1 times [2018-11-23 13:17:54,580 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 13:17:54,580 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 13:17:54,581 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 13:17:54,581 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 13:17:54,581 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 13:17:54,589 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 13:17:54,684 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 13:17:54,684 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 13:17:54,684 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-11-23 13:17:54,684 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-11-23 13:17:54,684 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-11-23 13:17:54,685 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=68, Unknown=0, NotChecked=0, Total=90 [2018-11-23 13:17:54,685 INFO L87 Difference]: Start difference. First operand 50674 states and 151213 transitions. Second operand 10 states. [2018-11-23 13:17:55,388 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 13:17:55,389 INFO L93 Difference]: Finished difference Result 63627 states and 190219 transitions. [2018-11-23 13:17:55,389 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-11-23 13:17:55,389 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 124 [2018-11-23 13:17:55,389 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 13:17:55,456 INFO L225 Difference]: With dead ends: 63627 [2018-11-23 13:17:55,456 INFO L226 Difference]: Without dead ends: 63627 [2018-11-23 13:17:55,456 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 29 GetRequests, 5 SyntacticMatches, 4 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 67 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=96, Invalid=366, Unknown=0, NotChecked=0, Total=462 [2018-11-23 13:17:55,530 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 63627 states. [2018-11-23 13:17:56,013 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 63627 to 56024. [2018-11-23 13:17:56,013 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 56024 states. [2018-11-23 13:17:56,093 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 56024 states to 56024 states and 167578 transitions. [2018-11-23 13:17:56,093 INFO L78 Accepts]: Start accepts. Automaton has 56024 states and 167578 transitions. Word has length 124 [2018-11-23 13:17:56,093 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 13:17:56,093 INFO L480 AbstractCegarLoop]: Abstraction has 56024 states and 167578 transitions. [2018-11-23 13:17:56,093 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-11-23 13:17:56,093 INFO L276 IsEmpty]: Start isEmpty. Operand 56024 states and 167578 transitions. [2018-11-23 13:17:56,143 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 125 [2018-11-23 13:17:56,143 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 13:17:56,143 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 13:17:56,144 INFO L423 AbstractCegarLoop]: === Iteration 28 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 13:17:56,144 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 13:17:56,144 INFO L82 PathProgramCache]: Analyzing trace with hash 1340146893, now seen corresponding path program 1 times [2018-11-23 13:17:56,144 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 13:17:56,144 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 13:17:56,145 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 13:17:56,145 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 13:17:56,145 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 13:17:56,152 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 13:17:56,227 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 13:17:56,227 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 13:17:56,227 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-23 13:17:56,227 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-23 13:17:56,227 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-23 13:17:56,227 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2018-11-23 13:17:56,228 INFO L87 Difference]: Start difference. First operand 56024 states and 167578 transitions. Second operand 5 states. [2018-11-23 13:17:56,377 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 13:17:56,377 INFO L93 Difference]: Finished difference Result 56024 states and 167514 transitions. [2018-11-23 13:17:56,378 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-23 13:17:56,378 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 124 [2018-11-23 13:17:56,378 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 13:17:56,437 INFO L225 Difference]: With dead ends: 56024 [2018-11-23 13:17:56,438 INFO L226 Difference]: Without dead ends: 56024 [2018-11-23 13:17:56,438 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2018-11-23 13:17:56,507 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 56024 states. [2018-11-23 13:17:56,929 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 56024 to 56024. [2018-11-23 13:17:56,929 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 56024 states. [2018-11-23 13:17:57,008 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 56024 states to 56024 states and 167514 transitions. [2018-11-23 13:17:57,009 INFO L78 Accepts]: Start accepts. Automaton has 56024 states and 167514 transitions. Word has length 124 [2018-11-23 13:17:57,009 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 13:17:57,009 INFO L480 AbstractCegarLoop]: Abstraction has 56024 states and 167514 transitions. [2018-11-23 13:17:57,009 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-23 13:17:57,009 INFO L276 IsEmpty]: Start isEmpty. Operand 56024 states and 167514 transitions. [2018-11-23 13:17:57,060 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 125 [2018-11-23 13:17:57,060 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 13:17:57,060 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 13:17:57,060 INFO L423 AbstractCegarLoop]: === Iteration 29 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 13:17:57,060 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 13:17:57,060 INFO L82 PathProgramCache]: Analyzing trace with hash -467307570, now seen corresponding path program 1 times [2018-11-23 13:17:57,060 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 13:17:57,060 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 13:17:57,061 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 13:17:57,061 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 13:17:57,061 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 13:17:57,066 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 13:17:57,082 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 13:17:57,082 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 13:17:57,082 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-23 13:17:57,083 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-23 13:17:57,083 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-23 13:17:57,083 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-23 13:17:57,083 INFO L87 Difference]: Start difference. First operand 56024 states and 167514 transitions. Second operand 3 states. [2018-11-23 13:17:57,208 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 13:17:57,208 INFO L93 Difference]: Finished difference Result 56024 states and 167450 transitions. [2018-11-23 13:17:57,208 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-23 13:17:57,208 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 124 [2018-11-23 13:17:57,208 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 13:17:57,270 INFO L225 Difference]: With dead ends: 56024 [2018-11-23 13:17:57,270 INFO L226 Difference]: Without dead ends: 56024 [2018-11-23 13:17:57,270 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-23 13:17:57,337 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 56024 states. [2018-11-23 13:17:57,836 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 56024 to 56024. [2018-11-23 13:17:57,836 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 56024 states. [2018-11-23 13:17:57,915 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 56024 states to 56024 states and 167450 transitions. [2018-11-23 13:17:57,915 INFO L78 Accepts]: Start accepts. Automaton has 56024 states and 167450 transitions. Word has length 124 [2018-11-23 13:17:57,915 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 13:17:57,915 INFO L480 AbstractCegarLoop]: Abstraction has 56024 states and 167450 transitions. [2018-11-23 13:17:57,915 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-23 13:17:57,915 INFO L276 IsEmpty]: Start isEmpty. Operand 56024 states and 167450 transitions. [2018-11-23 13:17:57,966 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 127 [2018-11-23 13:17:57,966 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 13:17:57,967 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 13:17:57,967 INFO L423 AbstractCegarLoop]: === Iteration 30 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 13:17:57,967 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 13:17:57,967 INFO L82 PathProgramCache]: Analyzing trace with hash 1639599003, now seen corresponding path program 1 times [2018-11-23 13:17:57,967 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 13:17:57,967 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 13:17:57,968 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 13:17:57,968 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 13:17:57,968 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 13:17:57,983 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 13:17:58,098 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 13:17:58,098 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 13:17:58,098 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-11-23 13:17:58,098 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-11-23 13:17:58,099 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-11-23 13:17:58,099 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=70, Unknown=0, NotChecked=0, Total=90 [2018-11-23 13:17:58,099 INFO L87 Difference]: Start difference. First operand 56024 states and 167450 transitions. Second operand 10 states. [2018-11-23 13:17:58,543 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 13:17:58,543 INFO L93 Difference]: Finished difference Result 73264 states and 219420 transitions. [2018-11-23 13:17:58,543 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-11-23 13:17:58,543 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 126 [2018-11-23 13:17:58,544 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 13:17:58,571 INFO L225 Difference]: With dead ends: 73264 [2018-11-23 13:17:58,571 INFO L226 Difference]: Without dead ends: 26544 [2018-11-23 13:17:58,571 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 20 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=65, Invalid=175, Unknown=0, NotChecked=0, Total=240 [2018-11-23 13:17:58,600 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 26544 states. [2018-11-23 13:17:58,787 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 26544 to 26100. [2018-11-23 13:17:58,787 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 26100 states. [2018-11-23 13:17:58,822 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26100 states to 26100 states and 73366 transitions. [2018-11-23 13:17:58,822 INFO L78 Accepts]: Start accepts. Automaton has 26100 states and 73366 transitions. Word has length 126 [2018-11-23 13:17:58,822 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 13:17:58,822 INFO L480 AbstractCegarLoop]: Abstraction has 26100 states and 73366 transitions. [2018-11-23 13:17:58,822 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-11-23 13:17:58,822 INFO L276 IsEmpty]: Start isEmpty. Operand 26100 states and 73366 transitions. [2018-11-23 13:17:58,852 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 127 [2018-11-23 13:17:58,853 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 13:17:58,853 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 13:17:58,853 INFO L423 AbstractCegarLoop]: === Iteration 31 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 13:17:58,853 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 13:17:58,853 INFO L82 PathProgramCache]: Analyzing trace with hash 936758017, now seen corresponding path program 2 times [2018-11-23 13:17:58,853 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 13:17:58,853 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 13:17:58,854 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 13:17:58,854 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 13:17:58,855 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 13:17:58,866 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 13:17:58,943 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 13:17:58,943 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 13:17:58,943 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-11-23 13:17:58,943 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-11-23 13:17:58,943 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-11-23 13:17:58,943 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=56, Unknown=0, NotChecked=0, Total=72 [2018-11-23 13:17:58,944 INFO L87 Difference]: Start difference. First operand 26100 states and 73366 transitions. Second operand 9 states. [2018-11-23 13:17:59,321 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 13:17:59,321 INFO L93 Difference]: Finished difference Result 36576 states and 104974 transitions. [2018-11-23 13:17:59,321 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-11-23 13:17:59,321 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 126 [2018-11-23 13:17:59,322 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 13:17:59,331 INFO L225 Difference]: With dead ends: 36576 [2018-11-23 13:17:59,331 INFO L226 Difference]: Without dead ends: 9451 [2018-11-23 13:17:59,331 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 14 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=55, Invalid=155, Unknown=0, NotChecked=0, Total=210 [2018-11-23 13:17:59,341 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9451 states. [2018-11-23 13:17:59,398 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9451 to 9451. [2018-11-23 13:17:59,399 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9451 states. [2018-11-23 13:17:59,410 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9451 states to 9451 states and 28684 transitions. [2018-11-23 13:17:59,410 INFO L78 Accepts]: Start accepts. Automaton has 9451 states and 28684 transitions. Word has length 126 [2018-11-23 13:17:59,411 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 13:17:59,411 INFO L480 AbstractCegarLoop]: Abstraction has 9451 states and 28684 transitions. [2018-11-23 13:17:59,411 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-11-23 13:17:59,411 INFO L276 IsEmpty]: Start isEmpty. Operand 9451 states and 28684 transitions. [2018-11-23 13:17:59,418 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 127 [2018-11-23 13:17:59,418 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 13:17:59,418 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 13:17:59,418 INFO L423 AbstractCegarLoop]: === Iteration 32 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 13:17:59,418 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 13:17:59,418 INFO L82 PathProgramCache]: Analyzing trace with hash 932642473, now seen corresponding path program 1 times [2018-11-23 13:17:59,418 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 13:17:59,418 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 13:17:59,419 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 13:17:59,419 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-23 13:17:59,419 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 13:17:59,424 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 13:17:59,504 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 13:17:59,504 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 13:17:59,504 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-23 13:17:59,504 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-23 13:17:59,504 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-23 13:17:59,505 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2018-11-23 13:17:59,505 INFO L87 Difference]: Start difference. First operand 9451 states and 28684 transitions. Second operand 6 states. [2018-11-23 13:17:59,613 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 13:17:59,613 INFO L93 Difference]: Finished difference Result 10627 states and 31914 transitions. [2018-11-23 13:17:59,613 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-11-23 13:17:59,613 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 126 [2018-11-23 13:17:59,613 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 13:17:59,623 INFO L225 Difference]: With dead ends: 10627 [2018-11-23 13:17:59,623 INFO L226 Difference]: Without dead ends: 10491 [2018-11-23 13:17:59,623 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=16, Invalid=26, Unknown=0, NotChecked=0, Total=42 [2018-11-23 13:17:59,635 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10491 states. [2018-11-23 13:17:59,706 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10491 to 9027. [2018-11-23 13:17:59,706 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9027 states. [2018-11-23 13:17:59,717 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9027 states to 9027 states and 27290 transitions. [2018-11-23 13:17:59,717 INFO L78 Accepts]: Start accepts. Automaton has 9027 states and 27290 transitions. Word has length 126 [2018-11-23 13:17:59,718 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 13:17:59,718 INFO L480 AbstractCegarLoop]: Abstraction has 9027 states and 27290 transitions. [2018-11-23 13:17:59,718 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-23 13:17:59,718 INFO L276 IsEmpty]: Start isEmpty. Operand 9027 states and 27290 transitions. [2018-11-23 13:17:59,724 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 127 [2018-11-23 13:17:59,725 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 13:17:59,725 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 13:17:59,725 INFO L423 AbstractCegarLoop]: === Iteration 33 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 13:17:59,725 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 13:17:59,725 INFO L82 PathProgramCache]: Analyzing trace with hash -1251034454, now seen corresponding path program 1 times [2018-11-23 13:17:59,725 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 13:17:59,725 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 13:17:59,726 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 13:17:59,726 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 13:17:59,726 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 13:17:59,731 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 13:17:59,803 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 13:17:59,804 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 13:17:59,804 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-23 13:17:59,804 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-23 13:17:59,804 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-23 13:17:59,804 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2018-11-23 13:17:59,805 INFO L87 Difference]: Start difference. First operand 9027 states and 27290 transitions. Second operand 5 states. [2018-11-23 13:17:59,921 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 13:17:59,921 INFO L93 Difference]: Finished difference Result 9583 states and 28683 transitions. [2018-11-23 13:17:59,921 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-23 13:17:59,921 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 126 [2018-11-23 13:17:59,921 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 13:17:59,930 INFO L225 Difference]: With dead ends: 9583 [2018-11-23 13:17:59,930 INFO L226 Difference]: Without dead ends: 9583 [2018-11-23 13:17:59,930 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 3 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2018-11-23 13:17:59,941 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9583 states. [2018-11-23 13:17:59,998 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9583 to 8379. [2018-11-23 13:17:59,998 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8379 states. [2018-11-23 13:18:00,008 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8379 states to 8379 states and 25244 transitions. [2018-11-23 13:18:00,008 INFO L78 Accepts]: Start accepts. Automaton has 8379 states and 25244 transitions. Word has length 126 [2018-11-23 13:18:00,008 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 13:18:00,008 INFO L480 AbstractCegarLoop]: Abstraction has 8379 states and 25244 transitions. [2018-11-23 13:18:00,008 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-23 13:18:00,009 INFO L276 IsEmpty]: Start isEmpty. Operand 8379 states and 25244 transitions. [2018-11-23 13:18:00,015 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 127 [2018-11-23 13:18:00,015 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 13:18:00,015 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 13:18:00,015 INFO L423 AbstractCegarLoop]: === Iteration 34 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 13:18:00,015 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 13:18:00,015 INFO L82 PathProgramCache]: Analyzing trace with hash 902437230, now seen corresponding path program 1 times [2018-11-23 13:18:00,015 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 13:18:00,015 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 13:18:00,016 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 13:18:00,016 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 13:18:00,016 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 13:18:00,022 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 13:18:00,119 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 13:18:00,120 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 13:18:00,120 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-11-23 13:18:00,120 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-11-23 13:18:00,120 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-11-23 13:18:00,120 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-11-23 13:18:00,120 INFO L87 Difference]: Start difference. First operand 8379 states and 25244 transitions. Second operand 7 states. [2018-11-23 13:18:00,206 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 13:18:00,206 INFO L93 Difference]: Finished difference Result 12912 states and 39077 transitions. [2018-11-23 13:18:00,206 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-11-23 13:18:00,206 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 126 [2018-11-23 13:18:00,206 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 13:18:00,219 INFO L225 Difference]: With dead ends: 12912 [2018-11-23 13:18:00,219 INFO L226 Difference]: Without dead ends: 12912 [2018-11-23 13:18:00,219 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 3 SyntacticMatches, 4 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=28, Invalid=62, Unknown=0, NotChecked=0, Total=90 [2018-11-23 13:18:00,233 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 12912 states. [2018-11-23 13:18:00,297 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 12912 to 7879. [2018-11-23 13:18:00,297 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7879 states. [2018-11-23 13:18:00,307 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7879 states to 7879 states and 23737 transitions. [2018-11-23 13:18:00,307 INFO L78 Accepts]: Start accepts. Automaton has 7879 states and 23737 transitions. Word has length 126 [2018-11-23 13:18:00,307 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 13:18:00,308 INFO L480 AbstractCegarLoop]: Abstraction has 7879 states and 23737 transitions. [2018-11-23 13:18:00,308 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-11-23 13:18:00,308 INFO L276 IsEmpty]: Start isEmpty. Operand 7879 states and 23737 transitions. [2018-11-23 13:18:00,314 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 127 [2018-11-23 13:18:00,314 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 13:18:00,314 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 13:18:00,314 INFO L423 AbstractCegarLoop]: === Iteration 35 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 13:18:00,314 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 13:18:00,315 INFO L82 PathProgramCache]: Analyzing trace with hash -1442229811, now seen corresponding path program 3 times [2018-11-23 13:18:00,315 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 13:18:00,315 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 13:18:00,316 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 13:18:00,316 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 13:18:00,316 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 13:18:00,328 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-23 13:18:00,342 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-23 13:18:00,386 INFO L469 BasicCegarLoop]: Counterexample might be feasible ----- class de.uni_freiburg.informatik.ultimate.modelcheckerutils.cfg.transformations.BlockEncodingBacktranslator [?] -1 [653] ULTIMATE.startENTRY-->L-1: Formula: (and (= |v_#NULL.offset_1| 0) (= |v_#NULL.base_1| 0)) InVars {} OutVars{#NULL.offset=|v_#NULL.offset_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] VAL [|#NULL.base|=0, |#NULL.offset|=0] [?] -1 [546] L-1-->L672: Formula: (= |v_#valid_7| (store |v_#valid_8| 0 0)) InVars {#valid=|v_#valid_8|} OutVars{#valid=|v_#valid_7|} AuxVars[] AssignedVars[#valid] VAL [|#NULL.base|=0, |#NULL.offset|=0] [?] -1 [637] L672-->L674: Formula: (= v_~__unbuffered_cnt~0_7 0) InVars {} OutVars{~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_7} AuxVars[] AssignedVars[~__unbuffered_cnt~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0] [?] -1 [775] L674-->L676: Formula: (= v_~__unbuffered_p0_EAX~0_2 0) InVars {} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_2} AuxVars[] AssignedVars[~__unbuffered_p0_EAX~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0] [?] -1 [529] L676-->L678: Formula: (= v_~__unbuffered_p1_EAX~0_2 0) InVars {} OutVars{~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_2} AuxVars[] AssignedVars[~__unbuffered_p1_EAX~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0] [?] -1 [723] L678-->L679: Formula: (= v_~__unbuffered_p2_EAX~0_2 0) InVars {} OutVars{~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_2} AuxVars[] AssignedVars[~__unbuffered_p2_EAX~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0] [?] -1 [800] L679-->L680: Formula: (= v_~__unbuffered_p2_EAX$flush_delayed~0_1 0) InVars {} OutVars{~__unbuffered_p2_EAX$flush_delayed~0=v_~__unbuffered_p2_EAX$flush_delayed~0_1} AuxVars[] AssignedVars[~__unbuffered_p2_EAX$flush_delayed~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX~0=0] [?] -1 [753] L680-->L681: Formula: (= v_~__unbuffered_p2_EAX$mem_tmp~0_1 0) InVars {} OutVars{~__unbuffered_p2_EAX$mem_tmp~0=v_~__unbuffered_p2_EAX$mem_tmp~0_1} AuxVars[] AssignedVars[~__unbuffered_p2_EAX$mem_tmp~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX~0=0] [?] -1 [575] L681-->L682: Formula: (= v_~__unbuffered_p2_EAX$r_buff0_thd0~0_1 0) InVars {} OutVars{~__unbuffered_p2_EAX$r_buff0_thd0~0=v_~__unbuffered_p2_EAX$r_buff0_thd0~0_1} AuxVars[] AssignedVars[~__unbuffered_p2_EAX$r_buff0_thd0~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX~0=0] [?] -1 [677] L682-->L683: Formula: (= v_~__unbuffered_p2_EAX$r_buff0_thd1~0_1 0) InVars {} OutVars{~__unbuffered_p2_EAX$r_buff0_thd1~0=v_~__unbuffered_p2_EAX$r_buff0_thd1~0_1} AuxVars[] AssignedVars[~__unbuffered_p2_EAX$r_buff0_thd1~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX~0=0] [?] -1 [636] L683-->L684: Formula: (= v_~__unbuffered_p2_EAX$r_buff0_thd2~0_1 0) InVars {} OutVars{~__unbuffered_p2_EAX$r_buff0_thd2~0=v_~__unbuffered_p2_EAX$r_buff0_thd2~0_1} AuxVars[] AssignedVars[~__unbuffered_p2_EAX$r_buff0_thd2~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX~0=0] [?] -1 [705] L684-->L685: Formula: (= v_~__unbuffered_p2_EAX$r_buff0_thd3~0_1 0) InVars {} OutVars{~__unbuffered_p2_EAX$r_buff0_thd3~0=v_~__unbuffered_p2_EAX$r_buff0_thd3~0_1} AuxVars[] AssignedVars[~__unbuffered_p2_EAX$r_buff0_thd3~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX~0=0] [?] -1 [772] L685-->L686: Formula: (= v_~__unbuffered_p2_EAX$r_buff1_thd0~0_1 0) InVars {} OutVars{~__unbuffered_p2_EAX$r_buff1_thd0~0=v_~__unbuffered_p2_EAX$r_buff1_thd0~0_1} AuxVars[] AssignedVars[~__unbuffered_p2_EAX$r_buff1_thd0~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX~0=0] [?] -1 [620] L686-->L687: Formula: (= v_~__unbuffered_p2_EAX$r_buff1_thd1~0_1 0) InVars {} OutVars{~__unbuffered_p2_EAX$r_buff1_thd1~0=v_~__unbuffered_p2_EAX$r_buff1_thd1~0_1} AuxVars[] AssignedVars[~__unbuffered_p2_EAX$r_buff1_thd1~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX~0=0] [?] -1 [564] L687-->L688: Formula: (= v_~__unbuffered_p2_EAX$r_buff1_thd2~0_1 0) InVars {} OutVars{~__unbuffered_p2_EAX$r_buff1_thd2~0=v_~__unbuffered_p2_EAX$r_buff1_thd2~0_1} AuxVars[] AssignedVars[~__unbuffered_p2_EAX$r_buff1_thd2~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX~0=0] [?] -1 [658] L688-->L689: Formula: (= v_~__unbuffered_p2_EAX$r_buff1_thd3~0_1 0) InVars {} OutVars{~__unbuffered_p2_EAX$r_buff1_thd3~0=v_~__unbuffered_p2_EAX$r_buff1_thd3~0_1} AuxVars[] AssignedVars[~__unbuffered_p2_EAX$r_buff1_thd3~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX~0=0] [?] -1 [722] L689-->L690: Formula: (= v_~__unbuffered_p2_EAX$read_delayed~0_2 0) InVars {} OutVars{~__unbuffered_p2_EAX$read_delayed~0=v_~__unbuffered_p2_EAX$read_delayed~0_2} AuxVars[] AssignedVars[~__unbuffered_p2_EAX$read_delayed~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX~0=0] [?] -1 [798] L690-->L691: Formula: (and (= v_~__unbuffered_p2_EAX$read_delayed_var~0.offset_2 0) (= v_~__unbuffered_p2_EAX$read_delayed_var~0.base_2 0)) InVars {} OutVars{~__unbuffered_p2_EAX$read_delayed_var~0.offset=v_~__unbuffered_p2_EAX$read_delayed_var~0.offset_2, ~__unbuffered_p2_EAX$read_delayed_var~0.base=v_~__unbuffered_p2_EAX$read_delayed_var~0.base_2} AuxVars[] AssignedVars[~__unbuffered_p2_EAX$read_delayed_var~0.offset, ~__unbuffered_p2_EAX$read_delayed_var~0.base] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX~0=0] [?] -1 [752] L691-->L692: Formula: (= v_~__unbuffered_p2_EAX$w_buff0~0_1 0) InVars {} OutVars{~__unbuffered_p2_EAX$w_buff0~0=v_~__unbuffered_p2_EAX$w_buff0~0_1} AuxVars[] AssignedVars[~__unbuffered_p2_EAX$w_buff0~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX~0=0] [?] -1 [573] L692-->L693: Formula: (= v_~__unbuffered_p2_EAX$w_buff0_used~0_1 0) InVars {} OutVars{~__unbuffered_p2_EAX$w_buff0_used~0=v_~__unbuffered_p2_EAX$w_buff0_used~0_1} AuxVars[] AssignedVars[~__unbuffered_p2_EAX$w_buff0_used~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX~0=0] [?] -1 [673] L693-->L694: Formula: (= v_~__unbuffered_p2_EAX$w_buff1~0_1 0) InVars {} OutVars{~__unbuffered_p2_EAX$w_buff1~0=v_~__unbuffered_p2_EAX$w_buff1~0_1} AuxVars[] AssignedVars[~__unbuffered_p2_EAX$w_buff1~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0] [?] -1 [635] L694-->L695: Formula: (= v_~__unbuffered_p2_EAX$w_buff1_used~0_1 0) InVars {} OutVars{~__unbuffered_p2_EAX$w_buff1_used~0=v_~__unbuffered_p2_EAX$w_buff1_used~0_1} AuxVars[] AssignedVars[~__unbuffered_p2_EAX$w_buff1_used~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0] [?] -1 [704] L695-->L696: Formula: (= v_~main$tmp_guard0~0_1 0) InVars {} OutVars{~main$tmp_guard0~0=v_~main$tmp_guard0~0_1} AuxVars[] AssignedVars[~main$tmp_guard0~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0] [?] -1 [771] L696-->L698: Formula: (= v_~main$tmp_guard1~0_1 0) InVars {} OutVars{~main$tmp_guard1~0=v_~main$tmp_guard1~0_1} AuxVars[] AssignedVars[~main$tmp_guard1~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [?] -1 [561] L698-->L700: Formula: (= v_~x~0_3 0) InVars {} OutVars{~x~0=v_~x~0_3} AuxVars[] AssignedVars[~x~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [?] -1 [721] L700-->L700-1: Formula: (and (= |v_~#y~0.offset_13| 0) (= (store |v_#valid_10| |v_~#y~0.base_13| 1) |v_#valid_9|) (not (= |v_~#y~0.base_13| 0)) (= (select |v_#valid_10| |v_~#y~0.base_13|) 0) (= |v_#length_1| (store |v_#length_2| |v_~#y~0.base_13| 4))) InVars {#length=|v_#length_2|, #valid=|v_#valid_10|} OutVars{#length=|v_#length_1|, ~#y~0.offset=|v_~#y~0.offset_13|, ~#y~0.base=|v_~#y~0.base_13|, #valid=|v_#valid_9|} AuxVars[] AssignedVars[~#y~0.offset, #valid, #length, ~#y~0.base] VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [?] -1 [726] L700-1-->L700-2: Formula: (= 0 (select (select |v_#memory_int_17| |v_~#y~0.base_14|) |v_~#y~0.offset_14|)) InVars {#memory_int=|v_#memory_int_17|, ~#y~0.offset=|v_~#y~0.offset_14|, ~#y~0.base=|v_~#y~0.base_14|} OutVars{#memory_int=|v_#memory_int_17|, ~#y~0.offset=|v_~#y~0.offset_14|, ~#y~0.base=|v_~#y~0.base_14|} AuxVars[] AssignedVars[] VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [?] -1 [728] L700-2-->L702: Formula: (= v_~y$flush_delayed~0_5 0) InVars {} OutVars{~y$flush_delayed~0=v_~y$flush_delayed~0_5} AuxVars[] AssignedVars[~y$flush_delayed~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0] [?] -1 [751] L702-->L703: Formula: (= v_~y$mem_tmp~0_3 0) InVars {} OutVars{~y$mem_tmp~0=v_~y$mem_tmp~0_3} AuxVars[] AssignedVars[~y$mem_tmp~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0] [?] -1 [610] L703-->L704: Formula: (= v_~y$r_buff0_thd0~0_2 0) InVars {} OutVars{~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_2} AuxVars[] AssignedVars[~y$r_buff0_thd0~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0] [?] -1 [672] L704-->L705: Formula: (= v_~y$r_buff0_thd1~0_2 0) InVars {} OutVars{~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_2} AuxVars[] AssignedVars[~y$r_buff0_thd1~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0] [?] -1 [634] L705-->L706: Formula: (= v_~y$r_buff0_thd2~0_14 0) InVars {} OutVars{~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_14} AuxVars[] AssignedVars[~y$r_buff0_thd2~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0] [?] -1 [703] L706-->L707: Formula: (= v_~y$r_buff0_thd3~0_58 0) InVars {} OutVars{~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_58} AuxVars[] AssignedVars[~y$r_buff0_thd3~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0] [?] -1 [770] L707-->L708: Formula: (= v_~y$r_buff1_thd0~0_2 0) InVars {} OutVars{~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_2} AuxVars[] AssignedVars[~y$r_buff1_thd0~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0] [?] -1 [617] L708-->L709: Formula: (= v_~y$r_buff1_thd1~0_2 0) InVars {} OutVars{~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_2} AuxVars[] AssignedVars[~y$r_buff1_thd1~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0] [?] -1 [560] L709-->L710: Formula: (= v_~y$r_buff1_thd2~0_9 0) InVars {} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_9} AuxVars[] AssignedVars[~y$r_buff1_thd2~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0] [?] -1 [657] L710-->L711: Formula: (= v_~y$r_buff1_thd3~0_41 0) InVars {} OutVars{~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_41} AuxVars[] AssignedVars[~y$r_buff1_thd3~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0] [?] -1 [720] L711-->L712: Formula: (= v_~y$read_delayed~0_1 0) InVars {} OutVars{~y$read_delayed~0=v_~y$read_delayed~0_1} AuxVars[] AssignedVars[~y$read_delayed~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed~0=0] [?] -1 [797] L712-->L713: Formula: (and (= v_~y$read_delayed_var~0.offset_1 0) (= v_~y$read_delayed_var~0.base_1 0)) InVars {} OutVars{~y$read_delayed_var~0.base=v_~y$read_delayed_var~0.base_1, ~y$read_delayed_var~0.offset=v_~y$read_delayed_var~0.offset_1} AuxVars[] AssignedVars[~y$read_delayed_var~0.offset, ~y$read_delayed_var~0.base] VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0] [?] -1 [750] L713-->L714: Formula: (= v_~y$w_buff0~0_16 0) InVars {} OutVars{~y$w_buff0~0=v_~y$w_buff0~0_16} AuxVars[] AssignedVars[~y$w_buff0~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0~0=0] [?] -1 [608] L714-->L715: Formula: (= v_~y$w_buff0_used~0_83 0) InVars {} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_83} AuxVars[] AssignedVars[~y$w_buff0_used~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0] [?] -1 [671] L715-->L716: Formula: (= v_~y$w_buff1~0_13 0) InVars {} OutVars{~y$w_buff1~0=v_~y$w_buff1~0_13} AuxVars[] AssignedVars[~y$w_buff1~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1~0=0] [?] -1 [632] L716-->L718: Formula: (= v_~y$w_buff1_used~0_47 0) InVars {} OutVars{~y$w_buff1_used~0=v_~y$w_buff1_used~0_47} AuxVars[] AssignedVars[~y$w_buff1_used~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0] [?] -1 [768] L718-->L719: Formula: (= v_~z~0_3 0) InVars {} OutVars{~z~0=v_~z~0_3} AuxVars[] AssignedVars[~z~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] -1 [628] L719-->L720: Formula: (= v_~weak$$choice0~0_14 0) InVars {} OutVars{~weak$$choice0~0=v_~weak$$choice0~0_14} AuxVars[] AssignedVars[~weak$$choice0~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] -1 [559] L720-->L721: Formula: (= v_~weak$$choice1~0_5 0) InVars {} OutVars{~weak$$choice1~0=v_~weak$$choice1~0_5} AuxVars[] AssignedVars[~weak$$choice1~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] -1 [656] L721-->L-1-1: Formula: (= v_~weak$$choice2~0_14 0) InVars {} OutVars{~weak$$choice2~0=v_~weak$$choice2~0_14} AuxVars[] AssignedVars[~weak$$choice2~0] VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] -1 [674] L-1-1-->L-1-2: Formula: true InVars {} OutVars{ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_#res] VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] -1 [670] L-1-2-->L813: Formula: true InVars {} OutVars{ULTIMATE.start_main_~#t2687~0.offset=|v_ULTIMATE.start_main_~#t2687~0.offset_3|, ULTIMATE.start_main_#t~nondet69=|v_ULTIMATE.start_main_#t~nondet69_1|, ULTIMATE.start_main_~#t2688~0.base=|v_ULTIMATE.start_main_~#t2688~0.base_3|, ULTIMATE.start_main_~#t2686~0.base=|v_ULTIMATE.start_main_~#t2686~0.base_3|, ULTIMATE.start_main_#t~mem72=|v_ULTIMATE.start_main_#t~mem72_1|, ULTIMATE.start_main_#t~nondet79.offset=|v_ULTIMATE.start_main_#t~nondet79.offset_1|, ULTIMATE.start_main_#t~ite77=|v_ULTIMATE.start_main_#t~ite77_1|, ULTIMATE.start_main_~#t2686~0.offset=|v_ULTIMATE.start_main_~#t2686~0.offset_3|, ULTIMATE.start_main_#t~nondet71=|v_ULTIMATE.start_main_#t~nondet71_1|, ULTIMATE.start_main_#t~ite78=|v_ULTIMATE.start_main_#t~ite78_1|, ULTIMATE.start_main_#t~nondet70=|v_ULTIMATE.start_main_#t~nondet70_1|, ULTIMATE.start_main_#t~ite75=|v_ULTIMATE.start_main_#t~ite75_1|, ULTIMATE.start_main_#t~ite76=|v_ULTIMATE.start_main_#t~ite76_1|, ULTIMATE.start_main_#t~ite73=|v_ULTIMATE.start_main_#t~ite73_1|, ULTIMATE.start_main_#t~ite74=|v_ULTIMATE.start_main_#t~ite74_1|, ULTIMATE.start_main_~#t2687~0.base=|v_ULTIMATE.start_main_~#t2687~0.base_3|, ULTIMATE.start_main_#t~ite82=|v_ULTIMATE.start_main_#t~ite82_1|, ULTIMATE.start_main_~#t2688~0.offset=|v_ULTIMATE.start_main_~#t2688~0.offset_3|, ULTIMATE.start_main_#t~ite81=|v_ULTIMATE.start_main_#t~ite81_1|, ULTIMATE.start_main_#t~mem80=|v_ULTIMATE.start_main_#t~mem80_1|, ULTIMATE.start_main_#t~nondet79.base=|v_ULTIMATE.start_main_#t~nondet79.base_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t2687~0.offset, ULTIMATE.start_main_#t~nondet69, ULTIMATE.start_main_~#t2688~0.base, ULTIMATE.start_main_~#t2686~0.base, ULTIMATE.start_main_#t~mem72, ULTIMATE.start_main_#t~nondet79.offset, ULTIMATE.start_main_#t~ite77, ULTIMATE.start_main_~#t2686~0.offset, ULTIMATE.start_main_#t~nondet71, ULTIMATE.start_main_#t~ite78, ULTIMATE.start_main_#t~nondet70, ULTIMATE.start_main_#t~ite75, ULTIMATE.start_main_#t~ite76, ULTIMATE.start_main_#t~ite73, ULTIMATE.start_main_#t~ite74, ULTIMATE.start_main_~#t2687~0.base, ULTIMATE.start_main_#t~ite82, ULTIMATE.start_main_~#t2688~0.offset, ULTIMATE.start_main_#t~ite81, ULTIMATE.start_main_#t~mem80, ULTIMATE.start_main_#t~nondet79.base] VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] -1 [600] L813-->L813-1: Formula: (and (= (store |v_#length_4| |v_ULTIMATE.start_main_~#t2686~0.base_4| 4) |v_#length_3|) (= |v_#valid_11| (store |v_#valid_12| |v_ULTIMATE.start_main_~#t2686~0.base_4| 1)) (not (= 0 |v_ULTIMATE.start_main_~#t2686~0.base_4|)) (= |v_ULTIMATE.start_main_~#t2686~0.offset_4| 0) (= 0 (select |v_#valid_12| |v_ULTIMATE.start_main_~#t2686~0.base_4|))) InVars {#length=|v_#length_4|, #valid=|v_#valid_12|} OutVars{#length=|v_#length_3|, ULTIMATE.start_main_~#t2686~0.offset=|v_ULTIMATE.start_main_~#t2686~0.offset_4|, ULTIMATE.start_main_~#t2686~0.base=|v_ULTIMATE.start_main_~#t2686~0.base_4|, #valid=|v_#valid_11|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t2686~0.base, #valid, #length, ULTIMATE.start_main_~#t2686~0.offset] VAL [|#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] -1 [602] L813-1-->L814: Formula: (= (store |v_#memory_int_19| |v_ULTIMATE.start_main_~#t2686~0.base_5| (store (select |v_#memory_int_19| |v_ULTIMATE.start_main_~#t2686~0.base_5|) |v_ULTIMATE.start_main_~#t2686~0.offset_5| 0)) |v_#memory_int_18|) InVars {#memory_int=|v_#memory_int_19|, ULTIMATE.start_main_~#t2686~0.offset=|v_ULTIMATE.start_main_~#t2686~0.offset_5|, ULTIMATE.start_main_~#t2686~0.base=|v_ULTIMATE.start_main_~#t2686~0.base_5|} OutVars{#memory_int=|v_#memory_int_18|, ULTIMATE.start_main_~#t2686~0.offset=|v_ULTIMATE.start_main_~#t2686~0.offset_5|, ULTIMATE.start_main_~#t2686~0.base=|v_ULTIMATE.start_main_~#t2686~0.base_5|} AuxVars[] AssignedVars[#memory_int] VAL [|#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] FORK -1 [977] L814-->P0ENTRY: Formula: (and (= 0 |v_Thread0_P0_#in~arg.offset_3|) (= 0 v_Thread0_P0_thidvar0_2) (= 0 |v_Thread0_P0_#in~arg.base_3|)) InVars {} OutVars{Thread0_P0_#in~arg.base=|v_Thread0_P0_#in~arg.base_3|, Thread0_P0_thidvar0=v_Thread0_P0_thidvar0_2, Thread0_P0_#in~arg.offset=|v_Thread0_P0_#in~arg.offset_3|} AuxVars[] AssignedVars[Thread0_P0_#in~arg.base, Thread0_P0_thidvar0, Thread0_P0_#in~arg.offset] VAL [Thread0_P0_thidvar0=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] -1 [668] L814-1-->L815: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~nondet69=|v_ULTIMATE.start_main_#t~nondet69_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet69] VAL [Thread0_P0_thidvar0=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] -1 [645] L815-->L815-1: Formula: (and (= |v_ULTIMATE.start_main_~#t2687~0.offset_4| 0) (not (= |v_ULTIMATE.start_main_~#t2687~0.base_4| 0)) (= 0 (select |v_#valid_14| |v_ULTIMATE.start_main_~#t2687~0.base_4|)) (= |v_#length_5| (store |v_#length_6| |v_ULTIMATE.start_main_~#t2687~0.base_4| 4)) (= (store |v_#valid_14| |v_ULTIMATE.start_main_~#t2687~0.base_4| 1) |v_#valid_13|)) InVars {#length=|v_#length_6|, #valid=|v_#valid_14|} OutVars{ULTIMATE.start_main_~#t2687~0.base=|v_ULTIMATE.start_main_~#t2687~0.base_4|, ULTIMATE.start_main_~#t2687~0.offset=|v_ULTIMATE.start_main_~#t2687~0.offset_4|, #length=|v_#length_5|, #valid=|v_#valid_13|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t2687~0.base, ULTIMATE.start_main_~#t2687~0.offset, #valid, #length] VAL [Thread0_P0_thidvar0=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] -1 [629] L815-1-->L816: Formula: (= (store |v_#memory_int_21| |v_ULTIMATE.start_main_~#t2687~0.base_5| (store (select |v_#memory_int_21| |v_ULTIMATE.start_main_~#t2687~0.base_5|) |v_ULTIMATE.start_main_~#t2687~0.offset_5| 1)) |v_#memory_int_20|) InVars {#memory_int=|v_#memory_int_21|, ULTIMATE.start_main_~#t2687~0.base=|v_ULTIMATE.start_main_~#t2687~0.base_5|, ULTIMATE.start_main_~#t2687~0.offset=|v_ULTIMATE.start_main_~#t2687~0.offset_5|} OutVars{#memory_int=|v_#memory_int_20|, ULTIMATE.start_main_~#t2687~0.base=|v_ULTIMATE.start_main_~#t2687~0.base_5|, ULTIMATE.start_main_~#t2687~0.offset=|v_ULTIMATE.start_main_~#t2687~0.offset_5|} AuxVars[] AssignedVars[#memory_int] VAL [Thread0_P0_thidvar0=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] FORK -1 [978] L816-->P1ENTRY: Formula: (and (= 0 |v_Thread1_P1_#in~arg.base_3|) (= 0 |v_Thread1_P1_#in~arg.offset_3|) (= 1 v_Thread1_P1_thidvar0_2)) InVars {} OutVars{Thread1_P1_#in~arg.base=|v_Thread1_P1_#in~arg.base_3|, Thread1_P1_thidvar0=v_Thread1_P1_thidvar0_2, Thread1_P1_#in~arg.offset=|v_Thread1_P1_#in~arg.offset_3|} AuxVars[] AssignedVars[Thread1_P1_#in~arg.base, Thread1_P1_thidvar0, Thread1_P1_#in~arg.offset] VAL [Thread0_P0_thidvar0=0, Thread1_P1_thidvar0=1, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] -1 [709] L816-1-->L817: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~nondet70=|v_ULTIMATE.start_main_#t~nondet70_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet70] VAL [Thread0_P0_thidvar0=0, Thread1_P1_thidvar0=1, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] -1 [783] L817-->L817-1: Formula: (and (= |v_#length_7| (store |v_#length_8| |v_ULTIMATE.start_main_~#t2688~0.base_4| 4)) (= |v_#valid_15| (store |v_#valid_16| |v_ULTIMATE.start_main_~#t2688~0.base_4| 1)) (= |v_ULTIMATE.start_main_~#t2688~0.offset_4| 0) (not (= |v_ULTIMATE.start_main_~#t2688~0.base_4| 0)) (= 0 (select |v_#valid_16| |v_ULTIMATE.start_main_~#t2688~0.base_4|))) InVars {#length=|v_#length_8|, #valid=|v_#valid_16|} OutVars{#length=|v_#length_7|, ULTIMATE.start_main_~#t2688~0.offset=|v_ULTIMATE.start_main_~#t2688~0.offset_4|, ULTIMATE.start_main_~#t2688~0.base=|v_ULTIMATE.start_main_~#t2688~0.base_4|, #valid=|v_#valid_15|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t2688~0.offset, ULTIMATE.start_main_~#t2688~0.base, #valid, #length] VAL [Thread0_P0_thidvar0=0, Thread1_P1_thidvar0=1, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] -1 [786] L817-1-->L818: Formula: (= (store |v_#memory_int_23| |v_ULTIMATE.start_main_~#t2688~0.base_5| (store (select |v_#memory_int_23| |v_ULTIMATE.start_main_~#t2688~0.base_5|) |v_ULTIMATE.start_main_~#t2688~0.offset_5| 2)) |v_#memory_int_22|) InVars {#memory_int=|v_#memory_int_23|, ULTIMATE.start_main_~#t2688~0.offset=|v_ULTIMATE.start_main_~#t2688~0.offset_5|, ULTIMATE.start_main_~#t2688~0.base=|v_ULTIMATE.start_main_~#t2688~0.base_5|} OutVars{#memory_int=|v_#memory_int_22|, ULTIMATE.start_main_~#t2688~0.offset=|v_ULTIMATE.start_main_~#t2688~0.offset_5|, ULTIMATE.start_main_~#t2688~0.base=|v_ULTIMATE.start_main_~#t2688~0.base_5|} AuxVars[] AssignedVars[#memory_int] VAL [Thread0_P0_thidvar0=0, Thread1_P1_thidvar0=1, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] FORK -1 [979] L818-->P2ENTRY: Formula: (and (= |v_Thread2_P2_#in~arg.base_3| 0) (= v_Thread2_P2_thidvar0_2 2) (= 0 |v_Thread2_P2_#in~arg.offset_3|)) InVars {} OutVars{Thread2_P2_#in~arg.base=|v_Thread2_P2_#in~arg.base_3|, Thread2_P2_thidvar0=v_Thread2_P2_thidvar0_2, Thread2_P2_#in~arg.offset=|v_Thread2_P2_#in~arg.offset_3|} AuxVars[] AssignedVars[Thread2_P2_#in~arg.base, Thread2_P2_thidvar0, Thread2_P2_#in~arg.offset] VAL [Thread0_P0_thidvar0=0, Thread1_P1_thidvar0=1, Thread2_P2_thidvar0=2, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread2_P2_#in~arg.base|=0, |Thread2_P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] 0 [835] P2ENTRY-->L774: Formula: (and (= v_~weak$$choice0~0_3 (ite (= (+ |v_Thread2_P2_#t~nondet12.offset_1| |v_Thread2_P2_#t~nondet12.base_1|) 0) 0 1)) (= v_Thread2_P2_~arg.offset_1 |v_Thread2_P2_#in~arg.offset_1|) (= v_~y$flush_delayed~0_1 v_~weak$$choice2~0_5) (= v_~weak$$choice1~0_1 (ite (= (+ |v_Thread2_P2_#t~nondet15.offset_1| |v_Thread2_P2_#t~nondet15.base_1|) 0) 0 1)) (= v_Thread2_P2_~arg.base_1 |v_Thread2_P2_#in~arg.base_1|) (= v_~weak$$choice2~0_5 (ite (= (+ |v_Thread2_P2_#t~nondet13.base_1| |v_Thread2_P2_#t~nondet13.offset_1|) 0) 0 1)) (= (select (select |v_#memory_int_4| |v_~#y~0.base_3|) |v_~#y~0.offset_3|) v_~y$mem_tmp~0_1)) InVars {Thread2_P2_#t~nondet13.offset=|v_Thread2_P2_#t~nondet13.offset_1|, Thread2_P2_#in~arg.base=|v_Thread2_P2_#in~arg.base_1|, Thread2_P2_#t~nondet15.base=|v_Thread2_P2_#t~nondet15.base_1|, ~#y~0.offset=|v_~#y~0.offset_3|, Thread2_P2_#t~nondet13.base=|v_Thread2_P2_#t~nondet13.base_1|, Thread2_P2_#t~nondet12.offset=|v_Thread2_P2_#t~nondet12.offset_1|, Thread2_P2_#in~arg.offset=|v_Thread2_P2_#in~arg.offset_1|, #memory_int=|v_#memory_int_4|, Thread2_P2_#t~nondet12.base=|v_Thread2_P2_#t~nondet12.base_1|, ~#y~0.base=|v_~#y~0.base_3|, Thread2_P2_#t~nondet15.offset=|v_Thread2_P2_#t~nondet15.offset_1|} OutVars{Thread2_P2_#in~arg.base=|v_Thread2_P2_#in~arg.base_1|, ~#y~0.offset=|v_~#y~0.offset_3|, Thread2_P2_~arg.offset=v_Thread2_P2_~arg.offset_1, Thread2_P2_#t~nondet12.offset=|v_Thread2_P2_#t~nondet12.offset_2|, Thread2_P2_#in~arg.offset=|v_Thread2_P2_#in~arg.offset_1|, ~#y~0.base=|v_~#y~0.base_3|, Thread2_P2_#t~nondet13.offset=|v_Thread2_P2_#t~nondet13.offset_2|, Thread2_P2_#t~nondet15.base=|v_Thread2_P2_#t~nondet15.base_2|, ~weak$$choice0~0=v_~weak$$choice0~0_3, ~weak$$choice1~0=v_~weak$$choice1~0_1, ~y$mem_tmp~0=v_~y$mem_tmp~0_1, Thread2_P2_#t~mem14=|v_Thread2_P2_#t~mem14_1|, Thread2_P2_~arg.base=v_Thread2_P2_~arg.base_1, Thread2_P2_#t~nondet13.base=|v_Thread2_P2_#t~nondet13.base_2|, #memory_int=|v_#memory_int_4|, ~y$flush_delayed~0=v_~y$flush_delayed~0_1, Thread2_P2_#t~nondet12.base=|v_Thread2_P2_#t~nondet12.base_2|, ~weak$$choice2~0=v_~weak$$choice2~0_5, Thread2_P2_#t~nondet15.offset=|v_Thread2_P2_#t~nondet15.offset_2|} AuxVars[] AssignedVars[Thread2_P2_~arg.offset, Thread2_P2_#t~nondet12.offset, Thread2_P2_#t~nondet13.offset, Thread2_P2_#t~nondet15.base, ~weak$$choice0~0, ~weak$$choice1~0, ~y$mem_tmp~0, Thread2_P2_#t~mem14, Thread2_P2_~arg.base, Thread2_P2_#t~nondet13.base, ~y$flush_delayed~0, Thread2_P2_#t~nondet12.base, ~weak$$choice2~0, Thread2_P2_#t~nondet15.offset] VAL [Thread0_P0_thidvar0=0, Thread1_P1_thidvar0=1, Thread2_P2_thidvar0=2, Thread2_P2_~arg.base=0, Thread2_P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread2_P2_#in~arg.base|=0, |Thread2_P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] 0 [836] L774-->L774-23: Formula: (and (= |v_Thread2_P2_#t~ite26_1| |v_Thread2_P2_#t~mem16_1|) (= (mod v_~y$w_buff0_used~0_28 256) 0) (= (select (select |v_#memory_int_5| |v_~#y~0.base_4|) |v_~#y~0.offset_4|) |v_Thread2_P2_#t~mem16_1|)) InVars {#memory_int=|v_#memory_int_5|, ~#y~0.offset=|v_~#y~0.offset_4|, ~#y~0.base=|v_~#y~0.base_4|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_28} OutVars{~#y~0.offset=|v_~#y~0.offset_4|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_28, #memory_int=|v_#memory_int_5|, Thread2_P2_#t~mem16=|v_Thread2_P2_#t~mem16_1|, ~#y~0.base=|v_~#y~0.base_4|, Thread2_P2_#t~ite26=|v_Thread2_P2_#t~ite26_1|} AuxVars[] AssignedVars[Thread2_P2_#t~mem16, Thread2_P2_#t~ite26] VAL [Thread0_P0_thidvar0=0, Thread1_P1_thidvar0=1, Thread2_P2_thidvar0=2, Thread2_P2_~arg.base=0, Thread2_P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread2_P2_#in~arg.base|=0, |Thread2_P2_#in~arg.offset|=0, |Thread2_P2_#t~ite26|=0, |Thread2_P2_#t~mem16|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] 0 [838] L774-23-->L775: Formula: (= (store |v_#memory_int_16| |v_~#y~0.base_12| (store (select |v_#memory_int_16| |v_~#y~0.base_12|) |v_~#y~0.offset_12| |v_Thread2_P2_#t~ite26_2|)) |v_#memory_int_15|) InVars {#memory_int=|v_#memory_int_16|, ~#y~0.offset=|v_~#y~0.offset_12|, ~#y~0.base=|v_~#y~0.base_12|, Thread2_P2_#t~ite26=|v_Thread2_P2_#t~ite26_2|} OutVars{~#y~0.offset=|v_~#y~0.offset_12|, Thread2_P2_#t~ite20=|v_Thread2_P2_#t~ite20_1|, Thread2_P2_#t~mem16=|v_Thread2_P2_#t~mem16_2|, Thread2_P2_#t~mem17=|v_Thread2_P2_#t~mem17_1|, ~#y~0.base=|v_~#y~0.base_12|, Thread2_P2_#t~mem21=|v_Thread2_P2_#t~mem21_1|, Thread2_P2_#t~ite19=|v_Thread2_P2_#t~ite19_1|, Thread2_P2_#t~ite24=|v_Thread2_P2_#t~ite24_1|, #memory_int=|v_#memory_int_15|, Thread2_P2_#t~ite25=|v_Thread2_P2_#t~ite25_1|, Thread2_P2_#t~ite22=|v_Thread2_P2_#t~ite22_1|, Thread2_P2_#t~ite23=|v_Thread2_P2_#t~ite23_1|, Thread2_P2_#t~ite18=|v_Thread2_P2_#t~ite18_1|, Thread2_P2_#t~ite26=|v_Thread2_P2_#t~ite26_3|} AuxVars[] AssignedVars[Thread2_P2_#t~mem21, Thread2_P2_#t~ite19, Thread2_P2_#t~ite20, Thread2_P2_#t~ite24, #memory_int, Thread2_P2_#t~ite25, Thread2_P2_#t~mem16, Thread2_P2_#t~ite22, Thread2_P2_#t~mem17, Thread2_P2_#t~ite23, Thread2_P2_#t~ite18, Thread2_P2_#t~ite26] VAL [Thread0_P0_thidvar0=0, Thread1_P1_thidvar0=1, Thread2_P2_thidvar0=2, Thread2_P2_~arg.base=0, Thread2_P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread2_P2_#in~arg.base|=0, |Thread2_P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] 0 [841] L775-->L775-14: Formula: (and (= |v_Thread2_P2_#t~ite31_1| v_~y$w_buff0~0_9) (not (= (mod v_~weak$$choice2~0_6 256) 0))) InVars {~weak$$choice2~0=v_~weak$$choice2~0_6, ~y$w_buff0~0=v_~y$w_buff0~0_9} OutVars{Thread2_P2_#t~ite31=|v_Thread2_P2_#t~ite31_1|, ~weak$$choice2~0=v_~weak$$choice2~0_6, ~y$w_buff0~0=v_~y$w_buff0~0_9} AuxVars[] AssignedVars[Thread2_P2_#t~ite31] VAL [Thread0_P0_thidvar0=0, Thread1_P1_thidvar0=1, Thread2_P2_thidvar0=2, Thread2_P2_~arg.base=0, Thread2_P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread2_P2_#in~arg.base|=0, |Thread2_P2_#in~arg.offset|=0, |Thread2_P2_#t~ite31|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] 0 [846] L775-14-->L776: Formula: (= v_~y$w_buff0~0_15 |v_Thread2_P2_#t~ite31_2|) InVars {Thread2_P2_#t~ite31=|v_Thread2_P2_#t~ite31_2|} OutVars{Thread2_P2_#t~ite31=|v_Thread2_P2_#t~ite31_3|, ~y$w_buff0~0=v_~y$w_buff0~0_15, Thread2_P2_#t~ite30=|v_Thread2_P2_#t~ite30_1|, Thread2_P2_#t~ite28=|v_Thread2_P2_#t~ite28_1|, Thread2_P2_#t~ite29=|v_Thread2_P2_#t~ite29_1|, Thread2_P2_#t~ite27=|v_Thread2_P2_#t~ite27_1|} AuxVars[] AssignedVars[Thread2_P2_#t~ite31, ~y$w_buff0~0, Thread2_P2_#t~ite30, Thread2_P2_#t~ite28, Thread2_P2_#t~ite29, Thread2_P2_#t~ite27] VAL [Thread0_P0_thidvar0=0, Thread1_P1_thidvar0=1, Thread2_P2_thidvar0=2, Thread2_P2_~arg.base=0, Thread2_P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread2_P2_#in~arg.base|=0, |Thread2_P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] 0 [853] L776-->L776-14: Formula: (and (not (= (mod v_~weak$$choice2~0_8 256) 0)) (= |v_Thread2_P2_#t~ite36_1| v_~y$w_buff1~0_6)) InVars {~y$w_buff1~0=v_~y$w_buff1~0_6, ~weak$$choice2~0=v_~weak$$choice2~0_8} OutVars{Thread2_P2_#t~ite36=|v_Thread2_P2_#t~ite36_1|, ~y$w_buff1~0=v_~y$w_buff1~0_6, ~weak$$choice2~0=v_~weak$$choice2~0_8} AuxVars[] AssignedVars[Thread2_P2_#t~ite36] VAL [Thread0_P0_thidvar0=0, Thread1_P1_thidvar0=1, Thread2_P2_thidvar0=2, Thread2_P2_~arg.base=0, Thread2_P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread2_P2_#in~arg.base|=0, |Thread2_P2_#in~arg.offset|=0, |Thread2_P2_#t~ite36|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] 0 [865] L776-14-->L777: Formula: (= v_~y$w_buff1~0_12 |v_Thread2_P2_#t~ite36_2|) InVars {Thread2_P2_#t~ite36=|v_Thread2_P2_#t~ite36_2|} OutVars{~y$w_buff1~0=v_~y$w_buff1~0_12, Thread2_P2_#t~ite32=|v_Thread2_P2_#t~ite32_1|, Thread2_P2_#t~ite35=|v_Thread2_P2_#t~ite35_1|, Thread2_P2_#t~ite36=|v_Thread2_P2_#t~ite36_3|, Thread2_P2_#t~ite33=|v_Thread2_P2_#t~ite33_1|, Thread2_P2_#t~ite34=|v_Thread2_P2_#t~ite34_1|} AuxVars[] AssignedVars[~y$w_buff1~0, Thread2_P2_#t~ite32, Thread2_P2_#t~ite35, Thread2_P2_#t~ite36, Thread2_P2_#t~ite33, Thread2_P2_#t~ite34] VAL [Thread0_P0_thidvar0=0, Thread1_P1_thidvar0=1, Thread2_P2_thidvar0=2, Thread2_P2_~arg.base=0, Thread2_P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread2_P2_#in~arg.base|=0, |Thread2_P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] 0 [875] L777-->L777-14: Formula: (and (not (= (mod v_~weak$$choice2~0_10 256) 0)) (= |v_Thread2_P2_#t~ite41_1| (mod v_~y$w_buff0_used~0_65 256))) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_65, ~weak$$choice2~0=v_~weak$$choice2~0_10} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_65, ~weak$$choice2~0=v_~weak$$choice2~0_10, Thread2_P2_#t~ite41=|v_Thread2_P2_#t~ite41_1|} AuxVars[] AssignedVars[Thread2_P2_#t~ite41] VAL [Thread0_P0_thidvar0=0, Thread1_P1_thidvar0=1, Thread2_P2_thidvar0=2, Thread2_P2_~arg.base=0, Thread2_P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread2_P2_#in~arg.base|=0, |Thread2_P2_#in~arg.offset|=0, |Thread2_P2_#t~ite41|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] 0 [884] L777-14-->L778: Formula: (= v_~y$w_buff0_used~0_74 (ite (= |v_Thread2_P2_#t~ite41_2| 0) 0 1)) InVars {Thread2_P2_#t~ite41=|v_Thread2_P2_#t~ite41_2|} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_74, Thread2_P2_#t~ite40=|v_Thread2_P2_#t~ite40_1|, Thread2_P2_#t~ite41=|v_Thread2_P2_#t~ite41_3|, Thread2_P2_#t~ite39=|v_Thread2_P2_#t~ite39_1|, Thread2_P2_#t~ite37=|v_Thread2_P2_#t~ite37_1|, Thread2_P2_#t~ite38=|v_Thread2_P2_#t~ite38_1|} AuxVars[] AssignedVars[~y$w_buff0_used~0, Thread2_P2_#t~ite40, Thread2_P2_#t~ite41, Thread2_P2_#t~ite39, Thread2_P2_#t~ite37, Thread2_P2_#t~ite38] VAL [Thread0_P0_thidvar0=0, Thread1_P1_thidvar0=1, Thread2_P2_thidvar0=2, Thread2_P2_~arg.base=0, Thread2_P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread2_P2_#in~arg.base|=0, |Thread2_P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] 0 [891] L778-->L778-14: Formula: (and (= |v_Thread2_P2_#t~ite46_1| v_~y$w_buff1_used~0_41) (not (= (mod v_~weak$$choice2~0_12 256) 0))) InVars {~weak$$choice2~0=v_~weak$$choice2~0_12, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_41} OutVars{Thread2_P2_#t~ite46=|v_Thread2_P2_#t~ite46_1|, ~weak$$choice2~0=v_~weak$$choice2~0_12, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_41} AuxVars[] AssignedVars[Thread2_P2_#t~ite46] VAL [Thread0_P0_thidvar0=0, Thread1_P1_thidvar0=1, Thread2_P2_thidvar0=2, Thread2_P2_~arg.base=0, Thread2_P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread2_P2_#in~arg.base|=0, |Thread2_P2_#in~arg.offset|=0, |Thread2_P2_#t~ite46|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] 0 [899] L778-14-->L779: Formula: (= v_~y$w_buff1_used~0_9 |v_Thread2_P2_#t~ite46_2|) InVars {Thread2_P2_#t~ite46=|v_Thread2_P2_#t~ite46_2|} OutVars{Thread2_P2_#t~ite43=|v_Thread2_P2_#t~ite43_1|, Thread2_P2_#t~ite42=|v_Thread2_P2_#t~ite42_1|, Thread2_P2_#t~ite46=|v_Thread2_P2_#t~ite46_3|, Thread2_P2_#t~ite45=|v_Thread2_P2_#t~ite45_1|, Thread2_P2_#t~ite44=|v_Thread2_P2_#t~ite44_1|, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_9} AuxVars[] AssignedVars[Thread2_P2_#t~ite43, Thread2_P2_#t~ite42, Thread2_P2_#t~ite46, Thread2_P2_#t~ite45, Thread2_P2_#t~ite44, ~y$w_buff1_used~0] VAL [Thread0_P0_thidvar0=0, Thread1_P1_thidvar0=1, Thread2_P2_thidvar0=2, Thread2_P2_~arg.base=0, Thread2_P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread2_P2_#in~arg.base|=0, |Thread2_P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] 0 [906] L779-->L779-14: Formula: (and (= |v_Thread2_P2_#t~ite51_1| v_~y$r_buff0_thd3~0_2) (not (= (mod v_~weak$$choice2~0_1 256) 0))) InVars {~weak$$choice2~0=v_~weak$$choice2~0_1, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_2} OutVars{~weak$$choice2~0=v_~weak$$choice2~0_1, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_2, Thread2_P2_#t~ite51=|v_Thread2_P2_#t~ite51_1|} AuxVars[] AssignedVars[Thread2_P2_#t~ite51] VAL [Thread0_P0_thidvar0=0, Thread1_P1_thidvar0=1, Thread2_P2_thidvar0=2, Thread2_P2_~arg.base=0, Thread2_P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread2_P2_#in~arg.base|=0, |Thread2_P2_#in~arg.offset|=0, |Thread2_P2_#t~ite51|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] 0 [914] L779-14-->L780: Formula: (= v_~y$r_buff0_thd3~0_10 |v_Thread2_P2_#t~ite51_2|) InVars {Thread2_P2_#t~ite51=|v_Thread2_P2_#t~ite51_2|} OutVars{Thread2_P2_#t~ite50=|v_Thread2_P2_#t~ite50_1|, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_10, Thread2_P2_#t~ite51=|v_Thread2_P2_#t~ite51_3|, Thread2_P2_#t~ite47=|v_Thread2_P2_#t~ite47_1|, Thread2_P2_#t~ite49=|v_Thread2_P2_#t~ite49_1|, Thread2_P2_#t~ite48=|v_Thread2_P2_#t~ite48_1|} AuxVars[] AssignedVars[Thread2_P2_#t~ite50, ~y$r_buff0_thd3~0, Thread2_P2_#t~ite51, Thread2_P2_#t~ite47, Thread2_P2_#t~ite49, Thread2_P2_#t~ite48] VAL [Thread0_P0_thidvar0=0, Thread1_P1_thidvar0=1, Thread2_P2_thidvar0=2, Thread2_P2_~arg.base=0, Thread2_P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread2_P2_#in~arg.base|=0, |Thread2_P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] 0 [921] L780-->L780-17: Formula: (and (= |v_Thread2_P2_#t~ite57_1| v_~y$r_buff1_thd3~0_6) (not (= 0 (mod v_~weak$$choice2~0_3 256)))) InVars {~weak$$choice2~0=v_~weak$$choice2~0_3, ~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_6} OutVars{Thread2_P2_#t~ite57=|v_Thread2_P2_#t~ite57_1|, ~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_6, ~weak$$choice2~0=v_~weak$$choice2~0_3} AuxVars[] AssignedVars[Thread2_P2_#t~ite57] VAL [Thread0_P0_thidvar0=0, Thread1_P1_thidvar0=1, Thread2_P2_thidvar0=2, Thread2_P2_~arg.base=0, Thread2_P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread2_P2_#in~arg.base|=0, |Thread2_P2_#in~arg.offset|=0, |Thread2_P2_#t~ite57|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] 0 [929] L780-17-->L784: Formula: (and (= v_~__unbuffered_p2_EAX$read_delayed~0_1 1) (= v_~__unbuffered_p2_EAX$read_delayed_var~0.offset_1 |v_~#y~0.offset_6|) (= v_~y$r_buff1_thd3~0_14 |v_Thread2_P2_#t~ite57_2|) (= v_~__unbuffered_p2_EAX$read_delayed_var~0.base_1 |v_~#y~0.base_6|) (= v_~__unbuffered_p2_EAX~0_1 (select (select |v_#memory_int_7| |v_~#y~0.base_6|) |v_~#y~0.offset_6|))) InVars {#memory_int=|v_#memory_int_7|, Thread2_P2_#t~ite57=|v_Thread2_P2_#t~ite57_2|, ~#y~0.offset=|v_~#y~0.offset_6|, ~#y~0.base=|v_~#y~0.base_6|} OutVars{~#y~0.offset=|v_~#y~0.offset_6|, Thread2_P2_#t~ite54=|v_Thread2_P2_#t~ite54_1|, Thread2_P2_#t~ite53=|v_Thread2_P2_#t~ite53_1|, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=v_~__unbuffered_p2_EAX$read_delayed_var~0.offset_1, Thread2_P2_#t~ite52=|v_Thread2_P2_#t~ite52_1|, ~__unbuffered_p2_EAX$read_delayed_var~0.base=v_~__unbuffered_p2_EAX$read_delayed_var~0.base_1, ~#y~0.base=|v_~#y~0.base_6|, ~__unbuffered_p2_EAX$read_delayed~0=v_~__unbuffered_p2_EAX$read_delayed~0_1, Thread2_P2_#t~mem58=|v_Thread2_P2_#t~mem58_1|, ~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_14, #memory_int=|v_#memory_int_7|, Thread2_P2_#t~ite57=|v_Thread2_P2_#t~ite57_3|, Thread2_P2_#t~ite56=|v_Thread2_P2_#t~ite56_1|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_1, Thread2_P2_#t~ite55=|v_Thread2_P2_#t~ite55_1|} AuxVars[] AssignedVars[Thread2_P2_#t~mem58, ~y$r_buff1_thd3~0, Thread2_P2_#t~ite54, Thread2_P2_#t~ite53, ~__unbuffered_p2_EAX$read_delayed_var~0.offset, Thread2_P2_#t~ite52, ~__unbuffered_p2_EAX$read_delayed_var~0.base, Thread2_P2_#t~ite57, Thread2_P2_#t~ite56, ~__unbuffered_p2_EAX~0, Thread2_P2_#t~ite55, ~__unbuffered_p2_EAX$read_delayed~0] VAL [Thread0_P0_thidvar0=0, Thread1_P1_thidvar0=1, Thread2_P2_thidvar0=2, Thread2_P2_~arg.base=0, Thread2_P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread2_P2_#in~arg.base|=0, |Thread2_P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] 0 [936] L784-->L784-2: Formula: (and (= |v_Thread2_P2_#t~ite60_1| v_~y$mem_tmp~0_2) (not (= 0 (mod v_~y$flush_delayed~0_2 256)))) InVars {~y$flush_delayed~0=v_~y$flush_delayed~0_2, ~y$mem_tmp~0=v_~y$mem_tmp~0_2} OutVars{~y$flush_delayed~0=v_~y$flush_delayed~0_2, Thread2_P2_#t~ite60=|v_Thread2_P2_#t~ite60_1|, ~y$mem_tmp~0=v_~y$mem_tmp~0_2} AuxVars[] AssignedVars[Thread2_P2_#t~ite60] VAL [Thread0_P0_thidvar0=0, Thread1_P1_thidvar0=1, Thread2_P2_thidvar0=2, Thread2_P2_~arg.base=0, Thread2_P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread2_P2_#in~arg.base|=0, |Thread2_P2_#in~arg.offset|=0, |Thread2_P2_#t~ite60|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] 0 [944] L784-2-->L791: Formula: (and (= v_~y$flush_delayed~0_4 0) (= v_~z~0_2 1) (= |v_#memory_int_9| (store |v_#memory_int_10| |v_~#y~0.base_8| (store (select |v_#memory_int_10| |v_~#y~0.base_8|) |v_~#y~0.offset_8| |v_Thread2_P2_#t~ite60_3|)))) InVars {#memory_int=|v_#memory_int_10|, Thread2_P2_#t~ite60=|v_Thread2_P2_#t~ite60_3|, ~#y~0.offset=|v_~#y~0.offset_8|, ~#y~0.base=|v_~#y~0.base_8|} OutVars{Thread2_P2_#t~ite60=|v_Thread2_P2_#t~ite60_4|, Thread2_P2_#t~mem59=|v_Thread2_P2_#t~mem59_2|, ~#y~0.offset=|v_~#y~0.offset_8|, ~y$flush_delayed~0=v_~y$flush_delayed~0_4, #memory_int=|v_#memory_int_9|, ~z~0=v_~z~0_2, ~#y~0.base=|v_~#y~0.base_8|} AuxVars[] AssignedVars[Thread2_P2_#t~ite60, Thread2_P2_#t~mem59, ~y$flush_delayed~0, #memory_int, ~z~0] VAL [Thread0_P0_thidvar0=0, Thread1_P1_thidvar0=1, Thread2_P2_thidvar0=2, Thread2_P2_~arg.base=0, Thread2_P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread2_P2_#in~arg.base|=0, |Thread2_P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] 1 [804] P0ENTRY-->L735: Formula: (and (= v_Thread0_P0_~arg.base_1 |v_Thread0_P0_#in~arg.base_1|) (= v_Thread0_P0_~arg.offset_1 |v_Thread0_P0_#in~arg.offset_1|) (= v_~__unbuffered_cnt~0_1 (+ v_~__unbuffered_cnt~0_2 1)) (= v_~__unbuffered_p0_EAX~0_1 v_~z~0_1) (= v_~x~0_1 1)) InVars {Thread0_P0_#in~arg.base=|v_Thread0_P0_#in~arg.base_1|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_2, ~z~0=v_~z~0_1, Thread0_P0_#in~arg.offset=|v_Thread0_P0_#in~arg.offset_1|} OutVars{Thread0_P0_#in~arg.base=|v_Thread0_P0_#in~arg.base_1|, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_1, Thread0_P0_~arg.offset=v_Thread0_P0_~arg.offset_1, Thread0_P0_~arg.base=v_Thread0_P0_~arg.base_1, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_1, ~z~0=v_~z~0_1, ~x~0=v_~x~0_1, Thread0_P0_#in~arg.offset=|v_Thread0_P0_#in~arg.offset_1|} AuxVars[] AssignedVars[~__unbuffered_p0_EAX~0, Thread0_P0_~arg.offset, Thread0_P0_~arg.base, ~__unbuffered_cnt~0, ~x~0] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread2_P2_thidvar0=2, Thread2_P2_~arg.base=0, Thread2_P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread2_P2_#in~arg.base|=0, |Thread2_P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] 0 [950] L791-->L791-2: Formula: (or (= 0 (mod v_~y$r_buff0_thd3~0_22 256)) (= 0 (mod v_~y$w_buff0_used~0_37 256))) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_37, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_22} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_37, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_22} AuxVars[] AssignedVars[] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1_thidvar0=1, Thread2_P2_thidvar0=2, Thread2_P2_~arg.base=0, Thread2_P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread2_P2_#in~arg.base|=0, |Thread2_P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] 2 [808] P1ENTRY-->L4: Formula: (and (= v_Thread1_P1_~arg.offset_1 |v_Thread1_P1_#in~arg.offset_1|) (= v_~y$w_buff1_used~0_1 v_~y$w_buff0_used~0_2) (= v_~y$w_buff0~0_1 1) (= |v_Thread1_P1___VERIFIER_assert_#in~expression_1| (ite (not (and (not (= (mod v_~y$w_buff1_used~0_1 256) 0)) (not (= (mod v_~y$w_buff0_used~0_1 256) 0)))) 1 0)) (= v_Thread1_P1_~arg.base_1 |v_Thread1_P1_#in~arg.base_1|) (= v_~__unbuffered_p1_EAX~0_1 v_~x~0_2) (= v_~y$w_buff1~0_1 v_~y$w_buff0~0_2) (= v_~y$w_buff0_used~0_1 1) (= v_Thread1_P1___VERIFIER_assert_~expression_1 |v_Thread1_P1___VERIFIER_assert_#in~expression_1|)) InVars {Thread1_P1_#in~arg.base=|v_Thread1_P1_#in~arg.base_1|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_2, ~x~0=v_~x~0_2, ~y$w_buff0~0=v_~y$w_buff0~0_2, Thread1_P1_#in~arg.offset=|v_Thread1_P1_#in~arg.offset_1|} OutVars{Thread1_P1___VERIFIER_assert_~expression=v_Thread1_P1___VERIFIER_assert_~expression_1, Thread1_P1_#in~arg.base=|v_Thread1_P1_#in~arg.base_1|, Thread1_P1_~arg.offset=v_Thread1_P1_~arg.offset_1, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_1, Thread1_P1_#in~arg.offset=|v_Thread1_P1_#in~arg.offset_1|, Thread1_P1_~arg.base=v_Thread1_P1_~arg.base_1, ~y$w_buff1~0=v_~y$w_buff1~0_1, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_1, ~y$w_buff0~0=v_~y$w_buff0~0_1, Thread1_P1___VERIFIER_assert_#in~expression=|v_Thread1_P1___VERIFIER_assert_#in~expression_1|, ~x~0=v_~x~0_2, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_1} AuxVars[] AssignedVars[Thread1_P1___VERIFIER_assert_~expression, Thread1_P1_~arg.offset, ~y$w_buff0_used~0, Thread1_P1_~arg.base, ~y$w_buff1~0, ~__unbuffered_p1_EAX~0, ~y$w_buff0~0, Thread1_P1___VERIFIER_assert_#in~expression, ~y$w_buff1_used~0] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, Thread2_P2_thidvar0=2, Thread2_P2_~arg.base=0, Thread2_P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |Thread2_P2_#in~arg.base|=0, |Thread2_P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] 2 [810] L4-->L4-3: Formula: (not (= v_Thread1_P1___VERIFIER_assert_~expression_3 0)) InVars {Thread1_P1___VERIFIER_assert_~expression=v_Thread1_P1___VERIFIER_assert_~expression_3} OutVars{Thread1_P1___VERIFIER_assert_~expression=v_Thread1_P1___VERIFIER_assert_~expression_3} AuxVars[] AssignedVars[] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, Thread2_P2_thidvar0=2, Thread2_P2_~arg.base=0, Thread2_P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |Thread2_P2_#in~arg.base|=0, |Thread2_P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] 0 [957] L791-2-->L791-4: Formula: (and (= (select (select |v_#memory_int_11| |v_~#y~0.base_9|) |v_~#y~0.offset_9|) |v_Thread2_P2_#t~mem61_2|) (or (= (mod v_~y$w_buff1_used~0_22 256) 0) (= 0 (mod v_~y$r_buff1_thd3~0_18 256))) (= |v_Thread2_P2_#t~ite62_3| |v_Thread2_P2_#t~mem61_2|)) InVars {#memory_int=|v_#memory_int_11|, ~#y~0.offset=|v_~#y~0.offset_9|, ~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_18, ~#y~0.base=|v_~#y~0.base_9|, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_22} OutVars{~#y~0.offset=|v_~#y~0.offset_9|, ~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_18, Thread2_P2_#t~ite62=|v_Thread2_P2_#t~ite62_3|, #memory_int=|v_#memory_int_11|, Thread2_P2_#t~mem61=|v_Thread2_P2_#t~mem61_2|, ~#y~0.base=|v_~#y~0.base_9|, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_22} AuxVars[] AssignedVars[Thread2_P2_#t~ite62, Thread2_P2_#t~mem61] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, Thread2_P2_thidvar0=2, Thread2_P2_~arg.base=0, Thread2_P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |Thread2_P2_#in~arg.base|=0, |Thread2_P2_#in~arg.offset|=0, |Thread2_P2_#t~ite62|=0, |Thread2_P2_#t~mem61|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] 0 [962] L791-4-->L791-5: Formula: (= |v_Thread2_P2_#t~ite63_4| |v_Thread2_P2_#t~ite62_4|) InVars {Thread2_P2_#t~ite62=|v_Thread2_P2_#t~ite62_4|} OutVars{Thread2_P2_#t~ite63=|v_Thread2_P2_#t~ite63_4|, Thread2_P2_#t~ite62=|v_Thread2_P2_#t~ite62_4|} AuxVars[] AssignedVars[Thread2_P2_#t~ite63] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, Thread2_P2_thidvar0=2, Thread2_P2_~arg.base=0, Thread2_P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |Thread2_P2_#in~arg.base|=0, |Thread2_P2_#in~arg.offset|=0, |Thread2_P2_#t~ite62|=0, |Thread2_P2_#t~ite63|=0, |Thread2_P2_#t~mem61|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] 0 [955] L791-5-->L792: Formula: (= (store |v_#memory_int_13| |v_~#y~0.base_10| (store (select |v_#memory_int_13| |v_~#y~0.base_10|) |v_~#y~0.offset_10| |v_Thread2_P2_#t~ite63_2|)) |v_#memory_int_12|) InVars {#memory_int=|v_#memory_int_13|, ~#y~0.offset=|v_~#y~0.offset_10|, ~#y~0.base=|v_~#y~0.base_10|, Thread2_P2_#t~ite63=|v_Thread2_P2_#t~ite63_2|} OutVars{~#y~0.offset=|v_~#y~0.offset_10|, Thread2_P2_#t~ite63=|v_Thread2_P2_#t~ite63_3|, Thread2_P2_#t~ite62=|v_Thread2_P2_#t~ite62_1|, #memory_int=|v_#memory_int_12|, Thread2_P2_#t~mem61=|v_Thread2_P2_#t~mem61_1|, ~#y~0.base=|v_~#y~0.base_10|} AuxVars[] AssignedVars[Thread2_P2_#t~ite63, Thread2_P2_#t~ite62, #memory_int, Thread2_P2_#t~mem61] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, Thread2_P2_thidvar0=2, Thread2_P2_~arg.base=0, Thread2_P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |Thread2_P2_#in~arg.base|=0, |Thread2_P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] 0 [961] L792-->L792-2: Formula: (and (= |v_Thread2_P2_#t~ite64_2| v_~y$w_buff0_used~0_41) (or (= 0 (mod v_~y$w_buff0_used~0_41 256)) (= 0 (mod v_~y$r_buff0_thd3~0_26 256)))) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_41, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_26} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_41, Thread2_P2_#t~ite64=|v_Thread2_P2_#t~ite64_2|, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_26} AuxVars[] AssignedVars[Thread2_P2_#t~ite64] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, Thread2_P2_thidvar0=2, Thread2_P2_~arg.base=0, Thread2_P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |Thread2_P2_#in~arg.base|=0, |Thread2_P2_#in~arg.offset|=0, |Thread2_P2_#t~ite64|=1, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] 0 [964] L792-2-->L793: Formula: (= v_~y$w_buff0_used~0_42 |v_Thread2_P2_#t~ite64_3|) InVars {Thread2_P2_#t~ite64=|v_Thread2_P2_#t~ite64_3|} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_42, Thread2_P2_#t~ite64=|v_Thread2_P2_#t~ite64_4|} AuxVars[] AssignedVars[~y$w_buff0_used~0, Thread2_P2_#t~ite64] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, Thread2_P2_thidvar0=2, Thread2_P2_~arg.base=0, Thread2_P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |Thread2_P2_#in~arg.base|=0, |Thread2_P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] 0 [966] L793-->L793-2: Formula: (and (or (= (mod v_~y$r_buff0_thd3~0_28 256) 0) (= 0 (mod v_~y$w_buff0_used~0_44 256))) (= |v_Thread2_P2_#t~ite65_2| v_~y$w_buff1_used~0_25) (or (= 0 (mod v_~y$w_buff1_used~0_25 256)) (= (mod v_~y$r_buff1_thd3~0_21 256) 0))) InVars {~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_21, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_44, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_28, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_25} OutVars{~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_21, Thread2_P2_#t~ite65=|v_Thread2_P2_#t~ite65_2|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_44, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_28, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_25} AuxVars[] AssignedVars[Thread2_P2_#t~ite65] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, Thread2_P2_thidvar0=2, Thread2_P2_~arg.base=0, Thread2_P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |Thread2_P2_#in~arg.base|=0, |Thread2_P2_#in~arg.offset|=0, |Thread2_P2_#t~ite65|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] 0 [967] L793-2-->L794: Formula: (= v_~y$w_buff1_used~0_26 |v_Thread2_P2_#t~ite65_3|) InVars {Thread2_P2_#t~ite65=|v_Thread2_P2_#t~ite65_3|} OutVars{Thread2_P2_#t~ite65=|v_Thread2_P2_#t~ite65_4|, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_26} AuxVars[] AssignedVars[Thread2_P2_#t~ite65, ~y$w_buff1_used~0] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, Thread2_P2_thidvar0=2, Thread2_P2_~arg.base=0, Thread2_P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |Thread2_P2_#in~arg.base|=0, |Thread2_P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] 0 [969] L794-->L794-2: Formula: (and (or (= (mod v_~y$w_buff0_used~0_46 256) 0) (= (mod v_~y$r_buff0_thd3~0_30 256) 0)) (= |v_Thread2_P2_#t~ite66_2| v_~y$r_buff0_thd3~0_30)) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_46, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_30} OutVars{Thread2_P2_#t~ite66=|v_Thread2_P2_#t~ite66_2|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_46, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_30} AuxVars[] AssignedVars[Thread2_P2_#t~ite66] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, Thread2_P2_thidvar0=2, Thread2_P2_~arg.base=0, Thread2_P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |Thread2_P2_#in~arg.base|=0, |Thread2_P2_#in~arg.offset|=0, |Thread2_P2_#t~ite66|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] 0 [970] L794-2-->L795: Formula: (= v_~y$r_buff0_thd3~0_31 |v_Thread2_P2_#t~ite66_3|) InVars {Thread2_P2_#t~ite66=|v_Thread2_P2_#t~ite66_3|} OutVars{~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_31, Thread2_P2_#t~ite66=|v_Thread2_P2_#t~ite66_4|} AuxVars[] AssignedVars[~y$r_buff0_thd3~0, Thread2_P2_#t~ite66] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, Thread2_P2_thidvar0=2, Thread2_P2_~arg.base=0, Thread2_P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |Thread2_P2_#in~arg.base|=0, |Thread2_P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] 0 [972] L795-->L795-2: Formula: (and (= |v_Thread2_P2_#t~ite67_2| v_~y$r_buff1_thd3~0_23) (or (= 0 (mod v_~y$w_buff1_used~0_28 256)) (= 0 (mod v_~y$r_buff1_thd3~0_23 256))) (or (= (mod v_~y$r_buff0_thd3~0_33 256) 0) (= 0 (mod v_~y$w_buff0_used~0_49 256)))) InVars {~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_23, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_49, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_33, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_28} OutVars{Thread2_P2_#t~ite67=|v_Thread2_P2_#t~ite67_2|, ~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_23, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_49, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_33, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_28} AuxVars[] AssignedVars[Thread2_P2_#t~ite67] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, Thread2_P2_thidvar0=2, Thread2_P2_~arg.base=0, Thread2_P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |Thread2_P2_#in~arg.base|=0, |Thread2_P2_#in~arg.offset|=0, |Thread2_P2_#t~ite67|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] 0 [973] L795-2-->L800: Formula: (and (= v_~y$r_buff1_thd3~0_24 |v_Thread2_P2_#t~ite67_3|) (= v_~__unbuffered_cnt~0_5 (+ v_~__unbuffered_cnt~0_6 1))) InVars {Thread2_P2_#t~ite67=|v_Thread2_P2_#t~ite67_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_6} OutVars{Thread2_P2_#t~ite67=|v_Thread2_P2_#t~ite67_4|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_5, ~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_24} AuxVars[] AssignedVars[~y$r_buff1_thd3~0, Thread2_P2_#t~ite67, ~__unbuffered_cnt~0] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, Thread2_P2_thidvar0=2, Thread2_P2_~arg.base=0, Thread2_P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |Thread2_P2_#in~arg.base|=0, |Thread2_P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] 2 [813] L4-3-->L755: Formula: (and (= v_~y$r_buff1_thd3~0_1 v_~y$r_buff0_thd3~0_1) (= v_~y$r_buff0_thd2~0_1 1) (= v_~y$r_buff1_thd1~0_1 v_~y$r_buff0_thd1~0_1) (= v_~y$r_buff1_thd2~0_1 v_~y$r_buff0_thd2~0_2) (= v_~y$r_buff1_thd0~0_1 v_~y$r_buff0_thd0~0_1)) InVars {~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_1, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_1, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_2, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_1} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_1, ~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_1, ~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_1, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_1, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_1, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_1, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_1, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_1} AuxVars[] AssignedVars[~y$r_buff1_thd2~0, ~y$r_buff1_thd1~0, ~y$r_buff1_thd3~0, ~y$r_buff0_thd2~0, ~y$r_buff1_thd0~0] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, Thread2_P2_thidvar0=2, Thread2_P2_~arg.base=0, Thread2_P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |Thread2_P2_#in~arg.base|=0, |Thread2_P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] 2 [814] L755-->L755-5: Formula: (and (not (= (mod v_~y$w_buff0_used~0_3 256) 0)) (not (= (mod v_~y$r_buff0_thd2~0_3 256) 0)) (= |v_Thread1_P1_#t~ite6_1| v_~y$w_buff0~0_3)) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_3, ~y$w_buff0~0=v_~y$w_buff0~0_3, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_3} OutVars{Thread1_P1_#t~ite6=|v_Thread1_P1_#t~ite6_1|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_3, ~y$w_buff0~0=v_~y$w_buff0~0_3, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_3} AuxVars[] AssignedVars[Thread1_P1_#t~ite6] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, Thread2_P2_thidvar0=2, Thread2_P2_~arg.base=0, Thread2_P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite6|=1, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |Thread2_P2_#in~arg.base|=0, |Thread2_P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] 2 [816] L755-5-->L756: Formula: (= |v_#memory_int_2| (store |v_#memory_int_3| |v_~#y~0.base_2| (store (select |v_#memory_int_3| |v_~#y~0.base_2|) |v_~#y~0.offset_2| |v_Thread1_P1_#t~ite6_2|))) InVars {#memory_int=|v_#memory_int_3|, Thread1_P1_#t~ite6=|v_Thread1_P1_#t~ite6_2|, ~#y~0.offset=|v_~#y~0.offset_2|, ~#y~0.base=|v_~#y~0.base_2|} OutVars{~#y~0.offset=|v_~#y~0.offset_2|, Thread1_P1_#t~mem4=|v_Thread1_P1_#t~mem4_1|, Thread1_P1_#t~ite6=|v_Thread1_P1_#t~ite6_3|, #memory_int=|v_#memory_int_2|, ~#y~0.base=|v_~#y~0.base_2|, Thread1_P1_#t~ite5=|v_Thread1_P1_#t~ite5_1|} AuxVars[] AssignedVars[Thread1_P1_#t~mem4, Thread1_P1_#t~ite6, #memory_int, Thread1_P1_#t~ite5] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, Thread2_P2_thidvar0=2, Thread2_P2_~arg.base=0, Thread2_P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |Thread2_P2_#in~arg.base|=0, |Thread2_P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] 2 [819] L756-->L756-2: Formula: (and (not (= 0 (mod v_~y$r_buff0_thd2~0_5 256))) (not (= (mod v_~y$w_buff0_used~0_5 256) 0)) (= |v_Thread1_P1_#t~ite7_1| 0)) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_5, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_5} OutVars{Thread1_P1_#t~ite7=|v_Thread1_P1_#t~ite7_1|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_5, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_5} AuxVars[] AssignedVars[Thread1_P1_#t~ite7] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, Thread2_P2_thidvar0=2, Thread2_P2_~arg.base=0, Thread2_P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite7|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |Thread2_P2_#in~arg.base|=0, |Thread2_P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] 2 [822] L756-2-->L757: Formula: (= v_~y$w_buff0_used~0_7 |v_Thread1_P1_#t~ite7_3|) InVars {Thread1_P1_#t~ite7=|v_Thread1_P1_#t~ite7_3|} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_7, Thread1_P1_#t~ite7=|v_Thread1_P1_#t~ite7_4|} AuxVars[] AssignedVars[~y$w_buff0_used~0, Thread1_P1_#t~ite7] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, Thread2_P2_thidvar0=2, Thread2_P2_~arg.base=0, Thread2_P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |Thread2_P2_#in~arg.base|=0, |Thread2_P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] 2 [824] L757-->L757-2: Formula: (and (= |v_Thread1_P1_#t~ite8_2| v_~y$w_buff1_used~0_5) (or (= (mod v_~y$w_buff1_used~0_5 256) 0) (= 0 (mod v_~y$r_buff1_thd2~0_5 256))) (or (= (mod v_~y$w_buff0_used~0_9 256) 0) (= 0 (mod v_~y$r_buff0_thd2~0_8 256)))) InVars {~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_5, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_9, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_8, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_5} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_5, Thread1_P1_#t~ite8=|v_Thread1_P1_#t~ite8_2|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_9, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_8, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_5} AuxVars[] AssignedVars[Thread1_P1_#t~ite8] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, Thread2_P2_thidvar0=2, Thread2_P2_~arg.base=0, Thread2_P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite8|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |Thread2_P2_#in~arg.base|=0, |Thread2_P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] 2 [825] L757-2-->L758: Formula: (= v_~y$w_buff1_used~0_6 |v_Thread1_P1_#t~ite8_3|) InVars {Thread1_P1_#t~ite8=|v_Thread1_P1_#t~ite8_3|} OutVars{Thread1_P1_#t~ite8=|v_Thread1_P1_#t~ite8_4|, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_6} AuxVars[] AssignedVars[Thread1_P1_#t~ite8, ~y$w_buff1_used~0] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, Thread2_P2_thidvar0=2, Thread2_P2_~arg.base=0, Thread2_P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |Thread2_P2_#in~arg.base|=0, |Thread2_P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] 2 [827] L758-->L758-2: Formula: (and (or (= 0 (mod v_~y$r_buff0_thd2~0_10 256)) (= 0 (mod v_~y$w_buff0_used~0_11 256))) (= |v_Thread1_P1_#t~ite9_2| v_~y$r_buff0_thd2~0_10)) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_11, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_10} OutVars{Thread1_P1_#t~ite9=|v_Thread1_P1_#t~ite9_2|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_11, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_10} AuxVars[] AssignedVars[Thread1_P1_#t~ite9] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, Thread2_P2_thidvar0=2, Thread2_P2_~arg.base=0, Thread2_P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite9|=1, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |Thread2_P2_#in~arg.base|=0, |Thread2_P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] 2 [828] L758-2-->L759: Formula: (= v_~y$r_buff0_thd2~0_11 |v_Thread1_P1_#t~ite9_3|) InVars {Thread1_P1_#t~ite9=|v_Thread1_P1_#t~ite9_3|} OutVars{~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_11, Thread1_P1_#t~ite9=|v_Thread1_P1_#t~ite9_4|} AuxVars[] AssignedVars[~y$r_buff0_thd2~0, Thread1_P1_#t~ite9] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, Thread2_P2_thidvar0=2, Thread2_P2_~arg.base=0, Thread2_P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |Thread2_P2_#in~arg.base|=0, |Thread2_P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] 2 [830] L759-->L759-2: Formula: (and (or (= 0 (mod v_~y$w_buff0_used~0_13 256)) (= 0 (mod v_~y$r_buff0_thd2~0_13 256))) (= |v_Thread1_P1_#t~ite10_2| v_~y$r_buff1_thd2~0_7) (or (= 0 (mod v_~y$w_buff1_used~0_8 256)) (= (mod v_~y$r_buff1_thd2~0_7 256) 0))) InVars {~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_7, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_13, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_13, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_8} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_7, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_13, Thread1_P1_#t~ite10=|v_Thread1_P1_#t~ite10_2|, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_13, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_8} AuxVars[] AssignedVars[Thread1_P1_#t~ite10] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, Thread2_P2_thidvar0=2, Thread2_P2_~arg.base=0, Thread2_P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1_#t~ite10|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |Thread2_P2_#in~arg.base|=0, |Thread2_P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] 2 [831] L759-2-->L764: Formula: (and (= v_~y$r_buff1_thd2~0_8 |v_Thread1_P1_#t~ite10_3|) (= v_~__unbuffered_cnt~0_3 (+ v_~__unbuffered_cnt~0_4 1))) InVars {Thread1_P1_#t~ite10=|v_Thread1_P1_#t~ite10_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_4} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_8, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_3, Thread1_P1_#t~ite10=|v_Thread1_P1_#t~ite10_4|} AuxVars[] AssignedVars[~y$r_buff1_thd2~0, Thread1_P1_#t~ite10, ~__unbuffered_cnt~0] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, Thread2_P2_thidvar0=2, Thread2_P2_~arg.base=0, Thread2_P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |Thread2_P2_#in~arg.base|=0, |Thread2_P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] -1 [627] L818-1-->L822: Formula: (= v_~main$tmp_guard0~0_2 (ite (= 0 (ite (= v_~__unbuffered_cnt~0_8 3) 1 0)) 0 1)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_8} OutVars{~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_8, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_2, ULTIMATE.start_main_#t~nondet71=|v_ULTIMATE.start_main_#t~nondet71_2|} AuxVars[] AssignedVars[~main$tmp_guard0~0, ULTIMATE.start_main_#t~nondet71] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, Thread2_P2_thidvar0=2, Thread2_P2_~arg.base=0, Thread2_P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |Thread2_P2_#in~arg.base|=0, |Thread2_P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] -1 [691] L822-->L824: Formula: (not (= 0 (mod v_~main$tmp_guard0~0_3 256))) InVars {~main$tmp_guard0~0=v_~main$tmp_guard0~0_3} OutVars{~main$tmp_guard0~0=v_~main$tmp_guard0~0_3} AuxVars[] AssignedVars[] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, Thread2_P2_thidvar0=2, Thread2_P2_~arg.base=0, Thread2_P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |Thread2_P2_#in~arg.base|=0, |Thread2_P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] -1 [597] L824-->L824-2: Formula: (or (= (mod v_~y$r_buff0_thd0~0_4 256) 0) (= (mod v_~y$w_buff0_used~0_85 256) 0)) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_85, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_4} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_85, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_4} AuxVars[] AssignedVars[] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, Thread2_P2_thidvar0=2, Thread2_P2_~arg.base=0, Thread2_P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |Thread2_P2_#in~arg.base|=0, |Thread2_P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] -1 [604] L824-2-->L824-4: Formula: (and (= (select (select |v_#memory_int_24| |v_~#y~0.base_15|) |v_~#y~0.offset_15|) |v_ULTIMATE.start_main_#t~mem72_2|) (= |v_ULTIMATE.start_main_#t~ite73_3| |v_ULTIMATE.start_main_#t~mem72_2|) (or (= (mod v_~y$w_buff1_used~0_49 256) 0) (= 0 (mod v_~y$r_buff1_thd0~0_4 256)))) InVars {#memory_int=|v_#memory_int_24|, ~#y~0.offset=|v_~#y~0.offset_15|, ~#y~0.base=|v_~#y~0.base_15|, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_4, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_49} OutVars{ULTIMATE.start_main_#t~ite73=|v_ULTIMATE.start_main_#t~ite73_3|, ~#y~0.offset=|v_~#y~0.offset_15|, ULTIMATE.start_main_#t~mem72=|v_ULTIMATE.start_main_#t~mem72_2|, #memory_int=|v_#memory_int_24|, ~#y~0.base=|v_~#y~0.base_15|, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_4, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_49} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite73, ULTIMATE.start_main_#t~mem72] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, Thread2_P2_thidvar0=2, Thread2_P2_~arg.base=0, Thread2_P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |Thread2_P2_#in~arg.base|=0, |Thread2_P2_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite73|=1, |ULTIMATE.start_main_#t~mem72|=1, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] -1 [574] L824-4-->L824-5: Formula: (= |v_ULTIMATE.start_main_#t~ite74_3| |v_ULTIMATE.start_main_#t~ite73_4|) InVars {ULTIMATE.start_main_#t~ite73=|v_ULTIMATE.start_main_#t~ite73_4|} OutVars{ULTIMATE.start_main_#t~ite73=|v_ULTIMATE.start_main_#t~ite73_4|, ULTIMATE.start_main_#t~ite74=|v_ULTIMATE.start_main_#t~ite74_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite74] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, Thread2_P2_thidvar0=2, Thread2_P2_~arg.base=0, Thread2_P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |Thread2_P2_#in~arg.base|=0, |Thread2_P2_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite73|=1, |ULTIMATE.start_main_#t~ite74|=1, |ULTIMATE.start_main_#t~mem72|=1, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] -1 [579] L824-5-->L825: Formula: (= (store |v_#memory_int_26| |v_~#y~0.base_16| (store (select |v_#memory_int_26| |v_~#y~0.base_16|) |v_~#y~0.offset_16| |v_ULTIMATE.start_main_#t~ite74_5|)) |v_#memory_int_25|) InVars {#memory_int=|v_#memory_int_26|, ULTIMATE.start_main_#t~ite74=|v_ULTIMATE.start_main_#t~ite74_5|, ~#y~0.offset=|v_~#y~0.offset_16|, ~#y~0.base=|v_~#y~0.base_16|} OutVars{ULTIMATE.start_main_#t~ite73=|v_ULTIMATE.start_main_#t~ite73_5|, ULTIMATE.start_main_#t~ite74=|v_ULTIMATE.start_main_#t~ite74_4|, ~#y~0.offset=|v_~#y~0.offset_16|, ULTIMATE.start_main_#t~mem72=|v_ULTIMATE.start_main_#t~mem72_3|, #memory_int=|v_#memory_int_25|, ~#y~0.base=|v_~#y~0.base_16|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite73, ULTIMATE.start_main_#t~ite74, ULTIMATE.start_main_#t~mem72, #memory_int] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, Thread2_P2_thidvar0=2, Thread2_P2_~arg.base=0, Thread2_P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |Thread2_P2_#in~arg.base|=0, |Thread2_P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] -1 [666] L825-->L825-2: Formula: (and (or (= 0 (mod v_~y$w_buff0_used~0_87 256)) (= (mod v_~y$r_buff0_thd0~0_6 256) 0)) (= |v_ULTIMATE.start_main_#t~ite75_3| v_~y$w_buff0_used~0_87)) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_87, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_6} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_87, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_6, ULTIMATE.start_main_#t~ite75=|v_ULTIMATE.start_main_#t~ite75_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite75] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, Thread2_P2_thidvar0=2, Thread2_P2_~arg.base=0, Thread2_P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |Thread2_P2_#in~arg.base|=0, |Thread2_P2_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite75|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] -1 [669] L825-2-->L826: Formula: (= v_~y$w_buff0_used~0_88 |v_ULTIMATE.start_main_#t~ite75_5|) InVars {ULTIMATE.start_main_#t~ite75=|v_ULTIMATE.start_main_#t~ite75_5|} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_88, ULTIMATE.start_main_#t~ite75=|v_ULTIMATE.start_main_#t~ite75_4|} AuxVars[] AssignedVars[~y$w_buff0_used~0, ULTIMATE.start_main_#t~ite75] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, Thread2_P2_thidvar0=2, Thread2_P2_~arg.base=0, Thread2_P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |Thread2_P2_#in~arg.base|=0, |Thread2_P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] -1 [644] L826-->L826-2: Formula: (and (or (= (mod v_~y$w_buff1_used~0_51 256) 0) (= 0 (mod v_~y$r_buff1_thd0~0_6 256))) (or (= (mod v_~y$r_buff0_thd0~0_8 256) 0) (= (mod v_~y$w_buff0_used~0_90 256) 0)) (= |v_ULTIMATE.start_main_#t~ite76_3| v_~y$w_buff1_used~0_51)) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_90, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_6, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_8, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_51} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_90, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_6, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_8, ULTIMATE.start_main_#t~ite76=|v_ULTIMATE.start_main_#t~ite76_3|, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_51} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite76] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, Thread2_P2_thidvar0=2, Thread2_P2_~arg.base=0, Thread2_P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |Thread2_P2_#in~arg.base|=0, |Thread2_P2_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite76|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] -1 [630] L826-2-->L827: Formula: (= v_~y$w_buff1_used~0_52 |v_ULTIMATE.start_main_#t~ite76_5|) InVars {ULTIMATE.start_main_#t~ite76=|v_ULTIMATE.start_main_#t~ite76_5|} OutVars{ULTIMATE.start_main_#t~ite76=|v_ULTIMATE.start_main_#t~ite76_4|, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_52} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite76, ~y$w_buff1_used~0] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, Thread2_P2_thidvar0=2, Thread2_P2_~arg.base=0, Thread2_P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |Thread2_P2_#in~arg.base|=0, |Thread2_P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] -1 [707] L827-->L827-2: Formula: (and (= |v_ULTIMATE.start_main_#t~ite77_3| v_~y$r_buff0_thd0~0_10) (or (= (mod v_~y$w_buff0_used~0_92 256) 0) (= 0 (mod v_~y$r_buff0_thd0~0_10 256)))) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_92, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_10} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_92, ULTIMATE.start_main_#t~ite77=|v_ULTIMATE.start_main_#t~ite77_3|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_10} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite77] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, Thread2_P2_thidvar0=2, Thread2_P2_~arg.base=0, Thread2_P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |Thread2_P2_#in~arg.base|=0, |Thread2_P2_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite77|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] -1 [701] L827-2-->L828: Formula: (= v_~y$r_buff0_thd0~0_11 |v_ULTIMATE.start_main_#t~ite77_5|) InVars {ULTIMATE.start_main_#t~ite77=|v_ULTIMATE.start_main_#t~ite77_5|} OutVars{ULTIMATE.start_main_#t~ite77=|v_ULTIMATE.start_main_#t~ite77_4|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_11} AuxVars[] AssignedVars[~y$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite77] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, Thread2_P2_thidvar0=2, Thread2_P2_~arg.base=0, Thread2_P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |Thread2_P2_#in~arg.base|=0, |Thread2_P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] -1 [782] L828-->L828-2: Formula: (and (= |v_ULTIMATE.start_main_#t~ite78_3| v_~y$r_buff1_thd0~0_8) (or (= 0 (mod v_~y$w_buff0_used~0_94 256)) (= (mod v_~y$r_buff0_thd0~0_13 256) 0)) (or (= 0 (mod v_~y$r_buff1_thd0~0_8 256)) (= 0 (mod v_~y$w_buff1_used~0_54 256)))) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_94, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_8, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_13, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_54} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_94, ULTIMATE.start_main_#t~ite78=|v_ULTIMATE.start_main_#t~ite78_3|, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_8, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_13, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_54} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite78] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, Thread2_P2_thidvar0=2, Thread2_P2_~arg.base=0, Thread2_P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |Thread2_P2_#in~arg.base|=0, |Thread2_P2_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite78|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] -1 [787] L828-2-->L832: Formula: (and (= v_~y$r_buff1_thd0~0_9 |v_ULTIMATE.start_main_#t~ite78_5|) (= v_~weak$$choice1~0_6 (ite (= 0 (+ |v_ULTIMATE.start_main_#t~nondet79.offset_3| |v_ULTIMATE.start_main_#t~nondet79.base_3|)) 0 1))) InVars {ULTIMATE.start_main_#t~nondet79.offset=|v_ULTIMATE.start_main_#t~nondet79.offset_3|, ULTIMATE.start_main_#t~ite78=|v_ULTIMATE.start_main_#t~ite78_5|, ULTIMATE.start_main_#t~nondet79.base=|v_ULTIMATE.start_main_#t~nondet79.base_3|} OutVars{ULTIMATE.start_main_#t~nondet79.offset=|v_ULTIMATE.start_main_#t~nondet79.offset_2|, ~weak$$choice1~0=v_~weak$$choice1~0_6, ULTIMATE.start_main_#t~ite78=|v_ULTIMATE.start_main_#t~ite78_4|, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_9, ULTIMATE.start_main_#t~nondet79.base=|v_ULTIMATE.start_main_#t~nondet79.base_2|} AuxVars[] AssignedVars[~weak$$choice1~0, ULTIMATE.start_main_#t~nondet79.offset, ULTIMATE.start_main_#t~ite78, ~y$r_buff1_thd0~0, ULTIMATE.start_main_#t~nondet79.base] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, Thread2_P2_thidvar0=2, Thread2_P2_~arg.base=0, Thread2_P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |Thread2_P2_#in~arg.base|=0, |Thread2_P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] -1 [735] L832-->L832-1: Formula: (not (= (mod v_~__unbuffered_p2_EAX$read_delayed~0_3 256) 0)) InVars {~__unbuffered_p2_EAX$read_delayed~0=v_~__unbuffered_p2_EAX$read_delayed~0_3} OutVars{~__unbuffered_p2_EAX$read_delayed~0=v_~__unbuffered_p2_EAX$read_delayed~0_3} AuxVars[] AssignedVars[] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, Thread2_P2_thidvar0=2, Thread2_P2_~arg.base=0, Thread2_P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |Thread2_P2_#in~arg.base|=0, |Thread2_P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] -1 [737] L832-1-->L832-3: Formula: (and (not (= 0 (mod v_~weak$$choice1~0_7 256))) (= |v_ULTIMATE.start_main_#t~mem80_2| (select (select |v_#memory_int_27| v_~__unbuffered_p2_EAX$read_delayed_var~0.base_3) v_~__unbuffered_p2_EAX$read_delayed_var~0.offset_3)) (= |v_ULTIMATE.start_main_#t~ite81_2| |v_ULTIMATE.start_main_#t~mem80_2|)) InVars {#memory_int=|v_#memory_int_27|, ~weak$$choice1~0=v_~weak$$choice1~0_7, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=v_~__unbuffered_p2_EAX$read_delayed_var~0.offset_3, ~__unbuffered_p2_EAX$read_delayed_var~0.base=v_~__unbuffered_p2_EAX$read_delayed_var~0.base_3} OutVars{~weak$$choice1~0=v_~weak$$choice1~0_7, ULTIMATE.start_main_#t~ite81=|v_ULTIMATE.start_main_#t~ite81_2|, ULTIMATE.start_main_#t~mem80=|v_ULTIMATE.start_main_#t~mem80_2|, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=v_~__unbuffered_p2_EAX$read_delayed_var~0.offset_3, ~__unbuffered_p2_EAX$read_delayed_var~0.base=v_~__unbuffered_p2_EAX$read_delayed_var~0.base_3, #memory_int=|v_#memory_int_27|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite81, ULTIMATE.start_main_#t~mem80] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, Thread2_P2_thidvar0=2, Thread2_P2_~arg.base=0, Thread2_P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |Thread2_P2_#in~arg.base|=0, |Thread2_P2_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite81|=1, |ULTIMATE.start_main_#t~mem80|=1, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] -1 [719] L832-3-->L832-5: Formula: (= |v_ULTIMATE.start_main_#t~ite82_2| |v_ULTIMATE.start_main_#t~ite81_4|) InVars {ULTIMATE.start_main_#t~ite81=|v_ULTIMATE.start_main_#t~ite81_4|} OutVars{ULTIMATE.start_main_#t~ite81=|v_ULTIMATE.start_main_#t~ite81_4|, ULTIMATE.start_main_#t~ite82=|v_ULTIMATE.start_main_#t~ite82_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite82] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, Thread2_P2_thidvar0=2, Thread2_P2_~arg.base=0, Thread2_P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |Thread2_P2_#in~arg.base|=0, |Thread2_P2_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite81|=1, |ULTIMATE.start_main_#t~ite82|=1, |ULTIMATE.start_main_#t~mem80|=1, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] -1 [727] L832-5-->L835: Formula: (and (= v_~main$tmp_guard1~0_2 (ite (= 0 (ite (not (and (= v_~__unbuffered_p2_EAX~0_5 1) (= v_~__unbuffered_p0_EAX~0_3 1) (= 1 v_~__unbuffered_p1_EAX~0_3))) 1 0)) 0 1)) (= v_~__unbuffered_p2_EAX~0_5 |v_ULTIMATE.start_main_#t~ite82_5|)) InVars {~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_3, ULTIMATE.start_main_#t~ite82=|v_ULTIMATE.start_main_#t~ite82_5|, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_3} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_3, ULTIMATE.start_main_#t~ite82=|v_ULTIMATE.start_main_#t~ite82_4|, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_3, ULTIMATE.start_main_#t~ite81=|v_ULTIMATE.start_main_#t~ite81_5|, ULTIMATE.start_main_#t~mem80=|v_ULTIMATE.start_main_#t~mem80_3|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_2, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_5} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite82, ULTIMATE.start_main_#t~ite81, ULTIMATE.start_main_#t~mem80, ~main$tmp_guard1~0, ~__unbuffered_p2_EAX~0] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, Thread2_P2_thidvar0=2, Thread2_P2_~arg.base=0, Thread2_P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |Thread2_P2_#in~arg.base|=0, |Thread2_P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] -1 [595] L835-->L835-1: Formula: (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_1| (mod v_~main$tmp_guard1~0_3 256)) InVars {~main$tmp_guard1~0=v_~main$tmp_guard1~0_3} OutVars{~main$tmp_guard1~0=v_~main$tmp_guard1~0_3, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_1|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_#in~expression] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, Thread2_P2_thidvar0=2, Thread2_P2_~arg.base=0, Thread2_P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |Thread2_P2_#in~arg.base|=0, |Thread2_P2_#in~arg.offset|=0, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] -1 [601] L835-1-->L4: Formula: true InVars {} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_2} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, Thread2_P2_thidvar0=2, Thread2_P2_~arg.base=0, Thread2_P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |Thread2_P2_#in~arg.base|=0, |Thread2_P2_#in~arg.offset|=0, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] -1 [594] L4-->L4-1: Formula: (= v_ULTIMATE.start___VERIFIER_assert_~expression_3 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_2|) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_2|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_3, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_2|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, Thread2_P2_thidvar0=2, Thread2_P2_~arg.base=0, Thread2_P2_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |Thread2_P2_#in~arg.base|=0, |Thread2_P2_#in~arg.offset|=0, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] -1 [589] L4-1-->L4-2: Formula: (= v_ULTIMATE.start___VERIFIER_assert_~expression_4 0) InVars {ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_4} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_4} AuxVars[] AssignedVars[] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, Thread2_P2_thidvar0=2, Thread2_P2_~arg.base=0, Thread2_P2_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |Thread2_P2_#in~arg.base|=0, |Thread2_P2_#in~arg.offset|=0, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] -1 [587] L4-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] VAL [Thread0_P0_thidvar0=0, Thread0_P0_~arg.base=0, Thread0_P0_~arg.offset=0, Thread1_P1___VERIFIER_assert_~expression=1, Thread1_P1_thidvar0=1, Thread1_P1_~arg.base=0, Thread1_P1_~arg.offset=0, Thread2_P2_thidvar0=2, Thread2_P2_~arg.base=0, Thread2_P2_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |Thread0_P0_#in~arg.base|=0, |Thread0_P0_#in~arg.offset|=0, |Thread1_P1_#in~arg.base|=0, |Thread1_P1_#in~arg.offset|=0, |Thread1_P1___VERIFIER_assert_#in~expression|=1, |Thread2_P2_#in~arg.base|=0, |Thread2_P2_#in~arg.offset|=0, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] -1 #NULL.base, #NULL.offset := 0, 0; VAL [|#NULL.base|=0, |#NULL.offset|=0] [?] -1 #valid := #valid[0 := 0]; VAL [|#NULL.base|=0, |#NULL.offset|=0] [?] -1 ~__unbuffered_cnt~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0] [?] -1 ~__unbuffered_p0_EAX~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0] [?] -1 ~__unbuffered_p1_EAX~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0] [?] -1 ~__unbuffered_p2_EAX~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0] [?] -1 ~__unbuffered_p2_EAX$flush_delayed~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX~0=0] [?] -1 ~__unbuffered_p2_EAX$mem_tmp~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX~0=0] [?] -1 ~__unbuffered_p2_EAX$r_buff0_thd0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX~0=0] [?] -1 ~__unbuffered_p2_EAX$r_buff0_thd1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX~0=0] [?] -1 ~__unbuffered_p2_EAX$r_buff0_thd2~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX~0=0] [?] -1 ~__unbuffered_p2_EAX$r_buff0_thd3~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX~0=0] [?] -1 ~__unbuffered_p2_EAX$r_buff1_thd0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX~0=0] [?] -1 ~__unbuffered_p2_EAX$r_buff1_thd1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX~0=0] [?] -1 ~__unbuffered_p2_EAX$r_buff1_thd2~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX~0=0] [?] -1 ~__unbuffered_p2_EAX$r_buff1_thd3~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX~0=0] [?] -1 ~__unbuffered_p2_EAX$read_delayed~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX~0=0] [?] -1 ~__unbuffered_p2_EAX$read_delayed_var~0.base, ~__unbuffered_p2_EAX$read_delayed_var~0.offset := 0, 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX~0=0] [?] -1 ~__unbuffered_p2_EAX$w_buff0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX~0=0] [?] -1 ~__unbuffered_p2_EAX$w_buff0_used~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX~0=0] [?] -1 ~__unbuffered_p2_EAX$w_buff1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0] [?] -1 ~__unbuffered_p2_EAX$w_buff1_used~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0] [?] -1 ~main$tmp_guard0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0] [?] -1 ~main$tmp_guard1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [?] -1 ~x~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [?] -1 SUMMARY for call ~#y~0.base, ~#y~0.offset := #Ultimate.alloc(4); srcloc: L700 VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [?] -1 SUMMARY for call write~init~int(0, ~#y~0.base, ~#y~0.offset, 4); srcloc: L700-1 VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [?] -1 ~y$flush_delayed~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0] [?] -1 ~y$mem_tmp~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0] [?] -1 ~y$r_buff0_thd0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0] [?] -1 ~y$r_buff0_thd1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0] [?] -1 ~y$r_buff0_thd2~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0] [?] -1 ~y$r_buff0_thd3~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0] [?] -1 ~y$r_buff1_thd0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0] [?] -1 ~y$r_buff1_thd1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0] [?] -1 ~y$r_buff1_thd2~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0] [?] -1 ~y$r_buff1_thd3~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0] [?] -1 ~y$read_delayed~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed~0=0] [?] -1 ~y$read_delayed_var~0.base, ~y$read_delayed_var~0.offset := 0, 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0] [?] -1 ~y$w_buff0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0~0=0] [?] -1 ~y$w_buff0_used~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0] [?] -1 ~y$w_buff1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1~0=0] [?] -1 ~y$w_buff1_used~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0] [?] -1 ~z~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] -1 ~weak$$choice0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] -1 ~weak$$choice1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] -1 ~weak$$choice2~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] -1 havoc main_#res; VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] -1 havoc main_#t~nondet69, main_#t~nondet70, main_#t~nondet71, main_#t~ite74, main_#t~ite73, main_#t~mem72, main_#t~ite75, main_#t~ite76, main_#t~ite77, main_#t~ite78, main_#t~nondet79.base, main_#t~nondet79.offset, main_#t~ite82, main_#t~ite81, main_#t~mem80, main_~#t2686~0.base, main_~#t2686~0.offset, main_~#t2687~0.base, main_~#t2687~0.offset, main_~#t2688~0.base, main_~#t2688~0.offset; VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] -1 SUMMARY for call main_~#t2686~0.base, main_~#t2686~0.offset := #Ultimate.alloc(4); srcloc: L813 VAL [|#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] -1 SUMMARY for call write~int(0, main_~#t2686~0.base, main_~#t2686~0.offset, 4); srcloc: L813-1 VAL [|#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] FORK -1 fork 0 P0(0, 0); VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] -1 havoc main_#t~nondet69; VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] -1 SUMMARY for call main_~#t2687~0.base, main_~#t2687~0.offset := #Ultimate.alloc(4); srcloc: L815 VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] -1 SUMMARY for call write~int(1, main_~#t2687~0.base, main_~#t2687~0.offset, 4); srcloc: L815-1 VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] FORK -1 fork 1 P1(0, 0); VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] -1 havoc main_#t~nondet70; VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] -1 SUMMARY for call main_~#t2688~0.base, main_~#t2688~0.offset := #Ultimate.alloc(4); srcloc: L817 VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] -1 SUMMARY for call write~int(2, main_~#t2688~0.base, main_~#t2688~0.offset, 4); srcloc: L817-1 VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] FORK -1 fork 2 P2(0, 0); VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] 0 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset;~weak$$choice0~0 := (if 0 == #t~nondet12.base + #t~nondet12.offset then 0 else 1);havoc #t~nondet12.base, #t~nondet12.offset;~weak$$choice2~0 := (if 0 == #t~nondet13.base + #t~nondet13.offset then 0 else 1);havoc #t~nondet13.base, #t~nondet13.offset;~y$flush_delayed~0 := ~weak$$choice2~0;call #t~mem14 := read~int(~#y~0.base, ~#y~0.offset, 4);~y$mem_tmp~0 := #t~mem14;havoc #t~mem14;~weak$$choice1~0 := (if 0 == #t~nondet15.base + #t~nondet15.offset then 0 else 1);havoc #t~nondet15.base, #t~nondet15.offset; VAL [P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] 0 assume 0 == ~y$w_buff0_used~0 % 256;call #t~mem16 := read~int(~#y~0.base, ~#y~0.offset, 4);#t~ite26 := #t~mem16; VAL [P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite26|=0, |P2_#t~mem16|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] 0 call write~int(#t~ite26, ~#y~0.base, ~#y~0.offset, 4);havoc #t~mem17;havoc #t~ite24;havoc #t~ite18;havoc #t~ite23;havoc #t~ite20;havoc #t~mem16;havoc #t~ite26;havoc #t~ite25;havoc #t~ite19;havoc #t~ite22;havoc #t~mem21; VAL [P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] 0 assume 0 != ~weak$$choice2~0 % 256;#t~ite31 := ~y$w_buff0~0; VAL [P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite31|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] 0 ~y$w_buff0~0 := #t~ite31;havoc #t~ite27;havoc #t~ite31;havoc #t~ite30;havoc #t~ite29;havoc #t~ite28; VAL [P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] 0 assume 0 != ~weak$$choice2~0 % 256;#t~ite36 := ~y$w_buff1~0; VAL [P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite36|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] 0 ~y$w_buff1~0 := #t~ite36;havoc #t~ite36;havoc #t~ite35;havoc #t~ite32;havoc #t~ite33;havoc #t~ite34; VAL [P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] 0 assume 0 != ~weak$$choice2~0 % 256;#t~ite41 := ~y$w_buff0_used~0 % 256; VAL [P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite41|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] 0 ~y$w_buff0_used~0 := (if 0 == #t~ite41 then 0 else 1);havoc #t~ite39;havoc #t~ite40;havoc #t~ite38;havoc #t~ite37;havoc #t~ite41; VAL [P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] 0 assume 0 != ~weak$$choice2~0 % 256;#t~ite46 := ~y$w_buff1_used~0; VAL [P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite46|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] 0 ~y$w_buff1_used~0 := #t~ite46;havoc #t~ite43;havoc #t~ite42;havoc #t~ite44;havoc #t~ite45;havoc #t~ite46; VAL [P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] 0 assume 0 != ~weak$$choice2~0 % 256;#t~ite51 := ~y$r_buff0_thd3~0; VAL [P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite51|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] 0 ~y$r_buff0_thd3~0 := #t~ite51;havoc #t~ite49;havoc #t~ite50;havoc #t~ite48;havoc #t~ite51;havoc #t~ite47; VAL [P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] 0 assume 0 != ~weak$$choice2~0 % 256;#t~ite57 := ~y$r_buff1_thd3~0; VAL [P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite57|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] 0 ~y$r_buff1_thd3~0 := #t~ite57;havoc #t~ite57;havoc #t~ite52;havoc #t~ite55;havoc #t~ite54;havoc #t~ite53;havoc #t~ite56;~__unbuffered_p2_EAX$read_delayed~0 := 1;~__unbuffered_p2_EAX$read_delayed_var~0.base, ~__unbuffered_p2_EAX$read_delayed_var~0.offset := ~#y~0.base, ~#y~0.offset;call #t~mem58 := read~int(~#y~0.base, ~#y~0.offset, 4);~__unbuffered_p2_EAX~0 := #t~mem58;havoc #t~mem58; VAL [P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] 0 assume 0 != ~y$flush_delayed~0 % 256;#t~ite60 := ~y$mem_tmp~0; VAL [P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite60|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] 0 call write~int(#t~ite60, ~#y~0.base, ~#y~0.offset, 4);havoc #t~mem59;havoc #t~ite60;~y$flush_delayed~0 := 0;~z~0 := 1; VAL [P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] 1 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset;~__unbuffered_p0_EAX~0 := ~z~0;~x~0 := 1;~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] 0 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256); VAL [P0_~arg.base=0, P0_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] 2 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset;~__unbuffered_p1_EAX~0 := ~x~0;~y$w_buff1~0 := ~y$w_buff0~0;~y$w_buff0~0 := 1;~y$w_buff1_used~0 := ~y$w_buff0_used~0;~y$w_buff0_used~0 := 1;__VERIFIER_assert_#in~expression := (if !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$w_buff0_used~0 % 256) then 1 else 0);havoc __VERIFIER_assert_~expression;__VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] 2 assume !(0 == __VERIFIER_assert_~expression); VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] 0 assume !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd3~0 % 256);call #t~mem61 := read~int(~#y~0.base, ~#y~0.offset, 4);#t~ite62 := #t~mem61; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite62|=0, |P2_#t~mem61|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] 0 #t~ite63 := #t~ite62; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite62|=0, |P2_#t~ite63|=0, |P2_#t~mem61|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] 0 call write~int(#t~ite63, ~#y~0.base, ~#y~0.offset, 4);havoc #t~ite62;havoc #t~ite63;havoc #t~mem61; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] 0 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256);#t~ite64 := ~y$w_buff0_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite64|=1, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] 0 ~y$w_buff0_used~0 := #t~ite64;havoc #t~ite64; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] 0 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd3~0 % 256));#t~ite65 := ~y$w_buff1_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite65|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] 0 ~y$w_buff1_used~0 := #t~ite65;havoc #t~ite65; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] 0 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256);#t~ite66 := ~y$r_buff0_thd3~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite66|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] 0 ~y$r_buff0_thd3~0 := #t~ite66;havoc #t~ite66; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] 0 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd3~0 % 256));#t~ite67 := ~y$r_buff1_thd3~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite67|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] 0 ~y$r_buff1_thd3~0 := #t~ite67;havoc #t~ite67;~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] 2 ~y$r_buff1_thd0~0 := ~y$r_buff0_thd0~0;~y$r_buff1_thd1~0 := ~y$r_buff0_thd1~0;~y$r_buff1_thd2~0 := ~y$r_buff0_thd2~0;~y$r_buff1_thd3~0 := ~y$r_buff0_thd3~0;~y$r_buff0_thd2~0 := 1; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] 2 assume 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256;#t~ite6 := ~y$w_buff0~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite6|=1, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] 2 call write~int(#t~ite6, ~#y~0.base, ~#y~0.offset, 4);havoc #t~ite6;havoc #t~ite5;havoc #t~mem4; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] 2 assume 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256;#t~ite7 := 0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite7|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] 2 ~y$w_buff0_used~0 := #t~ite7;havoc #t~ite7; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] 2 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256));#t~ite8 := ~y$w_buff1_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite8|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] 2 ~y$w_buff1_used~0 := #t~ite8;havoc #t~ite8; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] 2 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256);#t~ite9 := ~y$r_buff0_thd2~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite9|=1, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] 2 ~y$r_buff0_thd2~0 := #t~ite9;havoc #t~ite9; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] 2 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256));#t~ite10 := ~y$r_buff1_thd2~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite10|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] 2 ~y$r_buff1_thd2~0 := #t~ite10;havoc #t~ite10;~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] -1 havoc main_#t~nondet71;~main$tmp_guard0~0 := (if 0 == (if 3 == ~__unbuffered_cnt~0 then 1 else 0) then 0 else 1); VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] -1 assume 0 != ~main$tmp_guard0~0 % 256; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256); VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] -1 assume !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256);call main_#t~mem72 := read~int(~#y~0.base, ~#y~0.offset, 4);main_#t~ite73 := main_#t~mem72; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite73|=1, |ULTIMATE.start_main_#t~mem72|=1, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] -1 main_#t~ite74 := main_#t~ite73; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite73|=1, |ULTIMATE.start_main_#t~ite74|=1, |ULTIMATE.start_main_#t~mem72|=1, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] -1 call write~int(main_#t~ite74, ~#y~0.base, ~#y~0.offset, 4);havoc main_#t~ite73;havoc main_#t~ite74;havoc main_#t~mem72; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256);main_#t~ite75 := ~y$w_buff0_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite75|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] -1 ~y$w_buff0_used~0 := main_#t~ite75;havoc main_#t~ite75; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] -1 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256));main_#t~ite76 := ~y$w_buff1_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite76|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] -1 ~y$w_buff1_used~0 := main_#t~ite76;havoc main_#t~ite76; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256);main_#t~ite77 := ~y$r_buff0_thd0~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite77|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] -1 ~y$r_buff0_thd0~0 := main_#t~ite77;havoc main_#t~ite77; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] -1 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256));main_#t~ite78 := ~y$r_buff1_thd0~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite78|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] -1 ~y$r_buff1_thd0~0 := main_#t~ite78;havoc main_#t~ite78;~weak$$choice1~0 := (if 0 == main_#t~nondet79.base + main_#t~nondet79.offset then 0 else 1);havoc main_#t~nondet79.base, main_#t~nondet79.offset; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] -1 assume 0 != ~__unbuffered_p2_EAX$read_delayed~0 % 256; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] -1 assume 0 != ~weak$$choice1~0 % 256;call main_#t~mem80 := read~int(~__unbuffered_p2_EAX$read_delayed_var~0.base, ~__unbuffered_p2_EAX$read_delayed_var~0.offset, 4);main_#t~ite81 := main_#t~mem80; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite81|=1, |ULTIMATE.start_main_#t~mem80|=1, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] -1 main_#t~ite82 := main_#t~ite81; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite81|=1, |ULTIMATE.start_main_#t~ite82|=1, |ULTIMATE.start_main_#t~mem80|=1, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] -1 ~__unbuffered_p2_EAX~0 := main_#t~ite82;havoc main_#t~ite82;havoc main_#t~ite81;havoc main_#t~mem80;~main$tmp_guard1~0 := (if 0 == (if !((1 == ~__unbuffered_p0_EAX~0 && 1 == ~__unbuffered_p1_EAX~0) && 1 == ~__unbuffered_p2_EAX~0) then 1 else 0) then 0 else 1); VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] -1 __VERIFIER_assert_#in~expression := ~main$tmp_guard1~0 % 256; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] -1 havoc __VERIFIER_assert_~expression; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] -1 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] -1 assume 0 == __VERIFIER_assert_~expression; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] -1 assume !false; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] ----- ----- class de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder.RCFGBacktranslator [?] -1 #NULL.base, #NULL.offset := 0, 0; VAL [|#NULL.base|=0, |#NULL.offset|=0] [?] -1 #valid := #valid[0 := 0]; VAL [|#NULL.base|=0, |#NULL.offset|=0] [?] -1 ~__unbuffered_cnt~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0] [?] -1 ~__unbuffered_p0_EAX~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0] [?] -1 ~__unbuffered_p1_EAX~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0] [?] -1 ~__unbuffered_p2_EAX~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0] [?] -1 ~__unbuffered_p2_EAX$flush_delayed~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX~0=0] [?] -1 ~__unbuffered_p2_EAX$mem_tmp~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX~0=0] [?] -1 ~__unbuffered_p2_EAX$r_buff0_thd0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX~0=0] [?] -1 ~__unbuffered_p2_EAX$r_buff0_thd1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX~0=0] [?] -1 ~__unbuffered_p2_EAX$r_buff0_thd2~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX~0=0] [?] -1 ~__unbuffered_p2_EAX$r_buff0_thd3~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX~0=0] [?] -1 ~__unbuffered_p2_EAX$r_buff1_thd0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX~0=0] [?] -1 ~__unbuffered_p2_EAX$r_buff1_thd1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX~0=0] [?] -1 ~__unbuffered_p2_EAX$r_buff1_thd2~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX~0=0] [?] -1 ~__unbuffered_p2_EAX$r_buff1_thd3~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX~0=0] [?] -1 ~__unbuffered_p2_EAX$read_delayed~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX~0=0] [?] -1 ~__unbuffered_p2_EAX$read_delayed_var~0.base, ~__unbuffered_p2_EAX$read_delayed_var~0.offset := 0, 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX~0=0] [?] -1 ~__unbuffered_p2_EAX$w_buff0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX~0=0] [?] -1 ~__unbuffered_p2_EAX$w_buff0_used~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX~0=0] [?] -1 ~__unbuffered_p2_EAX$w_buff1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0] [?] -1 ~__unbuffered_p2_EAX$w_buff1_used~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0] [?] -1 ~main$tmp_guard0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0] [?] -1 ~main$tmp_guard1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [?] -1 ~x~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [?] -1 SUMMARY for call ~#y~0.base, ~#y~0.offset := #Ultimate.alloc(4); srcloc: L700 VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [?] -1 SUMMARY for call write~init~int(0, ~#y~0.base, ~#y~0.offset, 4); srcloc: L700-1 VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [?] -1 ~y$flush_delayed~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0] [?] -1 ~y$mem_tmp~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0] [?] -1 ~y$r_buff0_thd0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0] [?] -1 ~y$r_buff0_thd1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0] [?] -1 ~y$r_buff0_thd2~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0] [?] -1 ~y$r_buff0_thd3~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0] [?] -1 ~y$r_buff1_thd0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0] [?] -1 ~y$r_buff1_thd1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0] [?] -1 ~y$r_buff1_thd2~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0] [?] -1 ~y$r_buff1_thd3~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0] [?] -1 ~y$read_delayed~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed~0=0] [?] -1 ~y$read_delayed_var~0.base, ~y$read_delayed_var~0.offset := 0, 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0] [?] -1 ~y$w_buff0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0~0=0] [?] -1 ~y$w_buff0_used~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0] [?] -1 ~y$w_buff1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1~0=0] [?] -1 ~y$w_buff1_used~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0] [?] -1 ~z~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] -1 ~weak$$choice0~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] -1 ~weak$$choice1~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] -1 ~weak$$choice2~0 := 0; VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] -1 havoc main_#res; VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] -1 havoc main_#t~nondet69, main_#t~nondet70, main_#t~nondet71, main_#t~ite74, main_#t~ite73, main_#t~mem72, main_#t~ite75, main_#t~ite76, main_#t~ite77, main_#t~ite78, main_#t~nondet79.base, main_#t~nondet79.offset, main_#t~ite82, main_#t~ite81, main_#t~mem80, main_~#t2686~0.base, main_~#t2686~0.offset, main_~#t2687~0.base, main_~#t2687~0.offset, main_~#t2688~0.base, main_~#t2688~0.offset; VAL [|#NULL.base|=0, |#NULL.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] -1 SUMMARY for call main_~#t2686~0.base, main_~#t2686~0.offset := #Ultimate.alloc(4); srcloc: L813 VAL [|#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] -1 SUMMARY for call write~int(0, main_~#t2686~0.base, main_~#t2686~0.offset, 4); srcloc: L813-1 VAL [|#NULL.base|=0, |#NULL.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] FORK -1 fork 0 P0(0, 0); VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] -1 havoc main_#t~nondet69; VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] -1 SUMMARY for call main_~#t2687~0.base, main_~#t2687~0.offset := #Ultimate.alloc(4); srcloc: L815 VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] -1 SUMMARY for call write~int(1, main_~#t2687~0.base, main_~#t2687~0.offset, 4); srcloc: L815-1 VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] FORK -1 fork 1 P1(0, 0); VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] -1 havoc main_#t~nondet70; VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] -1 SUMMARY for call main_~#t2688~0.base, main_~#t2688~0.offset := #Ultimate.alloc(4); srcloc: L817 VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] -1 SUMMARY for call write~int(2, main_~#t2688~0.base, main_~#t2688~0.offset, 4); srcloc: L817-1 VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] FORK -1 fork 2 P2(0, 0); VAL [|#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] 0 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset;~weak$$choice0~0 := (if 0 == #t~nondet12.base + #t~nondet12.offset then 0 else 1);havoc #t~nondet12.base, #t~nondet12.offset;~weak$$choice2~0 := (if 0 == #t~nondet13.base + #t~nondet13.offset then 0 else 1);havoc #t~nondet13.base, #t~nondet13.offset;~y$flush_delayed~0 := ~weak$$choice2~0;call #t~mem14 := read~int(~#y~0.base, ~#y~0.offset, 4);~y$mem_tmp~0 := #t~mem14;havoc #t~mem14;~weak$$choice1~0 := (if 0 == #t~nondet15.base + #t~nondet15.offset then 0 else 1);havoc #t~nondet15.base, #t~nondet15.offset; VAL [P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] 0 assume 0 == ~y$w_buff0_used~0 % 256;call #t~mem16 := read~int(~#y~0.base, ~#y~0.offset, 4);#t~ite26 := #t~mem16; VAL [P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite26|=0, |P2_#t~mem16|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] 0 call write~int(#t~ite26, ~#y~0.base, ~#y~0.offset, 4);havoc #t~mem17;havoc #t~ite24;havoc #t~ite18;havoc #t~ite23;havoc #t~ite20;havoc #t~mem16;havoc #t~ite26;havoc #t~ite25;havoc #t~ite19;havoc #t~ite22;havoc #t~mem21; VAL [P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] 0 assume 0 != ~weak$$choice2~0 % 256;#t~ite31 := ~y$w_buff0~0; VAL [P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite31|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] 0 ~y$w_buff0~0 := #t~ite31;havoc #t~ite27;havoc #t~ite31;havoc #t~ite30;havoc #t~ite29;havoc #t~ite28; VAL [P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] 0 assume 0 != ~weak$$choice2~0 % 256;#t~ite36 := ~y$w_buff1~0; VAL [P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite36|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] 0 ~y$w_buff1~0 := #t~ite36;havoc #t~ite36;havoc #t~ite35;havoc #t~ite32;havoc #t~ite33;havoc #t~ite34; VAL [P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] 0 assume 0 != ~weak$$choice2~0 % 256;#t~ite41 := ~y$w_buff0_used~0 % 256; VAL [P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite41|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] 0 ~y$w_buff0_used~0 := (if 0 == #t~ite41 then 0 else 1);havoc #t~ite39;havoc #t~ite40;havoc #t~ite38;havoc #t~ite37;havoc #t~ite41; VAL [P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] 0 assume 0 != ~weak$$choice2~0 % 256;#t~ite46 := ~y$w_buff1_used~0; VAL [P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite46|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] 0 ~y$w_buff1_used~0 := #t~ite46;havoc #t~ite43;havoc #t~ite42;havoc #t~ite44;havoc #t~ite45;havoc #t~ite46; VAL [P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] 0 assume 0 != ~weak$$choice2~0 % 256;#t~ite51 := ~y$r_buff0_thd3~0; VAL [P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite51|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] 0 ~y$r_buff0_thd3~0 := #t~ite51;havoc #t~ite49;havoc #t~ite50;havoc #t~ite48;havoc #t~ite51;havoc #t~ite47; VAL [P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] 0 assume 0 != ~weak$$choice2~0 % 256;#t~ite57 := ~y$r_buff1_thd3~0; VAL [P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite57|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] 0 ~y$r_buff1_thd3~0 := #t~ite57;havoc #t~ite57;havoc #t~ite52;havoc #t~ite55;havoc #t~ite54;havoc #t~ite53;havoc #t~ite56;~__unbuffered_p2_EAX$read_delayed~0 := 1;~__unbuffered_p2_EAX$read_delayed_var~0.base, ~__unbuffered_p2_EAX$read_delayed_var~0.offset := ~#y~0.base, ~#y~0.offset;call #t~mem58 := read~int(~#y~0.base, ~#y~0.offset, 4);~__unbuffered_p2_EAX~0 := #t~mem58;havoc #t~mem58; VAL [P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] 0 assume 0 != ~y$flush_delayed~0 % 256;#t~ite60 := ~y$mem_tmp~0; VAL [P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite60|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] 0 call write~int(#t~ite60, ~#y~0.base, ~#y~0.offset, 4);havoc #t~mem59;havoc #t~ite60;~y$flush_delayed~0 := 0;~z~0 := 1; VAL [P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] 1 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset;~__unbuffered_p0_EAX~0 := ~z~0;~x~0 := 1;~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] 0 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256); VAL [P0_~arg.base=0, P0_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] 2 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset;~__unbuffered_p1_EAX~0 := ~x~0;~y$w_buff1~0 := ~y$w_buff0~0;~y$w_buff0~0 := 1;~y$w_buff1_used~0 := ~y$w_buff0_used~0;~y$w_buff0_used~0 := 1;__VERIFIER_assert_#in~expression := (if !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$w_buff0_used~0 % 256) then 1 else 0);havoc __VERIFIER_assert_~expression;__VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] 2 assume !(0 == __VERIFIER_assert_~expression); VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] 0 assume !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd3~0 % 256);call #t~mem61 := read~int(~#y~0.base, ~#y~0.offset, 4);#t~ite62 := #t~mem61; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite62|=0, |P2_#t~mem61|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] 0 #t~ite63 := #t~ite62; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite62|=0, |P2_#t~ite63|=0, |P2_#t~mem61|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] 0 call write~int(#t~ite63, ~#y~0.base, ~#y~0.offset, 4);havoc #t~ite62;havoc #t~ite63;havoc #t~mem61; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] 0 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256);#t~ite64 := ~y$w_buff0_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite64|=1, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] 0 ~y$w_buff0_used~0 := #t~ite64;havoc #t~ite64; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] 0 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd3~0 % 256));#t~ite65 := ~y$w_buff1_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite65|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] 0 ~y$w_buff1_used~0 := #t~ite65;havoc #t~ite65; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] 0 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256);#t~ite66 := ~y$r_buff0_thd3~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite66|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] 0 ~y$r_buff0_thd3~0 := #t~ite66;havoc #t~ite66; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] 0 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd3~0 % 256));#t~ite67 := ~y$r_buff1_thd3~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |P2_#t~ite67|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] 0 ~y$r_buff1_thd3~0 := #t~ite67;havoc #t~ite67;~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] 2 ~y$r_buff1_thd0~0 := ~y$r_buff0_thd0~0;~y$r_buff1_thd1~0 := ~y$r_buff0_thd1~0;~y$r_buff1_thd2~0 := ~y$r_buff0_thd2~0;~y$r_buff1_thd3~0 := ~y$r_buff0_thd3~0;~y$r_buff0_thd2~0 := 1; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] 2 assume 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256;#t~ite6 := ~y$w_buff0~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite6|=1, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] 2 call write~int(#t~ite6, ~#y~0.base, ~#y~0.offset, 4);havoc #t~ite6;havoc #t~ite5;havoc #t~mem4; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] 2 assume 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256;#t~ite7 := 0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite7|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] 2 ~y$w_buff0_used~0 := #t~ite7;havoc #t~ite7; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] 2 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256));#t~ite8 := ~y$w_buff1_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite8|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] 2 ~y$w_buff1_used~0 := #t~ite8;havoc #t~ite8; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] 2 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256);#t~ite9 := ~y$r_buff0_thd2~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite9|=1, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] 2 ~y$r_buff0_thd2~0 := #t~ite9;havoc #t~ite9; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] 2 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256));#t~ite10 := ~y$r_buff1_thd2~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1_#t~ite10|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] 2 ~y$r_buff1_thd2~0 := #t~ite10;havoc #t~ite10;~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] -1 havoc main_#t~nondet71;~main$tmp_guard0~0 := (if 0 == (if 3 == ~__unbuffered_cnt~0 then 1 else 0) then 0 else 1); VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] -1 assume 0 != ~main$tmp_guard0~0 % 256; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256); VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] -1 assume !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256);call main_#t~mem72 := read~int(~#y~0.base, ~#y~0.offset, 4);main_#t~ite73 := main_#t~mem72; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite73|=1, |ULTIMATE.start_main_#t~mem72|=1, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] -1 main_#t~ite74 := main_#t~ite73; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite73|=1, |ULTIMATE.start_main_#t~ite74|=1, |ULTIMATE.start_main_#t~mem72|=1, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] -1 call write~int(main_#t~ite74, ~#y~0.base, ~#y~0.offset, 4);havoc main_#t~ite73;havoc main_#t~ite74;havoc main_#t~mem72; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256);main_#t~ite75 := ~y$w_buff0_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite75|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] -1 ~y$w_buff0_used~0 := main_#t~ite75;havoc main_#t~ite75; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] -1 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256));main_#t~ite76 := ~y$w_buff1_used~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite76|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] -1 ~y$w_buff1_used~0 := main_#t~ite76;havoc main_#t~ite76; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256);main_#t~ite77 := ~y$r_buff0_thd0~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite77|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] -1 ~y$r_buff0_thd0~0 := main_#t~ite77;havoc main_#t~ite77; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] -1 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256));main_#t~ite78 := ~y$r_buff1_thd0~0; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite78|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] -1 ~y$r_buff1_thd0~0 := main_#t~ite78;havoc main_#t~ite78;~weak$$choice1~0 := (if 0 == main_#t~nondet79.base + main_#t~nondet79.offset then 0 else 1);havoc main_#t~nondet79.base, main_#t~nondet79.offset; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] -1 assume 0 != ~__unbuffered_p2_EAX$read_delayed~0 % 256; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] -1 assume 0 != ~weak$$choice1~0 % 256;call main_#t~mem80 := read~int(~__unbuffered_p2_EAX$read_delayed_var~0.base, ~__unbuffered_p2_EAX$read_delayed_var~0.offset, 4);main_#t~ite81 := main_#t~mem80; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite81|=1, |ULTIMATE.start_main_#t~mem80|=1, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] -1 main_#t~ite82 := main_#t~ite81; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_#t~ite81|=1, |ULTIMATE.start_main_#t~ite82|=1, |ULTIMATE.start_main_#t~mem80|=1, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] -1 ~__unbuffered_p2_EAX~0 := main_#t~ite82;havoc main_#t~ite82;havoc main_#t~ite81;havoc main_#t~mem80;~main$tmp_guard1~0 := (if 0 == (if !((1 == ~__unbuffered_p0_EAX~0 && 1 == ~__unbuffered_p1_EAX~0) && 1 == ~__unbuffered_p2_EAX~0) then 1 else 0) then 0 else 1); VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] -1 __VERIFIER_assert_#in~expression := ~main$tmp_guard1~0 % 256; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] -1 havoc __VERIFIER_assert_~expression; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] -1 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] -1 assume 0 == __VERIFIER_assert_~expression; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] -1 assume !false; VAL [P0_~arg.base=0, P0_~arg.offset=0, P1___VERIFIER_assert_~expression=1, P1_~arg.base=0, P1_~arg.offset=0, P2_~arg.base=0, P2_~arg.offset=0, ULTIMATE.start___VERIFIER_assert_~expression=0, |#NULL.base|=0, |#NULL.offset|=0, |P0_#in~arg.base|=0, |P0_#in~arg.offset|=0, |P1_#in~arg.base|=0, |P1_#in~arg.offset|=0, |P1___VERIFIER_assert_#in~expression|=1, |P2_#in~arg.base|=0, |P2_#in~arg.offset|=0, |ULTIMATE.start___VERIFIER_assert_#in~expression|=0, |ULTIMATE.start_main_~#t2686~0.base|=8, |ULTIMATE.start_main_~#t2686~0.offset|=0, |ULTIMATE.start_main_~#t2687~0.base|=7, |ULTIMATE.start_main_~#t2687~0.offset|=0, |ULTIMATE.start_main_~#t2688~0.base|=5, |ULTIMATE.start_main_~#t2688~0.offset|=0, |~#y~0.base|=6, |~#y~0.offset|=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=1, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] -1 #NULL.base, #NULL.offset := 0, 0; VAL [#NULL.base=0, #NULL.offset=0] [?] -1 #valid := #valid[0 := 0]; VAL [#NULL.base=0, #NULL.offset=0] [L672] -1 ~__unbuffered_cnt~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0] [L674] -1 ~__unbuffered_p0_EAX~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0] [L676] -1 ~__unbuffered_p1_EAX~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0] [L678] -1 ~__unbuffered_p2_EAX~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0] [L679] -1 ~__unbuffered_p2_EAX$flush_delayed~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX~0=0] [L680] -1 ~__unbuffered_p2_EAX$mem_tmp~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX~0=0] [L681] -1 ~__unbuffered_p2_EAX$r_buff0_thd0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX~0=0] [L682] -1 ~__unbuffered_p2_EAX$r_buff0_thd1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX~0=0] [L683] -1 ~__unbuffered_p2_EAX$r_buff0_thd2~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX~0=0] [L684] -1 ~__unbuffered_p2_EAX$r_buff0_thd3~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX~0=0] [L685] -1 ~__unbuffered_p2_EAX$r_buff1_thd0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX~0=0] [L686] -1 ~__unbuffered_p2_EAX$r_buff1_thd1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX~0=0] [L687] -1 ~__unbuffered_p2_EAX$r_buff1_thd2~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX~0=0] [L688] -1 ~__unbuffered_p2_EAX$r_buff1_thd3~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX~0=0] [L689] -1 ~__unbuffered_p2_EAX$read_delayed~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX~0=0] [L690] -1 ~__unbuffered_p2_EAX$read_delayed_var~0.base, ~__unbuffered_p2_EAX$read_delayed_var~0.offset := 0, 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX~0=0] [L691] -1 ~__unbuffered_p2_EAX$w_buff0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX~0=0] [L692] -1 ~__unbuffered_p2_EAX$w_buff0_used~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX~0=0] [L693] -1 ~__unbuffered_p2_EAX$w_buff1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0] [L694] -1 ~__unbuffered_p2_EAX$w_buff1_used~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0] [L695] -1 ~main$tmp_guard0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0] [L696] -1 ~main$tmp_guard1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [L698] -1 ~x~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [L700] -1 call ~#y~0.base, ~#y~0.offset := #Ultimate.alloc(4); VAL [#NULL.base=0, #NULL.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [L700] -1 call write~init~int(0, ~#y~0.base, ~#y~0.offset, 4); VAL [#NULL.base=0, #NULL.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [L701] -1 ~y$flush_delayed~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0] [L702] -1 ~y$mem_tmp~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0] [L703] -1 ~y$r_buff0_thd0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0] [L704] -1 ~y$r_buff0_thd1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0] [L705] -1 ~y$r_buff0_thd2~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0] [L706] -1 ~y$r_buff0_thd3~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0] [L707] -1 ~y$r_buff1_thd0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0] [L708] -1 ~y$r_buff1_thd1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0] [L709] -1 ~y$r_buff1_thd2~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0] [L710] -1 ~y$r_buff1_thd3~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0] [L711] -1 ~y$read_delayed~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed~0=0] [L712] -1 ~y$read_delayed_var~0.base, ~y$read_delayed_var~0.offset := 0, 0; VAL [#NULL.base=0, #NULL.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0] [L713] -1 ~y$w_buff0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0~0=0] [L714] -1 ~y$w_buff0_used~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0] [L715] -1 ~y$w_buff1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1~0=0] [L716] -1 ~y$w_buff1_used~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0] [L718] -1 ~z~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L719] -1 ~weak$$choice0~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L720] -1 ~weak$$choice1~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L721] -1 ~weak$$choice2~0 := 0; VAL [#NULL.base=0, #NULL.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] -1 havoc main_#res; VAL [#NULL.base=0, #NULL.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] -1 havoc main_#t~nondet69, main_#t~nondet70, main_#t~nondet71, main_#t~ite74, main_#t~ite73, main_#t~mem72, main_#t~ite75, main_#t~ite76, main_#t~ite77, main_#t~ite78, main_#t~nondet79.base, main_#t~nondet79.offset, main_#t~ite82, main_#t~ite81, main_#t~mem80, main_~#t2686~0.base, main_~#t2686~0.offset, main_~#t2687~0.base, main_~#t2687~0.offset, main_~#t2688~0.base, main_~#t2688~0.offset; VAL [#NULL.base=0, #NULL.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L813] -1 call main_~#t2686~0.base, main_~#t2686~0.offset := #Ultimate.alloc(4); VAL [#NULL.base=0, #NULL.offset=0, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L814] -1 call write~int(0, main_~#t2686~0.base, main_~#t2686~0.offset, 4); VAL [#NULL.base=0, #NULL.offset=0, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L814] FORK -1 fork 0 P0(0, 0); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L814] -1 havoc main_#t~nondet69; VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L815] -1 call main_~#t2687~0.base, main_~#t2687~0.offset := #Ultimate.alloc(4); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L816] -1 call write~int(1, main_~#t2687~0.base, main_~#t2687~0.offset, 4); VAL [#in~arg.base=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L816] FORK -1 fork 1 P1(0, 0); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L816] -1 havoc main_#t~nondet70; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L817] -1 call main_~#t2688~0.base, main_~#t2688~0.offset := #Ultimate.alloc(4); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, main_~#t2688~0.base=5, main_~#t2688~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L818] -1 call write~int(2, main_~#t2688~0.base, main_~#t2688~0.offset, 4); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, main_~#t2688~0.base=5, main_~#t2688~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L818] FORK -1 fork 2 P2(0, 0); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, main_~#t2688~0.base=5, main_~#t2688~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L766-L801] 0 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset; [L769] 0 ~weak$$choice0~0 := (if 0 == #t~nondet12.base + #t~nondet12.offset then 0 else 1); [L769] 0 havoc #t~nondet12.base, #t~nondet12.offset; [L770] 0 ~weak$$choice2~0 := (if 0 == #t~nondet13.base + #t~nondet13.offset then 0 else 1); [L770] 0 havoc #t~nondet13.base, #t~nondet13.offset; [L771] 0 ~y$flush_delayed~0 := ~weak$$choice2~0; [L772] 0 call #t~mem14 := read~int(~#y~0.base, ~#y~0.offset, 4); [L772] 0 ~y$mem_tmp~0 := #t~mem14; [L772] 0 havoc #t~mem14; [L773] 0 ~weak$$choice1~0 := (if 0 == #t~nondet15.base + #t~nondet15.offset then 0 else 1); [L773] 0 havoc #t~nondet15.base, #t~nondet15.offset; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, main_~#t2688~0.base=5, main_~#t2688~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L774] 0 assume 0 == ~y$w_buff0_used~0 % 256; [L774] 0 call #t~mem16 := read~int(~#y~0.base, ~#y~0.offset, 4); [L774] 0 #t~ite26 := #t~mem16; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite26=0, #t~mem16=0, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, main_~#t2688~0.base=5, main_~#t2688~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L774] 0 call write~int(#t~ite26, ~#y~0.base, ~#y~0.offset, 4); [L774] 0 havoc #t~mem17; [L774] 0 havoc #t~ite24; [L774] 0 havoc #t~ite18; [L774] 0 havoc #t~ite23; [L774] 0 havoc #t~ite20; [L774] 0 havoc #t~mem16; [L774] 0 havoc #t~ite26; [L774] 0 havoc #t~ite25; [L774] 0 havoc #t~ite19; [L774] 0 havoc #t~ite22; [L774] 0 havoc #t~mem21; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, main_~#t2688~0.base=5, main_~#t2688~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L775] 0 assume 0 != ~weak$$choice2~0 % 256; [L775] 0 #t~ite31 := ~y$w_buff0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite31=0, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, main_~#t2688~0.base=5, main_~#t2688~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L775] 0 ~y$w_buff0~0 := #t~ite31; [L775] 0 havoc #t~ite27; [L775] 0 havoc #t~ite31; [L775] 0 havoc #t~ite30; [L775] 0 havoc #t~ite29; [L775] 0 havoc #t~ite28; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, main_~#t2688~0.base=5, main_~#t2688~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L776] 0 assume 0 != ~weak$$choice2~0 % 256; [L776] 0 #t~ite36 := ~y$w_buff1~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite36=0, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, main_~#t2688~0.base=5, main_~#t2688~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L776] 0 ~y$w_buff1~0 := #t~ite36; [L776] 0 havoc #t~ite36; [L776] 0 havoc #t~ite35; [L776] 0 havoc #t~ite32; [L776] 0 havoc #t~ite33; [L776] 0 havoc #t~ite34; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, main_~#t2688~0.base=5, main_~#t2688~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L777] 0 assume 0 != ~weak$$choice2~0 % 256; [L777] 0 #t~ite41 := ~y$w_buff0_used~0 % 256; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite41=0, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, main_~#t2688~0.base=5, main_~#t2688~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L777] 0 ~y$w_buff0_used~0 := (if 0 == #t~ite41 then 0 else 1); [L777] 0 havoc #t~ite39; [L777] 0 havoc #t~ite40; [L777] 0 havoc #t~ite38; [L777] 0 havoc #t~ite37; [L777] 0 havoc #t~ite41; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, main_~#t2688~0.base=5, main_~#t2688~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L778] 0 assume 0 != ~weak$$choice2~0 % 256; [L778] 0 #t~ite46 := ~y$w_buff1_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite46=0, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, main_~#t2688~0.base=5, main_~#t2688~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L778] 0 ~y$w_buff1_used~0 := #t~ite46; [L778] 0 havoc #t~ite43; [L778] 0 havoc #t~ite42; [L778] 0 havoc #t~ite44; [L778] 0 havoc #t~ite45; [L778] 0 havoc #t~ite46; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, main_~#t2688~0.base=5, main_~#t2688~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L779] 0 assume 0 != ~weak$$choice2~0 % 256; [L779] 0 #t~ite51 := ~y$r_buff0_thd3~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite51=0, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, main_~#t2688~0.base=5, main_~#t2688~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L779] 0 ~y$r_buff0_thd3~0 := #t~ite51; [L779] 0 havoc #t~ite49; [L779] 0 havoc #t~ite50; [L779] 0 havoc #t~ite48; [L779] 0 havoc #t~ite51; [L779] 0 havoc #t~ite47; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, main_~#t2688~0.base=5, main_~#t2688~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L780] 0 assume 0 != ~weak$$choice2~0 % 256; [L780] 0 #t~ite57 := ~y$r_buff1_thd3~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite57=0, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, main_~#t2688~0.base=5, main_~#t2688~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L780] 0 ~y$r_buff1_thd3~0 := #t~ite57; [L780] 0 havoc #t~ite57; [L780] 0 havoc #t~ite52; [L780] 0 havoc #t~ite55; [L780] 0 havoc #t~ite54; [L780] 0 havoc #t~ite53; [L780] 0 havoc #t~ite56; [L781] 0 ~__unbuffered_p2_EAX$read_delayed~0 := 1; [L782] 0 ~__unbuffered_p2_EAX$read_delayed_var~0.base, ~__unbuffered_p2_EAX$read_delayed_var~0.offset := ~#y~0.base, ~#y~0.offset; [L783] 0 call #t~mem58 := read~int(~#y~0.base, ~#y~0.offset, 4); [L783] 0 ~__unbuffered_p2_EAX~0 := #t~mem58; [L783] 0 havoc #t~mem58; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, main_~#t2688~0.base=5, main_~#t2688~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L784] 0 assume 0 != ~y$flush_delayed~0 % 256; [L784] 0 #t~ite60 := ~y$mem_tmp~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite60=0, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, main_~#t2688~0.base=5, main_~#t2688~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L784] 0 call write~int(#t~ite60, ~#y~0.base, ~#y~0.offset, 4); [L784] 0 havoc #t~mem59; [L784] 0 havoc #t~ite60; [L785] 0 ~y$flush_delayed~0 := 0; [L788] 0 ~z~0 := 1; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, main_~#t2688~0.base=5, main_~#t2688~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L722-L736] 1 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset; [L725] 1 ~__unbuffered_p0_EAX~0 := ~z~0; [L728] 1 ~x~0 := 1; [L733] 1 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, main_~#t2688~0.base=5, main_~#t2688~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L791] 0 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, main_~#t2688~0.base=5, main_~#t2688~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L737-L765] 2 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset; [L740] 2 ~__unbuffered_p1_EAX~0 := ~x~0; [L743] 2 ~y$w_buff1~0 := ~y$w_buff0~0; [L744] 2 ~y$w_buff0~0 := 1; [L745] 2 ~y$w_buff1_used~0 := ~y$w_buff0_used~0; [L746] 2 ~y$w_buff0_used~0 := 1; [L747] 2 __VERIFIER_assert_#in~expression := (if !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$w_buff0_used~0 % 256) then 1 else 0); [L747] 2 havoc __VERIFIER_assert_~expression; [L4] 2 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, main_~#t2688~0.base=5, main_~#t2688~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L4] 2 assume !(0 == __VERIFIER_assert_~expression); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, main_~#t2688~0.base=5, main_~#t2688~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L791] 0 assume !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd3~0 % 256); [L791] 0 call #t~mem61 := read~int(~#y~0.base, ~#y~0.offset, 4); [L791] 0 #t~ite62 := #t~mem61; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite62=0, #t~mem61=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, main_~#t2688~0.base=5, main_~#t2688~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L791] 0 #t~ite63 := #t~ite62; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite62=0, #t~ite63=0, #t~mem61=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, main_~#t2688~0.base=5, main_~#t2688~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L791] 0 call write~int(#t~ite63, ~#y~0.base, ~#y~0.offset, 4); [L791] 0 havoc #t~ite62; [L791] 0 havoc #t~ite63; [L791] 0 havoc #t~mem61; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, main_~#t2688~0.base=5, main_~#t2688~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L792] 0 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256); [L792] 0 #t~ite64 := ~y$w_buff0_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite64=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, main_~#t2688~0.base=5, main_~#t2688~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L792] 0 ~y$w_buff0_used~0 := #t~ite64; [L792] 0 havoc #t~ite64; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, main_~#t2688~0.base=5, main_~#t2688~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L793] 0 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd3~0 % 256)); [L793] 0 #t~ite65 := ~y$w_buff1_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite65=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, main_~#t2688~0.base=5, main_~#t2688~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L793] 0 ~y$w_buff1_used~0 := #t~ite65; [L793] 0 havoc #t~ite65; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, main_~#t2688~0.base=5, main_~#t2688~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L794] 0 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256); [L794] 0 #t~ite66 := ~y$r_buff0_thd3~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite66=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, main_~#t2688~0.base=5, main_~#t2688~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L794] 0 ~y$r_buff0_thd3~0 := #t~ite66; [L794] 0 havoc #t~ite66; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, main_~#t2688~0.base=5, main_~#t2688~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L795] 0 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd3~0 % 256)); [L795] 0 #t~ite67 := ~y$r_buff1_thd3~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite67=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, main_~#t2688~0.base=5, main_~#t2688~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L795] 0 ~y$r_buff1_thd3~0 := #t~ite67; [L795] 0 havoc #t~ite67; [L798] 0 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, main_~#t2688~0.base=5, main_~#t2688~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L748] 2 ~y$r_buff1_thd0~0 := ~y$r_buff0_thd0~0; [L749] 2 ~y$r_buff1_thd1~0 := ~y$r_buff0_thd1~0; [L750] 2 ~y$r_buff1_thd2~0 := ~y$r_buff0_thd2~0; [L751] 2 ~y$r_buff1_thd3~0 := ~y$r_buff0_thd3~0; [L752] 2 ~y$r_buff0_thd2~0 := 1; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, main_~#t2688~0.base=5, main_~#t2688~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L755] 2 assume 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256; [L755] 2 #t~ite6 := ~y$w_buff0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite6=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, main_~#t2688~0.base=5, main_~#t2688~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] WARNING: YOUR LOGFILE WAS TOO LONG, SOME LINES IN THE MIDDLE WERE REMOVED. [L778] 0 assume 0 != ~weak$$choice2~0 % 256; [L778] 0 #t~ite46 := ~y$w_buff1_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite46=0, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, main_~#t2688~0.base=5, main_~#t2688~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L778] 0 ~y$w_buff1_used~0 := #t~ite46; [L778] 0 havoc #t~ite43; [L778] 0 havoc #t~ite42; [L778] 0 havoc #t~ite44; [L778] 0 havoc #t~ite45; [L778] 0 havoc #t~ite46; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, main_~#t2688~0.base=5, main_~#t2688~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L779] 0 assume 0 != ~weak$$choice2~0 % 256; [L779] 0 #t~ite51 := ~y$r_buff0_thd3~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite51=0, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, main_~#t2688~0.base=5, main_~#t2688~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L779] 0 ~y$r_buff0_thd3~0 := #t~ite51; [L779] 0 havoc #t~ite49; [L779] 0 havoc #t~ite50; [L779] 0 havoc #t~ite48; [L779] 0 havoc #t~ite51; [L779] 0 havoc #t~ite47; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, main_~#t2688~0.base=5, main_~#t2688~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L780] 0 assume 0 != ~weak$$choice2~0 % 256; [L780] 0 #t~ite57 := ~y$r_buff1_thd3~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite57=0, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, main_~#t2688~0.base=5, main_~#t2688~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=0, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L780] 0 ~y$r_buff1_thd3~0 := #t~ite57; [L780] 0 havoc #t~ite57; [L780] 0 havoc #t~ite52; [L780] 0 havoc #t~ite55; [L780] 0 havoc #t~ite54; [L780] 0 havoc #t~ite53; [L780] 0 havoc #t~ite56; [L781] 0 ~__unbuffered_p2_EAX$read_delayed~0 := 1; [L782] 0 ~__unbuffered_p2_EAX$read_delayed_var~0.base, ~__unbuffered_p2_EAX$read_delayed_var~0.offset := ~#y~0.base, ~#y~0.offset; [L783] 0 call #t~mem58 := read~int(~#y~0.base, ~#y~0.offset, 4); [L783] 0 ~__unbuffered_p2_EAX~0 := #t~mem58; [L783] 0 havoc #t~mem58; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, main_~#t2688~0.base=5, main_~#t2688~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L784] 0 assume 0 != ~y$flush_delayed~0 % 256; [L784] 0 #t~ite60 := ~y$mem_tmp~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite60=0, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, main_~#t2688~0.base=5, main_~#t2688~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L784] 0 call write~int(#t~ite60, ~#y~0.base, ~#y~0.offset, 4); [L784] 0 havoc #t~mem59; [L784] 0 havoc #t~ite60; [L785] 0 ~y$flush_delayed~0 := 0; [L788] 0 ~z~0 := 1; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, main_~#t2688~0.base=5, main_~#t2688~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L722-L736] 1 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset; [L725] 1 ~__unbuffered_p0_EAX~0 := ~z~0; [L728] 1 ~x~0 := 1; [L733] 1 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, main_~#t2688~0.base=5, main_~#t2688~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L791] 0 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, main_~#t2688~0.base=5, main_~#t2688~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L737-L765] 2 ~arg.base, ~arg.offset := #in~arg.base, #in~arg.offset; [L740] 2 ~__unbuffered_p1_EAX~0 := ~x~0; [L743] 2 ~y$w_buff1~0 := ~y$w_buff0~0; [L744] 2 ~y$w_buff0~0 := 1; [L745] 2 ~y$w_buff1_used~0 := ~y$w_buff0_used~0; [L746] 2 ~y$w_buff0_used~0 := 1; [L747] 2 __VERIFIER_assert_#in~expression := (if !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$w_buff0_used~0 % 256) then 1 else 0); [L747] 2 havoc __VERIFIER_assert_~expression; [L4] 2 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, main_~#t2688~0.base=5, main_~#t2688~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L4] 2 assume !(0 == __VERIFIER_assert_~expression); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, main_~#t2688~0.base=5, main_~#t2688~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L791] 0 assume !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd3~0 % 256); [L791] 0 call #t~mem61 := read~int(~#y~0.base, ~#y~0.offset, 4); [L791] 0 #t~ite62 := #t~mem61; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite62=0, #t~mem61=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, main_~#t2688~0.base=5, main_~#t2688~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L791] 0 #t~ite63 := #t~ite62; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite62=0, #t~ite63=0, #t~mem61=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, main_~#t2688~0.base=5, main_~#t2688~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L791] 0 call write~int(#t~ite63, ~#y~0.base, ~#y~0.offset, 4); [L791] 0 havoc #t~ite62; [L791] 0 havoc #t~ite63; [L791] 0 havoc #t~mem61; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, main_~#t2688~0.base=5, main_~#t2688~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L792] 0 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256); [L792] 0 #t~ite64 := ~y$w_buff0_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite64=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, main_~#t2688~0.base=5, main_~#t2688~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L792] 0 ~y$w_buff0_used~0 := #t~ite64; [L792] 0 havoc #t~ite64; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, main_~#t2688~0.base=5, main_~#t2688~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L793] 0 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd3~0 % 256)); [L793] 0 #t~ite65 := ~y$w_buff1_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite65=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, main_~#t2688~0.base=5, main_~#t2688~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L793] 0 ~y$w_buff1_used~0 := #t~ite65; [L793] 0 havoc #t~ite65; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, main_~#t2688~0.base=5, main_~#t2688~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L794] 0 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256); [L794] 0 #t~ite66 := ~y$r_buff0_thd3~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite66=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, main_~#t2688~0.base=5, main_~#t2688~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L794] 0 ~y$r_buff0_thd3~0 := #t~ite66; [L794] 0 havoc #t~ite66; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, main_~#t2688~0.base=5, main_~#t2688~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L795] 0 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd3~0 % 256)); [L795] 0 #t~ite67 := ~y$r_buff1_thd3~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite67=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, main_~#t2688~0.base=5, main_~#t2688~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L795] 0 ~y$r_buff1_thd3~0 := #t~ite67; [L795] 0 havoc #t~ite67; [L798] 0 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, main_~#t2688~0.base=5, main_~#t2688~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L748] 2 ~y$r_buff1_thd0~0 := ~y$r_buff0_thd0~0; [L749] 2 ~y$r_buff1_thd1~0 := ~y$r_buff0_thd1~0; [L750] 2 ~y$r_buff1_thd2~0 := ~y$r_buff0_thd2~0; [L751] 2 ~y$r_buff1_thd3~0 := ~y$r_buff0_thd3~0; [L752] 2 ~y$r_buff0_thd2~0 := 1; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, main_~#t2688~0.base=5, main_~#t2688~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L755] 2 assume 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256; [L755] 2 #t~ite6 := ~y$w_buff0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite6=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, main_~#t2688~0.base=5, main_~#t2688~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L755] 2 call write~int(#t~ite6, ~#y~0.base, ~#y~0.offset, 4); [L755] 2 havoc #t~ite6; [L755] 2 havoc #t~ite5; [L755] 2 havoc #t~mem4; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, main_~#t2688~0.base=5, main_~#t2688~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L756] 2 assume 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256; [L756] 2 #t~ite7 := 0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite7=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, main_~#t2688~0.base=5, main_~#t2688~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L756] 2 ~y$w_buff0_used~0 := #t~ite7; [L756] 2 havoc #t~ite7; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, main_~#t2688~0.base=5, main_~#t2688~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L757] 2 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)); [L757] 2 #t~ite8 := ~y$w_buff1_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite8=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, main_~#t2688~0.base=5, main_~#t2688~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L757] 2 ~y$w_buff1_used~0 := #t~ite8; [L757] 2 havoc #t~ite8; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, main_~#t2688~0.base=5, main_~#t2688~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L758] 2 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256); [L758] 2 #t~ite9 := ~y$r_buff0_thd2~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite9=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, main_~#t2688~0.base=5, main_~#t2688~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L758] 2 ~y$r_buff0_thd2~0 := #t~ite9; [L758] 2 havoc #t~ite9; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, main_~#t2688~0.base=5, main_~#t2688~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L759] 2 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)); [L759] 2 #t~ite10 := ~y$r_buff1_thd2~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, #t~ite10=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, main_~#t2688~0.base=5, main_~#t2688~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L759] 2 ~y$r_buff1_thd2~0 := #t~ite10; [L759] 2 havoc #t~ite10; [L762] 2 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, main_~#t2688~0.base=5, main_~#t2688~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L818] -1 havoc main_#t~nondet71; [L820] -1 ~main$tmp_guard0~0 := (if 0 == (if 3 == ~__unbuffered_cnt~0 then 1 else 0) then 0 else 1); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, main_~#t2688~0.base=5, main_~#t2688~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L822] -1 assume 0 != ~main$tmp_guard0~0 % 256; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, main_~#t2688~0.base=5, main_~#t2688~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L824] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, main_~#t2688~0.base=5, main_~#t2688~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L824] -1 assume !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256); [L824] -1 call main_#t~mem72 := read~int(~#y~0.base, ~#y~0.offset, 4); [L824] -1 main_#t~ite73 := main_#t~mem72; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite73=1, main_#t~mem72=1, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, main_~#t2688~0.base=5, main_~#t2688~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L824] -1 main_#t~ite74 := main_#t~ite73; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite73=1, main_#t~ite74=1, main_#t~mem72=1, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, main_~#t2688~0.base=5, main_~#t2688~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L824] -1 call write~int(main_#t~ite74, ~#y~0.base, ~#y~0.offset, 4); [L824] -1 havoc main_#t~ite73; [L824] -1 havoc main_#t~ite74; [L824] -1 havoc main_#t~mem72; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, main_~#t2688~0.base=5, main_~#t2688~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L825] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256); [L825] -1 main_#t~ite75 := ~y$w_buff0_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite75=0, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, main_~#t2688~0.base=5, main_~#t2688~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L825] -1 ~y$w_buff0_used~0 := main_#t~ite75; [L825] -1 havoc main_#t~ite75; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, main_~#t2688~0.base=5, main_~#t2688~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L826] -1 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)); [L826] -1 main_#t~ite76 := ~y$w_buff1_used~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite76=0, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, main_~#t2688~0.base=5, main_~#t2688~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L826] -1 ~y$w_buff1_used~0 := main_#t~ite76; [L826] -1 havoc main_#t~ite76; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, main_~#t2688~0.base=5, main_~#t2688~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L827] -1 assume !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256); [L827] -1 main_#t~ite77 := ~y$r_buff0_thd0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite77=0, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, main_~#t2688~0.base=5, main_~#t2688~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L827] -1 ~y$r_buff0_thd0~0 := main_#t~ite77; [L827] -1 havoc main_#t~ite77; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, main_~#t2688~0.base=5, main_~#t2688~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L828] -1 assume !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)); [L828] -1 main_#t~ite78 := ~y$r_buff1_thd0~0; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite78=0, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, main_~#t2688~0.base=5, main_~#t2688~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L828] -1 ~y$r_buff1_thd0~0 := main_#t~ite78; [L828] -1 havoc main_#t~ite78; [L831] -1 ~weak$$choice1~0 := (if 0 == main_#t~nondet79.base + main_#t~nondet79.offset then 0 else 1); [L831] -1 havoc main_#t~nondet79.base, main_#t~nondet79.offset; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, main_~#t2688~0.base=5, main_~#t2688~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L832] -1 assume 0 != ~__unbuffered_p2_EAX$read_delayed~0 % 256; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, main_~#t2688~0.base=5, main_~#t2688~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L832] -1 assume 0 != ~weak$$choice1~0 % 256; [L832] -1 call main_#t~mem80 := read~int(~__unbuffered_p2_EAX$read_delayed_var~0.base, ~__unbuffered_p2_EAX$read_delayed_var~0.offset, 4); [L832] -1 main_#t~ite81 := main_#t~mem80; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite81=1, main_#t~mem80=1, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, main_~#t2688~0.base=5, main_~#t2688~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L832] -1 main_#t~ite82 := main_#t~ite81; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite81=1, main_#t~ite82=1, main_#t~mem80=1, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, main_~#t2688~0.base=5, main_~#t2688~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L832] -1 ~__unbuffered_p2_EAX~0 := main_#t~ite82; [L832] -1 havoc main_#t~ite82; [L832] -1 havoc main_#t~ite81; [L832] -1 havoc main_#t~mem80; [L833] -1 ~main$tmp_guard1~0 := (if 0 == (if !((1 == ~__unbuffered_p0_EAX~0 && 1 == ~__unbuffered_p1_EAX~0) && 1 == ~__unbuffered_p2_EAX~0) then 1 else 0) then 0 else 1); VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, main_~#t2688~0.base=5, main_~#t2688~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L835] -1 __VERIFIER_assert_#in~expression := ~main$tmp_guard1~0 % 256; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, main_~#t2688~0.base=5, main_~#t2688~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L835] -1 havoc __VERIFIER_assert_~expression; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, main_~#t2688~0.base=5, main_~#t2688~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L4] -1 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, __VERIFIER_assert_~expression=0, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, main_~#t2688~0.base=5, main_~#t2688~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L4] -1 assume 0 == __VERIFIER_assert_~expression; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, __VERIFIER_assert_~expression=0, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, main_~#t2688~0.base=5, main_~#t2688~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L4] -1 assert false; VAL [#in~arg.base=0, #in~arg.base=0, #in~arg.base=0, #in~arg.offset=0, #in~arg.offset=0, #in~arg.offset=0, #NULL.base=0, #NULL.offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, __VERIFIER_assert_~expression=0, main_~#t2686~0.base=8, main_~#t2686~0.offset=0, main_~#t2687~0.base=7, main_~#t2687~0.offset=0, main_~#t2688~0.base=5, main_~#t2688~0.offset=0, ~#y~0.base=6, ~#y~0.offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0.base=6, ~__unbuffered_p2_EAX$read_delayed_var~0.offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=1, ~arg.base=0, ~arg.base=0, ~arg.base=0, ~arg.offset=0, ~arg.offset=0, ~arg.offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0.base=0, ~y$read_delayed_var~0.offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] -1 #NULL := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0] [?] -1 #valid[0] := 0; VAL [#NULL!base=0, #NULL!offset=0] [L672] -1 ~__unbuffered_cnt~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0] [L674] -1 ~__unbuffered_p0_EAX~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0] [L676] -1 ~__unbuffered_p1_EAX~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0] [L678] -1 ~__unbuffered_p2_EAX~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0] [L679] -1 ~__unbuffered_p2_EAX$flush_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX~0=0] [L680] -1 ~__unbuffered_p2_EAX$mem_tmp~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX~0=0] [L681] -1 ~__unbuffered_p2_EAX$r_buff0_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX~0=0] [L682] -1 ~__unbuffered_p2_EAX$r_buff0_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX~0=0] [L683] -1 ~__unbuffered_p2_EAX$r_buff0_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX~0=0] [L684] -1 ~__unbuffered_p2_EAX$r_buff0_thd3~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX~0=0] [L685] -1 ~__unbuffered_p2_EAX$r_buff1_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX~0=0] [L686] -1 ~__unbuffered_p2_EAX$r_buff1_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX~0=0] [L687] -1 ~__unbuffered_p2_EAX$r_buff1_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX~0=0] [L688] -1 ~__unbuffered_p2_EAX$r_buff1_thd3~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX~0=0] [L689] -1 ~__unbuffered_p2_EAX$read_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX~0=0] [L690] -1 ~__unbuffered_p2_EAX$read_delayed_var~0 := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX~0=0] [L691] -1 ~__unbuffered_p2_EAX$w_buff0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX~0=0] [L692] -1 ~__unbuffered_p2_EAX$w_buff0_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX~0=0] [L693] -1 ~__unbuffered_p2_EAX$w_buff1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0] [L694] -1 ~__unbuffered_p2_EAX$w_buff1_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0] [L695] -1 ~main$tmp_guard0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0] [L696] -1 ~main$tmp_guard1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [L698] -1 ~x~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [L700] FCALL -1 call ~#y~0 := #Ultimate.alloc(4); VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [L700] FCALL -1 call write~init~int(0, ~#y~0, 4); VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [L701] -1 ~y$flush_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0] [L702] -1 ~y$mem_tmp~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0] [L703] -1 ~y$r_buff0_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0] [L704] -1 ~y$r_buff0_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0] [L705] -1 ~y$r_buff0_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0] [L706] -1 ~y$r_buff0_thd3~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0] [L707] -1 ~y$r_buff1_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0] [L708] -1 ~y$r_buff1_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0] [L709] -1 ~y$r_buff1_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0] [L710] -1 ~y$r_buff1_thd3~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0] [L711] -1 ~y$read_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed~0=0] [L712] -1 ~y$read_delayed_var~0 := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0] [L713] -1 ~y$w_buff0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0~0=0] [L714] -1 ~y$w_buff0_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0] [L715] -1 ~y$w_buff1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1~0=0] [L716] -1 ~y$w_buff1_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0] [L718] -1 ~z~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L719] -1 ~weak$$choice0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L720] -1 ~weak$$choice1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L721] -1 ~weak$$choice2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] -1 havoc main_#res; VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] -1 havoc main_#t~nondet69, main_#t~nondet70, main_#t~nondet71, main_#t~ite74, main_#t~ite73, main_#t~mem72, main_#t~ite75, main_#t~ite76, main_#t~ite77, main_#t~ite78, main_#t~nondet79, main_#t~ite82, main_#t~ite81, main_#t~mem80, main_~#t2686~0, main_~#t2687~0, main_~#t2688~0; VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L813] FCALL -1 call main_~#t2686~0 := #Ultimate.alloc(4); VAL [#NULL!base=0, #NULL!offset=0, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L814] FCALL -1 call write~int(0, main_~#t2686~0, 4); VAL [#NULL!base=0, #NULL!offset=0, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L814] FORK -1 fork 0 P0({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L814] -1 havoc main_#t~nondet69; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L815] FCALL -1 call main_~#t2687~0 := #Ultimate.alloc(4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L816] FCALL -1 call write~int(1, main_~#t2687~0, 4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L816] FORK -1 fork 1 P1({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L816] -1 havoc main_#t~nondet70; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L817] FCALL -1 call main_~#t2688~0 := #Ultimate.alloc(4); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L818] FCALL -1 call write~int(2, main_~#t2688~0, 4); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L818] FORK -1 fork 2 P2({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L766-L801] 0 ~arg := #in~arg; [L769] 0 ~weak$$choice0~0 := (if 0 == #t~nondet12!base + #t~nondet12!offset then 0 else 1); [L769] 0 havoc #t~nondet12; [L770] 0 ~weak$$choice2~0 := (if 0 == #t~nondet13!base + #t~nondet13!offset then 0 else 1); [L770] 0 havoc #t~nondet13; [L771] 0 ~y$flush_delayed~0 := ~weak$$choice2~0; [L772] FCALL 0 call #t~mem14 := read~int(~#y~0, 4); [L772] 0 ~y$mem_tmp~0 := #t~mem14; [L772] 0 havoc #t~mem14; [L773] 0 ~weak$$choice1~0 := (if 0 == #t~nondet15!base + #t~nondet15!offset then 0 else 1); [L773] 0 havoc #t~nondet15; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L774] COND TRUE 0 0 == ~y$w_buff0_used~0 % 256 [L774] FCALL 0 call #t~mem16 := read~int(~#y~0, 4); [L774] 0 #t~ite26 := #t~mem16; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite26=0, #t~mem16=0, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L774] FCALL 0 call write~int(#t~ite26, ~#y~0, 4); [L774] 0 havoc #t~mem17; [L774] 0 havoc #t~ite24; [L774] 0 havoc #t~ite18; [L774] 0 havoc #t~ite23; [L774] 0 havoc #t~ite20; [L774] 0 havoc #t~mem16; [L774] 0 havoc #t~ite26; [L774] 0 havoc #t~ite25; [L774] 0 havoc #t~ite19; [L774] 0 havoc #t~ite22; [L774] 0 havoc #t~mem21; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L775] COND TRUE 0 0 != ~weak$$choice2~0 % 256 [L775] 0 #t~ite31 := ~y$w_buff0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite31=0, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L775] 0 ~y$w_buff0~0 := #t~ite31; [L775] 0 havoc #t~ite27; [L775] 0 havoc #t~ite31; [L775] 0 havoc #t~ite30; [L775] 0 havoc #t~ite29; [L775] 0 havoc #t~ite28; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L776] COND TRUE 0 0 != ~weak$$choice2~0 % 256 [L776] 0 #t~ite36 := ~y$w_buff1~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite36=0, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L776] 0 ~y$w_buff1~0 := #t~ite36; [L776] 0 havoc #t~ite36; [L776] 0 havoc #t~ite35; [L776] 0 havoc #t~ite32; [L776] 0 havoc #t~ite33; [L776] 0 havoc #t~ite34; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L777] COND TRUE 0 0 != ~weak$$choice2~0 % 256 [L777] 0 #t~ite41 := ~y$w_buff0_used~0 % 256; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite41=0, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L777] 0 ~y$w_buff0_used~0 := (if 0 == #t~ite41 then 0 else 1); [L777] 0 havoc #t~ite39; [L777] 0 havoc #t~ite40; [L777] 0 havoc #t~ite38; [L777] 0 havoc #t~ite37; [L777] 0 havoc #t~ite41; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L778] COND TRUE 0 0 != ~weak$$choice2~0 % 256 [L778] 0 #t~ite46 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite46=0, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L778] 0 ~y$w_buff1_used~0 := #t~ite46; [L778] 0 havoc #t~ite43; [L778] 0 havoc #t~ite42; [L778] 0 havoc #t~ite44; [L778] 0 havoc #t~ite45; [L778] 0 havoc #t~ite46; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L779] COND TRUE 0 0 != ~weak$$choice2~0 % 256 [L779] 0 #t~ite51 := ~y$r_buff0_thd3~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite51=0, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L779] 0 ~y$r_buff0_thd3~0 := #t~ite51; [L779] 0 havoc #t~ite49; [L779] 0 havoc #t~ite50; [L779] 0 havoc #t~ite48; [L779] 0 havoc #t~ite51; [L779] 0 havoc #t~ite47; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L780] COND TRUE 0 0 != ~weak$$choice2~0 % 256 [L780] 0 #t~ite57 := ~y$r_buff1_thd3~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite57=0, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L780] 0 ~y$r_buff1_thd3~0 := #t~ite57; [L780] 0 havoc #t~ite57; [L780] 0 havoc #t~ite52; [L780] 0 havoc #t~ite55; [L780] 0 havoc #t~ite54; [L780] 0 havoc #t~ite53; [L780] 0 havoc #t~ite56; [L781] 0 ~__unbuffered_p2_EAX$read_delayed~0 := 1; [L782] 0 ~__unbuffered_p2_EAX$read_delayed_var~0 := ~#y~0; [L783] FCALL 0 call #t~mem58 := read~int(~#y~0, 4); [L783] 0 ~__unbuffered_p2_EAX~0 := #t~mem58; [L783] 0 havoc #t~mem58; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L784] COND TRUE 0 0 != ~y$flush_delayed~0 % 256 [L784] 0 #t~ite60 := ~y$mem_tmp~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite60=0, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L784] FCALL 0 call write~int(#t~ite60, ~#y~0, 4); [L784] 0 havoc #t~mem59; [L784] 0 havoc #t~ite60; [L785] 0 ~y$flush_delayed~0 := 0; [L788] 0 ~z~0 := 1; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L722-L736] 1 ~arg := #in~arg; [L725] 1 ~__unbuffered_p0_EAX~0 := ~z~0; [L728] 1 ~x~0 := 1; [L733] 1 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L791] COND FALSE 0 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256) VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L737-L765] 2 ~arg := #in~arg; [L740] 2 ~__unbuffered_p1_EAX~0 := ~x~0; [L743] 2 ~y$w_buff1~0 := ~y$w_buff0~0; [L744] 2 ~y$w_buff0~0 := 1; [L745] 2 ~y$w_buff1_used~0 := ~y$w_buff0_used~0; [L746] 2 ~y$w_buff0_used~0 := 1; [L747] 2 __VERIFIER_assert_#in~expression := (if !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$w_buff0_used~0 % 256) then 1 else 0); [L747] 2 havoc __VERIFIER_assert_~expression; [L4] 2 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L4] COND FALSE 2 !(0 == __VERIFIER_assert_~expression) VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L791] COND FALSE 0 !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd3~0 % 256) [L791] FCALL 0 call #t~mem61 := read~int(~#y~0, 4); [L791] 0 #t~ite62 := #t~mem61; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite62=0, #t~mem61=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L791] 0 #t~ite63 := #t~ite62; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite62=0, #t~ite63=0, #t~mem61=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L791] FCALL 0 call write~int(#t~ite63, ~#y~0, 4); [L791] 0 havoc #t~ite62; [L791] 0 havoc #t~ite63; [L791] 0 havoc #t~mem61; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L792] COND FALSE 0 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256) [L792] 0 #t~ite64 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite64=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L792] 0 ~y$w_buff0_used~0 := #t~ite64; [L792] 0 havoc #t~ite64; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L793] COND FALSE 0 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd3~0 % 256)) [L793] 0 #t~ite65 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite65=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L793] 0 ~y$w_buff1_used~0 := #t~ite65; [L793] 0 havoc #t~ite65; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L794] COND FALSE 0 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256) [L794] 0 #t~ite66 := ~y$r_buff0_thd3~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite66=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L794] 0 ~y$r_buff0_thd3~0 := #t~ite66; [L794] 0 havoc #t~ite66; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L795] COND FALSE 0 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd3~0 % 256)) [L795] 0 #t~ite67 := ~y$r_buff1_thd3~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite67=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L795] 0 ~y$r_buff1_thd3~0 := #t~ite67; [L795] 0 havoc #t~ite67; [L798] 0 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L748] 2 ~y$r_buff1_thd0~0 := ~y$r_buff0_thd0~0; [L749] 2 ~y$r_buff1_thd1~0 := ~y$r_buff0_thd1~0; [L750] 2 ~y$r_buff1_thd2~0 := ~y$r_buff0_thd2~0; [L751] 2 ~y$r_buff1_thd3~0 := ~y$r_buff0_thd3~0; [L752] 2 ~y$r_buff0_thd2~0 := 1; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L755] COND TRUE 2 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256 [L755] 2 #t~ite6 := ~y$w_buff0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite6=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L755] FCALL 2 call write~int(#t~ite6, ~#y~0, 4); [L755] 2 havoc #t~ite6; [L755] 2 havoc #t~ite5; [L755] 2 havoc #t~mem4; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L756] COND TRUE 2 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256 [L756] 2 #t~ite7 := 0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite7=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L756] 2 ~y$w_buff0_used~0 := #t~ite7; [L756] 2 havoc #t~ite7; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L757] COND FALSE 2 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)) [L757] 2 #t~ite8 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite8=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L757] 2 ~y$w_buff1_used~0 := #t~ite8; [L757] 2 havoc #t~ite8; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L758] COND FALSE 2 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) [L758] 2 #t~ite9 := ~y$r_buff0_thd2~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite9=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L758] 2 ~y$r_buff0_thd2~0 := #t~ite9; [L758] 2 havoc #t~ite9; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L759] COND FALSE 2 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)) [L759] 2 #t~ite10 := ~y$r_buff1_thd2~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite10=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L759] 2 ~y$r_buff1_thd2~0 := #t~ite10; [L759] 2 havoc #t~ite10; [L762] 2 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L818] -1 havoc main_#t~nondet71; [L820] -1 ~main$tmp_guard0~0 := (if 0 == (if 3 == ~__unbuffered_cnt~0 then 1 else 0) then 0 else 1); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L822] -1 assume 0 != ~main$tmp_guard0~0 % 256; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L824] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L824] COND FALSE -1 !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256) [L824] FCALL -1 call main_#t~mem72 := read~int(~#y~0, 4); [L824] -1 main_#t~ite73 := main_#t~mem72; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite73=1, main_#t~mem72=1, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L824] -1 main_#t~ite74 := main_#t~ite73; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite73=1, main_#t~ite74=1, main_#t~mem72=1, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L824] FCALL -1 call write~int(main_#t~ite74, ~#y~0, 4); [L824] -1 havoc main_#t~ite73; [L824] -1 havoc main_#t~ite74; [L824] -1 havoc main_#t~mem72; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L825] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) [L825] -1 main_#t~ite75 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite75=0, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L825] -1 ~y$w_buff0_used~0 := main_#t~ite75; [L825] -1 havoc main_#t~ite75; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L826] COND FALSE -1 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)) [L826] -1 main_#t~ite76 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite76=0, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L826] -1 ~y$w_buff1_used~0 := main_#t~ite76; [L826] -1 havoc main_#t~ite76; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L827] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) [L827] -1 main_#t~ite77 := ~y$r_buff0_thd0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite77=0, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L827] -1 ~y$r_buff0_thd0~0 := main_#t~ite77; [L827] -1 havoc main_#t~ite77; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L828] COND FALSE -1 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)) [L828] -1 main_#t~ite78 := ~y$r_buff1_thd0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite78=0, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L828] -1 ~y$r_buff1_thd0~0 := main_#t~ite78; [L828] -1 havoc main_#t~ite78; [L831] -1 ~weak$$choice1~0 := (if 0 == main_#t~nondet79!base + main_#t~nondet79!offset then 0 else 1); [L831] -1 havoc main_#t~nondet79; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L832] COND TRUE -1 0 != ~__unbuffered_p2_EAX$read_delayed~0 % 256 VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L832] COND TRUE -1 0 != ~weak$$choice1~0 % 256 [L832] FCALL -1 call main_#t~mem80 := read~int(~__unbuffered_p2_EAX$read_delayed_var~0, 4); [L832] -1 main_#t~ite81 := main_#t~mem80; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite81=1, main_#t~mem80=1, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L832] -1 main_#t~ite82 := main_#t~ite81; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite81=1, main_#t~ite82=1, main_#t~mem80=1, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L832] -1 ~__unbuffered_p2_EAX~0 := main_#t~ite82; [L832] -1 havoc main_#t~ite82; [L832] -1 havoc main_#t~ite81; [L832] -1 havoc main_#t~mem80; [L833] -1 ~main$tmp_guard1~0 := (if 0 == (if !((1 == ~__unbuffered_p0_EAX~0 && 1 == ~__unbuffered_p1_EAX~0) && 1 == ~__unbuffered_p2_EAX~0) then 1 else 0) then 0 else 1); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L835] -1 __VERIFIER_assert_#in~expression := ~main$tmp_guard1~0 % 256; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L835] -1 havoc __VERIFIER_assert_~expression; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L4] -1 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, __VERIFIER_assert_~expression=0, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L4] COND TRUE -1 0 == __VERIFIER_assert_~expression VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, __VERIFIER_assert_~expression=0, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L4] -1 assert false; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, __VERIFIER_assert_~expression=0, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] ----- ----- class de.uni_freiburg.informatik.ultimate.boogie.procedureinliner.backtranslation.InlinerBacktranslator [?] -1 #NULL := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0] [?] -1 #valid[0] := 0; VAL [#NULL!base=0, #NULL!offset=0] [L672] -1 ~__unbuffered_cnt~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0] [L674] -1 ~__unbuffered_p0_EAX~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0] [L676] -1 ~__unbuffered_p1_EAX~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0] [L678] -1 ~__unbuffered_p2_EAX~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0] [L679] -1 ~__unbuffered_p2_EAX$flush_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX~0=0] [L680] -1 ~__unbuffered_p2_EAX$mem_tmp~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX~0=0] [L681] -1 ~__unbuffered_p2_EAX$r_buff0_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX~0=0] [L682] -1 ~__unbuffered_p2_EAX$r_buff0_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX~0=0] [L683] -1 ~__unbuffered_p2_EAX$r_buff0_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX~0=0] [L684] -1 ~__unbuffered_p2_EAX$r_buff0_thd3~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX~0=0] [L685] -1 ~__unbuffered_p2_EAX$r_buff1_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX~0=0] [L686] -1 ~__unbuffered_p2_EAX$r_buff1_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX~0=0] [L687] -1 ~__unbuffered_p2_EAX$r_buff1_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX~0=0] [L688] -1 ~__unbuffered_p2_EAX$r_buff1_thd3~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX~0=0] [L689] -1 ~__unbuffered_p2_EAX$read_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX~0=0] [L690] -1 ~__unbuffered_p2_EAX$read_delayed_var~0 := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX~0=0] [L691] -1 ~__unbuffered_p2_EAX$w_buff0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX~0=0] [L692] -1 ~__unbuffered_p2_EAX$w_buff0_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX~0=0] [L693] -1 ~__unbuffered_p2_EAX$w_buff1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0] [L694] -1 ~__unbuffered_p2_EAX$w_buff1_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0] [L695] -1 ~main$tmp_guard0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0] [L696] -1 ~main$tmp_guard1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [L698] -1 ~x~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [L700] FCALL -1 call ~#y~0 := #Ultimate.alloc(4); VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [L700] FCALL -1 call write~init~int(0, ~#y~0, 4); VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [L701] -1 ~y$flush_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0] [L702] -1 ~y$mem_tmp~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0] [L703] -1 ~y$r_buff0_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0] [L704] -1 ~y$r_buff0_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0] [L705] -1 ~y$r_buff0_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0] [L706] -1 ~y$r_buff0_thd3~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0] [L707] -1 ~y$r_buff1_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0] [L708] -1 ~y$r_buff1_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0] [L709] -1 ~y$r_buff1_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0] [L710] -1 ~y$r_buff1_thd3~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0] [L711] -1 ~y$read_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed~0=0] [L712] -1 ~y$read_delayed_var~0 := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0] [L713] -1 ~y$w_buff0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0~0=0] [L714] -1 ~y$w_buff0_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0] [L715] -1 ~y$w_buff1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1~0=0] [L716] -1 ~y$w_buff1_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0] [L718] -1 ~z~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L719] -1 ~weak$$choice0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L720] -1 ~weak$$choice1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L721] -1 ~weak$$choice2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] -1 havoc main_#res; VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [?] -1 havoc main_#t~nondet69, main_#t~nondet70, main_#t~nondet71, main_#t~ite74, main_#t~ite73, main_#t~mem72, main_#t~ite75, main_#t~ite76, main_#t~ite77, main_#t~ite78, main_#t~nondet79, main_#t~ite82, main_#t~ite81, main_#t~mem80, main_~#t2686~0, main_~#t2687~0, main_~#t2688~0; VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L813] FCALL -1 call main_~#t2686~0 := #Ultimate.alloc(4); VAL [#NULL!base=0, #NULL!offset=0, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L814] FCALL -1 call write~int(0, main_~#t2686~0, 4); VAL [#NULL!base=0, #NULL!offset=0, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L814] FORK -1 fork 0 P0({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L814] -1 havoc main_#t~nondet69; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L815] FCALL -1 call main_~#t2687~0 := #Ultimate.alloc(4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L816] FCALL -1 call write~int(1, main_~#t2687~0, 4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L816] FORK -1 fork 1 P1({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L816] -1 havoc main_#t~nondet70; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L817] FCALL -1 call main_~#t2688~0 := #Ultimate.alloc(4); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L818] FCALL -1 call write~int(2, main_~#t2688~0, 4); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L818] FORK -1 fork 2 P2({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L766-L801] 0 ~arg := #in~arg; [L769] 0 ~weak$$choice0~0 := (if 0 == #t~nondet12!base + #t~nondet12!offset then 0 else 1); [L769] 0 havoc #t~nondet12; [L770] 0 ~weak$$choice2~0 := (if 0 == #t~nondet13!base + #t~nondet13!offset then 0 else 1); [L770] 0 havoc #t~nondet13; [L771] 0 ~y$flush_delayed~0 := ~weak$$choice2~0; [L772] FCALL 0 call #t~mem14 := read~int(~#y~0, 4); [L772] 0 ~y$mem_tmp~0 := #t~mem14; [L772] 0 havoc #t~mem14; [L773] 0 ~weak$$choice1~0 := (if 0 == #t~nondet15!base + #t~nondet15!offset then 0 else 1); [L773] 0 havoc #t~nondet15; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L774] COND TRUE 0 0 == ~y$w_buff0_used~0 % 256 [L774] FCALL 0 call #t~mem16 := read~int(~#y~0, 4); [L774] 0 #t~ite26 := #t~mem16; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite26=0, #t~mem16=0, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L774] FCALL 0 call write~int(#t~ite26, ~#y~0, 4); [L774] 0 havoc #t~mem17; [L774] 0 havoc #t~ite24; [L774] 0 havoc #t~ite18; [L774] 0 havoc #t~ite23; [L774] 0 havoc #t~ite20; [L774] 0 havoc #t~mem16; [L774] 0 havoc #t~ite26; [L774] 0 havoc #t~ite25; [L774] 0 havoc #t~ite19; [L774] 0 havoc #t~ite22; [L774] 0 havoc #t~mem21; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L775] COND TRUE 0 0 != ~weak$$choice2~0 % 256 [L775] 0 #t~ite31 := ~y$w_buff0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite31=0, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L775] 0 ~y$w_buff0~0 := #t~ite31; [L775] 0 havoc #t~ite27; [L775] 0 havoc #t~ite31; [L775] 0 havoc #t~ite30; [L775] 0 havoc #t~ite29; [L775] 0 havoc #t~ite28; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L776] COND TRUE 0 0 != ~weak$$choice2~0 % 256 [L776] 0 #t~ite36 := ~y$w_buff1~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite36=0, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L776] 0 ~y$w_buff1~0 := #t~ite36; [L776] 0 havoc #t~ite36; [L776] 0 havoc #t~ite35; [L776] 0 havoc #t~ite32; [L776] 0 havoc #t~ite33; [L776] 0 havoc #t~ite34; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L777] COND TRUE 0 0 != ~weak$$choice2~0 % 256 [L777] 0 #t~ite41 := ~y$w_buff0_used~0 % 256; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite41=0, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L777] 0 ~y$w_buff0_used~0 := (if 0 == #t~ite41 then 0 else 1); [L777] 0 havoc #t~ite39; [L777] 0 havoc #t~ite40; [L777] 0 havoc #t~ite38; [L777] 0 havoc #t~ite37; [L777] 0 havoc #t~ite41; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L778] COND TRUE 0 0 != ~weak$$choice2~0 % 256 [L778] 0 #t~ite46 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite46=0, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L778] 0 ~y$w_buff1_used~0 := #t~ite46; [L778] 0 havoc #t~ite43; [L778] 0 havoc #t~ite42; [L778] 0 havoc #t~ite44; [L778] 0 havoc #t~ite45; [L778] 0 havoc #t~ite46; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L779] COND TRUE 0 0 != ~weak$$choice2~0 % 256 [L779] 0 #t~ite51 := ~y$r_buff0_thd3~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite51=0, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L779] 0 ~y$r_buff0_thd3~0 := #t~ite51; [L779] 0 havoc #t~ite49; [L779] 0 havoc #t~ite50; [L779] 0 havoc #t~ite48; [L779] 0 havoc #t~ite51; [L779] 0 havoc #t~ite47; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L780] COND TRUE 0 0 != ~weak$$choice2~0 % 256 [L780] 0 #t~ite57 := ~y$r_buff1_thd3~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite57=0, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L780] 0 ~y$r_buff1_thd3~0 := #t~ite57; [L780] 0 havoc #t~ite57; [L780] 0 havoc #t~ite52; [L780] 0 havoc #t~ite55; [L780] 0 havoc #t~ite54; [L780] 0 havoc #t~ite53; [L780] 0 havoc #t~ite56; [L781] 0 ~__unbuffered_p2_EAX$read_delayed~0 := 1; [L782] 0 ~__unbuffered_p2_EAX$read_delayed_var~0 := ~#y~0; [L783] FCALL 0 call #t~mem58 := read~int(~#y~0, 4); [L783] 0 ~__unbuffered_p2_EAX~0 := #t~mem58; [L783] 0 havoc #t~mem58; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L784] COND TRUE 0 0 != ~y$flush_delayed~0 % 256 [L784] 0 #t~ite60 := ~y$mem_tmp~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite60=0, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L784] FCALL 0 call write~int(#t~ite60, ~#y~0, 4); [L784] 0 havoc #t~mem59; [L784] 0 havoc #t~ite60; [L785] 0 ~y$flush_delayed~0 := 0; [L788] 0 ~z~0 := 1; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L722-L736] 1 ~arg := #in~arg; [L725] 1 ~__unbuffered_p0_EAX~0 := ~z~0; [L728] 1 ~x~0 := 1; [L733] 1 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L791] COND FALSE 0 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256) VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L737-L765] 2 ~arg := #in~arg; [L740] 2 ~__unbuffered_p1_EAX~0 := ~x~0; [L743] 2 ~y$w_buff1~0 := ~y$w_buff0~0; [L744] 2 ~y$w_buff0~0 := 1; [L745] 2 ~y$w_buff1_used~0 := ~y$w_buff0_used~0; [L746] 2 ~y$w_buff0_used~0 := 1; [L747] 2 __VERIFIER_assert_#in~expression := (if !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$w_buff0_used~0 % 256) then 1 else 0); [L747] 2 havoc __VERIFIER_assert_~expression; [L4] 2 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L4] COND FALSE 2 !(0 == __VERIFIER_assert_~expression) VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L791] COND FALSE 0 !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd3~0 % 256) [L791] FCALL 0 call #t~mem61 := read~int(~#y~0, 4); [L791] 0 #t~ite62 := #t~mem61; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite62=0, #t~mem61=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L791] 0 #t~ite63 := #t~ite62; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite62=0, #t~ite63=0, #t~mem61=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L791] FCALL 0 call write~int(#t~ite63, ~#y~0, 4); [L791] 0 havoc #t~ite62; [L791] 0 havoc #t~ite63; [L791] 0 havoc #t~mem61; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L792] COND FALSE 0 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256) [L792] 0 #t~ite64 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite64=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L792] 0 ~y$w_buff0_used~0 := #t~ite64; [L792] 0 havoc #t~ite64; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L793] COND FALSE 0 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd3~0 % 256)) [L793] 0 #t~ite65 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite65=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L793] 0 ~y$w_buff1_used~0 := #t~ite65; [L793] 0 havoc #t~ite65; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L794] COND FALSE 0 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256) [L794] 0 #t~ite66 := ~y$r_buff0_thd3~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite66=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L794] 0 ~y$r_buff0_thd3~0 := #t~ite66; [L794] 0 havoc #t~ite66; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L795] COND FALSE 0 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd3~0 % 256)) [L795] 0 #t~ite67 := ~y$r_buff1_thd3~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite67=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L795] 0 ~y$r_buff1_thd3~0 := #t~ite67; [L795] 0 havoc #t~ite67; [L798] 0 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L748] 2 ~y$r_buff1_thd0~0 := ~y$r_buff0_thd0~0; [L749] 2 ~y$r_buff1_thd1~0 := ~y$r_buff0_thd1~0; [L750] 2 ~y$r_buff1_thd2~0 := ~y$r_buff0_thd2~0; [L751] 2 ~y$r_buff1_thd3~0 := ~y$r_buff0_thd3~0; [L752] 2 ~y$r_buff0_thd2~0 := 1; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L755] COND TRUE 2 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256 [L755] 2 #t~ite6 := ~y$w_buff0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite6=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L755] FCALL 2 call write~int(#t~ite6, ~#y~0, 4); [L755] 2 havoc #t~ite6; [L755] 2 havoc #t~ite5; [L755] 2 havoc #t~mem4; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L756] COND TRUE 2 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256 [L756] 2 #t~ite7 := 0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite7=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L756] 2 ~y$w_buff0_used~0 := #t~ite7; [L756] 2 havoc #t~ite7; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L757] COND FALSE 2 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)) [L757] 2 #t~ite8 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite8=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L757] 2 ~y$w_buff1_used~0 := #t~ite8; [L757] 2 havoc #t~ite8; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L758] COND FALSE 2 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) [L758] 2 #t~ite9 := ~y$r_buff0_thd2~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite9=1, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L758] 2 ~y$r_buff0_thd2~0 := #t~ite9; [L758] 2 havoc #t~ite9; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L759] COND FALSE 2 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)) [L759] 2 #t~ite10 := ~y$r_buff1_thd2~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite10=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L759] 2 ~y$r_buff1_thd2~0 := #t~ite10; [L759] 2 havoc #t~ite10; [L762] 2 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L818] -1 havoc main_#t~nondet71; [L820] -1 ~main$tmp_guard0~0 := (if 0 == (if 3 == ~__unbuffered_cnt~0 then 1 else 0) then 0 else 1); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L822] -1 assume 0 != ~main$tmp_guard0~0 % 256; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L824] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L824] COND FALSE -1 !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256) [L824] FCALL -1 call main_#t~mem72 := read~int(~#y~0, 4); [L824] -1 main_#t~ite73 := main_#t~mem72; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite73=1, main_#t~mem72=1, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L824] -1 main_#t~ite74 := main_#t~ite73; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite73=1, main_#t~ite74=1, main_#t~mem72=1, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L824] FCALL -1 call write~int(main_#t~ite74, ~#y~0, 4); [L824] -1 havoc main_#t~ite73; [L824] -1 havoc main_#t~ite74; [L824] -1 havoc main_#t~mem72; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L825] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) [L825] -1 main_#t~ite75 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite75=0, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L825] -1 ~y$w_buff0_used~0 := main_#t~ite75; [L825] -1 havoc main_#t~ite75; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L826] COND FALSE -1 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)) [L826] -1 main_#t~ite76 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite76=0, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L826] -1 ~y$w_buff1_used~0 := main_#t~ite76; [L826] -1 havoc main_#t~ite76; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L827] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) [L827] -1 main_#t~ite77 := ~y$r_buff0_thd0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite77=0, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L827] -1 ~y$r_buff0_thd0~0 := main_#t~ite77; [L827] -1 havoc main_#t~ite77; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L828] COND FALSE -1 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)) [L828] -1 main_#t~ite78 := ~y$r_buff1_thd0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite78=0, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L828] -1 ~y$r_buff1_thd0~0 := main_#t~ite78; [L828] -1 havoc main_#t~ite78; [L831] -1 ~weak$$choice1~0 := (if 0 == main_#t~nondet79!base + main_#t~nondet79!offset then 0 else 1); [L831] -1 havoc main_#t~nondet79; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L832] COND TRUE -1 0 != ~__unbuffered_p2_EAX$read_delayed~0 % 256 VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L832] COND TRUE -1 0 != ~weak$$choice1~0 % 256 [L832] FCALL -1 call main_#t~mem80 := read~int(~__unbuffered_p2_EAX$read_delayed_var~0, 4); [L832] -1 main_#t~ite81 := main_#t~mem80; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite81=1, main_#t~mem80=1, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L832] -1 main_#t~ite82 := main_#t~ite81; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_#t~ite81=1, main_#t~ite82=1, main_#t~mem80=1, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L832] -1 ~__unbuffered_p2_EAX~0 := main_#t~ite82; [L832] -1 havoc main_#t~ite82; [L832] -1 havoc main_#t~ite81; [L832] -1 havoc main_#t~mem80; [L833] -1 ~main$tmp_guard1~0 := (if 0 == (if !((1 == ~__unbuffered_p0_EAX~0 && 1 == ~__unbuffered_p1_EAX~0) && 1 == ~__unbuffered_p2_EAX~0) then 1 else 0) then 0 else 1); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L835] -1 __VERIFIER_assert_#in~expression := ~main$tmp_guard1~0 % 256; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L835] -1 havoc __VERIFIER_assert_~expression; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L4] -1 __VERIFIER_assert_~expression := __VERIFIER_assert_#in~expression; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, __VERIFIER_assert_~expression=0, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L4] COND TRUE -1 0 == __VERIFIER_assert_~expression VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, __VERIFIER_assert_~expression=0, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L4] -1 assert false; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, __VERIFIER_assert_#in~expression=0, __VERIFIER_assert_#in~expression=1, __VERIFIER_assert_~expression=1, __VERIFIER_assert_~expression=0, main_~#t2686~0!base=8, main_~#t2686~0!offset=0, main_~#t2687~0!base=7, main_~#t2687~0!offset=0, main_~#t2688~0!base=5, main_~#t2688~0!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [?] -1 #NULL := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0] [?] -1 #valid[0] := 0; VAL [#NULL!base=0, #NULL!offset=0] [L672] -1 ~__unbuffered_cnt~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0] [L674] -1 ~__unbuffered_p0_EAX~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0] [L676] -1 ~__unbuffered_p1_EAX~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0] [L678] -1 ~__unbuffered_p2_EAX~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0] [L679] -1 ~__unbuffered_p2_EAX$flush_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX~0=0] [L680] -1 ~__unbuffered_p2_EAX$mem_tmp~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX~0=0] [L681] -1 ~__unbuffered_p2_EAX$r_buff0_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX~0=0] [L682] -1 ~__unbuffered_p2_EAX$r_buff0_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX~0=0] [L683] -1 ~__unbuffered_p2_EAX$r_buff0_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX~0=0] [L684] -1 ~__unbuffered_p2_EAX$r_buff0_thd3~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX~0=0] [L685] -1 ~__unbuffered_p2_EAX$r_buff1_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX~0=0] [L686] -1 ~__unbuffered_p2_EAX$r_buff1_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX~0=0] [L687] -1 ~__unbuffered_p2_EAX$r_buff1_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX~0=0] [L688] -1 ~__unbuffered_p2_EAX$r_buff1_thd3~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX~0=0] [L689] -1 ~__unbuffered_p2_EAX$read_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX~0=0] [L690] -1 ~__unbuffered_p2_EAX$read_delayed_var~0 := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX~0=0] [L691] -1 ~__unbuffered_p2_EAX$w_buff0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX~0=0] [L692] -1 ~__unbuffered_p2_EAX$w_buff0_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX~0=0] [L693] -1 ~__unbuffered_p2_EAX$w_buff1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0] [L694] -1 ~__unbuffered_p2_EAX$w_buff1_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0] [L695] -1 ~main$tmp_guard0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0] [L696] -1 ~main$tmp_guard1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [L698] -1 ~x~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [L700] FCALL -1 call ~#y~0 := #Ultimate.alloc(4); VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [L700] FCALL -1 call write~init~int(0, ~#y~0, 4); VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [L701] -1 ~y$flush_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0] [L702] -1 ~y$mem_tmp~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0] [L703] -1 ~y$r_buff0_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0] [L704] -1 ~y$r_buff0_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0] [L705] -1 ~y$r_buff0_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0] [L706] -1 ~y$r_buff0_thd3~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0] [L707] -1 ~y$r_buff1_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0] [L708] -1 ~y$r_buff1_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0] [L709] -1 ~y$r_buff1_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0] [L710] -1 ~y$r_buff1_thd3~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0] [L711] -1 ~y$read_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed~0=0] [L712] -1 ~y$read_delayed_var~0 := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0] [L713] -1 ~y$w_buff0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0~0=0] [L714] -1 ~y$w_buff0_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0] [L715] -1 ~y$w_buff1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1~0=0] [L716] -1 ~y$w_buff1_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0] [L718] -1 ~z~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L719] -1 ~weak$$choice0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L720] -1 ~weak$$choice1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L721] -1 ~weak$$choice2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L813] FCALL -1 call ~#t2686~0 := #Ultimate.alloc(4); VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L814] FCALL -1 call write~int(0, ~#t2686~0, 4); VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L814] FORK -1 fork 0 P0({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L814] -1 havoc #t~nondet69; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L815] FCALL -1 call ~#t2687~0 := #Ultimate.alloc(4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L816] FCALL -1 call write~int(1, ~#t2687~0, 4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L816] FORK -1 fork 1 P1({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L816] -1 havoc #t~nondet70; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L817] FCALL -1 call ~#t2688~0 := #Ultimate.alloc(4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L818] FCALL -1 call write~int(2, ~#t2688~0, 4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L818] FORK -1 fork 2 P2({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L766-L801] 0 ~arg := #in~arg; [L769] 0 ~weak$$choice0~0 := (if 0 == #t~nondet12!base + #t~nondet12!offset then 0 else 1); [L769] 0 havoc #t~nondet12; [L770] 0 ~weak$$choice2~0 := (if 0 == #t~nondet13!base + #t~nondet13!offset then 0 else 1); [L770] 0 havoc #t~nondet13; [L771] 0 ~y$flush_delayed~0 := ~weak$$choice2~0; [L772] FCALL 0 call #t~mem14 := read~int(~#y~0, 4); [L772] 0 ~y$mem_tmp~0 := #t~mem14; [L772] 0 havoc #t~mem14; [L773] 0 ~weak$$choice1~0 := (if 0 == #t~nondet15!base + #t~nondet15!offset then 0 else 1); [L773] 0 havoc #t~nondet15; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L774] COND TRUE 0 0 == ~y$w_buff0_used~0 % 256 [L774] FCALL 0 call #t~mem16 := read~int(~#y~0, 4); [L774] 0 #t~ite26 := #t~mem16; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite26=0, #t~mem16=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L774] FCALL 0 call write~int(#t~ite26, ~#y~0, 4); [L774] 0 havoc #t~mem17; [L774] 0 havoc #t~ite24; [L774] 0 havoc #t~ite18; [L774] 0 havoc #t~ite23; [L774] 0 havoc #t~ite20; [L774] 0 havoc #t~mem16; [L774] 0 havoc #t~ite26; [L774] 0 havoc #t~ite25; [L774] 0 havoc #t~ite19; [L774] 0 havoc #t~ite22; [L774] 0 havoc #t~mem21; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L775] COND TRUE 0 0 != ~weak$$choice2~0 % 256 [L775] 0 #t~ite31 := ~y$w_buff0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite31=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L775] 0 ~y$w_buff0~0 := #t~ite31; [L775] 0 havoc #t~ite27; [L775] 0 havoc #t~ite31; [L775] 0 havoc #t~ite30; [L775] 0 havoc #t~ite29; [L775] 0 havoc #t~ite28; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L776] COND TRUE 0 0 != ~weak$$choice2~0 % 256 [L776] 0 #t~ite36 := ~y$w_buff1~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite36=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L776] 0 ~y$w_buff1~0 := #t~ite36; [L776] 0 havoc #t~ite36; [L776] 0 havoc #t~ite35; [L776] 0 havoc #t~ite32; [L776] 0 havoc #t~ite33; [L776] 0 havoc #t~ite34; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L777] COND TRUE 0 0 != ~weak$$choice2~0 % 256 [L777] 0 #t~ite41 := ~y$w_buff0_used~0 % 256; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite41=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L777] 0 ~y$w_buff0_used~0 := (if 0 == #t~ite41 then 0 else 1); [L777] 0 havoc #t~ite39; [L777] 0 havoc #t~ite40; [L777] 0 havoc #t~ite38; [L777] 0 havoc #t~ite37; [L777] 0 havoc #t~ite41; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L778] COND TRUE 0 0 != ~weak$$choice2~0 % 256 [L778] 0 #t~ite46 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite46=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L778] 0 ~y$w_buff1_used~0 := #t~ite46; [L778] 0 havoc #t~ite43; [L778] 0 havoc #t~ite42; [L778] 0 havoc #t~ite44; [L778] 0 havoc #t~ite45; [L778] 0 havoc #t~ite46; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L779] COND TRUE 0 0 != ~weak$$choice2~0 % 256 [L779] 0 #t~ite51 := ~y$r_buff0_thd3~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite51=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L779] 0 ~y$r_buff0_thd3~0 := #t~ite51; [L779] 0 havoc #t~ite49; [L779] 0 havoc #t~ite50; [L779] 0 havoc #t~ite48; [L779] 0 havoc #t~ite51; [L779] 0 havoc #t~ite47; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L780] COND TRUE 0 0 != ~weak$$choice2~0 % 256 [L780] 0 #t~ite57 := ~y$r_buff1_thd3~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite57=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L780] 0 ~y$r_buff1_thd3~0 := #t~ite57; [L780] 0 havoc #t~ite57; [L780] 0 havoc #t~ite52; [L780] 0 havoc #t~ite55; [L780] 0 havoc #t~ite54; [L780] 0 havoc #t~ite53; [L780] 0 havoc #t~ite56; [L781] 0 ~__unbuffered_p2_EAX$read_delayed~0 := 1; [L782] 0 ~__unbuffered_p2_EAX$read_delayed_var~0 := ~#y~0; [L783] FCALL 0 call #t~mem58 := read~int(~#y~0, 4); [L783] 0 ~__unbuffered_p2_EAX~0 := #t~mem58; [L783] 0 havoc #t~mem58; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L784] COND TRUE 0 0 != ~y$flush_delayed~0 % 256 [L784] 0 #t~ite60 := ~y$mem_tmp~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite60=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L784] FCALL 0 call write~int(#t~ite60, ~#y~0, 4); [L784] 0 havoc #t~mem59; [L784] 0 havoc #t~ite60; [L785] 0 ~y$flush_delayed~0 := 0; [L788] 0 ~z~0 := 1; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L722-L736] 1 ~arg := #in~arg; [L725] 1 ~__unbuffered_p0_EAX~0 := ~z~0; [L728] 1 ~x~0 := 1; [L733] 1 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L791] COND FALSE 0 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256) VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L737-L765] 2 ~arg := #in~arg; [L740] 2 ~__unbuffered_p1_EAX~0 := ~x~0; [L743] 2 ~y$w_buff1~0 := ~y$w_buff0~0; [L744] 2 ~y$w_buff0~0 := 1; [L745] 2 ~y$w_buff1_used~0 := ~y$w_buff0_used~0; [L746] 2 ~y$w_buff0_used~0 := 1; [L4] 2 ~expression := #in~expression; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L4] COND FALSE 2 !(0 == ~expression) VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L791] COND FALSE 0 !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd3~0 % 256) [L791] FCALL 0 call #t~mem61 := read~int(~#y~0, 4); [L791] 0 #t~ite62 := #t~mem61; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite62=0, #t~mem61=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L791] 0 #t~ite63 := #t~ite62; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite62=0, #t~ite63=0, #t~mem61=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L791] FCALL 0 call write~int(#t~ite63, ~#y~0, 4); [L791] 0 havoc #t~ite62; [L791] 0 havoc #t~ite63; [L791] 0 havoc #t~mem61; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L792] COND FALSE 0 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256) [L792] 0 #t~ite64 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite64=1, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L792] 0 ~y$w_buff0_used~0 := #t~ite64; [L792] 0 havoc #t~ite64; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L793] COND FALSE 0 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd3~0 % 256)) [L793] 0 #t~ite65 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite65=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L793] 0 ~y$w_buff1_used~0 := #t~ite65; [L793] 0 havoc #t~ite65; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L794] COND FALSE 0 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256) [L794] 0 #t~ite66 := ~y$r_buff0_thd3~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite66=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L794] 0 ~y$r_buff0_thd3~0 := #t~ite66; [L794] 0 havoc #t~ite66; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L795] COND FALSE 0 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd3~0 % 256)) [L795] 0 #t~ite67 := ~y$r_buff1_thd3~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite67=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L795] 0 ~y$r_buff1_thd3~0 := #t~ite67; [L795] 0 havoc #t~ite67; [L798] 0 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L748] 2 ~y$r_buff1_thd0~0 := ~y$r_buff0_thd0~0; [L749] 2 ~y$r_buff1_thd1~0 := ~y$r_buff0_thd1~0; [L750] 2 ~y$r_buff1_thd2~0 := ~y$r_buff0_thd2~0; [L751] 2 ~y$r_buff1_thd3~0 := ~y$r_buff0_thd3~0; [L752] 2 ~y$r_buff0_thd2~0 := 1; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L755] COND TRUE 2 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256 [L755] 2 #t~ite6 := ~y$w_buff0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L755] FCALL 2 call write~int(#t~ite6, ~#y~0, 4); [L755] 2 havoc #t~ite6; [L755] 2 havoc #t~ite5; [L755] 2 havoc #t~mem4; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L756] COND TRUE 2 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256 [L756] 2 #t~ite7 := 0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L756] 2 ~y$w_buff0_used~0 := #t~ite7; [L756] 2 havoc #t~ite7; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L757] COND FALSE 2 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)) [L757] 2 #t~ite8 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L757] 2 ~y$w_buff1_used~0 := #t~ite8; [L757] 2 havoc #t~ite8; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L758] COND FALSE 2 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) [L758] 2 #t~ite9 := ~y$r_buff0_thd2~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L758] 2 ~y$r_buff0_thd2~0 := #t~ite9; [L758] 2 havoc #t~ite9; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L759] COND FALSE 2 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)) [L759] 2 #t~ite10 := ~y$r_buff1_thd2~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L759] 2 ~y$r_buff1_thd2~0 := #t~ite10; [L759] 2 havoc #t~ite10; [L762] 2 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L818] -1 havoc #t~nondet71; [L820] -1 ~main$tmp_guard0~0 := (if 0 == (if 3 == ~__unbuffered_cnt~0 then 1 else 0) then 0 else 1); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L822] -1 assume 0 != ~main$tmp_guard0~0 % 256; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L824] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L824] COND FALSE -1 !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256) [L824] FCALL -1 call #t~mem72 := read~int(~#y~0, 4); [L824] -1 #t~ite73 := #t~mem72; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L824] -1 #t~ite74 := #t~ite73; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L824] FCALL -1 call write~int(#t~ite74, ~#y~0, 4); [L824] -1 havoc #t~ite73; [L824] -1 havoc #t~ite74; [L824] -1 havoc #t~mem72; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L825] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) [L825] -1 #t~ite75 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L825] -1 ~y$w_buff0_used~0 := #t~ite75; [L825] -1 havoc #t~ite75; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L826] COND FALSE -1 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)) [L826] -1 #t~ite76 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L826] -1 ~y$w_buff1_used~0 := #t~ite76; [L826] -1 havoc #t~ite76; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L827] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) [L827] -1 #t~ite77 := ~y$r_buff0_thd0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L827] -1 ~y$r_buff0_thd0~0 := #t~ite77; [L827] -1 havoc #t~ite77; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L828] COND FALSE -1 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)) [L828] -1 #t~ite78 := ~y$r_buff1_thd0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L828] -1 ~y$r_buff1_thd0~0 := #t~ite78; [L828] -1 havoc #t~ite78; [L831] -1 ~weak$$choice1~0 := (if 0 == #t~nondet79!base + #t~nondet79!offset then 0 else 1); [L831] -1 havoc #t~nondet79; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L832] COND TRUE -1 0 != ~__unbuffered_p2_EAX$read_delayed~0 % 256 VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L832] COND TRUE -1 0 != ~weak$$choice1~0 % 256 [L832] FCALL -1 call #t~mem80 := read~int(~__unbuffered_p2_EAX$read_delayed_var~0, 4); [L832] -1 #t~ite81 := #t~mem80; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L832] -1 #t~ite82 := #t~ite81; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L832] -1 ~__unbuffered_p2_EAX~0 := #t~ite82; [L832] -1 havoc #t~ite82; [L832] -1 havoc #t~ite81; [L832] -1 havoc #t~mem80; [L833] -1 ~main$tmp_guard1~0 := (if 0 == (if !((1 == ~__unbuffered_p0_EAX~0 && 1 == ~__unbuffered_p1_EAX~0) && 1 == ~__unbuffered_p2_EAX~0) then 1 else 0) then 0 else 1); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L4] -1 ~expression := #in~expression; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L4] COND TRUE -1 0 == ~expression VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L4] -1 assert false; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] ----- ----- class de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.CACSL2BoogieBacktranslator [?] -1 #NULL := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0] [?] -1 #valid[0] := 0; VAL [#NULL!base=0, #NULL!offset=0] [L672] -1 ~__unbuffered_cnt~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0] [L674] -1 ~__unbuffered_p0_EAX~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0] [L676] -1 ~__unbuffered_p1_EAX~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0] [L678] -1 ~__unbuffered_p2_EAX~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX~0=0] [L679] -1 ~__unbuffered_p2_EAX$flush_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX~0=0] [L680] -1 ~__unbuffered_p2_EAX$mem_tmp~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX~0=0] [L681] -1 ~__unbuffered_p2_EAX$r_buff0_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX~0=0] [L682] -1 ~__unbuffered_p2_EAX$r_buff0_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX~0=0] [L683] -1 ~__unbuffered_p2_EAX$r_buff0_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX~0=0] [L684] -1 ~__unbuffered_p2_EAX$r_buff0_thd3~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX~0=0] [L685] -1 ~__unbuffered_p2_EAX$r_buff1_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX~0=0] [L686] -1 ~__unbuffered_p2_EAX$r_buff1_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX~0=0] [L687] -1 ~__unbuffered_p2_EAX$r_buff1_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX~0=0] [L688] -1 ~__unbuffered_p2_EAX$r_buff1_thd3~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX~0=0] [L689] -1 ~__unbuffered_p2_EAX$read_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX~0=0] [L690] -1 ~__unbuffered_p2_EAX$read_delayed_var~0 := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX~0=0] [L691] -1 ~__unbuffered_p2_EAX$w_buff0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX~0=0] [L692] -1 ~__unbuffered_p2_EAX$w_buff0_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX~0=0] [L693] -1 ~__unbuffered_p2_EAX$w_buff1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0] [L694] -1 ~__unbuffered_p2_EAX$w_buff1_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0] [L695] -1 ~main$tmp_guard0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0] [L696] -1 ~main$tmp_guard1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0] [L698] -1 ~x~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [L700] FCALL -1 call ~#y~0 := #Ultimate.alloc(4); VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [L700] FCALL -1 call write~init~int(0, ~#y~0, 4); VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0] [L701] -1 ~y$flush_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0] [L702] -1 ~y$mem_tmp~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0] [L703] -1 ~y$r_buff0_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0] [L704] -1 ~y$r_buff0_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0] [L705] -1 ~y$r_buff0_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0] [L706] -1 ~y$r_buff0_thd3~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0] [L707] -1 ~y$r_buff1_thd0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0] [L708] -1 ~y$r_buff1_thd1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0] [L709] -1 ~y$r_buff1_thd2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0] [L710] -1 ~y$r_buff1_thd3~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0] [L711] -1 ~y$read_delayed~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed~0=0] [L712] -1 ~y$read_delayed_var~0 := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0] [L713] -1 ~y$w_buff0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0~0=0] [L714] -1 ~y$w_buff0_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0] [L715] -1 ~y$w_buff1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1~0=0] [L716] -1 ~y$w_buff1_used~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0] [L718] -1 ~z~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L719] -1 ~weak$$choice0~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L720] -1 ~weak$$choice1~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L721] -1 ~weak$$choice2~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L813] FCALL -1 call ~#t2686~0 := #Ultimate.alloc(4); VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L814] FCALL -1 call write~int(0, ~#t2686~0, 4); VAL [#NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L814] FORK -1 fork 0 P0({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L814] -1 havoc #t~nondet69; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L815] FCALL -1 call ~#t2687~0 := #Ultimate.alloc(4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L816] FCALL -1 call write~int(1, ~#t2687~0, 4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L816] FORK -1 fork 1 P1({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L816] -1 havoc #t~nondet70; VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L817] FCALL -1 call ~#t2688~0 := #Ultimate.alloc(4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L818] FCALL -1 call write~int(2, ~#t2688~0, 4); VAL [#in~arg!base=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L818] FORK -1 fork 2 P2({ base: 0, offset: 0 }); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=0, ~weak$$choice2~0=0, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L766-L801] 0 ~arg := #in~arg; [L769] 0 ~weak$$choice0~0 := (if 0 == #t~nondet12!base + #t~nondet12!offset then 0 else 1); [L769] 0 havoc #t~nondet12; [L770] 0 ~weak$$choice2~0 := (if 0 == #t~nondet13!base + #t~nondet13!offset then 0 else 1); [L770] 0 havoc #t~nondet13; [L771] 0 ~y$flush_delayed~0 := ~weak$$choice2~0; [L772] FCALL 0 call #t~mem14 := read~int(~#y~0, 4); [L772] 0 ~y$mem_tmp~0 := #t~mem14; [L772] 0 havoc #t~mem14; [L773] 0 ~weak$$choice1~0 := (if 0 == #t~nondet15!base + #t~nondet15!offset then 0 else 1); [L773] 0 havoc #t~nondet15; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L774] COND TRUE 0 0 == ~y$w_buff0_used~0 % 256 [L774] FCALL 0 call #t~mem16 := read~int(~#y~0, 4); [L774] 0 #t~ite26 := #t~mem16; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite26=0, #t~mem16=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L774] FCALL 0 call write~int(#t~ite26, ~#y~0, 4); [L774] 0 havoc #t~mem17; [L774] 0 havoc #t~ite24; [L774] 0 havoc #t~ite18; [L774] 0 havoc #t~ite23; [L774] 0 havoc #t~ite20; [L774] 0 havoc #t~mem16; [L774] 0 havoc #t~ite26; [L774] 0 havoc #t~ite25; [L774] 0 havoc #t~ite19; [L774] 0 havoc #t~ite22; [L774] 0 havoc #t~mem21; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L775] COND TRUE 0 0 != ~weak$$choice2~0 % 256 [L775] 0 #t~ite31 := ~y$w_buff0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite31=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L775] 0 ~y$w_buff0~0 := #t~ite31; [L775] 0 havoc #t~ite27; [L775] 0 havoc #t~ite31; [L775] 0 havoc #t~ite30; [L775] 0 havoc #t~ite29; [L775] 0 havoc #t~ite28; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L776] COND TRUE 0 0 != ~weak$$choice2~0 % 256 [L776] 0 #t~ite36 := ~y$w_buff1~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite36=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L776] 0 ~y$w_buff1~0 := #t~ite36; [L776] 0 havoc #t~ite36; [L776] 0 havoc #t~ite35; [L776] 0 havoc #t~ite32; [L776] 0 havoc #t~ite33; [L776] 0 havoc #t~ite34; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L777] COND TRUE 0 0 != ~weak$$choice2~0 % 256 [L777] 0 #t~ite41 := ~y$w_buff0_used~0 % 256; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite41=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L777] 0 ~y$w_buff0_used~0 := (if 0 == #t~ite41 then 0 else 1); [L777] 0 havoc #t~ite39; [L777] 0 havoc #t~ite40; [L777] 0 havoc #t~ite38; [L777] 0 havoc #t~ite37; [L777] 0 havoc #t~ite41; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L778] COND TRUE 0 0 != ~weak$$choice2~0 % 256 [L778] 0 #t~ite46 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite46=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L778] 0 ~y$w_buff1_used~0 := #t~ite46; [L778] 0 havoc #t~ite43; [L778] 0 havoc #t~ite42; [L778] 0 havoc #t~ite44; [L778] 0 havoc #t~ite45; [L778] 0 havoc #t~ite46; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L779] COND TRUE 0 0 != ~weak$$choice2~0 % 256 [L779] 0 #t~ite51 := ~y$r_buff0_thd3~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite51=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L779] 0 ~y$r_buff0_thd3~0 := #t~ite51; [L779] 0 havoc #t~ite49; [L779] 0 havoc #t~ite50; [L779] 0 havoc #t~ite48; [L779] 0 havoc #t~ite51; [L779] 0 havoc #t~ite47; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L780] COND TRUE 0 0 != ~weak$$choice2~0 % 256 [L780] 0 #t~ite57 := ~y$r_buff1_thd3~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite57=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=0, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=0, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L780] 0 ~y$r_buff1_thd3~0 := #t~ite57; [L780] 0 havoc #t~ite57; [L780] 0 havoc #t~ite52; [L780] 0 havoc #t~ite55; [L780] 0 havoc #t~ite54; [L780] 0 havoc #t~ite53; [L780] 0 havoc #t~ite56; [L781] 0 ~__unbuffered_p2_EAX$read_delayed~0 := 1; [L782] 0 ~__unbuffered_p2_EAX$read_delayed_var~0 := ~#y~0; [L783] FCALL 0 call #t~mem58 := read~int(~#y~0, 4); [L783] 0 ~__unbuffered_p2_EAX~0 := #t~mem58; [L783] 0 havoc #t~mem58; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L784] COND TRUE 0 0 != ~y$flush_delayed~0 % 256 [L784] 0 #t~ite60 := ~y$mem_tmp~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite60=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=1, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=0] [L784] FCALL 0 call write~int(#t~ite60, ~#y~0, 4); [L784] 0 havoc #t~mem59; [L784] 0 havoc #t~ite60; [L785] 0 ~y$flush_delayed~0 := 0; [L788] 0 ~z~0 := 1; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=0, ~__unbuffered_p0_EAX~0=0, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=0, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L722-L736] 1 ~arg := #in~arg; [L725] 1 ~__unbuffered_p0_EAX~0 := ~z~0; [L728] 1 ~x~0 := 1; [L733] 1 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L791] COND FALSE 0 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256) VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=0, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=0, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L737-L765] 2 ~arg := #in~arg; [L740] 2 ~__unbuffered_p1_EAX~0 := ~x~0; [L743] 2 ~y$w_buff1~0 := ~y$w_buff0~0; [L744] 2 ~y$w_buff0~0 := 1; [L745] 2 ~y$w_buff1_used~0 := ~y$w_buff0_used~0; [L746] 2 ~y$w_buff0_used~0 := 1; [L4] 2 ~expression := #in~expression; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L4] COND FALSE 2 !(0 == ~expression) VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L791] COND FALSE 0 !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd3~0 % 256) [L791] FCALL 0 call #t~mem61 := read~int(~#y~0, 4); [L791] 0 #t~ite62 := #t~mem61; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite62=0, #t~mem61=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L791] 0 #t~ite63 := #t~ite62; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite62=0, #t~ite63=0, #t~mem61=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L791] FCALL 0 call write~int(#t~ite63, ~#y~0, 4); [L791] 0 havoc #t~ite62; [L791] 0 havoc #t~ite63; [L791] 0 havoc #t~mem61; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L792] COND FALSE 0 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256) [L792] 0 #t~ite64 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite64=1, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L792] 0 ~y$w_buff0_used~0 := #t~ite64; [L792] 0 havoc #t~ite64; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L793] COND FALSE 0 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd3~0 % 256)) [L793] 0 #t~ite65 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite65=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L793] 0 ~y$w_buff1_used~0 := #t~ite65; [L793] 0 havoc #t~ite65; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L794] COND FALSE 0 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256) [L794] 0 #t~ite66 := ~y$r_buff0_thd3~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite66=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L794] 0 ~y$r_buff0_thd3~0 := #t~ite66; [L794] 0 havoc #t~ite66; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L795] COND FALSE 0 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd3~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd3~0 % 256)) [L795] 0 #t~ite67 := ~y$r_buff1_thd3~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, #t~ite67=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=1, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L795] 0 ~y$r_buff1_thd3~0 := #t~ite67; [L795] 0 havoc #t~ite67; [L798] 0 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=0, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L748] 2 ~y$r_buff1_thd0~0 := ~y$r_buff0_thd0~0; [L749] 2 ~y$r_buff1_thd1~0 := ~y$r_buff0_thd1~0; [L750] 2 ~y$r_buff1_thd2~0 := ~y$r_buff0_thd2~0; [L751] 2 ~y$r_buff1_thd3~0 := ~y$r_buff0_thd3~0; [L752] 2 ~y$r_buff0_thd2~0 := 1; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L755] COND TRUE 2 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256 [L755] 2 #t~ite6 := ~y$w_buff0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L755] FCALL 2 call write~int(#t~ite6, ~#y~0, 4); [L755] 2 havoc #t~ite6; [L755] 2 havoc #t~ite5; [L755] 2 havoc #t~mem4; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L756] COND TRUE 2 0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256 [L756] 2 #t~ite7 := 0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=1, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L756] 2 ~y$w_buff0_used~0 := #t~ite7; [L756] 2 havoc #t~ite7; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L757] COND FALSE 2 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)) [L757] 2 #t~ite8 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L757] 2 ~y$w_buff1_used~0 := #t~ite8; [L757] 2 havoc #t~ite8; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L758] COND FALSE 2 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) [L758] 2 #t~ite9 := ~y$r_buff0_thd2~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L758] 2 ~y$r_buff0_thd2~0 := #t~ite9; [L758] 2 havoc #t~ite9; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L759] COND FALSE 2 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd2~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd2~0 % 256)) [L759] 2 #t~ite10 := ~y$r_buff1_thd2~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=2, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L759] 2 ~y$r_buff1_thd2~0 := #t~ite10; [L759] 2 havoc #t~ite10; [L762] 2 ~__unbuffered_cnt~0 := 1 + ~__unbuffered_cnt~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=0, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L818] -1 havoc #t~nondet71; [L820] -1 ~main$tmp_guard0~0 := (if 0 == (if 3 == ~__unbuffered_cnt~0 then 1 else 0) then 0 else 1); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L822] -1 assume 0 != ~main$tmp_guard0~0 % 256; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L824] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L824] COND FALSE -1 !(0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256) [L824] FCALL -1 call #t~mem72 := read~int(~#y~0, 4); [L824] -1 #t~ite73 := #t~mem72; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L824] -1 #t~ite74 := #t~ite73; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L824] FCALL -1 call write~int(#t~ite74, ~#y~0, 4); [L824] -1 havoc #t~ite73; [L824] -1 havoc #t~ite74; [L824] -1 havoc #t~mem72; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L825] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) [L825] -1 #t~ite75 := ~y$w_buff0_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L825] -1 ~y$w_buff0_used~0 := #t~ite75; [L825] -1 havoc #t~ite75; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L826] COND FALSE -1 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)) [L826] -1 #t~ite76 := ~y$w_buff1_used~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L826] -1 ~y$w_buff1_used~0 := #t~ite76; [L826] -1 havoc #t~ite76; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L827] COND FALSE -1 !(0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) [L827] -1 #t~ite77 := ~y$r_buff0_thd0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L827] -1 ~y$r_buff0_thd0~0 := #t~ite77; [L827] -1 havoc #t~ite77; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L828] COND FALSE -1 !((0 != ~y$w_buff0_used~0 % 256 && 0 != ~y$r_buff0_thd0~0 % 256) || (0 != ~y$w_buff1_used~0 % 256 && 0 != ~y$r_buff1_thd0~0 % 256)) [L828] -1 #t~ite78 := ~y$r_buff1_thd0~0; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L828] -1 ~y$r_buff1_thd0~0 := #t~ite78; [L828] -1 havoc #t~ite78; [L831] -1 ~weak$$choice1~0 := (if 0 == #t~nondet79!base + #t~nondet79!offset then 0 else 1); [L831] -1 havoc #t~nondet79; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L832] COND TRUE -1 0 != ~__unbuffered_p2_EAX$read_delayed~0 % 256 VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L832] COND TRUE -1 0 != ~weak$$choice1~0 % 256 [L832] FCALL -1 call #t~mem80 := read~int(~__unbuffered_p2_EAX$read_delayed_var~0, 4); [L832] -1 #t~ite81 := #t~mem80; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L832] -1 #t~ite82 := #t~ite81; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=0, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L832] -1 ~__unbuffered_p2_EAX~0 := #t~ite82; [L832] -1 havoc #t~ite82; [L832] -1 havoc #t~ite81; [L832] -1 havoc #t~mem80; [L833] -1 ~main$tmp_guard1~0 := (if 0 == (if !((1 == ~__unbuffered_p0_EAX~0 && 1 == ~__unbuffered_p1_EAX~0) && 1 == ~__unbuffered_p2_EAX~0) then 1 else 0) then 0 else 1); VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L4] -1 ~expression := #in~expression; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L4] COND TRUE -1 0 == ~expression VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L4] -1 assert false; VAL [#in~arg!base=0, #in~arg!base=0, #in~arg!offset=0, #in~arg!offset=0, #NULL!base=0, #NULL!offset=0, ~#y~0!base=6, ~#y~0!offset=0, ~__unbuffered_cnt~0=3, ~__unbuffered_p0_EAX~0=1, ~__unbuffered_p1_EAX~0=1, ~__unbuffered_p2_EAX$flush_delayed~0=0, ~__unbuffered_p2_EAX$mem_tmp~0=0, ~__unbuffered_p2_EAX$r_buff0_thd0~0=0, ~__unbuffered_p2_EAX$r_buff0_thd1~0=0, ~__unbuffered_p2_EAX$r_buff0_thd2~0=0, ~__unbuffered_p2_EAX$r_buff0_thd3~0=0, ~__unbuffered_p2_EAX$r_buff1_thd0~0=0, ~__unbuffered_p2_EAX$r_buff1_thd1~0=0, ~__unbuffered_p2_EAX$r_buff1_thd2~0=0, ~__unbuffered_p2_EAX$r_buff1_thd3~0=0, ~__unbuffered_p2_EAX$read_delayed_var~0!base=6, ~__unbuffered_p2_EAX$read_delayed_var~0!offset=0, ~__unbuffered_p2_EAX$read_delayed~0=1, ~__unbuffered_p2_EAX$w_buff0_used~0=0, ~__unbuffered_p2_EAX$w_buff0~0=0, ~__unbuffered_p2_EAX$w_buff1_used~0=0, ~__unbuffered_p2_EAX$w_buff1~0=0, ~__unbuffered_p2_EAX~0=1, ~arg!base=0, ~arg!base=0, ~arg!offset=0, ~arg!offset=0, ~main$tmp_guard0~0=1, ~main$tmp_guard1~0=0, ~weak$$choice0~0=0, ~weak$$choice1~0=1, ~weak$$choice2~0=1, ~x~0=1, ~y$flush_delayed~0=0, ~y$mem_tmp~0=0, ~y$r_buff0_thd0~0=0, ~y$r_buff0_thd1~0=0, ~y$r_buff0_thd2~0=1, ~y$r_buff0_thd3~0=0, ~y$r_buff1_thd0~0=0, ~y$r_buff1_thd1~0=0, ~y$r_buff1_thd2~0=0, ~y$r_buff1_thd3~0=0, ~y$read_delayed_var~0!base=0, ~y$read_delayed_var~0!offset=0, ~y$read_delayed~0=0, ~y$w_buff0_used~0=0, ~y$w_buff0~0=1, ~y$w_buff1_used~0=0, ~y$w_buff1~0=0, ~z~0=1] [L672] -1 int __unbuffered_cnt = 0; VAL [__unbuffered_cnt=0] [L674] -1 int __unbuffered_p0_EAX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0] [L676] -1 int __unbuffered_p1_EAX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0] [L678] -1 int __unbuffered_p2_EAX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0] [L679] -1 _Bool __unbuffered_p2_EAX$flush_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0] [L680] -1 int __unbuffered_p2_EAX$mem_tmp; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0] [L681] -1 _Bool __unbuffered_p2_EAX$r_buff0_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0] [L682] -1 _Bool __unbuffered_p2_EAX$r_buff0_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0] [L683] -1 _Bool __unbuffered_p2_EAX$r_buff0_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0] [L684] -1 _Bool __unbuffered_p2_EAX$r_buff0_thd3; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0] [L685] -1 _Bool __unbuffered_p2_EAX$r_buff1_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0] [L686] -1 _Bool __unbuffered_p2_EAX$r_buff1_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0] [L687] -1 _Bool __unbuffered_p2_EAX$r_buff1_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0] [L688] -1 _Bool __unbuffered_p2_EAX$r_buff1_thd3; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0] [L689] -1 _Bool __unbuffered_p2_EAX$read_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0] [L690] -1 int *__unbuffered_p2_EAX$read_delayed_var; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}] [L691] -1 int __unbuffered_p2_EAX$w_buff0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0] [L692] -1 _Bool __unbuffered_p2_EAX$w_buff0_used; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0] [L693] -1 int __unbuffered_p2_EAX$w_buff1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0] [L694] -1 _Bool __unbuffered_p2_EAX$w_buff1_used; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0] [L695] -1 _Bool main$tmp_guard0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0] [L696] -1 _Bool main$tmp_guard1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0] [L698] -1 int x = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0] [L700] -1 int y = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={6:0}] [L701] -1 _Bool y$flush_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={6:0}, y$flush_delayed=0] [L702] -1 int y$mem_tmp; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={6:0}, y$flush_delayed=0, y$mem_tmp=0] [L703] -1 _Bool y$r_buff0_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0] [L704] -1 _Bool y$r_buff0_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0] [L705] -1 _Bool y$r_buff0_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0] [L706] -1 _Bool y$r_buff0_thd3; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0] [L707] -1 _Bool y$r_buff1_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0] [L708] -1 _Bool y$r_buff1_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0] [L709] -1 _Bool y$r_buff1_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0] [L710] -1 _Bool y$r_buff1_thd3; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0] [L711] -1 _Bool y$read_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0] [L712] -1 int *y$read_delayed_var; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}] [L713] -1 int y$w_buff0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0] [L714] -1 _Bool y$w_buff0_used; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0] [L715] -1 int y$w_buff1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0] [L716] -1 _Bool y$w_buff1_used; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L718] -1 int z = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L719] -1 _Bool weak$$choice0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, x=0, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L720] -1 _Bool weak$$choice1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, x=0, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L721] -1 _Bool weak$$choice2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x=0, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L813] -1 pthread_t t2686; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x=0, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L814] FCALL, FORK -1 pthread_create(&t2686, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x=0, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L815] -1 pthread_t t2687; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x=0, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L816] FCALL, FORK -1 pthread_create(&t2687, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x=0, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L817] -1 pthread_t t2688; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x=0, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L818] FCALL, FORK -1 pthread_create(&t2688, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x=0, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L769] 0 weak$$choice0 = __VERIFIER_nondet_pointer() [L770] 0 weak$$choice2 = __VERIFIER_nondet_pointer() [L771] 0 y$flush_delayed = weak$$choice2 [L772] EXPR 0 \read(y) [L772] 0 y$mem_tmp = y [L773] 0 weak$$choice1 = __VERIFIER_nondet_pointer() [L774] EXPR 0 !y$w_buff0_used ? y : (y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (weak$$choice0 ? y : (weak$$choice1 ? y$w_buff0 : y$w_buff1)) : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (weak$$choice0 ? y$w_buff1 : y$w_buff0) : (weak$$choice0 ? y$w_buff0 : y)))) [L774] EXPR 0 \read(y) [L774] EXPR 0 !y$w_buff0_used ? y : (y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (weak$$choice0 ? y : (weak$$choice1 ? y$w_buff0 : y$w_buff1)) : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (weak$$choice0 ? y$w_buff1 : y$w_buff0) : (weak$$choice0 ? y$w_buff0 : y)))) VAL [!y$w_buff0_used ? y : (y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (weak$$choice0 ? y : (weak$$choice1 ? y$w_buff0 : y$w_buff1)) : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (weak$$choice0 ? y$w_buff1 : y$w_buff0) : (weak$$choice0 ? y$w_buff0 : y))))=0, \read(y)=0, __unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=0, y={6:0}, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L774] 0 y = !y$w_buff0_used ? y : (y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (weak$$choice0 ? y : (weak$$choice1 ? y$w_buff0 : y$w_buff1)) : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (weak$$choice0 ? y$w_buff1 : y$w_buff0) : (weak$$choice0 ? y$w_buff0 : y)))) [L775] EXPR 0 weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? y$w_buff0 : y$w_buff0)))) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? y$w_buff0 : y$w_buff0))))=0, x=0, y={6:0}, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L775] 0 y$w_buff0 = weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? y$w_buff0 : y$w_buff0)))) [L776] EXPR 0 weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff1 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? y$w_buff1 : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? y$w_buff1 : y$w_buff1)))) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff1 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? y$w_buff1 : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? y$w_buff1 : y$w_buff1))))=0, x=0, y={6:0}, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L776] 0 y$w_buff1 = weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff1 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? y$w_buff1 : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? y$w_buff1 : y$w_buff1)))) [L777] EXPR 0 weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? weak$$choice0 || !weak$$choice1 : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? weak$$choice0 : weak$$choice0)))) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? weak$$choice0 || !weak$$choice1 : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? weak$$choice0 : weak$$choice0))))=0, x=0, y={6:0}, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L777] 0 y$w_buff0_used = weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? weak$$choice0 || !weak$$choice1 : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? weak$$choice0 : weak$$choice0)))) [L778] EXPR 0 weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? weak$$choice0 : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)))) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? weak$$choice0 : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (_Bool)0 : (_Bool)0))))=0, x=0, y={6:0}, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L778] 0 y$w_buff1_used = weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? weak$$choice0 : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)))) [L779] EXPR 0 weak$$choice2 ? y$r_buff0_thd3 : (!y$w_buff0_used ? y$r_buff0_thd3 : (y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? y$r_buff0_thd3 : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)))) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, weak$$choice2 ? y$r_buff0_thd3 : (!y$w_buff0_used ? y$r_buff0_thd3 : (y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? y$r_buff0_thd3 : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (_Bool)0 : (_Bool)0))))=0, x=0, y={6:0}, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L779] 0 y$r_buff0_thd3 = weak$$choice2 ? y$r_buff0_thd3 : (!y$w_buff0_used ? y$r_buff0_thd3 : (y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? y$r_buff0_thd3 : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)))) [L780] EXPR 0 weak$$choice2 ? y$r_buff1_thd3 : (!y$w_buff0_used ? y$r_buff1_thd3 : (y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (weak$$choice0 ? y$r_buff1_thd3 : (_Bool)0) : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)))) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, weak$$choice2 ? y$r_buff1_thd3 : (!y$w_buff0_used ? y$r_buff1_thd3 : (y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (weak$$choice0 ? y$r_buff1_thd3 : (_Bool)0) : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (_Bool)0 : (_Bool)0))))=0, x=0, y={6:0}, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L780] 0 y$r_buff1_thd3 = weak$$choice2 ? y$r_buff1_thd3 : (!y$w_buff0_used ? y$r_buff1_thd3 : (y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (weak$$choice0 ? y$r_buff1_thd3 : (_Bool)0) : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)))) [L781] 0 __unbuffered_p2_EAX$read_delayed = (_Bool)1 [L782] 0 __unbuffered_p2_EAX$read_delayed_var = &y [L783] EXPR 0 \read(y) [L783] 0 __unbuffered_p2_EAX = y [L784] EXPR 0 y$flush_delayed ? y$mem_tmp : y VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=0, y={6:0}, y$flush_delayed=1, y$flush_delayed ? y$mem_tmp : y=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L784] 0 y = y$flush_delayed ? y$mem_tmp : y [L785] 0 y$flush_delayed = (_Bool)0 [L788] 0 z = 1 VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=0, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L725] 1 __unbuffered_p0_EAX = z [L728] 1 x = 1 [L733] 1 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L791] EXPR 0 y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y) VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L740] 2 __unbuffered_p1_EAX = x [L743] 2 y$w_buff1 = y$w_buff0 [L744] 2 y$w_buff0 = 1 [L745] 2 y$w_buff1_used = y$w_buff0_used [L746] 2 y$w_buff0_used = (_Bool)1 [L4] COND FALSE 2 !(!expression) VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L791] EXPR 0 y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y [L791] EXPR 0 \read(y) [L791] EXPR 0 y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y VAL [\read(y)=0, __unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y=0, z=1] [L791] EXPR 0 y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y) VAL [\read(y)=0, __unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y)=0, y$w_buff1=0, y$w_buff1_used=0, y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y=0, z=1] [L791] 0 y = y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y) [L792] EXPR 0 y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : y$w_buff0_used VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L792] 0 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : y$w_buff0_used [L793] EXPR 0 y$w_buff0_used && y$r_buff0_thd3 || y$w_buff1_used && y$r_buff1_thd3 ? (_Bool)0 : y$w_buff1_used VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff0_used && y$r_buff0_thd3 || y$w_buff1_used && y$r_buff1_thd3 ? (_Bool)0 : y$w_buff1_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L793] 0 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd3 || y$w_buff1_used && y$r_buff1_thd3 ? (_Bool)0 : y$w_buff1_used [L794] EXPR 0 y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : y$r_buff0_thd3 VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : y$r_buff0_thd3=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L794] 0 y$r_buff0_thd3 = y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : y$r_buff0_thd3 [L795] EXPR 0 y$w_buff0_used && y$r_buff0_thd3 || y$w_buff1_used && y$r_buff1_thd3 ? (_Bool)0 : y$r_buff1_thd3 VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff0_used && y$r_buff0_thd3 || y$w_buff1_used && y$r_buff1_thd3 ? (_Bool)0 : y$r_buff1_thd3=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L795] 0 y$r_buff1_thd3 = y$w_buff0_used && y$r_buff0_thd3 || y$w_buff1_used && y$r_buff1_thd3 ? (_Bool)0 : y$r_buff1_thd3 [L798] 0 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L748] 2 y$r_buff1_thd0 = y$r_buff0_thd0 [L749] 2 y$r_buff1_thd1 = y$r_buff0_thd1 [L750] 2 y$r_buff1_thd2 = y$r_buff0_thd2 [L751] 2 y$r_buff1_thd3 = y$r_buff0_thd3 [L752] 2 y$r_buff0_thd2 = (_Bool)1 VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L755] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L755] 2 y = y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) [L756] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L756] 2 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used [L757] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L757] 2 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used [L758] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2 VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L758] 2 y$r_buff0_thd2 = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2 [L759] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$r_buff1_thd2 VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L759] 2 y$r_buff1_thd2 = y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$r_buff1_thd2 [L762] 2 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L820] -1 main$tmp_guard0 = __unbuffered_cnt == 3 VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L824] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L824] EXPR -1 y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y [L824] EXPR -1 \read(y) [L824] EXPR -1 y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L824] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L824] -1 y = y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) [L825] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L825] -1 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used [L826] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$w_buff1_used VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L826] -1 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$w_buff1_used [L827] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0 VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L827] -1 y$r_buff0_thd0 = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0 [L828] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$r_buff1_thd0 VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L828] -1 y$r_buff1_thd0 = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$r_buff1_thd0 [L831] -1 weak$$choice1 = __VERIFIER_nondet_pointer() [L832] EXPR -1 __unbuffered_p2_EAX$read_delayed ? (weak$$choice1 ? *__unbuffered_p2_EAX$read_delayed_var : __unbuffered_p2_EAX) : __unbuffered_p2_EAX VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L832] EXPR -1 weak$$choice1 ? *__unbuffered_p2_EAX$read_delayed_var : __unbuffered_p2_EAX [L832] EXPR -1 \read(*__unbuffered_p2_EAX$read_delayed_var) [L832] EXPR -1 weak$$choice1 ? *__unbuffered_p2_EAX$read_delayed_var : __unbuffered_p2_EAX VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L832] EXPR -1 __unbuffered_p2_EAX$read_delayed ? (weak$$choice1 ? *__unbuffered_p2_EAX$read_delayed_var : __unbuffered_p2_EAX) : __unbuffered_p2_EAX VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L832] -1 __unbuffered_p2_EAX = __unbuffered_p2_EAX$read_delayed ? (weak$$choice1 ? *__unbuffered_p2_EAX$read_delayed_var : __unbuffered_p2_EAX) : __unbuffered_p2_EAX [L833] -1 main$tmp_guard1 = !(__unbuffered_p0_EAX == 1 && __unbuffered_p1_EAX == 1 && __unbuffered_p2_EAX == 1) VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L4] COND TRUE -1 !expression VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L4] -1 __VERIFIER_error() VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] ----- [2018-11-23 13:18:20,971 INFO L145 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/working_dir_43f24f51-8c4d-4eb7-b701-5adb5d5acaf7/bin-2019/uautomizer/witness.graphml [2018-11-23 13:18:20,971 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2018-11-23 13:18:20,972 INFO L168 Benchmark]: Toolchain (without parser) took 199090.96 ms. Allocated memory was 1.0 GB in the beginning and 7.5 GB in the end (delta: 6.5 GB). Free memory was 956.6 MB in the beginning and 5.1 GB in the end (delta: -4.2 GB). Peak memory consumption was 4.3 GB. Max. memory is 11.5 GB. [2018-11-23 13:18:20,972 INFO L168 Benchmark]: CDTParser took 0.11 ms. Allocated memory is still 1.0 GB. Free memory is still 985.6 MB. There was no memory consumed. Max. memory is 11.5 GB. [2018-11-23 13:18:20,973 INFO L168 Benchmark]: CACSL2BoogieTranslator took 472.22 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 145.2 MB). Free memory was 956.6 MB in the beginning and 1.1 GB in the end (delta: -166.0 MB). Peak memory consumption was 35.9 MB. Max. memory is 11.5 GB. [2018-11-23 13:18:20,973 INFO L168 Benchmark]: Boogie Procedure Inliner took 43.42 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 2.7 MB). Peak memory consumption was 2.7 MB. Max. memory is 11.5 GB. [2018-11-23 13:18:20,973 INFO L168 Benchmark]: Boogie Preprocessor took 24.60 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 2.7 MB). Peak memory consumption was 2.7 MB. Max. memory is 11.5 GB. [2018-11-23 13:18:20,973 INFO L168 Benchmark]: RCFGBuilder took 574.38 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 64.9 MB). Peak memory consumption was 64.9 MB. Max. memory is 11.5 GB. [2018-11-23 13:18:20,973 INFO L168 Benchmark]: TraceAbstraction took 183464.45 ms. Allocated memory was 1.2 GB in the beginning and 6.6 GB in the end (delta: 5.5 GB). Free memory was 1.1 GB in the beginning and 2.3 GB in the end (delta: -1.3 GB). Peak memory consumption was 4.2 GB. Max. memory is 11.5 GB. [2018-11-23 13:18:20,974 INFO L168 Benchmark]: Witness Printer took 14508.53 ms. Allocated memory was 6.6 GB in the beginning and 7.5 GB in the end (delta: 890.2 MB). Free memory was 2.3 GB in the beginning and 5.1 GB in the end (delta: -2.8 GB). Peak memory consumption was 7.4 MB. Max. memory is 11.5 GB. [2018-11-23 13:18:20,975 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.11 ms. Allocated memory is still 1.0 GB. Free memory is still 985.6 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 472.22 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 145.2 MB). Free memory was 956.6 MB in the beginning and 1.1 GB in the end (delta: -166.0 MB). Peak memory consumption was 35.9 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 43.42 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 2.7 MB). Peak memory consumption was 2.7 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 24.60 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 2.7 MB). Peak memory consumption was 2.7 MB. Max. memory is 11.5 GB. * RCFGBuilder took 574.38 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 64.9 MB). Peak memory consumption was 64.9 MB. Max. memory is 11.5 GB. * TraceAbstraction took 183464.45 ms. Allocated memory was 1.2 GB in the beginning and 6.6 GB in the end (delta: 5.5 GB). Free memory was 1.1 GB in the beginning and 2.3 GB in the end (delta: -1.3 GB). Peak memory consumption was 4.2 GB. Max. memory is 11.5 GB. * Witness Printer took 14508.53 ms. Allocated memory was 6.6 GB in the beginning and 7.5 GB in the end (delta: 890.2 MB). Free memory was 2.3 GB in the beginning and 5.1 GB in the end (delta: -2.8 GB). Peak memory consumption was 7.4 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L672] -1 int __unbuffered_cnt = 0; VAL [__unbuffered_cnt=0] [L674] -1 int __unbuffered_p0_EAX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0] [L676] -1 int __unbuffered_p1_EAX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0] [L678] -1 int __unbuffered_p2_EAX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0] [L679] -1 _Bool __unbuffered_p2_EAX$flush_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0] [L680] -1 int __unbuffered_p2_EAX$mem_tmp; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0] [L681] -1 _Bool __unbuffered_p2_EAX$r_buff0_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0] [L682] -1 _Bool __unbuffered_p2_EAX$r_buff0_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0] [L683] -1 _Bool __unbuffered_p2_EAX$r_buff0_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0] [L684] -1 _Bool __unbuffered_p2_EAX$r_buff0_thd3; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0] [L685] -1 _Bool __unbuffered_p2_EAX$r_buff1_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0] [L686] -1 _Bool __unbuffered_p2_EAX$r_buff1_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0] [L687] -1 _Bool __unbuffered_p2_EAX$r_buff1_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0] [L688] -1 _Bool __unbuffered_p2_EAX$r_buff1_thd3; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0] [L689] -1 _Bool __unbuffered_p2_EAX$read_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0] [L690] -1 int *__unbuffered_p2_EAX$read_delayed_var; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}] [L691] -1 int __unbuffered_p2_EAX$w_buff0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0] [L692] -1 _Bool __unbuffered_p2_EAX$w_buff0_used; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0] [L693] -1 int __unbuffered_p2_EAX$w_buff1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0] [L694] -1 _Bool __unbuffered_p2_EAX$w_buff1_used; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0] [L695] -1 _Bool main$tmp_guard0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0] [L696] -1 _Bool main$tmp_guard1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0] [L698] -1 int x = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0] [L700] -1 int y = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={6:0}] [L701] -1 _Bool y$flush_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={6:0}, y$flush_delayed=0] [L702] -1 int y$mem_tmp; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={6:0}, y$flush_delayed=0, y$mem_tmp=0] [L703] -1 _Bool y$r_buff0_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0] [L704] -1 _Bool y$r_buff0_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0] [L705] -1 _Bool y$r_buff0_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0] [L706] -1 _Bool y$r_buff0_thd3; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0] [L707] -1 _Bool y$r_buff1_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0] [L708] -1 _Bool y$r_buff1_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0] [L709] -1 _Bool y$r_buff1_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0] [L710] -1 _Bool y$r_buff1_thd3; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0] [L711] -1 _Bool y$read_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0] [L712] -1 int *y$read_delayed_var; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}] [L713] -1 int y$w_buff0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0] [L714] -1 _Bool y$w_buff0_used; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0] [L715] -1 int y$w_buff1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0] [L716] -1 _Bool y$w_buff1_used; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L718] -1 int z = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L719] -1 _Bool weak$$choice0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, x=0, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L720] -1 _Bool weak$$choice1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, x=0, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L721] -1 _Bool weak$$choice2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x=0, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L813] -1 pthread_t t2686; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x=0, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L814] FCALL, FORK -1 pthread_create(&t2686, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x=0, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L815] -1 pthread_t t2687; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x=0, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L816] FCALL, FORK -1 pthread_create(&t2687, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x=0, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L817] -1 pthread_t t2688; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x=0, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L818] FCALL, FORK -1 pthread_create(&t2688, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x=0, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L769] 0 weak$$choice0 = __VERIFIER_nondet_pointer() [L770] 0 weak$$choice2 = __VERIFIER_nondet_pointer() [L771] 0 y$flush_delayed = weak$$choice2 [L772] EXPR 0 \read(y) [L772] 0 y$mem_tmp = y [L773] 0 weak$$choice1 = __VERIFIER_nondet_pointer() [L774] EXPR 0 !y$w_buff0_used ? y : (y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (weak$$choice0 ? y : (weak$$choice1 ? y$w_buff0 : y$w_buff1)) : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (weak$$choice0 ? y$w_buff1 : y$w_buff0) : (weak$$choice0 ? y$w_buff0 : y)))) [L774] EXPR 0 \read(y) [L774] EXPR 0 !y$w_buff0_used ? y : (y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (weak$$choice0 ? y : (weak$$choice1 ? y$w_buff0 : y$w_buff1)) : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (weak$$choice0 ? y$w_buff1 : y$w_buff0) : (weak$$choice0 ? y$w_buff0 : y)))) VAL [!y$w_buff0_used ? y : (y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (weak$$choice0 ? y : (weak$$choice1 ? y$w_buff0 : y$w_buff1)) : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (weak$$choice0 ? y$w_buff1 : y$w_buff0) : (weak$$choice0 ? y$w_buff0 : y))))=0, \read(y)=0, __unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=0, y={6:0}, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L774] 0 y = !y$w_buff0_used ? y : (y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (weak$$choice0 ? y : (weak$$choice1 ? y$w_buff0 : y$w_buff1)) : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (weak$$choice0 ? y$w_buff1 : y$w_buff0) : (weak$$choice0 ? y$w_buff0 : y)))) [L775] EXPR 0 weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? y$w_buff0 : y$w_buff0)))) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? y$w_buff0 : y$w_buff0))))=0, x=0, y={6:0}, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L775] 0 y$w_buff0 = weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? y$w_buff0 : y$w_buff0)))) [L776] EXPR 0 weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff1 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? y$w_buff1 : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? y$w_buff1 : y$w_buff1)))) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff1 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? y$w_buff1 : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? y$w_buff1 : y$w_buff1))))=0, x=0, y={6:0}, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L776] 0 y$w_buff1 = weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff1 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? y$w_buff1 : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? y$w_buff1 : y$w_buff1)))) [L777] EXPR 0 weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? weak$$choice0 || !weak$$choice1 : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? weak$$choice0 : weak$$choice0)))) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? weak$$choice0 || !weak$$choice1 : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? weak$$choice0 : weak$$choice0))))=0, x=0, y={6:0}, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L777] 0 y$w_buff0_used = weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? weak$$choice0 || !weak$$choice1 : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? weak$$choice0 : weak$$choice0)))) [L778] EXPR 0 weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? weak$$choice0 : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)))) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? weak$$choice0 : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (_Bool)0 : (_Bool)0))))=0, x=0, y={6:0}, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L778] 0 y$w_buff1_used = weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? weak$$choice0 : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)))) [L779] EXPR 0 weak$$choice2 ? y$r_buff0_thd3 : (!y$w_buff0_used ? y$r_buff0_thd3 : (y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? y$r_buff0_thd3 : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)))) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, weak$$choice2 ? y$r_buff0_thd3 : (!y$w_buff0_used ? y$r_buff0_thd3 : (y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? y$r_buff0_thd3 : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (_Bool)0 : (_Bool)0))))=0, x=0, y={6:0}, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L779] 0 y$r_buff0_thd3 = weak$$choice2 ? y$r_buff0_thd3 : (!y$w_buff0_used ? y$r_buff0_thd3 : (y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? y$r_buff0_thd3 : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)))) [L780] EXPR 0 weak$$choice2 ? y$r_buff1_thd3 : (!y$w_buff0_used ? y$r_buff1_thd3 : (y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (weak$$choice0 ? y$r_buff1_thd3 : (_Bool)0) : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)))) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, weak$$choice2 ? y$r_buff1_thd3 : (!y$w_buff0_used ? y$r_buff1_thd3 : (y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (weak$$choice0 ? y$r_buff1_thd3 : (_Bool)0) : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (_Bool)0 : (_Bool)0))))=0, x=0, y={6:0}, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L780] 0 y$r_buff1_thd3 = weak$$choice2 ? y$r_buff1_thd3 : (!y$w_buff0_used ? y$r_buff1_thd3 : (y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : (y$w_buff0_used && !y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (weak$$choice0 ? y$r_buff1_thd3 : (_Bool)0) : (y$w_buff0_used && y$r_buff1_thd3 && y$w_buff1_used && !y$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)))) [L781] 0 __unbuffered_p2_EAX$read_delayed = (_Bool)1 [L782] 0 __unbuffered_p2_EAX$read_delayed_var = &y [L783] EXPR 0 \read(y) [L783] 0 __unbuffered_p2_EAX = y [L784] EXPR 0 y$flush_delayed ? y$mem_tmp : y VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=0, y={6:0}, y$flush_delayed=1, y$flush_delayed ? y$mem_tmp : y=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L784] 0 y = y$flush_delayed ? y$mem_tmp : y [L785] 0 y$flush_delayed = (_Bool)0 [L788] 0 z = 1 VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=0, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L725] 1 __unbuffered_p0_EAX = z [L728] 1 x = 1 [L733] 1 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L791] EXPR 0 y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y) VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L740] 2 __unbuffered_p1_EAX = x [L743] 2 y$w_buff1 = y$w_buff0 [L744] 2 y$w_buff0 = 1 [L745] 2 y$w_buff1_used = y$w_buff0_used [L746] 2 y$w_buff0_used = (_Bool)1 [L4] COND FALSE 2 !(!expression) VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L791] EXPR 0 y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y [L791] EXPR 0 \read(y) [L791] EXPR 0 y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y VAL [\read(y)=0, __unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y=0, z=1] [L791] EXPR 0 y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y) VAL [\read(y)=0, __unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y)=0, y$w_buff1=0, y$w_buff1_used=0, y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y=0, z=1] [L791] 0 y = y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y) [L792] EXPR 0 y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : y$w_buff0_used VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L792] 0 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : y$w_buff0_used [L793] EXPR 0 y$w_buff0_used && y$r_buff0_thd3 || y$w_buff1_used && y$r_buff1_thd3 ? (_Bool)0 : y$w_buff1_used VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff0_used && y$r_buff0_thd3 || y$w_buff1_used && y$r_buff1_thd3 ? (_Bool)0 : y$w_buff1_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L793] 0 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd3 || y$w_buff1_used && y$r_buff1_thd3 ? (_Bool)0 : y$w_buff1_used [L794] EXPR 0 y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : y$r_buff0_thd3 VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : y$r_buff0_thd3=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L794] 0 y$r_buff0_thd3 = y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : y$r_buff0_thd3 [L795] EXPR 0 y$w_buff0_used && y$r_buff0_thd3 || y$w_buff1_used && y$r_buff1_thd3 ? (_Bool)0 : y$r_buff1_thd3 VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff0_used && y$r_buff0_thd3 || y$w_buff1_used && y$r_buff1_thd3 ? (_Bool)0 : y$r_buff1_thd3=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L795] 0 y$r_buff1_thd3 = y$w_buff0_used && y$r_buff0_thd3 || y$w_buff1_used && y$r_buff1_thd3 ? (_Bool)0 : y$r_buff1_thd3 [L798] 0 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L748] 2 y$r_buff1_thd0 = y$r_buff0_thd0 [L749] 2 y$r_buff1_thd1 = y$r_buff0_thd1 [L750] 2 y$r_buff1_thd2 = y$r_buff0_thd2 [L751] 2 y$r_buff1_thd3 = y$r_buff0_thd3 [L752] 2 y$r_buff0_thd2 = (_Bool)1 VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L755] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L755] 2 y = y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) [L756] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L756] 2 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used [L757] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L757] 2 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used [L758] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2 VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L758] 2 y$r_buff0_thd2 = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2 [L759] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$r_buff1_thd2 VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L759] 2 y$r_buff1_thd2 = y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$r_buff1_thd2 [L762] 2 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L820] -1 main$tmp_guard0 = __unbuffered_cnt == 3 VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L824] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L824] EXPR -1 y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y [L824] EXPR -1 \read(y) [L824] EXPR -1 y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L824] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L824] -1 y = y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) [L825] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L825] -1 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used [L826] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$w_buff1_used VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L826] -1 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$w_buff1_used [L827] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0 VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L827] -1 y$r_buff0_thd0 = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0 [L828] EXPR -1 y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$r_buff1_thd0 VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L828] -1 y$r_buff1_thd0 = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$r_buff1_thd0 [L831] -1 weak$$choice1 = __VERIFIER_nondet_pointer() [L832] EXPR -1 __unbuffered_p2_EAX$read_delayed ? (weak$$choice1 ? *__unbuffered_p2_EAX$read_delayed_var : __unbuffered_p2_EAX) : __unbuffered_p2_EAX VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L832] EXPR -1 weak$$choice1 ? *__unbuffered_p2_EAX$read_delayed_var : __unbuffered_p2_EAX [L832] EXPR -1 \read(*__unbuffered_p2_EAX$read_delayed_var) [L832] EXPR -1 weak$$choice1 ? *__unbuffered_p2_EAX$read_delayed_var : __unbuffered_p2_EAX VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L832] EXPR -1 __unbuffered_p2_EAX$read_delayed ? (weak$$choice1 ? *__unbuffered_p2_EAX$read_delayed_var : __unbuffered_p2_EAX) : __unbuffered_p2_EAX VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L832] -1 __unbuffered_p2_EAX = __unbuffered_p2_EAX$read_delayed ? (weak$$choice1 ? *__unbuffered_p2_EAX$read_delayed_var : __unbuffered_p2_EAX) : __unbuffered_p2_EAX [L833] -1 main$tmp_guard1 = !(__unbuffered_p0_EAX == 1 && __unbuffered_p1_EAX == 1 && __unbuffered_p2_EAX == 1) VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L4] COND TRUE -1 !expression VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L4] -1 __VERIFIER_error() VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={6:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=1, weak$$choice2=1, x=1, y={6:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=1, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] - StatisticsResult: Ultimate Automizer benchmark data CFG has 7 procedures, 340 locations, 3 error locations. UNSAFE Result, 183.3s OverallTime, 35 OverallIterations, 1 TraceHistogramMax, 39.0s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 11795 SDtfs, 17108 SDslu, 23802 SDs, 0 SdLazy, 9326 SolverSat, 735 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 5.2s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 330 GetRequests, 83 SyntacticMatches, 32 SemanticMatches, 215 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 295 ImplicationChecksByTransitivity, 2.1s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=346782occurred in iteration=0, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 49.6s AutomataMinimizationTime, 34 MinimizatonAttempts, 538650 StatesRemovedByMinimization, 30 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.0s SsaConstructionTime, 0.2s SatisfiabilityAnalysisTime, 2.3s InterpolantComputationTime, 3625 NumberOfCodeBlocks, 3625 NumberOfCodeBlocksAsserted, 35 NumberOfCheckSat, 3465 ConstructedInterpolants, 0 QuantifiedInterpolants, 901049 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 34 InterpolantComputations, 34 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...