./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/systemc/transmitter.04_false-unreach-call_false-termination.cil.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version aa418289 Calling Ultimate with: java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/working_dir_66be738a-27c5-4025-916a-d9ed6fa1b836/bin-2019/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/working_dir_66be738a-27c5-4025-916a-d9ed6fa1b836/bin-2019/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/working_dir_66be738a-27c5-4025-916a-d9ed6fa1b836/bin-2019/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/working_dir_66be738a-27c5-4025-916a-d9ed6fa1b836/bin-2019/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/systemc/transmitter.04_false-unreach-call_false-termination.cil.c -s /tmp/vcloud-vcloud-master/worker/working_dir_66be738a-27c5-4025-916a-d9ed6fa1b836/bin-2019/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/working_dir_66be738a-27c5-4025-916a-d9ed6fa1b836/bin-2019/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash bcbeb24241e70d50816527d1472e428919d63db5 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Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.23-aa41828 [2018-11-23 10:02:22,914 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-11-23 10:02:22,916 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-11-23 10:02:22,924 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-11-23 10:02:22,924 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-11-23 10:02:22,925 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-11-23 10:02:22,926 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-11-23 10:02:22,927 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-11-23 10:02:22,928 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-11-23 10:02:22,929 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-11-23 10:02:22,930 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-11-23 10:02:22,930 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-11-23 10:02:22,931 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-11-23 10:02:22,931 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-11-23 10:02:22,932 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-11-23 10:02:22,932 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-11-23 10:02:22,933 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-11-23 10:02:22,935 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-11-23 10:02:22,936 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-11-23 10:02:22,937 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-11-23 10:02:22,938 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-11-23 10:02:22,939 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-11-23 10:02:22,940 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-11-23 10:02:22,940 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-11-23 10:02:22,940 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-11-23 10:02:22,941 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-11-23 10:02:22,942 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-11-23 10:02:22,943 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-11-23 10:02:22,943 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-11-23 10:02:22,944 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-11-23 10:02:22,944 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-11-23 10:02:22,945 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-11-23 10:02:22,945 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-11-23 10:02:22,945 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-11-23 10:02:22,946 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-11-23 10:02:22,946 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-11-23 10:02:22,946 INFO L98 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/working_dir_66be738a-27c5-4025-916a-d9ed6fa1b836/bin-2019/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2018-11-23 10:02:22,955 INFO L110 SettingsManager]: Loading preferences was successful [2018-11-23 10:02:22,955 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-11-23 10:02:22,956 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-11-23 10:02:22,956 INFO L133 SettingsManager]: * ... calls to implemented procedures=ONLY_FOR_CONCURRENT_PROGRAMS [2018-11-23 10:02:22,956 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-11-23 10:02:22,956 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-11-23 10:02:22,956 INFO L133 SettingsManager]: * Use SBE=true [2018-11-23 10:02:22,957 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-11-23 10:02:22,957 INFO L133 SettingsManager]: * sizeof long=4 [2018-11-23 10:02:22,957 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-11-23 10:02:22,957 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-11-23 10:02:22,957 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-11-23 10:02:22,957 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-11-23 10:02:22,957 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-11-23 10:02:22,957 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-11-23 10:02:22,958 INFO L133 SettingsManager]: * sizeof long double=12 [2018-11-23 10:02:22,958 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-11-23 10:02:22,958 INFO L133 SettingsManager]: * Use constant arrays=true [2018-11-23 10:02:22,958 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-11-23 10:02:22,958 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-11-23 10:02:22,958 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-11-23 10:02:22,958 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-11-23 10:02:22,958 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-11-23 10:02:22,959 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-23 10:02:22,959 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-11-23 10:02:22,959 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-11-23 10:02:22,959 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-11-23 10:02:22,959 INFO L133 SettingsManager]: * Trace refinement strategy=CAMEL [2018-11-23 10:02:22,959 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-11-23 10:02:22,959 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-11-23 10:02:22,959 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/working_dir_66be738a-27c5-4025-916a-d9ed6fa1b836/bin-2019/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> bcbeb24241e70d50816527d1472e428919d63db5 [2018-11-23 10:02:22,981 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-11-23 10:02:22,988 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-11-23 10:02:22,990 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-11-23 10:02:22,991 INFO L271 PluginConnector]: Initializing CDTParser... [2018-11-23 10:02:22,991 INFO L276 PluginConnector]: CDTParser initialized [2018-11-23 10:02:22,992 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/working_dir_66be738a-27c5-4025-916a-d9ed6fa1b836/bin-2019/uautomizer/../../sv-benchmarks/c/systemc/transmitter.04_false-unreach-call_false-termination.cil.c [2018-11-23 10:02:23,027 INFO L221 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_66be738a-27c5-4025-916a-d9ed6fa1b836/bin-2019/uautomizer/data/f2b172054/ff100f4fb1814a8b92fbf5f72ca6bc59/FLAG901cf5122 [2018-11-23 10:02:23,431 INFO L307 CDTParser]: Found 1 translation units. [2018-11-23 10:02:23,432 INFO L161 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/working_dir_66be738a-27c5-4025-916a-d9ed6fa1b836/sv-benchmarks/c/systemc/transmitter.04_false-unreach-call_false-termination.cil.c [2018-11-23 10:02:23,437 INFO L355 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_66be738a-27c5-4025-916a-d9ed6fa1b836/bin-2019/uautomizer/data/f2b172054/ff100f4fb1814a8b92fbf5f72ca6bc59/FLAG901cf5122 [2018-11-23 10:02:23,448 INFO L363 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/working_dir_66be738a-27c5-4025-916a-d9ed6fa1b836/bin-2019/uautomizer/data/f2b172054/ff100f4fb1814a8b92fbf5f72ca6bc59 [2018-11-23 10:02:23,451 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-11-23 10:02:23,452 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2018-11-23 10:02:23,452 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-11-23 10:02:23,453 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-11-23 10:02:23,455 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-11-23 10:02:23,456 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 23.11 10:02:23" (1/1) ... [2018-11-23 10:02:23,457 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@5f2d4aa1 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:02:23, skipping insertion in model container [2018-11-23 10:02:23,458 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 23.11 10:02:23" (1/1) ... [2018-11-23 10:02:23,464 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-11-23 10:02:23,489 INFO L176 MainTranslator]: Built tables and reachable declarations [2018-11-23 10:02:23,622 INFO L201 PostProcessor]: Analyzing one entry point: main [2018-11-23 10:02:23,625 INFO L191 MainTranslator]: Completed pre-run [2018-11-23 10:02:23,655 INFO L201 PostProcessor]: Analyzing one entry point: main [2018-11-23 10:02:23,665 INFO L195 MainTranslator]: Completed translation [2018-11-23 10:02:23,666 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:02:23 WrapperNode [2018-11-23 10:02:23,666 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-11-23 10:02:23,666 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2018-11-23 10:02:23,666 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2018-11-23 10:02:23,667 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2018-11-23 10:02:23,671 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:02:23" (1/1) ... [2018-11-23 10:02:23,713 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:02:23" (1/1) ... [2018-11-23 10:02:23,719 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2018-11-23 10:02:23,719 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-11-23 10:02:23,719 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-11-23 10:02:23,719 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-11-23 10:02:23,725 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:02:23" (1/1) ... [2018-11-23 10:02:23,725 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:02:23" (1/1) ... [2018-11-23 10:02:23,727 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:02:23" (1/1) ... [2018-11-23 10:02:23,728 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:02:23" (1/1) ... [2018-11-23 10:02:23,736 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:02:23" (1/1) ... [2018-11-23 10:02:23,746 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:02:23" (1/1) ... [2018-11-23 10:02:23,748 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:02:23" (1/1) ... [2018-11-23 10:02:23,751 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-11-23 10:02:23,752 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-11-23 10:02:23,752 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-11-23 10:02:23,752 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-11-23 10:02:23,752 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:02:23" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_66be738a-27c5-4025-916a-d9ed6fa1b836/bin-2019/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-23 10:02:23,797 INFO L130 BoogieDeclarations]: Found specification of procedure transmit1 [2018-11-23 10:02:23,798 INFO L138 BoogieDeclarations]: Found implementation of procedure transmit1 [2018-11-23 10:02:23,798 INFO L130 BoogieDeclarations]: Found specification of procedure transmit3 [2018-11-23 10:02:23,798 INFO L138 BoogieDeclarations]: Found implementation of procedure transmit3 [2018-11-23 10:02:23,798 INFO L130 BoogieDeclarations]: Found specification of procedure transmit2 [2018-11-23 10:02:23,798 INFO L138 BoogieDeclarations]: Found implementation of procedure transmit2 [2018-11-23 10:02:23,798 INFO L130 BoogieDeclarations]: Found specification of procedure transmit4 [2018-11-23 10:02:23,798 INFO L138 BoogieDeclarations]: Found implementation of procedure transmit4 [2018-11-23 10:02:23,799 INFO L130 BoogieDeclarations]: Found specification of procedure main [2018-11-23 10:02:23,799 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2018-11-23 10:02:23,799 INFO L130 BoogieDeclarations]: Found specification of procedure error [2018-11-23 10:02:23,799 INFO L138 BoogieDeclarations]: Found implementation of procedure error [2018-11-23 10:02:23,799 INFO L130 BoogieDeclarations]: Found specification of procedure stop_simulation [2018-11-23 10:02:23,800 INFO L138 BoogieDeclarations]: Found implementation of procedure stop_simulation [2018-11-23 10:02:23,800 INFO L130 BoogieDeclarations]: Found specification of procedure is_transmit2_triggered [2018-11-23 10:02:23,800 INFO L138 BoogieDeclarations]: Found implementation of procedure is_transmit2_triggered [2018-11-23 10:02:23,800 INFO L130 BoogieDeclarations]: Found specification of procedure fire_delta_events [2018-11-23 10:02:23,800 INFO L138 BoogieDeclarations]: Found implementation of procedure fire_delta_events [2018-11-23 10:02:23,800 INFO L130 BoogieDeclarations]: Found specification of procedure is_master_triggered [2018-11-23 10:02:23,800 INFO L138 BoogieDeclarations]: Found implementation of procedure is_master_triggered [2018-11-23 10:02:23,801 INFO L130 BoogieDeclarations]: Found specification of procedure reset_time_events [2018-11-23 10:02:23,801 INFO L138 BoogieDeclarations]: Found implementation of procedure reset_time_events [2018-11-23 10:02:23,801 INFO L130 BoogieDeclarations]: Found specification of procedure is_transmit4_triggered [2018-11-23 10:02:23,801 INFO L138 BoogieDeclarations]: Found implementation of procedure is_transmit4_triggered [2018-11-23 10:02:23,801 INFO L130 BoogieDeclarations]: Found specification of procedure activate_threads [2018-11-23 10:02:23,801 INFO L138 BoogieDeclarations]: Found implementation of procedure activate_threads [2018-11-23 10:02:23,801 INFO L130 BoogieDeclarations]: Found specification of procedure immediate_notify [2018-11-23 10:02:23,801 INFO L138 BoogieDeclarations]: Found implementation of procedure immediate_notify [2018-11-23 10:02:23,801 INFO L130 BoogieDeclarations]: Found specification of procedure exists_runnable_thread [2018-11-23 10:02:23,802 INFO L138 BoogieDeclarations]: Found implementation of procedure exists_runnable_thread [2018-11-23 10:02:23,802 INFO L130 BoogieDeclarations]: Found specification of procedure reset_delta_events [2018-11-23 10:02:23,802 INFO L138 BoogieDeclarations]: Found implementation of procedure reset_delta_events [2018-11-23 10:02:23,802 INFO L130 BoogieDeclarations]: Found specification of procedure is_transmit1_triggered [2018-11-23 10:02:23,802 INFO L138 BoogieDeclarations]: Found implementation of procedure is_transmit1_triggered [2018-11-23 10:02:23,802 INFO L130 BoogieDeclarations]: Found specification of procedure init_threads [2018-11-23 10:02:23,802 INFO L138 BoogieDeclarations]: Found implementation of procedure init_threads [2018-11-23 10:02:23,802 INFO L130 BoogieDeclarations]: Found specification of procedure master [2018-11-23 10:02:23,802 INFO L138 BoogieDeclarations]: Found implementation of procedure master [2018-11-23 10:02:23,802 INFO L130 BoogieDeclarations]: Found specification of procedure fire_time_events [2018-11-23 10:02:23,803 INFO L138 BoogieDeclarations]: Found implementation of procedure fire_time_events [2018-11-23 10:02:23,803 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-11-23 10:02:23,803 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-11-23 10:02:23,803 INFO L130 BoogieDeclarations]: Found specification of procedure eval [2018-11-23 10:02:23,803 INFO L138 BoogieDeclarations]: Found implementation of procedure eval [2018-11-23 10:02:23,803 INFO L130 BoogieDeclarations]: Found specification of procedure is_transmit3_triggered [2018-11-23 10:02:23,803 INFO L138 BoogieDeclarations]: Found implementation of procedure is_transmit3_triggered [2018-11-23 10:02:23,803 INFO L130 BoogieDeclarations]: Found specification of procedure start_simulation [2018-11-23 10:02:23,803 INFO L138 BoogieDeclarations]: Found implementation of procedure start_simulation [2018-11-23 10:02:23,803 INFO L130 BoogieDeclarations]: Found specification of procedure update_channels [2018-11-23 10:02:23,803 INFO L138 BoogieDeclarations]: Found implementation of procedure update_channels [2018-11-23 10:02:23,804 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-11-23 10:02:23,804 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-11-23 10:02:23,804 INFO L130 BoogieDeclarations]: Found specification of procedure init_model [2018-11-23 10:02:23,804 INFO L138 BoogieDeclarations]: Found implementation of procedure init_model [2018-11-23 10:02:24,241 INFO L275 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-11-23 10:02:24,241 INFO L280 CfgBuilder]: Removed 8 assue(true) statements. [2018-11-23 10:02:24,242 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 23.11 10:02:24 BoogieIcfgContainer [2018-11-23 10:02:24,242 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-11-23 10:02:24,242 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-11-23 10:02:24,243 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-11-23 10:02:24,245 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-11-23 10:02:24,245 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 23.11 10:02:23" (1/3) ... [2018-11-23 10:02:24,246 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@affbf9b and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 23.11 10:02:24, skipping insertion in model container [2018-11-23 10:02:24,246 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 10:02:23" (2/3) ... [2018-11-23 10:02:24,247 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@affbf9b and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 23.11 10:02:24, skipping insertion in model container [2018-11-23 10:02:24,247 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 23.11 10:02:24" (3/3) ... [2018-11-23 10:02:24,248 INFO L112 eAbstractionObserver]: Analyzing ICFG transmitter.04_false-unreach-call_false-termination.cil.c [2018-11-23 10:02:24,256 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-11-23 10:02:24,263 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 1 error locations. [2018-11-23 10:02:24,274 INFO L257 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2018-11-23 10:02:24,295 INFO L133 ementStrategyFactory]: Using default assertion order modulation [2018-11-23 10:02:24,296 INFO L382 AbstractCegarLoop]: Interprodecural is true [2018-11-23 10:02:24,296 INFO L383 AbstractCegarLoop]: Hoare is true [2018-11-23 10:02:24,296 INFO L384 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-11-23 10:02:24,296 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-11-23 10:02:24,296 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-11-23 10:02:24,296 INFO L387 AbstractCegarLoop]: Difference is false [2018-11-23 10:02:24,296 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-11-23 10:02:24,296 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-11-23 10:02:24,313 INFO L276 IsEmpty]: Start isEmpty. Operand 229 states. [2018-11-23 10:02:24,321 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 121 [2018-11-23 10:02:24,322 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:02:24,323 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:02:24,324 INFO L423 AbstractCegarLoop]: === Iteration 1 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:02:24,328 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:02:24,328 INFO L82 PathProgramCache]: Analyzing trace with hash -2019614736, now seen corresponding path program 1 times [2018-11-23 10:02:24,329 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 10:02:24,330 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 10:02:24,358 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 10:02:24,358 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 10:02:24,359 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 10:02:24,427 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:02:24,559 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 10:02:24,560 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 10:02:24,561 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-23 10:02:24,564 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-23 10:02:24,571 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-23 10:02:24,571 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-23 10:02:24,573 INFO L87 Difference]: Start difference. First operand 229 states. Second operand 5 states. [2018-11-23 10:02:25,036 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:02:25,036 INFO L93 Difference]: Finished difference Result 475 states and 713 transitions. [2018-11-23 10:02:25,037 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-23 10:02:25,037 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 120 [2018-11-23 10:02:25,038 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 10:02:25,048 INFO L225 Difference]: With dead ends: 475 [2018-11-23 10:02:25,048 INFO L226 Difference]: Without dead ends: 256 [2018-11-23 10:02:25,052 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-11-23 10:02:25,064 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 256 states. [2018-11-23 10:02:25,097 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 256 to 220. [2018-11-23 10:02:25,098 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 220 states. [2018-11-23 10:02:25,100 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 220 states to 220 states and 304 transitions. [2018-11-23 10:02:25,102 INFO L78 Accepts]: Start accepts. Automaton has 220 states and 304 transitions. Word has length 120 [2018-11-23 10:02:25,102 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 10:02:25,102 INFO L480 AbstractCegarLoop]: Abstraction has 220 states and 304 transitions. [2018-11-23 10:02:25,102 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-23 10:02:25,103 INFO L276 IsEmpty]: Start isEmpty. Operand 220 states and 304 transitions. [2018-11-23 10:02:25,105 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 121 [2018-11-23 10:02:25,106 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:02:25,106 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:02:25,106 INFO L423 AbstractCegarLoop]: === Iteration 2 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:02:25,106 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:02:25,106 INFO L82 PathProgramCache]: Analyzing trace with hash 1218621358, now seen corresponding path program 1 times [2018-11-23 10:02:25,107 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 10:02:25,107 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 10:02:25,108 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 10:02:25,108 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 10:02:25,108 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 10:02:25,128 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:02:25,209 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 10:02:25,209 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 10:02:25,209 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-23 10:02:25,211 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-23 10:02:25,211 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-23 10:02:25,211 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-23 10:02:25,211 INFO L87 Difference]: Start difference. First operand 220 states and 304 transitions. Second operand 5 states. [2018-11-23 10:02:25,522 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:02:25,522 INFO L93 Difference]: Finished difference Result 454 states and 646 transitions. [2018-11-23 10:02:25,522 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-23 10:02:25,523 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 120 [2018-11-23 10:02:25,523 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 10:02:25,525 INFO L225 Difference]: With dead ends: 454 [2018-11-23 10:02:25,525 INFO L226 Difference]: Without dead ends: 256 [2018-11-23 10:02:25,527 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-11-23 10:02:25,527 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 256 states. [2018-11-23 10:02:25,545 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 256 to 220. [2018-11-23 10:02:25,545 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 220 states. [2018-11-23 10:02:25,547 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 220 states to 220 states and 303 transitions. [2018-11-23 10:02:25,547 INFO L78 Accepts]: Start accepts. Automaton has 220 states and 303 transitions. Word has length 120 [2018-11-23 10:02:25,547 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 10:02:25,547 INFO L480 AbstractCegarLoop]: Abstraction has 220 states and 303 transitions. [2018-11-23 10:02:25,547 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-23 10:02:25,548 INFO L276 IsEmpty]: Start isEmpty. Operand 220 states and 303 transitions. [2018-11-23 10:02:25,549 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 121 [2018-11-23 10:02:25,549 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:02:25,550 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:02:25,550 INFO L423 AbstractCegarLoop]: === Iteration 3 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:02:25,550 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:02:25,550 INFO L82 PathProgramCache]: Analyzing trace with hash -1724960720, now seen corresponding path program 1 times [2018-11-23 10:02:25,551 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 10:02:25,551 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 10:02:25,552 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 10:02:25,552 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 10:02:25,552 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 10:02:25,566 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:02:25,643 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 10:02:25,643 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 10:02:25,643 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-23 10:02:25,644 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-23 10:02:25,644 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-23 10:02:25,644 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-23 10:02:25,644 INFO L87 Difference]: Start difference. First operand 220 states and 303 transitions. Second operand 5 states. [2018-11-23 10:02:25,970 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:02:25,970 INFO L93 Difference]: Finished difference Result 452 states and 640 transitions. [2018-11-23 10:02:25,971 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-23 10:02:25,971 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 120 [2018-11-23 10:02:25,974 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 10:02:25,975 INFO L225 Difference]: With dead ends: 452 [2018-11-23 10:02:25,975 INFO L226 Difference]: Without dead ends: 254 [2018-11-23 10:02:25,976 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-11-23 10:02:25,976 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 254 states. [2018-11-23 10:02:25,990 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 254 to 220. [2018-11-23 10:02:25,990 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 220 states. [2018-11-23 10:02:25,991 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 220 states to 220 states and 302 transitions. [2018-11-23 10:02:25,991 INFO L78 Accepts]: Start accepts. Automaton has 220 states and 302 transitions. Word has length 120 [2018-11-23 10:02:25,991 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 10:02:25,991 INFO L480 AbstractCegarLoop]: Abstraction has 220 states and 302 transitions. [2018-11-23 10:02:25,992 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-23 10:02:25,992 INFO L276 IsEmpty]: Start isEmpty. Operand 220 states and 302 transitions. [2018-11-23 10:02:25,993 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 121 [2018-11-23 10:02:25,993 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:02:25,993 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:02:25,994 INFO L423 AbstractCegarLoop]: === Iteration 4 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:02:25,994 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:02:25,994 INFO L82 PathProgramCache]: Analyzing trace with hash 951031662, now seen corresponding path program 1 times [2018-11-23 10:02:25,994 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 10:02:25,994 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 10:02:25,995 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 10:02:25,995 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 10:02:25,995 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 10:02:26,005 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:02:26,063 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 10:02:26,064 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 10:02:26,064 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-23 10:02:26,064 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-23 10:02:26,064 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-23 10:02:26,064 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-23 10:02:26,065 INFO L87 Difference]: Start difference. First operand 220 states and 302 transitions. Second operand 5 states. [2018-11-23 10:02:26,321 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:02:26,321 INFO L93 Difference]: Finished difference Result 450 states and 634 transitions. [2018-11-23 10:02:26,321 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-23 10:02:26,321 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 120 [2018-11-23 10:02:26,322 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 10:02:26,322 INFO L225 Difference]: With dead ends: 450 [2018-11-23 10:02:26,323 INFO L226 Difference]: Without dead ends: 252 [2018-11-23 10:02:26,323 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-11-23 10:02:26,323 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 252 states. [2018-11-23 10:02:26,336 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 252 to 220. [2018-11-23 10:02:26,337 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 220 states. [2018-11-23 10:02:26,337 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 220 states to 220 states and 301 transitions. [2018-11-23 10:02:26,338 INFO L78 Accepts]: Start accepts. Automaton has 220 states and 301 transitions. Word has length 120 [2018-11-23 10:02:26,338 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 10:02:26,338 INFO L480 AbstractCegarLoop]: Abstraction has 220 states and 301 transitions. [2018-11-23 10:02:26,338 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-23 10:02:26,338 INFO L276 IsEmpty]: Start isEmpty. Operand 220 states and 301 transitions. [2018-11-23 10:02:26,339 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 121 [2018-11-23 10:02:26,339 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:02:26,339 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:02:26,339 INFO L423 AbstractCegarLoop]: === Iteration 5 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:02:26,339 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:02:26,340 INFO L82 PathProgramCache]: Analyzing trace with hash 67522672, now seen corresponding path program 1 times [2018-11-23 10:02:26,340 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 10:02:26,340 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 10:02:26,340 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 10:02:26,340 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 10:02:26,341 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 10:02:26,347 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:02:26,391 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 10:02:26,391 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 10:02:26,391 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-23 10:02:26,391 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-23 10:02:26,392 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-23 10:02:26,392 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-23 10:02:26,392 INFO L87 Difference]: Start difference. First operand 220 states and 301 transitions. Second operand 5 states. [2018-11-23 10:02:26,644 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:02:26,644 INFO L93 Difference]: Finished difference Result 471 states and 668 transitions. [2018-11-23 10:02:26,644 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-23 10:02:26,644 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 120 [2018-11-23 10:02:26,645 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 10:02:26,646 INFO L225 Difference]: With dead ends: 471 [2018-11-23 10:02:26,646 INFO L226 Difference]: Without dead ends: 273 [2018-11-23 10:02:26,647 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-11-23 10:02:26,647 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 273 states. [2018-11-23 10:02:26,662 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 273 to 220. [2018-11-23 10:02:26,663 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 220 states. [2018-11-23 10:02:26,664 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 220 states to 220 states and 300 transitions. [2018-11-23 10:02:26,664 INFO L78 Accepts]: Start accepts. Automaton has 220 states and 300 transitions. Word has length 120 [2018-11-23 10:02:26,664 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 10:02:26,664 INFO L480 AbstractCegarLoop]: Abstraction has 220 states and 300 transitions. [2018-11-23 10:02:26,664 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-23 10:02:26,665 INFO L276 IsEmpty]: Start isEmpty. Operand 220 states and 300 transitions. [2018-11-23 10:02:26,666 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 121 [2018-11-23 10:02:26,666 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:02:26,666 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:02:26,666 INFO L423 AbstractCegarLoop]: === Iteration 6 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:02:26,667 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:02:26,667 INFO L82 PathProgramCache]: Analyzing trace with hash -1873059342, now seen corresponding path program 1 times [2018-11-23 10:02:26,667 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 10:02:26,667 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 10:02:26,668 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 10:02:26,668 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 10:02:26,668 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 10:02:26,677 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:02:26,736 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 10:02:26,736 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 10:02:26,736 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-23 10:02:26,736 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-23 10:02:26,737 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-23 10:02:26,737 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-23 10:02:26,737 INFO L87 Difference]: Start difference. First operand 220 states and 300 transitions. Second operand 5 states. [2018-11-23 10:02:27,022 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:02:27,022 INFO L93 Difference]: Finished difference Result 469 states and 662 transitions. [2018-11-23 10:02:27,023 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-23 10:02:27,023 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 120 [2018-11-23 10:02:27,023 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 10:02:27,025 INFO L225 Difference]: With dead ends: 469 [2018-11-23 10:02:27,025 INFO L226 Difference]: Without dead ends: 271 [2018-11-23 10:02:27,025 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-11-23 10:02:27,026 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 271 states. [2018-11-23 10:02:27,041 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 271 to 220. [2018-11-23 10:02:27,041 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 220 states. [2018-11-23 10:02:27,043 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 220 states to 220 states and 299 transitions. [2018-11-23 10:02:27,043 INFO L78 Accepts]: Start accepts. Automaton has 220 states and 299 transitions. Word has length 120 [2018-11-23 10:02:27,043 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 10:02:27,043 INFO L480 AbstractCegarLoop]: Abstraction has 220 states and 299 transitions. [2018-11-23 10:02:27,043 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-23 10:02:27,043 INFO L276 IsEmpty]: Start isEmpty. Operand 220 states and 299 transitions. [2018-11-23 10:02:27,044 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 121 [2018-11-23 10:02:27,044 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:02:27,044 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:02:27,044 INFO L423 AbstractCegarLoop]: === Iteration 7 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:02:27,045 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:02:27,045 INFO L82 PathProgramCache]: Analyzing trace with hash 4003888, now seen corresponding path program 1 times [2018-11-23 10:02:27,045 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 10:02:27,045 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 10:02:27,045 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 10:02:27,046 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 10:02:27,046 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 10:02:27,053 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:02:27,093 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 10:02:27,093 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 10:02:27,094 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-23 10:02:27,094 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-23 10:02:27,094 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-23 10:02:27,094 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-23 10:02:27,094 INFO L87 Difference]: Start difference. First operand 220 states and 299 transitions. Second operand 5 states. [2018-11-23 10:02:27,359 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:02:27,359 INFO L93 Difference]: Finished difference Result 467 states and 656 transitions. [2018-11-23 10:02:27,359 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-23 10:02:27,359 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 120 [2018-11-23 10:02:27,359 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 10:02:27,360 INFO L225 Difference]: With dead ends: 467 [2018-11-23 10:02:27,360 INFO L226 Difference]: Without dead ends: 269 [2018-11-23 10:02:27,361 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-11-23 10:02:27,361 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 269 states. [2018-11-23 10:02:27,373 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 269 to 220. [2018-11-23 10:02:27,373 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 220 states. [2018-11-23 10:02:27,374 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 220 states to 220 states and 298 transitions. [2018-11-23 10:02:27,374 INFO L78 Accepts]: Start accepts. Automaton has 220 states and 298 transitions. Word has length 120 [2018-11-23 10:02:27,374 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 10:02:27,374 INFO L480 AbstractCegarLoop]: Abstraction has 220 states and 298 transitions. [2018-11-23 10:02:27,374 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-23 10:02:27,374 INFO L276 IsEmpty]: Start isEmpty. Operand 220 states and 298 transitions. [2018-11-23 10:02:27,375 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 121 [2018-11-23 10:02:27,375 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:02:27,376 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:02:27,376 INFO L423 AbstractCegarLoop]: === Iteration 8 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:02:27,376 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:02:27,376 INFO L82 PathProgramCache]: Analyzing trace with hash -766729678, now seen corresponding path program 1 times [2018-11-23 10:02:27,376 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 10:02:27,376 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 10:02:27,377 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 10:02:27,377 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 10:02:27,377 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 10:02:27,383 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:02:27,415 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 10:02:27,415 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 10:02:27,415 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-23 10:02:27,416 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-23 10:02:27,416 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-23 10:02:27,416 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-23 10:02:27,416 INFO L87 Difference]: Start difference. First operand 220 states and 298 transitions. Second operand 5 states. [2018-11-23 10:02:27,648 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:02:27,649 INFO L93 Difference]: Finished difference Result 465 states and 650 transitions. [2018-11-23 10:02:27,649 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-23 10:02:27,649 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 120 [2018-11-23 10:02:27,649 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 10:02:27,651 INFO L225 Difference]: With dead ends: 465 [2018-11-23 10:02:27,651 INFO L226 Difference]: Without dead ends: 267 [2018-11-23 10:02:27,651 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-11-23 10:02:27,652 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 267 states. [2018-11-23 10:02:27,663 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 267 to 220. [2018-11-23 10:02:27,664 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 220 states. [2018-11-23 10:02:27,665 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 220 states to 220 states and 297 transitions. [2018-11-23 10:02:27,665 INFO L78 Accepts]: Start accepts. Automaton has 220 states and 297 transitions. Word has length 120 [2018-11-23 10:02:27,665 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 10:02:27,665 INFO L480 AbstractCegarLoop]: Abstraction has 220 states and 297 transitions. [2018-11-23 10:02:27,665 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-23 10:02:27,665 INFO L276 IsEmpty]: Start isEmpty. Operand 220 states and 297 transitions. [2018-11-23 10:02:27,666 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 121 [2018-11-23 10:02:27,666 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:02:27,667 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:02:27,667 INFO L423 AbstractCegarLoop]: === Iteration 9 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:02:27,667 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:02:27,667 INFO L82 PathProgramCache]: Analyzing trace with hash -1761423376, now seen corresponding path program 1 times [2018-11-23 10:02:27,667 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 10:02:27,667 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 10:02:27,668 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 10:02:27,668 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 10:02:27,668 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 10:02:27,675 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:02:27,710 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 10:02:27,710 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 10:02:27,710 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-23 10:02:27,711 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-23 10:02:27,711 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-23 10:02:27,711 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-11-23 10:02:27,711 INFO L87 Difference]: Start difference. First operand 220 states and 297 transitions. Second operand 6 states. [2018-11-23 10:02:27,738 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:02:27,738 INFO L93 Difference]: Finished difference Result 436 states and 607 transitions. [2018-11-23 10:02:27,739 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-11-23 10:02:27,739 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 120 [2018-11-23 10:02:27,739 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 10:02:27,741 INFO L225 Difference]: With dead ends: 436 [2018-11-23 10:02:27,742 INFO L226 Difference]: Without dead ends: 239 [2018-11-23 10:02:27,742 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-11-23 10:02:27,743 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 239 states. [2018-11-23 10:02:27,756 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 239 to 225. [2018-11-23 10:02:27,756 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 225 states. [2018-11-23 10:02:27,757 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 225 states to 225 states and 302 transitions. [2018-11-23 10:02:27,758 INFO L78 Accepts]: Start accepts. Automaton has 225 states and 302 transitions. Word has length 120 [2018-11-23 10:02:27,758 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 10:02:27,758 INFO L480 AbstractCegarLoop]: Abstraction has 225 states and 302 transitions. [2018-11-23 10:02:27,758 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-23 10:02:27,758 INFO L276 IsEmpty]: Start isEmpty. Operand 225 states and 302 transitions. [2018-11-23 10:02:27,759 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 121 [2018-11-23 10:02:27,759 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:02:27,759 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:02:27,760 INFO L423 AbstractCegarLoop]: === Iteration 10 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:02:27,760 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:02:27,760 INFO L82 PathProgramCache]: Analyzing trace with hash -27318926, now seen corresponding path program 1 times [2018-11-23 10:02:27,760 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 10:02:27,760 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 10:02:27,761 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 10:02:27,761 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 10:02:27,761 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 10:02:27,768 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:02:27,821 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 10:02:27,821 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 10:02:27,821 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-23 10:02:27,821 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-23 10:02:27,822 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-23 10:02:27,822 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-23 10:02:27,822 INFO L87 Difference]: Start difference. First operand 225 states and 302 transitions. Second operand 4 states. [2018-11-23 10:02:27,977 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:02:27,977 INFO L93 Difference]: Finished difference Result 622 states and 862 transitions. [2018-11-23 10:02:27,978 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-23 10:02:27,978 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 120 [2018-11-23 10:02:27,978 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 10:02:27,980 INFO L225 Difference]: With dead ends: 622 [2018-11-23 10:02:27,980 INFO L226 Difference]: Without dead ends: 420 [2018-11-23 10:02:27,981 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-23 10:02:27,981 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 420 states. [2018-11-23 10:02:28,021 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 420 to 415. [2018-11-23 10:02:28,021 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 415 states. [2018-11-23 10:02:28,023 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 415 states to 415 states and 556 transitions. [2018-11-23 10:02:28,023 INFO L78 Accepts]: Start accepts. Automaton has 415 states and 556 transitions. Word has length 120 [2018-11-23 10:02:28,023 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 10:02:28,023 INFO L480 AbstractCegarLoop]: Abstraction has 415 states and 556 transitions. [2018-11-23 10:02:28,023 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-23 10:02:28,023 INFO L276 IsEmpty]: Start isEmpty. Operand 415 states and 556 transitions. [2018-11-23 10:02:28,024 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 121 [2018-11-23 10:02:28,024 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:02:28,024 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:02:28,025 INFO L423 AbstractCegarLoop]: === Iteration 11 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:02:28,025 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:02:28,025 INFO L82 PathProgramCache]: Analyzing trace with hash -512734447, now seen corresponding path program 1 times [2018-11-23 10:02:28,025 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 10:02:28,025 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 10:02:28,026 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 10:02:28,026 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 10:02:28,026 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 10:02:28,032 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:02:28,070 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 10:02:28,070 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 10:02:28,070 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-23 10:02:28,070 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-23 10:02:28,070 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-23 10:02:28,070 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-11-23 10:02:28,070 INFO L87 Difference]: Start difference. First operand 415 states and 556 transitions. Second operand 6 states. [2018-11-23 10:02:28,108 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:02:28,108 INFO L93 Difference]: Finished difference Result 823 states and 1130 transitions. [2018-11-23 10:02:28,109 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-11-23 10:02:28,109 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 120 [2018-11-23 10:02:28,109 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 10:02:28,111 INFO L225 Difference]: With dead ends: 823 [2018-11-23 10:02:28,111 INFO L226 Difference]: Without dead ends: 431 [2018-11-23 10:02:28,112 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-11-23 10:02:28,112 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 431 states. [2018-11-23 10:02:28,135 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 431 to 420. [2018-11-23 10:02:28,135 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 420 states. [2018-11-23 10:02:28,136 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 420 states to 420 states and 560 transitions. [2018-11-23 10:02:28,136 INFO L78 Accepts]: Start accepts. Automaton has 420 states and 560 transitions. Word has length 120 [2018-11-23 10:02:28,136 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 10:02:28,136 INFO L480 AbstractCegarLoop]: Abstraction has 420 states and 560 transitions. [2018-11-23 10:02:28,136 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-23 10:02:28,137 INFO L276 IsEmpty]: Start isEmpty. Operand 420 states and 560 transitions. [2018-11-23 10:02:28,137 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 121 [2018-11-23 10:02:28,137 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:02:28,138 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:02:28,138 INFO L423 AbstractCegarLoop]: === Iteration 12 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:02:28,138 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:02:28,138 INFO L82 PathProgramCache]: Analyzing trace with hash -1244701873, now seen corresponding path program 1 times [2018-11-23 10:02:28,138 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 10:02:28,138 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 10:02:28,139 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 10:02:28,139 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 10:02:28,139 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 10:02:28,145 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:02:28,188 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 10:02:28,188 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 10:02:28,188 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-23 10:02:28,189 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-23 10:02:28,189 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-23 10:02:28,189 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-23 10:02:28,189 INFO L87 Difference]: Start difference. First operand 420 states and 560 transitions. Second operand 4 states. [2018-11-23 10:02:28,331 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:02:28,331 INFO L93 Difference]: Finished difference Result 1201 states and 1654 transitions. [2018-11-23 10:02:28,332 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-23 10:02:28,332 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 120 [2018-11-23 10:02:28,332 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 10:02:28,335 INFO L225 Difference]: With dead ends: 1201 [2018-11-23 10:02:28,335 INFO L226 Difference]: Without dead ends: 804 [2018-11-23 10:02:28,336 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-23 10:02:28,337 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 804 states. [2018-11-23 10:02:28,374 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 804 to 797. [2018-11-23 10:02:28,374 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 797 states. [2018-11-23 10:02:28,376 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 797 states to 797 states and 1060 transitions. [2018-11-23 10:02:28,376 INFO L78 Accepts]: Start accepts. Automaton has 797 states and 1060 transitions. Word has length 120 [2018-11-23 10:02:28,376 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 10:02:28,376 INFO L480 AbstractCegarLoop]: Abstraction has 797 states and 1060 transitions. [2018-11-23 10:02:28,376 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-23 10:02:28,377 INFO L276 IsEmpty]: Start isEmpty. Operand 797 states and 1060 transitions. [2018-11-23 10:02:28,377 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 121 [2018-11-23 10:02:28,378 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:02:28,378 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:02:28,378 INFO L423 AbstractCegarLoop]: === Iteration 13 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:02:28,378 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:02:28,378 INFO L82 PathProgramCache]: Analyzing trace with hash -667773232, now seen corresponding path program 1 times [2018-11-23 10:02:28,378 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 10:02:28,378 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 10:02:28,379 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 10:02:28,379 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 10:02:28,379 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 10:02:28,386 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:02:28,412 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 10:02:28,412 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 10:02:28,413 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-23 10:02:28,413 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-23 10:02:28,413 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-23 10:02:28,413 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-11-23 10:02:28,414 INFO L87 Difference]: Start difference. First operand 797 states and 1060 transitions. Second operand 6 states. [2018-11-23 10:02:28,474 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:02:28,474 INFO L93 Difference]: Finished difference Result 1597 states and 2175 transitions. [2018-11-23 10:02:28,475 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-11-23 10:02:28,475 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 120 [2018-11-23 10:02:28,475 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 10:02:28,477 INFO L225 Difference]: With dead ends: 1597 [2018-11-23 10:02:28,477 INFO L226 Difference]: Without dead ends: 823 [2018-11-23 10:02:28,479 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-11-23 10:02:28,480 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 823 states. [2018-11-23 10:02:28,516 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 823 to 807. [2018-11-23 10:02:28,516 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 807 states. [2018-11-23 10:02:28,518 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 807 states to 807 states and 1068 transitions. [2018-11-23 10:02:28,518 INFO L78 Accepts]: Start accepts. Automaton has 807 states and 1068 transitions. Word has length 120 [2018-11-23 10:02:28,519 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 10:02:28,519 INFO L480 AbstractCegarLoop]: Abstraction has 807 states and 1068 transitions. [2018-11-23 10:02:28,519 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-23 10:02:28,519 INFO L276 IsEmpty]: Start isEmpty. Operand 807 states and 1068 transitions. [2018-11-23 10:02:28,520 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 121 [2018-11-23 10:02:28,520 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:02:28,520 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:02:28,520 INFO L423 AbstractCegarLoop]: === Iteration 14 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:02:28,520 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:02:28,520 INFO L82 PathProgramCache]: Analyzing trace with hash 593144018, now seen corresponding path program 1 times [2018-11-23 10:02:28,520 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 10:02:28,520 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 10:02:28,521 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 10:02:28,521 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 10:02:28,521 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 10:02:28,527 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:02:28,568 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 10:02:28,568 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 10:02:28,568 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-23 10:02:28,568 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-23 10:02:28,568 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-23 10:02:28,569 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-11-23 10:02:28,569 INFO L87 Difference]: Start difference. First operand 807 states and 1068 transitions. Second operand 6 states. [2018-11-23 10:02:28,618 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:02:28,619 INFO L93 Difference]: Finished difference Result 1631 states and 2212 transitions. [2018-11-23 10:02:28,619 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-11-23 10:02:28,619 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 120 [2018-11-23 10:02:28,619 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 10:02:28,622 INFO L225 Difference]: With dead ends: 1631 [2018-11-23 10:02:28,622 INFO L226 Difference]: Without dead ends: 847 [2018-11-23 10:02:28,623 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-11-23 10:02:28,624 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 847 states. [2018-11-23 10:02:28,661 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 847 to 827. [2018-11-23 10:02:28,661 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 827 states. [2018-11-23 10:02:28,663 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 827 states to 827 states and 1088 transitions. [2018-11-23 10:02:28,663 INFO L78 Accepts]: Start accepts. Automaton has 827 states and 1088 transitions. Word has length 120 [2018-11-23 10:02:28,663 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 10:02:28,663 INFO L480 AbstractCegarLoop]: Abstraction has 827 states and 1088 transitions. [2018-11-23 10:02:28,664 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-23 10:02:28,664 INFO L276 IsEmpty]: Start isEmpty. Operand 827 states and 1088 transitions. [2018-11-23 10:02:28,664 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 121 [2018-11-23 10:02:28,665 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:02:28,665 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:02:28,665 INFO L423 AbstractCegarLoop]: === Iteration 15 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:02:28,665 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:02:28,665 INFO L82 PathProgramCache]: Analyzing trace with hash -1762661232, now seen corresponding path program 1 times [2018-11-23 10:02:28,665 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 10:02:28,665 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 10:02:28,666 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 10:02:28,666 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 10:02:28,666 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 10:02:28,673 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:02:28,703 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 10:02:28,704 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 10:02:28,704 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-23 10:02:28,704 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-23 10:02:28,704 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-23 10:02:28,704 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-23 10:02:28,704 INFO L87 Difference]: Start difference. First operand 827 states and 1088 transitions. Second operand 4 states. [2018-11-23 10:02:28,897 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:02:28,897 INFO L93 Difference]: Finished difference Result 2411 states and 3286 transitions. [2018-11-23 10:02:28,898 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-23 10:02:28,898 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 120 [2018-11-23 10:02:28,898 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 10:02:28,902 INFO L225 Difference]: With dead ends: 2411 [2018-11-23 10:02:28,902 INFO L226 Difference]: Without dead ends: 1607 [2018-11-23 10:02:28,904 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-23 10:02:28,905 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1607 states. [2018-11-23 10:02:28,973 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1607 to 1598. [2018-11-23 10:02:28,974 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1598 states. [2018-11-23 10:02:28,977 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1598 states to 1598 states and 2097 transitions. [2018-11-23 10:02:28,978 INFO L78 Accepts]: Start accepts. Automaton has 1598 states and 2097 transitions. Word has length 120 [2018-11-23 10:02:28,978 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 10:02:28,978 INFO L480 AbstractCegarLoop]: Abstraction has 1598 states and 2097 transitions. [2018-11-23 10:02:28,978 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-23 10:02:28,978 INFO L276 IsEmpty]: Start isEmpty. Operand 1598 states and 2097 transitions. [2018-11-23 10:02:28,980 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 142 [2018-11-23 10:02:28,980 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:02:28,980 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:02:28,980 INFO L423 AbstractCegarLoop]: === Iteration 16 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:02:28,981 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:02:28,981 INFO L82 PathProgramCache]: Analyzing trace with hash 1599710920, now seen corresponding path program 1 times [2018-11-23 10:02:28,981 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 10:02:28,981 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 10:02:28,981 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 10:02:28,981 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 10:02:28,982 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 10:02:28,988 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:02:29,017 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 1 proven. 0 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2018-11-23 10:02:29,018 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 10:02:29,018 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-23 10:02:29,018 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-23 10:02:29,018 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-23 10:02:29,018 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-11-23 10:02:29,018 INFO L87 Difference]: Start difference. First operand 1598 states and 2097 transitions. Second operand 6 states. [2018-11-23 10:02:29,116 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:02:29,117 INFO L93 Difference]: Finished difference Result 3201 states and 4303 transitions. [2018-11-23 10:02:29,118 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-11-23 10:02:29,119 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 141 [2018-11-23 10:02:29,119 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 10:02:29,123 INFO L225 Difference]: With dead ends: 3201 [2018-11-23 10:02:29,123 INFO L226 Difference]: Without dead ends: 1626 [2018-11-23 10:02:29,126 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-11-23 10:02:29,127 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1626 states. [2018-11-23 10:02:29,196 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1626 to 1618. [2018-11-23 10:02:29,196 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1618 states. [2018-11-23 10:02:29,201 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1618 states to 1618 states and 2113 transitions. [2018-11-23 10:02:29,201 INFO L78 Accepts]: Start accepts. Automaton has 1618 states and 2113 transitions. Word has length 141 [2018-11-23 10:02:29,201 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 10:02:29,202 INFO L480 AbstractCegarLoop]: Abstraction has 1618 states and 2113 transitions. [2018-11-23 10:02:29,202 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-23 10:02:29,202 INFO L276 IsEmpty]: Start isEmpty. Operand 1618 states and 2113 transitions. [2018-11-23 10:02:29,204 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 142 [2018-11-23 10:02:29,204 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:02:29,204 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:02:29,204 INFO L423 AbstractCegarLoop]: === Iteration 17 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:02:29,204 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:02:29,204 INFO L82 PathProgramCache]: Analyzing trace with hash 1801534854, now seen corresponding path program 1 times [2018-11-23 10:02:29,204 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 10:02:29,204 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 10:02:29,205 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 10:02:29,205 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 10:02:29,205 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 10:02:29,212 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:02:29,264 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 1 proven. 0 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2018-11-23 10:02:29,264 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 10:02:29,265 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-23 10:02:29,265 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-23 10:02:29,265 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-23 10:02:29,265 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-23 10:02:29,265 INFO L87 Difference]: Start difference. First operand 1618 states and 2113 transitions. Second operand 5 states. [2018-11-23 10:02:29,549 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:02:29,549 INFO L93 Difference]: Finished difference Result 3212 states and 4210 transitions. [2018-11-23 10:02:29,550 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-23 10:02:29,550 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 141 [2018-11-23 10:02:29,550 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 10:02:29,555 INFO L225 Difference]: With dead ends: 3212 [2018-11-23 10:02:29,555 INFO L226 Difference]: Without dead ends: 1618 [2018-11-23 10:02:29,558 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 4 SyntacticMatches, 3 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-11-23 10:02:29,559 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1618 states. [2018-11-23 10:02:29,644 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1618 to 1618. [2018-11-23 10:02:29,644 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1618 states. [2018-11-23 10:02:29,648 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1618 states to 1618 states and 2097 transitions. [2018-11-23 10:02:29,648 INFO L78 Accepts]: Start accepts. Automaton has 1618 states and 2097 transitions. Word has length 141 [2018-11-23 10:02:29,649 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 10:02:29,649 INFO L480 AbstractCegarLoop]: Abstraction has 1618 states and 2097 transitions. [2018-11-23 10:02:29,649 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-23 10:02:29,649 INFO L276 IsEmpty]: Start isEmpty. Operand 1618 states and 2097 transitions. [2018-11-23 10:02:29,651 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 142 [2018-11-23 10:02:29,651 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:02:29,651 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:02:29,651 INFO L423 AbstractCegarLoop]: === Iteration 18 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:02:29,651 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:02:29,651 INFO L82 PathProgramCache]: Analyzing trace with hash -1106647032, now seen corresponding path program 1 times [2018-11-23 10:02:29,651 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 10:02:29,652 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 10:02:29,652 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 10:02:29,652 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 10:02:29,652 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 10:02:29,660 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:02:29,743 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 1 proven. 0 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2018-11-23 10:02:29,743 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 10:02:29,743 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-23 10:02:29,743 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-23 10:02:29,743 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-23 10:02:29,744 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-23 10:02:29,744 INFO L87 Difference]: Start difference. First operand 1618 states and 2097 transitions. Second operand 5 states. [2018-11-23 10:02:30,030 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:02:30,030 INFO L93 Difference]: Finished difference Result 3212 states and 4178 transitions. [2018-11-23 10:02:30,031 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-23 10:02:30,031 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 141 [2018-11-23 10:02:30,031 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 10:02:30,035 INFO L225 Difference]: With dead ends: 3212 [2018-11-23 10:02:30,035 INFO L226 Difference]: Without dead ends: 1618 [2018-11-23 10:02:30,038 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 4 SyntacticMatches, 3 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-11-23 10:02:30,039 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1618 states. [2018-11-23 10:02:30,110 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1618 to 1618. [2018-11-23 10:02:30,110 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1618 states. [2018-11-23 10:02:30,113 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1618 states to 1618 states and 2081 transitions. [2018-11-23 10:02:30,113 INFO L78 Accepts]: Start accepts. Automaton has 1618 states and 2081 transitions. Word has length 141 [2018-11-23 10:02:30,113 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 10:02:30,114 INFO L480 AbstractCegarLoop]: Abstraction has 1618 states and 2081 transitions. [2018-11-23 10:02:30,114 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-23 10:02:30,114 INFO L276 IsEmpty]: Start isEmpty. Operand 1618 states and 2081 transitions. [2018-11-23 10:02:30,115 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 142 [2018-11-23 10:02:30,115 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:02:30,115 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:02:30,115 INFO L423 AbstractCegarLoop]: === Iteration 19 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:02:30,116 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:02:30,116 INFO L82 PathProgramCache]: Analyzing trace with hash -230628026, now seen corresponding path program 1 times [2018-11-23 10:02:30,116 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 10:02:30,116 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 10:02:30,116 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 10:02:30,117 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 10:02:30,117 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 10:02:30,122 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:02:30,161 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 1 proven. 0 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2018-11-23 10:02:30,162 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 10:02:30,162 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-23 10:02:30,162 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-23 10:02:30,162 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-23 10:02:30,162 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-23 10:02:30,162 INFO L87 Difference]: Start difference. First operand 1618 states and 2081 transitions. Second operand 5 states. [2018-11-23 10:02:30,459 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:02:30,459 INFO L93 Difference]: Finished difference Result 3212 states and 4146 transitions. [2018-11-23 10:02:30,460 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-23 10:02:30,460 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 141 [2018-11-23 10:02:30,460 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 10:02:30,464 INFO L225 Difference]: With dead ends: 3212 [2018-11-23 10:02:30,464 INFO L226 Difference]: Without dead ends: 1618 [2018-11-23 10:02:30,467 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 4 SyntacticMatches, 3 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-11-23 10:02:30,468 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1618 states. [2018-11-23 10:02:30,540 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1618 to 1618. [2018-11-23 10:02:30,540 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1618 states. [2018-11-23 10:02:30,543 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1618 states to 1618 states and 2065 transitions. [2018-11-23 10:02:30,544 INFO L78 Accepts]: Start accepts. Automaton has 1618 states and 2065 transitions. Word has length 141 [2018-11-23 10:02:30,544 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 10:02:30,544 INFO L480 AbstractCegarLoop]: Abstraction has 1618 states and 2065 transitions. [2018-11-23 10:02:30,544 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-23 10:02:30,544 INFO L276 IsEmpty]: Start isEmpty. Operand 1618 states and 2065 transitions. [2018-11-23 10:02:30,546 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 142 [2018-11-23 10:02:30,546 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:02:30,546 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:02:30,546 INFO L423 AbstractCegarLoop]: === Iteration 20 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:02:30,546 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:02:30,546 INFO L82 PathProgramCache]: Analyzing trace with hash 213272648, now seen corresponding path program 1 times [2018-11-23 10:02:30,547 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 10:02:30,547 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 10:02:30,547 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 10:02:30,547 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 10:02:30,547 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 10:02:30,553 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:02:30,597 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 1 proven. 0 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2018-11-23 10:02:30,597 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 10:02:30,597 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-23 10:02:30,598 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-23 10:02:30,598 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-23 10:02:30,598 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-23 10:02:30,598 INFO L87 Difference]: Start difference. First operand 1618 states and 2065 transitions. Second operand 5 states. [2018-11-23 10:02:31,019 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:02:31,019 INFO L93 Difference]: Finished difference Result 4062 states and 5227 transitions. [2018-11-23 10:02:31,020 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-11-23 10:02:31,020 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 141 [2018-11-23 10:02:31,020 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 10:02:31,026 INFO L225 Difference]: With dead ends: 4062 [2018-11-23 10:02:31,026 INFO L226 Difference]: Without dead ends: 2468 [2018-11-23 10:02:31,029 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 4 SyntacticMatches, 3 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2018-11-23 10:02:31,031 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2468 states. [2018-11-23 10:02:31,133 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2468 to 2324. [2018-11-23 10:02:31,133 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2324 states. [2018-11-23 10:02:31,136 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2324 states to 2324 states and 2887 transitions. [2018-11-23 10:02:31,137 INFO L78 Accepts]: Start accepts. Automaton has 2324 states and 2887 transitions. Word has length 141 [2018-11-23 10:02:31,137 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 10:02:31,137 INFO L480 AbstractCegarLoop]: Abstraction has 2324 states and 2887 transitions. [2018-11-23 10:02:31,137 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-23 10:02:31,138 INFO L276 IsEmpty]: Start isEmpty. Operand 2324 states and 2887 transitions. [2018-11-23 10:02:31,140 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 142 [2018-11-23 10:02:31,140 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:02:31,140 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:02:31,140 INFO L423 AbstractCegarLoop]: === Iteration 21 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:02:31,140 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:02:31,140 INFO L82 PathProgramCache]: Analyzing trace with hash 1751612678, now seen corresponding path program 1 times [2018-11-23 10:02:31,140 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 10:02:31,140 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 10:02:31,141 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 10:02:31,141 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 10:02:31,141 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 10:02:31,148 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:02:31,189 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 1 proven. 0 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2018-11-23 10:02:31,189 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 10:02:31,189 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-23 10:02:31,190 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-23 10:02:31,190 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-23 10:02:31,190 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-23 10:02:31,190 INFO L87 Difference]: Start difference. First operand 2324 states and 2887 transitions. Second operand 5 states. [2018-11-23 10:02:31,672 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:02:31,672 INFO L93 Difference]: Finished difference Result 5495 states and 7170 transitions. [2018-11-23 10:02:31,673 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-11-23 10:02:31,673 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 141 [2018-11-23 10:02:31,673 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 10:02:31,681 INFO L225 Difference]: With dead ends: 5495 [2018-11-23 10:02:31,682 INFO L226 Difference]: Without dead ends: 3197 [2018-11-23 10:02:31,687 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 5 SyntacticMatches, 3 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2018-11-23 10:02:31,689 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3197 states. [2018-11-23 10:02:31,853 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3197 to 2836. [2018-11-23 10:02:31,854 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2836 states. [2018-11-23 10:02:31,859 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2836 states to 2836 states and 3435 transitions. [2018-11-23 10:02:31,859 INFO L78 Accepts]: Start accepts. Automaton has 2836 states and 3435 transitions. Word has length 141 [2018-11-23 10:02:31,860 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 10:02:31,860 INFO L480 AbstractCegarLoop]: Abstraction has 2836 states and 3435 transitions. [2018-11-23 10:02:31,860 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-23 10:02:31,860 INFO L276 IsEmpty]: Start isEmpty. Operand 2836 states and 3435 transitions. [2018-11-23 10:02:31,862 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 142 [2018-11-23 10:02:31,862 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:02:31,862 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:02:31,862 INFO L423 AbstractCegarLoop]: === Iteration 22 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:02:31,862 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:02:31,862 INFO L82 PathProgramCache]: Analyzing trace with hash -276973432, now seen corresponding path program 1 times [2018-11-23 10:02:31,863 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 10:02:31,863 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 10:02:31,863 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 10:02:31,863 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 10:02:31,863 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 10:02:31,872 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:02:31,962 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 1 proven. 0 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2018-11-23 10:02:31,963 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 10:02:31,963 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-23 10:02:31,963 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-23 10:02:31,963 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-23 10:02:31,963 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-23 10:02:31,963 INFO L87 Difference]: Start difference. First operand 2836 states and 3435 transitions. Second operand 5 states. [2018-11-23 10:02:32,446 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:02:32,446 INFO L93 Difference]: Finished difference Result 6035 states and 7539 transitions. [2018-11-23 10:02:32,446 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-11-23 10:02:32,447 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 141 [2018-11-23 10:02:32,447 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 10:02:32,458 INFO L225 Difference]: With dead ends: 6035 [2018-11-23 10:02:32,458 INFO L226 Difference]: Without dead ends: 3225 [2018-11-23 10:02:32,465 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 5 SyntacticMatches, 3 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2018-11-23 10:02:32,468 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3225 states. [2018-11-23 10:02:32,698 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3225 to 3060. [2018-11-23 10:02:32,699 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3060 states. [2018-11-23 10:02:32,704 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3060 states to 3060 states and 3641 transitions. [2018-11-23 10:02:32,705 INFO L78 Accepts]: Start accepts. Automaton has 3060 states and 3641 transitions. Word has length 141 [2018-11-23 10:02:32,705 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 10:02:32,705 INFO L480 AbstractCegarLoop]: Abstraction has 3060 states and 3641 transitions. [2018-11-23 10:02:32,705 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-23 10:02:32,705 INFO L276 IsEmpty]: Start isEmpty. Operand 3060 states and 3641 transitions. [2018-11-23 10:02:32,707 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 142 [2018-11-23 10:02:32,707 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:02:32,708 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:02:32,708 INFO L423 AbstractCegarLoop]: === Iteration 23 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:02:32,708 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:02:32,708 INFO L82 PathProgramCache]: Analyzing trace with hash -758053690, now seen corresponding path program 1 times [2018-11-23 10:02:32,708 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 10:02:32,708 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 10:02:32,709 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 10:02:32,709 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 10:02:32,709 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 10:02:32,717 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:02:32,767 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 1 proven. 0 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2018-11-23 10:02:32,767 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 10:02:32,768 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-23 10:02:32,768 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-23 10:02:32,768 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-23 10:02:32,768 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-23 10:02:32,768 INFO L87 Difference]: Start difference. First operand 3060 states and 3641 transitions. Second operand 5 states. [2018-11-23 10:02:33,321 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:02:33,322 INFO L93 Difference]: Finished difference Result 6473 states and 8022 transitions. [2018-11-23 10:02:33,322 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-11-23 10:02:33,322 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 141 [2018-11-23 10:02:33,323 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 10:02:33,333 INFO L225 Difference]: With dead ends: 6473 [2018-11-23 10:02:33,333 INFO L226 Difference]: Without dead ends: 3437 [2018-11-23 10:02:33,343 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 5 SyntacticMatches, 3 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2018-11-23 10:02:33,346 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3437 states. [2018-11-23 10:02:33,578 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3437 to 3206. [2018-11-23 10:02:33,578 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3206 states. [2018-11-23 10:02:33,583 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3206 states to 3206 states and 3739 transitions. [2018-11-23 10:02:33,584 INFO L78 Accepts]: Start accepts. Automaton has 3206 states and 3739 transitions. Word has length 141 [2018-11-23 10:02:33,584 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 10:02:33,585 INFO L480 AbstractCegarLoop]: Abstraction has 3206 states and 3739 transitions. [2018-11-23 10:02:33,585 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-23 10:02:33,585 INFO L276 IsEmpty]: Start isEmpty. Operand 3206 states and 3739 transitions. [2018-11-23 10:02:33,586 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 142 [2018-11-23 10:02:33,586 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:02:33,587 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:02:33,587 INFO L423 AbstractCegarLoop]: === Iteration 24 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:02:33,587 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:02:33,587 INFO L82 PathProgramCache]: Analyzing trace with hash -773572408, now seen corresponding path program 1 times [2018-11-23 10:02:33,587 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 10:02:33,587 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 10:02:33,588 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 10:02:33,588 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 10:02:33,588 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 10:02:33,598 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:02:33,645 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 6 proven. 3 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-11-23 10:02:33,645 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-23 10:02:33,645 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_66be738a-27c5-4025-916a-d9ed6fa1b836/bin-2019/uautomizer/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-23 10:02:33,655 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 10:02:33,727 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:02:33,736 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 10:02:33,766 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 10 proven. 0 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2018-11-23 10:02:33,781 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-11-23 10:02:33,781 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [3] total 3 [2018-11-23 10:02:33,782 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-23 10:02:33,782 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-23 10:02:33,782 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-23 10:02:33,782 INFO L87 Difference]: Start difference. First operand 3206 states and 3739 transitions. Second operand 3 states. [2018-11-23 10:02:34,125 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:02:34,125 INFO L93 Difference]: Finished difference Result 9337 states and 11099 transitions. [2018-11-23 10:02:34,126 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-23 10:02:34,126 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 141 [2018-11-23 10:02:34,126 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 10:02:34,142 INFO L225 Difference]: With dead ends: 9337 [2018-11-23 10:02:34,142 INFO L226 Difference]: Without dead ends: 6157 [2018-11-23 10:02:34,149 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 143 GetRequests, 141 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-23 10:02:34,153 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6157 states. [2018-11-23 10:02:34,489 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6157 to 5799. [2018-11-23 10:02:34,489 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5799 states. [2018-11-23 10:02:34,503 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5799 states to 5799 states and 6920 transitions. [2018-11-23 10:02:34,505 INFO L78 Accepts]: Start accepts. Automaton has 5799 states and 6920 transitions. Word has length 141 [2018-11-23 10:02:34,505 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 10:02:34,505 INFO L480 AbstractCegarLoop]: Abstraction has 5799 states and 6920 transitions. [2018-11-23 10:02:34,505 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-23 10:02:34,505 INFO L276 IsEmpty]: Start isEmpty. Operand 5799 states and 6920 transitions. [2018-11-23 10:02:34,508 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 144 [2018-11-23 10:02:34,509 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:02:34,509 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:02:34,509 INFO L423 AbstractCegarLoop]: === Iteration 25 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:02:34,509 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:02:34,509 INFO L82 PathProgramCache]: Analyzing trace with hash 369656188, now seen corresponding path program 1 times [2018-11-23 10:02:34,509 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 10:02:34,510 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 10:02:34,510 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 10:02:34,510 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 10:02:34,510 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 10:02:34,518 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:02:34,582 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 1 proven. 0 refuted. 0 times theorem prover too weak. 17 trivial. 0 not checked. [2018-11-23 10:02:34,582 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 10:02:34,582 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-23 10:02:34,582 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-23 10:02:34,582 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-23 10:02:34,583 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-23 10:02:34,583 INFO L87 Difference]: Start difference. First operand 5799 states and 6920 transitions. Second operand 4 states. [2018-11-23 10:02:35,246 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:02:35,246 INFO L93 Difference]: Finished difference Result 11563 states and 13782 transitions. [2018-11-23 10:02:35,246 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-23 10:02:35,246 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 143 [2018-11-23 10:02:35,247 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 10:02:35,266 INFO L225 Difference]: With dead ends: 11563 [2018-11-23 10:02:35,266 INFO L226 Difference]: Without dead ends: 5788 [2018-11-23 10:02:35,280 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-23 10:02:35,285 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5788 states. [2018-11-23 10:02:35,777 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5788 to 5788. [2018-11-23 10:02:35,777 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5788 states. [2018-11-23 10:02:35,791 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5788 states to 5788 states and 6895 transitions. [2018-11-23 10:02:35,792 INFO L78 Accepts]: Start accepts. Automaton has 5788 states and 6895 transitions. Word has length 143 [2018-11-23 10:02:35,793 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 10:02:35,793 INFO L480 AbstractCegarLoop]: Abstraction has 5788 states and 6895 transitions. [2018-11-23 10:02:35,793 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-23 10:02:35,793 INFO L276 IsEmpty]: Start isEmpty. Operand 5788 states and 6895 transitions. [2018-11-23 10:02:35,795 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 144 [2018-11-23 10:02:35,795 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:02:35,796 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:02:35,796 INFO L423 AbstractCegarLoop]: === Iteration 26 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:02:35,796 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:02:35,796 INFO L82 PathProgramCache]: Analyzing trace with hash 804161786, now seen corresponding path program 1 times [2018-11-23 10:02:35,796 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 10:02:35,796 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 10:02:35,797 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 10:02:35,797 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 10:02:35,797 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 10:02:35,807 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:02:35,843 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 13 proven. 0 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2018-11-23 10:02:35,843 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 10:02:35,843 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-23 10:02:35,843 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-23 10:02:35,843 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-23 10:02:35,844 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-23 10:02:35,844 INFO L87 Difference]: Start difference. First operand 5788 states and 6895 transitions. Second operand 3 states. [2018-11-23 10:02:36,699 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:02:36,699 INFO L93 Difference]: Finished difference Result 17241 states and 20880 transitions. [2018-11-23 10:02:36,700 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-23 10:02:36,700 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 143 [2018-11-23 10:02:36,700 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 10:02:36,730 INFO L225 Difference]: With dead ends: 17241 [2018-11-23 10:02:36,730 INFO L226 Difference]: Without dead ends: 8714 [2018-11-23 10:02:36,745 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-23 10:02:36,753 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8714 states. [2018-11-23 10:02:37,289 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8714 to 8714. [2018-11-23 10:02:37,289 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8714 states. [2018-11-23 10:02:37,303 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8714 states to 8714 states and 10572 transitions. [2018-11-23 10:02:37,305 INFO L78 Accepts]: Start accepts. Automaton has 8714 states and 10572 transitions. Word has length 143 [2018-11-23 10:02:37,305 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 10:02:37,305 INFO L480 AbstractCegarLoop]: Abstraction has 8714 states and 10572 transitions. [2018-11-23 10:02:37,305 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-23 10:02:37,305 INFO L276 IsEmpty]: Start isEmpty. Operand 8714 states and 10572 transitions. [2018-11-23 10:02:37,318 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 205 [2018-11-23 10:02:37,318 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:02:37,319 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:02:37,319 INFO L423 AbstractCegarLoop]: === Iteration 27 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:02:37,319 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:02:37,319 INFO L82 PathProgramCache]: Analyzing trace with hash -1090290347, now seen corresponding path program 1 times [2018-11-23 10:02:37,319 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 10:02:37,319 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 10:02:37,320 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 10:02:37,320 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 10:02:37,320 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 10:02:37,334 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:02:37,392 INFO L134 CoverageAnalysis]: Checked inductivity of 65 backedges. 14 proven. 0 refuted. 0 times theorem prover too weak. 51 trivial. 0 not checked. [2018-11-23 10:02:37,392 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 10:02:37,392 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-23 10:02:37,393 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-23 10:02:37,393 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-23 10:02:37,393 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-23 10:02:37,393 INFO L87 Difference]: Start difference. First operand 8714 states and 10572 transitions. Second operand 4 states. [2018-11-23 10:02:38,199 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:02:38,199 INFO L93 Difference]: Finished difference Result 18502 states and 22880 transitions. [2018-11-23 10:02:38,199 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-23 10:02:38,199 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 204 [2018-11-23 10:02:38,200 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 10:02:38,224 INFO L225 Difference]: With dead ends: 18502 [2018-11-23 10:02:38,224 INFO L226 Difference]: Without dead ends: 9814 [2018-11-23 10:02:38,240 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-23 10:02:38,249 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9814 states. [2018-11-23 10:02:38,763 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9814 to 9790. [2018-11-23 10:02:38,763 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9790 states. [2018-11-23 10:02:38,773 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9790 states to 9790 states and 11421 transitions. [2018-11-23 10:02:38,775 INFO L78 Accepts]: Start accepts. Automaton has 9790 states and 11421 transitions. Word has length 204 [2018-11-23 10:02:38,775 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 10:02:38,775 INFO L480 AbstractCegarLoop]: Abstraction has 9790 states and 11421 transitions. [2018-11-23 10:02:38,775 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-23 10:02:38,775 INFO L276 IsEmpty]: Start isEmpty. Operand 9790 states and 11421 transitions. [2018-11-23 10:02:38,787 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 206 [2018-11-23 10:02:38,787 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:02:38,788 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:02:38,788 INFO L423 AbstractCegarLoop]: === Iteration 28 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:02:38,788 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:02:38,788 INFO L82 PathProgramCache]: Analyzing trace with hash -106589261, now seen corresponding path program 1 times [2018-11-23 10:02:38,788 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 10:02:38,788 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 10:02:38,789 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 10:02:38,789 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 10:02:38,789 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 10:02:38,803 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:02:38,850 INFO L134 CoverageAnalysis]: Checked inductivity of 65 backedges. 13 proven. 0 refuted. 0 times theorem prover too weak. 52 trivial. 0 not checked. [2018-11-23 10:02:38,851 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 10:02:38,851 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-23 10:02:38,851 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-23 10:02:38,851 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-23 10:02:38,851 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-23 10:02:38,852 INFO L87 Difference]: Start difference. First operand 9790 states and 11421 transitions. Second operand 3 states. [2018-11-23 10:02:39,655 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:02:39,655 INFO L93 Difference]: Finished difference Result 26195 states and 31407 transitions. [2018-11-23 10:02:39,655 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-23 10:02:39,656 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 205 [2018-11-23 10:02:39,656 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 10:02:39,688 INFO L225 Difference]: With dead ends: 26195 [2018-11-23 10:02:39,688 INFO L226 Difference]: Without dead ends: 16431 [2018-11-23 10:02:39,703 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-23 10:02:39,716 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16431 states. [2018-11-23 10:02:40,596 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16431 to 16425. [2018-11-23 10:02:40,596 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16425 states. [2018-11-23 10:02:40,616 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16425 states to 16425 states and 19526 transitions. [2018-11-23 10:02:40,618 INFO L78 Accepts]: Start accepts. Automaton has 16425 states and 19526 transitions. Word has length 205 [2018-11-23 10:02:40,619 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 10:02:40,619 INFO L480 AbstractCegarLoop]: Abstraction has 16425 states and 19526 transitions. [2018-11-23 10:02:40,619 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-23 10:02:40,619 INFO L276 IsEmpty]: Start isEmpty. Operand 16425 states and 19526 transitions. [2018-11-23 10:02:40,634 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 207 [2018-11-23 10:02:40,634 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:02:40,634 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:02:40,635 INFO L423 AbstractCegarLoop]: === Iteration 29 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:02:40,635 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:02:40,635 INFO L82 PathProgramCache]: Analyzing trace with hash 1744893044, now seen corresponding path program 1 times [2018-11-23 10:02:40,635 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 10:02:40,635 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 10:02:40,636 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 10:02:40,636 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 10:02:40,636 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 10:02:40,648 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:02:40,720 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 4 proven. 11 refuted. 0 times theorem prover too weak. 51 trivial. 0 not checked. [2018-11-23 10:02:40,720 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-23 10:02:40,720 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_66be738a-27c5-4025-916a-d9ed6fa1b836/bin-2019/uautomizer/z3 Starting monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-23 10:02:40,736 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 10:02:40,834 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:02:40,840 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 10:02:40,877 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 51 proven. 0 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-11-23 10:02:40,903 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-11-23 10:02:40,903 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [6] total 7 [2018-11-23 10:02:40,904 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-11-23 10:02:40,904 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-11-23 10:02:40,904 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=28, Unknown=0, NotChecked=0, Total=42 [2018-11-23 10:02:40,904 INFO L87 Difference]: Start difference. First operand 16425 states and 19526 transitions. Second operand 7 states. [2018-11-23 10:02:43,053 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:02:43,053 INFO L93 Difference]: Finished difference Result 39760 states and 50058 transitions. [2018-11-23 10:02:43,053 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-11-23 10:02:43,053 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 206 [2018-11-23 10:02:43,054 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 10:02:43,088 INFO L225 Difference]: With dead ends: 39760 [2018-11-23 10:02:43,088 INFO L226 Difference]: Without dead ends: 18061 [2018-11-23 10:02:43,120 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 214 GetRequests, 208 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=38, Unknown=0, NotChecked=0, Total=56 [2018-11-23 10:02:43,134 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18061 states. [2018-11-23 10:02:44,199 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18061 to 18060. [2018-11-23 10:02:44,199 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18060 states. [2018-11-23 10:02:44,221 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18060 states to 18060 states and 21645 transitions. [2018-11-23 10:02:44,224 INFO L78 Accepts]: Start accepts. Automaton has 18060 states and 21645 transitions. Word has length 206 [2018-11-23 10:02:44,224 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 10:02:44,224 INFO L480 AbstractCegarLoop]: Abstraction has 18060 states and 21645 transitions. [2018-11-23 10:02:44,224 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-11-23 10:02:44,224 INFO L276 IsEmpty]: Start isEmpty. Operand 18060 states and 21645 transitions. [2018-11-23 10:02:44,243 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 427 [2018-11-23 10:02:44,244 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:02:44,244 INFO L402 BasicCegarLoop]: trace histogram [6, 6, 6, 5, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:02:44,244 INFO L423 AbstractCegarLoop]: === Iteration 30 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:02:44,244 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:02:44,244 INFO L82 PathProgramCache]: Analyzing trace with hash -375896132, now seen corresponding path program 1 times [2018-11-23 10:02:44,244 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 10:02:44,245 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 10:02:44,245 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 10:02:44,245 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 10:02:44,245 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 10:02:44,256 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:02:44,350 INFO L134 CoverageAnalysis]: Checked inductivity of 451 backedges. 38 proven. 26 refuted. 0 times theorem prover too weak. 387 trivial. 0 not checked. [2018-11-23 10:02:44,350 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-23 10:02:44,350 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_66be738a-27c5-4025-916a-d9ed6fa1b836/bin-2019/uautomizer/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-23 10:02:44,359 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 10:02:44,472 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:02:44,479 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 10:02:44,547 INFO L134 CoverageAnalysis]: Checked inductivity of 451 backedges. 297 proven. 0 refuted. 0 times theorem prover too weak. 154 trivial. 0 not checked. [2018-11-23 10:02:44,563 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-11-23 10:02:44,563 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [8] total 9 [2018-11-23 10:02:44,564 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-11-23 10:02:44,564 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-11-23 10:02:44,564 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=55, Unknown=0, NotChecked=0, Total=72 [2018-11-23 10:02:44,564 INFO L87 Difference]: Start difference. First operand 18060 states and 21645 transitions. Second operand 9 states. [2018-11-23 10:02:45,536 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:02:45,536 INFO L93 Difference]: Finished difference Result 31405 states and 39071 transitions. [2018-11-23 10:02:45,537 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-11-23 10:02:45,537 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 426 [2018-11-23 10:02:45,537 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 10:02:45,572 INFO L225 Difference]: With dead ends: 31405 [2018-11-23 10:02:45,572 INFO L226 Difference]: Without dead ends: 13369 [2018-11-23 10:02:45,605 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 446 GetRequests, 430 SyntacticMatches, 2 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 20 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=61, Invalid=179, Unknown=0, NotChecked=0, Total=240 [2018-11-23 10:02:45,615 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13369 states. [2018-11-23 10:02:46,486 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13369 to 12439. [2018-11-23 10:02:46,486 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12439 states. [2018-11-23 10:02:46,500 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12439 states to 12439 states and 14169 transitions. [2018-11-23 10:02:46,503 INFO L78 Accepts]: Start accepts. Automaton has 12439 states and 14169 transitions. Word has length 426 [2018-11-23 10:02:46,503 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 10:02:46,503 INFO L480 AbstractCegarLoop]: Abstraction has 12439 states and 14169 transitions. [2018-11-23 10:02:46,503 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-11-23 10:02:46,503 INFO L276 IsEmpty]: Start isEmpty. Operand 12439 states and 14169 transitions. [2018-11-23 10:02:46,511 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 286 [2018-11-23 10:02:46,511 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:02:46,512 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:02:46,512 INFO L423 AbstractCegarLoop]: === Iteration 31 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:02:46,512 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:02:46,512 INFO L82 PathProgramCache]: Analyzing trace with hash -2083964120, now seen corresponding path program 1 times [2018-11-23 10:02:46,512 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 10:02:46,512 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 10:02:46,513 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 10:02:46,513 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 10:02:46,513 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 10:02:46,521 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:02:46,575 INFO L134 CoverageAnalysis]: Checked inductivity of 178 backedges. 17 proven. 7 refuted. 0 times theorem prover too weak. 154 trivial. 0 not checked. [2018-11-23 10:02:46,575 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-23 10:02:46,575 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_66be738a-27c5-4025-916a-d9ed6fa1b836/bin-2019/uautomizer/z3 Starting monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-23 10:02:46,586 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 10:02:46,672 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:02:46,677 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 10:02:46,719 INFO L134 CoverageAnalysis]: Checked inductivity of 178 backedges. 126 proven. 0 refuted. 0 times theorem prover too weak. 52 trivial. 0 not checked. [2018-11-23 10:02:46,734 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-11-23 10:02:46,734 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [4] total 6 [2018-11-23 10:02:46,735 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-23 10:02:46,735 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-23 10:02:46,735 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-11-23 10:02:46,735 INFO L87 Difference]: Start difference. First operand 12439 states and 14169 transitions. Second operand 6 states. [2018-11-23 10:02:48,701 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:02:48,702 INFO L93 Difference]: Finished difference Result 34409 states and 39602 transitions. [2018-11-23 10:02:48,702 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-11-23 10:02:48,702 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 285 [2018-11-23 10:02:48,702 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 10:02:48,737 INFO L225 Difference]: With dead ends: 34409 [2018-11-23 10:02:48,737 INFO L226 Difference]: Without dead ends: 15661 [2018-11-23 10:02:48,759 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 293 GetRequests, 287 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=23, Invalid=33, Unknown=0, NotChecked=0, Total=56 [2018-11-23 10:02:48,770 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15661 states. [2018-11-23 10:02:49,655 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15661 to 15473. [2018-11-23 10:02:49,656 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15473 states. [2018-11-23 10:02:49,672 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15473 states to 15473 states and 17735 transitions. [2018-11-23 10:02:49,676 INFO L78 Accepts]: Start accepts. Automaton has 15473 states and 17735 transitions. Word has length 285 [2018-11-23 10:02:49,677 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 10:02:49,677 INFO L480 AbstractCegarLoop]: Abstraction has 15473 states and 17735 transitions. [2018-11-23 10:02:49,677 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-23 10:02:49,677 INFO L276 IsEmpty]: Start isEmpty. Operand 15473 states and 17735 transitions. [2018-11-23 10:02:49,686 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 360 [2018-11-23 10:02:49,686 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:02:49,687 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:02:49,687 INFO L423 AbstractCegarLoop]: === Iteration 32 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:02:49,687 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:02:49,687 INFO L82 PathProgramCache]: Analyzing trace with hash 1232605120, now seen corresponding path program 1 times [2018-11-23 10:02:49,687 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 10:02:49,687 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 10:02:49,688 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 10:02:49,688 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 10:02:49,688 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 10:02:49,697 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:02:49,757 INFO L134 CoverageAnalysis]: Checked inductivity of 339 backedges. 19 proven. 12 refuted. 0 times theorem prover too weak. 308 trivial. 0 not checked. [2018-11-23 10:02:49,757 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-23 10:02:49,757 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_66be738a-27c5-4025-916a-d9ed6fa1b836/bin-2019/uautomizer/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-23 10:02:49,775 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 10:02:49,875 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:02:49,883 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 10:02:49,955 INFO L134 CoverageAnalysis]: Checked inductivity of 339 backedges. 180 proven. 0 refuted. 0 times theorem prover too weak. 159 trivial. 0 not checked. [2018-11-23 10:02:49,980 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-11-23 10:02:49,981 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [4] total 6 [2018-11-23 10:02:49,981 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-11-23 10:02:49,981 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-11-23 10:02:49,982 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-11-23 10:02:49,982 INFO L87 Difference]: Start difference. First operand 15473 states and 17735 transitions. Second operand 6 states. [2018-11-23 10:02:52,685 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:02:52,685 INFO L93 Difference]: Finished difference Result 50540 states and 58941 transitions. [2018-11-23 10:02:52,685 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-11-23 10:02:52,685 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 359 [2018-11-23 10:02:52,686 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 10:02:52,740 INFO L225 Difference]: With dead ends: 50540 [2018-11-23 10:02:52,740 INFO L226 Difference]: Without dead ends: 31513 [2018-11-23 10:02:52,768 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 369 GetRequests, 363 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=23, Invalid=33, Unknown=0, NotChecked=0, Total=56 [2018-11-23 10:02:52,788 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 31513 states. [2018-11-23 10:02:54,712 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 31513 to 30840. [2018-11-23 10:02:54,712 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 30840 states. [2018-11-23 10:02:54,750 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 30840 states to 30840 states and 35824 transitions. [2018-11-23 10:02:54,755 INFO L78 Accepts]: Start accepts. Automaton has 30840 states and 35824 transitions. Word has length 359 [2018-11-23 10:02:54,755 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 10:02:54,755 INFO L480 AbstractCegarLoop]: Abstraction has 30840 states and 35824 transitions. [2018-11-23 10:02:54,755 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-11-23 10:02:54,755 INFO L276 IsEmpty]: Start isEmpty. Operand 30840 states and 35824 transitions. [2018-11-23 10:02:54,774 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 424 [2018-11-23 10:02:54,774 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:02:54,774 INFO L402 BasicCegarLoop]: trace histogram [5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:02:54,774 INFO L423 AbstractCegarLoop]: === Iteration 33 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:02:54,775 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:02:54,775 INFO L82 PathProgramCache]: Analyzing trace with hash 1365223320, now seen corresponding path program 1 times [2018-11-23 10:02:54,775 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 10:02:54,775 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 10:02:54,776 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 10:02:54,776 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 10:02:54,776 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 10:02:54,792 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:02:54,900 INFO L134 CoverageAnalysis]: Checked inductivity of 545 backedges. 59 proven. 44 refuted. 0 times theorem prover too weak. 442 trivial. 0 not checked. [2018-11-23 10:02:54,900 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-23 10:02:54,900 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_66be738a-27c5-4025-916a-d9ed6fa1b836/bin-2019/uautomizer/z3 Starting monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-23 10:02:54,910 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 10:02:55,036 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 10:02:55,042 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-23 10:02:55,104 INFO L134 CoverageAnalysis]: Checked inductivity of 545 backedges. 338 proven. 0 refuted. 0 times theorem prover too weak. 207 trivial. 0 not checked. [2018-11-23 10:02:55,129 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-11-23 10:02:55,129 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [4] total 4 [2018-11-23 10:02:55,130 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-11-23 10:02:55,130 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-11-23 10:02:55,130 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-23 10:02:55,130 INFO L87 Difference]: Start difference. First operand 30840 states and 35824 transitions. Second operand 4 states. [2018-11-23 10:02:56,201 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 10:02:56,201 INFO L93 Difference]: Finished difference Result 40597 states and 47382 transitions. [2018-11-23 10:02:56,201 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-11-23 10:02:56,201 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 423 [2018-11-23 10:02:56,202 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-23 10:02:56,213 INFO L225 Difference]: With dead ends: 40597 [2018-11-23 10:02:56,213 INFO L226 Difference]: Without dead ends: 3356 [2018-11-23 10:02:56,247 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 426 GetRequests, 424 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-11-23 10:02:56,249 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3356 states. [2018-11-23 10:02:56,437 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3356 to 3356. [2018-11-23 10:02:56,437 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3356 states. [2018-11-23 10:02:56,440 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3356 states to 3356 states and 3647 transitions. [2018-11-23 10:02:56,442 INFO L78 Accepts]: Start accepts. Automaton has 3356 states and 3647 transitions. Word has length 423 [2018-11-23 10:02:56,442 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-23 10:02:56,442 INFO L480 AbstractCegarLoop]: Abstraction has 3356 states and 3647 transitions. [2018-11-23 10:02:56,442 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-11-23 10:02:56,442 INFO L276 IsEmpty]: Start isEmpty. Operand 3356 states and 3647 transitions. [2018-11-23 10:02:56,445 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 427 [2018-11-23 10:02:56,445 INFO L394 BasicCegarLoop]: Found error trace [2018-11-23 10:02:56,445 INFO L402 BasicCegarLoop]: trace histogram [5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 10:02:56,446 INFO L423 AbstractCegarLoop]: === Iteration 34 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2018-11-23 10:02:56,446 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 10:02:56,446 INFO L82 PathProgramCache]: Analyzing trace with hash -2114224743, now seen corresponding path program 1 times [2018-11-23 10:02:56,446 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 10:02:56,446 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 10:02:56,446 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 10:02:56,447 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 10:02:56,447 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 10:02:56,463 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-23 10:02:56,480 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-23 10:02:56,588 INFO L469 BasicCegarLoop]: Counterexample might be feasible ----- class de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder.RCFGBacktranslator [?] CALL call ULTIMATE.init(); VAL [|old(~E_1~0)|=21, |old(~E_2~0)|=5, |old(~E_3~0)|=25, |old(~E_4~0)|=11, |old(~M_E~0)|=17, |old(~m_i~0)|=7, |old(~m_pc~0)|=15, |old(~m_st~0)|=16, |old(~T1_E~0)|=3, |old(~t1_i~0)|=19, |old(~t1_pc~0)|=9, |old(~t1_st~0)|=4, |old(~T2_E~0)|=18, |old(~t2_i~0)|=6, |old(~t2_pc~0)|=10, |old(~t2_st~0)|=13, |old(~T3_E~0)|=23, |old(~t3_i~0)|=24, |old(~t3_pc~0)|=8, |old(~t3_st~0)|=14, |old(~T4_E~0)|=26, |old(~t4_i~0)|=20, |old(~t4_pc~0)|=22, |old(~t4_st~0)|=12, ~E_1~0=21, ~E_2~0=5, ~E_3~0=25, ~E_4~0=11, ~M_E~0=17, ~m_i~0=7, ~m_pc~0=15, ~m_st~0=16, ~T1_E~0=3, ~t1_i~0=19, ~t1_pc~0=9, ~t1_st~0=4, ~T2_E~0=18, ~t2_i~0=6, ~t2_pc~0=10, ~t2_st~0=13, ~T3_E~0=23, ~t3_i~0=24, ~t3_pc~0=8, ~t3_st~0=14, ~T4_E~0=26, ~t4_i~0=20, ~t4_pc~0=22, ~t4_st~0=12] [?] ~m_pc~0 := 0;~t1_pc~0 := 0;~t2_pc~0 := 0;~t3_pc~0 := 0;~t4_pc~0 := 0;~m_st~0 := 0;~t1_st~0 := 0;~t2_st~0 := 0;~t3_st~0 := 0;~t4_st~0 := 0;~m_i~0 := 0;~t1_i~0 := 0;~t2_i~0 := 0;~t3_i~0 := 0;~t4_i~0 := 0;~M_E~0 := 2;~T1_E~0 := 2;~T2_E~0 := 2;~T3_E~0 := 2;~T4_E~0 := 2;~E_1~0 := 2;~E_2~0 := 2;~E_3~0 := 2;~E_4~0 := 2; VAL [|old(~E_1~0)|=21, |old(~E_2~0)|=5, |old(~E_3~0)|=25, |old(~E_4~0)|=11, |old(~M_E~0)|=17, |old(~m_i~0)|=7, |old(~m_pc~0)|=15, |old(~m_st~0)|=16, |old(~T1_E~0)|=3, |old(~t1_i~0)|=19, |old(~t1_pc~0)|=9, |old(~t1_st~0)|=4, |old(~T2_E~0)|=18, |old(~t2_i~0)|=6, |old(~t2_pc~0)|=10, |old(~t2_st~0)|=13, |old(~T3_E~0)|=23, |old(~t3_i~0)|=24, |old(~t3_pc~0)|=8, |old(~t3_st~0)|=14, |old(~T4_E~0)|=26, |old(~t4_i~0)|=20, |old(~t4_pc~0)|=22, |old(~t4_st~0)|=12, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=0, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=0, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=0, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=0, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=0, ~t4_pc~0=0, ~t4_st~0=0] [?] assume true; VAL [|old(~E_1~0)|=21, |old(~E_2~0)|=5, |old(~E_3~0)|=25, |old(~E_4~0)|=11, |old(~M_E~0)|=17, |old(~m_i~0)|=7, |old(~m_pc~0)|=15, |old(~m_st~0)|=16, |old(~T1_E~0)|=3, |old(~t1_i~0)|=19, |old(~t1_pc~0)|=9, |old(~t1_st~0)|=4, |old(~T2_E~0)|=18, |old(~t2_i~0)|=6, |old(~t2_pc~0)|=10, |old(~t2_st~0)|=13, |old(~T3_E~0)|=23, |old(~t3_i~0)|=24, |old(~t3_pc~0)|=8, |old(~t3_st~0)|=14, |old(~T4_E~0)|=26, |old(~t4_i~0)|=20, |old(~t4_pc~0)|=22, |old(~t4_st~0)|=12, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=0, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=0, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=0, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=0, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=0, ~t4_pc~0=0, ~t4_st~0=0] [?] RET #739#return; VAL [~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=0, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=0, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=0, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=0, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=0, ~t4_pc~0=0, ~t4_st~0=0] [?] CALL call #t~ret14 := main(); VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=0, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=0, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=0, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=0, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=0, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=0, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=0, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=0, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=0, ~t4_pc~0=0, ~t4_st~0=0] [?] havoc ~__retres1~6; VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=0, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=0, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=0, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=0, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=0, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=0, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=0, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=0, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=0, ~t4_pc~0=0, ~t4_st~0=0] [?] CALL call init_model(); VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=0, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=0, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=0, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=0, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=0, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=0, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=0, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=0, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=0, ~t4_pc~0=0, ~t4_st~0=0] [?] ~m_i~0 := 1;~t1_i~0 := 1;~t2_i~0 := 1;~t3_i~0 := 1;~t4_i~0 := 1; VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=0, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=0, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=0, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=0, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [?] assume true; VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=0, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=0, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=0, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=0, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [?] RET #677#return; VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=0, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=0, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=0, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=0, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [?] CALL call start_simulation(); VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=0, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=0, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=0, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=0, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [?] havoc ~kernel_st~0;havoc ~tmp~3;havoc ~tmp___0~1;~kernel_st~0 := 0; VAL [start_simulation_~kernel_st~0=0, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=0, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=0, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=0, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=0, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [?] CALL call update_channels(); VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=0, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=0, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=0, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=0, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [?] assume true; VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=0, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=0, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=0, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=0, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [?] RET #709#return; VAL [start_simulation_~kernel_st~0=0, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=0, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=0, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=0, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=0, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [?] CALL call init_threads(); VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=0, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=0, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=0, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=0, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [?] assume 1 == ~m_i~0;~m_st~0 := 0; VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=0, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=0, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=0, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=0, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [?] assume 1 == ~t1_i~0;~t1_st~0 := 0; VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=0, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=0, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=0, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=0, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [?] assume 1 == ~t2_i~0;~t2_st~0 := 0; VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=0, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=0, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=0, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=0, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [?] assume 1 == ~t3_i~0;~t3_st~0 := 0; VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=0, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=0, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=0, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=0, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [?] assume 1 == ~t4_i~0;~t4_st~0 := 0; VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=0, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=0, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=0, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=0, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [?] assume true; VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=0, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=0, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=0, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=0, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [?] RET #711#return; VAL [start_simulation_~kernel_st~0=0, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=0, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=0, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=0, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=0, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [?] CALL call fire_delta_events(); VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=0, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=0, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=0, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=0, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [?] assume !(0 == ~M_E~0); VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=0, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=0, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=0, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=0, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [?] assume !(0 == ~T1_E~0); VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=0, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=0, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=0, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=0, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [?] assume !(0 == ~T2_E~0); VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=0, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=0, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=0, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=0, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [?] assume !(0 == ~T3_E~0); VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=0, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=0, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=0, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=0, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [?] assume !(0 == ~T4_E~0); VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=0, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=0, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=0, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=0, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [?] assume !(0 == ~E_1~0); VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=0, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=0, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=0, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=0, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [?] assume !(0 == ~E_2~0); VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=0, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=0, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=0, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=0, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [?] assume !(0 == ~E_3~0); VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=0, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=0, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=0, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=0, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [?] assume !(0 == ~E_4~0); VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=0, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=0, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=0, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=0, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [?] assume true; VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=0, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=0, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=0, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=0, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [?] RET #713#return; VAL [start_simulation_~kernel_st~0=0, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=0, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=0, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=0, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=0, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [?] CALL call activate_threads(); VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=0, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=0, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=0, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=0, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [?] havoc ~tmp~1;havoc ~tmp___0~0;havoc ~tmp___1~0;havoc ~tmp___2~0;havoc ~tmp___3~0; VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=0, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=0, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=0, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=0, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [?] CALL call #t~ret6 := is_master_triggered(); VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=0, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=0, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=0, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=0, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [?] havoc ~__retres1~0; VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=0, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=0, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=0, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=0, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [?] assume !(1 == ~m_pc~0); VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=0, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=0, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=0, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=0, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [?] ~__retres1~0 := 0; VAL [is_master_triggered_~__retres1~0=0, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=0, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=0, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=0, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=0, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [?] #res := ~__retres1~0; VAL [is_master_triggered_~__retres1~0=0, |is_master_triggered_#res|=0, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=0, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=0, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=0, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=0, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [?] assume true; VAL [is_master_triggered_~__retres1~0=0, |is_master_triggered_#res|=0, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=0, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=0, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=0, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=0, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [?] RET #683#return; VAL [|activate_threads_#t~ret6|=0, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=0, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=0, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=0, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=0, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [?] assume -2147483648 <= #t~ret6 && #t~ret6 <= 2147483647;~tmp~1 := #t~ret6;havoc #t~ret6; VAL [activate_threads_~tmp~1=0, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=0, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=0, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=0, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=0, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [?] assume !(0 != ~tmp~1); VAL [activate_threads_~tmp~1=0, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=0, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=0, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=0, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=0, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [?] CALL call #t~ret7 := is_transmit1_triggered(); VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=0, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=0, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=0, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=0, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [?] havoc ~__retres1~1; VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=0, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=0, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=0, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=0, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [?] assume !(1 == ~t1_pc~0); VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=0, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=0, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=0, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=0, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [?] ~__retres1~1 := 0; VAL [is_transmit1_triggered_~__retres1~1=0, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=0, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=0, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=0, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=0, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [?] #res := ~__retres1~1; VAL [is_transmit1_triggered_~__retres1~1=0, |is_transmit1_triggered_#res|=0, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=0, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=0, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=0, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=0, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [?] assume true; VAL [is_transmit1_triggered_~__retres1~1=0, |is_transmit1_triggered_#res|=0, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=0, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=0, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=0, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=0, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [?] RET #685#return; VAL [activate_threads_~tmp~1=0, |activate_threads_#t~ret7|=0, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=0, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=0, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=0, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=0, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [?] assume -2147483648 <= #t~ret7 && #t~ret7 <= 2147483647;~tmp___0~0 := #t~ret7;havoc #t~ret7; VAL [activate_threads_~tmp___0~0=0, activate_threads_~tmp~1=0, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=0, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=0, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=0, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=0, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [?] assume !(0 != ~tmp___0~0); VAL [activate_threads_~tmp___0~0=0, activate_threads_~tmp~1=0, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=0, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=0, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=0, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=0, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [?] CALL call #t~ret8 := is_transmit2_triggered(); VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=0, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=0, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=0, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=0, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [?] havoc ~__retres1~2; VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=0, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=0, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=0, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=0, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [?] assume !(1 == ~t2_pc~0); VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=0, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=0, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=0, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=0, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [?] ~__retres1~2 := 0; VAL [is_transmit2_triggered_~__retres1~2=0, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=0, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=0, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=0, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=0, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [?] #res := ~__retres1~2; VAL [is_transmit2_triggered_~__retres1~2=0, |is_transmit2_triggered_#res|=0, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=0, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=0, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=0, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=0, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [?] assume true; VAL [is_transmit2_triggered_~__retres1~2=0, |is_transmit2_triggered_#res|=0, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=0, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=0, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=0, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=0, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [?] RET #687#return; VAL [activate_threads_~tmp___0~0=0, activate_threads_~tmp~1=0, |activate_threads_#t~ret8|=0, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=0, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=0, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=0, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=0, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [?] assume -2147483648 <= #t~ret8 && #t~ret8 <= 2147483647;~tmp___1~0 := #t~ret8;havoc #t~ret8; VAL [activate_threads_~tmp___0~0=0, activate_threads_~tmp___1~0=0, activate_threads_~tmp~1=0, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=0, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=0, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=0, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=0, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [?] assume !(0 != ~tmp___1~0); VAL [activate_threads_~tmp___0~0=0, activate_threads_~tmp___1~0=0, activate_threads_~tmp~1=0, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=0, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=0, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=0, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=0, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [?] CALL call #t~ret9 := is_transmit3_triggered(); VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=0, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=0, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=0, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=0, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [?] havoc ~__retres1~3; VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=0, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=0, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=0, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=0, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [?] assume !(1 == ~t3_pc~0); VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=0, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=0, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=0, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=0, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [?] ~__retres1~3 := 0; VAL [is_transmit3_triggered_~__retres1~3=0, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=0, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=0, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=0, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=0, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [?] #res := ~__retres1~3; VAL [is_transmit3_triggered_~__retres1~3=0, |is_transmit3_triggered_#res|=0, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=0, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=0, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=0, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=0, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [?] assume true; VAL [is_transmit3_triggered_~__retres1~3=0, |is_transmit3_triggered_#res|=0, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=0, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=0, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=0, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=0, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [?] RET #689#return; VAL [activate_threads_~tmp___0~0=0, activate_threads_~tmp___1~0=0, activate_threads_~tmp~1=0, |activate_threads_#t~ret9|=0, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=0, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=0, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=0, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=0, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [?] assume -2147483648 <= #t~ret9 && #t~ret9 <= 2147483647;~tmp___2~0 := #t~ret9;havoc #t~ret9; VAL [activate_threads_~tmp___0~0=0, activate_threads_~tmp___1~0=0, activate_threads_~tmp___2~0=0, activate_threads_~tmp~1=0, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=0, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=0, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=0, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=0, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [?] assume !(0 != ~tmp___2~0); VAL [activate_threads_~tmp___0~0=0, activate_threads_~tmp___1~0=0, activate_threads_~tmp___2~0=0, activate_threads_~tmp~1=0, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=0, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=0, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=0, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=0, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [?] CALL call #t~ret10 := is_transmit4_triggered(); VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=0, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=0, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=0, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=0, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [?] havoc ~__retres1~4; VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=0, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=0, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=0, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=0, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [?] assume !(1 == ~t4_pc~0); VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=0, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=0, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=0, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=0, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [?] ~__retres1~4 := 0; VAL [is_transmit4_triggered_~__retres1~4=0, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=0, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=0, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=0, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=0, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [?] #res := ~__retres1~4; VAL [is_transmit4_triggered_~__retres1~4=0, |is_transmit4_triggered_#res|=0, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=0, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=0, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=0, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=0, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [?] assume true; VAL [is_transmit4_triggered_~__retres1~4=0, |is_transmit4_triggered_#res|=0, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=0, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=0, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=0, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=0, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [?] RET #691#return; VAL [activate_threads_~tmp___0~0=0, activate_threads_~tmp___1~0=0, activate_threads_~tmp___2~0=0, activate_threads_~tmp~1=0, |activate_threads_#t~ret10|=0, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=0, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=0, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=0, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=0, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [?] assume -2147483648 <= #t~ret10 && #t~ret10 <= 2147483647;~tmp___3~0 := #t~ret10;havoc #t~ret10; VAL [activate_threads_~tmp___0~0=0, activate_threads_~tmp___1~0=0, activate_threads_~tmp___2~0=0, activate_threads_~tmp___3~0=0, activate_threads_~tmp~1=0, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=0, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=0, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=0, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=0, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [?] assume !(0 != ~tmp___3~0); VAL [activate_threads_~tmp___0~0=0, activate_threads_~tmp___1~0=0, activate_threads_~tmp___2~0=0, activate_threads_~tmp___3~0=0, activate_threads_~tmp~1=0, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=0, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=0, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=0, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=0, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [?] assume true; VAL [activate_threads_~tmp___0~0=0, activate_threads_~tmp___1~0=0, activate_threads_~tmp___2~0=0, activate_threads_~tmp___3~0=0, activate_threads_~tmp~1=0, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=0, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=0, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=0, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=0, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [?] RET #715#return; VAL [start_simulation_~kernel_st~0=0, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=0, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=0, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=0, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=0, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [?] CALL call reset_delta_events(); VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=0, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=0, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=0, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=0, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [?] assume !(1 == ~M_E~0); VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=0, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=0, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=0, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=0, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [?] assume !(1 == ~T1_E~0); VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=0, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=0, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=0, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=0, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [?] assume !(1 == ~T2_E~0); VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=0, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=0, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=0, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=0, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [?] assume !(1 == ~T3_E~0); VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=0, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=0, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=0, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=0, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [?] assume !(1 == ~T4_E~0); VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=0, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=0, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=0, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=0, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [?] assume !(1 == ~E_1~0); VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=0, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=0, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=0, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=0, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [?] assume !(1 == ~E_2~0); VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=0, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=0, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=0, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=0, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [?] assume !(1 == ~E_3~0); VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=0, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=0, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=0, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=0, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [?] assume !(1 == ~E_4~0); VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=0, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=0, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=0, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=0, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [?] assume true; VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=0, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=0, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=0, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=0, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [?] RET #717#return; VAL [start_simulation_~kernel_st~0=0, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=0, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=0, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=0, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=0, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [?] assume !false; VAL [start_simulation_~kernel_st~0=0, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=0, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=0, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=0, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=0, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [?] ~kernel_st~0 := 1; VAL [start_simulation_~kernel_st~0=1, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=0, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=0, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=0, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=0, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [?] CALL call eval(); VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=0, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=0, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=0, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=0, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [?] havoc ~tmp~0; VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=0, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=0, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=0, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=0, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [?] assume !false; VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=0, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=0, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=0, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=0, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [?] CALL call #t~ret0 := exists_runnable_thread(); VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=0, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=0, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=0, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=0, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [?] havoc ~__retres1~5; VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=0, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=0, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=0, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=0, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [?] assume 0 == ~m_st~0;~__retres1~5 := 1; VAL [exists_runnable_thread_~__retres1~5=1, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=0, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=0, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=0, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=0, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [?] #res := ~__retres1~5; VAL [exists_runnable_thread_~__retres1~5=1, |exists_runnable_thread_#res|=1, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=0, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=0, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=0, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=0, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [?] assume true; VAL [exists_runnable_thread_~__retres1~5=1, |exists_runnable_thread_#res|=1, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=0, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=0, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=0, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=0, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [?] RET #697#return; VAL [|eval_#t~ret0|=1, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=0, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=0, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=0, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=0, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [?] assume -2147483648 <= #t~ret0 && #t~ret0 <= 2147483647;~tmp~0 := #t~ret0;havoc #t~ret0; VAL [eval_~tmp~0=1, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=0, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=0, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=0, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=0, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [?] assume 0 != ~tmp~0; VAL [eval_~tmp~0=1, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=0, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=0, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=0, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=0, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [?] assume 0 == ~m_st~0;havoc ~tmp_ndt_1~0;assume -2147483648 <= #t~nondet1 && #t~nondet1 <= 2147483647;~tmp_ndt_1~0 := #t~nondet1;havoc #t~nondet1; VAL [eval_~tmp_ndt_1~0=0, eval_~tmp~0=1, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=0, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=0, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=0, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=0, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [?] assume !(0 != ~tmp_ndt_1~0); VAL [eval_~tmp_ndt_1~0=0, eval_~tmp~0=1, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=0, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=0, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=0, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=0, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [?] assume 0 == ~t1_st~0;havoc ~tmp_ndt_2~0;assume -2147483648 <= #t~nondet2 && #t~nondet2 <= 2147483647;~tmp_ndt_2~0 := #t~nondet2;havoc #t~nondet2; VAL [eval_~tmp_ndt_1~0=0, eval_~tmp_ndt_2~0=1, eval_~tmp~0=1, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=0, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=0, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=0, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=0, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [?] assume 0 != ~tmp_ndt_2~0;~t1_st~0 := 1; VAL [eval_~tmp_ndt_1~0=0, eval_~tmp_ndt_2~0=1, eval_~tmp~0=1, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=0, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=0, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=0, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=0, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [?] CALL call transmit1(); VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=0, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=1, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=0, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=0, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [?] assume 0 == ~t1_pc~0; VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=0, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=1, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=0, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=0, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [?] assume !false; VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=0, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=1, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=0, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=0, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [?] ~t1_pc~0 := 1;~t1_st~0 := 2; VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=0, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=1, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=0, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=0, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [?] assume true; VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=0, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=1, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=0, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=0, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [?] RET #701#return; VAL [eval_~tmp_ndt_1~0=0, eval_~tmp_ndt_2~0=1, eval_~tmp~0=1, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=0, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=0, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=0, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=0, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [?] assume 0 == ~t2_st~0;havoc ~tmp_ndt_3~0;assume -2147483648 <= #t~nondet3 && #t~nondet3 <= 2147483647;~tmp_ndt_3~0 := #t~nondet3;havoc #t~nondet3; VAL [eval_~tmp_ndt_1~0=0, eval_~tmp_ndt_2~0=1, eval_~tmp_ndt_3~0=1, eval_~tmp~0=1, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=0, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=0, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=0, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=0, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [?] assume 0 != ~tmp_ndt_3~0;~t2_st~0 := 1; VAL [eval_~tmp_ndt_1~0=0, eval_~tmp_ndt_2~0=1, eval_~tmp_ndt_3~0=1, eval_~tmp~0=1, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=0, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=0, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=0, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=0, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [?] CALL call transmit2(); VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=0, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=1, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=0, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [?] assume 0 == ~t2_pc~0; VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=0, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=1, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=0, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [?] assume !false; VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=0, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=1, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=0, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [?] ~t2_pc~0 := 1;~t2_st~0 := 2; VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=0, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=1, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=0, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [?] assume true; VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=0, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=1, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=0, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [?] RET #703#return; VAL [eval_~tmp_ndt_1~0=0, eval_~tmp_ndt_2~0=1, eval_~tmp_ndt_3~0=1, eval_~tmp~0=1, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=0, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=0, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=0, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=0, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [?] assume 0 == ~t3_st~0;havoc ~tmp_ndt_4~0;assume -2147483648 <= #t~nondet4 && #t~nondet4 <= 2147483647;~tmp_ndt_4~0 := #t~nondet4;havoc #t~nondet4; VAL [eval_~tmp_ndt_1~0=0, eval_~tmp_ndt_2~0=1, eval_~tmp_ndt_3~0=1, eval_~tmp_ndt_4~0=1, eval_~tmp~0=1, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=0, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=0, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=0, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=0, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [?] assume 0 != ~tmp_ndt_4~0;~t3_st~0 := 1; VAL [eval_~tmp_ndt_1~0=0, eval_~tmp_ndt_2~0=1, eval_~tmp_ndt_3~0=1, eval_~tmp_ndt_4~0=1, eval_~tmp~0=1, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=0, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=0, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=0, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=0, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [?] CALL call transmit3(); VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=0, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=1, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [?] assume 0 == ~t3_pc~0; VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=0, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=1, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [?] assume !false; VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=0, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=1, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [?] ~t3_pc~0 := 1;~t3_st~0 := 2; VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=0, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=1, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [?] assume true; VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=0, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=1, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [?] RET #705#return; VAL [eval_~tmp_ndt_1~0=0, eval_~tmp_ndt_2~0=1, eval_~tmp_ndt_3~0=1, eval_~tmp_ndt_4~0=1, eval_~tmp~0=1, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=0, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=0, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=0, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=0, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [?] assume 0 == ~t4_st~0;havoc ~tmp_ndt_5~0;assume -2147483648 <= #t~nondet5 && #t~nondet5 <= 2147483647;~tmp_ndt_5~0 := #t~nondet5;havoc #t~nondet5; VAL [eval_~tmp_ndt_1~0=0, eval_~tmp_ndt_2~0=1, eval_~tmp_ndt_3~0=1, eval_~tmp_ndt_4~0=1, eval_~tmp_ndt_5~0=1, eval_~tmp~0=1, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=0, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=0, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=0, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=0, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [?] assume 0 != ~tmp_ndt_5~0;~t4_st~0 := 1; VAL [eval_~tmp_ndt_1~0=0, eval_~tmp_ndt_2~0=1, eval_~tmp_ndt_3~0=1, eval_~tmp_ndt_4~0=1, eval_~tmp_ndt_5~0=1, eval_~tmp~0=1, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=0, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=0, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=0, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=0, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=1] [?] CALL call transmit4(); VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=0, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=0, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=0, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=0, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=1, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=1] [?] assume 0 == ~t4_pc~0; VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=0, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=0, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=0, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=0, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=1, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=1] [?] assume !false; VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=0, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=0, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=0, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=0, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=1, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=1] [?] ~t4_pc~0 := 1;~t4_st~0 := 2; VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=0, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=0, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=0, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=0, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=1, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] assume true; VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=0, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=0, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=0, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=0, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=1, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] RET #707#return; VAL [eval_~tmp_ndt_1~0=0, eval_~tmp_ndt_2~0=1, eval_~tmp_ndt_3~0=1, eval_~tmp_ndt_4~0=1, eval_~tmp_ndt_5~0=1, eval_~tmp~0=1, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=0, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=0, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=0, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=0, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] assume !false; VAL [eval_~tmp_ndt_1~0=0, eval_~tmp_ndt_2~0=1, eval_~tmp_ndt_3~0=1, eval_~tmp_ndt_4~0=1, eval_~tmp_ndt_5~0=1, eval_~tmp~0=1, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=0, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=0, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=0, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=0, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] CALL call #t~ret0 := exists_runnable_thread(); VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=0, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=0, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=0, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=0, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] havoc ~__retres1~5; VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=0, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=0, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=0, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=0, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] assume 0 == ~m_st~0;~__retres1~5 := 1; VAL [exists_runnable_thread_~__retres1~5=1, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=0, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=0, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=0, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=0, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] #res := ~__retres1~5; VAL [exists_runnable_thread_~__retres1~5=1, |exists_runnable_thread_#res|=1, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=0, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=0, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=0, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=0, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] assume true; VAL [exists_runnable_thread_~__retres1~5=1, |exists_runnable_thread_#res|=1, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=0, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=0, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=0, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=0, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] RET #697#return; VAL [eval_~tmp_ndt_1~0=0, eval_~tmp_ndt_2~0=1, eval_~tmp_ndt_3~0=1, eval_~tmp_ndt_4~0=1, eval_~tmp_ndt_5~0=1, eval_~tmp~0=1, |eval_#t~ret0|=1, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=0, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=0, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=0, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=0, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] assume -2147483648 <= #t~ret0 && #t~ret0 <= 2147483647;~tmp~0 := #t~ret0;havoc #t~ret0; VAL [eval_~tmp_ndt_1~0=0, eval_~tmp_ndt_2~0=1, eval_~tmp_ndt_3~0=1, eval_~tmp_ndt_4~0=1, eval_~tmp_ndt_5~0=1, eval_~tmp~0=1, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=0, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=0, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=0, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=0, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] assume 0 != ~tmp~0; VAL [eval_~tmp_ndt_1~0=0, eval_~tmp_ndt_2~0=1, eval_~tmp_ndt_3~0=1, eval_~tmp_ndt_4~0=1, eval_~tmp_ndt_5~0=1, eval_~tmp~0=1, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=0, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=0, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=0, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=0, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] assume 0 == ~m_st~0;havoc ~tmp_ndt_1~0;assume -2147483648 <= #t~nondet1 && #t~nondet1 <= 2147483647;~tmp_ndt_1~0 := #t~nondet1;havoc #t~nondet1; VAL [eval_~tmp_ndt_1~0=1, eval_~tmp_ndt_2~0=1, eval_~tmp_ndt_3~0=1, eval_~tmp_ndt_4~0=1, eval_~tmp_ndt_5~0=1, eval_~tmp~0=1, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=0, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=0, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=0, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=0, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] assume 0 != ~tmp_ndt_1~0;~m_st~0 := 1; VAL [eval_~tmp_ndt_1~0=1, eval_~tmp_ndt_2~0=1, eval_~tmp_ndt_3~0=1, eval_~tmp_ndt_4~0=1, eval_~tmp_ndt_5~0=1, eval_~tmp~0=1, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=0, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=0, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=0, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=0, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] CALL call master(); VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=1, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] assume 0 == ~m_pc~0; VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=1, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] assume !false; VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=1, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] ~E_1~0 := 1; VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=1, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] CALL call immediate_notify(); VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=1, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] CALL call activate_threads(); VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=1, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] havoc ~tmp~1;havoc ~tmp___0~0;havoc ~tmp___1~0;havoc ~tmp___2~0;havoc ~tmp___3~0; VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=1, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] CALL call #t~ret6 := is_master_triggered(); VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=1, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] havoc ~__retres1~0; VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=1, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] assume !(1 == ~m_pc~0); VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=1, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] ~__retres1~0 := 0; VAL [is_master_triggered_~__retres1~0=0, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=1, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] #res := ~__retres1~0; VAL [is_master_triggered_~__retres1~0=0, |is_master_triggered_#res|=0, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=1, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] assume true; VAL [is_master_triggered_~__retres1~0=0, |is_master_triggered_#res|=0, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=1, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] RET #683#return; VAL [|activate_threads_#t~ret6|=0, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=1, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] assume -2147483648 <= #t~ret6 && #t~ret6 <= 2147483647;~tmp~1 := #t~ret6;havoc #t~ret6; VAL [activate_threads_~tmp~1=0, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=1, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] assume !(0 != ~tmp~1); VAL [activate_threads_~tmp~1=0, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=1, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] CALL call #t~ret7 := is_transmit1_triggered(); VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=1, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] havoc ~__retres1~1; VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=1, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] assume 1 == ~t1_pc~0; VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=1, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] assume 1 == ~E_1~0;~__retres1~1 := 1; VAL [is_transmit1_triggered_~__retres1~1=1, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=1, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] #res := ~__retres1~1; VAL [is_transmit1_triggered_~__retres1~1=1, |is_transmit1_triggered_#res|=1, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=1, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] assume true; VAL [is_transmit1_triggered_~__retres1~1=1, |is_transmit1_triggered_#res|=1, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=1, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] RET #685#return; VAL [activate_threads_~tmp~1=0, |activate_threads_#t~ret7|=1, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=1, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] assume -2147483648 <= #t~ret7 && #t~ret7 <= 2147483647;~tmp___0~0 := #t~ret7;havoc #t~ret7; VAL [activate_threads_~tmp___0~0=1, activate_threads_~tmp~1=0, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=1, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] assume 0 != ~tmp___0~0;~t1_st~0 := 0; VAL [activate_threads_~tmp___0~0=1, activate_threads_~tmp~1=0, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=1, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] CALL call #t~ret8 := is_transmit2_triggered(); VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=1, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] havoc ~__retres1~2; VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=1, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] assume 1 == ~t2_pc~0; VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=1, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] assume !(1 == ~E_2~0); VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=1, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] ~__retres1~2 := 0; VAL [is_transmit2_triggered_~__retres1~2=0, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=1, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] #res := ~__retres1~2; VAL [is_transmit2_triggered_~__retres1~2=0, |is_transmit2_triggered_#res|=0, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=1, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] assume true; VAL [is_transmit2_triggered_~__retres1~2=0, |is_transmit2_triggered_#res|=0, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=1, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] RET #687#return; VAL [activate_threads_~tmp___0~0=1, activate_threads_~tmp~1=0, |activate_threads_#t~ret8|=0, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=1, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] assume -2147483648 <= #t~ret8 && #t~ret8 <= 2147483647;~tmp___1~0 := #t~ret8;havoc #t~ret8; VAL [activate_threads_~tmp___0~0=1, activate_threads_~tmp___1~0=0, activate_threads_~tmp~1=0, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=1, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] assume !(0 != ~tmp___1~0); VAL [activate_threads_~tmp___0~0=1, activate_threads_~tmp___1~0=0, activate_threads_~tmp~1=0, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=1, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] CALL call #t~ret9 := is_transmit3_triggered(); VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=1, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] havoc ~__retres1~3; VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=1, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] assume 1 == ~t3_pc~0; VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=1, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] assume !(1 == ~E_3~0); VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=1, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] ~__retres1~3 := 0; VAL [is_transmit3_triggered_~__retres1~3=0, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=1, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] #res := ~__retres1~3; VAL [is_transmit3_triggered_~__retres1~3=0, |is_transmit3_triggered_#res|=0, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=1, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] assume true; VAL [is_transmit3_triggered_~__retres1~3=0, |is_transmit3_triggered_#res|=0, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=1, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] RET #689#return; VAL [activate_threads_~tmp___0~0=1, activate_threads_~tmp___1~0=0, activate_threads_~tmp~1=0, |activate_threads_#t~ret9|=0, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=1, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] assume -2147483648 <= #t~ret9 && #t~ret9 <= 2147483647;~tmp___2~0 := #t~ret9;havoc #t~ret9; VAL [activate_threads_~tmp___0~0=1, activate_threads_~tmp___1~0=0, activate_threads_~tmp___2~0=0, activate_threads_~tmp~1=0, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=1, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] assume !(0 != ~tmp___2~0); VAL [activate_threads_~tmp___0~0=1, activate_threads_~tmp___1~0=0, activate_threads_~tmp___2~0=0, activate_threads_~tmp~1=0, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=1, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] CALL call #t~ret10 := is_transmit4_triggered(); VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=1, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] havoc ~__retres1~4; VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=1, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] assume 1 == ~t4_pc~0; VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=1, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] assume !(1 == ~E_4~0); VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=1, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] ~__retres1~4 := 0; VAL [is_transmit4_triggered_~__retres1~4=0, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=1, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] #res := ~__retres1~4; VAL [is_transmit4_triggered_~__retres1~4=0, |is_transmit4_triggered_#res|=0, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=1, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] assume true; VAL [is_transmit4_triggered_~__retres1~4=0, |is_transmit4_triggered_#res|=0, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=1, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] RET #691#return; VAL [activate_threads_~tmp___0~0=1, activate_threads_~tmp___1~0=0, activate_threads_~tmp___2~0=0, activate_threads_~tmp~1=0, |activate_threads_#t~ret10|=0, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=1, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] assume -2147483648 <= #t~ret10 && #t~ret10 <= 2147483647;~tmp___3~0 := #t~ret10;havoc #t~ret10; VAL [activate_threads_~tmp___0~0=1, activate_threads_~tmp___1~0=0, activate_threads_~tmp___2~0=0, activate_threads_~tmp___3~0=0, activate_threads_~tmp~1=0, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=1, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] assume !(0 != ~tmp___3~0); VAL [activate_threads_~tmp___0~0=1, activate_threads_~tmp___1~0=0, activate_threads_~tmp___2~0=0, activate_threads_~tmp___3~0=0, activate_threads_~tmp~1=0, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=1, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] assume true; VAL [activate_threads_~tmp___0~0=1, activate_threads_~tmp___1~0=0, activate_threads_~tmp___2~0=0, activate_threads_~tmp___3~0=0, activate_threads_~tmp~1=0, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=1, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] RET #693#return; VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=1, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] assume true; VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=1, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] RET #695#return; VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=1, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] ~E_1~0 := 2; VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=1, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] assume !false; VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=1, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] ~m_pc~0 := 1;~m_st~0 := 2; VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=1, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] assume true; VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=1, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] RET #699#return; VAL [eval_~tmp_ndt_1~0=1, eval_~tmp_ndt_2~0=1, eval_~tmp_ndt_3~0=1, eval_~tmp_ndt_4~0=1, eval_~tmp_ndt_5~0=1, eval_~tmp~0=1, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=0, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=0, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=0, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=0, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] assume 0 == ~t1_st~0;havoc ~tmp_ndt_2~0;assume -2147483648 <= #t~nondet2 && #t~nondet2 <= 2147483647;~tmp_ndt_2~0 := #t~nondet2;havoc #t~nondet2; VAL [eval_~tmp_ndt_1~0=1, eval_~tmp_ndt_2~0=1, eval_~tmp_ndt_3~0=1, eval_~tmp_ndt_4~0=1, eval_~tmp_ndt_5~0=1, eval_~tmp~0=1, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=0, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=0, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=0, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=0, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] assume 0 != ~tmp_ndt_2~0;~t1_st~0 := 1; VAL [eval_~tmp_ndt_1~0=1, eval_~tmp_ndt_2~0=1, eval_~tmp_ndt_3~0=1, eval_~tmp_ndt_4~0=1, eval_~tmp_ndt_5~0=1, eval_~tmp~0=1, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=0, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=0, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=0, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=0, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] CALL call transmit1(); VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=1, |old(~t1_st~0)|=1, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] assume !(0 == ~t1_pc~0); VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=1, |old(~t1_st~0)|=1, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] assume 1 == ~t1_pc~0; VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=1, |old(~t1_st~0)|=1, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] ~E_2~0 := 1; VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=1, |old(~t1_st~0)|=1, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] CALL call immediate_notify(); VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=1, |old(~t1_st~0)|=1, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] CALL call activate_threads(); VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=1, |old(~t1_st~0)|=1, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] havoc ~tmp~1;havoc ~tmp___0~0;havoc ~tmp___1~0;havoc ~tmp___2~0;havoc ~tmp___3~0; VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=1, |old(~t1_st~0)|=1, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] CALL call #t~ret6 := is_master_triggered(); VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=1, |old(~t1_st~0)|=1, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] havoc ~__retres1~0; VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=1, |old(~t1_st~0)|=1, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] assume 1 == ~m_pc~0; VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=1, |old(~t1_st~0)|=1, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] assume !(1 == ~M_E~0); VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=1, |old(~t1_st~0)|=1, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] ~__retres1~0 := 0; VAL [is_master_triggered_~__retres1~0=0, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=1, |old(~t1_st~0)|=1, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] #res := ~__retres1~0; VAL [is_master_triggered_~__retres1~0=0, |is_master_triggered_#res|=0, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=1, |old(~t1_st~0)|=1, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] assume true; VAL [is_master_triggered_~__retres1~0=0, |is_master_triggered_#res|=0, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=1, |old(~t1_st~0)|=1, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] RET #683#return; VAL [|activate_threads_#t~ret6|=0, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=1, |old(~t1_st~0)|=1, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] assume -2147483648 <= #t~ret6 && #t~ret6 <= 2147483647;~tmp~1 := #t~ret6;havoc #t~ret6; VAL [activate_threads_~tmp~1=0, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=1, |old(~t1_st~0)|=1, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] assume !(0 != ~tmp~1); VAL [activate_threads_~tmp~1=0, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=1, |old(~t1_st~0)|=1, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] CALL call #t~ret7 := is_transmit1_triggered(); VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=1, |old(~t1_st~0)|=1, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] havoc ~__retres1~1; VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=1, |old(~t1_st~0)|=1, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] assume 1 == ~t1_pc~0; VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=1, |old(~t1_st~0)|=1, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] assume !(1 == ~E_1~0); VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=1, |old(~t1_st~0)|=1, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] ~__retres1~1 := 0; VAL [is_transmit1_triggered_~__retres1~1=0, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=1, |old(~t1_st~0)|=1, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] #res := ~__retres1~1; VAL [is_transmit1_triggered_~__retres1~1=0, |is_transmit1_triggered_#res|=0, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=1, |old(~t1_st~0)|=1, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] assume true; VAL [is_transmit1_triggered_~__retres1~1=0, |is_transmit1_triggered_#res|=0, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=1, |old(~t1_st~0)|=1, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] RET #685#return; VAL [activate_threads_~tmp~1=0, |activate_threads_#t~ret7|=0, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=1, |old(~t1_st~0)|=1, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] assume -2147483648 <= #t~ret7 && #t~ret7 <= 2147483647;~tmp___0~0 := #t~ret7;havoc #t~ret7; VAL [activate_threads_~tmp___0~0=0, activate_threads_~tmp~1=0, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=1, |old(~t1_st~0)|=1, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] assume !(0 != ~tmp___0~0); VAL [activate_threads_~tmp___0~0=0, activate_threads_~tmp~1=0, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=1, |old(~t1_st~0)|=1, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] CALL call #t~ret8 := is_transmit2_triggered(); VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=1, |old(~t1_st~0)|=1, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] havoc ~__retres1~2; VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=1, |old(~t1_st~0)|=1, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] assume 1 == ~t2_pc~0; VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=1, |old(~t1_st~0)|=1, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] assume 1 == ~E_2~0;~__retres1~2 := 1; VAL [is_transmit2_triggered_~__retres1~2=1, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=1, |old(~t1_st~0)|=1, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] #res := ~__retres1~2; VAL [is_transmit2_triggered_~__retres1~2=1, |is_transmit2_triggered_#res|=1, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=1, |old(~t1_st~0)|=1, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] assume true; VAL [is_transmit2_triggered_~__retres1~2=1, |is_transmit2_triggered_#res|=1, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=1, |old(~t1_st~0)|=1, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] RET #687#return; VAL [activate_threads_~tmp___0~0=0, activate_threads_~tmp~1=0, |activate_threads_#t~ret8|=1, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=1, |old(~t1_st~0)|=1, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] assume -2147483648 <= #t~ret8 && #t~ret8 <= 2147483647;~tmp___1~0 := #t~ret8;havoc #t~ret8; VAL [activate_threads_~tmp___0~0=0, activate_threads_~tmp___1~0=1, activate_threads_~tmp~1=0, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=1, |old(~t1_st~0)|=1, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] assume 0 != ~tmp___1~0;~t2_st~0 := 0; VAL [activate_threads_~tmp___0~0=0, activate_threads_~tmp___1~0=1, activate_threads_~tmp~1=0, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=1, |old(~t1_st~0)|=1, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] CALL call #t~ret9 := is_transmit3_triggered(); VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=1, |old(~t1_st~0)|=1, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] havoc ~__retres1~3; VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=1, |old(~t1_st~0)|=1, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] assume 1 == ~t3_pc~0; VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=1, |old(~t1_st~0)|=1, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] assume !(1 == ~E_3~0); VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=1, |old(~t1_st~0)|=1, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] ~__retres1~3 := 0; VAL [is_transmit3_triggered_~__retres1~3=0, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=1, |old(~t1_st~0)|=1, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] #res := ~__retres1~3; VAL [is_transmit3_triggered_~__retres1~3=0, |is_transmit3_triggered_#res|=0, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=1, |old(~t1_st~0)|=1, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] assume true; VAL [is_transmit3_triggered_~__retres1~3=0, |is_transmit3_triggered_#res|=0, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=1, |old(~t1_st~0)|=1, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] RET #689#return; VAL [activate_threads_~tmp___0~0=0, activate_threads_~tmp___1~0=1, activate_threads_~tmp~1=0, |activate_threads_#t~ret9|=0, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=1, |old(~t1_st~0)|=1, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] assume -2147483648 <= #t~ret9 && #t~ret9 <= 2147483647;~tmp___2~0 := #t~ret9;havoc #t~ret9; VAL [activate_threads_~tmp___0~0=0, activate_threads_~tmp___1~0=1, activate_threads_~tmp___2~0=0, activate_threads_~tmp~1=0, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=1, |old(~t1_st~0)|=1, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] assume !(0 != ~tmp___2~0); VAL [activate_threads_~tmp___0~0=0, activate_threads_~tmp___1~0=1, activate_threads_~tmp___2~0=0, activate_threads_~tmp~1=0, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=1, |old(~t1_st~0)|=1, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] CALL call #t~ret10 := is_transmit4_triggered(); VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=1, |old(~t1_st~0)|=1, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] havoc ~__retres1~4; VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=1, |old(~t1_st~0)|=1, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] assume 1 == ~t4_pc~0; VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=1, |old(~t1_st~0)|=1, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] assume !(1 == ~E_4~0); VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=1, |old(~t1_st~0)|=1, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] ~__retres1~4 := 0; VAL [is_transmit4_triggered_~__retres1~4=0, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=1, |old(~t1_st~0)|=1, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] #res := ~__retres1~4; VAL [is_transmit4_triggered_~__retres1~4=0, |is_transmit4_triggered_#res|=0, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=1, |old(~t1_st~0)|=1, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] assume true; VAL [is_transmit4_triggered_~__retres1~4=0, |is_transmit4_triggered_#res|=0, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=1, |old(~t1_st~0)|=1, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] RET #691#return; VAL [activate_threads_~tmp___0~0=0, activate_threads_~tmp___1~0=1, activate_threads_~tmp___2~0=0, activate_threads_~tmp~1=0, |activate_threads_#t~ret10|=0, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=1, |old(~t1_st~0)|=1, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] assume -2147483648 <= #t~ret10 && #t~ret10 <= 2147483647;~tmp___3~0 := #t~ret10;havoc #t~ret10; VAL [activate_threads_~tmp___0~0=0, activate_threads_~tmp___1~0=1, activate_threads_~tmp___2~0=0, activate_threads_~tmp___3~0=0, activate_threads_~tmp~1=0, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=1, |old(~t1_st~0)|=1, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] assume !(0 != ~tmp___3~0); VAL [activate_threads_~tmp___0~0=0, activate_threads_~tmp___1~0=1, activate_threads_~tmp___2~0=0, activate_threads_~tmp___3~0=0, activate_threads_~tmp~1=0, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=1, |old(~t1_st~0)|=1, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] assume true; VAL [activate_threads_~tmp___0~0=0, activate_threads_~tmp___1~0=1, activate_threads_~tmp___2~0=0, activate_threads_~tmp___3~0=0, activate_threads_~tmp~1=0, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=1, |old(~t1_st~0)|=1, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] RET #693#return; VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=1, |old(~t1_st~0)|=1, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] assume true; VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=1, |old(~t1_st~0)|=1, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] RET #669#return; VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=1, |old(~t1_st~0)|=1, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] ~E_2~0 := 2; VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=1, |old(~t1_st~0)|=1, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] assume !false; VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=1, |old(~t1_st~0)|=1, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] ~t1_pc~0 := 1;~t1_st~0 := 2; VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=1, |old(~t1_st~0)|=1, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] assume true; VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=1, |old(~t1_st~0)|=1, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] RET #701#return; VAL [eval_~tmp_ndt_1~0=1, eval_~tmp_ndt_2~0=1, eval_~tmp_ndt_3~0=1, eval_~tmp_ndt_4~0=1, eval_~tmp_ndt_5~0=1, eval_~tmp~0=1, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=0, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=0, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=0, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=0, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] assume 0 == ~t2_st~0;havoc ~tmp_ndt_3~0;assume -2147483648 <= #t~nondet3 && #t~nondet3 <= 2147483647;~tmp_ndt_3~0 := #t~nondet3;havoc #t~nondet3; VAL [eval_~tmp_ndt_1~0=1, eval_~tmp_ndt_2~0=1, eval_~tmp_ndt_3~0=1, eval_~tmp_ndt_4~0=1, eval_~tmp_ndt_5~0=1, eval_~tmp~0=1, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=0, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=0, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=0, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=0, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] assume 0 != ~tmp_ndt_3~0;~t2_st~0 := 1; VAL [eval_~tmp_ndt_1~0=1, eval_~tmp_ndt_2~0=1, eval_~tmp_ndt_3~0=1, eval_~tmp_ndt_4~0=1, eval_~tmp_ndt_5~0=1, eval_~tmp~0=1, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=0, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=0, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=0, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=0, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] CALL call transmit2(); VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=1, |old(~t2_st~0)|=1, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] assume !(0 == ~t2_pc~0); VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=1, |old(~t2_st~0)|=1, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] assume 1 == ~t2_pc~0; VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=1, |old(~t2_st~0)|=1, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] ~E_3~0 := 1; VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=1, |old(~t2_st~0)|=1, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] CALL call immediate_notify(); VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=1, |old(~t2_st~0)|=1, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] CALL call activate_threads(); VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=1, |old(~t2_st~0)|=1, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] havoc ~tmp~1;havoc ~tmp___0~0;havoc ~tmp___1~0;havoc ~tmp___2~0;havoc ~tmp___3~0; VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=1, |old(~t2_st~0)|=1, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] CALL call #t~ret6 := is_master_triggered(); VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=1, |old(~t2_st~0)|=1, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] havoc ~__retres1~0; VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=1, |old(~t2_st~0)|=1, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] assume 1 == ~m_pc~0; VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=1, |old(~t2_st~0)|=1, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] assume !(1 == ~M_E~0); VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=1, |old(~t2_st~0)|=1, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] ~__retres1~0 := 0; VAL [is_master_triggered_~__retres1~0=0, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=1, |old(~t2_st~0)|=1, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] #res := ~__retres1~0; VAL [is_master_triggered_~__retres1~0=0, |is_master_triggered_#res|=0, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=1, |old(~t2_st~0)|=1, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] assume true; VAL [is_master_triggered_~__retres1~0=0, |is_master_triggered_#res|=0, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=1, |old(~t2_st~0)|=1, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] RET #683#return; VAL [|activate_threads_#t~ret6|=0, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=1, |old(~t2_st~0)|=1, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] assume -2147483648 <= #t~ret6 && #t~ret6 <= 2147483647;~tmp~1 := #t~ret6;havoc #t~ret6; VAL [activate_threads_~tmp~1=0, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=1, |old(~t2_st~0)|=1, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] assume !(0 != ~tmp~1); VAL [activate_threads_~tmp~1=0, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=1, |old(~t2_st~0)|=1, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] CALL call #t~ret7 := is_transmit1_triggered(); VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=1, |old(~t2_st~0)|=1, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] havoc ~__retres1~1; VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=1, |old(~t2_st~0)|=1, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] assume 1 == ~t1_pc~0; VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=1, |old(~t2_st~0)|=1, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] assume !(1 == ~E_1~0); VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=1, |old(~t2_st~0)|=1, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] ~__retres1~1 := 0; VAL [is_transmit1_triggered_~__retres1~1=0, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=1, |old(~t2_st~0)|=1, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] #res := ~__retres1~1; VAL [is_transmit1_triggered_~__retres1~1=0, |is_transmit1_triggered_#res|=0, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=1, |old(~t2_st~0)|=1, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] assume true; VAL [is_transmit1_triggered_~__retres1~1=0, |is_transmit1_triggered_#res|=0, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=1, |old(~t2_st~0)|=1, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] RET #685#return; VAL [activate_threads_~tmp~1=0, |activate_threads_#t~ret7|=0, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=1, |old(~t2_st~0)|=1, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] assume -2147483648 <= #t~ret7 && #t~ret7 <= 2147483647;~tmp___0~0 := #t~ret7;havoc #t~ret7; VAL [activate_threads_~tmp___0~0=0, activate_threads_~tmp~1=0, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=1, |old(~t2_st~0)|=1, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] assume !(0 != ~tmp___0~0); VAL [activate_threads_~tmp___0~0=0, activate_threads_~tmp~1=0, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=1, |old(~t2_st~0)|=1, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] CALL call #t~ret8 := is_transmit2_triggered(); VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=1, |old(~t2_st~0)|=1, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] havoc ~__retres1~2; VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=1, |old(~t2_st~0)|=1, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] assume 1 == ~t2_pc~0; VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=1, |old(~t2_st~0)|=1, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] assume !(1 == ~E_2~0); VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=1, |old(~t2_st~0)|=1, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] ~__retres1~2 := 0; VAL [is_transmit2_triggered_~__retres1~2=0, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=1, |old(~t2_st~0)|=1, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] #res := ~__retres1~2; VAL [is_transmit2_triggered_~__retres1~2=0, |is_transmit2_triggered_#res|=0, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=1, |old(~t2_st~0)|=1, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] assume true; VAL [is_transmit2_triggered_~__retres1~2=0, |is_transmit2_triggered_#res|=0, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=1, |old(~t2_st~0)|=1, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] RET #687#return; VAL [activate_threads_~tmp___0~0=0, activate_threads_~tmp~1=0, |activate_threads_#t~ret8|=0, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=1, |old(~t2_st~0)|=1, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] assume -2147483648 <= #t~ret8 && #t~ret8 <= 2147483647;~tmp___1~0 := #t~ret8;havoc #t~ret8; VAL [activate_threads_~tmp___0~0=0, activate_threads_~tmp___1~0=0, activate_threads_~tmp~1=0, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=1, |old(~t2_st~0)|=1, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] assume !(0 != ~tmp___1~0); VAL [activate_threads_~tmp___0~0=0, activate_threads_~tmp___1~0=0, activate_threads_~tmp~1=0, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=1, |old(~t2_st~0)|=1, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] CALL call #t~ret9 := is_transmit3_triggered(); VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=1, |old(~t2_st~0)|=1, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] havoc ~__retres1~3; VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=1, |old(~t2_st~0)|=1, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] assume 1 == ~t3_pc~0; VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=1, |old(~t2_st~0)|=1, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] assume 1 == ~E_3~0;~__retres1~3 := 1; VAL [is_transmit3_triggered_~__retres1~3=1, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=1, |old(~t2_st~0)|=1, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] #res := ~__retres1~3; VAL [is_transmit3_triggered_~__retres1~3=1, |is_transmit3_triggered_#res|=1, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=1, |old(~t2_st~0)|=1, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] assume true; VAL [is_transmit3_triggered_~__retres1~3=1, |is_transmit3_triggered_#res|=1, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=1, |old(~t2_st~0)|=1, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] RET #689#return; VAL [activate_threads_~tmp___0~0=0, activate_threads_~tmp___1~0=0, activate_threads_~tmp~1=0, |activate_threads_#t~ret9|=1, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=1, |old(~t2_st~0)|=1, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] assume -2147483648 <= #t~ret9 && #t~ret9 <= 2147483647;~tmp___2~0 := #t~ret9;havoc #t~ret9; VAL [activate_threads_~tmp___0~0=0, activate_threads_~tmp___1~0=0, activate_threads_~tmp___2~0=1, activate_threads_~tmp~1=0, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=1, |old(~t2_st~0)|=1, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] assume 0 != ~tmp___2~0;~t3_st~0 := 0; VAL [activate_threads_~tmp___0~0=0, activate_threads_~tmp___1~0=0, activate_threads_~tmp___2~0=1, activate_threads_~tmp~1=0, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=1, |old(~t2_st~0)|=1, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] CALL call #t~ret10 := is_transmit4_triggered(); VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=1, |old(~t2_st~0)|=1, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] havoc ~__retres1~4; VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=1, |old(~t2_st~0)|=1, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] assume 1 == ~t4_pc~0; VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=1, |old(~t2_st~0)|=1, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] assume !(1 == ~E_4~0); VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=1, |old(~t2_st~0)|=1, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] ~__retres1~4 := 0; VAL [is_transmit4_triggered_~__retres1~4=0, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=1, |old(~t2_st~0)|=1, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] #res := ~__retres1~4; VAL [is_transmit4_triggered_~__retres1~4=0, |is_transmit4_triggered_#res|=0, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=1, |old(~t2_st~0)|=1, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] assume true; VAL [is_transmit4_triggered_~__retres1~4=0, |is_transmit4_triggered_#res|=0, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=1, |old(~t2_st~0)|=1, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] RET #691#return; VAL [activate_threads_~tmp___0~0=0, activate_threads_~tmp___1~0=0, activate_threads_~tmp___2~0=1, activate_threads_~tmp~1=0, |activate_threads_#t~ret10|=0, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=1, |old(~t2_st~0)|=1, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] assume -2147483648 <= #t~ret10 && #t~ret10 <= 2147483647;~tmp___3~0 := #t~ret10;havoc #t~ret10; VAL [activate_threads_~tmp___0~0=0, activate_threads_~tmp___1~0=0, activate_threads_~tmp___2~0=1, activate_threads_~tmp___3~0=0, activate_threads_~tmp~1=0, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=1, |old(~t2_st~0)|=1, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] assume !(0 != ~tmp___3~0); VAL [activate_threads_~tmp___0~0=0, activate_threads_~tmp___1~0=0, activate_threads_~tmp___2~0=1, activate_threads_~tmp___3~0=0, activate_threads_~tmp~1=0, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=1, |old(~t2_st~0)|=1, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] assume true; VAL [activate_threads_~tmp___0~0=0, activate_threads_~tmp___1~0=0, activate_threads_~tmp___2~0=1, activate_threads_~tmp___3~0=0, activate_threads_~tmp~1=0, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=1, |old(~t2_st~0)|=1, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] RET #693#return; VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=1, |old(~t2_st~0)|=1, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] assume true; VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=1, |old(~t2_st~0)|=1, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] RET #673#return; VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=1, |old(~t2_st~0)|=1, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] ~E_3~0 := 2; VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=1, |old(~t2_st~0)|=1, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] assume !false; VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=1, |old(~t2_st~0)|=1, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] ~t2_pc~0 := 1;~t2_st~0 := 2; VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=1, |old(~t2_st~0)|=1, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] assume true; VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=1, |old(~t2_st~0)|=1, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=2, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] RET #703#return; VAL [eval_~tmp_ndt_1~0=1, eval_~tmp_ndt_2~0=1, eval_~tmp_ndt_3~0=1, eval_~tmp_ndt_4~0=1, eval_~tmp_ndt_5~0=1, eval_~tmp~0=1, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=0, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=0, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=0, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=0, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] assume 0 == ~t3_st~0;havoc ~tmp_ndt_4~0;assume -2147483648 <= #t~nondet4 && #t~nondet4 <= 2147483647;~tmp_ndt_4~0 := #t~nondet4;havoc #t~nondet4; VAL [eval_~tmp_ndt_1~0=1, eval_~tmp_ndt_2~0=1, eval_~tmp_ndt_3~0=1, eval_~tmp_ndt_4~0=1, eval_~tmp_ndt_5~0=1, eval_~tmp~0=1, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=0, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=0, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=0, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=0, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] assume 0 != ~tmp_ndt_4~0;~t3_st~0 := 1; VAL [eval_~tmp_ndt_1~0=1, eval_~tmp_ndt_2~0=1, eval_~tmp_ndt_3~0=1, eval_~tmp_ndt_4~0=1, eval_~tmp_ndt_5~0=1, eval_~tmp~0=1, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=0, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=0, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=0, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=0, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] CALL call transmit3(); VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=1, |old(~t3_st~0)|=1, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] assume !(0 == ~t3_pc~0); VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=1, |old(~t3_st~0)|=1, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] assume 1 == ~t3_pc~0; VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=1, |old(~t3_st~0)|=1, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] ~E_4~0 := 1; VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=1, |old(~t3_st~0)|=1, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] CALL call immediate_notify(); VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=1, |old(~t3_st~0)|=1, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] CALL call activate_threads(); VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=1, |old(~t3_st~0)|=1, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] havoc ~tmp~1;havoc ~tmp___0~0;havoc ~tmp___1~0;havoc ~tmp___2~0;havoc ~tmp___3~0; VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=1, |old(~t3_st~0)|=1, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] CALL call #t~ret6 := is_master_triggered(); VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=1, |old(~t3_st~0)|=1, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] havoc ~__retres1~0; VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=1, |old(~t3_st~0)|=1, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] assume 1 == ~m_pc~0; VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=1, |old(~t3_st~0)|=1, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] assume !(1 == ~M_E~0); VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=1, |old(~t3_st~0)|=1, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] ~__retres1~0 := 0; VAL [is_master_triggered_~__retres1~0=0, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=1, |old(~t3_st~0)|=1, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] #res := ~__retres1~0; VAL [is_master_triggered_~__retres1~0=0, |is_master_triggered_#res|=0, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=1, |old(~t3_st~0)|=1, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] assume true; VAL [is_master_triggered_~__retres1~0=0, |is_master_triggered_#res|=0, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=1, |old(~t3_st~0)|=1, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] RET #683#return; VAL [|activate_threads_#t~ret6|=0, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=1, |old(~t3_st~0)|=1, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] assume -2147483648 <= #t~ret6 && #t~ret6 <= 2147483647;~tmp~1 := #t~ret6;havoc #t~ret6; VAL [activate_threads_~tmp~1=0, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=1, |old(~t3_st~0)|=1, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] assume !(0 != ~tmp~1); VAL [activate_threads_~tmp~1=0, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=1, |old(~t3_st~0)|=1, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] CALL call #t~ret7 := is_transmit1_triggered(); VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=1, |old(~t3_st~0)|=1, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] havoc ~__retres1~1; VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=1, |old(~t3_st~0)|=1, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] assume 1 == ~t1_pc~0; VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=1, |old(~t3_st~0)|=1, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] assume !(1 == ~E_1~0); VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=1, |old(~t3_st~0)|=1, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] ~__retres1~1 := 0; VAL [is_transmit1_triggered_~__retres1~1=0, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=1, |old(~t3_st~0)|=1, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] #res := ~__retres1~1; VAL [is_transmit1_triggered_~__retres1~1=0, |is_transmit1_triggered_#res|=0, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=1, |old(~t3_st~0)|=1, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] assume true; VAL [is_transmit1_triggered_~__retres1~1=0, |is_transmit1_triggered_#res|=0, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=1, |old(~t3_st~0)|=1, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] RET #685#return; VAL [activate_threads_~tmp~1=0, |activate_threads_#t~ret7|=0, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=1, |old(~t3_st~0)|=1, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] assume -2147483648 <= #t~ret7 && #t~ret7 <= 2147483647;~tmp___0~0 := #t~ret7;havoc #t~ret7; VAL [activate_threads_~tmp___0~0=0, activate_threads_~tmp~1=0, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=1, |old(~t3_st~0)|=1, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] assume !(0 != ~tmp___0~0); VAL [activate_threads_~tmp___0~0=0, activate_threads_~tmp~1=0, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=1, |old(~t3_st~0)|=1, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] CALL call #t~ret8 := is_transmit2_triggered(); VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=1, |old(~t3_st~0)|=1, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] havoc ~__retres1~2; VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=1, |old(~t3_st~0)|=1, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] assume 1 == ~t2_pc~0; VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=1, |old(~t3_st~0)|=1, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] assume !(1 == ~E_2~0); VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=1, |old(~t3_st~0)|=1, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] ~__retres1~2 := 0; VAL [is_transmit2_triggered_~__retres1~2=0, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=1, |old(~t3_st~0)|=1, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] #res := ~__retres1~2; VAL [is_transmit2_triggered_~__retres1~2=0, |is_transmit2_triggered_#res|=0, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=1, |old(~t3_st~0)|=1, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] assume true; VAL [is_transmit2_triggered_~__retres1~2=0, |is_transmit2_triggered_#res|=0, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=1, |old(~t3_st~0)|=1, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] RET #687#return; VAL [activate_threads_~tmp___0~0=0, activate_threads_~tmp~1=0, |activate_threads_#t~ret8|=0, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=1, |old(~t3_st~0)|=1, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] assume -2147483648 <= #t~ret8 && #t~ret8 <= 2147483647;~tmp___1~0 := #t~ret8;havoc #t~ret8; VAL [activate_threads_~tmp___0~0=0, activate_threads_~tmp___1~0=0, activate_threads_~tmp~1=0, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=1, |old(~t3_st~0)|=1, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] assume !(0 != ~tmp___1~0); VAL [activate_threads_~tmp___0~0=0, activate_threads_~tmp___1~0=0, activate_threads_~tmp~1=0, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=1, |old(~t3_st~0)|=1, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] CALL call #t~ret9 := is_transmit3_triggered(); VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=1, |old(~t3_st~0)|=1, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] havoc ~__retres1~3; VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=1, |old(~t3_st~0)|=1, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] assume 1 == ~t3_pc~0; VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=1, |old(~t3_st~0)|=1, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] assume !(1 == ~E_3~0); VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=1, |old(~t3_st~0)|=1, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] ~__retres1~3 := 0; VAL [is_transmit3_triggered_~__retres1~3=0, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=1, |old(~t3_st~0)|=1, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] #res := ~__retres1~3; VAL [is_transmit3_triggered_~__retres1~3=0, |is_transmit3_triggered_#res|=0, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=1, |old(~t3_st~0)|=1, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] assume true; VAL [is_transmit3_triggered_~__retres1~3=0, |is_transmit3_triggered_#res|=0, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=1, |old(~t3_st~0)|=1, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] RET #689#return; VAL [activate_threads_~tmp___0~0=0, activate_threads_~tmp___1~0=0, activate_threads_~tmp~1=0, |activate_threads_#t~ret9|=0, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=1, |old(~t3_st~0)|=1, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] assume -2147483648 <= #t~ret9 && #t~ret9 <= 2147483647;~tmp___2~0 := #t~ret9;havoc #t~ret9; VAL [activate_threads_~tmp___0~0=0, activate_threads_~tmp___1~0=0, activate_threads_~tmp___2~0=0, activate_threads_~tmp~1=0, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=1, |old(~t3_st~0)|=1, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] assume !(0 != ~tmp___2~0); VAL [activate_threads_~tmp___0~0=0, activate_threads_~tmp___1~0=0, activate_threads_~tmp___2~0=0, activate_threads_~tmp~1=0, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=1, |old(~t3_st~0)|=1, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] CALL call #t~ret10 := is_transmit4_triggered(); VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=1, |old(~t3_st~0)|=1, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] havoc ~__retres1~4; VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=1, |old(~t3_st~0)|=1, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] assume 1 == ~t4_pc~0; VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=1, |old(~t3_st~0)|=1, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] assume 1 == ~E_4~0;~__retres1~4 := 1; VAL [is_transmit4_triggered_~__retres1~4=1, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=1, |old(~t3_st~0)|=1, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] #res := ~__retres1~4; VAL [is_transmit4_triggered_~__retres1~4=1, |is_transmit4_triggered_#res|=1, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=1, |old(~t3_st~0)|=1, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] assume true; VAL [is_transmit4_triggered_~__retres1~4=1, |is_transmit4_triggered_#res|=1, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=1, |old(~t3_st~0)|=1, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] RET #691#return; VAL [activate_threads_~tmp___0~0=0, activate_threads_~tmp___1~0=0, activate_threads_~tmp___2~0=0, activate_threads_~tmp~1=0, |activate_threads_#t~ret10|=1, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=1, |old(~t3_st~0)|=1, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] assume -2147483648 <= #t~ret10 && #t~ret10 <= 2147483647;~tmp___3~0 := #t~ret10;havoc #t~ret10; VAL [activate_threads_~tmp___0~0=0, activate_threads_~tmp___1~0=0, activate_threads_~tmp___2~0=0, activate_threads_~tmp___3~0=1, activate_threads_~tmp~1=0, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=1, |old(~t3_st~0)|=1, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [?] assume 0 != ~tmp___3~0;~t4_st~0 := 0; VAL [activate_threads_~tmp___0~0=0, activate_threads_~tmp___1~0=0, activate_threads_~tmp___2~0=0, activate_threads_~tmp___3~0=1, activate_threads_~tmp~1=0, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=1, |old(~t3_st~0)|=1, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=0] [?] assume true; VAL [activate_threads_~tmp___0~0=0, activate_threads_~tmp___1~0=0, activate_threads_~tmp___2~0=0, activate_threads_~tmp___3~0=1, activate_threads_~tmp~1=0, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=1, |old(~t3_st~0)|=1, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=0] [?] RET #693#return; VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=1, |old(~t3_st~0)|=1, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=0] [?] assume true; VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=1, |old(~t3_st~0)|=1, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=0] [?] RET #671#return; VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=1, |old(~t3_st~0)|=1, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=0] [?] ~E_4~0 := 2; VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=1, |old(~t3_st~0)|=1, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=0] [?] assume !false; VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=1, |old(~t3_st~0)|=1, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=0] [?] ~t3_pc~0 := 1;~t3_st~0 := 2; VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=1, |old(~t3_st~0)|=1, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=0] [?] assume true; VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=2, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=2, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=2, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=1, |old(~t3_st~0)|=1, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=0] [?] RET #705#return; VAL [eval_~tmp_ndt_1~0=1, eval_~tmp_ndt_2~0=1, eval_~tmp_ndt_3~0=1, eval_~tmp_ndt_4~0=1, eval_~tmp_ndt_5~0=1, eval_~tmp~0=1, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=0, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=0, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=0, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=0, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=0] [?] assume 0 == ~t4_st~0;havoc ~tmp_ndt_5~0;assume -2147483648 <= #t~nondet5 && #t~nondet5 <= 2147483647;~tmp_ndt_5~0 := #t~nondet5;havoc #t~nondet5; VAL [eval_~tmp_ndt_1~0=1, eval_~tmp_ndt_2~0=1, eval_~tmp_ndt_3~0=1, eval_~tmp_ndt_4~0=1, eval_~tmp_ndt_5~0=1, eval_~tmp~0=1, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=0, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=0, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=0, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=0, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=0] [?] assume 0 != ~tmp_ndt_5~0;~t4_st~0 := 1; VAL [eval_~tmp_ndt_1~0=1, eval_~tmp_ndt_2~0=1, eval_~tmp_ndt_3~0=1, eval_~tmp_ndt_4~0=1, eval_~tmp_ndt_5~0=1, eval_~tmp~0=1, |old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=0, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=0, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=0, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=0, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=0, |old(~t4_st~0)|=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=1] [?] CALL call transmit4(); VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=0, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=0, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=0, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=0, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=1, |old(~t4_st~0)|=1, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=1] [?] assume !(0 == ~t4_pc~0); VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=0, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=0, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=0, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=0, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=1, |old(~t4_st~0)|=1, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=1] [?] assume 1 == ~t4_pc~0; VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=0, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=0, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=0, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=0, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=1, |old(~t4_st~0)|=1, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=1] [?] CALL call error(); VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=0, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=0, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=0, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=0, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=1, |old(~t4_st~0)|=1, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=1] [?] assume !false; VAL [|old(~E_1~0)|=2, |old(~E_2~0)|=2, |old(~E_3~0)|=2, |old(~E_4~0)|=2, |old(~M_E~0)|=2, |old(~m_i~0)|=0, |old(~m_pc~0)|=0, |old(~m_st~0)|=0, |old(~T1_E~0)|=2, |old(~t1_i~0)|=0, |old(~t1_pc~0)|=0, |old(~t1_st~0)|=0, |old(~T2_E~0)|=2, |old(~t2_i~0)|=0, |old(~t2_pc~0)|=0, |old(~t2_st~0)|=0, |old(~T3_E~0)|=2, |old(~t3_i~0)|=0, |old(~t3_pc~0)|=0, |old(~t3_st~0)|=0, |old(~T4_E~0)|=2, |old(~t4_i~0)|=0, |old(~t4_pc~0)|=1, |old(~t4_st~0)|=1, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=1] [?] CALL call ULTIMATE.init(); VAL [old(~E_1~0)=21, old(~E_2~0)=5, old(~E_3~0)=25, old(~E_4~0)=11, old(~M_E~0)=17, old(~m_i~0)=7, old(~m_pc~0)=15, old(~m_st~0)=16, old(~T1_E~0)=3, old(~t1_i~0)=19, old(~t1_pc~0)=9, old(~t1_st~0)=4, old(~T2_E~0)=18, old(~t2_i~0)=6, old(~t2_pc~0)=10, old(~t2_st~0)=13, old(~T3_E~0)=23, old(~t3_i~0)=24, old(~t3_pc~0)=8, old(~t3_st~0)=14, old(~T4_E~0)=26, old(~t4_i~0)=20, old(~t4_pc~0)=22, old(~t4_st~0)=12, ~E_1~0=21, ~E_2~0=5, ~E_3~0=25, ~E_4~0=11, ~M_E~0=17, ~m_i~0=7, ~m_pc~0=15, ~m_st~0=16, ~T1_E~0=3, ~t1_i~0=19, ~t1_pc~0=9, ~t1_st~0=4, ~T2_E~0=18, ~t2_i~0=6, ~t2_pc~0=10, ~t2_st~0=13, ~T3_E~0=23, ~t3_i~0=24, ~t3_pc~0=8, ~t3_st~0=14, ~T4_E~0=26, ~t4_i~0=20, ~t4_pc~0=22, ~t4_st~0=12] [L15] ~m_pc~0 := 0; [L16] ~t1_pc~0 := 0; [L17] ~t2_pc~0 := 0; [L18] ~t3_pc~0 := 0; [L19] ~t4_pc~0 := 0; [L20] ~m_st~0 := 0; [L21] ~t1_st~0 := 0; [L22] ~t2_st~0 := 0; [L23] ~t3_st~0 := 0; [L24] ~t4_st~0 := 0; [L25] ~m_i~0 := 0; [L26] ~t1_i~0 := 0; [L27] ~t2_i~0 := 0; [L28] ~t3_i~0 := 0; [L29] ~t4_i~0 := 0; [L30] ~M_E~0 := 2; [L31] ~T1_E~0 := 2; [L32] ~T2_E~0 := 2; [L33] ~T3_E~0 := 2; [L34] ~T4_E~0 := 2; [L35] ~E_1~0 := 2; [L36] ~E_2~0 := 2; [L37] ~E_3~0 := 2; [L38] ~E_4~0 := 2; VAL [old(~E_1~0)=21, old(~E_2~0)=5, old(~E_3~0)=25, old(~E_4~0)=11, old(~M_E~0)=17, old(~m_i~0)=7, old(~m_pc~0)=15, old(~m_st~0)=16, old(~T1_E~0)=3, old(~t1_i~0)=19, old(~t1_pc~0)=9, old(~t1_st~0)=4, old(~T2_E~0)=18, old(~t2_i~0)=6, old(~t2_pc~0)=10, old(~t2_st~0)=13, old(~T3_E~0)=23, old(~t3_i~0)=24, old(~t3_pc~0)=8, old(~t3_st~0)=14, old(~T4_E~0)=26, old(~t4_i~0)=20, old(~t4_pc~0)=22, old(~t4_st~0)=12, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=0, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=0, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=0, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=0, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=0, ~t4_pc~0=0, ~t4_st~0=0] [?] ensures true; VAL [old(~E_1~0)=21, old(~E_2~0)=5, old(~E_3~0)=25, old(~E_4~0)=11, old(~M_E~0)=17, old(~m_i~0)=7, old(~m_pc~0)=15, old(~m_st~0)=16, old(~T1_E~0)=3, old(~t1_i~0)=19, old(~t1_pc~0)=9, old(~t1_st~0)=4, old(~T2_E~0)=18, old(~t2_i~0)=6, old(~t2_pc~0)=10, old(~t2_st~0)=13, old(~T3_E~0)=23, old(~t3_i~0)=24, old(~t3_pc~0)=8, old(~t3_st~0)=14, old(~T4_E~0)=26, old(~t4_i~0)=20, old(~t4_pc~0)=22, old(~t4_st~0)=12, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=0, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=0, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=0, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=0, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=0, ~t4_pc~0=0, ~t4_st~0=0] [?] RET call ULTIMATE.init(); VAL [~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=0, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=0, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=0, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=0, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=0, ~t4_pc~0=0, ~t4_st~0=0] [?] CALL call #t~ret14 := main(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=0, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=0, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=0, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=0, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=0, ~t4_pc~0=0, ~t4_st~0=0] [L811] havoc ~__retres1~6; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=0, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=0, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=0, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=0, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=0, ~t4_pc~0=0, ~t4_st~0=0] [L815] CALL call init_model(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=0, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=0, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=0, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=0, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=0, ~t4_pc~0=0, ~t4_st~0=0] [L723] ~m_i~0 := 1; [L724] ~t1_i~0 := 1; [L725] ~t2_i~0 := 1; [L726] ~t3_i~0 := 1; [L727] ~t4_i~0 := 1; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L719-L731] ensures true; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L815] RET call init_model(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L816] CALL call start_simulation(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L752] havoc ~kernel_st~0; [L753] havoc ~tmp~3; [L754] havoc ~tmp___0~1; [L758] ~kernel_st~0 := 0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~kernel_st~0=0, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L759] CALL call update_channels(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L319-L326] ensures true; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L759] RET call update_channels(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~kernel_st~0=0, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L760] CALL call init_threads(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L331-L335] assume 1 == ~m_i~0; [L332] ~m_st~0 := 0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L336-L340] assume 1 == ~t1_i~0; [L337] ~t1_st~0 := 0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L341-L345] assume 1 == ~t2_i~0; [L342] ~t2_st~0 := 0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L346-L350] assume 1 == ~t3_i~0; [L347] ~t3_st~0 := 0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L351-L355] assume 1 == ~t4_i~0; [L352] ~t4_st~0 := 0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L327-L359] ensures true; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L760] RET call init_threads(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~kernel_st~0=0, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L761] CALL call fire_delta_events(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L492-L496] assume !(0 == ~M_E~0); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L497-L501] assume !(0 == ~T1_E~0); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L502-L506] assume !(0 == ~T2_E~0); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L507-L511] assume !(0 == ~T3_E~0); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L512-L516] assume !(0 == ~T4_E~0); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L517-L521] assume !(0 == ~E_1~0); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L522-L526] assume !(0 == ~E_2~0); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L527-L531] assume !(0 == ~E_3~0); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L532-L536] assume !(0 == ~E_4~0); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L488-L540] ensures true; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L761] RET call fire_delta_events(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~kernel_st~0=0, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L762] CALL call activate_threads(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L595] havoc ~tmp~1; [L596] havoc ~tmp___0~0; [L597] havoc ~tmp___1~0; [L598] havoc ~tmp___2~0; [L599] havoc ~tmp___3~0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L603] CALL call #t~ret6 := is_master_triggered(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L225] havoc ~__retres1~0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L228-L237] assume !(1 == ~m_pc~0); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L238] ~__retres1~0 := 0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~__retres1~0=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L240] #res := ~__retres1~0; VAL [#res=0, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~__retres1~0=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L39] ensures true; VAL [#res=0, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~__retres1~0=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L603] RET call #t~ret6 := is_master_triggered(); VAL [#t~ret6=0, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L603] assume -2147483648 <= #t~ret6 && #t~ret6 <= 2147483647; [L603] ~tmp~1 := #t~ret6; [L603] havoc #t~ret6; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0, ~tmp~1=0] [L605-L609] assume !(0 != ~tmp~1); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0, ~tmp~1=0] [L611] CALL call #t~ret7 := is_transmit1_triggered(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L244] havoc ~__retres1~1; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L247-L256] assume !(1 == ~t1_pc~0); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L257] ~__retres1~1 := 0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~__retres1~1=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L259] #res := ~__retres1~1; VAL [#res=0, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~__retres1~1=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L40] ensures true; VAL [#res=0, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~__retres1~1=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L611] RET call #t~ret7 := is_transmit1_triggered(); VAL [#t~ret7=0, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0, ~tmp~1=0] [L611] assume -2147483648 <= #t~ret7 && #t~ret7 <= 2147483647; [L611] ~tmp___0~0 := #t~ret7; [L611] havoc #t~ret7; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0, ~tmp___0~0=0, ~tmp~1=0] [L613-L617] assume !(0 != ~tmp___0~0); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0, ~tmp___0~0=0, ~tmp~1=0] [L619] CALL call #t~ret8 := is_transmit2_triggered(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L263] havoc ~__retres1~2; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L266-L275] assume !(1 == ~t2_pc~0); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L276] ~__retres1~2 := 0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~__retres1~2=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L278] #res := ~__retres1~2; VAL [#res=0, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~__retres1~2=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L41] ensures true; VAL [#res=0, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~__retres1~2=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L619] RET call #t~ret8 := is_transmit2_triggered(); VAL [#t~ret8=0, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0, ~tmp___0~0=0, ~tmp~1=0] [L619] assume -2147483648 <= #t~ret8 && #t~ret8 <= 2147483647; [L619] ~tmp___1~0 := #t~ret8; [L619] havoc #t~ret8; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0, ~tmp___0~0=0, ~tmp___1~0=0, ~tmp~1=0] [L621-L625] assume !(0 != ~tmp___1~0); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0, ~tmp___0~0=0, ~tmp___1~0=0, ~tmp~1=0] [L627] CALL call #t~ret9 := is_transmit3_triggered(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L282] havoc ~__retres1~3; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L285-L294] assume !(1 == ~t3_pc~0); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L295] ~__retres1~3 := 0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~__retres1~3=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L297] #res := ~__retres1~3; VAL [#res=0, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~__retres1~3=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L42] ensures true; VAL [#res=0, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~__retres1~3=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L627] RET call #t~ret9 := is_transmit3_triggered(); VAL [#t~ret9=0, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0, ~tmp___0~0=0, ~tmp___1~0=0, ~tmp~1=0] [L627] assume -2147483648 <= #t~ret9 && #t~ret9 <= 2147483647; [L627] ~tmp___2~0 := #t~ret9; [L627] havoc #t~ret9; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0, ~tmp___0~0=0, ~tmp___1~0=0, ~tmp___2~0=0, ~tmp~1=0] [L629-L633] assume !(0 != ~tmp___2~0); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0, ~tmp___0~0=0, ~tmp___1~0=0, ~tmp___2~0=0, ~tmp~1=0] [L635] CALL call #t~ret10 := is_transmit4_triggered(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L301] havoc ~__retres1~4; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L304-L313] assume !(1 == ~t4_pc~0); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L314] ~__retres1~4 := 0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~__retres1~4=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L316] #res := ~__retres1~4; VAL [#res=0, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~__retres1~4=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L43] ensures true; VAL [#res=0, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~__retres1~4=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L635] RET call #t~ret10 := is_transmit4_triggered(); VAL [#t~ret10=0, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0, ~tmp___0~0=0, ~tmp___1~0=0, ~tmp___2~0=0, ~tmp~1=0] [L635] assume -2147483648 <= #t~ret10 && #t~ret10 <= 2147483647; [L635] ~tmp___3~0 := #t~ret10; [L635] havoc #t~ret10; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0, ~tmp___0~0=0, ~tmp___1~0=0, ~tmp___2~0=0, ~tmp___3~0=0, ~tmp~1=0] [L637-L641] assume !(0 != ~tmp___3~0); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0, ~tmp___0~0=0, ~tmp___1~0=0, ~tmp___2~0=0, ~tmp___3~0=0, ~tmp~1=0] [L594-L645] ensures true; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0, ~tmp___0~0=0, ~tmp___1~0=0, ~tmp___2~0=0, ~tmp___3~0=0, ~tmp~1=0] [L762] RET call activate_threads(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~kernel_st~0=0, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L763] CALL call reset_delta_events(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L545-L549] assume !(1 == ~M_E~0); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L550-L554] assume !(1 == ~T1_E~0); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L555-L559] assume !(1 == ~T2_E~0); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L560-L564] assume !(1 == ~T3_E~0); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L565-L569] assume !(1 == ~T4_E~0); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L570-L574] assume !(1 == ~E_1~0); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L575-L579] assume !(1 == ~E_2~0); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L580-L584] assume !(1 == ~E_3~0); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L585-L589] assume !(1 == ~E_4~0); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L541-L593] ensures true; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L763] RET call reset_delta_events(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~kernel_st~0=0, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L766-L803] assume !false; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~kernel_st~0=0, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L769] ~kernel_st~0 := 1; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~kernel_st~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L770] CALL call eval(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L397] havoc ~tmp~0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L401-L481] assume !false; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L404] CALL call #t~ret0 := exists_runnable_thread(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L361] havoc ~__retres1~5; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L364-L389] assume 0 == ~m_st~0; [L365] ~__retres1~5 := 1; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~__retres1~5=1, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L392] #res := ~__retres1~5; VAL [#res=1, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~__retres1~5=1, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L360-L394] ensures true; VAL [#res=1, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~__retres1~5=1, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L404] RET call #t~ret0 := exists_runnable_thread(); VAL [#t~ret0=1, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L404] assume -2147483648 <= #t~ret0 && #t~ret0 <= 2147483647; [L404] ~tmp~0 := #t~ret0; [L404] havoc #t~ret0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0, ~tmp~0=1] [L406-L410] assume 0 != ~tmp~0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0, ~tmp~0=1] [L411-L424] assume 0 == ~m_st~0; [L412] havoc ~tmp_ndt_1~0; [L413] assume -2147483648 <= #t~nondet1 && #t~nondet1 <= 2147483647; [L413] ~tmp_ndt_1~0 := #t~nondet1; [L413] havoc #t~nondet1; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0, ~tmp_ndt_1~0=0, ~tmp~0=1] [L414-L421] assume !(0 != ~tmp_ndt_1~0); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0, ~tmp_ndt_1~0=0, ~tmp~0=1] [L425-L438] assume 0 == ~t1_st~0; [L426] havoc ~tmp_ndt_2~0; [L427] assume -2147483648 <= #t~nondet2 && #t~nondet2 <= 2147483647; [L427] ~tmp_ndt_2~0 := #t~nondet2; [L427] havoc #t~nondet2; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0, ~tmp_ndt_1~0=0, ~tmp_ndt_2~0=1, ~tmp~0=1] [L428-L435] assume 0 != ~tmp_ndt_2~0; [L430] ~t1_st~0 := 1; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0, ~tmp_ndt_1~0=0, ~tmp_ndt_2~0=1, ~tmp~0=1] [L431] CALL call transmit1(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L90-L98] assume 0 == ~t1_pc~0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L101-L113] assume !false; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L103] ~t1_pc~0 := 1; [L104] ~t1_st~0 := 2; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L86-L120] ensures true; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L431] RET call transmit1(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0, ~tmp_ndt_1~0=0, ~tmp_ndt_2~0=1, ~tmp~0=1] [L439-L452] assume 0 == ~t2_st~0; [L440] havoc ~tmp_ndt_3~0; [L441] assume -2147483648 <= #t~nondet3 && #t~nondet3 <= 2147483647; [L441] ~tmp_ndt_3~0 := #t~nondet3; [L441] havoc #t~nondet3; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0, ~tmp_ndt_1~0=0, ~tmp_ndt_2~0=1, ~tmp_ndt_3~0=1, ~tmp~0=1] [L442-L449] assume 0 != ~tmp_ndt_3~0; [L444] ~t2_st~0 := 1; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0, ~tmp_ndt_1~0=0, ~tmp_ndt_2~0=1, ~tmp_ndt_3~0=1, ~tmp~0=1] [L445] CALL call transmit2(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L125-L133] assume 0 == ~t2_pc~0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L136-L148] assume !false; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L138] ~t2_pc~0 := 1; [L139] ~t2_st~0 := 2; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L121-L155] ensures true; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L445] RET call transmit2(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0, ~tmp_ndt_1~0=0, ~tmp_ndt_2~0=1, ~tmp_ndt_3~0=1, ~tmp~0=1] [L453-L466] assume 0 == ~t3_st~0; [L454] havoc ~tmp_ndt_4~0; [L455] assume -2147483648 <= #t~nondet4 && #t~nondet4 <= 2147483647; [L455] ~tmp_ndt_4~0 := #t~nondet4; [L455] havoc #t~nondet4; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0, ~tmp_ndt_1~0=0, ~tmp_ndt_2~0=1, ~tmp_ndt_3~0=1, ~tmp_ndt_4~0=1, ~tmp~0=1] [L456-L463] assume 0 != ~tmp_ndt_4~0; [L458] ~t3_st~0 := 1; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0, ~tmp_ndt_1~0=0, ~tmp_ndt_2~0=1, ~tmp_ndt_3~0=1, ~tmp_ndt_4~0=1, ~tmp~0=1] [L459] CALL call transmit3(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L160-L168] assume 0 == ~t3_pc~0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L171-L183] assume !false; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L173] ~t3_pc~0 := 1; [L174] ~t3_st~0 := 2; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L156-L190] ensures true; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L459] RET call transmit3(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0, ~tmp_ndt_1~0=0, ~tmp_ndt_2~0=1, ~tmp_ndt_3~0=1, ~tmp_ndt_4~0=1, ~tmp~0=1] [L467-L480] assume 0 == ~t4_st~0; [L468] havoc ~tmp_ndt_5~0; [L469] assume -2147483648 <= #t~nondet5 && #t~nondet5 <= 2147483647; [L469] ~tmp_ndt_5~0 := #t~nondet5; [L469] havoc #t~nondet5; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0, ~tmp_ndt_1~0=0, ~tmp_ndt_2~0=1, ~tmp_ndt_3~0=1, ~tmp_ndt_4~0=1, ~tmp_ndt_5~0=1, ~tmp~0=1] [L470-L477] assume 0 != ~tmp_ndt_5~0; [L472] ~t4_st~0 := 1; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=1, ~tmp_ndt_1~0=0, ~tmp_ndt_2~0=1, ~tmp_ndt_3~0=1, ~tmp_ndt_4~0=1, ~tmp_ndt_5~0=1, ~tmp~0=1] [L473] CALL call transmit4(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=1, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=1] [L195-L203] assume 0 == ~t4_pc~0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=1, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=1] [L206-L216] assume !false; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=1, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=1] [L208] ~t4_pc~0 := 1; [L209] ~t4_st~0 := 2; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=1, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L191-L223] ensures true; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=1, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L473] RET call transmit4(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp_ndt_1~0=0, ~tmp_ndt_2~0=1, ~tmp_ndt_3~0=1, ~tmp_ndt_4~0=1, ~tmp_ndt_5~0=1, ~tmp~0=1] [L401-L481] assume !false; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp_ndt_1~0=0, ~tmp_ndt_2~0=1, ~tmp_ndt_3~0=1, ~tmp_ndt_4~0=1, ~tmp_ndt_5~0=1, ~tmp~0=1] [L404] CALL call #t~ret0 := exists_runnable_thread(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L361] havoc ~__retres1~5; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L364-L389] assume 0 == ~m_st~0; [L365] ~__retres1~5 := 1; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~__retres1~5=1, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L392] #res := ~__retres1~5; VAL [#res=1, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~__retres1~5=1, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L360-L394] ensures true; VAL [#res=1, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~__retres1~5=1, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L404] RET call #t~ret0 := exists_runnable_thread(); VAL [#t~ret0=1, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp_ndt_1~0=0, ~tmp_ndt_2~0=1, ~tmp_ndt_3~0=1, ~tmp_ndt_4~0=1, ~tmp_ndt_5~0=1, ~tmp~0=1] [L404] assume -2147483648 <= #t~ret0 && #t~ret0 <= 2147483647; [L404] ~tmp~0 := #t~ret0; [L404] havoc #t~ret0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp_ndt_1~0=0, ~tmp_ndt_2~0=1, ~tmp_ndt_3~0=1, ~tmp_ndt_4~0=1, ~tmp_ndt_5~0=1, ~tmp~0=1] [L406-L410] assume 0 != ~tmp~0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp_ndt_1~0=0, ~tmp_ndt_2~0=1, ~tmp_ndt_3~0=1, ~tmp_ndt_4~0=1, ~tmp_ndt_5~0=1, ~tmp~0=1] [L411-L424] assume 0 == ~m_st~0; [L412] havoc ~tmp_ndt_1~0; [L413] assume -2147483648 <= #t~nondet1 && #t~nondet1 <= 2147483647; [L413] ~tmp_ndt_1~0 := #t~nondet1; [L413] havoc #t~nondet1; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp_ndt_1~0=1, ~tmp_ndt_2~0=1, ~tmp_ndt_3~0=1, ~tmp_ndt_4~0=1, ~tmp_ndt_5~0=1, ~tmp~0=1] [L414-L421] assume 0 != ~tmp_ndt_1~0; [L416] ~m_st~0 := 1; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp_ndt_1~0=1, ~tmp_ndt_2~0=1, ~tmp_ndt_3~0=1, ~tmp_ndt_4~0=1, ~tmp_ndt_5~0=1, ~tmp~0=1] [L417] CALL call master(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L49-L57] assume 0 == ~m_pc~0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L60-L78] assume !false; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L63] ~E_1~0 := 1; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L64] CALL call immediate_notify(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L651] CALL call activate_threads(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L595] havoc ~tmp~1; [L596] havoc ~tmp___0~0; [L597] havoc ~tmp___1~0; [L598] havoc ~tmp___2~0; [L599] havoc ~tmp___3~0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L603] CALL call #t~ret6 := is_master_triggered(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L225] havoc ~__retres1~0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L228-L237] assume !(1 == ~m_pc~0); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L238] ~__retres1~0 := 0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~__retres1~0=0, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L240] #res := ~__retres1~0; VAL [#res=0, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~__retres1~0=0, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L39] ensures true; VAL [#res=0, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~__retres1~0=0, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L603] RET call #t~ret6 := is_master_triggered(); VAL [#t~ret6=0, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L603] assume -2147483648 <= #t~ret6 && #t~ret6 <= 2147483647; [L603] ~tmp~1 := #t~ret6; [L603] havoc #t~ret6; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp~1=0] [L605-L609] assume !(0 != ~tmp~1); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp~1=0] [L611] CALL call #t~ret7 := is_transmit1_triggered(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L244] havoc ~__retres1~1; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L247-L256] assume 1 == ~t1_pc~0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L248-L253] assume 1 == ~E_1~0; [L249] ~__retres1~1 := 1; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~__retres1~1=1, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L259] #res := ~__retres1~1; VAL [#res=1, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~__retres1~1=1, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L40] ensures true; VAL [#res=1, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~__retres1~1=1, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L611] RET call #t~ret7 := is_transmit1_triggered(); VAL [#t~ret7=1, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp~1=0] [L611] assume -2147483648 <= #t~ret7 && #t~ret7 <= 2147483647; [L611] ~tmp___0~0 := #t~ret7; [L611] havoc #t~ret7; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp___0~0=1, ~tmp~1=0] [L613-L617] assume 0 != ~tmp___0~0; [L614] ~t1_st~0 := 0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp___0~0=1, ~tmp~1=0] [L619] CALL call #t~ret8 := is_transmit2_triggered(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L263] havoc ~__retres1~2; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L266-L275] assume 1 == ~t2_pc~0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L267-L272] assume !(1 == ~E_2~0); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L276] ~__retres1~2 := 0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~__retres1~2=0, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L278] #res := ~__retres1~2; VAL [#res=0, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~__retres1~2=0, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L41] ensures true; VAL [#res=0, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~__retres1~2=0, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L619] RET call #t~ret8 := is_transmit2_triggered(); VAL [#t~ret8=0, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp___0~0=1, ~tmp~1=0] [L619] assume -2147483648 <= #t~ret8 && #t~ret8 <= 2147483647; [L619] ~tmp___1~0 := #t~ret8; [L619] havoc #t~ret8; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp___0~0=1, ~tmp___1~0=0, ~tmp~1=0] [L621-L625] assume !(0 != ~tmp___1~0); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp___0~0=1, ~tmp___1~0=0, ~tmp~1=0] [L627] CALL call #t~ret9 := is_transmit3_triggered(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L282] havoc ~__retres1~3; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L285-L294] assume 1 == ~t3_pc~0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L286-L291] assume !(1 == ~E_3~0); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L295] ~__retres1~3 := 0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~__retres1~3=0, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L297] #res := ~__retres1~3; VAL [#res=0, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~__retres1~3=0, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L42] ensures true; VAL [#res=0, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~__retres1~3=0, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L627] RET call #t~ret9 := is_transmit3_triggered(); VAL [#t~ret9=0, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp___0~0=1, ~tmp___1~0=0, ~tmp~1=0] [L627] assume -2147483648 <= #t~ret9 && #t~ret9 <= 2147483647; [L627] ~tmp___2~0 := #t~ret9; [L627] havoc #t~ret9; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp___0~0=1, ~tmp___1~0=0, ~tmp___2~0=0, ~tmp~1=0] [L629-L633] assume !(0 != ~tmp___2~0); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp___0~0=1, ~tmp___1~0=0, ~tmp___2~0=0, ~tmp~1=0] [L635] CALL call #t~ret10 := is_transmit4_triggered(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L301] havoc ~__retres1~4; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L304-L313] assume 1 == ~t4_pc~0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L305-L310] assume !(1 == ~E_4~0); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L314] ~__retres1~4 := 0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~__retres1~4=0, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L316] #res := ~__retres1~4; VAL [#res=0, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~__retres1~4=0, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L43] ensures true; VAL [#res=0, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~__retres1~4=0, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L635] RET call #t~ret10 := is_transmit4_triggered(); VAL [#t~ret10=0, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp___0~0=1, ~tmp___1~0=0, ~tmp___2~0=0, ~tmp~1=0] [L635] assume -2147483648 <= #t~ret10 && #t~ret10 <= 2147483647; [L635] ~tmp___3~0 := #t~ret10; [L635] havoc #t~ret10; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp___0~0=1, ~tmp___1~0=0, ~tmp___2~0=0, ~tmp___3~0=0, ~tmp~1=0] [L637-L641] assume !(0 != ~tmp___3~0); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp___0~0=1, ~tmp___1~0=0, ~tmp___2~0=0, ~tmp___3~0=0, ~tmp~1=0] [L594-L645] ensures true; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp___0~0=1, ~tmp___1~0=0, ~tmp___2~0=0, ~tmp___3~0=0, ~tmp~1=0] [L651] RET call activate_threads(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L44] ensures true; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L64] RET call immediate_notify(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L65] ~E_1~0 := 2; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L68-L75] assume !false; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L70] ~m_pc~0 := 1; [L71] ~m_st~0 := 2; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L45-L85] ensures true; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L417] RET call master(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp_ndt_1~0=1, ~tmp_ndt_2~0=1, ~tmp_ndt_3~0=1, ~tmp_ndt_4~0=1, ~tmp_ndt_5~0=1, ~tmp~0=1] [L425-L438] assume 0 == ~t1_st~0; [L426] havoc ~tmp_ndt_2~0; [L427] assume -2147483648 <= #t~nondet2 && #t~nondet2 <= 2147483647; [L427] ~tmp_ndt_2~0 := #t~nondet2; [L427] havoc #t~nondet2; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp_ndt_1~0=1, ~tmp_ndt_2~0=1, ~tmp_ndt_3~0=1, ~tmp_ndt_4~0=1, ~tmp_ndt_5~0=1, ~tmp~0=1] [L428-L435] assume 0 != ~tmp_ndt_2~0; [L430] ~t1_st~0 := 1; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp_ndt_1~0=1, ~tmp_ndt_2~0=1, ~tmp_ndt_3~0=1, ~tmp_ndt_4~0=1, ~tmp_ndt_5~0=1, ~tmp~0=1] [L431] CALL call transmit1(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=1, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L90-L98] assume !(0 == ~t1_pc~0); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=1, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L93-L97] assume 1 == ~t1_pc~0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=1, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L109] ~E_2~0 := 1; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=1, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L110] CALL call immediate_notify(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=1, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L651] CALL call activate_threads(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=1, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L595] havoc ~tmp~1; [L596] havoc ~tmp___0~0; [L597] havoc ~tmp___1~0; [L598] havoc ~tmp___2~0; [L599] havoc ~tmp___3~0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=1, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L603] CALL call #t~ret6 := is_master_triggered(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=1, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L225] havoc ~__retres1~0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=1, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L228-L237] assume 1 == ~m_pc~0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=1, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L229-L234] assume !(1 == ~M_E~0); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=1, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L238] ~__retres1~0 := 0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=1, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~__retres1~0=0, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L240] #res := ~__retres1~0; VAL [#res=0, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=1, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~__retres1~0=0, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L39] ensures true; VAL [#res=0, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=1, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~__retres1~0=0, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L603] RET call #t~ret6 := is_master_triggered(); VAL [#t~ret6=0, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=1, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L603] assume -2147483648 <= #t~ret6 && #t~ret6 <= 2147483647; [L603] ~tmp~1 := #t~ret6; [L603] havoc #t~ret6; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=1, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp~1=0] [L605-L609] assume !(0 != ~tmp~1); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=1, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp~1=0] [L611] CALL call #t~ret7 := is_transmit1_triggered(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=1, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L244] havoc ~__retres1~1; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=1, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L247-L256] assume 1 == ~t1_pc~0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=1, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L248-L253] assume !(1 == ~E_1~0); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=1, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L257] ~__retres1~1 := 0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=1, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~__retres1~1=0, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L259] #res := ~__retres1~1; VAL [#res=0, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=1, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~__retres1~1=0, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L40] ensures true; VAL [#res=0, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=1, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~__retres1~1=0, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L611] RET call #t~ret7 := is_transmit1_triggered(); VAL [#t~ret7=0, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=1, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp~1=0] [L611] assume -2147483648 <= #t~ret7 && #t~ret7 <= 2147483647; [L611] ~tmp___0~0 := #t~ret7; [L611] havoc #t~ret7; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=1, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp___0~0=0, ~tmp~1=0] [L613-L617] assume !(0 != ~tmp___0~0); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=1, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp___0~0=0, ~tmp~1=0] [L619] CALL call #t~ret8 := is_transmit2_triggered(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=1, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L263] havoc ~__retres1~2; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=1, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L266-L275] assume 1 == ~t2_pc~0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=1, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L267-L272] assume 1 == ~E_2~0; [L268] ~__retres1~2 := 1; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=1, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~__retres1~2=1, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L278] #res := ~__retres1~2; VAL [#res=1, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=1, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~__retres1~2=1, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L41] ensures true; VAL [#res=1, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=1, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~__retres1~2=1, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L619] RET call #t~ret8 := is_transmit2_triggered(); VAL [#t~ret8=1, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=1, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp___0~0=0, ~tmp~1=0] [L619] assume -2147483648 <= #t~ret8 && #t~ret8 <= 2147483647; [L619] ~tmp___1~0 := #t~ret8; [L619] havoc #t~ret8; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=1, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp___0~0=0, ~tmp___1~0=1, ~tmp~1=0] [L621-L625] assume 0 != ~tmp___1~0; [L622] ~t2_st~0 := 0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=1, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp___0~0=0, ~tmp___1~0=1, ~tmp~1=0] [L627] CALL call #t~ret9 := is_transmit3_triggered(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=1, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L282] havoc ~__retres1~3; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=1, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L285-L294] assume 1 == ~t3_pc~0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=1, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L286-L291] assume !(1 == ~E_3~0); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=1, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L295] ~__retres1~3 := 0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=1, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~__retres1~3=0, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L297] #res := ~__retres1~3; VAL [#res=0, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=1, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~__retres1~3=0, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L42] ensures true; VAL [#res=0, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=1, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~__retres1~3=0, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L627] RET call #t~ret9 := is_transmit3_triggered(); VAL [#t~ret9=0, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=1, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp___0~0=0, ~tmp___1~0=1, ~tmp~1=0] [L627] assume -2147483648 <= #t~ret9 && #t~ret9 <= 2147483647; [L627] ~tmp___2~0 := #t~ret9; [L627] havoc #t~ret9; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=1, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp___0~0=0, ~tmp___1~0=1, ~tmp___2~0=0, ~tmp~1=0] [L629-L633] assume !(0 != ~tmp___2~0); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=1, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp___0~0=0, ~tmp___1~0=1, ~tmp___2~0=0, ~tmp~1=0] [L635] CALL call #t~ret10 := is_transmit4_triggered(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=1, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L301] havoc ~__retres1~4; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=1, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L304-L313] assume 1 == ~t4_pc~0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=1, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L305-L310] assume !(1 == ~E_4~0); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=1, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L314] ~__retres1~4 := 0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=1, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~__retres1~4=0, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L316] #res := ~__retres1~4; VAL [#res=0, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=1, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~__retres1~4=0, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L43] ensures true; VAL [#res=0, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=1, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~__retres1~4=0, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L635] RET call #t~ret10 := is_transmit4_triggered(); VAL [#t~ret10=0, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=1, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp___0~0=0, ~tmp___1~0=1, ~tmp___2~0=0, ~tmp~1=0] [L635] assume -2147483648 <= #t~ret10 && #t~ret10 <= 2147483647; [L635] ~tmp___3~0 := #t~ret10; [L635] havoc #t~ret10; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=1, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp___0~0=0, ~tmp___1~0=1, ~tmp___2~0=0, ~tmp___3~0=0, ~tmp~1=0] [L637-L641] assume !(0 != ~tmp___3~0); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=1, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp___0~0=0, ~tmp___1~0=1, ~tmp___2~0=0, ~tmp___3~0=0, ~tmp~1=0] [L594-L645] ensures true; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=1, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp___0~0=0, ~tmp___1~0=1, ~tmp___2~0=0, ~tmp___3~0=0, ~tmp~1=0] [L651] RET call activate_threads(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=1, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L44] ensures true; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=1, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L110] RET call immediate_notify(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=1, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L111] ~E_2~0 := 2; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=1, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L101-L113] assume !false; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=1, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L103] ~t1_pc~0 := 1; [L104] ~t1_st~0 := 2; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=1, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L86-L120] ensures true; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=1, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L431] RET call transmit1(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp_ndt_1~0=1, ~tmp_ndt_2~0=1, ~tmp_ndt_3~0=1, ~tmp_ndt_4~0=1, ~tmp_ndt_5~0=1, ~tmp~0=1] [L439-L452] assume 0 == ~t2_st~0; [L440] havoc ~tmp_ndt_3~0; [L441] assume -2147483648 <= #t~nondet3 && #t~nondet3 <= 2147483647; [L441] ~tmp_ndt_3~0 := #t~nondet3; [L441] havoc #t~nondet3; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp_ndt_1~0=1, ~tmp_ndt_2~0=1, ~tmp_ndt_3~0=1, ~tmp_ndt_4~0=1, ~tmp_ndt_5~0=1, ~tmp~0=1] [L442-L449] assume 0 != ~tmp_ndt_3~0; [L444] ~t2_st~0 := 1; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp_ndt_1~0=1, ~tmp_ndt_2~0=1, ~tmp_ndt_3~0=1, ~tmp_ndt_4~0=1, ~tmp_ndt_5~0=1, ~tmp~0=1] [L445] CALL call transmit2(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=1, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L125-L133] assume !(0 == ~t2_pc~0); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=1, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L128-L132] assume 1 == ~t2_pc~0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=1, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L144] ~E_3~0 := 1; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=1, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L145] CALL call immediate_notify(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=1, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L651] CALL call activate_threads(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=1, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L595] havoc ~tmp~1; [L596] havoc ~tmp___0~0; [L597] havoc ~tmp___1~0; [L598] havoc ~tmp___2~0; [L599] havoc ~tmp___3~0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=1, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L603] CALL call #t~ret6 := is_master_triggered(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=1, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L225] havoc ~__retres1~0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=1, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L228-L237] assume 1 == ~m_pc~0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=1, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L229-L234] assume !(1 == ~M_E~0); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=1, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L238] ~__retres1~0 := 0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=1, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~__retres1~0=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L240] #res := ~__retres1~0; VAL [#res=0, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=1, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~__retres1~0=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L39] ensures true; VAL [#res=0, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=1, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~__retres1~0=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L603] RET call #t~ret6 := is_master_triggered(); VAL [#t~ret6=0, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=1, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L603] assume -2147483648 <= #t~ret6 && #t~ret6 <= 2147483647; [L603] ~tmp~1 := #t~ret6; [L603] havoc #t~ret6; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=1, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp~1=0] [L605-L609] assume !(0 != ~tmp~1); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=1, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp~1=0] [L611] CALL call #t~ret7 := is_transmit1_triggered(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=1, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L244] havoc ~__retres1~1; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=1, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L247-L256] assume 1 == ~t1_pc~0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=1, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L248-L253] assume !(1 == ~E_1~0); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=1, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L257] ~__retres1~1 := 0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=1, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~__retres1~1=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L259] #res := ~__retres1~1; VAL [#res=0, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=1, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~__retres1~1=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L40] ensures true; VAL [#res=0, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=1, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~__retres1~1=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L611] RET call #t~ret7 := is_transmit1_triggered(); VAL [#t~ret7=0, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=1, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp~1=0] [L611] assume -2147483648 <= #t~ret7 && #t~ret7 <= 2147483647; [L611] ~tmp___0~0 := #t~ret7; [L611] havoc #t~ret7; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=1, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp___0~0=0, ~tmp~1=0] [L613-L617] assume !(0 != ~tmp___0~0); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=1, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp___0~0=0, ~tmp~1=0] [L619] CALL call #t~ret8 := is_transmit2_triggered(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=1, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L263] havoc ~__retres1~2; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=1, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L266-L275] assume 1 == ~t2_pc~0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=1, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L267-L272] assume !(1 == ~E_2~0); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=1, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L276] ~__retres1~2 := 0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=1, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~__retres1~2=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L278] #res := ~__retres1~2; VAL [#res=0, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=1, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~__retres1~2=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L41] ensures true; VAL [#res=0, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=1, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~__retres1~2=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L619] RET call #t~ret8 := is_transmit2_triggered(); VAL [#t~ret8=0, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=1, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp___0~0=0, ~tmp~1=0] [L619] assume -2147483648 <= #t~ret8 && #t~ret8 <= 2147483647; [L619] ~tmp___1~0 := #t~ret8; [L619] havoc #t~ret8; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=1, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp___0~0=0, ~tmp___1~0=0, ~tmp~1=0] [L621-L625] assume !(0 != ~tmp___1~0); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=1, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp___0~0=0, ~tmp___1~0=0, ~tmp~1=0] [L627] CALL call #t~ret9 := is_transmit3_triggered(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=1, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L282] havoc ~__retres1~3; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=1, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L285-L294] assume 1 == ~t3_pc~0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=1, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L286-L291] assume 1 == ~E_3~0; [L287] ~__retres1~3 := 1; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=1, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~__retres1~3=1, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L297] #res := ~__retres1~3; VAL [#res=1, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=1, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~__retres1~3=1, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L42] ensures true; VAL [#res=1, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=1, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~__retres1~3=1, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L627] RET call #t~ret9 := is_transmit3_triggered(); VAL [#t~ret9=1, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=1, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp___0~0=0, ~tmp___1~0=0, ~tmp~1=0] [L627] assume -2147483648 <= #t~ret9 && #t~ret9 <= 2147483647; [L627] ~tmp___2~0 := #t~ret9; [L627] havoc #t~ret9; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=1, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp___0~0=0, ~tmp___1~0=0, ~tmp___2~0=1, ~tmp~1=0] [L629-L633] assume 0 != ~tmp___2~0; [L630] ~t3_st~0 := 0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=1, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp___0~0=0, ~tmp___1~0=0, ~tmp___2~0=1, ~tmp~1=0] [L635] CALL call #t~ret10 := is_transmit4_triggered(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=1, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L301] havoc ~__retres1~4; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=1, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L304-L313] assume 1 == ~t4_pc~0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=1, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L305-L310] assume !(1 == ~E_4~0); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=1, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L314] ~__retres1~4 := 0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=1, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~__retres1~4=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L316] #res := ~__retres1~4; VAL [#res=0, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=1, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~__retres1~4=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L43] ensures true; VAL [#res=0, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=1, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~__retres1~4=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L635] RET call #t~ret10 := is_transmit4_triggered(); VAL [#t~ret10=0, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=1, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp___0~0=0, ~tmp___1~0=0, ~tmp___2~0=1, ~tmp~1=0] [L635] assume -2147483648 <= #t~ret10 && #t~ret10 <= 2147483647; [L635] ~tmp___3~0 := #t~ret10; [L635] havoc #t~ret10; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=1, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp___0~0=0, ~tmp___1~0=0, ~tmp___2~0=1, ~tmp___3~0=0, ~tmp~1=0] [L637-L641] assume !(0 != ~tmp___3~0); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=1, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp___0~0=0, ~tmp___1~0=0, ~tmp___2~0=1, ~tmp___3~0=0, ~tmp~1=0] [L594-L645] ensures true; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=1, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp___0~0=0, ~tmp___1~0=0, ~tmp___2~0=1, ~tmp___3~0=0, ~tmp~1=0] [L651] RET call activate_threads(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=1, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L44] ensures true; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=1, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L145] RET call immediate_notify(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=1, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L146] ~E_3~0 := 2; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=1, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L136-L148] assume !false; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=1, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L138] ~t2_pc~0 := 1; [L139] ~t2_st~0 := 2; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=1, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L121-L155] ensures true; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=1, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L445] RET call transmit2(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp_ndt_1~0=1, ~tmp_ndt_2~0=1, ~tmp_ndt_3~0=1, ~tmp_ndt_4~0=1, ~tmp_ndt_5~0=1, ~tmp~0=1] [L453-L466] assume 0 == ~t3_st~0; [L454] havoc ~tmp_ndt_4~0; [L455] assume -2147483648 <= #t~nondet4 && #t~nondet4 <= 2147483647; [L455] ~tmp_ndt_4~0 := #t~nondet4; [L455] havoc #t~nondet4; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp_ndt_1~0=1, ~tmp_ndt_2~0=1, ~tmp_ndt_3~0=1, ~tmp_ndt_4~0=1, ~tmp_ndt_5~0=1, ~tmp~0=1] [L456-L463] assume 0 != ~tmp_ndt_4~0; [L458] ~t3_st~0 := 1; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp_ndt_1~0=1, ~tmp_ndt_2~0=1, ~tmp_ndt_3~0=1, ~tmp_ndt_4~0=1, ~tmp_ndt_5~0=1, ~tmp~0=1] [L459] CALL call transmit3(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=1, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L160-L168] assume !(0 == ~t3_pc~0); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=1, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L163-L167] assume 1 == ~t3_pc~0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=1, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L179] ~E_4~0 := 1; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=1, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L180] CALL call immediate_notify(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=1, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L651] CALL call activate_threads(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=1, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L595] havoc ~tmp~1; [L596] havoc ~tmp___0~0; [L597] havoc ~tmp___1~0; [L598] havoc ~tmp___2~0; [L599] havoc ~tmp___3~0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=1, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L603] CALL call #t~ret6 := is_master_triggered(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=1, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L225] havoc ~__retres1~0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=1, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L228-L237] assume 1 == ~m_pc~0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=1, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L229-L234] assume !(1 == ~M_E~0); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=1, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L238] ~__retres1~0 := 0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=1, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~__retres1~0=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L240] #res := ~__retres1~0; VAL [#res=0, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=1, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~__retres1~0=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L39] ensures true; VAL [#res=0, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=1, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~__retres1~0=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L603] RET call #t~ret6 := is_master_triggered(); VAL [#t~ret6=0, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=1, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L603] assume -2147483648 <= #t~ret6 && #t~ret6 <= 2147483647; [L603] ~tmp~1 := #t~ret6; [L603] havoc #t~ret6; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=1, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp~1=0] [L605-L609] assume !(0 != ~tmp~1); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=1, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp~1=0] [L611] CALL call #t~ret7 := is_transmit1_triggered(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=1, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L244] havoc ~__retres1~1; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=1, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L247-L256] assume 1 == ~t1_pc~0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=1, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L248-L253] assume !(1 == ~E_1~0); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=1, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L257] ~__retres1~1 := 0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=1, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~__retres1~1=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L259] #res := ~__retres1~1; VAL [#res=0, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=1, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~__retres1~1=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L40] ensures true; VAL [#res=0, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=1, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~__retres1~1=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L611] RET call #t~ret7 := is_transmit1_triggered(); VAL [#t~ret7=0, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=1, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp~1=0] [L611] assume -2147483648 <= #t~ret7 && #t~ret7 <= 2147483647; [L611] ~tmp___0~0 := #t~ret7; [L611] havoc #t~ret7; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=1, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp___0~0=0, ~tmp~1=0] [L613-L617] assume !(0 != ~tmp___0~0); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=1, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp___0~0=0, ~tmp~1=0] [L619] CALL call #t~ret8 := is_transmit2_triggered(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=1, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L263] havoc ~__retres1~2; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=1, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L266-L275] assume 1 == ~t2_pc~0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=1, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L267-L272] assume !(1 == ~E_2~0); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=1, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L276] ~__retres1~2 := 0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=1, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~__retres1~2=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L278] #res := ~__retres1~2; VAL [#res=0, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=1, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~__retres1~2=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L41] ensures true; VAL [#res=0, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=1, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~__retres1~2=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L619] RET call #t~ret8 := is_transmit2_triggered(); VAL [#t~ret8=0, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=1, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp___0~0=0, ~tmp~1=0] [L619] assume -2147483648 <= #t~ret8 && #t~ret8 <= 2147483647; [L619] ~tmp___1~0 := #t~ret8; [L619] havoc #t~ret8; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=1, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp___0~0=0, ~tmp___1~0=0, ~tmp~1=0] [L621-L625] assume !(0 != ~tmp___1~0); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=1, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp___0~0=0, ~tmp___1~0=0, ~tmp~1=0] [L627] CALL call #t~ret9 := is_transmit3_triggered(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=1, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L282] havoc ~__retres1~3; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=1, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L285-L294] assume 1 == ~t3_pc~0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=1, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L286-L291] assume !(1 == ~E_3~0); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=1, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L295] ~__retres1~3 := 0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=1, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~__retres1~3=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L297] #res := ~__retres1~3; VAL [#res=0, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=1, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~__retres1~3=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L42] ensures true; VAL [#res=0, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=1, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~__retres1~3=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L627] RET call #t~ret9 := is_transmit3_triggered(); VAL [#t~ret9=0, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=1, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp___0~0=0, ~tmp___1~0=0, ~tmp~1=0] [L627] assume -2147483648 <= #t~ret9 && #t~ret9 <= 2147483647; [L627] ~tmp___2~0 := #t~ret9; [L627] havoc #t~ret9; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=1, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp___0~0=0, ~tmp___1~0=0, ~tmp___2~0=0, ~tmp~1=0] [L629-L633] assume !(0 != ~tmp___2~0); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=1, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp___0~0=0, ~tmp___1~0=0, ~tmp___2~0=0, ~tmp~1=0] [L635] CALL call #t~ret10 := is_transmit4_triggered(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=1, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L301] havoc ~__retres1~4; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=1, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L304-L313] assume 1 == ~t4_pc~0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=1, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L305-L310] assume 1 == ~E_4~0; [L306] ~__retres1~4 := 1; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=1, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~__retres1~4=1, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L316] #res := ~__retres1~4; VAL [#res=1, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=1, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~__retres1~4=1, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L43] ensures true; VAL [#res=1, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=1, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~__retres1~4=1, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L635] RET call #t~ret10 := is_transmit4_triggered(); VAL [#t~ret10=1, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=1, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp___0~0=0, ~tmp___1~0=0, ~tmp___2~0=0, ~tmp~1=0] [L635] assume -2147483648 <= #t~ret10 && #t~ret10 <= 2147483647; [L635] ~tmp___3~0 := #t~ret10; [L635] havoc #t~ret10; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=1, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp___0~0=0, ~tmp___1~0=0, ~tmp___2~0=0, ~tmp___3~0=1, ~tmp~1=0] [L637-L641] assume 0 != ~tmp___3~0; [L638] ~t4_st~0 := 0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=1, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=0, ~tmp___0~0=0, ~tmp___1~0=0, ~tmp___2~0=0, ~tmp___3~0=1, ~tmp~1=0] [L594-L645] ensures true; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=1, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=0, ~tmp___0~0=0, ~tmp___1~0=0, ~tmp___2~0=0, ~tmp___3~0=1, ~tmp~1=0] [L651] RET call activate_threads(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=1, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=0] [L44] ensures true; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=1, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=0] [L180] RET call immediate_notify(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=1, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=0] [L181] ~E_4~0 := 2; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=1, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=0] [L171-L183] assume !false; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=1, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=0] [L173] ~t3_pc~0 := 1; [L174] ~t3_st~0 := 2; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=1, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=0] [L156-L190] ensures true; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=1, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=0] [L459] RET call transmit3(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=0, ~tmp_ndt_1~0=1, ~tmp_ndt_2~0=1, ~tmp_ndt_3~0=1, ~tmp_ndt_4~0=1, ~tmp_ndt_5~0=1, ~tmp~0=1] [L467-L480] assume 0 == ~t4_st~0; [L468] havoc ~tmp_ndt_5~0; [L469] assume -2147483648 <= #t~nondet5 && #t~nondet5 <= 2147483647; [L469] ~tmp_ndt_5~0 := #t~nondet5; [L469] havoc #t~nondet5; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=0, ~tmp_ndt_1~0=1, ~tmp_ndt_2~0=1, ~tmp_ndt_3~0=1, ~tmp_ndt_4~0=1, ~tmp_ndt_5~0=1, ~tmp~0=1] [L470-L477] assume 0 != ~tmp_ndt_5~0; [L472] ~t4_st~0 := 1; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=1, ~tmp_ndt_1~0=1, ~tmp_ndt_2~0=1, ~tmp_ndt_3~0=1, ~tmp_ndt_4~0=1, ~tmp_ndt_5~0=1, ~tmp~0=1] [L473] CALL call transmit4(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=1, old(~t4_st~0)=1, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=1] [L195-L203] assume !(0 == ~t4_pc~0); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=1, old(~t4_st~0)=1, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=1] [L198-L202] assume 1 == ~t4_pc~0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=1, old(~t4_st~0)=1, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=1] [L214] CALL call error(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=1, old(~t4_st~0)=1, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=1] [L11] assert false; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=1, old(~t4_st~0)=1, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=1] ----- ----- class de.uni_freiburg.informatik.ultimate.boogie.preprocessor.BoogiePreprocessorBacktranslator [?] CALL call ULTIMATE.init(); VAL [old(~E_1~0)=21, old(~E_2~0)=5, old(~E_3~0)=25, old(~E_4~0)=11, old(~M_E~0)=17, old(~m_i~0)=7, old(~m_pc~0)=15, old(~m_st~0)=16, old(~T1_E~0)=3, old(~t1_i~0)=19, old(~t1_pc~0)=9, old(~t1_st~0)=4, old(~T2_E~0)=18, old(~t2_i~0)=6, old(~t2_pc~0)=10, old(~t2_st~0)=13, old(~T3_E~0)=23, old(~t3_i~0)=24, old(~t3_pc~0)=8, old(~t3_st~0)=14, old(~T4_E~0)=26, old(~t4_i~0)=20, old(~t4_pc~0)=22, old(~t4_st~0)=12, ~E_1~0=21, ~E_2~0=5, ~E_3~0=25, ~E_4~0=11, ~M_E~0=17, ~m_i~0=7, ~m_pc~0=15, ~m_st~0=16, ~T1_E~0=3, ~t1_i~0=19, ~t1_pc~0=9, ~t1_st~0=4, ~T2_E~0=18, ~t2_i~0=6, ~t2_pc~0=10, ~t2_st~0=13, ~T3_E~0=23, ~t3_i~0=24, ~t3_pc~0=8, ~t3_st~0=14, ~T4_E~0=26, ~t4_i~0=20, ~t4_pc~0=22, ~t4_st~0=12] [L15] ~m_pc~0 := 0; [L16] ~t1_pc~0 := 0; [L17] ~t2_pc~0 := 0; [L18] ~t3_pc~0 := 0; [L19] ~t4_pc~0 := 0; [L20] ~m_st~0 := 0; [L21] ~t1_st~0 := 0; [L22] ~t2_st~0 := 0; [L23] ~t3_st~0 := 0; [L24] ~t4_st~0 := 0; [L25] ~m_i~0 := 0; [L26] ~t1_i~0 := 0; [L27] ~t2_i~0 := 0; [L28] ~t3_i~0 := 0; [L29] ~t4_i~0 := 0; [L30] ~M_E~0 := 2; [L31] ~T1_E~0 := 2; [L32] ~T2_E~0 := 2; [L33] ~T3_E~0 := 2; [L34] ~T4_E~0 := 2; [L35] ~E_1~0 := 2; [L36] ~E_2~0 := 2; [L37] ~E_3~0 := 2; [L38] ~E_4~0 := 2; VAL [old(~E_1~0)=21, old(~E_2~0)=5, old(~E_3~0)=25, old(~E_4~0)=11, old(~M_E~0)=17, old(~m_i~0)=7, old(~m_pc~0)=15, old(~m_st~0)=16, old(~T1_E~0)=3, old(~t1_i~0)=19, old(~t1_pc~0)=9, old(~t1_st~0)=4, old(~T2_E~0)=18, old(~t2_i~0)=6, old(~t2_pc~0)=10, old(~t2_st~0)=13, old(~T3_E~0)=23, old(~t3_i~0)=24, old(~t3_pc~0)=8, old(~t3_st~0)=14, old(~T4_E~0)=26, old(~t4_i~0)=20, old(~t4_pc~0)=22, old(~t4_st~0)=12, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=0, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=0, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=0, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=0, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=0, ~t4_pc~0=0, ~t4_st~0=0] [?] ensures true; VAL [old(~E_1~0)=21, old(~E_2~0)=5, old(~E_3~0)=25, old(~E_4~0)=11, old(~M_E~0)=17, old(~m_i~0)=7, old(~m_pc~0)=15, old(~m_st~0)=16, old(~T1_E~0)=3, old(~t1_i~0)=19, old(~t1_pc~0)=9, old(~t1_st~0)=4, old(~T2_E~0)=18, old(~t2_i~0)=6, old(~t2_pc~0)=10, old(~t2_st~0)=13, old(~T3_E~0)=23, old(~t3_i~0)=24, old(~t3_pc~0)=8, old(~t3_st~0)=14, old(~T4_E~0)=26, old(~t4_i~0)=20, old(~t4_pc~0)=22, old(~t4_st~0)=12, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=0, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=0, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=0, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=0, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=0, ~t4_pc~0=0, ~t4_st~0=0] [?] RET call ULTIMATE.init(); VAL [~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=0, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=0, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=0, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=0, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=0, ~t4_pc~0=0, ~t4_st~0=0] [?] CALL call #t~ret14 := main(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=0, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=0, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=0, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=0, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=0, ~t4_pc~0=0, ~t4_st~0=0] [L811] havoc ~__retres1~6; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=0, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=0, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=0, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=0, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=0, ~t4_pc~0=0, ~t4_st~0=0] [L815] CALL call init_model(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=0, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=0, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=0, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=0, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=0, ~t4_pc~0=0, ~t4_st~0=0] [L723] ~m_i~0 := 1; [L724] ~t1_i~0 := 1; [L725] ~t2_i~0 := 1; [L726] ~t3_i~0 := 1; [L727] ~t4_i~0 := 1; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L719-L731] ensures true; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L815] RET call init_model(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L816] CALL call start_simulation(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L752] havoc ~kernel_st~0; [L753] havoc ~tmp~3; [L754] havoc ~tmp___0~1; [L758] ~kernel_st~0 := 0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~kernel_st~0=0, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L759] CALL call update_channels(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L319-L326] ensures true; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L759] RET call update_channels(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~kernel_st~0=0, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L760] CALL call init_threads(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L331-L335] assume 1 == ~m_i~0; [L332] ~m_st~0 := 0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L336-L340] assume 1 == ~t1_i~0; [L337] ~t1_st~0 := 0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L341-L345] assume 1 == ~t2_i~0; [L342] ~t2_st~0 := 0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L346-L350] assume 1 == ~t3_i~0; [L347] ~t3_st~0 := 0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L351-L355] assume 1 == ~t4_i~0; [L352] ~t4_st~0 := 0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L327-L359] ensures true; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L760] RET call init_threads(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~kernel_st~0=0, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L761] CALL call fire_delta_events(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L492-L496] assume !(0 == ~M_E~0); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L497-L501] assume !(0 == ~T1_E~0); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L502-L506] assume !(0 == ~T2_E~0); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L507-L511] assume !(0 == ~T3_E~0); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L512-L516] assume !(0 == ~T4_E~0); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L517-L521] assume !(0 == ~E_1~0); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L522-L526] assume !(0 == ~E_2~0); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L527-L531] assume !(0 == ~E_3~0); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L532-L536] assume !(0 == ~E_4~0); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L488-L540] ensures true; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L761] RET call fire_delta_events(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~kernel_st~0=0, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L762] CALL call activate_threads(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L595] havoc ~tmp~1; [L596] havoc ~tmp___0~0; [L597] havoc ~tmp___1~0; [L598] havoc ~tmp___2~0; [L599] havoc ~tmp___3~0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L603] CALL call #t~ret6 := is_master_triggered(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L225] havoc ~__retres1~0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L228-L237] assume !(1 == ~m_pc~0); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L238] ~__retres1~0 := 0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~__retres1~0=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L240] #res := ~__retres1~0; VAL [#res=0, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~__retres1~0=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L39] ensures true; VAL [#res=0, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~__retres1~0=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L603] RET call #t~ret6 := is_master_triggered(); VAL [#t~ret6=0, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L603] assume -2147483648 <= #t~ret6 && #t~ret6 <= 2147483647; [L603] ~tmp~1 := #t~ret6; [L603] havoc #t~ret6; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0, ~tmp~1=0] [L605-L609] assume !(0 != ~tmp~1); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0, ~tmp~1=0] [L611] CALL call #t~ret7 := is_transmit1_triggered(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L244] havoc ~__retres1~1; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L247-L256] assume !(1 == ~t1_pc~0); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L257] ~__retres1~1 := 0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~__retres1~1=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L259] #res := ~__retres1~1; VAL [#res=0, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~__retres1~1=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L40] ensures true; VAL [#res=0, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~__retres1~1=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L611] RET call #t~ret7 := is_transmit1_triggered(); VAL [#t~ret7=0, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0, ~tmp~1=0] [L611] assume -2147483648 <= #t~ret7 && #t~ret7 <= 2147483647; [L611] ~tmp___0~0 := #t~ret7; [L611] havoc #t~ret7; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0, ~tmp___0~0=0, ~tmp~1=0] [L613-L617] assume !(0 != ~tmp___0~0); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0, ~tmp___0~0=0, ~tmp~1=0] [L619] CALL call #t~ret8 := is_transmit2_triggered(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L263] havoc ~__retres1~2; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L266-L275] assume !(1 == ~t2_pc~0); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L276] ~__retres1~2 := 0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~__retres1~2=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L278] #res := ~__retres1~2; VAL [#res=0, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~__retres1~2=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L41] ensures true; VAL [#res=0, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~__retres1~2=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L619] RET call #t~ret8 := is_transmit2_triggered(); VAL [#t~ret8=0, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0, ~tmp___0~0=0, ~tmp~1=0] [L619] assume -2147483648 <= #t~ret8 && #t~ret8 <= 2147483647; [L619] ~tmp___1~0 := #t~ret8; [L619] havoc #t~ret8; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0, ~tmp___0~0=0, ~tmp___1~0=0, ~tmp~1=0] [L621-L625] assume !(0 != ~tmp___1~0); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0, ~tmp___0~0=0, ~tmp___1~0=0, ~tmp~1=0] [L627] CALL call #t~ret9 := is_transmit3_triggered(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L282] havoc ~__retres1~3; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L285-L294] assume !(1 == ~t3_pc~0); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L295] ~__retres1~3 := 0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~__retres1~3=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L297] #res := ~__retres1~3; VAL [#res=0, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~__retres1~3=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L42] ensures true; VAL [#res=0, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~__retres1~3=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L627] RET call #t~ret9 := is_transmit3_triggered(); VAL [#t~ret9=0, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0, ~tmp___0~0=0, ~tmp___1~0=0, ~tmp~1=0] [L627] assume -2147483648 <= #t~ret9 && #t~ret9 <= 2147483647; [L627] ~tmp___2~0 := #t~ret9; [L627] havoc #t~ret9; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0, ~tmp___0~0=0, ~tmp___1~0=0, ~tmp___2~0=0, ~tmp~1=0] [L629-L633] assume !(0 != ~tmp___2~0); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0, ~tmp___0~0=0, ~tmp___1~0=0, ~tmp___2~0=0, ~tmp~1=0] [L635] CALL call #t~ret10 := is_transmit4_triggered(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L301] havoc ~__retres1~4; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L304-L313] assume !(1 == ~t4_pc~0); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L314] ~__retres1~4 := 0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~__retres1~4=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L316] #res := ~__retres1~4; VAL [#res=0, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~__retres1~4=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L43] ensures true; VAL [#res=0, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~__retres1~4=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L635] RET call #t~ret10 := is_transmit4_triggered(); VAL [#t~ret10=0, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0, ~tmp___0~0=0, ~tmp___1~0=0, ~tmp___2~0=0, ~tmp~1=0] [L635] assume -2147483648 <= #t~ret10 && #t~ret10 <= 2147483647; [L635] ~tmp___3~0 := #t~ret10; [L635] havoc #t~ret10; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0, ~tmp___0~0=0, ~tmp___1~0=0, ~tmp___2~0=0, ~tmp___3~0=0, ~tmp~1=0] [L637-L641] assume !(0 != ~tmp___3~0); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0, ~tmp___0~0=0, ~tmp___1~0=0, ~tmp___2~0=0, ~tmp___3~0=0, ~tmp~1=0] [L594-L645] ensures true; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0, ~tmp___0~0=0, ~tmp___1~0=0, ~tmp___2~0=0, ~tmp___3~0=0, ~tmp~1=0] [L762] RET call activate_threads(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~kernel_st~0=0, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L763] CALL call reset_delta_events(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L545-L549] assume !(1 == ~M_E~0); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L550-L554] assume !(1 == ~T1_E~0); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L555-L559] assume !(1 == ~T2_E~0); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L560-L564] assume !(1 == ~T3_E~0); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L565-L569] assume !(1 == ~T4_E~0); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L570-L574] assume !(1 == ~E_1~0); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L575-L579] assume !(1 == ~E_2~0); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L580-L584] assume !(1 == ~E_3~0); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L585-L589] assume !(1 == ~E_4~0); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L541-L593] ensures true; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L763] RET call reset_delta_events(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~kernel_st~0=0, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L766-L803] assume !false; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~kernel_st~0=0, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L769] ~kernel_st~0 := 1; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~kernel_st~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L770] CALL call eval(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L397] havoc ~tmp~0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L401-L481] assume !false; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L404] CALL call #t~ret0 := exists_runnable_thread(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L361] havoc ~__retres1~5; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L364-L389] assume 0 == ~m_st~0; [L365] ~__retres1~5 := 1; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~__retres1~5=1, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L392] #res := ~__retres1~5; VAL [#res=1, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~__retres1~5=1, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L360-L394] ensures true; VAL [#res=1, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~__retres1~5=1, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L404] RET call #t~ret0 := exists_runnable_thread(); VAL [#t~ret0=1, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L404] assume -2147483648 <= #t~ret0 && #t~ret0 <= 2147483647; [L404] ~tmp~0 := #t~ret0; [L404] havoc #t~ret0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0, ~tmp~0=1] [L406-L410] assume 0 != ~tmp~0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0, ~tmp~0=1] [L411-L424] assume 0 == ~m_st~0; [L412] havoc ~tmp_ndt_1~0; [L413] assume -2147483648 <= #t~nondet1 && #t~nondet1 <= 2147483647; [L413] ~tmp_ndt_1~0 := #t~nondet1; [L413] havoc #t~nondet1; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0, ~tmp_ndt_1~0=0, ~tmp~0=1] [L414-L421] assume !(0 != ~tmp_ndt_1~0); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0, ~tmp_ndt_1~0=0, ~tmp~0=1] [L425-L438] assume 0 == ~t1_st~0; [L426] havoc ~tmp_ndt_2~0; [L427] assume -2147483648 <= #t~nondet2 && #t~nondet2 <= 2147483647; [L427] ~tmp_ndt_2~0 := #t~nondet2; [L427] havoc #t~nondet2; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0, ~tmp_ndt_1~0=0, ~tmp_ndt_2~0=1, ~tmp~0=1] [L428-L435] assume 0 != ~tmp_ndt_2~0; [L430] ~t1_st~0 := 1; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0, ~tmp_ndt_1~0=0, ~tmp_ndt_2~0=1, ~tmp~0=1] [L431] CALL call transmit1(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L90-L98] assume 0 == ~t1_pc~0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L101-L113] assume !false; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L103] ~t1_pc~0 := 1; [L104] ~t1_st~0 := 2; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L86-L120] ensures true; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L431] RET call transmit1(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0, ~tmp_ndt_1~0=0, ~tmp_ndt_2~0=1, ~tmp~0=1] [L439-L452] assume 0 == ~t2_st~0; [L440] havoc ~tmp_ndt_3~0; [L441] assume -2147483648 <= #t~nondet3 && #t~nondet3 <= 2147483647; [L441] ~tmp_ndt_3~0 := #t~nondet3; [L441] havoc #t~nondet3; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0, ~tmp_ndt_1~0=0, ~tmp_ndt_2~0=1, ~tmp_ndt_3~0=1, ~tmp~0=1] [L442-L449] assume 0 != ~tmp_ndt_3~0; [L444] ~t2_st~0 := 1; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0, ~tmp_ndt_1~0=0, ~tmp_ndt_2~0=1, ~tmp_ndt_3~0=1, ~tmp~0=1] [L445] CALL call transmit2(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L125-L133] assume 0 == ~t2_pc~0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L136-L148] assume !false; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L138] ~t2_pc~0 := 1; [L139] ~t2_st~0 := 2; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L121-L155] ensures true; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L445] RET call transmit2(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0, ~tmp_ndt_1~0=0, ~tmp_ndt_2~0=1, ~tmp_ndt_3~0=1, ~tmp~0=1] [L453-L466] assume 0 == ~t3_st~0; [L454] havoc ~tmp_ndt_4~0; [L455] assume -2147483648 <= #t~nondet4 && #t~nondet4 <= 2147483647; [L455] ~tmp_ndt_4~0 := #t~nondet4; [L455] havoc #t~nondet4; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0, ~tmp_ndt_1~0=0, ~tmp_ndt_2~0=1, ~tmp_ndt_3~0=1, ~tmp_ndt_4~0=1, ~tmp~0=1] [L456-L463] assume 0 != ~tmp_ndt_4~0; [L458] ~t3_st~0 := 1; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0, ~tmp_ndt_1~0=0, ~tmp_ndt_2~0=1, ~tmp_ndt_3~0=1, ~tmp_ndt_4~0=1, ~tmp~0=1] [L459] CALL call transmit3(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L160-L168] assume 0 == ~t3_pc~0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L171-L183] assume !false; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L173] ~t3_pc~0 := 1; [L174] ~t3_st~0 := 2; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L156-L190] ensures true; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L459] RET call transmit3(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0, ~tmp_ndt_1~0=0, ~tmp_ndt_2~0=1, ~tmp_ndt_3~0=1, ~tmp_ndt_4~0=1, ~tmp~0=1] [L467-L480] assume 0 == ~t4_st~0; [L468] havoc ~tmp_ndt_5~0; [L469] assume -2147483648 <= #t~nondet5 && #t~nondet5 <= 2147483647; [L469] ~tmp_ndt_5~0 := #t~nondet5; [L469] havoc #t~nondet5; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0, ~tmp_ndt_1~0=0, ~tmp_ndt_2~0=1, ~tmp_ndt_3~0=1, ~tmp_ndt_4~0=1, ~tmp_ndt_5~0=1, ~tmp~0=1] [L470-L477] assume 0 != ~tmp_ndt_5~0; [L472] ~t4_st~0 := 1; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=1, ~tmp_ndt_1~0=0, ~tmp_ndt_2~0=1, ~tmp_ndt_3~0=1, ~tmp_ndt_4~0=1, ~tmp_ndt_5~0=1, ~tmp~0=1] [L473] CALL call transmit4(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=1, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=1] [L195-L203] assume 0 == ~t4_pc~0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=1, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=1] [L206-L216] assume !false; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=1, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=1] [L208] ~t4_pc~0 := 1; [L209] ~t4_st~0 := 2; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=1, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L191-L223] ensures true; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=1, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L473] RET call transmit4(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp_ndt_1~0=0, ~tmp_ndt_2~0=1, ~tmp_ndt_3~0=1, ~tmp_ndt_4~0=1, ~tmp_ndt_5~0=1, ~tmp~0=1] [L401-L481] assume !false; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp_ndt_1~0=0, ~tmp_ndt_2~0=1, ~tmp_ndt_3~0=1, ~tmp_ndt_4~0=1, ~tmp_ndt_5~0=1, ~tmp~0=1] [L404] CALL call #t~ret0 := exists_runnable_thread(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L361] havoc ~__retres1~5; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L364-L389] assume 0 == ~m_st~0; [L365] ~__retres1~5 := 1; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~__retres1~5=1, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L392] #res := ~__retres1~5; VAL [#res=1, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~__retres1~5=1, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L360-L394] ensures true; VAL [#res=1, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~__retres1~5=1, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L404] RET call #t~ret0 := exists_runnable_thread(); VAL [#t~ret0=1, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp_ndt_1~0=0, ~tmp_ndt_2~0=1, ~tmp_ndt_3~0=1, ~tmp_ndt_4~0=1, ~tmp_ndt_5~0=1, ~tmp~0=1] [L404] assume -2147483648 <= #t~ret0 && #t~ret0 <= 2147483647; [L404] ~tmp~0 := #t~ret0; [L404] havoc #t~ret0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp_ndt_1~0=0, ~tmp_ndt_2~0=1, ~tmp_ndt_3~0=1, ~tmp_ndt_4~0=1, ~tmp_ndt_5~0=1, ~tmp~0=1] [L406-L410] assume 0 != ~tmp~0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp_ndt_1~0=0, ~tmp_ndt_2~0=1, ~tmp_ndt_3~0=1, ~tmp_ndt_4~0=1, ~tmp_ndt_5~0=1, ~tmp~0=1] [L411-L424] assume 0 == ~m_st~0; [L412] havoc ~tmp_ndt_1~0; [L413] assume -2147483648 <= #t~nondet1 && #t~nondet1 <= 2147483647; [L413] ~tmp_ndt_1~0 := #t~nondet1; [L413] havoc #t~nondet1; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp_ndt_1~0=1, ~tmp_ndt_2~0=1, ~tmp_ndt_3~0=1, ~tmp_ndt_4~0=1, ~tmp_ndt_5~0=1, ~tmp~0=1] [L414-L421] assume 0 != ~tmp_ndt_1~0; [L416] ~m_st~0 := 1; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp_ndt_1~0=1, ~tmp_ndt_2~0=1, ~tmp_ndt_3~0=1, ~tmp_ndt_4~0=1, ~tmp_ndt_5~0=1, ~tmp~0=1] [L417] CALL call master(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L49-L57] assume 0 == ~m_pc~0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L60-L78] assume !false; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L63] ~E_1~0 := 1; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L64] CALL call immediate_notify(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L651] CALL call activate_threads(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L595] havoc ~tmp~1; [L596] havoc ~tmp___0~0; [L597] havoc ~tmp___1~0; [L598] havoc ~tmp___2~0; [L599] havoc ~tmp___3~0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L603] CALL call #t~ret6 := is_master_triggered(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L225] havoc ~__retres1~0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L228-L237] assume !(1 == ~m_pc~0); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L238] ~__retres1~0 := 0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~__retres1~0=0, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L240] #res := ~__retres1~0; VAL [#res=0, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~__retres1~0=0, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L39] ensures true; VAL [#res=0, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~__retres1~0=0, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L603] RET call #t~ret6 := is_master_triggered(); VAL [#t~ret6=0, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L603] assume -2147483648 <= #t~ret6 && #t~ret6 <= 2147483647; [L603] ~tmp~1 := #t~ret6; [L603] havoc #t~ret6; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp~1=0] [L605-L609] assume !(0 != ~tmp~1); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp~1=0] [L611] CALL call #t~ret7 := is_transmit1_triggered(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L244] havoc ~__retres1~1; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L247-L256] assume 1 == ~t1_pc~0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L248-L253] assume 1 == ~E_1~0; [L249] ~__retres1~1 := 1; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~__retres1~1=1, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] WARNING: YOUR LOGFILE WAS TOO LONG, SOME LINES IN THE MIDDLE WERE REMOVED. [L470-L477] COND TRUE 0 != ~tmp_ndt_5~0 [L472] ~t4_st~0 := 1; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=1, ~tmp_ndt_1~0=1, ~tmp_ndt_2~0=1, ~tmp_ndt_3~0=1, ~tmp_ndt_4~0=1, ~tmp_ndt_5~0=1, ~tmp~0=1] [L473] CALL call transmit4(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=1, old(~t4_st~0)=1, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=1] [L195] COND FALSE !(0 == ~t4_pc~0) VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=1, old(~t4_st~0)=1, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=1] [L198] COND TRUE 1 == ~t4_pc~0 VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=1, old(~t4_st~0)=1, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=1] [L214] CALL call error(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=1, old(~t4_st~0)=1, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=1] [L11] assert false; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=1, old(~t4_st~0)=1, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=1] [?] CALL call ULTIMATE.init(); VAL [old(~E_1~0)=21, old(~E_2~0)=5, old(~E_3~0)=25, old(~E_4~0)=11, old(~M_E~0)=17, old(~m_i~0)=7, old(~m_pc~0)=15, old(~m_st~0)=16, old(~T1_E~0)=3, old(~t1_i~0)=19, old(~t1_pc~0)=9, old(~t1_st~0)=4, old(~T2_E~0)=18, old(~t2_i~0)=6, old(~t2_pc~0)=10, old(~t2_st~0)=13, old(~T3_E~0)=23, old(~t3_i~0)=24, old(~t3_pc~0)=8, old(~t3_st~0)=14, old(~T4_E~0)=26, old(~t4_i~0)=20, old(~t4_pc~0)=22, old(~t4_st~0)=12, ~E_1~0=21, ~E_2~0=5, ~E_3~0=25, ~E_4~0=11, ~M_E~0=17, ~m_i~0=7, ~m_pc~0=15, ~m_st~0=16, ~T1_E~0=3, ~t1_i~0=19, ~t1_pc~0=9, ~t1_st~0=4, ~T2_E~0=18, ~t2_i~0=6, ~t2_pc~0=10, ~t2_st~0=13, ~T3_E~0=23, ~t3_i~0=24, ~t3_pc~0=8, ~t3_st~0=14, ~T4_E~0=26, ~t4_i~0=20, ~t4_pc~0=22, ~t4_st~0=12] [L15] ~m_pc~0 := 0; [L16] ~t1_pc~0 := 0; [L17] ~t2_pc~0 := 0; [L18] ~t3_pc~0 := 0; [L19] ~t4_pc~0 := 0; [L20] ~m_st~0 := 0; [L21] ~t1_st~0 := 0; [L22] ~t2_st~0 := 0; [L23] ~t3_st~0 := 0; [L24] ~t4_st~0 := 0; [L25] ~m_i~0 := 0; [L26] ~t1_i~0 := 0; [L27] ~t2_i~0 := 0; [L28] ~t3_i~0 := 0; [L29] ~t4_i~0 := 0; [L30] ~M_E~0 := 2; [L31] ~T1_E~0 := 2; [L32] ~T2_E~0 := 2; [L33] ~T3_E~0 := 2; [L34] ~T4_E~0 := 2; [L35] ~E_1~0 := 2; [L36] ~E_2~0 := 2; [L37] ~E_3~0 := 2; [L38] ~E_4~0 := 2; VAL [old(~E_1~0)=21, old(~E_2~0)=5, old(~E_3~0)=25, old(~E_4~0)=11, old(~M_E~0)=17, old(~m_i~0)=7, old(~m_pc~0)=15, old(~m_st~0)=16, old(~T1_E~0)=3, old(~t1_i~0)=19, old(~t1_pc~0)=9, old(~t1_st~0)=4, old(~T2_E~0)=18, old(~t2_i~0)=6, old(~t2_pc~0)=10, old(~t2_st~0)=13, old(~T3_E~0)=23, old(~t3_i~0)=24, old(~t3_pc~0)=8, old(~t3_st~0)=14, old(~T4_E~0)=26, old(~t4_i~0)=20, old(~t4_pc~0)=22, old(~t4_st~0)=12, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=0, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=0, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=0, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=0, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=0, ~t4_pc~0=0, ~t4_st~0=0] [?] RET call ULTIMATE.init(); VAL [~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=0, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=0, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=0, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=0, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=0, ~t4_pc~0=0, ~t4_st~0=0] [?] CALL call #t~ret14 := main(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=0, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=0, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=0, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=0, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=0, ~t4_pc~0=0, ~t4_st~0=0] [L811] havoc ~__retres1~6; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=0, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=0, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=0, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=0, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=0, ~t4_pc~0=0, ~t4_st~0=0] [L815] CALL call init_model(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=0, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=0, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=0, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=0, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=0, ~t4_pc~0=0, ~t4_st~0=0] [L723] ~m_i~0 := 1; [L724] ~t1_i~0 := 1; [L725] ~t2_i~0 := 1; [L726] ~t3_i~0 := 1; [L727] ~t4_i~0 := 1; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L815] RET call init_model(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L816] CALL call start_simulation(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L752] havoc ~kernel_st~0; [L753] havoc ~tmp~3; [L754] havoc ~tmp___0~1; [L758] ~kernel_st~0 := 0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~kernel_st~0=0, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L759] CALL call update_channels(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L759] RET call update_channels(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~kernel_st~0=0, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L760] CALL call init_threads(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L331] COND TRUE 1 == ~m_i~0 [L332] ~m_st~0 := 0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L336] COND TRUE 1 == ~t1_i~0 [L337] ~t1_st~0 := 0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L341] COND TRUE 1 == ~t2_i~0 [L342] ~t2_st~0 := 0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L346] COND TRUE 1 == ~t3_i~0 [L347] ~t3_st~0 := 0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L351] COND TRUE 1 == ~t4_i~0 [L352] ~t4_st~0 := 0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L760] RET call init_threads(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~kernel_st~0=0, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L761] CALL call fire_delta_events(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L492] COND FALSE !(0 == ~M_E~0) VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L497] COND FALSE !(0 == ~T1_E~0) VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L502] COND FALSE !(0 == ~T2_E~0) VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L507] COND FALSE !(0 == ~T3_E~0) VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L512] COND FALSE !(0 == ~T4_E~0) VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L517] COND FALSE !(0 == ~E_1~0) VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L522] COND FALSE !(0 == ~E_2~0) VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L527] COND FALSE !(0 == ~E_3~0) VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L532] COND FALSE !(0 == ~E_4~0) VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L761] RET call fire_delta_events(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~kernel_st~0=0, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L762] CALL call activate_threads(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L595] havoc ~tmp~1; [L596] havoc ~tmp___0~0; [L597] havoc ~tmp___1~0; [L598] havoc ~tmp___2~0; [L599] havoc ~tmp___3~0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L603] CALL call #t~ret6 := is_master_triggered(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L225] havoc ~__retres1~0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L228] COND FALSE !(1 == ~m_pc~0) VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L238] ~__retres1~0 := 0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~__retres1~0=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L240] #res := ~__retres1~0; VAL [#res=0, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~__retres1~0=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L603] RET call #t~ret6 := is_master_triggered(); VAL [#t~ret6=0, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L603] assume -2147483648 <= #t~ret6 && #t~ret6 <= 2147483647; [L603] ~tmp~1 := #t~ret6; [L603] havoc #t~ret6; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0, ~tmp~1=0] [L605-L609] COND FALSE !(0 != ~tmp~1) VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0, ~tmp~1=0] [L611] CALL call #t~ret7 := is_transmit1_triggered(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L244] havoc ~__retres1~1; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L247] COND FALSE !(1 == ~t1_pc~0) VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L257] ~__retres1~1 := 0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~__retres1~1=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L259] #res := ~__retres1~1; VAL [#res=0, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~__retres1~1=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L611] RET call #t~ret7 := is_transmit1_triggered(); VAL [#t~ret7=0, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0, ~tmp~1=0] [L611] assume -2147483648 <= #t~ret7 && #t~ret7 <= 2147483647; [L611] ~tmp___0~0 := #t~ret7; [L611] havoc #t~ret7; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0, ~tmp___0~0=0, ~tmp~1=0] [L613-L617] COND FALSE !(0 != ~tmp___0~0) VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0, ~tmp___0~0=0, ~tmp~1=0] [L619] CALL call #t~ret8 := is_transmit2_triggered(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L263] havoc ~__retres1~2; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L266] COND FALSE !(1 == ~t2_pc~0) VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L276] ~__retres1~2 := 0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~__retres1~2=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L278] #res := ~__retres1~2; VAL [#res=0, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~__retres1~2=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L619] RET call #t~ret8 := is_transmit2_triggered(); VAL [#t~ret8=0, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0, ~tmp___0~0=0, ~tmp~1=0] [L619] assume -2147483648 <= #t~ret8 && #t~ret8 <= 2147483647; [L619] ~tmp___1~0 := #t~ret8; [L619] havoc #t~ret8; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0, ~tmp___0~0=0, ~tmp___1~0=0, ~tmp~1=0] [L621-L625] COND FALSE !(0 != ~tmp___1~0) VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0, ~tmp___0~0=0, ~tmp___1~0=0, ~tmp~1=0] [L627] CALL call #t~ret9 := is_transmit3_triggered(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L282] havoc ~__retres1~3; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L285] COND FALSE !(1 == ~t3_pc~0) VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L295] ~__retres1~3 := 0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~__retres1~3=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L297] #res := ~__retres1~3; VAL [#res=0, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~__retres1~3=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L627] RET call #t~ret9 := is_transmit3_triggered(); VAL [#t~ret9=0, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0, ~tmp___0~0=0, ~tmp___1~0=0, ~tmp~1=0] [L627] assume -2147483648 <= #t~ret9 && #t~ret9 <= 2147483647; [L627] ~tmp___2~0 := #t~ret9; [L627] havoc #t~ret9; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0, ~tmp___0~0=0, ~tmp___1~0=0, ~tmp___2~0=0, ~tmp~1=0] [L629-L633] COND FALSE !(0 != ~tmp___2~0) VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0, ~tmp___0~0=0, ~tmp___1~0=0, ~tmp___2~0=0, ~tmp~1=0] [L635] CALL call #t~ret10 := is_transmit4_triggered(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L301] havoc ~__retres1~4; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L304] COND FALSE !(1 == ~t4_pc~0) VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L314] ~__retres1~4 := 0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~__retres1~4=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L316] #res := ~__retres1~4; VAL [#res=0, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~__retres1~4=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L635] RET call #t~ret10 := is_transmit4_triggered(); VAL [#t~ret10=0, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0, ~tmp___0~0=0, ~tmp___1~0=0, ~tmp___2~0=0, ~tmp~1=0] [L635] assume -2147483648 <= #t~ret10 && #t~ret10 <= 2147483647; [L635] ~tmp___3~0 := #t~ret10; [L635] havoc #t~ret10; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0, ~tmp___0~0=0, ~tmp___1~0=0, ~tmp___2~0=0, ~tmp___3~0=0, ~tmp~1=0] [L637-L641] COND FALSE !(0 != ~tmp___3~0) VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0, ~tmp___0~0=0, ~tmp___1~0=0, ~tmp___2~0=0, ~tmp___3~0=0, ~tmp~1=0] [L762] RET call activate_threads(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~kernel_st~0=0, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L763] CALL call reset_delta_events(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L545] COND FALSE !(1 == ~M_E~0) VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L550] COND FALSE !(1 == ~T1_E~0) VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L555] COND FALSE !(1 == ~T2_E~0) VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L560] COND FALSE !(1 == ~T3_E~0) VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L565] COND FALSE !(1 == ~T4_E~0) VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L570] COND FALSE !(1 == ~E_1~0) VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L575] COND FALSE !(1 == ~E_2~0) VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L580] COND FALSE !(1 == ~E_3~0) VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L585] COND FALSE !(1 == ~E_4~0) VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L763] RET call reset_delta_events(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~kernel_st~0=0, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L766-L803] COND FALSE !(false) VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~kernel_st~0=0, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L769] ~kernel_st~0 := 1; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~kernel_st~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L770] CALL call eval(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L397] havoc ~tmp~0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L401-L481] COND FALSE !(false) VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L404] CALL call #t~ret0 := exists_runnable_thread(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L361] havoc ~__retres1~5; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L364] COND TRUE 0 == ~m_st~0 [L365] ~__retres1~5 := 1; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~__retres1~5=1, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L392] #res := ~__retres1~5; VAL [#res=1, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~__retres1~5=1, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L404] RET call #t~ret0 := exists_runnable_thread(); VAL [#t~ret0=1, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L404] assume -2147483648 <= #t~ret0 && #t~ret0 <= 2147483647; [L404] ~tmp~0 := #t~ret0; [L404] havoc #t~ret0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0, ~tmp~0=1] [L406-L410] COND TRUE 0 != ~tmp~0 VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0, ~tmp~0=1] [L411] COND TRUE 0 == ~m_st~0 [L412] havoc ~tmp_ndt_1~0; [L413] assume -2147483648 <= #t~nondet1 && #t~nondet1 <= 2147483647; [L413] ~tmp_ndt_1~0 := #t~nondet1; [L413] havoc #t~nondet1; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0, ~tmp_ndt_1~0=0, ~tmp~0=1] [L414-L421] COND FALSE !(0 != ~tmp_ndt_1~0) VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0, ~tmp_ndt_1~0=0, ~tmp~0=1] [L425] COND TRUE 0 == ~t1_st~0 [L426] havoc ~tmp_ndt_2~0; [L427] assume -2147483648 <= #t~nondet2 && #t~nondet2 <= 2147483647; [L427] ~tmp_ndt_2~0 := #t~nondet2; [L427] havoc #t~nondet2; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0, ~tmp_ndt_1~0=0, ~tmp_ndt_2~0=1, ~tmp~0=1] [L428-L435] COND TRUE 0 != ~tmp_ndt_2~0 [L430] ~t1_st~0 := 1; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0, ~tmp_ndt_1~0=0, ~tmp_ndt_2~0=1, ~tmp~0=1] [L431] CALL call transmit1(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L90] COND TRUE 0 == ~t1_pc~0 VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L101-L113] COND FALSE !(false) VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L103] ~t1_pc~0 := 1; [L104] ~t1_st~0 := 2; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L431] RET call transmit1(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0, ~tmp_ndt_1~0=0, ~tmp_ndt_2~0=1, ~tmp~0=1] [L439] COND TRUE 0 == ~t2_st~0 [L440] havoc ~tmp_ndt_3~0; [L441] assume -2147483648 <= #t~nondet3 && #t~nondet3 <= 2147483647; [L441] ~tmp_ndt_3~0 := #t~nondet3; [L441] havoc #t~nondet3; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0, ~tmp_ndt_1~0=0, ~tmp_ndt_2~0=1, ~tmp_ndt_3~0=1, ~tmp~0=1] [L442-L449] COND TRUE 0 != ~tmp_ndt_3~0 [L444] ~t2_st~0 := 1; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0, ~tmp_ndt_1~0=0, ~tmp_ndt_2~0=1, ~tmp_ndt_3~0=1, ~tmp~0=1] [L445] CALL call transmit2(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L125] COND TRUE 0 == ~t2_pc~0 VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L136-L148] COND FALSE !(false) VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L138] ~t2_pc~0 := 1; [L139] ~t2_st~0 := 2; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L445] RET call transmit2(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0, ~tmp_ndt_1~0=0, ~tmp_ndt_2~0=1, ~tmp_ndt_3~0=1, ~tmp~0=1] [L453] COND TRUE 0 == ~t3_st~0 [L454] havoc ~tmp_ndt_4~0; [L455] assume -2147483648 <= #t~nondet4 && #t~nondet4 <= 2147483647; [L455] ~tmp_ndt_4~0 := #t~nondet4; [L455] havoc #t~nondet4; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0, ~tmp_ndt_1~0=0, ~tmp_ndt_2~0=1, ~tmp_ndt_3~0=1, ~tmp_ndt_4~0=1, ~tmp~0=1] [L456-L463] COND TRUE 0 != ~tmp_ndt_4~0 [L458] ~t3_st~0 := 1; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0, ~tmp_ndt_1~0=0, ~tmp_ndt_2~0=1, ~tmp_ndt_3~0=1, ~tmp_ndt_4~0=1, ~tmp~0=1] [L459] CALL call transmit3(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L160] COND TRUE 0 == ~t3_pc~0 VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L171-L183] COND FALSE !(false) VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L173] ~t3_pc~0 := 1; [L174] ~t3_st~0 := 2; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L459] RET call transmit3(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0, ~tmp_ndt_1~0=0, ~tmp_ndt_2~0=1, ~tmp_ndt_3~0=1, ~tmp_ndt_4~0=1, ~tmp~0=1] [L467] COND TRUE 0 == ~t4_st~0 [L468] havoc ~tmp_ndt_5~0; [L469] assume -2147483648 <= #t~nondet5 && #t~nondet5 <= 2147483647; [L469] ~tmp_ndt_5~0 := #t~nondet5; [L469] havoc #t~nondet5; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0, ~tmp_ndt_1~0=0, ~tmp_ndt_2~0=1, ~tmp_ndt_3~0=1, ~tmp_ndt_4~0=1, ~tmp_ndt_5~0=1, ~tmp~0=1] [L470-L477] COND TRUE 0 != ~tmp_ndt_5~0 [L472] ~t4_st~0 := 1; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=1, ~tmp_ndt_1~0=0, ~tmp_ndt_2~0=1, ~tmp_ndt_3~0=1, ~tmp_ndt_4~0=1, ~tmp_ndt_5~0=1, ~tmp~0=1] [L473] CALL call transmit4(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=1, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=1] [L195] COND TRUE 0 == ~t4_pc~0 VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=1, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=1] [L206-L216] COND FALSE !(false) VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=1, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=1] [L208] ~t4_pc~0 := 1; [L209] ~t4_st~0 := 2; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=1, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L473] RET call transmit4(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp_ndt_1~0=0, ~tmp_ndt_2~0=1, ~tmp_ndt_3~0=1, ~tmp_ndt_4~0=1, ~tmp_ndt_5~0=1, ~tmp~0=1] [L401-L481] COND FALSE !(false) VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp_ndt_1~0=0, ~tmp_ndt_2~0=1, ~tmp_ndt_3~0=1, ~tmp_ndt_4~0=1, ~tmp_ndt_5~0=1, ~tmp~0=1] [L404] CALL call #t~ret0 := exists_runnable_thread(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L361] havoc ~__retres1~5; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L364] COND TRUE 0 == ~m_st~0 [L365] ~__retres1~5 := 1; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~__retres1~5=1, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L392] #res := ~__retres1~5; VAL [#res=1, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~__retres1~5=1, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L404] RET call #t~ret0 := exists_runnable_thread(); VAL [#t~ret0=1, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp_ndt_1~0=0, ~tmp_ndt_2~0=1, ~tmp_ndt_3~0=1, ~tmp_ndt_4~0=1, ~tmp_ndt_5~0=1, ~tmp~0=1] [L404] assume -2147483648 <= #t~ret0 && #t~ret0 <= 2147483647; [L404] ~tmp~0 := #t~ret0; [L404] havoc #t~ret0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp_ndt_1~0=0, ~tmp_ndt_2~0=1, ~tmp_ndt_3~0=1, ~tmp_ndt_4~0=1, ~tmp_ndt_5~0=1, ~tmp~0=1] [L406-L410] COND TRUE 0 != ~tmp~0 VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp_ndt_1~0=0, ~tmp_ndt_2~0=1, ~tmp_ndt_3~0=1, ~tmp_ndt_4~0=1, ~tmp_ndt_5~0=1, ~tmp~0=1] [L411] COND TRUE 0 == ~m_st~0 [L412] havoc ~tmp_ndt_1~0; [L413] assume -2147483648 <= #t~nondet1 && #t~nondet1 <= 2147483647; [L413] ~tmp_ndt_1~0 := #t~nondet1; [L413] havoc #t~nondet1; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp_ndt_1~0=1, ~tmp_ndt_2~0=1, ~tmp_ndt_3~0=1, ~tmp_ndt_4~0=1, ~tmp_ndt_5~0=1, ~tmp~0=1] [L414-L421] COND TRUE 0 != ~tmp_ndt_1~0 [L416] ~m_st~0 := 1; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp_ndt_1~0=1, ~tmp_ndt_2~0=1, ~tmp_ndt_3~0=1, ~tmp_ndt_4~0=1, ~tmp_ndt_5~0=1, ~tmp~0=1] [L417] CALL call master(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L49] COND TRUE 0 == ~m_pc~0 VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L60-L78] COND FALSE !(false) VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L63] ~E_1~0 := 1; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L64] CALL call immediate_notify(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L651] CALL call activate_threads(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L595] havoc ~tmp~1; [L596] havoc ~tmp___0~0; [L597] havoc ~tmp___1~0; [L598] havoc ~tmp___2~0; [L599] havoc ~tmp___3~0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L603] CALL call #t~ret6 := is_master_triggered(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L225] havoc ~__retres1~0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L228] COND FALSE !(1 == ~m_pc~0) VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L238] ~__retres1~0 := 0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~__retres1~0=0, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L240] #res := ~__retres1~0; VAL [#res=0, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~__retres1~0=0, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L603] RET call #t~ret6 := is_master_triggered(); VAL [#t~ret6=0, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L603] assume -2147483648 <= #t~ret6 && #t~ret6 <= 2147483647; [L603] ~tmp~1 := #t~ret6; [L603] havoc #t~ret6; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp~1=0] [L605-L609] COND FALSE !(0 != ~tmp~1) VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp~1=0] [L611] CALL call #t~ret7 := is_transmit1_triggered(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L244] havoc ~__retres1~1; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L247] COND TRUE 1 == ~t1_pc~0 VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L248] COND TRUE 1 == ~E_1~0 [L249] ~__retres1~1 := 1; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~__retres1~1=1, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L259] #res := ~__retres1~1; VAL [#res=1, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~__retres1~1=1, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L611] RET call #t~ret7 := is_transmit1_triggered(); VAL [#t~ret7=1, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp~1=0] [L611] assume -2147483648 <= #t~ret7 && #t~ret7 <= 2147483647; [L611] ~tmp___0~0 := #t~ret7; [L611] havoc #t~ret7; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp___0~0=1, ~tmp~1=0] [L613-L617] COND TRUE 0 != ~tmp___0~0 [L614] ~t1_st~0 := 0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp___0~0=1, ~tmp~1=0] [L619] CALL call #t~ret8 := is_transmit2_triggered(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L263] havoc ~__retres1~2; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L266] COND TRUE 1 == ~t2_pc~0 VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L267] COND FALSE !(1 == ~E_2~0) VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L276] ~__retres1~2 := 0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~__retres1~2=0, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L278] #res := ~__retres1~2; VAL [#res=0, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~__retres1~2=0, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L619] RET call #t~ret8 := is_transmit2_triggered(); VAL [#t~ret8=0, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp___0~0=1, ~tmp~1=0] [L619] assume -2147483648 <= #t~ret8 && #t~ret8 <= 2147483647; [L619] ~tmp___1~0 := #t~ret8; [L619] havoc #t~ret8; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp___0~0=1, ~tmp___1~0=0, ~tmp~1=0] [L621-L625] COND FALSE !(0 != ~tmp___1~0) VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp___0~0=1, ~tmp___1~0=0, ~tmp~1=0] [L627] CALL call #t~ret9 := is_transmit3_triggered(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L282] havoc ~__retres1~3; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L285] COND TRUE 1 == ~t3_pc~0 VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L286] COND FALSE !(1 == ~E_3~0) VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L295] ~__retres1~3 := 0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~__retres1~3=0, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L297] #res := ~__retres1~3; VAL [#res=0, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~__retres1~3=0, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L627] RET call #t~ret9 := is_transmit3_triggered(); VAL [#t~ret9=0, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp___0~0=1, ~tmp___1~0=0, ~tmp~1=0] [L627] assume -2147483648 <= #t~ret9 && #t~ret9 <= 2147483647; [L627] ~tmp___2~0 := #t~ret9; [L627] havoc #t~ret9; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp___0~0=1, ~tmp___1~0=0, ~tmp___2~0=0, ~tmp~1=0] [L629-L633] COND FALSE !(0 != ~tmp___2~0) VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp___0~0=1, ~tmp___1~0=0, ~tmp___2~0=0, ~tmp~1=0] [L635] CALL call #t~ret10 := is_transmit4_triggered(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L301] havoc ~__retres1~4; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L304] COND TRUE 1 == ~t4_pc~0 VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L305] COND FALSE !(1 == ~E_4~0) VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L314] ~__retres1~4 := 0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~__retres1~4=0, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L316] #res := ~__retres1~4; VAL [#res=0, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~__retres1~4=0, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L635] RET call #t~ret10 := is_transmit4_triggered(); VAL [#t~ret10=0, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp___0~0=1, ~tmp___1~0=0, ~tmp___2~0=0, ~tmp~1=0] [L635] assume -2147483648 <= #t~ret10 && #t~ret10 <= 2147483647; [L635] ~tmp___3~0 := #t~ret10; [L635] havoc #t~ret10; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp___0~0=1, ~tmp___1~0=0, ~tmp___2~0=0, ~tmp___3~0=0, ~tmp~1=0] [L637-L641] COND FALSE !(0 != ~tmp___3~0) VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp___0~0=1, ~tmp___1~0=0, ~tmp___2~0=0, ~tmp___3~0=0, ~tmp~1=0] [L651] RET call activate_threads(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L64] RET call immediate_notify(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L65] ~E_1~0 := 2; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L68-L75] COND FALSE !(false) VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L70] ~m_pc~0 := 1; [L71] ~m_st~0 := 2; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L417] RET call master(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp_ndt_1~0=1, ~tmp_ndt_2~0=1, ~tmp_ndt_3~0=1, ~tmp_ndt_4~0=1, ~tmp_ndt_5~0=1, ~tmp~0=1] [L425] COND TRUE 0 == ~t1_st~0 [L426] havoc ~tmp_ndt_2~0; [L427] assume -2147483648 <= #t~nondet2 && #t~nondet2 <= 2147483647; [L427] ~tmp_ndt_2~0 := #t~nondet2; [L427] havoc #t~nondet2; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp_ndt_1~0=1, ~tmp_ndt_2~0=1, ~tmp_ndt_3~0=1, ~tmp_ndt_4~0=1, ~tmp_ndt_5~0=1, ~tmp~0=1] [L428-L435] COND TRUE 0 != ~tmp_ndt_2~0 [L430] ~t1_st~0 := 1; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp_ndt_1~0=1, ~tmp_ndt_2~0=1, ~tmp_ndt_3~0=1, ~tmp_ndt_4~0=1, ~tmp_ndt_5~0=1, ~tmp~0=1] [L431] CALL call transmit1(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=1, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L90] COND FALSE !(0 == ~t1_pc~0) VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=1, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L93] COND TRUE 1 == ~t1_pc~0 VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=1, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L109] ~E_2~0 := 1; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=1, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L110] CALL call immediate_notify(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=1, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L651] CALL call activate_threads(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=1, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L595] havoc ~tmp~1; [L596] havoc ~tmp___0~0; [L597] havoc ~tmp___1~0; [L598] havoc ~tmp___2~0; [L599] havoc ~tmp___3~0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=1, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L603] CALL call #t~ret6 := is_master_triggered(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=1, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L225] havoc ~__retres1~0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=1, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L228] COND TRUE 1 == ~m_pc~0 VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=1, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L229] COND FALSE !(1 == ~M_E~0) VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=1, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L238] ~__retres1~0 := 0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=1, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~__retres1~0=0, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L240] #res := ~__retres1~0; VAL [#res=0, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=1, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~__retres1~0=0, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L603] RET call #t~ret6 := is_master_triggered(); VAL [#t~ret6=0, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=1, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L603] assume -2147483648 <= #t~ret6 && #t~ret6 <= 2147483647; [L603] ~tmp~1 := #t~ret6; [L603] havoc #t~ret6; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=1, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp~1=0] [L605-L609] COND FALSE !(0 != ~tmp~1) VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=1, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp~1=0] [L611] CALL call #t~ret7 := is_transmit1_triggered(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=1, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L244] havoc ~__retres1~1; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=1, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L247] COND TRUE 1 == ~t1_pc~0 VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=1, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L248] COND FALSE !(1 == ~E_1~0) VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=1, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L257] ~__retres1~1 := 0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=1, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~__retres1~1=0, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L259] #res := ~__retres1~1; VAL [#res=0, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=1, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~__retres1~1=0, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L611] RET call #t~ret7 := is_transmit1_triggered(); VAL [#t~ret7=0, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=1, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp~1=0] [L611] assume -2147483648 <= #t~ret7 && #t~ret7 <= 2147483647; [L611] ~tmp___0~0 := #t~ret7; [L611] havoc #t~ret7; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=1, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp___0~0=0, ~tmp~1=0] [L613-L617] COND FALSE !(0 != ~tmp___0~0) VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=1, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp___0~0=0, ~tmp~1=0] [L619] CALL call #t~ret8 := is_transmit2_triggered(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=1, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L263] havoc ~__retres1~2; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=1, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L266] COND TRUE 1 == ~t2_pc~0 VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=1, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L267] COND TRUE 1 == ~E_2~0 [L268] ~__retres1~2 := 1; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=1, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~__retres1~2=1, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L278] #res := ~__retres1~2; VAL [#res=1, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=1, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~__retres1~2=1, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L619] RET call #t~ret8 := is_transmit2_triggered(); VAL [#t~ret8=1, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=1, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp___0~0=0, ~tmp~1=0] [L619] assume -2147483648 <= #t~ret8 && #t~ret8 <= 2147483647; [L619] ~tmp___1~0 := #t~ret8; [L619] havoc #t~ret8; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=1, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp___0~0=0, ~tmp___1~0=1, ~tmp~1=0] [L621-L625] COND TRUE 0 != ~tmp___1~0 [L622] ~t2_st~0 := 0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=1, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp___0~0=0, ~tmp___1~0=1, ~tmp~1=0] [L627] CALL call #t~ret9 := is_transmit3_triggered(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=1, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L282] havoc ~__retres1~3; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=1, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L285] COND TRUE 1 == ~t3_pc~0 VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=1, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L286] COND FALSE !(1 == ~E_3~0) VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=1, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L295] ~__retres1~3 := 0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=1, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~__retres1~3=0, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L297] #res := ~__retres1~3; VAL [#res=0, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=1, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~__retres1~3=0, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L627] RET call #t~ret9 := is_transmit3_triggered(); VAL [#t~ret9=0, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=1, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp___0~0=0, ~tmp___1~0=1, ~tmp~1=0] [L627] assume -2147483648 <= #t~ret9 && #t~ret9 <= 2147483647; [L627] ~tmp___2~0 := #t~ret9; [L627] havoc #t~ret9; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=1, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp___0~0=0, ~tmp___1~0=1, ~tmp___2~0=0, ~tmp~1=0] [L629-L633] COND FALSE !(0 != ~tmp___2~0) VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=1, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp___0~0=0, ~tmp___1~0=1, ~tmp___2~0=0, ~tmp~1=0] [L635] CALL call #t~ret10 := is_transmit4_triggered(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=1, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L301] havoc ~__retres1~4; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=1, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L304] COND TRUE 1 == ~t4_pc~0 VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=1, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L305] COND FALSE !(1 == ~E_4~0) VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=1, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L314] ~__retres1~4 := 0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=1, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~__retres1~4=0, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L316] #res := ~__retres1~4; VAL [#res=0, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=1, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~__retres1~4=0, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L635] RET call #t~ret10 := is_transmit4_triggered(); VAL [#t~ret10=0, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=1, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp___0~0=0, ~tmp___1~0=1, ~tmp___2~0=0, ~tmp~1=0] [L635] assume -2147483648 <= #t~ret10 && #t~ret10 <= 2147483647; [L635] ~tmp___3~0 := #t~ret10; [L635] havoc #t~ret10; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=1, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp___0~0=0, ~tmp___1~0=1, ~tmp___2~0=0, ~tmp___3~0=0, ~tmp~1=0] [L637-L641] COND FALSE !(0 != ~tmp___3~0) VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=1, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp___0~0=0, ~tmp___1~0=1, ~tmp___2~0=0, ~tmp___3~0=0, ~tmp~1=0] [L651] RET call activate_threads(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=1, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L110] RET call immediate_notify(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=1, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L111] ~E_2~0 := 2; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=1, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L101-L113] COND FALSE !(false) VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=1, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L103] ~t1_pc~0 := 1; [L104] ~t1_st~0 := 2; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=1, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L431] RET call transmit1(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp_ndt_1~0=1, ~tmp_ndt_2~0=1, ~tmp_ndt_3~0=1, ~tmp_ndt_4~0=1, ~tmp_ndt_5~0=1, ~tmp~0=1] [L439] COND TRUE 0 == ~t2_st~0 [L440] havoc ~tmp_ndt_3~0; [L441] assume -2147483648 <= #t~nondet3 && #t~nondet3 <= 2147483647; [L441] ~tmp_ndt_3~0 := #t~nondet3; [L441] havoc #t~nondet3; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp_ndt_1~0=1, ~tmp_ndt_2~0=1, ~tmp_ndt_3~0=1, ~tmp_ndt_4~0=1, ~tmp_ndt_5~0=1, ~tmp~0=1] [L442-L449] COND TRUE 0 != ~tmp_ndt_3~0 [L444] ~t2_st~0 := 1; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp_ndt_1~0=1, ~tmp_ndt_2~0=1, ~tmp_ndt_3~0=1, ~tmp_ndt_4~0=1, ~tmp_ndt_5~0=1, ~tmp~0=1] [L445] CALL call transmit2(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=1, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L125] COND FALSE !(0 == ~t2_pc~0) VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=1, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L128] COND TRUE 1 == ~t2_pc~0 VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=1, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L144] ~E_3~0 := 1; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=1, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L145] CALL call immediate_notify(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=1, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L651] CALL call activate_threads(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=1, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L595] havoc ~tmp~1; [L596] havoc ~tmp___0~0; [L597] havoc ~tmp___1~0; [L598] havoc ~tmp___2~0; [L599] havoc ~tmp___3~0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=1, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L603] CALL call #t~ret6 := is_master_triggered(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=1, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L225] havoc ~__retres1~0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=1, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L228] COND TRUE 1 == ~m_pc~0 VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=1, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L229] COND FALSE !(1 == ~M_E~0) VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=1, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L238] ~__retres1~0 := 0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=1, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~__retres1~0=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L240] #res := ~__retres1~0; VAL [#res=0, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=1, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~__retres1~0=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L603] RET call #t~ret6 := is_master_triggered(); VAL [#t~ret6=0, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=1, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L603] assume -2147483648 <= #t~ret6 && #t~ret6 <= 2147483647; [L603] ~tmp~1 := #t~ret6; [L603] havoc #t~ret6; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=1, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp~1=0] [L605-L609] COND FALSE !(0 != ~tmp~1) VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=1, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp~1=0] [L611] CALL call #t~ret7 := is_transmit1_triggered(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=1, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L244] havoc ~__retres1~1; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=1, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L247] COND TRUE 1 == ~t1_pc~0 VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=1, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L248] COND FALSE !(1 == ~E_1~0) VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=1, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L257] ~__retres1~1 := 0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=1, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~__retres1~1=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L259] #res := ~__retres1~1; VAL [#res=0, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=1, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~__retres1~1=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L611] RET call #t~ret7 := is_transmit1_triggered(); VAL [#t~ret7=0, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=1, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp~1=0] [L611] assume -2147483648 <= #t~ret7 && #t~ret7 <= 2147483647; [L611] ~tmp___0~0 := #t~ret7; [L611] havoc #t~ret7; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=1, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp___0~0=0, ~tmp~1=0] [L613-L617] COND FALSE !(0 != ~tmp___0~0) VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=1, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp___0~0=0, ~tmp~1=0] [L619] CALL call #t~ret8 := is_transmit2_triggered(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=1, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L263] havoc ~__retres1~2; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=1, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L266] COND TRUE 1 == ~t2_pc~0 VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=1, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L267] COND FALSE !(1 == ~E_2~0) VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=1, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L276] ~__retres1~2 := 0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=1, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~__retres1~2=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L278] #res := ~__retres1~2; VAL [#res=0, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=1, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~__retres1~2=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L619] RET call #t~ret8 := is_transmit2_triggered(); VAL [#t~ret8=0, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=1, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp___0~0=0, ~tmp~1=0] [L619] assume -2147483648 <= #t~ret8 && #t~ret8 <= 2147483647; [L619] ~tmp___1~0 := #t~ret8; [L619] havoc #t~ret8; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=1, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp___0~0=0, ~tmp___1~0=0, ~tmp~1=0] [L621-L625] COND FALSE !(0 != ~tmp___1~0) VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=1, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp___0~0=0, ~tmp___1~0=0, ~tmp~1=0] [L627] CALL call #t~ret9 := is_transmit3_triggered(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=1, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L282] havoc ~__retres1~3; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=1, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L285] COND TRUE 1 == ~t3_pc~0 VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=1, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L286] COND TRUE 1 == ~E_3~0 [L287] ~__retres1~3 := 1; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=1, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~__retres1~3=1, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L297] #res := ~__retres1~3; VAL [#res=1, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=1, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~__retres1~3=1, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L627] RET call #t~ret9 := is_transmit3_triggered(); VAL [#t~ret9=1, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=1, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp___0~0=0, ~tmp___1~0=0, ~tmp~1=0] [L627] assume -2147483648 <= #t~ret9 && #t~ret9 <= 2147483647; [L627] ~tmp___2~0 := #t~ret9; [L627] havoc #t~ret9; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=1, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp___0~0=0, ~tmp___1~0=0, ~tmp___2~0=1, ~tmp~1=0] [L629-L633] COND TRUE 0 != ~tmp___2~0 [L630] ~t3_st~0 := 0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=1, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp___0~0=0, ~tmp___1~0=0, ~tmp___2~0=1, ~tmp~1=0] [L635] CALL call #t~ret10 := is_transmit4_triggered(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=1, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L301] havoc ~__retres1~4; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=1, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L304] COND TRUE 1 == ~t4_pc~0 VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=1, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L305] COND FALSE !(1 == ~E_4~0) VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=1, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L314] ~__retres1~4 := 0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=1, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~__retres1~4=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L316] #res := ~__retres1~4; VAL [#res=0, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=1, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~__retres1~4=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L635] RET call #t~ret10 := is_transmit4_triggered(); VAL [#t~ret10=0, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=1, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp___0~0=0, ~tmp___1~0=0, ~tmp___2~0=1, ~tmp~1=0] [L635] assume -2147483648 <= #t~ret10 && #t~ret10 <= 2147483647; [L635] ~tmp___3~0 := #t~ret10; [L635] havoc #t~ret10; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=1, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp___0~0=0, ~tmp___1~0=0, ~tmp___2~0=1, ~tmp___3~0=0, ~tmp~1=0] [L637-L641] COND FALSE !(0 != ~tmp___3~0) VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=1, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp___0~0=0, ~tmp___1~0=0, ~tmp___2~0=1, ~tmp___3~0=0, ~tmp~1=0] [L651] RET call activate_threads(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=1, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L145] RET call immediate_notify(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=1, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L146] ~E_3~0 := 2; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=1, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L136-L148] COND FALSE !(false) VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=1, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L138] ~t2_pc~0 := 1; [L139] ~t2_st~0 := 2; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=1, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L445] RET call transmit2(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp_ndt_1~0=1, ~tmp_ndt_2~0=1, ~tmp_ndt_3~0=1, ~tmp_ndt_4~0=1, ~tmp_ndt_5~0=1, ~tmp~0=1] [L453] COND TRUE 0 == ~t3_st~0 [L454] havoc ~tmp_ndt_4~0; [L455] assume -2147483648 <= #t~nondet4 && #t~nondet4 <= 2147483647; [L455] ~tmp_ndt_4~0 := #t~nondet4; [L455] havoc #t~nondet4; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp_ndt_1~0=1, ~tmp_ndt_2~0=1, ~tmp_ndt_3~0=1, ~tmp_ndt_4~0=1, ~tmp_ndt_5~0=1, ~tmp~0=1] [L456-L463] COND TRUE 0 != ~tmp_ndt_4~0 [L458] ~t3_st~0 := 1; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp_ndt_1~0=1, ~tmp_ndt_2~0=1, ~tmp_ndt_3~0=1, ~tmp_ndt_4~0=1, ~tmp_ndt_5~0=1, ~tmp~0=1] [L459] CALL call transmit3(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=1, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L160] COND FALSE !(0 == ~t3_pc~0) VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=1, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L163] COND TRUE 1 == ~t3_pc~0 VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=1, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L179] ~E_4~0 := 1; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=1, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L180] CALL call immediate_notify(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=1, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L651] CALL call activate_threads(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=1, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L595] havoc ~tmp~1; [L596] havoc ~tmp___0~0; [L597] havoc ~tmp___1~0; [L598] havoc ~tmp___2~0; [L599] havoc ~tmp___3~0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=1, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L603] CALL call #t~ret6 := is_master_triggered(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=1, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L225] havoc ~__retres1~0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=1, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L228] COND TRUE 1 == ~m_pc~0 VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=1, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L229] COND FALSE !(1 == ~M_E~0) VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=1, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L238] ~__retres1~0 := 0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=1, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~__retres1~0=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L240] #res := ~__retres1~0; VAL [#res=0, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=1, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~__retres1~0=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L603] RET call #t~ret6 := is_master_triggered(); VAL [#t~ret6=0, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=1, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L603] assume -2147483648 <= #t~ret6 && #t~ret6 <= 2147483647; [L603] ~tmp~1 := #t~ret6; [L603] havoc #t~ret6; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=1, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp~1=0] [L605-L609] COND FALSE !(0 != ~tmp~1) VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=1, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp~1=0] [L611] CALL call #t~ret7 := is_transmit1_triggered(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=1, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L244] havoc ~__retres1~1; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=1, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L247] COND TRUE 1 == ~t1_pc~0 VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=1, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L248] COND FALSE !(1 == ~E_1~0) VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=1, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L257] ~__retres1~1 := 0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=1, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~__retres1~1=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L259] #res := ~__retres1~1; VAL [#res=0, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=1, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~__retres1~1=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L611] RET call #t~ret7 := is_transmit1_triggered(); VAL [#t~ret7=0, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=1, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp~1=0] [L611] assume -2147483648 <= #t~ret7 && #t~ret7 <= 2147483647; [L611] ~tmp___0~0 := #t~ret7; [L611] havoc #t~ret7; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=1, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp___0~0=0, ~tmp~1=0] [L613-L617] COND FALSE !(0 != ~tmp___0~0) VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=1, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp___0~0=0, ~tmp~1=0] [L619] CALL call #t~ret8 := is_transmit2_triggered(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=1, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L263] havoc ~__retres1~2; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=1, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L266] COND TRUE 1 == ~t2_pc~0 VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=1, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L267] COND FALSE !(1 == ~E_2~0) VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=1, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L276] ~__retres1~2 := 0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=1, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~__retres1~2=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L278] #res := ~__retres1~2; VAL [#res=0, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=1, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~__retres1~2=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L619] RET call #t~ret8 := is_transmit2_triggered(); VAL [#t~ret8=0, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=1, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp___0~0=0, ~tmp~1=0] [L619] assume -2147483648 <= #t~ret8 && #t~ret8 <= 2147483647; [L619] ~tmp___1~0 := #t~ret8; [L619] havoc #t~ret8; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=1, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp___0~0=0, ~tmp___1~0=0, ~tmp~1=0] [L621-L625] COND FALSE !(0 != ~tmp___1~0) VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=1, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp___0~0=0, ~tmp___1~0=0, ~tmp~1=0] [L627] CALL call #t~ret9 := is_transmit3_triggered(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=1, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L282] havoc ~__retres1~3; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=1, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L285] COND TRUE 1 == ~t3_pc~0 VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=1, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L286] COND FALSE !(1 == ~E_3~0) VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=1, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L295] ~__retres1~3 := 0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=1, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~__retres1~3=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L297] #res := ~__retres1~3; VAL [#res=0, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=1, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~__retres1~3=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L627] RET call #t~ret9 := is_transmit3_triggered(); VAL [#t~ret9=0, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=1, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp___0~0=0, ~tmp___1~0=0, ~tmp~1=0] [L627] assume -2147483648 <= #t~ret9 && #t~ret9 <= 2147483647; [L627] ~tmp___2~0 := #t~ret9; [L627] havoc #t~ret9; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=1, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp___0~0=0, ~tmp___1~0=0, ~tmp___2~0=0, ~tmp~1=0] [L629-L633] COND FALSE !(0 != ~tmp___2~0) VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=1, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp___0~0=0, ~tmp___1~0=0, ~tmp___2~0=0, ~tmp~1=0] [L635] CALL call #t~ret10 := is_transmit4_triggered(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=1, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L301] havoc ~__retres1~4; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=1, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L304] COND TRUE 1 == ~t4_pc~0 VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=1, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L305] COND TRUE 1 == ~E_4~0 [L306] ~__retres1~4 := 1; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=1, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~__retres1~4=1, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L316] #res := ~__retres1~4; VAL [#res=1, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=1, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~__retres1~4=1, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L635] RET call #t~ret10 := is_transmit4_triggered(); VAL [#t~ret10=1, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=1, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp___0~0=0, ~tmp___1~0=0, ~tmp___2~0=0, ~tmp~1=0] [L635] assume -2147483648 <= #t~ret10 && #t~ret10 <= 2147483647; [L635] ~tmp___3~0 := #t~ret10; [L635] havoc #t~ret10; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=1, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp___0~0=0, ~tmp___1~0=0, ~tmp___2~0=0, ~tmp___3~0=1, ~tmp~1=0] [L637-L641] COND TRUE 0 != ~tmp___3~0 [L638] ~t4_st~0 := 0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=1, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=0, ~tmp___0~0=0, ~tmp___1~0=0, ~tmp___2~0=0, ~tmp___3~0=1, ~tmp~1=0] [L651] RET call activate_threads(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=1, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=0] [L180] RET call immediate_notify(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=1, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=0] [L181] ~E_4~0 := 2; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=1, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=0] [L171-L183] COND FALSE !(false) VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=1, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=0] [L173] ~t3_pc~0 := 1; [L174] ~t3_st~0 := 2; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=1, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=0] [L459] RET call transmit3(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=0, ~tmp_ndt_1~0=1, ~tmp_ndt_2~0=1, ~tmp_ndt_3~0=1, ~tmp_ndt_4~0=1, ~tmp_ndt_5~0=1, ~tmp~0=1] [L467] COND TRUE 0 == ~t4_st~0 [L468] havoc ~tmp_ndt_5~0; [L469] assume -2147483648 <= #t~nondet5 && #t~nondet5 <= 2147483647; [L469] ~tmp_ndt_5~0 := #t~nondet5; [L469] havoc #t~nondet5; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=0, ~tmp_ndt_1~0=1, ~tmp_ndt_2~0=1, ~tmp_ndt_3~0=1, ~tmp_ndt_4~0=1, ~tmp_ndt_5~0=1, ~tmp~0=1] [L470-L477] COND TRUE 0 != ~tmp_ndt_5~0 [L472] ~t4_st~0 := 1; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=1, ~tmp_ndt_1~0=1, ~tmp_ndt_2~0=1, ~tmp_ndt_3~0=1, ~tmp_ndt_4~0=1, ~tmp_ndt_5~0=1, ~tmp~0=1] [L473] CALL call transmit4(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=1, old(~t4_st~0)=1, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=1] [L195] COND FALSE !(0 == ~t4_pc~0) VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=1, old(~t4_st~0)=1, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=1] [L198] COND TRUE 1 == ~t4_pc~0 VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=1, old(~t4_st~0)=1, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=1] [L214] CALL call error(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=1, old(~t4_st~0)=1, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=1] [L11] assert false; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=1, old(~t4_st~0)=1, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=1] ----- ----- class de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.CACSL2BoogieBacktranslator [?] CALL call ULTIMATE.init(); VAL [old(~E_1~0)=21, old(~E_2~0)=5, old(~E_3~0)=25, old(~E_4~0)=11, old(~M_E~0)=17, old(~m_i~0)=7, old(~m_pc~0)=15, old(~m_st~0)=16, old(~T1_E~0)=3, old(~t1_i~0)=19, old(~t1_pc~0)=9, old(~t1_st~0)=4, old(~T2_E~0)=18, old(~t2_i~0)=6, old(~t2_pc~0)=10, old(~t2_st~0)=13, old(~T3_E~0)=23, old(~t3_i~0)=24, old(~t3_pc~0)=8, old(~t3_st~0)=14, old(~T4_E~0)=26, old(~t4_i~0)=20, old(~t4_pc~0)=22, old(~t4_st~0)=12, ~E_1~0=21, ~E_2~0=5, ~E_3~0=25, ~E_4~0=11, ~M_E~0=17, ~m_i~0=7, ~m_pc~0=15, ~m_st~0=16, ~T1_E~0=3, ~t1_i~0=19, ~t1_pc~0=9, ~t1_st~0=4, ~T2_E~0=18, ~t2_i~0=6, ~t2_pc~0=10, ~t2_st~0=13, ~T3_E~0=23, ~t3_i~0=24, ~t3_pc~0=8, ~t3_st~0=14, ~T4_E~0=26, ~t4_i~0=20, ~t4_pc~0=22, ~t4_st~0=12] [L15] ~m_pc~0 := 0; [L16] ~t1_pc~0 := 0; [L17] ~t2_pc~0 := 0; [L18] ~t3_pc~0 := 0; [L19] ~t4_pc~0 := 0; [L20] ~m_st~0 := 0; [L21] ~t1_st~0 := 0; [L22] ~t2_st~0 := 0; [L23] ~t3_st~0 := 0; [L24] ~t4_st~0 := 0; [L25] ~m_i~0 := 0; [L26] ~t1_i~0 := 0; [L27] ~t2_i~0 := 0; [L28] ~t3_i~0 := 0; [L29] ~t4_i~0 := 0; [L30] ~M_E~0 := 2; [L31] ~T1_E~0 := 2; [L32] ~T2_E~0 := 2; [L33] ~T3_E~0 := 2; [L34] ~T4_E~0 := 2; [L35] ~E_1~0 := 2; [L36] ~E_2~0 := 2; [L37] ~E_3~0 := 2; [L38] ~E_4~0 := 2; VAL [old(~E_1~0)=21, old(~E_2~0)=5, old(~E_3~0)=25, old(~E_4~0)=11, old(~M_E~0)=17, old(~m_i~0)=7, old(~m_pc~0)=15, old(~m_st~0)=16, old(~T1_E~0)=3, old(~t1_i~0)=19, old(~t1_pc~0)=9, old(~t1_st~0)=4, old(~T2_E~0)=18, old(~t2_i~0)=6, old(~t2_pc~0)=10, old(~t2_st~0)=13, old(~T3_E~0)=23, old(~t3_i~0)=24, old(~t3_pc~0)=8, old(~t3_st~0)=14, old(~T4_E~0)=26, old(~t4_i~0)=20, old(~t4_pc~0)=22, old(~t4_st~0)=12, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=0, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=0, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=0, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=0, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=0, ~t4_pc~0=0, ~t4_st~0=0] [?] RET call ULTIMATE.init(); VAL [~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=0, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=0, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=0, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=0, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=0, ~t4_pc~0=0, ~t4_st~0=0] [?] CALL call #t~ret14 := main(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=0, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=0, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=0, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=0, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=0, ~t4_pc~0=0, ~t4_st~0=0] [L811] havoc ~__retres1~6; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=0, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=0, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=0, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=0, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=0, ~t4_pc~0=0, ~t4_st~0=0] [L815] CALL call init_model(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=0, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=0, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=0, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=0, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=0, ~t4_pc~0=0, ~t4_st~0=0] [L723] ~m_i~0 := 1; [L724] ~t1_i~0 := 1; [L725] ~t2_i~0 := 1; [L726] ~t3_i~0 := 1; [L727] ~t4_i~0 := 1; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L815] RET call init_model(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L816] CALL call start_simulation(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L752] havoc ~kernel_st~0; [L753] havoc ~tmp~3; [L754] havoc ~tmp___0~1; [L758] ~kernel_st~0 := 0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~kernel_st~0=0, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L759] CALL call update_channels(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L759] RET call update_channels(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~kernel_st~0=0, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L760] CALL call init_threads(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L331] COND TRUE 1 == ~m_i~0 [L332] ~m_st~0 := 0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L336] COND TRUE 1 == ~t1_i~0 [L337] ~t1_st~0 := 0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L341] COND TRUE 1 == ~t2_i~0 [L342] ~t2_st~0 := 0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L346] COND TRUE 1 == ~t3_i~0 [L347] ~t3_st~0 := 0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L351] COND TRUE 1 == ~t4_i~0 [L352] ~t4_st~0 := 0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L760] RET call init_threads(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~kernel_st~0=0, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L761] CALL call fire_delta_events(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L492] COND FALSE !(0 == ~M_E~0) VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L497] COND FALSE !(0 == ~T1_E~0) VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L502] COND FALSE !(0 == ~T2_E~0) VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L507] COND FALSE !(0 == ~T3_E~0) VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L512] COND FALSE !(0 == ~T4_E~0) VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L517] COND FALSE !(0 == ~E_1~0) VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L522] COND FALSE !(0 == ~E_2~0) VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L527] COND FALSE !(0 == ~E_3~0) VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L532] COND FALSE !(0 == ~E_4~0) VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L761] RET call fire_delta_events(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~kernel_st~0=0, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L762] CALL call activate_threads(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L595] havoc ~tmp~1; [L596] havoc ~tmp___0~0; [L597] havoc ~tmp___1~0; [L598] havoc ~tmp___2~0; [L599] havoc ~tmp___3~0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L603] CALL call #t~ret6 := is_master_triggered(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L225] havoc ~__retres1~0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L228] COND FALSE !(1 == ~m_pc~0) VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L238] ~__retres1~0 := 0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~__retres1~0=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L240] #res := ~__retres1~0; VAL [#res=0, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~__retres1~0=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L603] RET call #t~ret6 := is_master_triggered(); VAL [#t~ret6=0, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L603] assume -2147483648 <= #t~ret6 && #t~ret6 <= 2147483647; [L603] ~tmp~1 := #t~ret6; [L603] havoc #t~ret6; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0, ~tmp~1=0] [L605-L609] COND FALSE !(0 != ~tmp~1) VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0, ~tmp~1=0] [L611] CALL call #t~ret7 := is_transmit1_triggered(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L244] havoc ~__retres1~1; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L247] COND FALSE !(1 == ~t1_pc~0) VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L257] ~__retres1~1 := 0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~__retres1~1=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L259] #res := ~__retres1~1; VAL [#res=0, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~__retres1~1=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L611] RET call #t~ret7 := is_transmit1_triggered(); VAL [#t~ret7=0, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0, ~tmp~1=0] [L611] assume -2147483648 <= #t~ret7 && #t~ret7 <= 2147483647; [L611] ~tmp___0~0 := #t~ret7; [L611] havoc #t~ret7; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0, ~tmp___0~0=0, ~tmp~1=0] [L613-L617] COND FALSE !(0 != ~tmp___0~0) VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0, ~tmp___0~0=0, ~tmp~1=0] [L619] CALL call #t~ret8 := is_transmit2_triggered(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L263] havoc ~__retres1~2; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L266] COND FALSE !(1 == ~t2_pc~0) VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L276] ~__retres1~2 := 0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~__retres1~2=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L278] #res := ~__retres1~2; VAL [#res=0, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~__retres1~2=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L619] RET call #t~ret8 := is_transmit2_triggered(); VAL [#t~ret8=0, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0, ~tmp___0~0=0, ~tmp~1=0] [L619] assume -2147483648 <= #t~ret8 && #t~ret8 <= 2147483647; [L619] ~tmp___1~0 := #t~ret8; [L619] havoc #t~ret8; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0, ~tmp___0~0=0, ~tmp___1~0=0, ~tmp~1=0] [L621-L625] COND FALSE !(0 != ~tmp___1~0) VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0, ~tmp___0~0=0, ~tmp___1~0=0, ~tmp~1=0] [L627] CALL call #t~ret9 := is_transmit3_triggered(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L282] havoc ~__retres1~3; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L285] COND FALSE !(1 == ~t3_pc~0) VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L295] ~__retres1~3 := 0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~__retres1~3=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L297] #res := ~__retres1~3; VAL [#res=0, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~__retres1~3=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L627] RET call #t~ret9 := is_transmit3_triggered(); VAL [#t~ret9=0, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0, ~tmp___0~0=0, ~tmp___1~0=0, ~tmp~1=0] [L627] assume -2147483648 <= #t~ret9 && #t~ret9 <= 2147483647; [L627] ~tmp___2~0 := #t~ret9; [L627] havoc #t~ret9; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0, ~tmp___0~0=0, ~tmp___1~0=0, ~tmp___2~0=0, ~tmp~1=0] [L629-L633] COND FALSE !(0 != ~tmp___2~0) VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0, ~tmp___0~0=0, ~tmp___1~0=0, ~tmp___2~0=0, ~tmp~1=0] [L635] CALL call #t~ret10 := is_transmit4_triggered(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L301] havoc ~__retres1~4; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L304] COND FALSE !(1 == ~t4_pc~0) VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L314] ~__retres1~4 := 0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~__retres1~4=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L316] #res := ~__retres1~4; VAL [#res=0, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~__retres1~4=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L635] RET call #t~ret10 := is_transmit4_triggered(); VAL [#t~ret10=0, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0, ~tmp___0~0=0, ~tmp___1~0=0, ~tmp___2~0=0, ~tmp~1=0] [L635] assume -2147483648 <= #t~ret10 && #t~ret10 <= 2147483647; [L635] ~tmp___3~0 := #t~ret10; [L635] havoc #t~ret10; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0, ~tmp___0~0=0, ~tmp___1~0=0, ~tmp___2~0=0, ~tmp___3~0=0, ~tmp~1=0] [L637-L641] COND FALSE !(0 != ~tmp___3~0) VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0, ~tmp___0~0=0, ~tmp___1~0=0, ~tmp___2~0=0, ~tmp___3~0=0, ~tmp~1=0] [L762] RET call activate_threads(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~kernel_st~0=0, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L763] CALL call reset_delta_events(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L545] COND FALSE !(1 == ~M_E~0) VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L550] COND FALSE !(1 == ~T1_E~0) VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L555] COND FALSE !(1 == ~T2_E~0) VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L560] COND FALSE !(1 == ~T3_E~0) VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L565] COND FALSE !(1 == ~T4_E~0) VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L570] COND FALSE !(1 == ~E_1~0) VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L575] COND FALSE !(1 == ~E_2~0) VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L580] COND FALSE !(1 == ~E_3~0) VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L585] COND FALSE !(1 == ~E_4~0) VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L763] RET call reset_delta_events(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~kernel_st~0=0, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L766-L803] COND FALSE !(false) VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~kernel_st~0=0, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L769] ~kernel_st~0 := 1; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~kernel_st~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L770] CALL call eval(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L397] havoc ~tmp~0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L401-L481] COND FALSE !(false) VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L404] CALL call #t~ret0 := exists_runnable_thread(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L361] havoc ~__retres1~5; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L364] COND TRUE 0 == ~m_st~0 [L365] ~__retres1~5 := 1; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~__retres1~5=1, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L392] #res := ~__retres1~5; VAL [#res=1, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~__retres1~5=1, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L404] RET call #t~ret0 := exists_runnable_thread(); VAL [#t~ret0=1, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L404] assume -2147483648 <= #t~ret0 && #t~ret0 <= 2147483647; [L404] ~tmp~0 := #t~ret0; [L404] havoc #t~ret0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0, ~tmp~0=1] [L406-L410] COND TRUE 0 != ~tmp~0 VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0, ~tmp~0=1] [L411] COND TRUE 0 == ~m_st~0 [L412] havoc ~tmp_ndt_1~0; [L413] assume -2147483648 <= #t~nondet1 && #t~nondet1 <= 2147483647; [L413] ~tmp_ndt_1~0 := #t~nondet1; [L413] havoc #t~nondet1; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0, ~tmp_ndt_1~0=0, ~tmp~0=1] [L414-L421] COND FALSE !(0 != ~tmp_ndt_1~0) VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0, ~tmp_ndt_1~0=0, ~tmp~0=1] [L425] COND TRUE 0 == ~t1_st~0 [L426] havoc ~tmp_ndt_2~0; [L427] assume -2147483648 <= #t~nondet2 && #t~nondet2 <= 2147483647; [L427] ~tmp_ndt_2~0 := #t~nondet2; [L427] havoc #t~nondet2; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0, ~tmp_ndt_1~0=0, ~tmp_ndt_2~0=1, ~tmp~0=1] [L428-L435] COND TRUE 0 != ~tmp_ndt_2~0 [L430] ~t1_st~0 := 1; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0, ~tmp_ndt_1~0=0, ~tmp_ndt_2~0=1, ~tmp~0=1] [L431] CALL call transmit1(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L90] COND TRUE 0 == ~t1_pc~0 VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L101-L113] COND FALSE !(false) VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=0, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L103] ~t1_pc~0 := 1; [L104] ~t1_st~0 := 2; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L431] RET call transmit1(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0, ~tmp_ndt_1~0=0, ~tmp_ndt_2~0=1, ~tmp~0=1] [L439] COND TRUE 0 == ~t2_st~0 [L440] havoc ~tmp_ndt_3~0; [L441] assume -2147483648 <= #t~nondet3 && #t~nondet3 <= 2147483647; [L441] ~tmp_ndt_3~0 := #t~nondet3; [L441] havoc #t~nondet3; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0, ~tmp_ndt_1~0=0, ~tmp_ndt_2~0=1, ~tmp_ndt_3~0=1, ~tmp~0=1] [L442-L449] COND TRUE 0 != ~tmp_ndt_3~0 [L444] ~t2_st~0 := 1; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0, ~tmp_ndt_1~0=0, ~tmp_ndt_2~0=1, ~tmp_ndt_3~0=1, ~tmp~0=1] [L445] CALL call transmit2(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L125] COND TRUE 0 == ~t2_pc~0 VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L136-L148] COND FALSE !(false) VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=0, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L138] ~t2_pc~0 := 1; [L139] ~t2_st~0 := 2; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L445] RET call transmit2(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0, ~tmp_ndt_1~0=0, ~tmp_ndt_2~0=1, ~tmp_ndt_3~0=1, ~tmp~0=1] [L453] COND TRUE 0 == ~t3_st~0 [L454] havoc ~tmp_ndt_4~0; [L455] assume -2147483648 <= #t~nondet4 && #t~nondet4 <= 2147483647; [L455] ~tmp_ndt_4~0 := #t~nondet4; [L455] havoc #t~nondet4; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0, ~tmp_ndt_1~0=0, ~tmp_ndt_2~0=1, ~tmp_ndt_3~0=1, ~tmp_ndt_4~0=1, ~tmp~0=1] [L456-L463] COND TRUE 0 != ~tmp_ndt_4~0 [L458] ~t3_st~0 := 1; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0, ~tmp_ndt_1~0=0, ~tmp_ndt_2~0=1, ~tmp_ndt_3~0=1, ~tmp_ndt_4~0=1, ~tmp~0=1] [L459] CALL call transmit3(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L160] COND TRUE 0 == ~t3_pc~0 VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L171-L183] COND FALSE !(false) VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=0, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L173] ~t3_pc~0 := 1; [L174] ~t3_st~0 := 2; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0] [L459] RET call transmit3(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0, ~tmp_ndt_1~0=0, ~tmp_ndt_2~0=1, ~tmp_ndt_3~0=1, ~tmp_ndt_4~0=1, ~tmp~0=1] [L467] COND TRUE 0 == ~t4_st~0 [L468] havoc ~tmp_ndt_5~0; [L469] assume -2147483648 <= #t~nondet5 && #t~nondet5 <= 2147483647; [L469] ~tmp_ndt_5~0 := #t~nondet5; [L469] havoc #t~nondet5; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=0, ~tmp_ndt_1~0=0, ~tmp_ndt_2~0=1, ~tmp_ndt_3~0=1, ~tmp_ndt_4~0=1, ~tmp_ndt_5~0=1, ~tmp~0=1] [L470-L477] COND TRUE 0 != ~tmp_ndt_5~0 [L472] ~t4_st~0 := 1; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=1, ~tmp_ndt_1~0=0, ~tmp_ndt_2~0=1, ~tmp_ndt_3~0=1, ~tmp_ndt_4~0=1, ~tmp_ndt_5~0=1, ~tmp~0=1] [L473] CALL call transmit4(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=1, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=1] [L195] COND TRUE 0 == ~t4_pc~0 VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=1, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=1] [L206-L216] COND FALSE !(false) VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=1, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=0, ~t4_st~0=1] [L208] ~t4_pc~0 := 1; [L209] ~t4_st~0 := 2; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=1, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L473] RET call transmit4(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp_ndt_1~0=0, ~tmp_ndt_2~0=1, ~tmp_ndt_3~0=1, ~tmp_ndt_4~0=1, ~tmp_ndt_5~0=1, ~tmp~0=1] [L401-L481] COND FALSE !(false) VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp_ndt_1~0=0, ~tmp_ndt_2~0=1, ~tmp_ndt_3~0=1, ~tmp_ndt_4~0=1, ~tmp_ndt_5~0=1, ~tmp~0=1] [L404] CALL call #t~ret0 := exists_runnable_thread(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L361] havoc ~__retres1~5; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L364] COND TRUE 0 == ~m_st~0 [L365] ~__retres1~5 := 1; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~__retres1~5=1, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L392] #res := ~__retres1~5; VAL [#res=1, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~__retres1~5=1, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L404] RET call #t~ret0 := exists_runnable_thread(); VAL [#t~ret0=1, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp_ndt_1~0=0, ~tmp_ndt_2~0=1, ~tmp_ndt_3~0=1, ~tmp_ndt_4~0=1, ~tmp_ndt_5~0=1, ~tmp~0=1] [L404] assume -2147483648 <= #t~ret0 && #t~ret0 <= 2147483647; [L404] ~tmp~0 := #t~ret0; [L404] havoc #t~ret0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp_ndt_1~0=0, ~tmp_ndt_2~0=1, ~tmp_ndt_3~0=1, ~tmp_ndt_4~0=1, ~tmp_ndt_5~0=1, ~tmp~0=1] [L406-L410] COND TRUE 0 != ~tmp~0 VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp_ndt_1~0=0, ~tmp_ndt_2~0=1, ~tmp_ndt_3~0=1, ~tmp_ndt_4~0=1, ~tmp_ndt_5~0=1, ~tmp~0=1] [L411] COND TRUE 0 == ~m_st~0 [L412] havoc ~tmp_ndt_1~0; [L413] assume -2147483648 <= #t~nondet1 && #t~nondet1 <= 2147483647; [L413] ~tmp_ndt_1~0 := #t~nondet1; [L413] havoc #t~nondet1; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=0, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp_ndt_1~0=1, ~tmp_ndt_2~0=1, ~tmp_ndt_3~0=1, ~tmp_ndt_4~0=1, ~tmp_ndt_5~0=1, ~tmp~0=1] [L414-L421] COND TRUE 0 != ~tmp_ndt_1~0 [L416] ~m_st~0 := 1; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp_ndt_1~0=1, ~tmp_ndt_2~0=1, ~tmp_ndt_3~0=1, ~tmp_ndt_4~0=1, ~tmp_ndt_5~0=1, ~tmp~0=1] [L417] CALL call master(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L49] COND TRUE 0 == ~m_pc~0 VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L60-L78] COND FALSE !(false) VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L63] ~E_1~0 := 1; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L64] CALL call immediate_notify(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L651] CALL call activate_threads(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L595] havoc ~tmp~1; [L596] havoc ~tmp___0~0; [L597] havoc ~tmp___1~0; [L598] havoc ~tmp___2~0; [L599] havoc ~tmp___3~0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L603] CALL call #t~ret6 := is_master_triggered(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L225] havoc ~__retres1~0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L228] COND FALSE !(1 == ~m_pc~0) VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L238] ~__retres1~0 := 0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~__retres1~0=0, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L240] #res := ~__retres1~0; VAL [#res=0, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~__retres1~0=0, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L603] RET call #t~ret6 := is_master_triggered(); VAL [#t~ret6=0, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L603] assume -2147483648 <= #t~ret6 && #t~ret6 <= 2147483647; [L603] ~tmp~1 := #t~ret6; [L603] havoc #t~ret6; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp~1=0] [L605-L609] COND FALSE !(0 != ~tmp~1) VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp~1=0] [L611] CALL call #t~ret7 := is_transmit1_triggered(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L244] havoc ~__retres1~1; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L247] COND TRUE 1 == ~t1_pc~0 VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L248] COND TRUE 1 == ~E_1~0 [L249] ~__retres1~1 := 1; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~__retres1~1=1, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L259] #res := ~__retres1~1; VAL [#res=1, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~__retres1~1=1, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L611] RET call #t~ret7 := is_transmit1_triggered(); VAL [#t~ret7=1, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp~1=0] [L611] assume -2147483648 <= #t~ret7 && #t~ret7 <= 2147483647; [L611] ~tmp___0~0 := #t~ret7; [L611] havoc #t~ret7; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp___0~0=1, ~tmp~1=0] [L613-L617] COND TRUE 0 != ~tmp___0~0 [L614] ~t1_st~0 := 0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp___0~0=1, ~tmp~1=0] [L619] CALL call #t~ret8 := is_transmit2_triggered(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L263] havoc ~__retres1~2; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L266] COND TRUE 1 == ~t2_pc~0 VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L267] COND FALSE !(1 == ~E_2~0) VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L276] ~__retres1~2 := 0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~__retres1~2=0, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L278] #res := ~__retres1~2; VAL [#res=0, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~__retres1~2=0, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L619] RET call #t~ret8 := is_transmit2_triggered(); VAL [#t~ret8=0, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp___0~0=1, ~tmp~1=0] [L619] assume -2147483648 <= #t~ret8 && #t~ret8 <= 2147483647; [L619] ~tmp___1~0 := #t~ret8; [L619] havoc #t~ret8; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp___0~0=1, ~tmp___1~0=0, ~tmp~1=0] [L621-L625] COND FALSE !(0 != ~tmp___1~0) VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp___0~0=1, ~tmp___1~0=0, ~tmp~1=0] [L627] CALL call #t~ret9 := is_transmit3_triggered(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L282] havoc ~__retres1~3; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L285] COND TRUE 1 == ~t3_pc~0 VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L286] COND FALSE !(1 == ~E_3~0) VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L295] ~__retres1~3 := 0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~__retres1~3=0, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L297] #res := ~__retres1~3; VAL [#res=0, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~__retres1~3=0, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L627] RET call #t~ret9 := is_transmit3_triggered(); VAL [#t~ret9=0, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp___0~0=1, ~tmp___1~0=0, ~tmp~1=0] [L627] assume -2147483648 <= #t~ret9 && #t~ret9 <= 2147483647; [L627] ~tmp___2~0 := #t~ret9; [L627] havoc #t~ret9; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp___0~0=1, ~tmp___1~0=0, ~tmp___2~0=0, ~tmp~1=0] [L629-L633] COND FALSE !(0 != ~tmp___2~0) VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp___0~0=1, ~tmp___1~0=0, ~tmp___2~0=0, ~tmp~1=0] [L635] CALL call #t~ret10 := is_transmit4_triggered(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L301] havoc ~__retres1~4; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L304] COND TRUE 1 == ~t4_pc~0 VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L305] COND FALSE !(1 == ~E_4~0) VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L314] ~__retres1~4 := 0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~__retres1~4=0, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L316] #res := ~__retres1~4; VAL [#res=0, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~__retres1~4=0, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L635] RET call #t~ret10 := is_transmit4_triggered(); VAL [#t~ret10=0, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp___0~0=1, ~tmp___1~0=0, ~tmp___2~0=0, ~tmp~1=0] [L635] assume -2147483648 <= #t~ret10 && #t~ret10 <= 2147483647; [L635] ~tmp___3~0 := #t~ret10; [L635] havoc #t~ret10; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp___0~0=1, ~tmp___1~0=0, ~tmp___2~0=0, ~tmp___3~0=0, ~tmp~1=0] [L637-L641] COND FALSE !(0 != ~tmp___3~0) VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp___0~0=1, ~tmp___1~0=0, ~tmp___2~0=0, ~tmp___3~0=0, ~tmp~1=0] [L651] RET call activate_threads(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L64] RET call immediate_notify(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=1, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L65] ~E_1~0 := 2; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L68-L75] COND FALSE !(false) VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=0, ~m_st~0=1, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L70] ~m_pc~0 := 1; [L71] ~m_st~0 := 2; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=1, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L417] RET call master(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp_ndt_1~0=1, ~tmp_ndt_2~0=1, ~tmp_ndt_3~0=1, ~tmp_ndt_4~0=1, ~tmp_ndt_5~0=1, ~tmp~0=1] [L425] COND TRUE 0 == ~t1_st~0 [L426] havoc ~tmp_ndt_2~0; [L427] assume -2147483648 <= #t~nondet2 && #t~nondet2 <= 2147483647; [L427] ~tmp_ndt_2~0 := #t~nondet2; [L427] havoc #t~nondet2; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=0, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp_ndt_1~0=1, ~tmp_ndt_2~0=1, ~tmp_ndt_3~0=1, ~tmp_ndt_4~0=1, ~tmp_ndt_5~0=1, ~tmp~0=1] [L428-L435] COND TRUE 0 != ~tmp_ndt_2~0 [L430] ~t1_st~0 := 1; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp_ndt_1~0=1, ~tmp_ndt_2~0=1, ~tmp_ndt_3~0=1, ~tmp_ndt_4~0=1, ~tmp_ndt_5~0=1, ~tmp~0=1] [L431] CALL call transmit1(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=1, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L90] COND FALSE !(0 == ~t1_pc~0) VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=1, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L93] COND TRUE 1 == ~t1_pc~0 VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=1, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L109] ~E_2~0 := 1; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=1, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L110] CALL call immediate_notify(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=1, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L651] CALL call activate_threads(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=1, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L595] havoc ~tmp~1; [L596] havoc ~tmp___0~0; [L597] havoc ~tmp___1~0; [L598] havoc ~tmp___2~0; [L599] havoc ~tmp___3~0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=1, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L603] CALL call #t~ret6 := is_master_triggered(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=1, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L225] havoc ~__retres1~0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=1, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L228] COND TRUE 1 == ~m_pc~0 VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=1, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L229] COND FALSE !(1 == ~M_E~0) VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=1, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L238] ~__retres1~0 := 0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=1, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~__retres1~0=0, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L240] #res := ~__retres1~0; VAL [#res=0, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=1, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~__retres1~0=0, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L603] RET call #t~ret6 := is_master_triggered(); VAL [#t~ret6=0, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=1, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L603] assume -2147483648 <= #t~ret6 && #t~ret6 <= 2147483647; [L603] ~tmp~1 := #t~ret6; [L603] havoc #t~ret6; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=1, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp~1=0] [L605-L609] COND FALSE !(0 != ~tmp~1) VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=1, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp~1=0] [L611] CALL call #t~ret7 := is_transmit1_triggered(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=1, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L244] havoc ~__retres1~1; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=1, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L247] COND TRUE 1 == ~t1_pc~0 VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=1, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L248] COND FALSE !(1 == ~E_1~0) VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=1, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L257] ~__retres1~1 := 0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=1, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~__retres1~1=0, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L259] #res := ~__retres1~1; VAL [#res=0, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=1, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~__retres1~1=0, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L611] RET call #t~ret7 := is_transmit1_triggered(); VAL [#t~ret7=0, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=1, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp~1=0] [L611] assume -2147483648 <= #t~ret7 && #t~ret7 <= 2147483647; [L611] ~tmp___0~0 := #t~ret7; [L611] havoc #t~ret7; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=1, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp___0~0=0, ~tmp~1=0] [L613-L617] COND FALSE !(0 != ~tmp___0~0) VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=1, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp___0~0=0, ~tmp~1=0] [L619] CALL call #t~ret8 := is_transmit2_triggered(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=1, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L263] havoc ~__retres1~2; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=1, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L266] COND TRUE 1 == ~t2_pc~0 VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=1, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L267] COND TRUE 1 == ~E_2~0 [L268] ~__retres1~2 := 1; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=1, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~__retres1~2=1, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L278] #res := ~__retres1~2; VAL [#res=1, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=1, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~__retres1~2=1, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L619] RET call #t~ret8 := is_transmit2_triggered(); VAL [#t~ret8=1, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=1, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp___0~0=0, ~tmp~1=0] [L619] assume -2147483648 <= #t~ret8 && #t~ret8 <= 2147483647; [L619] ~tmp___1~0 := #t~ret8; [L619] havoc #t~ret8; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=1, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp___0~0=0, ~tmp___1~0=1, ~tmp~1=0] [L621-L625] COND TRUE 0 != ~tmp___1~0 [L622] ~t2_st~0 := 0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=1, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp___0~0=0, ~tmp___1~0=1, ~tmp~1=0] [L627] CALL call #t~ret9 := is_transmit3_triggered(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=1, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L282] havoc ~__retres1~3; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=1, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L285] COND TRUE 1 == ~t3_pc~0 VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=1, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L286] COND FALSE !(1 == ~E_3~0) VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=1, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L295] ~__retres1~3 := 0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=1, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~__retres1~3=0, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L297] #res := ~__retres1~3; VAL [#res=0, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=1, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~__retres1~3=0, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L627] RET call #t~ret9 := is_transmit3_triggered(); VAL [#t~ret9=0, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=1, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp___0~0=0, ~tmp___1~0=1, ~tmp~1=0] [L627] assume -2147483648 <= #t~ret9 && #t~ret9 <= 2147483647; [L627] ~tmp___2~0 := #t~ret9; [L627] havoc #t~ret9; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=1, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp___0~0=0, ~tmp___1~0=1, ~tmp___2~0=0, ~tmp~1=0] [L629-L633] COND FALSE !(0 != ~tmp___2~0) VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=1, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp___0~0=0, ~tmp___1~0=1, ~tmp___2~0=0, ~tmp~1=0] [L635] CALL call #t~ret10 := is_transmit4_triggered(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=1, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L301] havoc ~__retres1~4; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=1, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L304] COND TRUE 1 == ~t4_pc~0 VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=1, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L305] COND FALSE !(1 == ~E_4~0) VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=1, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L314] ~__retres1~4 := 0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=1, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~__retres1~4=0, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L316] #res := ~__retres1~4; VAL [#res=0, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=1, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~__retres1~4=0, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L635] RET call #t~ret10 := is_transmit4_triggered(); VAL [#t~ret10=0, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=1, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp___0~0=0, ~tmp___1~0=1, ~tmp___2~0=0, ~tmp~1=0] [L635] assume -2147483648 <= #t~ret10 && #t~ret10 <= 2147483647; [L635] ~tmp___3~0 := #t~ret10; [L635] havoc #t~ret10; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=1, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp___0~0=0, ~tmp___1~0=1, ~tmp___2~0=0, ~tmp___3~0=0, ~tmp~1=0] [L637-L641] COND FALSE !(0 != ~tmp___3~0) VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=1, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp___0~0=0, ~tmp___1~0=1, ~tmp___2~0=0, ~tmp___3~0=0, ~tmp~1=0] [L651] RET call activate_threads(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=1, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L110] RET call immediate_notify(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=1, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=1, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L111] ~E_2~0 := 2; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=1, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L101-L113] COND FALSE !(false) VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=1, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=1, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L103] ~t1_pc~0 := 1; [L104] ~t1_st~0 := 2; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=1, old(~t1_st~0)=1, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L431] RET call transmit1(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp_ndt_1~0=1, ~tmp_ndt_2~0=1, ~tmp_ndt_3~0=1, ~tmp_ndt_4~0=1, ~tmp_ndt_5~0=1, ~tmp~0=1] [L439] COND TRUE 0 == ~t2_st~0 [L440] havoc ~tmp_ndt_3~0; [L441] assume -2147483648 <= #t~nondet3 && #t~nondet3 <= 2147483647; [L441] ~tmp_ndt_3~0 := #t~nondet3; [L441] havoc #t~nondet3; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=0, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp_ndt_1~0=1, ~tmp_ndt_2~0=1, ~tmp_ndt_3~0=1, ~tmp_ndt_4~0=1, ~tmp_ndt_5~0=1, ~tmp~0=1] [L442-L449] COND TRUE 0 != ~tmp_ndt_3~0 [L444] ~t2_st~0 := 1; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp_ndt_1~0=1, ~tmp_ndt_2~0=1, ~tmp_ndt_3~0=1, ~tmp_ndt_4~0=1, ~tmp_ndt_5~0=1, ~tmp~0=1] [L445] CALL call transmit2(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=1, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L125] COND FALSE !(0 == ~t2_pc~0) VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=1, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L128] COND TRUE 1 == ~t2_pc~0 VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=1, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L144] ~E_3~0 := 1; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=1, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L145] CALL call immediate_notify(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=1, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L651] CALL call activate_threads(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=1, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L595] havoc ~tmp~1; [L596] havoc ~tmp___0~0; [L597] havoc ~tmp___1~0; [L598] havoc ~tmp___2~0; [L599] havoc ~tmp___3~0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=1, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L603] CALL call #t~ret6 := is_master_triggered(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=1, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L225] havoc ~__retres1~0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=1, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L228] COND TRUE 1 == ~m_pc~0 VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=1, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L229] COND FALSE !(1 == ~M_E~0) VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=1, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L238] ~__retres1~0 := 0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=1, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~__retres1~0=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L240] #res := ~__retres1~0; VAL [#res=0, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=1, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~__retres1~0=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L603] RET call #t~ret6 := is_master_triggered(); VAL [#t~ret6=0, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=1, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L603] assume -2147483648 <= #t~ret6 && #t~ret6 <= 2147483647; [L603] ~tmp~1 := #t~ret6; [L603] havoc #t~ret6; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=1, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp~1=0] [L605-L609] COND FALSE !(0 != ~tmp~1) VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=1, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp~1=0] [L611] CALL call #t~ret7 := is_transmit1_triggered(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=1, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L244] havoc ~__retres1~1; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=1, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L247] COND TRUE 1 == ~t1_pc~0 VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=1, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L248] COND FALSE !(1 == ~E_1~0) VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=1, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L257] ~__retres1~1 := 0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=1, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~__retres1~1=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L259] #res := ~__retres1~1; VAL [#res=0, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=1, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~__retres1~1=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L611] RET call #t~ret7 := is_transmit1_triggered(); VAL [#t~ret7=0, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=1, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp~1=0] [L611] assume -2147483648 <= #t~ret7 && #t~ret7 <= 2147483647; [L611] ~tmp___0~0 := #t~ret7; [L611] havoc #t~ret7; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=1, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp___0~0=0, ~tmp~1=0] [L613-L617] COND FALSE !(0 != ~tmp___0~0) VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=1, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp___0~0=0, ~tmp~1=0] [L619] CALL call #t~ret8 := is_transmit2_triggered(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=1, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L263] havoc ~__retres1~2; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=1, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L266] COND TRUE 1 == ~t2_pc~0 VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=1, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L267] COND FALSE !(1 == ~E_2~0) VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=1, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L276] ~__retres1~2 := 0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=1, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~__retres1~2=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L278] #res := ~__retres1~2; VAL [#res=0, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=1, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~__retres1~2=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L619] RET call #t~ret8 := is_transmit2_triggered(); VAL [#t~ret8=0, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=1, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp___0~0=0, ~tmp~1=0] [L619] assume -2147483648 <= #t~ret8 && #t~ret8 <= 2147483647; [L619] ~tmp___1~0 := #t~ret8; [L619] havoc #t~ret8; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=1, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp___0~0=0, ~tmp___1~0=0, ~tmp~1=0] [L621-L625] COND FALSE !(0 != ~tmp___1~0) VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=1, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp___0~0=0, ~tmp___1~0=0, ~tmp~1=0] [L627] CALL call #t~ret9 := is_transmit3_triggered(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=1, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L282] havoc ~__retres1~3; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=1, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L285] COND TRUE 1 == ~t3_pc~0 VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=1, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L286] COND TRUE 1 == ~E_3~0 [L287] ~__retres1~3 := 1; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=1, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~__retres1~3=1, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L297] #res := ~__retres1~3; VAL [#res=1, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=1, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~__retres1~3=1, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L627] RET call #t~ret9 := is_transmit3_triggered(); VAL [#t~ret9=1, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=1, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp___0~0=0, ~tmp___1~0=0, ~tmp~1=0] [L627] assume -2147483648 <= #t~ret9 && #t~ret9 <= 2147483647; [L627] ~tmp___2~0 := #t~ret9; [L627] havoc #t~ret9; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=1, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp___0~0=0, ~tmp___1~0=0, ~tmp___2~0=1, ~tmp~1=0] [L629-L633] COND TRUE 0 != ~tmp___2~0 [L630] ~t3_st~0 := 0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=1, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp___0~0=0, ~tmp___1~0=0, ~tmp___2~0=1, ~tmp~1=0] [L635] CALL call #t~ret10 := is_transmit4_triggered(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=1, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L301] havoc ~__retres1~4; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=1, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L304] COND TRUE 1 == ~t4_pc~0 VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=1, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L305] COND FALSE !(1 == ~E_4~0) VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=1, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L314] ~__retres1~4 := 0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=1, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~__retres1~4=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L316] #res := ~__retres1~4; VAL [#res=0, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=1, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~__retres1~4=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L635] RET call #t~ret10 := is_transmit4_triggered(); VAL [#t~ret10=0, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=1, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp___0~0=0, ~tmp___1~0=0, ~tmp___2~0=1, ~tmp~1=0] [L635] assume -2147483648 <= #t~ret10 && #t~ret10 <= 2147483647; [L635] ~tmp___3~0 := #t~ret10; [L635] havoc #t~ret10; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=1, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp___0~0=0, ~tmp___1~0=0, ~tmp___2~0=1, ~tmp___3~0=0, ~tmp~1=0] [L637-L641] COND FALSE !(0 != ~tmp___3~0) VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=1, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp___0~0=0, ~tmp___1~0=0, ~tmp___2~0=1, ~tmp___3~0=0, ~tmp~1=0] [L651] RET call activate_threads(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=1, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L145] RET call immediate_notify(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=1, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=1, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L146] ~E_3~0 := 2; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=1, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L136-L148] COND FALSE !(false) VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=1, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=1, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L138] ~t2_pc~0 := 1; [L139] ~t2_st~0 := 2; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=1, old(~t2_st~0)=1, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=2, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L445] RET call transmit2(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp_ndt_1~0=1, ~tmp_ndt_2~0=1, ~tmp_ndt_3~0=1, ~tmp_ndt_4~0=1, ~tmp_ndt_5~0=1, ~tmp~0=1] [L453] COND TRUE 0 == ~t3_st~0 [L454] havoc ~tmp_ndt_4~0; [L455] assume -2147483648 <= #t~nondet4 && #t~nondet4 <= 2147483647; [L455] ~tmp_ndt_4~0 := #t~nondet4; [L455] havoc #t~nondet4; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=0, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp_ndt_1~0=1, ~tmp_ndt_2~0=1, ~tmp_ndt_3~0=1, ~tmp_ndt_4~0=1, ~tmp_ndt_5~0=1, ~tmp~0=1] [L456-L463] COND TRUE 0 != ~tmp_ndt_4~0 [L458] ~t3_st~0 := 1; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp_ndt_1~0=1, ~tmp_ndt_2~0=1, ~tmp_ndt_3~0=1, ~tmp_ndt_4~0=1, ~tmp_ndt_5~0=1, ~tmp~0=1] [L459] CALL call transmit3(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=1, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L160] COND FALSE !(0 == ~t3_pc~0) VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=1, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L163] COND TRUE 1 == ~t3_pc~0 VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=1, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L179] ~E_4~0 := 1; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=1, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L180] CALL call immediate_notify(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=1, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L651] CALL call activate_threads(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=1, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L595] havoc ~tmp~1; [L596] havoc ~tmp___0~0; [L597] havoc ~tmp___1~0; [L598] havoc ~tmp___2~0; [L599] havoc ~tmp___3~0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=1, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L603] CALL call #t~ret6 := is_master_triggered(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=1, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L225] havoc ~__retres1~0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=1, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L228] COND TRUE 1 == ~m_pc~0 VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=1, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L229] COND FALSE !(1 == ~M_E~0) VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=1, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L238] ~__retres1~0 := 0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=1, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~__retres1~0=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L240] #res := ~__retres1~0; VAL [#res=0, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=1, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~__retres1~0=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L603] RET call #t~ret6 := is_master_triggered(); VAL [#t~ret6=0, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=1, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L603] assume -2147483648 <= #t~ret6 && #t~ret6 <= 2147483647; [L603] ~tmp~1 := #t~ret6; [L603] havoc #t~ret6; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=1, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp~1=0] [L605-L609] COND FALSE !(0 != ~tmp~1) VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=1, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp~1=0] [L611] CALL call #t~ret7 := is_transmit1_triggered(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=1, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L244] havoc ~__retres1~1; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=1, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L247] COND TRUE 1 == ~t1_pc~0 VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=1, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L248] COND FALSE !(1 == ~E_1~0) VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=1, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L257] ~__retres1~1 := 0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=1, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~__retres1~1=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L259] #res := ~__retres1~1; VAL [#res=0, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=1, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~__retres1~1=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L611] RET call #t~ret7 := is_transmit1_triggered(); VAL [#t~ret7=0, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=1, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp~1=0] [L611] assume -2147483648 <= #t~ret7 && #t~ret7 <= 2147483647; [L611] ~tmp___0~0 := #t~ret7; [L611] havoc #t~ret7; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=1, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp___0~0=0, ~tmp~1=0] [L613-L617] COND FALSE !(0 != ~tmp___0~0) VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=1, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp___0~0=0, ~tmp~1=0] [L619] CALL call #t~ret8 := is_transmit2_triggered(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=1, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L263] havoc ~__retres1~2; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=1, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L266] COND TRUE 1 == ~t2_pc~0 VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=1, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L267] COND FALSE !(1 == ~E_2~0) VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=1, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L276] ~__retres1~2 := 0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=1, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~__retres1~2=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L278] #res := ~__retres1~2; VAL [#res=0, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=1, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~__retres1~2=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L619] RET call #t~ret8 := is_transmit2_triggered(); VAL [#t~ret8=0, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=1, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp___0~0=0, ~tmp~1=0] [L619] assume -2147483648 <= #t~ret8 && #t~ret8 <= 2147483647; [L619] ~tmp___1~0 := #t~ret8; [L619] havoc #t~ret8; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=1, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp___0~0=0, ~tmp___1~0=0, ~tmp~1=0] [L621-L625] COND FALSE !(0 != ~tmp___1~0) VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=1, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp___0~0=0, ~tmp___1~0=0, ~tmp~1=0] [L627] CALL call #t~ret9 := is_transmit3_triggered(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=1, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L282] havoc ~__retres1~3; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=1, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L285] COND TRUE 1 == ~t3_pc~0 VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=1, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L286] COND FALSE !(1 == ~E_3~0) VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=1, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L295] ~__retres1~3 := 0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=1, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~__retres1~3=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L297] #res := ~__retres1~3; VAL [#res=0, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=1, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~__retres1~3=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L627] RET call #t~ret9 := is_transmit3_triggered(); VAL [#t~ret9=0, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=1, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp___0~0=0, ~tmp___1~0=0, ~tmp~1=0] [L627] assume -2147483648 <= #t~ret9 && #t~ret9 <= 2147483647; [L627] ~tmp___2~0 := #t~ret9; [L627] havoc #t~ret9; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=1, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp___0~0=0, ~tmp___1~0=0, ~tmp___2~0=0, ~tmp~1=0] [L629-L633] COND FALSE !(0 != ~tmp___2~0) VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=1, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp___0~0=0, ~tmp___1~0=0, ~tmp___2~0=0, ~tmp~1=0] [L635] CALL call #t~ret10 := is_transmit4_triggered(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=1, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L301] havoc ~__retres1~4; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=1, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L304] COND TRUE 1 == ~t4_pc~0 VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=1, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L305] COND TRUE 1 == ~E_4~0 [L306] ~__retres1~4 := 1; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=1, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~__retres1~4=1, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L316] #res := ~__retres1~4; VAL [#res=1, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=1, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~__retres1~4=1, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2] [L635] RET call #t~ret10 := is_transmit4_triggered(); VAL [#t~ret10=1, old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=1, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp___0~0=0, ~tmp___1~0=0, ~tmp___2~0=0, ~tmp~1=0] [L635] assume -2147483648 <= #t~ret10 && #t~ret10 <= 2147483647; [L635] ~tmp___3~0 := #t~ret10; [L635] havoc #t~ret10; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=1, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=2, ~tmp___0~0=0, ~tmp___1~0=0, ~tmp___2~0=0, ~tmp___3~0=1, ~tmp~1=0] [L637-L641] COND TRUE 0 != ~tmp___3~0 [L638] ~t4_st~0 := 0; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=1, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=0, ~tmp___0~0=0, ~tmp___1~0=0, ~tmp___2~0=0, ~tmp___3~0=1, ~tmp~1=0] [L651] RET call activate_threads(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=1, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=0] [L180] RET call immediate_notify(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=1, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=1, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=0] [L181] ~E_4~0 := 2; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=1, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=0] [L171-L183] COND FALSE !(false) VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=1, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=1, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=0] [L173] ~t3_pc~0 := 1; [L174] ~t3_st~0 := 2; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=2, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=2, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=2, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=1, old(~t3_st~0)=1, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=2, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=0] [L459] RET call transmit3(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=0, ~tmp_ndt_1~0=1, ~tmp_ndt_2~0=1, ~tmp_ndt_3~0=1, ~tmp_ndt_4~0=1, ~tmp_ndt_5~0=1, ~tmp~0=1] [L467] COND TRUE 0 == ~t4_st~0 [L468] havoc ~tmp_ndt_5~0; [L469] assume -2147483648 <= #t~nondet5 && #t~nondet5 <= 2147483647; [L469] ~tmp_ndt_5~0 := #t~nondet5; [L469] havoc #t~nondet5; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=0, ~tmp_ndt_1~0=1, ~tmp_ndt_2~0=1, ~tmp_ndt_3~0=1, ~tmp_ndt_4~0=1, ~tmp_ndt_5~0=1, ~tmp~0=1] [L470-L477] COND TRUE 0 != ~tmp_ndt_5~0 [L472] ~t4_st~0 := 1; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=0, old(~t4_st~0)=0, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=1, ~tmp_ndt_1~0=1, ~tmp_ndt_2~0=1, ~tmp_ndt_3~0=1, ~tmp_ndt_4~0=1, ~tmp_ndt_5~0=1, ~tmp~0=1] [L473] CALL call transmit4(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=1, old(~t4_st~0)=1, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=1] [L195] COND FALSE !(0 == ~t4_pc~0) VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=1, old(~t4_st~0)=1, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=1] [L198] COND TRUE 1 == ~t4_pc~0 VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=1, old(~t4_st~0)=1, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=1] [L214] CALL call error(); VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=1, old(~t4_st~0)=1, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=1] [L11] assert false; VAL [old(~E_1~0)=2, old(~E_2~0)=2, old(~E_3~0)=2, old(~E_4~0)=2, old(~M_E~0)=2, old(~m_i~0)=0, old(~m_pc~0)=0, old(~m_st~0)=0, old(~T1_E~0)=2, old(~t1_i~0)=0, old(~t1_pc~0)=0, old(~t1_st~0)=0, old(~T2_E~0)=2, old(~t2_i~0)=0, old(~t2_pc~0)=0, old(~t2_st~0)=0, old(~T3_E~0)=2, old(~t3_i~0)=0, old(~t3_pc~0)=0, old(~t3_st~0)=0, old(~T4_E~0)=2, old(~t4_i~0)=0, old(~t4_pc~0)=1, old(~t4_st~0)=1, ~E_1~0=2, ~E_2~0=2, ~E_3~0=2, ~E_4~0=2, ~M_E~0=2, ~m_i~0=1, ~m_pc~0=1, ~m_st~0=2, ~T1_E~0=2, ~t1_i~0=1, ~t1_pc~0=1, ~t1_st~0=2, ~T2_E~0=2, ~t2_i~0=1, ~t2_pc~0=1, ~t2_st~0=2, ~T3_E~0=2, ~t3_i~0=1, ~t3_pc~0=1, ~t3_st~0=2, ~T4_E~0=2, ~t4_i~0=1, ~t4_pc~0=1, ~t4_st~0=1] [L15] int m_pc = 0; [L16] int t1_pc = 0; [L17] int t2_pc = 0; [L18] int t3_pc = 0; [L19] int t4_pc = 0; [L20] int m_st ; [L21] int t1_st ; [L22] int t2_st ; [L23] int t3_st ; [L24] int t4_st ; [L25] int m_i ; [L26] int t1_i ; [L27] int t2_i ; [L28] int t3_i ; [L29] int t4_i ; [L30] int M_E = 2; [L31] int T1_E = 2; [L32] int T2_E = 2; [L33] int T3_E = 2; [L34] int T4_E = 2; [L35] int E_1 = 2; [L36] int E_2 = 2; [L37] int E_3 = 2; [L38] int E_4 = 2; VAL [\old(E_1)=21, \old(E_2)=5, \old(E_3)=25, \old(E_4)=11, \old(M_E)=17, \old(m_i)=7, \old(m_pc)=15, \old(m_st)=16, \old(T1_E)=3, \old(t1_i)=19, \old(t1_pc)=9, \old(t1_st)=4, \old(T2_E)=18, \old(t2_i)=6, \old(t2_pc)=10, \old(t2_st)=13, \old(T3_E)=23, \old(t3_i)=24, \old(t3_pc)=8, \old(t3_st)=14, \old(T4_E)=26, \old(t4_i)=20, \old(t4_pc)=22, \old(t4_st)=12, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=0, m_pc=0, m_st=0, T1_E=2, t1_i=0, t1_pc=0, t1_st=0, T2_E=2, t2_i=0, t2_pc=0, t2_st=0, T3_E=2, t3_i=0, t3_pc=0, t3_st=0, T4_E=2, t4_i=0, t4_pc=0, t4_st=0] [L811] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=0, m_pc=0, m_st=0, T1_E=2, t1_i=0, t1_pc=0, t1_st=0, T2_E=2, t2_i=0, t2_pc=0, t2_st=0, T3_E=2, t3_i=0, t3_pc=0, t3_st=0, T4_E=2, t4_i=0, t4_pc=0, t4_st=0] [L815] CALL init_model() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=0, m_pc=0, m_st=0, T1_E=2, t1_i=0, t1_pc=0, t1_st=0, T2_E=2, t2_i=0, t2_pc=0, t2_st=0, T3_E=2, t3_i=0, t3_pc=0, t3_st=0, T4_E=2, t4_i=0, t4_pc=0, t4_st=0] [L723] m_i = 1 [L724] t1_i = 1 [L725] t2_i = 1 [L726] t3_i = 1 [L727] t4_i = 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L815] RET init_model() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L816] CALL start_simulation() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L752] int kernel_st ; [L753] int tmp ; [L754] int tmp___0 ; [L758] kernel_st = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, kernel_st=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L759] FCALL update_channels() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, kernel_st=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L760] CALL init_threads() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L331] COND TRUE m_i == 1 [L332] m_st = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L336] COND TRUE t1_i == 1 [L337] t1_st = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L341] COND TRUE t2_i == 1 [L342] t2_st = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L346] COND TRUE t3_i == 1 [L347] t3_st = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L351] COND TRUE t4_i == 1 [L352] t4_st = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L760] RET init_threads() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, kernel_st=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L761] CALL fire_delta_events() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L492] COND FALSE !(M_E == 0) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L497] COND FALSE !(T1_E == 0) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L502] COND FALSE !(T2_E == 0) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L507] COND FALSE !(T3_E == 0) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L512] COND FALSE !(T4_E == 0) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L517] COND FALSE !(E_1 == 0) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L522] COND FALSE !(E_2 == 0) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L527] COND FALSE !(E_3 == 0) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L532] COND FALSE !(E_4 == 0) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L761] RET fire_delta_events() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, kernel_st=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L762] CALL activate_threads() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L595] int tmp ; [L596] int tmp___0 ; [L597] int tmp___1 ; [L598] int tmp___2 ; [L599] int tmp___3 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L603] CALL, EXPR is_master_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L225] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L228] COND FALSE !(m_pc == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L238] __retres1 = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, __retres1=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L240] return (__retres1); VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, \result=0, __retres1=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L603] RET, EXPR is_master_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, is_master_triggered()=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L603] tmp = is_master_triggered() [L605] COND FALSE !(\read(tmp)) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, tmp=0] [L611] CALL, EXPR is_transmit1_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L244] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L247] COND FALSE !(t1_pc == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L257] __retres1 = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, __retres1=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L259] return (__retres1); VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, \result=0, __retres1=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L611] RET, EXPR is_transmit1_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, is_transmit1_triggered()=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, tmp=0] [L611] tmp___0 = is_transmit1_triggered() [L613] COND FALSE !(\read(tmp___0)) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, tmp=0, tmp___0=0] [L619] CALL, EXPR is_transmit2_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L263] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L266] COND FALSE !(t2_pc == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L276] __retres1 = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, __retres1=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L278] return (__retres1); VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, \result=0, __retres1=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L619] RET, EXPR is_transmit2_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, is_transmit2_triggered()=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, tmp=0, tmp___0=0] [L619] tmp___1 = is_transmit2_triggered() [L621] COND FALSE !(\read(tmp___1)) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, tmp=0, tmp___0=0, tmp___1=0] [L627] CALL, EXPR is_transmit3_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L282] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L285] COND FALSE !(t3_pc == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L295] __retres1 = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, __retres1=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L297] return (__retres1); VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, \result=0, __retres1=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L627] RET, EXPR is_transmit3_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, is_transmit3_triggered()=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, tmp=0, tmp___0=0, tmp___1=0] [L627] tmp___2 = is_transmit3_triggered() [L629] COND FALSE !(\read(tmp___2)) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, tmp=0, tmp___0=0, tmp___1=0, tmp___2=0] [L635] CALL, EXPR is_transmit4_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L301] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L304] COND FALSE !(t4_pc == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L314] __retres1 = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, __retres1=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L316] return (__retres1); VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, \result=0, __retres1=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L635] RET, EXPR is_transmit4_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, is_transmit4_triggered()=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, tmp=0, tmp___0=0, tmp___1=0, tmp___2=0] [L635] tmp___3 = is_transmit4_triggered() [L637] COND FALSE !(\read(tmp___3)) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, tmp=0, tmp___0=0, tmp___1=0, tmp___2=0, tmp___3=0] [L762] RET activate_threads() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, kernel_st=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L763] CALL reset_delta_events() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L545] COND FALSE !(M_E == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L550] COND FALSE !(T1_E == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L555] COND FALSE !(T2_E == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L560] COND FALSE !(T3_E == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L565] COND FALSE !(T4_E == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L570] COND FALSE !(E_1 == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L575] COND FALSE !(E_2 == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L580] COND FALSE !(E_3 == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L585] COND FALSE !(E_4 == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L763] RET reset_delta_events() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, kernel_st=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L766] COND TRUE 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, kernel_st=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L769] kernel_st = 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, kernel_st=1, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L770] CALL eval() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L397] int tmp ; VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L401] COND TRUE 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L404] CALL, EXPR exists_runnable_thread() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L361] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L364] COND TRUE m_st == 0 [L365] __retres1 = 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, __retres1=1, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L392] return (__retres1); VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, \result=1, __retres1=1, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L404] RET, EXPR exists_runnable_thread() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, exists_runnable_thread()=1, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L404] tmp = exists_runnable_thread() [L406] COND TRUE \read(tmp) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, tmp=1] [L411] COND TRUE m_st == 0 [L412] int tmp_ndt_1; [L413] tmp_ndt_1 = __VERIFIER_nondet_int() [L414] COND FALSE !(\read(tmp_ndt_1)) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, tmp=1, tmp_ndt_1=0] [L425] COND TRUE t1_st == 0 [L426] int tmp_ndt_2; [L427] tmp_ndt_2 = __VERIFIER_nondet_int() [L428] COND TRUE \read(tmp_ndt_2) [L430] t1_st = 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=1, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, tmp=1, tmp_ndt_1=0, tmp_ndt_2=1] [L431] CALL transmit1() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=1, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L90] COND TRUE t1_pc == 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=1, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L101] COND TRUE 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=1, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L103] t1_pc = 1 [L104] t1_st = 2 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L431] RET transmit1() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, tmp=1, tmp_ndt_1=0, tmp_ndt_2=1] [L439] COND TRUE t2_st == 0 [L440] int tmp_ndt_3; [L441] tmp_ndt_3 = __VERIFIER_nondet_int() [L442] COND TRUE \read(tmp_ndt_3) [L444] t2_st = 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=0, t2_st=1, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, tmp=1, tmp_ndt_1=0, tmp_ndt_2=1, tmp_ndt_3=1] [L445] CALL transmit2() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=0, t2_st=1, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L125] COND TRUE t2_pc == 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=0, t2_st=1, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L136] COND TRUE 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=0, t2_st=1, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L138] t2_pc = 1 [L139] t2_st = 2 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L445] RET transmit2() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, tmp=1, tmp_ndt_1=0, tmp_ndt_2=1, tmp_ndt_3=1] [L453] COND TRUE t3_st == 0 [L454] int tmp_ndt_4; [L455] tmp_ndt_4 = __VERIFIER_nondet_int() [L456] COND TRUE \read(tmp_ndt_4) [L458] t3_st = 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=0, t3_st=1, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, tmp=1, tmp_ndt_1=0, tmp_ndt_2=1, tmp_ndt_3=1, tmp_ndt_4=1] [L459] CALL transmit3() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=1, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=0, t3_st=1, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L160] COND TRUE t3_pc == 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=1, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=0, t3_st=1, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L171] COND TRUE 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=1, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=0, t3_st=1, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L173] t3_pc = 1 [L174] t3_st = 2 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=1, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L459] RET transmit3() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, tmp=1, tmp_ndt_1=0, tmp_ndt_2=1, tmp_ndt_3=1, tmp_ndt_4=1] [L467] COND TRUE t4_st == 0 [L468] int tmp_ndt_5; [L469] tmp_ndt_5 = __VERIFIER_nondet_int() [L470] COND TRUE \read(tmp_ndt_5) [L472] t4_st = 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=0, t4_st=1, tmp=1, tmp_ndt_1=0, tmp_ndt_2=1, tmp_ndt_3=1, tmp_ndt_4=1, tmp_ndt_5=1] [L473] CALL transmit4() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=1, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=0, t4_st=1] [L195] COND TRUE t4_pc == 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=1, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=0, t4_st=1] [L206] COND TRUE 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=1, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=0, t4_st=1] [L208] t4_pc = 1 [L209] t4_st = 2 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=1, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L473] RET transmit4() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, tmp=1, tmp_ndt_1=0, tmp_ndt_2=1, tmp_ndt_3=1, tmp_ndt_4=1, tmp_ndt_5=1] [L401] COND TRUE 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, tmp=1, tmp_ndt_1=0, tmp_ndt_2=1, tmp_ndt_3=1, tmp_ndt_4=1, tmp_ndt_5=1] [L404] CALL, EXPR exists_runnable_thread() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L361] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L364] COND TRUE m_st == 0 [L365] __retres1 = 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, __retres1=1, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L392] return (__retres1); VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, \result=1, __retres1=1, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L404] RET, EXPR exists_runnable_thread() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, exists_runnable_thread()=1, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, tmp=1, tmp_ndt_1=0, tmp_ndt_2=1, tmp_ndt_3=1, tmp_ndt_4=1, tmp_ndt_5=1] [L404] tmp = exists_runnable_thread() [L406] COND TRUE \read(tmp) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, tmp=1, tmp_ndt_1=0, tmp_ndt_2=1, tmp_ndt_3=1, tmp_ndt_4=1, tmp_ndt_5=1] [L411] COND TRUE m_st == 0 [L412] int tmp_ndt_1; [L413] tmp_ndt_1 = __VERIFIER_nondet_int() [L414] COND TRUE \read(tmp_ndt_1) [L416] m_st = 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, tmp=1, tmp_ndt_1=1, tmp_ndt_2=1, tmp_ndt_3=1, tmp_ndt_4=1, tmp_ndt_5=1] [L417] CALL master() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L49] COND TRUE m_pc == 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L60] COND TRUE 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L63] E_1 = 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=1, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L64] CALL immediate_notify() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=1, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L651] CALL activate_threads() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=1, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L595] int tmp ; [L596] int tmp___0 ; [L597] int tmp___1 ; [L598] int tmp___2 ; [L599] int tmp___3 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=1, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L603] CALL, EXPR is_master_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=1, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L225] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=1, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L228] COND FALSE !(m_pc == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=1, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L238] __retres1 = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, __retres1=0, E_1=1, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L240] return (__retres1); VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, \result=0, __retres1=0, E_1=1, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L603] RET, EXPR is_master_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=1, E_2=2, E_3=2, E_4=2, is_master_triggered()=0, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L603] tmp = is_master_triggered() [L605] COND FALSE !(\read(tmp)) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=1, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, tmp=0] [L611] CALL, EXPR is_transmit1_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=1, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L244] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=1, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L247] COND TRUE t1_pc == 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=1, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L248] COND TRUE E_1 == 1 [L249] __retres1 = 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, __retres1=1, E_1=1, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L259] return (__retres1); VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, \result=1, __retres1=1, E_1=1, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L611] RET, EXPR is_transmit1_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=1, E_2=2, E_3=2, E_4=2, is_transmit1_triggered()=1, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, tmp=0] [L611] tmp___0 = is_transmit1_triggered() [L613] COND TRUE \read(tmp___0) [L614] t1_st = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=1, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, tmp=0, tmp___0=1] [L619] CALL, EXPR is_transmit2_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=1, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L263] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=1, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L266] COND TRUE t2_pc == 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=1, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L267] COND FALSE !(E_2 == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=1, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L276] __retres1 = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, __retres1=0, E_1=1, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L278] return (__retres1); VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, \result=0, __retres1=0, E_1=1, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L619] RET, EXPR is_transmit2_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=1, E_2=2, E_3=2, E_4=2, is_transmit2_triggered()=0, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, tmp=0, tmp___0=1] [L619] tmp___1 = is_transmit2_triggered() [L621] COND FALSE !(\read(tmp___1)) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=1, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, tmp=0, tmp___0=1, tmp___1=0] [L627] CALL, EXPR is_transmit3_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=1, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L282] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=1, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L285] COND TRUE t3_pc == 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=1, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L286] COND FALSE !(E_3 == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=1, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L295] __retres1 = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, __retres1=0, E_1=1, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L297] return (__retres1); VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, \result=0, __retres1=0, E_1=1, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L627] RET, EXPR is_transmit3_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=1, E_2=2, E_3=2, E_4=2, is_transmit3_triggered()=0, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, tmp=0, tmp___0=1, tmp___1=0] [L627] tmp___2 = is_transmit3_triggered() [L629] COND FALSE !(\read(tmp___2)) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=1, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, tmp=0, tmp___0=1, tmp___1=0, tmp___2=0] [L635] CALL, EXPR is_transmit4_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=1, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L301] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=1, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L304] COND TRUE t4_pc == 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=1, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L305] COND FALSE !(E_4 == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=1, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L314] __retres1 = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, __retres1=0, E_1=1, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L316] return (__retres1); VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, \result=0, __retres1=0, E_1=1, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L635] RET, EXPR is_transmit4_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=1, E_2=2, E_3=2, E_4=2, is_transmit4_triggered()=0, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, tmp=0, tmp___0=1, tmp___1=0, tmp___2=0] [L635] tmp___3 = is_transmit4_triggered() [L637] COND FALSE !(\read(tmp___3)) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=1, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, tmp=0, tmp___0=1, tmp___1=0, tmp___2=0, tmp___3=0] [L651] RET activate_threads() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=1, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L64] RET immediate_notify() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=1, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L65] E_1 = 2 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L68] COND TRUE 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L70] m_pc = 1 [L71] m_st = 2 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L417] RET master() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, tmp=1, tmp_ndt_1=1, tmp_ndt_2=1, tmp_ndt_3=1, tmp_ndt_4=1, tmp_ndt_5=1] [L425] COND TRUE t1_st == 0 [L426] int tmp_ndt_2; [L427] tmp_ndt_2 = __VERIFIER_nondet_int() [L428] COND TRUE \read(tmp_ndt_2) [L430] t1_st = 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, tmp=1, tmp_ndt_1=1, tmp_ndt_2=1, tmp_ndt_3=1, tmp_ndt_4=1, tmp_ndt_5=1] [L431] CALL transmit1() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L90] COND FALSE !(t1_pc == 0) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L93] COND TRUE t1_pc == 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L109] E_2 = 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=1, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L110] CALL immediate_notify() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=1, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L651] CALL activate_threads() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=1, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L595] int tmp ; [L596] int tmp___0 ; [L597] int tmp___1 ; [L598] int tmp___2 ; [L599] int tmp___3 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=1, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L603] CALL, EXPR is_master_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=1, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L225] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=1, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L228] COND TRUE m_pc == 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=1, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L229] COND FALSE !(M_E == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=1, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L238] __retres1 = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, __retres1=0, E_1=2, E_2=1, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L240] return (__retres1); VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, \result=0, __retres1=0, E_1=2, E_2=1, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L603] RET, EXPR is_master_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=1, E_3=2, E_4=2, is_master_triggered()=0, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L603] tmp = is_master_triggered() [L605] COND FALSE !(\read(tmp)) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=1, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, tmp=0] [L611] CALL, EXPR is_transmit1_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=1, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L244] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=1, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L247] COND TRUE t1_pc == 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=1, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L248] COND FALSE !(E_1 == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=1, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L257] __retres1 = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, __retres1=0, E_1=2, E_2=1, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L259] return (__retres1); VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, \result=0, __retres1=0, E_1=2, E_2=1, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L611] RET, EXPR is_transmit1_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=1, E_3=2, E_4=2, is_transmit1_triggered()=0, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, tmp=0] [L611] tmp___0 = is_transmit1_triggered() [L613] COND FALSE !(\read(tmp___0)) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=1, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, tmp=0, tmp___0=0] [L619] CALL, EXPR is_transmit2_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=1, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L263] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=1, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L266] COND TRUE t2_pc == 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=1, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L267] COND TRUE E_2 == 1 [L268] __retres1 = 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, __retres1=1, E_1=2, E_2=1, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L278] return (__retres1); VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, \result=1, __retres1=1, E_1=2, E_2=1, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L619] RET, EXPR is_transmit2_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=1, E_3=2, E_4=2, is_transmit2_triggered()=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, tmp=0, tmp___0=0] [L619] tmp___1 = is_transmit2_triggered() [L621] COND TRUE \read(tmp___1) [L622] t2_st = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=1, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, tmp=0, tmp___0=0, tmp___1=1] [L627] CALL, EXPR is_transmit3_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=1, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L282] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=1, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L285] COND TRUE t3_pc == 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=1, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L286] COND FALSE !(E_3 == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=1, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L295] __retres1 = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, __retres1=0, E_1=2, E_2=1, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L297] return (__retres1); VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, \result=0, __retres1=0, E_1=2, E_2=1, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L627] RET, EXPR is_transmit3_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=1, E_3=2, E_4=2, is_transmit3_triggered()=0, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, tmp=0, tmp___0=0, tmp___1=1] [L627] tmp___2 = is_transmit3_triggered() [L629] COND FALSE !(\read(tmp___2)) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=1, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, tmp=0, tmp___0=0, tmp___1=1, tmp___2=0] [L635] CALL, EXPR is_transmit4_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=1, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L301] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=1, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L304] COND TRUE t4_pc == 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=1, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L305] COND FALSE !(E_4 == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=1, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L314] __retres1 = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, __retres1=0, E_1=2, E_2=1, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L316] return (__retres1); VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, \result=0, __retres1=0, E_1=2, E_2=1, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L635] RET, EXPR is_transmit4_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=1, E_3=2, E_4=2, is_transmit4_triggered()=0, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, tmp=0, tmp___0=0, tmp___1=1, tmp___2=0] [L635] tmp___3 = is_transmit4_triggered() [L637] COND FALSE !(\read(tmp___3)) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=1, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, tmp=0, tmp___0=0, tmp___1=1, tmp___2=0, tmp___3=0] [L651] RET activate_threads() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=1, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L110] RET immediate_notify() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=1, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L111] E_2 = 2 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L101] COND TRUE 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L103] t1_pc = 1 [L104] t1_st = 2 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L431] RET transmit1() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, tmp=1, tmp_ndt_1=1, tmp_ndt_2=1, tmp_ndt_3=1, tmp_ndt_4=1, tmp_ndt_5=1] [L439] COND TRUE t2_st == 0 [L440] int tmp_ndt_3; [L441] tmp_ndt_3 = __VERIFIER_nondet_int() [L442] COND TRUE \read(tmp_ndt_3) [L444] t2_st = 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, tmp=1, tmp_ndt_1=1, tmp_ndt_2=1, tmp_ndt_3=1, tmp_ndt_4=1, tmp_ndt_5=1] [L445] CALL transmit2() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L125] COND FALSE !(t2_pc == 0) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L128] COND TRUE t2_pc == 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L144] E_3 = 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=1, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L145] CALL immediate_notify() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=1, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L651] CALL activate_threads() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=1, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L595] int tmp ; [L596] int tmp___0 ; [L597] int tmp___1 ; [L598] int tmp___2 ; [L599] int tmp___3 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=1, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L603] CALL, EXPR is_master_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=1, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L225] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=1, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L228] COND TRUE m_pc == 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=1, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L229] COND FALSE !(M_E == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=1, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L238] __retres1 = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, __retres1=0, E_1=2, E_2=2, E_3=1, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L240] return (__retres1); VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, \result=0, __retres1=0, E_1=2, E_2=2, E_3=1, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L603] RET, EXPR is_master_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=1, E_4=2, is_master_triggered()=0, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L603] tmp = is_master_triggered() [L605] COND FALSE !(\read(tmp)) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=1, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, tmp=0] [L611] CALL, EXPR is_transmit1_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=1, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L244] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=1, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L247] COND TRUE t1_pc == 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=1, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L248] COND FALSE !(E_1 == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=1, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L257] __retres1 = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, __retres1=0, E_1=2, E_2=2, E_3=1, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L259] return (__retres1); VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, \result=0, __retres1=0, E_1=2, E_2=2, E_3=1, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L611] RET, EXPR is_transmit1_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=1, E_4=2, is_transmit1_triggered()=0, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, tmp=0] [L611] tmp___0 = is_transmit1_triggered() [L613] COND FALSE !(\read(tmp___0)) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=1, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, tmp=0, tmp___0=0] [L619] CALL, EXPR is_transmit2_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=1, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L263] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=1, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L266] COND TRUE t2_pc == 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=1, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L267] COND FALSE !(E_2 == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=1, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L276] __retres1 = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, __retres1=0, E_1=2, E_2=2, E_3=1, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L278] return (__retres1); VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, \result=0, __retres1=0, E_1=2, E_2=2, E_3=1, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L619] RET, EXPR is_transmit2_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=1, E_4=2, is_transmit2_triggered()=0, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, tmp=0, tmp___0=0] [L619] tmp___1 = is_transmit2_triggered() [L621] COND FALSE !(\read(tmp___1)) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=1, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, tmp=0, tmp___0=0, tmp___1=0] [L627] CALL, EXPR is_transmit3_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=1, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L282] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=1, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L285] COND TRUE t3_pc == 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=1, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L286] COND TRUE E_3 == 1 [L287] __retres1 = 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, __retres1=1, E_1=2, E_2=2, E_3=1, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L297] return (__retres1); VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, \result=1, __retres1=1, E_1=2, E_2=2, E_3=1, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L627] RET, EXPR is_transmit3_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=1, E_4=2, is_transmit3_triggered()=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, tmp=0, tmp___0=0, tmp___1=0] [L627] tmp___2 = is_transmit3_triggered() [L629] COND TRUE \read(tmp___2) [L630] t3_st = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=1, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=0, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, tmp=0, tmp___0=0, tmp___1=0, tmp___2=1] [L635] CALL, EXPR is_transmit4_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=1, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=0, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L301] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=1, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=0, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L304] COND TRUE t4_pc == 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=1, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=0, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L305] COND FALSE !(E_4 == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=1, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=0, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L314] __retres1 = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, __retres1=0, E_1=2, E_2=2, E_3=1, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=0, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L316] return (__retres1); VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, \result=0, __retres1=0, E_1=2, E_2=2, E_3=1, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=0, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L635] RET, EXPR is_transmit4_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=1, E_4=2, is_transmit4_triggered()=0, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=0, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, tmp=0, tmp___0=0, tmp___1=0, tmp___2=1] [L635] tmp___3 = is_transmit4_triggered() [L637] COND FALSE !(\read(tmp___3)) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=1, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=0, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, tmp=0, tmp___0=0, tmp___1=0, tmp___2=1, tmp___3=0] [L651] RET activate_threads() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=1, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=0, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L145] RET immediate_notify() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=1, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=0, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L146] E_3 = 2 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=0, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L136] COND TRUE 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=0, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L138] t2_pc = 1 [L139] t2_st = 2 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=0, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L445] RET transmit2() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=0, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, tmp=1, tmp_ndt_1=1, tmp_ndt_2=1, tmp_ndt_3=1, tmp_ndt_4=1, tmp_ndt_5=1] [L453] COND TRUE t3_st == 0 [L454] int tmp_ndt_4; [L455] tmp_ndt_4 = __VERIFIER_nondet_int() [L456] COND TRUE \read(tmp_ndt_4) [L458] t3_st = 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, tmp=1, tmp_ndt_1=1, tmp_ndt_2=1, tmp_ndt_3=1, tmp_ndt_4=1, tmp_ndt_5=1] [L459] CALL transmit3() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=1, \old(t3_st)=1, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L160] COND FALSE !(t3_pc == 0) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=1, \old(t3_st)=1, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L163] COND TRUE t3_pc == 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=1, \old(t3_st)=1, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L179] E_4 = 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=1, \old(t3_st)=1, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=2, E_4=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L180] CALL immediate_notify() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=1, \old(t3_st)=1, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=2, E_4=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L651] CALL activate_threads() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=1, \old(t3_st)=1, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=2, E_4=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L595] int tmp ; [L596] int tmp___0 ; [L597] int tmp___1 ; [L598] int tmp___2 ; [L599] int tmp___3 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=1, \old(t3_st)=1, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=2, E_4=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L603] CALL, EXPR is_master_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=1, \old(t3_st)=1, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=2, E_4=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L225] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=1, \old(t3_st)=1, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=2, E_4=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L228] COND TRUE m_pc == 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=1, \old(t3_st)=1, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=2, E_4=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L229] COND FALSE !(M_E == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=1, \old(t3_st)=1, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=2, E_4=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L238] __retres1 = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=1, \old(t3_st)=1, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, __retres1=0, E_1=2, E_2=2, E_3=2, E_4=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L240] return (__retres1); VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=1, \old(t3_st)=1, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, \result=0, __retres1=0, E_1=2, E_2=2, E_3=2, E_4=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L603] RET, EXPR is_master_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=1, \old(t3_st)=1, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=2, E_4=1, is_master_triggered()=0, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L603] tmp = is_master_triggered() [L605] COND FALSE !(\read(tmp)) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=1, \old(t3_st)=1, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=2, E_4=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, tmp=0] [L611] CALL, EXPR is_transmit1_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=1, \old(t3_st)=1, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=2, E_4=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L244] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=1, \old(t3_st)=1, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=2, E_4=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L247] COND TRUE t1_pc == 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=1, \old(t3_st)=1, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=2, E_4=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L248] COND FALSE !(E_1 == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=1, \old(t3_st)=1, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=2, E_4=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L257] __retres1 = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=1, \old(t3_st)=1, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, __retres1=0, E_1=2, E_2=2, E_3=2, E_4=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L259] return (__retres1); VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=1, \old(t3_st)=1, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, \result=0, __retres1=0, E_1=2, E_2=2, E_3=2, E_4=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L611] RET, EXPR is_transmit1_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=1, \old(t3_st)=1, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=2, E_4=1, is_transmit1_triggered()=0, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, tmp=0] [L611] tmp___0 = is_transmit1_triggered() [L613] COND FALSE !(\read(tmp___0)) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=1, \old(t3_st)=1, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=2, E_4=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, tmp=0, tmp___0=0] [L619] CALL, EXPR is_transmit2_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=1, \old(t3_st)=1, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=2, E_4=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L263] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=1, \old(t3_st)=1, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=2, E_4=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L266] COND TRUE t2_pc == 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=1, \old(t3_st)=1, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=2, E_4=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L267] COND FALSE !(E_2 == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=1, \old(t3_st)=1, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=2, E_4=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L276] __retres1 = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=1, \old(t3_st)=1, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, __retres1=0, E_1=2, E_2=2, E_3=2, E_4=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L278] return (__retres1); VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=1, \old(t3_st)=1, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, \result=0, __retres1=0, E_1=2, E_2=2, E_3=2, E_4=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L619] RET, EXPR is_transmit2_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=1, \old(t3_st)=1, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=2, E_4=1, is_transmit2_triggered()=0, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, tmp=0, tmp___0=0] [L619] tmp___1 = is_transmit2_triggered() [L621] COND FALSE !(\read(tmp___1)) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=1, \old(t3_st)=1, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=2, E_4=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, tmp=0, tmp___0=0, tmp___1=0] [L627] CALL, EXPR is_transmit3_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=1, \old(t3_st)=1, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=2, E_4=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L282] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=1, \old(t3_st)=1, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=2, E_4=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L285] COND TRUE t3_pc == 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=1, \old(t3_st)=1, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=2, E_4=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L286] COND FALSE !(E_3 == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=1, \old(t3_st)=1, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=2, E_4=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L295] __retres1 = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=1, \old(t3_st)=1, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, __retres1=0, E_1=2, E_2=2, E_3=2, E_4=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L297] return (__retres1); VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=1, \old(t3_st)=1, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, \result=0, __retres1=0, E_1=2, E_2=2, E_3=2, E_4=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L627] RET, EXPR is_transmit3_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=1, \old(t3_st)=1, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=2, E_4=1, is_transmit3_triggered()=0, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, tmp=0, tmp___0=0, tmp___1=0] [L627] tmp___2 = is_transmit3_triggered() [L629] COND FALSE !(\read(tmp___2)) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=1, \old(t3_st)=1, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=2, E_4=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, tmp=0, tmp___0=0, tmp___1=0, tmp___2=0] [L635] CALL, EXPR is_transmit4_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=1, \old(t3_st)=1, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=2, E_4=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L301] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=1, \old(t3_st)=1, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=2, E_4=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L304] COND TRUE t4_pc == 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=1, \old(t3_st)=1, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=2, E_4=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L305] COND TRUE E_4 == 1 [L306] __retres1 = 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=1, \old(t3_st)=1, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, __retres1=1, E_1=2, E_2=2, E_3=2, E_4=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L316] return (__retres1); VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=1, \old(t3_st)=1, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, \result=1, __retres1=1, E_1=2, E_2=2, E_3=2, E_4=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L635] RET, EXPR is_transmit4_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=1, \old(t3_st)=1, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=2, E_4=1, is_transmit4_triggered()=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, tmp=0, tmp___0=0, tmp___1=0, tmp___2=0] [L635] tmp___3 = is_transmit4_triggered() [L637] COND TRUE \read(tmp___3) [L638] t4_st = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=1, \old(t3_st)=1, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=2, E_4=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=0, tmp=0, tmp___0=0, tmp___1=0, tmp___2=0, tmp___3=1] [L651] RET activate_threads() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=1, \old(t3_st)=1, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=2, E_4=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=0] [L180] RET immediate_notify() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=1, \old(t3_st)=1, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=2, E_4=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=0] [L181] E_4 = 2 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=1, \old(t3_st)=1, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=0] [L171] COND TRUE 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=1, \old(t3_st)=1, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=0] [L173] t3_pc = 1 [L174] t3_st = 2 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=1, \old(t3_st)=1, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=0] [L459] RET transmit3() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=0, tmp=1, tmp_ndt_1=1, tmp_ndt_2=1, tmp_ndt_3=1, tmp_ndt_4=1, tmp_ndt_5=1] [L467] COND TRUE t4_st == 0 [L468] int tmp_ndt_5; [L469] tmp_ndt_5 = __VERIFIER_nondet_int() [L470] COND TRUE \read(tmp_ndt_5) [L472] t4_st = 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=1, tmp=1, tmp_ndt_1=1, tmp_ndt_2=1, tmp_ndt_3=1, tmp_ndt_4=1, tmp_ndt_5=1] [L473] CALL transmit4() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=1, \old(t4_st)=1, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=1] [L195] COND FALSE !(t4_pc == 0) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=1, \old(t4_st)=1, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=1] [L198] COND TRUE t4_pc == 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=1, \old(t4_st)=1, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=1] [L214] CALL error() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=1, \old(t4_st)=1, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=1] [L11] __VERIFIER_error() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=1, \old(t4_st)=1, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=1] ----- [2018-11-23 10:03:51,039 INFO L145 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/working_dir_66be738a-27c5-4025-916a-d9ed6fa1b836/bin-2019/uautomizer/witness.graphml [2018-11-23 10:03:51,039 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2018-11-23 10:03:51,039 INFO L168 Benchmark]: Toolchain (without parser) took 87588.25 ms. Allocated memory was 1.0 GB in the beginning and 4.2 GB in the end (delta: 3.2 GB). Free memory was 962.3 MB in the beginning and 2.3 GB in the end (delta: -1.3 GB). Peak memory consumption was 1.9 GB. Max. memory is 11.5 GB. [2018-11-23 10:03:51,041 INFO L168 Benchmark]: CDTParser took 0.10 ms. Allocated memory is still 1.0 GB. Free memory is still 982.7 MB. There was no memory consumed. Max. memory is 11.5 GB. [2018-11-23 10:03:51,041 INFO L168 Benchmark]: CACSL2BoogieTranslator took 213.66 ms. Allocated memory is still 1.0 GB. Free memory was 962.3 MB in the beginning and 939.8 MB in the end (delta: 22.5 MB). Peak memory consumption was 22.5 MB. Max. memory is 11.5 GB. [2018-11-23 10:03:51,041 INFO L168 Benchmark]: Boogie Procedure Inliner took 52.85 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 158.3 MB). Free memory was 939.8 MB in the beginning and 1.1 GB in the end (delta: -210.1 MB). Peak memory consumption was 14.7 MB. Max. memory is 11.5 GB. [2018-11-23 10:03:51,041 INFO L168 Benchmark]: Boogie Preprocessor took 31.98 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2018-11-23 10:03:51,042 INFO L168 Benchmark]: RCFGBuilder took 490.36 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 54.0 MB). Peak memory consumption was 54.0 MB. Max. memory is 11.5 GB. [2018-11-23 10:03:51,042 INFO L168 Benchmark]: TraceAbstraction took 44699.88 ms. Allocated memory was 1.2 GB in the beginning and 4.2 GB in the end (delta: 3.0 GB). Free memory was 1.1 GB in the beginning and 2.6 GB in the end (delta: -1.5 GB). Peak memory consumption was 1.5 GB. Max. memory is 11.5 GB. [2018-11-23 10:03:51,064 INFO L168 Benchmark]: Witness Printer took 42096.12 ms. Allocated memory is still 4.2 GB. Free memory was 2.6 GB in the beginning and 2.3 GB in the end (delta: 368.5 MB). Peak memory consumption was 368.5 MB. Max. memory is 11.5 GB. [2018-11-23 10:03:51,066 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.10 ms. Allocated memory is still 1.0 GB. Free memory is still 982.7 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 213.66 ms. Allocated memory is still 1.0 GB. Free memory was 962.3 MB in the beginning and 939.8 MB in the end (delta: 22.5 MB). Peak memory consumption was 22.5 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 52.85 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 158.3 MB). Free memory was 939.8 MB in the beginning and 1.1 GB in the end (delta: -210.1 MB). Peak memory consumption was 14.7 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 31.98 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 490.36 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 54.0 MB). Peak memory consumption was 54.0 MB. Max. memory is 11.5 GB. * TraceAbstraction took 44699.88 ms. Allocated memory was 1.2 GB in the beginning and 4.2 GB in the end (delta: 3.0 GB). Free memory was 1.1 GB in the beginning and 2.6 GB in the end (delta: -1.5 GB). Peak memory consumption was 1.5 GB. Max. memory is 11.5 GB. * Witness Printer took 42096.12 ms. Allocated memory is still 4.2 GB. Free memory was 2.6 GB in the beginning and 2.3 GB in the end (delta: 368.5 MB). Peak memory consumption was 368.5 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 11]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L15] int m_pc = 0; [L16] int t1_pc = 0; [L17] int t2_pc = 0; [L18] int t3_pc = 0; [L19] int t4_pc = 0; [L20] int m_st ; [L21] int t1_st ; [L22] int t2_st ; [L23] int t3_st ; [L24] int t4_st ; [L25] int m_i ; [L26] int t1_i ; [L27] int t2_i ; [L28] int t3_i ; [L29] int t4_i ; [L30] int M_E = 2; [L31] int T1_E = 2; [L32] int T2_E = 2; [L33] int T3_E = 2; [L34] int T4_E = 2; [L35] int E_1 = 2; [L36] int E_2 = 2; [L37] int E_3 = 2; [L38] int E_4 = 2; VAL [\old(E_1)=21, \old(E_2)=5, \old(E_3)=25, \old(E_4)=11, \old(M_E)=17, \old(m_i)=7, \old(m_pc)=15, \old(m_st)=16, \old(T1_E)=3, \old(t1_i)=19, \old(t1_pc)=9, \old(t1_st)=4, \old(T2_E)=18, \old(t2_i)=6, \old(t2_pc)=10, \old(t2_st)=13, \old(T3_E)=23, \old(t3_i)=24, \old(t3_pc)=8, \old(t3_st)=14, \old(T4_E)=26, \old(t4_i)=20, \old(t4_pc)=22, \old(t4_st)=12, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=0, m_pc=0, m_st=0, T1_E=2, t1_i=0, t1_pc=0, t1_st=0, T2_E=2, t2_i=0, t2_pc=0, t2_st=0, T3_E=2, t3_i=0, t3_pc=0, t3_st=0, T4_E=2, t4_i=0, t4_pc=0, t4_st=0] [L811] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=0, m_pc=0, m_st=0, T1_E=2, t1_i=0, t1_pc=0, t1_st=0, T2_E=2, t2_i=0, t2_pc=0, t2_st=0, T3_E=2, t3_i=0, t3_pc=0, t3_st=0, T4_E=2, t4_i=0, t4_pc=0, t4_st=0] [L815] CALL init_model() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=0, m_pc=0, m_st=0, T1_E=2, t1_i=0, t1_pc=0, t1_st=0, T2_E=2, t2_i=0, t2_pc=0, t2_st=0, T3_E=2, t3_i=0, t3_pc=0, t3_st=0, T4_E=2, t4_i=0, t4_pc=0, t4_st=0] [L723] m_i = 1 [L724] t1_i = 1 [L725] t2_i = 1 [L726] t3_i = 1 [L727] t4_i = 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L815] RET init_model() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L816] CALL start_simulation() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L752] int kernel_st ; [L753] int tmp ; [L754] int tmp___0 ; [L758] kernel_st = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, kernel_st=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L759] FCALL update_channels() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, kernel_st=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L760] CALL init_threads() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L331] COND TRUE m_i == 1 [L332] m_st = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L336] COND TRUE t1_i == 1 [L337] t1_st = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L341] COND TRUE t2_i == 1 [L342] t2_st = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L346] COND TRUE t3_i == 1 [L347] t3_st = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L351] COND TRUE t4_i == 1 [L352] t4_st = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L760] RET init_threads() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, kernel_st=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L761] CALL fire_delta_events() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L492] COND FALSE !(M_E == 0) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L497] COND FALSE !(T1_E == 0) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L502] COND FALSE !(T2_E == 0) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L507] COND FALSE !(T3_E == 0) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L512] COND FALSE !(T4_E == 0) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L517] COND FALSE !(E_1 == 0) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L522] COND FALSE !(E_2 == 0) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L527] COND FALSE !(E_3 == 0) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L532] COND FALSE !(E_4 == 0) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L761] RET fire_delta_events() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, kernel_st=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L762] CALL activate_threads() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L595] int tmp ; [L596] int tmp___0 ; [L597] int tmp___1 ; [L598] int tmp___2 ; [L599] int tmp___3 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L603] CALL, EXPR is_master_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L225] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L228] COND FALSE !(m_pc == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L238] __retres1 = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, __retres1=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L240] return (__retres1); VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, \result=0, __retres1=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L603] RET, EXPR is_master_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, is_master_triggered()=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L603] tmp = is_master_triggered() [L605] COND FALSE !(\read(tmp)) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, tmp=0] [L611] CALL, EXPR is_transmit1_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L244] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L247] COND FALSE !(t1_pc == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L257] __retres1 = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, __retres1=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L259] return (__retres1); VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, \result=0, __retres1=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L611] RET, EXPR is_transmit1_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, is_transmit1_triggered()=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, tmp=0] [L611] tmp___0 = is_transmit1_triggered() [L613] COND FALSE !(\read(tmp___0)) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, tmp=0, tmp___0=0] [L619] CALL, EXPR is_transmit2_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L263] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L266] COND FALSE !(t2_pc == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L276] __retres1 = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, __retres1=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L278] return (__retres1); VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, \result=0, __retres1=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L619] RET, EXPR is_transmit2_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, is_transmit2_triggered()=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, tmp=0, tmp___0=0] [L619] tmp___1 = is_transmit2_triggered() [L621] COND FALSE !(\read(tmp___1)) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, tmp=0, tmp___0=0, tmp___1=0] [L627] CALL, EXPR is_transmit3_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L282] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L285] COND FALSE !(t3_pc == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L295] __retres1 = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, __retres1=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L297] return (__retres1); VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, \result=0, __retres1=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L627] RET, EXPR is_transmit3_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, is_transmit3_triggered()=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, tmp=0, tmp___0=0, tmp___1=0] [L627] tmp___2 = is_transmit3_triggered() [L629] COND FALSE !(\read(tmp___2)) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, tmp=0, tmp___0=0, tmp___1=0, tmp___2=0] [L635] CALL, EXPR is_transmit4_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L301] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L304] COND FALSE !(t4_pc == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L314] __retres1 = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, __retres1=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L316] return (__retres1); VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, \result=0, __retres1=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L635] RET, EXPR is_transmit4_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, is_transmit4_triggered()=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, tmp=0, tmp___0=0, tmp___1=0, tmp___2=0] [L635] tmp___3 = is_transmit4_triggered() [L637] COND FALSE !(\read(tmp___3)) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, tmp=0, tmp___0=0, tmp___1=0, tmp___2=0, tmp___3=0] [L762] RET activate_threads() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, kernel_st=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L763] CALL reset_delta_events() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L545] COND FALSE !(M_E == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L550] COND FALSE !(T1_E == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L555] COND FALSE !(T2_E == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L560] COND FALSE !(T3_E == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L565] COND FALSE !(T4_E == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L570] COND FALSE !(E_1 == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L575] COND FALSE !(E_2 == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L580] COND FALSE !(E_3 == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L585] COND FALSE !(E_4 == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L763] RET reset_delta_events() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, kernel_st=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L766] COND TRUE 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, kernel_st=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L769] kernel_st = 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, kernel_st=1, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L770] CALL eval() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L397] int tmp ; VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L401] COND TRUE 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L404] CALL, EXPR exists_runnable_thread() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L361] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L364] COND TRUE m_st == 0 [L365] __retres1 = 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, __retres1=1, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L392] return (__retres1); VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, \result=1, __retres1=1, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L404] RET, EXPR exists_runnable_thread() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, exists_runnable_thread()=1, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L404] tmp = exists_runnable_thread() [L406] COND TRUE \read(tmp) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, tmp=1] [L411] COND TRUE m_st == 0 [L412] int tmp_ndt_1; [L413] tmp_ndt_1 = __VERIFIER_nondet_int() [L414] COND FALSE !(\read(tmp_ndt_1)) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, tmp=1, tmp_ndt_1=0] [L425] COND TRUE t1_st == 0 [L426] int tmp_ndt_2; [L427] tmp_ndt_2 = __VERIFIER_nondet_int() [L428] COND TRUE \read(tmp_ndt_2) [L430] t1_st = 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=1, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, tmp=1, tmp_ndt_1=0, tmp_ndt_2=1] [L431] CALL transmit1() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=1, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L90] COND TRUE t1_pc == 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=1, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L101] COND TRUE 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=1, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L103] t1_pc = 1 [L104] t1_st = 2 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L431] RET transmit1() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, tmp=1, tmp_ndt_1=0, tmp_ndt_2=1] [L439] COND TRUE t2_st == 0 [L440] int tmp_ndt_3; [L441] tmp_ndt_3 = __VERIFIER_nondet_int() [L442] COND TRUE \read(tmp_ndt_3) [L444] t2_st = 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=0, t2_st=1, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, tmp=1, tmp_ndt_1=0, tmp_ndt_2=1, tmp_ndt_3=1] [L445] CALL transmit2() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=0, t2_st=1, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L125] COND TRUE t2_pc == 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=0, t2_st=1, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L136] COND TRUE 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=0, t2_st=1, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L138] t2_pc = 1 [L139] t2_st = 2 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L445] RET transmit2() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, tmp=1, tmp_ndt_1=0, tmp_ndt_2=1, tmp_ndt_3=1] [L453] COND TRUE t3_st == 0 [L454] int tmp_ndt_4; [L455] tmp_ndt_4 = __VERIFIER_nondet_int() [L456] COND TRUE \read(tmp_ndt_4) [L458] t3_st = 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=0, t3_st=1, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, tmp=1, tmp_ndt_1=0, tmp_ndt_2=1, tmp_ndt_3=1, tmp_ndt_4=1] [L459] CALL transmit3() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=1, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=0, t3_st=1, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L160] COND TRUE t3_pc == 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=1, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=0, t3_st=1, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L171] COND TRUE 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=1, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=0, t3_st=1, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L173] t3_pc = 1 [L174] t3_st = 2 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=1, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=0, t4_st=0] [L459] RET transmit3() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, tmp=1, tmp_ndt_1=0, tmp_ndt_2=1, tmp_ndt_3=1, tmp_ndt_4=1] [L467] COND TRUE t4_st == 0 [L468] int tmp_ndt_5; [L469] tmp_ndt_5 = __VERIFIER_nondet_int() [L470] COND TRUE \read(tmp_ndt_5) [L472] t4_st = 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=0, t4_st=1, tmp=1, tmp_ndt_1=0, tmp_ndt_2=1, tmp_ndt_3=1, tmp_ndt_4=1, tmp_ndt_5=1] [L473] CALL transmit4() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=1, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=0, t4_st=1] [L195] COND TRUE t4_pc == 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=1, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=0, t4_st=1] [L206] COND TRUE 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=1, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=0, t4_st=1] [L208] t4_pc = 1 [L209] t4_st = 2 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=1, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L473] RET transmit4() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, tmp=1, tmp_ndt_1=0, tmp_ndt_2=1, tmp_ndt_3=1, tmp_ndt_4=1, tmp_ndt_5=1] [L401] COND TRUE 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, tmp=1, tmp_ndt_1=0, tmp_ndt_2=1, tmp_ndt_3=1, tmp_ndt_4=1, tmp_ndt_5=1] [L404] CALL, EXPR exists_runnable_thread() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L361] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L364] COND TRUE m_st == 0 [L365] __retres1 = 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, __retres1=1, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L392] return (__retres1); VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, \result=1, __retres1=1, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L404] RET, EXPR exists_runnable_thread() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, exists_runnable_thread()=1, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, tmp=1, tmp_ndt_1=0, tmp_ndt_2=1, tmp_ndt_3=1, tmp_ndt_4=1, tmp_ndt_5=1] [L404] tmp = exists_runnable_thread() [L406] COND TRUE \read(tmp) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, tmp=1, tmp_ndt_1=0, tmp_ndt_2=1, tmp_ndt_3=1, tmp_ndt_4=1, tmp_ndt_5=1] [L411] COND TRUE m_st == 0 [L412] int tmp_ndt_1; [L413] tmp_ndt_1 = __VERIFIER_nondet_int() [L414] COND TRUE \read(tmp_ndt_1) [L416] m_st = 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, tmp=1, tmp_ndt_1=1, tmp_ndt_2=1, tmp_ndt_3=1, tmp_ndt_4=1, tmp_ndt_5=1] [L417] CALL master() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L49] COND TRUE m_pc == 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L60] COND TRUE 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L63] E_1 = 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=1, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L64] CALL immediate_notify() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=1, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L651] CALL activate_threads() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=1, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L595] int tmp ; [L596] int tmp___0 ; [L597] int tmp___1 ; [L598] int tmp___2 ; [L599] int tmp___3 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=1, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L603] CALL, EXPR is_master_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=1, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L225] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=1, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L228] COND FALSE !(m_pc == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=1, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L238] __retres1 = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, __retres1=0, E_1=1, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L240] return (__retres1); VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, \result=0, __retres1=0, E_1=1, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L603] RET, EXPR is_master_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=1, E_2=2, E_3=2, E_4=2, is_master_triggered()=0, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L603] tmp = is_master_triggered() [L605] COND FALSE !(\read(tmp)) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=1, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, tmp=0] [L611] CALL, EXPR is_transmit1_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=1, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L244] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=1, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L247] COND TRUE t1_pc == 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=1, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L248] COND TRUE E_1 == 1 [L249] __retres1 = 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, __retres1=1, E_1=1, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L259] return (__retres1); VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, \result=1, __retres1=1, E_1=1, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L611] RET, EXPR is_transmit1_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=1, E_2=2, E_3=2, E_4=2, is_transmit1_triggered()=1, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, tmp=0] [L611] tmp___0 = is_transmit1_triggered() [L613] COND TRUE \read(tmp___0) [L614] t1_st = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=1, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, tmp=0, tmp___0=1] [L619] CALL, EXPR is_transmit2_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=1, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L263] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=1, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L266] COND TRUE t2_pc == 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=1, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L267] COND FALSE !(E_2 == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=1, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L276] __retres1 = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, __retres1=0, E_1=1, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L278] return (__retres1); VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, \result=0, __retres1=0, E_1=1, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L619] RET, EXPR is_transmit2_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=1, E_2=2, E_3=2, E_4=2, is_transmit2_triggered()=0, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, tmp=0, tmp___0=1] [L619] tmp___1 = is_transmit2_triggered() [L621] COND FALSE !(\read(tmp___1)) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=1, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, tmp=0, tmp___0=1, tmp___1=0] [L627] CALL, EXPR is_transmit3_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=1, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L282] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=1, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L285] COND TRUE t3_pc == 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=1, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L286] COND FALSE !(E_3 == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=1, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L295] __retres1 = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, __retres1=0, E_1=1, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L297] return (__retres1); VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, \result=0, __retres1=0, E_1=1, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L627] RET, EXPR is_transmit3_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=1, E_2=2, E_3=2, E_4=2, is_transmit3_triggered()=0, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, tmp=0, tmp___0=1, tmp___1=0] [L627] tmp___2 = is_transmit3_triggered() [L629] COND FALSE !(\read(tmp___2)) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=1, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, tmp=0, tmp___0=1, tmp___1=0, tmp___2=0] [L635] CALL, EXPR is_transmit4_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=1, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L301] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=1, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L304] COND TRUE t4_pc == 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=1, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L305] COND FALSE !(E_4 == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=1, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L314] __retres1 = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, __retres1=0, E_1=1, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L316] return (__retres1); VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, \result=0, __retres1=0, E_1=1, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L635] RET, EXPR is_transmit4_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=1, E_2=2, E_3=2, E_4=2, is_transmit4_triggered()=0, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, tmp=0, tmp___0=1, tmp___1=0, tmp___2=0] [L635] tmp___3 = is_transmit4_triggered() [L637] COND FALSE !(\read(tmp___3)) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=1, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, tmp=0, tmp___0=1, tmp___1=0, tmp___2=0, tmp___3=0] [L651] RET activate_threads() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=1, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L64] RET immediate_notify() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=1, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L65] E_1 = 2 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L68] COND TRUE 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L70] m_pc = 1 [L71] m_st = 2 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L417] RET master() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, tmp=1, tmp_ndt_1=1, tmp_ndt_2=1, tmp_ndt_3=1, tmp_ndt_4=1, tmp_ndt_5=1] [L425] COND TRUE t1_st == 0 [L426] int tmp_ndt_2; [L427] tmp_ndt_2 = __VERIFIER_nondet_int() [L428] COND TRUE \read(tmp_ndt_2) [L430] t1_st = 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, tmp=1, tmp_ndt_1=1, tmp_ndt_2=1, tmp_ndt_3=1, tmp_ndt_4=1, tmp_ndt_5=1] [L431] CALL transmit1() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L90] COND FALSE !(t1_pc == 0) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L93] COND TRUE t1_pc == 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L109] E_2 = 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=1, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L110] CALL immediate_notify() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=1, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L651] CALL activate_threads() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=1, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L595] int tmp ; [L596] int tmp___0 ; [L597] int tmp___1 ; [L598] int tmp___2 ; [L599] int tmp___3 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=1, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L603] CALL, EXPR is_master_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=1, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L225] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=1, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L228] COND TRUE m_pc == 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=1, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L229] COND FALSE !(M_E == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=1, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L238] __retres1 = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, __retres1=0, E_1=2, E_2=1, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L240] return (__retres1); VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, \result=0, __retres1=0, E_1=2, E_2=1, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L603] RET, EXPR is_master_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=1, E_3=2, E_4=2, is_master_triggered()=0, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L603] tmp = is_master_triggered() [L605] COND FALSE !(\read(tmp)) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=1, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, tmp=0] [L611] CALL, EXPR is_transmit1_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=1, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L244] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=1, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L247] COND TRUE t1_pc == 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=1, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L248] COND FALSE !(E_1 == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=1, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L257] __retres1 = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, __retres1=0, E_1=2, E_2=1, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L259] return (__retres1); VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, \result=0, __retres1=0, E_1=2, E_2=1, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L611] RET, EXPR is_transmit1_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=1, E_3=2, E_4=2, is_transmit1_triggered()=0, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, tmp=0] [L611] tmp___0 = is_transmit1_triggered() [L613] COND FALSE !(\read(tmp___0)) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=1, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, tmp=0, tmp___0=0] [L619] CALL, EXPR is_transmit2_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=1, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L263] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=1, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L266] COND TRUE t2_pc == 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=1, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L267] COND TRUE E_2 == 1 [L268] __retres1 = 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, __retres1=1, E_1=2, E_2=1, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L278] return (__retres1); VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, \result=1, __retres1=1, E_1=2, E_2=1, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L619] RET, EXPR is_transmit2_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=1, E_3=2, E_4=2, is_transmit2_triggered()=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, tmp=0, tmp___0=0] [L619] tmp___1 = is_transmit2_triggered() [L621] COND TRUE \read(tmp___1) [L622] t2_st = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=1, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, tmp=0, tmp___0=0, tmp___1=1] [L627] CALL, EXPR is_transmit3_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=1, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L282] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=1, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L285] COND TRUE t3_pc == 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=1, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L286] COND FALSE !(E_3 == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=1, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L295] __retres1 = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, __retres1=0, E_1=2, E_2=1, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L297] return (__retres1); VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, \result=0, __retres1=0, E_1=2, E_2=1, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L627] RET, EXPR is_transmit3_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=1, E_3=2, E_4=2, is_transmit3_triggered()=0, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, tmp=0, tmp___0=0, tmp___1=1] [L627] tmp___2 = is_transmit3_triggered() [L629] COND FALSE !(\read(tmp___2)) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=1, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, tmp=0, tmp___0=0, tmp___1=1, tmp___2=0] [L635] CALL, EXPR is_transmit4_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=1, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L301] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=1, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L304] COND TRUE t4_pc == 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=1, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L305] COND FALSE !(E_4 == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=1, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L314] __retres1 = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, __retres1=0, E_1=2, E_2=1, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L316] return (__retres1); VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, \result=0, __retres1=0, E_1=2, E_2=1, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L635] RET, EXPR is_transmit4_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=1, E_3=2, E_4=2, is_transmit4_triggered()=0, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, tmp=0, tmp___0=0, tmp___1=1, tmp___2=0] [L635] tmp___3 = is_transmit4_triggered() [L637] COND FALSE !(\read(tmp___3)) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=1, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, tmp=0, tmp___0=0, tmp___1=1, tmp___2=0, tmp___3=0] [L651] RET activate_threads() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=1, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L110] RET immediate_notify() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=1, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L111] E_2 = 2 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L101] COND TRUE 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L103] t1_pc = 1 [L104] t1_st = 2 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L431] RET transmit1() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, tmp=1, tmp_ndt_1=1, tmp_ndt_2=1, tmp_ndt_3=1, tmp_ndt_4=1, tmp_ndt_5=1] [L439] COND TRUE t2_st == 0 [L440] int tmp_ndt_3; [L441] tmp_ndt_3 = __VERIFIER_nondet_int() [L442] COND TRUE \read(tmp_ndt_3) [L444] t2_st = 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, tmp=1, tmp_ndt_1=1, tmp_ndt_2=1, tmp_ndt_3=1, tmp_ndt_4=1, tmp_ndt_5=1] [L445] CALL transmit2() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L125] COND FALSE !(t2_pc == 0) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L128] COND TRUE t2_pc == 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L144] E_3 = 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=1, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L145] CALL immediate_notify() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=1, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L651] CALL activate_threads() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=1, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L595] int tmp ; [L596] int tmp___0 ; [L597] int tmp___1 ; [L598] int tmp___2 ; [L599] int tmp___3 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=1, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L603] CALL, EXPR is_master_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=1, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L225] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=1, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L228] COND TRUE m_pc == 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=1, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L229] COND FALSE !(M_E == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=1, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L238] __retres1 = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, __retres1=0, E_1=2, E_2=2, E_3=1, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L240] return (__retres1); VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, \result=0, __retres1=0, E_1=2, E_2=2, E_3=1, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L603] RET, EXPR is_master_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=1, E_4=2, is_master_triggered()=0, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L603] tmp = is_master_triggered() [L605] COND FALSE !(\read(tmp)) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=1, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, tmp=0] [L611] CALL, EXPR is_transmit1_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=1, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L244] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=1, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L247] COND TRUE t1_pc == 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=1, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L248] COND FALSE !(E_1 == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=1, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L257] __retres1 = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, __retres1=0, E_1=2, E_2=2, E_3=1, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L259] return (__retres1); VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, \result=0, __retres1=0, E_1=2, E_2=2, E_3=1, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L611] RET, EXPR is_transmit1_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=1, E_4=2, is_transmit1_triggered()=0, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, tmp=0] [L611] tmp___0 = is_transmit1_triggered() [L613] COND FALSE !(\read(tmp___0)) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=1, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, tmp=0, tmp___0=0] [L619] CALL, EXPR is_transmit2_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=1, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L263] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=1, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L266] COND TRUE t2_pc == 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=1, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L267] COND FALSE !(E_2 == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=1, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L276] __retres1 = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, __retres1=0, E_1=2, E_2=2, E_3=1, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L278] return (__retres1); VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, \result=0, __retres1=0, E_1=2, E_2=2, E_3=1, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L619] RET, EXPR is_transmit2_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=1, E_4=2, is_transmit2_triggered()=0, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, tmp=0, tmp___0=0] [L619] tmp___1 = is_transmit2_triggered() [L621] COND FALSE !(\read(tmp___1)) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=1, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, tmp=0, tmp___0=0, tmp___1=0] [L627] CALL, EXPR is_transmit3_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=1, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L282] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=1, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L285] COND TRUE t3_pc == 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=1, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L286] COND TRUE E_3 == 1 [L287] __retres1 = 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, __retres1=1, E_1=2, E_2=2, E_3=1, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L297] return (__retres1); VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, \result=1, __retres1=1, E_1=2, E_2=2, E_3=1, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L627] RET, EXPR is_transmit3_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=1, E_4=2, is_transmit3_triggered()=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, tmp=0, tmp___0=0, tmp___1=0] [L627] tmp___2 = is_transmit3_triggered() [L629] COND TRUE \read(tmp___2) [L630] t3_st = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=1, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=0, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, tmp=0, tmp___0=0, tmp___1=0, tmp___2=1] [L635] CALL, EXPR is_transmit4_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=1, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=0, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L301] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=1, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=0, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L304] COND TRUE t4_pc == 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=1, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=0, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L305] COND FALSE !(E_4 == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=1, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=0, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L314] __retres1 = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, __retres1=0, E_1=2, E_2=2, E_3=1, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=0, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L316] return (__retres1); VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, \result=0, __retres1=0, E_1=2, E_2=2, E_3=1, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=0, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L635] RET, EXPR is_transmit4_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=1, E_4=2, is_transmit4_triggered()=0, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=0, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, tmp=0, tmp___0=0, tmp___1=0, tmp___2=1] [L635] tmp___3 = is_transmit4_triggered() [L637] COND FALSE !(\read(tmp___3)) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=1, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=0, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, tmp=0, tmp___0=0, tmp___1=0, tmp___2=1, tmp___3=0] [L651] RET activate_threads() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=1, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=0, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L145] RET immediate_notify() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=1, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=0, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L146] E_3 = 2 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=0, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L136] COND TRUE 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=0, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L138] t2_pc = 1 [L139] t2_st = 2 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=2, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=0, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L445] RET transmit2() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=0, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, tmp=1, tmp_ndt_1=1, tmp_ndt_2=1, tmp_ndt_3=1, tmp_ndt_4=1, tmp_ndt_5=1] [L453] COND TRUE t3_st == 0 [L454] int tmp_ndt_4; [L455] tmp_ndt_4 = __VERIFIER_nondet_int() [L456] COND TRUE \read(tmp_ndt_4) [L458] t3_st = 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, tmp=1, tmp_ndt_1=1, tmp_ndt_2=1, tmp_ndt_3=1, tmp_ndt_4=1, tmp_ndt_5=1] [L459] CALL transmit3() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=1, \old(t3_st)=1, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L160] COND FALSE !(t3_pc == 0) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=1, \old(t3_st)=1, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L163] COND TRUE t3_pc == 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=1, \old(t3_st)=1, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L179] E_4 = 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=1, \old(t3_st)=1, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=2, E_4=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L180] CALL immediate_notify() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=1, \old(t3_st)=1, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=2, E_4=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L651] CALL activate_threads() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=1, \old(t3_st)=1, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=2, E_4=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L595] int tmp ; [L596] int tmp___0 ; [L597] int tmp___1 ; [L598] int tmp___2 ; [L599] int tmp___3 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=1, \old(t3_st)=1, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=2, E_4=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L603] CALL, EXPR is_master_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=1, \old(t3_st)=1, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=2, E_4=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L225] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=1, \old(t3_st)=1, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=2, E_4=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L228] COND TRUE m_pc == 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=1, \old(t3_st)=1, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=2, E_4=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L229] COND FALSE !(M_E == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=1, \old(t3_st)=1, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=2, E_4=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L238] __retres1 = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=1, \old(t3_st)=1, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, __retres1=0, E_1=2, E_2=2, E_3=2, E_4=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L240] return (__retres1); VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=1, \old(t3_st)=1, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, \result=0, __retres1=0, E_1=2, E_2=2, E_3=2, E_4=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L603] RET, EXPR is_master_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=1, \old(t3_st)=1, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=2, E_4=1, is_master_triggered()=0, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L603] tmp = is_master_triggered() [L605] COND FALSE !(\read(tmp)) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=1, \old(t3_st)=1, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=2, E_4=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, tmp=0] [L611] CALL, EXPR is_transmit1_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=1, \old(t3_st)=1, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=2, E_4=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L244] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=1, \old(t3_st)=1, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=2, E_4=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L247] COND TRUE t1_pc == 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=1, \old(t3_st)=1, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=2, E_4=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L248] COND FALSE !(E_1 == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=1, \old(t3_st)=1, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=2, E_4=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L257] __retres1 = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=1, \old(t3_st)=1, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, __retres1=0, E_1=2, E_2=2, E_3=2, E_4=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L259] return (__retres1); VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=1, \old(t3_st)=1, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, \result=0, __retres1=0, E_1=2, E_2=2, E_3=2, E_4=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L611] RET, EXPR is_transmit1_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=1, \old(t3_st)=1, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=2, E_4=1, is_transmit1_triggered()=0, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, tmp=0] [L611] tmp___0 = is_transmit1_triggered() [L613] COND FALSE !(\read(tmp___0)) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=1, \old(t3_st)=1, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=2, E_4=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, tmp=0, tmp___0=0] [L619] CALL, EXPR is_transmit2_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=1, \old(t3_st)=1, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=2, E_4=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L263] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=1, \old(t3_st)=1, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=2, E_4=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L266] COND TRUE t2_pc == 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=1, \old(t3_st)=1, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=2, E_4=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L267] COND FALSE !(E_2 == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=1, \old(t3_st)=1, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=2, E_4=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L276] __retres1 = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=1, \old(t3_st)=1, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, __retres1=0, E_1=2, E_2=2, E_3=2, E_4=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L278] return (__retres1); VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=1, \old(t3_st)=1, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, \result=0, __retres1=0, E_1=2, E_2=2, E_3=2, E_4=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L619] RET, EXPR is_transmit2_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=1, \old(t3_st)=1, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=2, E_4=1, is_transmit2_triggered()=0, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, tmp=0, tmp___0=0] [L619] tmp___1 = is_transmit2_triggered() [L621] COND FALSE !(\read(tmp___1)) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=1, \old(t3_st)=1, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=2, E_4=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, tmp=0, tmp___0=0, tmp___1=0] [L627] CALL, EXPR is_transmit3_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=1, \old(t3_st)=1, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=2, E_4=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L282] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=1, \old(t3_st)=1, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=2, E_4=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L285] COND TRUE t3_pc == 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=1, \old(t3_st)=1, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=2, E_4=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L286] COND FALSE !(E_3 == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=1, \old(t3_st)=1, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=2, E_4=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L295] __retres1 = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=1, \old(t3_st)=1, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, __retres1=0, E_1=2, E_2=2, E_3=2, E_4=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L297] return (__retres1); VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=1, \old(t3_st)=1, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, \result=0, __retres1=0, E_1=2, E_2=2, E_3=2, E_4=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L627] RET, EXPR is_transmit3_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=1, \old(t3_st)=1, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=2, E_4=1, is_transmit3_triggered()=0, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, tmp=0, tmp___0=0, tmp___1=0] [L627] tmp___2 = is_transmit3_triggered() [L629] COND FALSE !(\read(tmp___2)) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=1, \old(t3_st)=1, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=2, E_4=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, tmp=0, tmp___0=0, tmp___1=0, tmp___2=0] [L635] CALL, EXPR is_transmit4_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=1, \old(t3_st)=1, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=2, E_4=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L301] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=1, \old(t3_st)=1, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=2, E_4=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L304] COND TRUE t4_pc == 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=1, \old(t3_st)=1, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=2, E_4=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L305] COND TRUE E_4 == 1 [L306] __retres1 = 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=1, \old(t3_st)=1, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, __retres1=1, E_1=2, E_2=2, E_3=2, E_4=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L316] return (__retres1); VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=1, \old(t3_st)=1, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, \result=1, __retres1=1, E_1=2, E_2=2, E_3=2, E_4=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2] [L635] RET, EXPR is_transmit4_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=1, \old(t3_st)=1, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=2, E_4=1, is_transmit4_triggered()=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, tmp=0, tmp___0=0, tmp___1=0, tmp___2=0] [L635] tmp___3 = is_transmit4_triggered() [L637] COND TRUE \read(tmp___3) [L638] t4_st = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=1, \old(t3_st)=1, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=2, E_4=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=0, tmp=0, tmp___0=0, tmp___1=0, tmp___2=0, tmp___3=1] [L651] RET activate_threads() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=1, \old(t3_st)=1, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=2, E_4=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=0] [L180] RET immediate_notify() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=1, \old(t3_st)=1, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=2, E_4=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=0] [L181] E_4 = 2 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=1, \old(t3_st)=1, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=0] [L171] COND TRUE 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=1, \old(t3_st)=1, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=0] [L173] t3_pc = 1 [L174] t3_st = 2 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=1, \old(t3_st)=1, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=2, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=0] [L459] RET transmit3() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=0, tmp=1, tmp_ndt_1=1, tmp_ndt_2=1, tmp_ndt_3=1, tmp_ndt_4=1, tmp_ndt_5=1] [L467] COND TRUE t4_st == 0 [L468] int tmp_ndt_5; [L469] tmp_ndt_5 = __VERIFIER_nondet_int() [L470] COND TRUE \read(tmp_ndt_5) [L472] t4_st = 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=0, \old(t4_st)=0, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=1, tmp=1, tmp_ndt_1=1, tmp_ndt_2=1, tmp_ndt_3=1, tmp_ndt_4=1, tmp_ndt_5=1] [L473] CALL transmit4() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=1, \old(t4_st)=1, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=1] [L195] COND FALSE !(t4_pc == 0) VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=1, \old(t4_st)=1, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=1] [L198] COND TRUE t4_pc == 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=1, \old(t4_st)=1, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=1] [L214] CALL error() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=1, \old(t4_st)=1, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=1] [L11] __VERIFIER_error() VAL [\old(E_1)=2, \old(E_2)=2, \old(E_3)=2, \old(E_4)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \old(T3_E)=2, \old(t3_i)=0, \old(t3_pc)=0, \old(t3_st)=0, \old(T4_E)=2, \old(t4_i)=0, \old(t4_pc)=1, \old(t4_st)=1, E_1=2, E_2=2, E_3=2, E_4=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=1] - StatisticsResult: Ultimate Automizer benchmark data CFG has 27 procedures, 229 locations, 1 error locations. UNSAFE Result, 44.6s OverallTime, 34 OverallIterations, 6 TraceHistogramMax, 18.9s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 11377 SDtfs, 13695 SDslu, 12848 SDs, 0 SdLazy, 7847 SolverSat, 3035 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 5.6s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 2115 GetRequests, 1933 SyntacticMatches, 46 SemanticMatches, 136 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 30 ImplicationChecksByTransitivity, 0.9s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=30840occurred in iteration=32, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 9.4s AutomataMinimizationTime, 33 MinimizatonAttempts, 3509 StatesRemovedByMinimization, 27 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.2s SsaConstructionTime, 0.7s SatisfiabilityAnalysisTime, 1.8s InterpolantComputationTime, 7729 NumberOfCodeBlocks, 7729 NumberOfCodeBlocksAsserted, 40 NumberOfCheckSat, 7264 ConstructedInterpolants, 0 QuantifiedInterpolants, 2252327 SizeOfPredicates, 3 NumberOfNonLiveVariables, 7984 ConjunctsInSsa, 22 ConjunctsInUnsatCore, 39 InterpolantComputations, 33 PerfectInterpolantSequences, 3391/3494 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...