./Ultimate.py --spec ../../sv-benchmarks/c/properties/termination.prp --file ../../sv-benchmarks/c/systemc/token_ring.04_false-unreach-call_false-termination.cil.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version aa418289 Calling Ultimate with: java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/working_dir_345ffb2d-d467-4605-9ff5-e45eeb67a5f5/bin-2019/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/working_dir_345ffb2d-d467-4605-9ff5-e45eeb67a5f5/bin-2019/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/working_dir_345ffb2d-d467-4605-9ff5-e45eeb67a5f5/bin-2019/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/working_dir_345ffb2d-d467-4605-9ff5-e45eeb67a5f5/bin-2019/uautomizer/config/AutomizerTermination.xml -i ../../sv-benchmarks/c/systemc/token_ring.04_false-unreach-call_false-termination.cil.c -s /tmp/vcloud-vcloud-master/worker/working_dir_345ffb2d-d467-4605-9ff5-e45eeb67a5f5/bin-2019/uautomizer/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/working_dir_345ffb2d-d467-4605-9ff5-e45eeb67a5f5/bin-2019/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 5e27a879cb97b2b6600a7b4379c4e090f4fa709a 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Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE(TERM) --- Real Ultimate output --- This is Ultimate 0.1.23-aa41828 [2018-11-23 08:02:18,996 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-11-23 08:02:18,997 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-11-23 08:02:19,006 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-11-23 08:02:19,006 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-11-23 08:02:19,007 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-11-23 08:02:19,007 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-11-23 08:02:19,009 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-11-23 08:02:19,010 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-11-23 08:02:19,010 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-11-23 08:02:19,011 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-11-23 08:02:19,011 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-11-23 08:02:19,012 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-11-23 08:02:19,012 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-11-23 08:02:19,013 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-11-23 08:02:19,014 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-11-23 08:02:19,014 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-11-23 08:02:19,015 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-11-23 08:02:19,017 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-11-23 08:02:19,018 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-11-23 08:02:19,019 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-11-23 08:02:19,019 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-11-23 08:02:19,021 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-11-23 08:02:19,021 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-11-23 08:02:19,021 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-11-23 08:02:19,022 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-11-23 08:02:19,022 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-11-23 08:02:19,023 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-11-23 08:02:19,023 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-11-23 08:02:19,024 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-11-23 08:02:19,024 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-11-23 08:02:19,025 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-11-23 08:02:19,025 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-11-23 08:02:19,025 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-11-23 08:02:19,026 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-11-23 08:02:19,027 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-11-23 08:02:19,027 INFO L98 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/working_dir_345ffb2d-d467-4605-9ff5-e45eeb67a5f5/bin-2019/uautomizer/config/svcomp-Termination-32bit-Automizer_Default.epf [2018-11-23 08:02:19,038 INFO L110 SettingsManager]: Loading preferences was successful [2018-11-23 08:02:19,038 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-11-23 08:02:19,039 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-11-23 08:02:19,039 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-11-23 08:02:19,039 INFO L133 SettingsManager]: * Use SBE=true [2018-11-23 08:02:19,040 INFO L131 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2018-11-23 08:02:19,040 INFO L133 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2018-11-23 08:02:19,040 INFO L133 SettingsManager]: * Use old map elimination=false [2018-11-23 08:02:19,040 INFO L133 SettingsManager]: * Use external solver (rank synthesis)=false [2018-11-23 08:02:19,040 INFO L133 SettingsManager]: * Use only trivial implications for array writes=true [2018-11-23 08:02:19,040 INFO L133 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2018-11-23 08:02:19,041 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-11-23 08:02:19,041 INFO L133 SettingsManager]: * sizeof long=4 [2018-11-23 08:02:19,041 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-11-23 08:02:19,041 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-11-23 08:02:19,041 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-11-23 08:02:19,041 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-11-23 08:02:19,041 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2018-11-23 08:02:19,042 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2018-11-23 08:02:19,042 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2018-11-23 08:02:19,042 INFO L133 SettingsManager]: * sizeof long double=12 [2018-11-23 08:02:19,042 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-11-23 08:02:19,042 INFO L133 SettingsManager]: * Assume nondeterminstic values are in range=false [2018-11-23 08:02:19,042 INFO L133 SettingsManager]: * Use constant arrays=true [2018-11-23 08:02:19,042 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2018-11-23 08:02:19,043 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-11-23 08:02:19,043 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-11-23 08:02:19,043 INFO L133 SettingsManager]: * To the following directory=/home/matthias/ultimate/dump [2018-11-23 08:02:19,043 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-11-23 08:02:19,043 INFO L133 SettingsManager]: * Trace refinement strategy=CAMEL [2018-11-23 08:02:19,043 INFO L133 SettingsManager]: * Dump automata to the following directory=/home/matthias/ultimate/dump/auto [2018-11-23 08:02:19,044 INFO L131 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2018-11-23 08:02:19,044 INFO L133 SettingsManager]: * TransformationType=MODULO_NEIGHBOR Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/working_dir_345ffb2d-d467-4605-9ff5-e45eeb67a5f5/bin-2019/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 5e27a879cb97b2b6600a7b4379c4e090f4fa709a [2018-11-23 08:02:19,070 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-11-23 08:02:19,080 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-11-23 08:02:19,083 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-11-23 08:02:19,085 INFO L271 PluginConnector]: Initializing CDTParser... [2018-11-23 08:02:19,085 INFO L276 PluginConnector]: CDTParser initialized [2018-11-23 08:02:19,085 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/working_dir_345ffb2d-d467-4605-9ff5-e45eeb67a5f5/bin-2019/uautomizer/../../sv-benchmarks/c/systemc/token_ring.04_false-unreach-call_false-termination.cil.c [2018-11-23 08:02:19,139 INFO L221 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_345ffb2d-d467-4605-9ff5-e45eeb67a5f5/bin-2019/uautomizer/data/534fb081b/ee3fcda3e86b4b61a7db38301ce5d5f0/FLAGcd0078150 [2018-11-23 08:02:19,536 INFO L307 CDTParser]: Found 1 translation units. [2018-11-23 08:02:19,537 INFO L161 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/working_dir_345ffb2d-d467-4605-9ff5-e45eeb67a5f5/sv-benchmarks/c/systemc/token_ring.04_false-unreach-call_false-termination.cil.c [2018-11-23 08:02:19,546 INFO L355 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_345ffb2d-d467-4605-9ff5-e45eeb67a5f5/bin-2019/uautomizer/data/534fb081b/ee3fcda3e86b4b61a7db38301ce5d5f0/FLAGcd0078150 [2018-11-23 08:02:19,558 INFO L363 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/working_dir_345ffb2d-d467-4605-9ff5-e45eeb67a5f5/bin-2019/uautomizer/data/534fb081b/ee3fcda3e86b4b61a7db38301ce5d5f0 [2018-11-23 08:02:19,561 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-11-23 08:02:19,562 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2018-11-23 08:02:19,562 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-11-23 08:02:19,563 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-11-23 08:02:19,566 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-11-23 08:02:19,567 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 23.11 08:02:19" (1/1) ... [2018-11-23 08:02:19,569 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@2ac28ad0 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 08:02:19, skipping insertion in model container [2018-11-23 08:02:19,569 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 23.11 08:02:19" (1/1) ... [2018-11-23 08:02:19,577 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-11-23 08:02:19,609 INFO L176 MainTranslator]: Built tables and reachable declarations [2018-11-23 08:02:19,802 INFO L201 PostProcessor]: Analyzing one entry point: main [2018-11-23 08:02:19,806 INFO L191 MainTranslator]: Completed pre-run [2018-11-23 08:02:19,854 INFO L201 PostProcessor]: Analyzing one entry point: main [2018-11-23 08:02:19,871 INFO L195 MainTranslator]: Completed translation [2018-11-23 08:02:19,872 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 08:02:19 WrapperNode [2018-11-23 08:02:19,872 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-11-23 08:02:19,872 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2018-11-23 08:02:19,872 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2018-11-23 08:02:19,873 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2018-11-23 08:02:19,882 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 08:02:19" (1/1) ... [2018-11-23 08:02:19,934 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 08:02:19" (1/1) ... [2018-11-23 08:02:19,980 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2018-11-23 08:02:19,980 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-11-23 08:02:19,980 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-11-23 08:02:19,980 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-11-23 08:02:19,991 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 08:02:19" (1/1) ... [2018-11-23 08:02:19,991 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 08:02:19" (1/1) ... [2018-11-23 08:02:19,995 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 08:02:19" (1/1) ... [2018-11-23 08:02:19,995 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 08:02:19" (1/1) ... [2018-11-23 08:02:20,005 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 08:02:19" (1/1) ... [2018-11-23 08:02:20,021 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 08:02:19" (1/1) ... [2018-11-23 08:02:20,023 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 08:02:19" (1/1) ... [2018-11-23 08:02:20,027 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-11-23 08:02:20,028 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-11-23 08:02:20,028 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-11-23 08:02:20,028 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-11-23 08:02:20,029 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 08:02:19" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_345ffb2d-d467-4605-9ff5-e45eeb67a5f5/bin-2019/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2018-11-23 08:02:20,092 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-11-23 08:02:20,092 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-11-23 08:02:21,046 INFO L275 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-11-23 08:02:21,046 INFO L280 CfgBuilder]: Removed 163 assue(true) statements. [2018-11-23 08:02:21,046 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 23.11 08:02:21 BoogieIcfgContainer [2018-11-23 08:02:21,047 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-11-23 08:02:21,047 INFO L113 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2018-11-23 08:02:21,047 INFO L271 PluginConnector]: Initializing BuchiAutomizer... [2018-11-23 08:02:21,051 INFO L276 PluginConnector]: BuchiAutomizer initialized [2018-11-23 08:02:21,052 INFO L102 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2018-11-23 08:02:21,052 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 23.11 08:02:19" (1/3) ... [2018-11-23 08:02:21,053 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@102a05b6 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 23.11 08:02:21, skipping insertion in model container [2018-11-23 08:02:21,054 INFO L102 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2018-11-23 08:02:21,054 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 08:02:19" (2/3) ... [2018-11-23 08:02:21,054 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@102a05b6 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 23.11 08:02:21, skipping insertion in model container [2018-11-23 08:02:21,054 INFO L102 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2018-11-23 08:02:21,054 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 23.11 08:02:21" (3/3) ... [2018-11-23 08:02:21,056 INFO L375 chiAutomizerObserver]: Analyzing ICFG token_ring.04_false-unreach-call_false-termination.cil.c [2018-11-23 08:02:21,099 INFO L133 ementStrategyFactory]: Using default assertion order modulation [2018-11-23 08:02:21,100 INFO L374 BuchiCegarLoop]: Interprodecural is true [2018-11-23 08:02:21,100 INFO L375 BuchiCegarLoop]: Hoare is false [2018-11-23 08:02:21,100 INFO L376 BuchiCegarLoop]: Compute interpolants for ForwardPredicates [2018-11-23 08:02:21,100 INFO L377 BuchiCegarLoop]: Backedges is STRAIGHT_LINE [2018-11-23 08:02:21,100 INFO L378 BuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-11-23 08:02:21,100 INFO L379 BuchiCegarLoop]: Difference is false [2018-11-23 08:02:21,100 INFO L380 BuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-11-23 08:02:21,100 INFO L383 BuchiCegarLoop]: ======== Iteration 0==of CEGAR loop == BuchiCegarLoop======== [2018-11-23 08:02:21,124 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 419 states. [2018-11-23 08:02:21,163 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 352 [2018-11-23 08:02:21,163 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2018-11-23 08:02:21,163 INFO L119 BuchiIsEmpty]: Starting construction of run [2018-11-23 08:02:21,172 INFO L866 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 08:02:21,172 INFO L867 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 08:02:21,173 INFO L442 BuchiCegarLoop]: ======== Iteration 1============ [2018-11-23 08:02:21,173 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 419 states. [2018-11-23 08:02:21,183 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 352 [2018-11-23 08:02:21,183 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2018-11-23 08:02:21,183 INFO L119 BuchiIsEmpty]: Starting construction of run [2018-11-23 08:02:21,185 INFO L866 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 08:02:21,186 INFO L867 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 08:02:21,194 INFO L794 eck$LassoCheckResult]: Stem: 283#ULTIMATE.startENTRYtrue ~m_pc~0 := 0;~t1_pc~0 := 0;~t2_pc~0 := 0;~t3_pc~0 := 0;~t4_pc~0 := 0;~m_st~0 := 0;~t1_st~0 := 0;~t2_st~0 := 0;~t3_st~0 := 0;~t4_st~0 := 0;~m_i~0 := 0;~t1_i~0 := 0;~t2_i~0 := 0;~t3_i~0 := 0;~t4_i~0 := 0;~M_E~0 := 2;~T1_E~0 := 2;~T2_E~0 := 2;~T3_E~0 := 2;~T4_E~0 := 2;~E_M~0 := 2;~E_1~0 := 2;~E_2~0 := 2;~E_3~0 := 2;~E_4~0 := 2;~token~0 := 0;~local~0 := 0; 197#L-1true havoc main_#res;havoc main_~__retres1~6;havoc main_~__retres1~6;~m_i~0 := 1;~t1_i~0 := 1;~t2_i~0 := 1;~t3_i~0 := 1;~t4_i~0 := 1; 386#L768true havoc start_simulation_#t~ret14, start_simulation_#t~ret15, start_simulation_~kernel_st~0, start_simulation_~tmp~3, start_simulation_~tmp___0~1;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;havoc start_simulation_~tmp___0~1;start_simulation_~kernel_st~0 := 0; 343#L348true assume !(1 == ~m_i~0);~m_st~0 := 2; 157#L355-1true assume 1 == ~t1_i~0;~t1_st~0 := 0; 403#L360-1true assume !(1 == ~t2_i~0);~t2_st~0 := 2; 82#L365-1true assume !(1 == ~t3_i~0);~t3_st~0 := 2; 346#L370-1true assume !(1 == ~t4_i~0);~t4_st~0 := 2; 135#L375-1true assume !(0 == ~M_E~0); 221#L516-1true assume !(0 == ~T1_E~0); 31#L521-1true assume !(0 == ~T2_E~0); 370#L526-1true assume !(0 == ~T3_E~0); 163#L531-1true assume 0 == ~T4_E~0;~T4_E~0 := 1; 414#L536-1true assume !(0 == ~E_M~0); 90#L541-1true assume !(0 == ~E_1~0); 355#L546-1true assume !(0 == ~E_2~0); 143#L551-1true assume !(0 == ~E_3~0); 56#L556-1true assume !(0 == ~E_4~0); 310#L561-1true havoc activate_threads_#t~ret8, activate_threads_#t~ret9, activate_threads_#t~ret10, activate_threads_#t~ret11, activate_threads_#t~ret12, activate_threads_~tmp~1, activate_threads_~tmp___0~0, activate_threads_~tmp___1~0, activate_threads_~tmp___2~0, activate_threads_~tmp___3~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc activate_threads_~tmp___1~0;havoc activate_threads_~tmp___2~0;havoc activate_threads_~tmp___3~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; 195#L252true assume 1 == ~m_pc~0; 278#L253true assume 1 == ~E_M~0;is_master_triggered_~__retres1~0 := 1; 196#L263true is_master_triggered_#res := is_master_triggered_~__retres1~0; 279#L264true activate_threads_#t~ret8 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret8;havoc activate_threads_#t~ret8; 266#L639true assume !(0 != activate_threads_~tmp~1); 140#L639-2true havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; 335#L271true assume !(1 == ~t1_pc~0); 348#L271-2true is_transmit1_triggered_~__retres1~1 := 0; 336#L282true is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; 393#L283true activate_threads_#t~ret9 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret9;havoc activate_threads_#t~ret9; 380#L647true assume !(0 != activate_threads_~tmp___0~0); 383#L647-2true havoc is_transmit2_triggered_#res;havoc is_transmit2_triggered_~__retres1~2;havoc is_transmit2_triggered_~__retres1~2; 36#L290true assume 1 == ~t2_pc~0; 80#L291true assume 1 == ~E_2~0;is_transmit2_triggered_~__retres1~2 := 1; 37#L301true is_transmit2_triggered_#res := is_transmit2_triggered_~__retres1~2; 81#L302true activate_threads_#t~ret10 := is_transmit2_triggered_#res;activate_threads_~tmp___1~0 := activate_threads_#t~ret10;havoc activate_threads_#t~ret10; 60#L655true assume !(0 != activate_threads_~tmp___1~0); 53#L655-2true havoc is_transmit3_triggered_#res;havoc is_transmit3_triggered_~__retres1~3;havoc is_transmit3_triggered_~__retres1~3; 138#L309true assume !(1 == ~t3_pc~0); 116#L309-2true is_transmit3_triggered_~__retres1~3 := 0; 137#L320true is_transmit3_triggered_#res := is_transmit3_triggered_~__retres1~3; 83#L321true activate_threads_#t~ret11 := is_transmit3_triggered_#res;activate_threads_~tmp___2~0 := activate_threads_#t~ret11;havoc activate_threads_#t~ret11; 169#L663true assume !(0 != activate_threads_~tmp___2~0); 170#L663-2true havoc is_transmit4_triggered_#res;havoc is_transmit4_triggered_~__retres1~4;havoc is_transmit4_triggered_~__retres1~4; 255#L328true assume 1 == ~t4_pc~0; 199#L329true assume 1 == ~E_4~0;is_transmit4_triggered_~__retres1~4 := 1; 253#L339true is_transmit4_triggered_#res := is_transmit4_triggered_~__retres1~4; 198#L340true activate_threads_#t~ret12 := is_transmit4_triggered_#res;activate_threads_~tmp___3~0 := activate_threads_#t~ret12;havoc activate_threads_#t~ret12; 318#L671true assume !(0 != activate_threads_~tmp___3~0); 307#L671-2true assume !(1 == ~M_E~0); 89#L574-1true assume 1 == ~T1_E~0;~T1_E~0 := 2; 354#L579-1true assume !(1 == ~T2_E~0); 141#L584-1true assume !(1 == ~T3_E~0); 54#L589-1true assume !(1 == ~T4_E~0); 309#L594-1true assume !(1 == ~E_M~0); 6#L599-1true assume !(1 == ~E_1~0); 228#L604-1true assume !(1 == ~E_2~0); 43#L609-1true assume !(1 == ~E_3~0); 384#L614-1true assume 1 == ~E_4~0;~E_4~0 := 2; 93#L805-1true [2018-11-23 08:02:21,195 INFO L796 eck$LassoCheckResult]: Loop: 93#L805-1true assume !false; 171#L806true start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret2, eval_#t~nondet3, eval_~tmp_ndt_1~0, eval_#t~nondet4, eval_~tmp_ndt_2~0, eval_#t~nondet5, eval_~tmp_ndt_3~0, eval_#t~nondet6, eval_~tmp_ndt_4~0, eval_#t~nondet7, eval_~tmp_ndt_5~0, eval_~tmp~0;havoc eval_~tmp~0; 356#L491true assume !true; 311#L506true start_simulation_~kernel_st~0 := 2; 350#L348-1true start_simulation_~kernel_st~0 := 3; 222#L516-2true assume 0 == ~M_E~0;~M_E~0 := 1; 223#L516-4true assume !(0 == ~T1_E~0); 38#L521-3true assume 0 == ~T2_E~0;~T2_E~0 := 1; 375#L526-3true assume 0 == ~T3_E~0;~T3_E~0 := 1; 166#L531-3true assume 0 == ~T4_E~0;~T4_E~0 := 1; 416#L536-3true assume 0 == ~E_M~0;~E_M~0 := 1; 92#L541-3true assume 0 == ~E_1~0;~E_1~0 := 1; 359#L546-3true assume 0 == ~E_2~0;~E_2~0 := 1; 130#L551-3true assume 0 == ~E_3~0;~E_3~0 := 1; 48#L556-3true assume !(0 == ~E_4~0); 298#L561-3true havoc activate_threads_#t~ret8, activate_threads_#t~ret9, activate_threads_#t~ret10, activate_threads_#t~ret11, activate_threads_#t~ret12, activate_threads_~tmp~1, activate_threads_~tmp___0~0, activate_threads_~tmp___1~0, activate_threads_~tmp___2~0, activate_threads_~tmp___3~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc activate_threads_~tmp___1~0;havoc activate_threads_~tmp___2~0;havoc activate_threads_~tmp___3~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; 321#L252-18true assume 1 == ~m_pc~0; 288#L253-6true assume 1 == ~E_M~0;is_master_triggered_~__retres1~0 := 1; 205#L263-6true is_master_triggered_#res := is_master_triggered_~__retres1~0; 289#L264-6true activate_threads_#t~ret8 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret8;havoc activate_threads_#t~ret8; 108#L639-18true assume 0 != activate_threads_~tmp~1;~m_st~0 := 0; 111#L639-20true havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; 415#L271-18true assume 1 == ~t1_pc~0; 395#L272-6true assume 1 == ~E_1~0;is_transmit1_triggered_~__retres1~1 := 1; 330#L282-6true is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; 396#L283-6true activate_threads_#t~ret9 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret9;havoc activate_threads_#t~ret9; 249#L647-18true assume !(0 != activate_threads_~tmp___0~0); 234#L647-20true havoc is_transmit2_triggered_#res;havoc is_transmit2_triggered_~__retres1~2;havoc is_transmit2_triggered_~__retres1~2; 4#L290-18true assume 1 == ~t2_pc~0; 65#L291-6true assume 1 == ~E_2~0;is_transmit2_triggered_~__retres1~2 := 1; 16#L301-6true is_transmit2_triggered_#res := is_transmit2_triggered_~__retres1~2; 66#L302-6true activate_threads_#t~ret10 := is_transmit2_triggered_#res;activate_threads_~tmp___1~0 := activate_threads_#t~ret10;havoc activate_threads_#t~ret10; 365#L655-18true assume 0 != activate_threads_~tmp___1~0;~t2_st~0 := 0; 366#L655-20true havoc is_transmit3_triggered_#res;havoc is_transmit3_triggered_~__retres1~3;havoc is_transmit3_triggered_~__retres1~3; 95#L309-18true assume !(1 == ~t3_pc~0); 97#L309-20true is_transmit3_triggered_~__retres1~3 := 0; 127#L320-6true is_transmit3_triggered_#res := is_transmit3_triggered_~__retres1~3; 182#L321-6true activate_threads_#t~ret11 := is_transmit3_triggered_#res;activate_threads_~tmp___2~0 := activate_threads_#t~ret11;havoc activate_threads_#t~ret11; 153#L663-18true assume 0 != activate_threads_~tmp___2~0;~t3_st~0 := 0; 147#L663-20true havoc is_transmit4_triggered_#res;havoc is_transmit4_triggered_~__retres1~4;havoc is_transmit4_triggered_~__retres1~4; 233#L328-18true assume !(1 == ~t4_pc~0); 224#L328-20true is_transmit4_triggered_~__retres1~4 := 0; 244#L339-6true is_transmit4_triggered_#res := is_transmit4_triggered_~__retres1~4; 189#L340-6true activate_threads_#t~ret12 := is_transmit4_triggered_#res;activate_threads_~tmp___3~0 := activate_threads_#t~ret12;havoc activate_threads_#t~ret12; 274#L671-18true assume 0 != activate_threads_~tmp___3~0;~t4_st~0 := 0; 280#L671-20true assume 1 == ~M_E~0;~M_E~0 := 2; 91#L574-3true assume 1 == ~T1_E~0;~T1_E~0 := 2; 358#L579-3true assume 1 == ~T2_E~0;~T2_E~0 := 2; 144#L584-3true assume 1 == ~T3_E~0;~T3_E~0 := 2; 58#L589-3true assume 1 == ~T4_E~0;~T4_E~0 := 2; 313#L594-3true assume 1 == ~E_M~0;~E_M~0 := 2; 71#L599-3true assume !(1 == ~E_1~0); 219#L604-3true assume 1 == ~E_2~0;~E_2~0 := 2; 29#L609-3true assume 1 == ~E_3~0;~E_3~0 := 2; 369#L614-3true assume 1 == ~E_4~0;~E_4~0 := 2; 162#L619-3true havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~5;havoc exists_runnable_thread_~__retres1~5; 156#L388-1true assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~5 := 1; 397#L415-1true exists_runnable_thread_#res := exists_runnable_thread_~__retres1~5; 378#L416-1true start_simulation_#t~ret14 := exists_runnable_thread_#res;start_simulation_~tmp~3 := start_simulation_#t~ret14;havoc start_simulation_#t~ret14; 230#L824true assume !(0 == start_simulation_~tmp~3); 232#L824-1true havoc stop_simulation_#res;havoc stop_simulation_#t~ret13, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~5;havoc exists_runnable_thread_~__retres1~5; 158#L388-2true assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~5 := 1; 401#L415-2true exists_runnable_thread_#res := exists_runnable_thread_~__retres1~5; 252#L416-2true stop_simulation_#t~ret13 := exists_runnable_thread_#res;stop_simulation_~tmp~2 := stop_simulation_#t~ret13;havoc stop_simulation_#t~ret13; 385#L779true assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; 10#L786true stop_simulation_#res := stop_simulation_~__retres2~0; 59#L787true start_simulation_#t~ret15 := stop_simulation_#res;start_simulation_~tmp___0~1 := start_simulation_#t~ret15;havoc start_simulation_#t~ret15; 268#L837true assume !(0 != start_simulation_~tmp___0~1); 93#L805-1true [2018-11-23 08:02:21,199 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 08:02:21,199 INFO L82 PathProgramCache]: Analyzing trace with hash -2002818045, now seen corresponding path program 1 times [2018-11-23 08:02:21,200 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 08:02:21,201 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 08:02:21,235 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:02:21,236 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 08:02:21,236 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:02:21,262 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 08:02:21,323 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 08:02:21,325 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 08:02:21,325 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-23 08:02:21,329 INFO L799 eck$LassoCheckResult]: stem already infeasible [2018-11-23 08:02:21,330 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 08:02:21,330 INFO L82 PathProgramCache]: Analyzing trace with hash 448746186, now seen corresponding path program 1 times [2018-11-23 08:02:21,330 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 08:02:21,330 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 08:02:21,331 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:02:21,331 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 08:02:21,331 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:02:21,335 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 08:02:21,346 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 08:02:21,346 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 08:02:21,346 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-11-23 08:02:21,348 INFO L811 eck$LassoCheckResult]: loop already infeasible [2018-11-23 08:02:21,361 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-23 08:02:21,362 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-23 08:02:21,364 INFO L87 Difference]: Start difference. First operand 419 states. Second operand 3 states. [2018-11-23 08:02:21,395 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 08:02:21,395 INFO L93 Difference]: Finished difference Result 419 states and 635 transitions. [2018-11-23 08:02:21,396 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-23 08:02:21,397 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 419 states and 635 transitions. [2018-11-23 08:02:21,402 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 350 [2018-11-23 08:02:21,408 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 419 states to 413 states and 629 transitions. [2018-11-23 08:02:21,409 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 413 [2018-11-23 08:02:21,410 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 413 [2018-11-23 08:02:21,410 INFO L73 IsDeterministic]: Start isDeterministic. Operand 413 states and 629 transitions. [2018-11-23 08:02:21,413 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2018-11-23 08:02:21,413 INFO L705 BuchiCegarLoop]: Abstraction has 413 states and 629 transitions. [2018-11-23 08:02:21,430 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 413 states and 629 transitions. [2018-11-23 08:02:21,446 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 413 to 413. [2018-11-23 08:02:21,447 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 413 states. [2018-11-23 08:02:21,448 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 413 states to 413 states and 629 transitions. [2018-11-23 08:02:21,449 INFO L728 BuchiCegarLoop]: Abstraction has 413 states and 629 transitions. [2018-11-23 08:02:21,449 INFO L608 BuchiCegarLoop]: Abstraction has 413 states and 629 transitions. [2018-11-23 08:02:21,449 INFO L442 BuchiCegarLoop]: ======== Iteration 2============ [2018-11-23 08:02:21,449 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 413 states and 629 transitions. [2018-11-23 08:02:21,451 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 350 [2018-11-23 08:02:21,451 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2018-11-23 08:02:21,455 INFO L119 BuchiIsEmpty]: Starting construction of run [2018-11-23 08:02:21,456 INFO L866 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 08:02:21,456 INFO L867 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 08:02:21,456 INFO L794 eck$LassoCheckResult]: Stem: 1193#ULTIMATE.startENTRY ~m_pc~0 := 0;~t1_pc~0 := 0;~t2_pc~0 := 0;~t3_pc~0 := 0;~t4_pc~0 := 0;~m_st~0 := 0;~t1_st~0 := 0;~t2_st~0 := 0;~t3_st~0 := 0;~t4_st~0 := 0;~m_i~0 := 0;~t1_i~0 := 0;~t2_i~0 := 0;~t3_i~0 := 0;~t4_i~0 := 0;~M_E~0 := 2;~T1_E~0 := 2;~T2_E~0 := 2;~T3_E~0 := 2;~T4_E~0 := 2;~E_M~0 := 2;~E_1~0 := 2;~E_2~0 := 2;~E_3~0 := 2;~E_4~0 := 2;~token~0 := 0;~local~0 := 0; 1121#L-1 havoc main_#res;havoc main_~__retres1~6;havoc main_~__retres1~6;~m_i~0 := 1;~t1_i~0 := 1;~t2_i~0 := 1;~t3_i~0 := 1;~t4_i~0 := 1; 1122#L768 havoc start_simulation_#t~ret14, start_simulation_#t~ret15, start_simulation_~kernel_st~0, start_simulation_~tmp~3, start_simulation_~tmp___0~1;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;havoc start_simulation_~tmp___0~1;start_simulation_~kernel_st~0 := 0; 1238#L348 assume 1 == ~m_i~0;~m_st~0 := 0; 1076#L355-1 assume 1 == ~t1_i~0;~t1_st~0 := 0; 1077#L360-1 assume !(1 == ~t2_i~0);~t2_st~0 := 2; 966#L365-1 assume !(1 == ~t3_i~0);~t3_st~0 := 2; 967#L370-1 assume !(1 == ~t4_i~0);~t4_st~0 := 2; 1047#L375-1 assume !(0 == ~M_E~0); 1048#L516-1 assume !(0 == ~T1_E~0); 900#L521-1 assume !(0 == ~T2_E~0); 901#L526-1 assume !(0 == ~T3_E~0); 1084#L531-1 assume 0 == ~T4_E~0;~T4_E~0 := 1; 1085#L536-1 assume !(0 == ~E_M~0); 984#L541-1 assume !(0 == ~E_1~0); 985#L546-1 assume !(0 == ~E_2~0); 1055#L551-1 assume !(0 == ~E_3~0); 949#L556-1 assume !(0 == ~E_4~0); 950#L561-1 havoc activate_threads_#t~ret8, activate_threads_#t~ret9, activate_threads_#t~ret10, activate_threads_#t~ret11, activate_threads_#t~ret12, activate_threads_~tmp~1, activate_threads_~tmp___0~0, activate_threads_~tmp___1~0, activate_threads_~tmp___2~0, activate_threads_~tmp___3~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc activate_threads_~tmp___1~0;havoc activate_threads_~tmp___2~0;havoc activate_threads_~tmp___3~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; 1118#L252 assume 1 == ~m_pc~0; 1119#L253 assume 1 == ~E_M~0;is_master_triggered_~__retres1~0 := 1; 1100#L263 is_master_triggered_#res := is_master_triggered_~__retres1~0; 1120#L264 activate_threads_#t~ret8 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret8;havoc activate_threads_#t~ret8; 1184#L639 assume !(0 != activate_threads_~tmp~1); 1050#L639-2 havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; 1051#L271 assume !(1 == ~t1_pc~0); 1228#L271-2 is_transmit1_triggered_~__retres1~1 := 0; 1230#L282 is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; 1231#L283 activate_threads_#t~ret9 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret9;havoc activate_threads_#t~ret9; 1254#L647 assume !(0 != activate_threads_~tmp___0~0); 1255#L647-2 havoc is_transmit2_triggered_#res;havoc is_transmit2_triggered_~__retres1~2;havoc is_transmit2_triggered_~__retres1~2; 910#L290 assume 1 == ~t2_pc~0; 911#L291 assume 1 == ~E_2~0;is_transmit2_triggered_~__retres1~2 := 1; 899#L301 is_transmit2_triggered_#res := is_transmit2_triggered_~__retres1~2; 912#L302 activate_threads_#t~ret10 := is_transmit2_triggered_#res;activate_threads_~tmp___1~0 := activate_threads_#t~ret10;havoc activate_threads_#t~ret10; 955#L655 assume !(0 != activate_threads_~tmp___1~0); 943#L655-2 havoc is_transmit3_triggered_#res;havoc is_transmit3_triggered_~__retres1~3;havoc is_transmit3_triggered_~__retres1~3; 944#L309 assume !(1 == ~t3_pc~0); 972#L309-2 is_transmit3_triggered_~__retres1~3 := 0; 971#L320 is_transmit3_triggered_#res := is_transmit3_triggered_~__retres1~3; 968#L321 activate_threads_#t~ret11 := is_transmit3_triggered_#res;activate_threads_~tmp___2~0 := activate_threads_#t~ret11;havoc activate_threads_#t~ret11; 969#L663 assume !(0 != activate_threads_~tmp___2~0); 1093#L663-2 havoc is_transmit4_triggered_#res;havoc is_transmit4_triggered_~__retres1~4;havoc is_transmit4_triggered_~__retres1~4; 1094#L328 assume 1 == ~t4_pc~0; 1125#L329 assume 1 == ~E_4~0;is_transmit4_triggered_~__retres1~4 := 1; 1126#L339 is_transmit4_triggered_#res := is_transmit4_triggered_~__retres1~4; 1123#L340 activate_threads_#t~ret12 := is_transmit4_triggered_#res;activate_threads_~tmp___3~0 := activate_threads_#t~ret12;havoc activate_threads_#t~ret12; 1124#L671 assume !(0 != activate_threads_~tmp___3~0); 1209#L671-2 assume !(1 == ~M_E~0); 982#L574-1 assume 1 == ~T1_E~0;~T1_E~0 := 2; 983#L579-1 assume !(1 == ~T2_E~0); 1052#L584-1 assume !(1 == ~T3_E~0); 945#L589-1 assume !(1 == ~T4_E~0); 946#L594-1 assume !(1 == ~E_M~0); 854#L599-1 assume !(1 == ~E_1~0); 855#L604-1 assume !(1 == ~E_2~0); 925#L609-1 assume !(1 == ~E_3~0); 926#L614-1 assume 1 == ~E_4~0;~E_4~0 := 2; 990#L805-1 [2018-11-23 08:02:21,457 INFO L796 eck$LassoCheckResult]: Loop: 990#L805-1 assume !false; 991#L806 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret2, eval_#t~nondet3, eval_~tmp_ndt_1~0, eval_#t~nondet4, eval_~tmp_ndt_2~0, eval_#t~nondet5, eval_~tmp_ndt_3~0, eval_#t~nondet6, eval_~tmp_ndt_4~0, eval_#t~nondet7, eval_~tmp_ndt_5~0, eval_~tmp~0;havoc eval_~tmp~0; 905#L491 assume !false; 1244#L426 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~5;havoc exists_runnable_thread_~__retres1~5; 1070#L388 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~5 := 1; 916#L415 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~5; 1252#L416 eval_#t~ret2 := exists_runnable_thread_#res;eval_~tmp~0 := eval_#t~ret2;havoc eval_#t~ret2; 1042#L430 assume !(0 != eval_~tmp~0); 1044#L506 start_simulation_~kernel_st~0 := 2; 1211#L348-1 start_simulation_~kernel_st~0 := 3; 1167#L516-2 assume 0 == ~M_E~0;~M_E~0 := 1; 1168#L516-4 assume !(0 == ~T1_E~0); 913#L521-3 assume 0 == ~T2_E~0;~T2_E~0 := 1; 914#L526-3 assume 0 == ~T3_E~0;~T3_E~0 := 1; 1088#L531-3 assume 0 == ~T4_E~0;~T4_E~0 := 1; 1089#L536-3 assume 0 == ~E_M~0;~E_M~0 := 1; 988#L541-3 assume 0 == ~E_1~0;~E_1~0 := 1; 989#L546-3 assume 0 == ~E_2~0;~E_2~0 := 1; 1039#L551-3 assume 0 == ~E_3~0;~E_3~0 := 1; 934#L556-3 assume !(0 == ~E_4~0); 935#L561-3 havoc activate_threads_#t~ret8, activate_threads_#t~ret9, activate_threads_#t~ret10, activate_threads_#t~ret11, activate_threads_#t~ret12, activate_threads_~tmp~1, activate_threads_~tmp___0~0, activate_threads_~tmp___1~0, activate_threads_~tmp___2~0, activate_threads_~tmp___3~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc activate_threads_~tmp___1~0;havoc activate_threads_~tmp___2~0;havoc activate_threads_~tmp___3~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; 1205#L252-18 assume 1 == ~m_pc~0; 1198#L253-6 assume 1 == ~E_M~0;is_master_triggered_~__retres1~0 := 1; 1137#L263-6 is_master_triggered_#res := is_master_triggered_~__retres1~0; 1138#L264-6 activate_threads_#t~ret8 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret8;havoc activate_threads_#t~ret8; 1016#L639-18 assume 0 != activate_threads_~tmp~1;~m_st~0 := 0; 1017#L639-20 havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; 1022#L271-18 assume 1 == ~t1_pc~0; 1258#L272-6 assume 1 == ~E_1~0;is_transmit1_triggered_~__retres1~1 := 1; 1220#L282-6 is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; 1221#L283-6 activate_threads_#t~ret9 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret9;havoc activate_threads_#t~ret9; 1177#L647-18 assume !(0 != activate_threads_~tmp___0~0); 1171#L647-20 havoc is_transmit2_triggered_#res;havoc is_transmit2_triggered_~__retres1~2;havoc is_transmit2_triggered_~__retres1~2; 849#L290-18 assume 1 == ~t2_pc~0; 850#L291-6 assume 1 == ~E_2~0;is_transmit2_triggered_~__retres1~2 := 1; 866#L301-6 is_transmit2_triggered_#res := is_transmit2_triggered_~__retres1~2; 872#L302-6 activate_threads_#t~ret10 := is_transmit2_triggered_#res;activate_threads_~tmp___1~0 := activate_threads_#t~ret10;havoc activate_threads_#t~ret10; 962#L655-18 assume 0 != activate_threads_~tmp___1~0;~t2_st~0 := 0; 1246#L655-20 havoc is_transmit3_triggered_#res;havoc is_transmit3_triggered_~__retres1~3;havoc is_transmit3_triggered_~__retres1~3; 994#L309-18 assume !(1 == ~t3_pc~0); 995#L309-20 is_transmit3_triggered_~__retres1~3 := 0; 999#L320-6 is_transmit3_triggered_#res := is_transmit3_triggered_~__retres1~3; 1036#L321-6 activate_threads_#t~ret11 := is_transmit3_triggered_#res;activate_threads_~tmp___2~0 := activate_threads_#t~ret11;havoc activate_threads_#t~ret11; 1069#L663-18 assume 0 != activate_threads_~tmp___2~0;~t3_st~0 := 0; 1059#L663-20 havoc is_transmit4_triggered_#res;havoc is_transmit4_triggered_~__retres1~4;havoc is_transmit4_triggered_~__retres1~4; 1060#L328-18 assume 1 == ~t4_pc~0; 1105#L329-6 assume 1 == ~E_4~0;is_transmit4_triggered_~__retres1~4 := 1; 1106#L339-6 is_transmit4_triggered_#res := is_transmit4_triggered_~__retres1~4; 1103#L340-6 activate_threads_#t~ret12 := is_transmit4_triggered_#res;activate_threads_~tmp___3~0 := activate_threads_#t~ret12;havoc activate_threads_#t~ret12; 1104#L671-18 assume 0 != activate_threads_~tmp___3~0;~t4_st~0 := 0; 1190#L671-20 assume 1 == ~M_E~0;~M_E~0 := 2; 986#L574-3 assume 1 == ~T1_E~0;~T1_E~0 := 2; 987#L579-3 assume 1 == ~T2_E~0;~T2_E~0 := 2; 1056#L584-3 assume 1 == ~T3_E~0;~T3_E~0 := 2; 952#L589-3 assume 1 == ~T4_E~0;~T4_E~0 := 2; 953#L594-3 assume 1 == ~E_M~0;~E_M~0 := 2; 964#L599-3 assume !(1 == ~E_1~0); 965#L604-3 assume 1 == ~E_2~0;~E_2~0 := 2; 896#L609-3 assume 1 == ~E_3~0;~E_3~0 := 2; 897#L614-3 assume 1 == ~E_4~0;~E_4~0 := 2; 1083#L619-3 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~5;havoc exists_runnable_thread_~__retres1~5; 1074#L388-1 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~5 := 1; 919#L415-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~5; 1253#L416-1 start_simulation_#t~ret14 := exists_runnable_thread_#res;start_simulation_~tmp~3 := start_simulation_#t~ret14;havoc start_simulation_#t~ret14; 1169#L824 assume !(0 == start_simulation_~tmp~3); 1170#L824-1 havoc stop_simulation_#res;havoc stop_simulation_#t~ret13, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~5;havoc exists_runnable_thread_~__retres1~5; 1078#L388-2 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~5 := 1; 891#L415-2 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~5; 1180#L416-2 stop_simulation_#t~ret13 := exists_runnable_thread_#res;stop_simulation_~tmp~2 := stop_simulation_#t~ret13;havoc stop_simulation_#t~ret13; 1181#L779 assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; 862#L786 stop_simulation_#res := stop_simulation_~__retres2~0; 863#L787 start_simulation_#t~ret15 := stop_simulation_#res;start_simulation_~tmp___0~1 := start_simulation_#t~ret15;havoc start_simulation_#t~ret15; 954#L837 assume !(0 != start_simulation_~tmp___0~1); 990#L805-1 [2018-11-23 08:02:21,457 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 08:02:21,457 INFO L82 PathProgramCache]: Analyzing trace with hash 905363841, now seen corresponding path program 1 times [2018-11-23 08:02:21,457 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 08:02:21,457 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 08:02:21,458 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:02:21,458 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 08:02:21,458 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:02:21,468 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 08:02:21,492 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 08:02:21,492 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 08:02:21,492 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-23 08:02:21,493 INFO L799 eck$LassoCheckResult]: stem already infeasible [2018-11-23 08:02:21,493 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 08:02:21,493 INFO L82 PathProgramCache]: Analyzing trace with hash 1477654567, now seen corresponding path program 1 times [2018-11-23 08:02:21,493 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 08:02:21,493 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 08:02:21,494 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:02:21,494 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 08:02:21,494 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:02:21,509 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 08:02:21,547 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 08:02:21,547 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 08:02:21,548 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-23 08:02:21,548 INFO L811 eck$LassoCheckResult]: loop already infeasible [2018-11-23 08:02:21,549 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-23 08:02:21,549 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-23 08:02:21,549 INFO L87 Difference]: Start difference. First operand 413 states and 629 transitions. cyclomatic complexity: 217 Second operand 3 states. [2018-11-23 08:02:21,559 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 08:02:21,559 INFO L93 Difference]: Finished difference Result 413 states and 628 transitions. [2018-11-23 08:02:21,560 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-23 08:02:21,560 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 413 states and 628 transitions. [2018-11-23 08:02:21,562 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 350 [2018-11-23 08:02:21,565 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 413 states to 413 states and 628 transitions. [2018-11-23 08:02:21,565 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 413 [2018-11-23 08:02:21,565 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 413 [2018-11-23 08:02:21,566 INFO L73 IsDeterministic]: Start isDeterministic. Operand 413 states and 628 transitions. [2018-11-23 08:02:21,567 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2018-11-23 08:02:21,567 INFO L705 BuchiCegarLoop]: Abstraction has 413 states and 628 transitions. [2018-11-23 08:02:21,568 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 413 states and 628 transitions. [2018-11-23 08:02:21,577 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 413 to 413. [2018-11-23 08:02:21,578 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 413 states. [2018-11-23 08:02:21,579 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 413 states to 413 states and 628 transitions. [2018-11-23 08:02:21,579 INFO L728 BuchiCegarLoop]: Abstraction has 413 states and 628 transitions. [2018-11-23 08:02:21,580 INFO L608 BuchiCegarLoop]: Abstraction has 413 states and 628 transitions. [2018-11-23 08:02:21,580 INFO L442 BuchiCegarLoop]: ======== Iteration 3============ [2018-11-23 08:02:21,580 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 413 states and 628 transitions. [2018-11-23 08:02:21,582 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 350 [2018-11-23 08:02:21,582 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2018-11-23 08:02:21,582 INFO L119 BuchiIsEmpty]: Starting construction of run [2018-11-23 08:02:21,584 INFO L866 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 08:02:21,584 INFO L867 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 08:02:21,584 INFO L794 eck$LassoCheckResult]: Stem: 2026#ULTIMATE.startENTRY ~m_pc~0 := 0;~t1_pc~0 := 0;~t2_pc~0 := 0;~t3_pc~0 := 0;~t4_pc~0 := 0;~m_st~0 := 0;~t1_st~0 := 0;~t2_st~0 := 0;~t3_st~0 := 0;~t4_st~0 := 0;~m_i~0 := 0;~t1_i~0 := 0;~t2_i~0 := 0;~t3_i~0 := 0;~t4_i~0 := 0;~M_E~0 := 2;~T1_E~0 := 2;~T2_E~0 := 2;~T3_E~0 := 2;~T4_E~0 := 2;~E_M~0 := 2;~E_1~0 := 2;~E_2~0 := 2;~E_3~0 := 2;~E_4~0 := 2;~token~0 := 0;~local~0 := 0; 1954#L-1 havoc main_#res;havoc main_~__retres1~6;havoc main_~__retres1~6;~m_i~0 := 1;~t1_i~0 := 1;~t2_i~0 := 1;~t3_i~0 := 1;~t4_i~0 := 1; 1955#L768 havoc start_simulation_#t~ret14, start_simulation_#t~ret15, start_simulation_~kernel_st~0, start_simulation_~tmp~3, start_simulation_~tmp___0~1;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;havoc start_simulation_~tmp___0~1;start_simulation_~kernel_st~0 := 0; 2071#L348 assume 1 == ~m_i~0;~m_st~0 := 0; 1909#L355-1 assume 1 == ~t1_i~0;~t1_st~0 := 0; 1910#L360-1 assume 1 == ~t2_i~0;~t2_st~0 := 0; 1799#L365-1 assume !(1 == ~t3_i~0);~t3_st~0 := 2; 1800#L370-1 assume !(1 == ~t4_i~0);~t4_st~0 := 2; 1880#L375-1 assume !(0 == ~M_E~0); 1881#L516-1 assume !(0 == ~T1_E~0); 1733#L521-1 assume !(0 == ~T2_E~0); 1734#L526-1 assume !(0 == ~T3_E~0); 1917#L531-1 assume 0 == ~T4_E~0;~T4_E~0 := 1; 1918#L536-1 assume !(0 == ~E_M~0); 1817#L541-1 assume !(0 == ~E_1~0); 1818#L546-1 assume !(0 == ~E_2~0); 1888#L551-1 assume !(0 == ~E_3~0); 1782#L556-1 assume !(0 == ~E_4~0); 1783#L561-1 havoc activate_threads_#t~ret8, activate_threads_#t~ret9, activate_threads_#t~ret10, activate_threads_#t~ret11, activate_threads_#t~ret12, activate_threads_~tmp~1, activate_threads_~tmp___0~0, activate_threads_~tmp___1~0, activate_threads_~tmp___2~0, activate_threads_~tmp___3~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc activate_threads_~tmp___1~0;havoc activate_threads_~tmp___2~0;havoc activate_threads_~tmp___3~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; 1951#L252 assume 1 == ~m_pc~0; 1952#L253 assume 1 == ~E_M~0;is_master_triggered_~__retres1~0 := 1; 1933#L263 is_master_triggered_#res := is_master_triggered_~__retres1~0; 1953#L264 activate_threads_#t~ret8 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret8;havoc activate_threads_#t~ret8; 2017#L639 assume !(0 != activate_threads_~tmp~1); 1883#L639-2 havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; 1884#L271 assume !(1 == ~t1_pc~0); 2061#L271-2 is_transmit1_triggered_~__retres1~1 := 0; 2063#L282 is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; 2064#L283 activate_threads_#t~ret9 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret9;havoc activate_threads_#t~ret9; 2087#L647 assume !(0 != activate_threads_~tmp___0~0); 2088#L647-2 havoc is_transmit2_triggered_#res;havoc is_transmit2_triggered_~__retres1~2;havoc is_transmit2_triggered_~__retres1~2; 1743#L290 assume 1 == ~t2_pc~0; 1744#L291 assume 1 == ~E_2~0;is_transmit2_triggered_~__retres1~2 := 1; 1732#L301 is_transmit2_triggered_#res := is_transmit2_triggered_~__retres1~2; 1745#L302 activate_threads_#t~ret10 := is_transmit2_triggered_#res;activate_threads_~tmp___1~0 := activate_threads_#t~ret10;havoc activate_threads_#t~ret10; 1788#L655 assume !(0 != activate_threads_~tmp___1~0); 1776#L655-2 havoc is_transmit3_triggered_#res;havoc is_transmit3_triggered_~__retres1~3;havoc is_transmit3_triggered_~__retres1~3; 1777#L309 assume !(1 == ~t3_pc~0); 1805#L309-2 is_transmit3_triggered_~__retres1~3 := 0; 1804#L320 is_transmit3_triggered_#res := is_transmit3_triggered_~__retres1~3; 1801#L321 activate_threads_#t~ret11 := is_transmit3_triggered_#res;activate_threads_~tmp___2~0 := activate_threads_#t~ret11;havoc activate_threads_#t~ret11; 1802#L663 assume !(0 != activate_threads_~tmp___2~0); 1926#L663-2 havoc is_transmit4_triggered_#res;havoc is_transmit4_triggered_~__retres1~4;havoc is_transmit4_triggered_~__retres1~4; 1927#L328 assume 1 == ~t4_pc~0; 1958#L329 assume 1 == ~E_4~0;is_transmit4_triggered_~__retres1~4 := 1; 1959#L339 is_transmit4_triggered_#res := is_transmit4_triggered_~__retres1~4; 1956#L340 activate_threads_#t~ret12 := is_transmit4_triggered_#res;activate_threads_~tmp___3~0 := activate_threads_#t~ret12;havoc activate_threads_#t~ret12; 1957#L671 assume !(0 != activate_threads_~tmp___3~0); 2042#L671-2 assume !(1 == ~M_E~0); 1815#L574-1 assume 1 == ~T1_E~0;~T1_E~0 := 2; 1816#L579-1 assume !(1 == ~T2_E~0); 1885#L584-1 assume !(1 == ~T3_E~0); 1778#L589-1 assume !(1 == ~T4_E~0); 1779#L594-1 assume !(1 == ~E_M~0); 1687#L599-1 assume !(1 == ~E_1~0); 1688#L604-1 assume !(1 == ~E_2~0); 1758#L609-1 assume !(1 == ~E_3~0); 1759#L614-1 assume 1 == ~E_4~0;~E_4~0 := 2; 1823#L805-1 [2018-11-23 08:02:21,585 INFO L796 eck$LassoCheckResult]: Loop: 1823#L805-1 assume !false; 1824#L806 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret2, eval_#t~nondet3, eval_~tmp_ndt_1~0, eval_#t~nondet4, eval_~tmp_ndt_2~0, eval_#t~nondet5, eval_~tmp_ndt_3~0, eval_#t~nondet6, eval_~tmp_ndt_4~0, eval_#t~nondet7, eval_~tmp_ndt_5~0, eval_~tmp~0;havoc eval_~tmp~0; 1738#L491 assume !false; 2077#L426 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~5;havoc exists_runnable_thread_~__retres1~5; 1903#L388 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~5 := 1; 1749#L415 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~5; 2085#L416 eval_#t~ret2 := exists_runnable_thread_#res;eval_~tmp~0 := eval_#t~ret2;havoc eval_#t~ret2; 1875#L430 assume !(0 != eval_~tmp~0); 1877#L506 start_simulation_~kernel_st~0 := 2; 2044#L348-1 start_simulation_~kernel_st~0 := 3; 2000#L516-2 assume 0 == ~M_E~0;~M_E~0 := 1; 2001#L516-4 assume !(0 == ~T1_E~0); 1746#L521-3 assume 0 == ~T2_E~0;~T2_E~0 := 1; 1747#L526-3 assume 0 == ~T3_E~0;~T3_E~0 := 1; 1921#L531-3 assume 0 == ~T4_E~0;~T4_E~0 := 1; 1922#L536-3 assume 0 == ~E_M~0;~E_M~0 := 1; 1821#L541-3 assume 0 == ~E_1~0;~E_1~0 := 1; 1822#L546-3 assume 0 == ~E_2~0;~E_2~0 := 1; 1872#L551-3 assume 0 == ~E_3~0;~E_3~0 := 1; 1767#L556-3 assume !(0 == ~E_4~0); 1768#L561-3 havoc activate_threads_#t~ret8, activate_threads_#t~ret9, activate_threads_#t~ret10, activate_threads_#t~ret11, activate_threads_#t~ret12, activate_threads_~tmp~1, activate_threads_~tmp___0~0, activate_threads_~tmp___1~0, activate_threads_~tmp___2~0, activate_threads_~tmp___3~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc activate_threads_~tmp___1~0;havoc activate_threads_~tmp___2~0;havoc activate_threads_~tmp___3~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; 2038#L252-18 assume !(1 == ~m_pc~0); 2032#L252-20 is_master_triggered_~__retres1~0 := 0; 1970#L263-6 is_master_triggered_#res := is_master_triggered_~__retres1~0; 1971#L264-6 activate_threads_#t~ret8 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret8;havoc activate_threads_#t~ret8; 1849#L639-18 assume 0 != activate_threads_~tmp~1;~m_st~0 := 0; 1850#L639-20 havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; 1855#L271-18 assume 1 == ~t1_pc~0; 2091#L272-6 assume 1 == ~E_1~0;is_transmit1_triggered_~__retres1~1 := 1; 2053#L282-6 is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; 2054#L283-6 activate_threads_#t~ret9 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret9;havoc activate_threads_#t~ret9; 2010#L647-18 assume !(0 != activate_threads_~tmp___0~0); 2004#L647-20 havoc is_transmit2_triggered_#res;havoc is_transmit2_triggered_~__retres1~2;havoc is_transmit2_triggered_~__retres1~2; 1682#L290-18 assume 1 == ~t2_pc~0; 1683#L291-6 assume 1 == ~E_2~0;is_transmit2_triggered_~__retres1~2 := 1; 1699#L301-6 is_transmit2_triggered_#res := is_transmit2_triggered_~__retres1~2; 1705#L302-6 activate_threads_#t~ret10 := is_transmit2_triggered_#res;activate_threads_~tmp___1~0 := activate_threads_#t~ret10;havoc activate_threads_#t~ret10; 1795#L655-18 assume 0 != activate_threads_~tmp___1~0;~t2_st~0 := 0; 2079#L655-20 havoc is_transmit3_triggered_#res;havoc is_transmit3_triggered_~__retres1~3;havoc is_transmit3_triggered_~__retres1~3; 1827#L309-18 assume !(1 == ~t3_pc~0); 1828#L309-20 is_transmit3_triggered_~__retres1~3 := 0; 1832#L320-6 is_transmit3_triggered_#res := is_transmit3_triggered_~__retres1~3; 1869#L321-6 activate_threads_#t~ret11 := is_transmit3_triggered_#res;activate_threads_~tmp___2~0 := activate_threads_#t~ret11;havoc activate_threads_#t~ret11; 1902#L663-18 assume 0 != activate_threads_~tmp___2~0;~t3_st~0 := 0; 1892#L663-20 havoc is_transmit4_triggered_#res;havoc is_transmit4_triggered_~__retres1~4;havoc is_transmit4_triggered_~__retres1~4; 1893#L328-18 assume 1 == ~t4_pc~0; 1938#L329-6 assume 1 == ~E_4~0;is_transmit4_triggered_~__retres1~4 := 1; 1939#L339-6 is_transmit4_triggered_#res := is_transmit4_triggered_~__retres1~4; 1936#L340-6 activate_threads_#t~ret12 := is_transmit4_triggered_#res;activate_threads_~tmp___3~0 := activate_threads_#t~ret12;havoc activate_threads_#t~ret12; 1937#L671-18 assume 0 != activate_threads_~tmp___3~0;~t4_st~0 := 0; 2023#L671-20 assume 1 == ~M_E~0;~M_E~0 := 2; 1819#L574-3 assume 1 == ~T1_E~0;~T1_E~0 := 2; 1820#L579-3 assume 1 == ~T2_E~0;~T2_E~0 := 2; 1889#L584-3 assume 1 == ~T3_E~0;~T3_E~0 := 2; 1785#L589-3 assume 1 == ~T4_E~0;~T4_E~0 := 2; 1786#L594-3 assume 1 == ~E_M~0;~E_M~0 := 2; 1797#L599-3 assume !(1 == ~E_1~0); 1798#L604-3 assume 1 == ~E_2~0;~E_2~0 := 2; 1729#L609-3 assume 1 == ~E_3~0;~E_3~0 := 2; 1730#L614-3 assume 1 == ~E_4~0;~E_4~0 := 2; 1916#L619-3 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~5;havoc exists_runnable_thread_~__retres1~5; 1907#L388-1 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~5 := 1; 1752#L415-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~5; 2086#L416-1 start_simulation_#t~ret14 := exists_runnable_thread_#res;start_simulation_~tmp~3 := start_simulation_#t~ret14;havoc start_simulation_#t~ret14; 2002#L824 assume !(0 == start_simulation_~tmp~3); 2003#L824-1 havoc stop_simulation_#res;havoc stop_simulation_#t~ret13, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~5;havoc exists_runnable_thread_~__retres1~5; 1911#L388-2 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~5 := 1; 1724#L415-2 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~5; 2013#L416-2 stop_simulation_#t~ret13 := exists_runnable_thread_#res;stop_simulation_~tmp~2 := stop_simulation_#t~ret13;havoc stop_simulation_#t~ret13; 2014#L779 assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; 1695#L786 stop_simulation_#res := stop_simulation_~__retres2~0; 1696#L787 start_simulation_#t~ret15 := stop_simulation_#res;start_simulation_~tmp___0~1 := start_simulation_#t~ret15;havoc start_simulation_#t~ret15; 1787#L837 assume !(0 != start_simulation_~tmp___0~1); 1823#L805-1 [2018-11-23 08:02:21,585 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 08:02:21,585 INFO L82 PathProgramCache]: Analyzing trace with hash 461463167, now seen corresponding path program 1 times [2018-11-23 08:02:21,585 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 08:02:21,585 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 08:02:21,586 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:02:21,586 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 08:02:21,586 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:02:21,592 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 08:02:21,623 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 08:02:21,623 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 08:02:21,623 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-23 08:02:21,623 INFO L799 eck$LassoCheckResult]: stem already infeasible [2018-11-23 08:02:21,624 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 08:02:21,624 INFO L82 PathProgramCache]: Analyzing trace with hash 776086342, now seen corresponding path program 1 times [2018-11-23 08:02:21,624 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 08:02:21,624 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 08:02:21,625 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:02:21,625 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 08:02:21,625 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:02:21,631 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 08:02:21,664 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 08:02:21,664 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 08:02:21,665 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-23 08:02:21,665 INFO L811 eck$LassoCheckResult]: loop already infeasible [2018-11-23 08:02:21,665 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-23 08:02:21,665 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-23 08:02:21,665 INFO L87 Difference]: Start difference. First operand 413 states and 628 transitions. cyclomatic complexity: 216 Second operand 3 states. [2018-11-23 08:02:21,674 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 08:02:21,675 INFO L93 Difference]: Finished difference Result 413 states and 627 transitions. [2018-11-23 08:02:21,676 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-23 08:02:21,676 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 413 states and 627 transitions. [2018-11-23 08:02:21,678 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 350 [2018-11-23 08:02:21,679 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 413 states to 413 states and 627 transitions. [2018-11-23 08:02:21,679 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 413 [2018-11-23 08:02:21,679 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 413 [2018-11-23 08:02:21,680 INFO L73 IsDeterministic]: Start isDeterministic. Operand 413 states and 627 transitions. [2018-11-23 08:02:21,680 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2018-11-23 08:02:21,680 INFO L705 BuchiCegarLoop]: Abstraction has 413 states and 627 transitions. [2018-11-23 08:02:21,681 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 413 states and 627 transitions. [2018-11-23 08:02:21,688 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 413 to 413. [2018-11-23 08:02:21,688 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 413 states. [2018-11-23 08:02:21,690 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 413 states to 413 states and 627 transitions. [2018-11-23 08:02:21,690 INFO L728 BuchiCegarLoop]: Abstraction has 413 states and 627 transitions. [2018-11-23 08:02:21,690 INFO L608 BuchiCegarLoop]: Abstraction has 413 states and 627 transitions. [2018-11-23 08:02:21,690 INFO L442 BuchiCegarLoop]: ======== Iteration 4============ [2018-11-23 08:02:21,690 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 413 states and 627 transitions. [2018-11-23 08:02:21,692 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 350 [2018-11-23 08:02:21,692 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2018-11-23 08:02:21,692 INFO L119 BuchiIsEmpty]: Starting construction of run [2018-11-23 08:02:21,694 INFO L866 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 08:02:21,694 INFO L867 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 08:02:21,694 INFO L794 eck$LassoCheckResult]: Stem: 2859#ULTIMATE.startENTRY ~m_pc~0 := 0;~t1_pc~0 := 0;~t2_pc~0 := 0;~t3_pc~0 := 0;~t4_pc~0 := 0;~m_st~0 := 0;~t1_st~0 := 0;~t2_st~0 := 0;~t3_st~0 := 0;~t4_st~0 := 0;~m_i~0 := 0;~t1_i~0 := 0;~t2_i~0 := 0;~t3_i~0 := 0;~t4_i~0 := 0;~M_E~0 := 2;~T1_E~0 := 2;~T2_E~0 := 2;~T3_E~0 := 2;~T4_E~0 := 2;~E_M~0 := 2;~E_1~0 := 2;~E_2~0 := 2;~E_3~0 := 2;~E_4~0 := 2;~token~0 := 0;~local~0 := 0; 2787#L-1 havoc main_#res;havoc main_~__retres1~6;havoc main_~__retres1~6;~m_i~0 := 1;~t1_i~0 := 1;~t2_i~0 := 1;~t3_i~0 := 1;~t4_i~0 := 1; 2788#L768 havoc start_simulation_#t~ret14, start_simulation_#t~ret15, start_simulation_~kernel_st~0, start_simulation_~tmp~3, start_simulation_~tmp___0~1;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;havoc start_simulation_~tmp___0~1;start_simulation_~kernel_st~0 := 0; 2904#L348 assume 1 == ~m_i~0;~m_st~0 := 0; 2742#L355-1 assume 1 == ~t1_i~0;~t1_st~0 := 0; 2743#L360-1 assume 1 == ~t2_i~0;~t2_st~0 := 0; 2632#L365-1 assume 1 == ~t3_i~0;~t3_st~0 := 0; 2633#L370-1 assume !(1 == ~t4_i~0);~t4_st~0 := 2; 2713#L375-1 assume !(0 == ~M_E~0); 2714#L516-1 assume !(0 == ~T1_E~0); 2566#L521-1 assume !(0 == ~T2_E~0); 2567#L526-1 assume !(0 == ~T3_E~0); 2750#L531-1 assume 0 == ~T4_E~0;~T4_E~0 := 1; 2751#L536-1 assume !(0 == ~E_M~0); 2650#L541-1 assume !(0 == ~E_1~0); 2651#L546-1 assume !(0 == ~E_2~0); 2721#L551-1 assume !(0 == ~E_3~0); 2615#L556-1 assume !(0 == ~E_4~0); 2616#L561-1 havoc activate_threads_#t~ret8, activate_threads_#t~ret9, activate_threads_#t~ret10, activate_threads_#t~ret11, activate_threads_#t~ret12, activate_threads_~tmp~1, activate_threads_~tmp___0~0, activate_threads_~tmp___1~0, activate_threads_~tmp___2~0, activate_threads_~tmp___3~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc activate_threads_~tmp___1~0;havoc activate_threads_~tmp___2~0;havoc activate_threads_~tmp___3~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; 2784#L252 assume 1 == ~m_pc~0; 2785#L253 assume 1 == ~E_M~0;is_master_triggered_~__retres1~0 := 1; 2766#L263 is_master_triggered_#res := is_master_triggered_~__retres1~0; 2786#L264 activate_threads_#t~ret8 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret8;havoc activate_threads_#t~ret8; 2850#L639 assume !(0 != activate_threads_~tmp~1); 2716#L639-2 havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; 2717#L271 assume !(1 == ~t1_pc~0); 2894#L271-2 is_transmit1_triggered_~__retres1~1 := 0; 2896#L282 is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; 2897#L283 activate_threads_#t~ret9 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret9;havoc activate_threads_#t~ret9; 2920#L647 assume !(0 != activate_threads_~tmp___0~0); 2921#L647-2 havoc is_transmit2_triggered_#res;havoc is_transmit2_triggered_~__retres1~2;havoc is_transmit2_triggered_~__retres1~2; 2576#L290 assume 1 == ~t2_pc~0; 2577#L291 assume 1 == ~E_2~0;is_transmit2_triggered_~__retres1~2 := 1; 2565#L301 is_transmit2_triggered_#res := is_transmit2_triggered_~__retres1~2; 2578#L302 activate_threads_#t~ret10 := is_transmit2_triggered_#res;activate_threads_~tmp___1~0 := activate_threads_#t~ret10;havoc activate_threads_#t~ret10; 2621#L655 assume !(0 != activate_threads_~tmp___1~0); 2609#L655-2 havoc is_transmit3_triggered_#res;havoc is_transmit3_triggered_~__retres1~3;havoc is_transmit3_triggered_~__retres1~3; 2610#L309 assume !(1 == ~t3_pc~0); 2638#L309-2 is_transmit3_triggered_~__retres1~3 := 0; 2637#L320 is_transmit3_triggered_#res := is_transmit3_triggered_~__retres1~3; 2634#L321 activate_threads_#t~ret11 := is_transmit3_triggered_#res;activate_threads_~tmp___2~0 := activate_threads_#t~ret11;havoc activate_threads_#t~ret11; 2635#L663 assume !(0 != activate_threads_~tmp___2~0); 2759#L663-2 havoc is_transmit4_triggered_#res;havoc is_transmit4_triggered_~__retres1~4;havoc is_transmit4_triggered_~__retres1~4; 2760#L328 assume 1 == ~t4_pc~0; 2791#L329 assume 1 == ~E_4~0;is_transmit4_triggered_~__retres1~4 := 1; 2792#L339 is_transmit4_triggered_#res := is_transmit4_triggered_~__retres1~4; 2789#L340 activate_threads_#t~ret12 := is_transmit4_triggered_#res;activate_threads_~tmp___3~0 := activate_threads_#t~ret12;havoc activate_threads_#t~ret12; 2790#L671 assume !(0 != activate_threads_~tmp___3~0); 2875#L671-2 assume !(1 == ~M_E~0); 2648#L574-1 assume 1 == ~T1_E~0;~T1_E~0 := 2; 2649#L579-1 assume !(1 == ~T2_E~0); 2718#L584-1 assume !(1 == ~T3_E~0); 2611#L589-1 assume !(1 == ~T4_E~0); 2612#L594-1 assume !(1 == ~E_M~0); 2520#L599-1 assume !(1 == ~E_1~0); 2521#L604-1 assume !(1 == ~E_2~0); 2591#L609-1 assume !(1 == ~E_3~0); 2592#L614-1 assume 1 == ~E_4~0;~E_4~0 := 2; 2656#L805-1 [2018-11-23 08:02:21,694 INFO L796 eck$LassoCheckResult]: Loop: 2656#L805-1 assume !false; 2657#L806 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret2, eval_#t~nondet3, eval_~tmp_ndt_1~0, eval_#t~nondet4, eval_~tmp_ndt_2~0, eval_#t~nondet5, eval_~tmp_ndt_3~0, eval_#t~nondet6, eval_~tmp_ndt_4~0, eval_#t~nondet7, eval_~tmp_ndt_5~0, eval_~tmp~0;havoc eval_~tmp~0; 2571#L491 assume !false; 2910#L426 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~5;havoc exists_runnable_thread_~__retres1~5; 2736#L388 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~5 := 1; 2582#L415 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~5; 2918#L416 eval_#t~ret2 := exists_runnable_thread_#res;eval_~tmp~0 := eval_#t~ret2;havoc eval_#t~ret2; 2708#L430 assume !(0 != eval_~tmp~0); 2710#L506 start_simulation_~kernel_st~0 := 2; 2877#L348-1 start_simulation_~kernel_st~0 := 3; 2833#L516-2 assume 0 == ~M_E~0;~M_E~0 := 1; 2834#L516-4 assume !(0 == ~T1_E~0); 2579#L521-3 assume 0 == ~T2_E~0;~T2_E~0 := 1; 2580#L526-3 assume 0 == ~T3_E~0;~T3_E~0 := 1; 2754#L531-3 assume 0 == ~T4_E~0;~T4_E~0 := 1; 2755#L536-3 assume 0 == ~E_M~0;~E_M~0 := 1; 2654#L541-3 assume 0 == ~E_1~0;~E_1~0 := 1; 2655#L546-3 assume 0 == ~E_2~0;~E_2~0 := 1; 2705#L551-3 assume 0 == ~E_3~0;~E_3~0 := 1; 2600#L556-3 assume !(0 == ~E_4~0); 2601#L561-3 havoc activate_threads_#t~ret8, activate_threads_#t~ret9, activate_threads_#t~ret10, activate_threads_#t~ret11, activate_threads_#t~ret12, activate_threads_~tmp~1, activate_threads_~tmp___0~0, activate_threads_~tmp___1~0, activate_threads_~tmp___2~0, activate_threads_~tmp___3~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc activate_threads_~tmp___1~0;havoc activate_threads_~tmp___2~0;havoc activate_threads_~tmp___3~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; 2871#L252-18 assume 1 == ~m_pc~0; 2864#L253-6 assume 1 == ~E_M~0;is_master_triggered_~__retres1~0 := 1; 2803#L263-6 is_master_triggered_#res := is_master_triggered_~__retres1~0; 2804#L264-6 activate_threads_#t~ret8 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret8;havoc activate_threads_#t~ret8; 2682#L639-18 assume 0 != activate_threads_~tmp~1;~m_st~0 := 0; 2683#L639-20 havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; 2688#L271-18 assume 1 == ~t1_pc~0; 2924#L272-6 assume 1 == ~E_1~0;is_transmit1_triggered_~__retres1~1 := 1; 2886#L282-6 is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; 2887#L283-6 activate_threads_#t~ret9 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret9;havoc activate_threads_#t~ret9; 2843#L647-18 assume !(0 != activate_threads_~tmp___0~0); 2837#L647-20 havoc is_transmit2_triggered_#res;havoc is_transmit2_triggered_~__retres1~2;havoc is_transmit2_triggered_~__retres1~2; 2515#L290-18 assume 1 == ~t2_pc~0; 2516#L291-6 assume 1 == ~E_2~0;is_transmit2_triggered_~__retres1~2 := 1; 2532#L301-6 is_transmit2_triggered_#res := is_transmit2_triggered_~__retres1~2; 2538#L302-6 activate_threads_#t~ret10 := is_transmit2_triggered_#res;activate_threads_~tmp___1~0 := activate_threads_#t~ret10;havoc activate_threads_#t~ret10; 2628#L655-18 assume 0 != activate_threads_~tmp___1~0;~t2_st~0 := 0; 2912#L655-20 havoc is_transmit3_triggered_#res;havoc is_transmit3_triggered_~__retres1~3;havoc is_transmit3_triggered_~__retres1~3; 2660#L309-18 assume !(1 == ~t3_pc~0); 2661#L309-20 is_transmit3_triggered_~__retres1~3 := 0; 2665#L320-6 is_transmit3_triggered_#res := is_transmit3_triggered_~__retres1~3; 2702#L321-6 activate_threads_#t~ret11 := is_transmit3_triggered_#res;activate_threads_~tmp___2~0 := activate_threads_#t~ret11;havoc activate_threads_#t~ret11; 2735#L663-18 assume 0 != activate_threads_~tmp___2~0;~t3_st~0 := 0; 2725#L663-20 havoc is_transmit4_triggered_#res;havoc is_transmit4_triggered_~__retres1~4;havoc is_transmit4_triggered_~__retres1~4; 2726#L328-18 assume 1 == ~t4_pc~0; 2771#L329-6 assume 1 == ~E_4~0;is_transmit4_triggered_~__retres1~4 := 1; 2772#L339-6 is_transmit4_triggered_#res := is_transmit4_triggered_~__retres1~4; 2769#L340-6 activate_threads_#t~ret12 := is_transmit4_triggered_#res;activate_threads_~tmp___3~0 := activate_threads_#t~ret12;havoc activate_threads_#t~ret12; 2770#L671-18 assume 0 != activate_threads_~tmp___3~0;~t4_st~0 := 0; 2856#L671-20 assume 1 == ~M_E~0;~M_E~0 := 2; 2652#L574-3 assume 1 == ~T1_E~0;~T1_E~0 := 2; 2653#L579-3 assume 1 == ~T2_E~0;~T2_E~0 := 2; 2722#L584-3 assume 1 == ~T3_E~0;~T3_E~0 := 2; 2618#L589-3 assume 1 == ~T4_E~0;~T4_E~0 := 2; 2619#L594-3 assume 1 == ~E_M~0;~E_M~0 := 2; 2630#L599-3 assume !(1 == ~E_1~0); 2631#L604-3 assume 1 == ~E_2~0;~E_2~0 := 2; 2562#L609-3 assume 1 == ~E_3~0;~E_3~0 := 2; 2563#L614-3 assume 1 == ~E_4~0;~E_4~0 := 2; 2749#L619-3 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~5;havoc exists_runnable_thread_~__retres1~5; 2740#L388-1 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~5 := 1; 2585#L415-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~5; 2919#L416-1 start_simulation_#t~ret14 := exists_runnable_thread_#res;start_simulation_~tmp~3 := start_simulation_#t~ret14;havoc start_simulation_#t~ret14; 2835#L824 assume !(0 == start_simulation_~tmp~3); 2836#L824-1 havoc stop_simulation_#res;havoc stop_simulation_#t~ret13, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~5;havoc exists_runnable_thread_~__retres1~5; 2744#L388-2 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~5 := 1; 2557#L415-2 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~5; 2846#L416-2 stop_simulation_#t~ret13 := exists_runnable_thread_#res;stop_simulation_~tmp~2 := stop_simulation_#t~ret13;havoc stop_simulation_#t~ret13; 2847#L779 assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; 2528#L786 stop_simulation_#res := stop_simulation_~__retres2~0; 2529#L787 start_simulation_#t~ret15 := stop_simulation_#res;start_simulation_~tmp___0~1 := start_simulation_#t~ret15;havoc start_simulation_#t~ret15; 2620#L837 assume !(0 != start_simulation_~tmp___0~1); 2656#L805-1 [2018-11-23 08:02:21,697 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 08:02:21,697 INFO L82 PathProgramCache]: Analyzing trace with hash -1076876863, now seen corresponding path program 1 times [2018-11-23 08:02:21,697 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 08:02:21,697 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 08:02:21,698 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:02:21,698 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 08:02:21,699 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:02:21,704 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 08:02:21,724 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 08:02:21,724 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 08:02:21,725 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-23 08:02:21,725 INFO L799 eck$LassoCheckResult]: stem already infeasible [2018-11-23 08:02:21,725 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 08:02:21,725 INFO L82 PathProgramCache]: Analyzing trace with hash 1477654567, now seen corresponding path program 2 times [2018-11-23 08:02:21,725 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 08:02:21,725 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 08:02:21,726 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:02:21,726 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 08:02:21,726 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:02:21,733 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 08:02:21,772 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 08:02:21,772 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 08:02:21,772 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-23 08:02:21,773 INFO L811 eck$LassoCheckResult]: loop already infeasible [2018-11-23 08:02:21,773 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-23 08:02:21,773 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-23 08:02:21,773 INFO L87 Difference]: Start difference. First operand 413 states and 627 transitions. cyclomatic complexity: 215 Second operand 3 states. [2018-11-23 08:02:21,781 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 08:02:21,782 INFO L93 Difference]: Finished difference Result 413 states and 626 transitions. [2018-11-23 08:02:21,782 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-23 08:02:21,783 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 413 states and 626 transitions. [2018-11-23 08:02:21,785 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 350 [2018-11-23 08:02:21,787 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 413 states to 413 states and 626 transitions. [2018-11-23 08:02:21,787 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 413 [2018-11-23 08:02:21,788 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 413 [2018-11-23 08:02:21,788 INFO L73 IsDeterministic]: Start isDeterministic. Operand 413 states and 626 transitions. [2018-11-23 08:02:21,789 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2018-11-23 08:02:21,789 INFO L705 BuchiCegarLoop]: Abstraction has 413 states and 626 transitions. [2018-11-23 08:02:21,789 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 413 states and 626 transitions. [2018-11-23 08:02:21,795 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 413 to 413. [2018-11-23 08:02:21,795 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 413 states. [2018-11-23 08:02:21,796 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 413 states to 413 states and 626 transitions. [2018-11-23 08:02:21,796 INFO L728 BuchiCegarLoop]: Abstraction has 413 states and 626 transitions. [2018-11-23 08:02:21,796 INFO L608 BuchiCegarLoop]: Abstraction has 413 states and 626 transitions. [2018-11-23 08:02:21,797 INFO L442 BuchiCegarLoop]: ======== Iteration 5============ [2018-11-23 08:02:21,797 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 413 states and 626 transitions. [2018-11-23 08:02:21,798 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 350 [2018-11-23 08:02:21,799 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2018-11-23 08:02:21,799 INFO L119 BuchiIsEmpty]: Starting construction of run [2018-11-23 08:02:21,800 INFO L866 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 08:02:21,800 INFO L867 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 08:02:21,800 INFO L794 eck$LassoCheckResult]: Stem: 3693#ULTIMATE.startENTRY ~m_pc~0 := 0;~t1_pc~0 := 0;~t2_pc~0 := 0;~t3_pc~0 := 0;~t4_pc~0 := 0;~m_st~0 := 0;~t1_st~0 := 0;~t2_st~0 := 0;~t3_st~0 := 0;~t4_st~0 := 0;~m_i~0 := 0;~t1_i~0 := 0;~t2_i~0 := 0;~t3_i~0 := 0;~t4_i~0 := 0;~M_E~0 := 2;~T1_E~0 := 2;~T2_E~0 := 2;~T3_E~0 := 2;~T4_E~0 := 2;~E_M~0 := 2;~E_1~0 := 2;~E_2~0 := 2;~E_3~0 := 2;~E_4~0 := 2;~token~0 := 0;~local~0 := 0; 3620#L-1 havoc main_#res;havoc main_~__retres1~6;havoc main_~__retres1~6;~m_i~0 := 1;~t1_i~0 := 1;~t2_i~0 := 1;~t3_i~0 := 1;~t4_i~0 := 1; 3621#L768 havoc start_simulation_#t~ret14, start_simulation_#t~ret15, start_simulation_~kernel_st~0, start_simulation_~tmp~3, start_simulation_~tmp___0~1;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;havoc start_simulation_~tmp___0~1;start_simulation_~kernel_st~0 := 0; 3738#L348 assume 1 == ~m_i~0;~m_st~0 := 0; 3577#L355-1 assume 1 == ~t1_i~0;~t1_st~0 := 0; 3578#L360-1 assume 1 == ~t2_i~0;~t2_st~0 := 0; 3465#L365-1 assume 1 == ~t3_i~0;~t3_st~0 := 0; 3466#L370-1 assume 1 == ~t4_i~0;~t4_st~0 := 0; 3547#L375-1 assume !(0 == ~M_E~0); 3548#L516-1 assume !(0 == ~T1_E~0); 3400#L521-1 assume !(0 == ~T2_E~0); 3401#L526-1 assume !(0 == ~T3_E~0); 3584#L531-1 assume 0 == ~T4_E~0;~T4_E~0 := 1; 3585#L536-1 assume !(0 == ~E_M~0); 3483#L541-1 assume !(0 == ~E_1~0); 3484#L546-1 assume !(0 == ~E_2~0); 3554#L551-1 assume !(0 == ~E_3~0); 3448#L556-1 assume !(0 == ~E_4~0); 3449#L561-1 havoc activate_threads_#t~ret8, activate_threads_#t~ret9, activate_threads_#t~ret10, activate_threads_#t~ret11, activate_threads_#t~ret12, activate_threads_~tmp~1, activate_threads_~tmp___0~0, activate_threads_~tmp___1~0, activate_threads_~tmp___2~0, activate_threads_~tmp___3~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc activate_threads_~tmp___1~0;havoc activate_threads_~tmp___2~0;havoc activate_threads_~tmp___3~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; 3617#L252 assume 1 == ~m_pc~0; 3618#L253 assume 1 == ~E_M~0;is_master_triggered_~__retres1~0 := 1; 3599#L263 is_master_triggered_#res := is_master_triggered_~__retres1~0; 3619#L264 activate_threads_#t~ret8 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret8;havoc activate_threads_#t~ret8; 3683#L639 assume !(0 != activate_threads_~tmp~1); 3549#L639-2 havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; 3550#L271 assume !(1 == ~t1_pc~0); 3727#L271-2 is_transmit1_triggered_~__retres1~1 := 0; 3729#L282 is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; 3730#L283 activate_threads_#t~ret9 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret9;havoc activate_threads_#t~ret9; 3753#L647 assume !(0 != activate_threads_~tmp___0~0); 3754#L647-2 havoc is_transmit2_triggered_#res;havoc is_transmit2_triggered_~__retres1~2;havoc is_transmit2_triggered_~__retres1~2; 3409#L290 assume 1 == ~t2_pc~0; 3410#L291 assume 1 == ~E_2~0;is_transmit2_triggered_~__retres1~2 := 1; 3398#L301 is_transmit2_triggered_#res := is_transmit2_triggered_~__retres1~2; 3411#L302 activate_threads_#t~ret10 := is_transmit2_triggered_#res;activate_threads_~tmp___1~0 := activate_threads_#t~ret10;havoc activate_threads_#t~ret10; 3454#L655 assume !(0 != activate_threads_~tmp___1~0); 3442#L655-2 havoc is_transmit3_triggered_#res;havoc is_transmit3_triggered_~__retres1~3;havoc is_transmit3_triggered_~__retres1~3; 3443#L309 assume !(1 == ~t3_pc~0); 3471#L309-2 is_transmit3_triggered_~__retres1~3 := 0; 3470#L320 is_transmit3_triggered_#res := is_transmit3_triggered_~__retres1~3; 3467#L321 activate_threads_#t~ret11 := is_transmit3_triggered_#res;activate_threads_~tmp___2~0 := activate_threads_#t~ret11;havoc activate_threads_#t~ret11; 3468#L663 assume !(0 != activate_threads_~tmp___2~0); 3592#L663-2 havoc is_transmit4_triggered_#res;havoc is_transmit4_triggered_~__retres1~4;havoc is_transmit4_triggered_~__retres1~4; 3593#L328 assume 1 == ~t4_pc~0; 3624#L329 assume 1 == ~E_4~0;is_transmit4_triggered_~__retres1~4 := 1; 3625#L339 is_transmit4_triggered_#res := is_transmit4_triggered_~__retres1~4; 3622#L340 activate_threads_#t~ret12 := is_transmit4_triggered_#res;activate_threads_~tmp___3~0 := activate_threads_#t~ret12;havoc activate_threads_#t~ret12; 3623#L671 assume !(0 != activate_threads_~tmp___3~0); 3708#L671-2 assume !(1 == ~M_E~0); 3481#L574-1 assume 1 == ~T1_E~0;~T1_E~0 := 2; 3482#L579-1 assume !(1 == ~T2_E~0); 3551#L584-1 assume !(1 == ~T3_E~0); 3446#L589-1 assume !(1 == ~T4_E~0); 3447#L594-1 assume !(1 == ~E_M~0); 3353#L599-1 assume !(1 == ~E_1~0); 3354#L604-1 assume !(1 == ~E_2~0); 3424#L609-1 assume !(1 == ~E_3~0); 3425#L614-1 assume 1 == ~E_4~0;~E_4~0 := 2; 3491#L805-1 [2018-11-23 08:02:21,800 INFO L796 eck$LassoCheckResult]: Loop: 3491#L805-1 assume !false; 3492#L806 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret2, eval_#t~nondet3, eval_~tmp_ndt_1~0, eval_#t~nondet4, eval_~tmp_ndt_2~0, eval_#t~nondet5, eval_~tmp_ndt_3~0, eval_#t~nondet6, eval_~tmp_ndt_4~0, eval_#t~nondet7, eval_~tmp_ndt_5~0, eval_~tmp~0;havoc eval_~tmp~0; 3404#L491 assume !false; 3743#L426 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~5;havoc exists_runnable_thread_~__retres1~5; 3569#L388 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~5 := 1; 3415#L415 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~5; 3751#L416 eval_#t~ret2 := exists_runnable_thread_#res;eval_~tmp~0 := eval_#t~ret2;havoc eval_#t~ret2; 3541#L430 assume !(0 != eval_~tmp~0); 3543#L506 start_simulation_~kernel_st~0 := 2; 3710#L348-1 start_simulation_~kernel_st~0 := 3; 3666#L516-2 assume 0 == ~M_E~0;~M_E~0 := 1; 3667#L516-4 assume !(0 == ~T1_E~0); 3412#L521-3 assume 0 == ~T2_E~0;~T2_E~0 := 1; 3413#L526-3 assume 0 == ~T3_E~0;~T3_E~0 := 1; 3587#L531-3 assume 0 == ~T4_E~0;~T4_E~0 := 1; 3588#L536-3 assume 0 == ~E_M~0;~E_M~0 := 1; 3487#L541-3 assume 0 == ~E_1~0;~E_1~0 := 1; 3488#L546-3 assume 0 == ~E_2~0;~E_2~0 := 1; 3537#L551-3 assume 0 == ~E_3~0;~E_3~0 := 1; 3433#L556-3 assume !(0 == ~E_4~0); 3434#L561-3 havoc activate_threads_#t~ret8, activate_threads_#t~ret9, activate_threads_#t~ret10, activate_threads_#t~ret11, activate_threads_#t~ret12, activate_threads_~tmp~1, activate_threads_~tmp___0~0, activate_threads_~tmp___1~0, activate_threads_~tmp___2~0, activate_threads_~tmp___3~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc activate_threads_~tmp___1~0;havoc activate_threads_~tmp___2~0;havoc activate_threads_~tmp___3~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; 3704#L252-18 assume 1 == ~m_pc~0; 3696#L253-6 assume 1 == ~E_M~0;is_master_triggered_~__retres1~0 := 1; 3636#L263-6 is_master_triggered_#res := is_master_triggered_~__retres1~0; 3637#L264-6 activate_threads_#t~ret8 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret8;havoc activate_threads_#t~ret8; 3515#L639-18 assume 0 != activate_threads_~tmp~1;~m_st~0 := 0; 3516#L639-20 havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; 3521#L271-18 assume 1 == ~t1_pc~0; 3757#L272-6 assume 1 == ~E_1~0;is_transmit1_triggered_~__retres1~1 := 1; 3719#L282-6 is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; 3720#L283-6 activate_threads_#t~ret9 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret9;havoc activate_threads_#t~ret9; 3676#L647-18 assume !(0 != activate_threads_~tmp___0~0); 3670#L647-20 havoc is_transmit2_triggered_#res;havoc is_transmit2_triggered_~__retres1~2;havoc is_transmit2_triggered_~__retres1~2; 3348#L290-18 assume 1 == ~t2_pc~0; 3349#L291-6 assume 1 == ~E_2~0;is_transmit2_triggered_~__retres1~2 := 1; 3365#L301-6 is_transmit2_triggered_#res := is_transmit2_triggered_~__retres1~2; 3371#L302-6 activate_threads_#t~ret10 := is_transmit2_triggered_#res;activate_threads_~tmp___1~0 := activate_threads_#t~ret10;havoc activate_threads_#t~ret10; 3461#L655-18 assume 0 != activate_threads_~tmp___1~0;~t2_st~0 := 0; 3745#L655-20 havoc is_transmit3_triggered_#res;havoc is_transmit3_triggered_~__retres1~3;havoc is_transmit3_triggered_~__retres1~3; 3493#L309-18 assume !(1 == ~t3_pc~0); 3494#L309-20 is_transmit3_triggered_~__retres1~3 := 0; 3498#L320-6 is_transmit3_triggered_#res := is_transmit3_triggered_~__retres1~3; 3534#L321-6 activate_threads_#t~ret11 := is_transmit3_triggered_#res;activate_threads_~tmp___2~0 := activate_threads_#t~ret11;havoc activate_threads_#t~ret11; 3568#L663-18 assume 0 != activate_threads_~tmp___2~0;~t3_st~0 := 0; 3558#L663-20 havoc is_transmit4_triggered_#res;havoc is_transmit4_triggered_~__retres1~4;havoc is_transmit4_triggered_~__retres1~4; 3559#L328-18 assume 1 == ~t4_pc~0; 3604#L329-6 assume 1 == ~E_4~0;is_transmit4_triggered_~__retres1~4 := 1; 3605#L339-6 is_transmit4_triggered_#res := is_transmit4_triggered_~__retres1~4; 3600#L340-6 activate_threads_#t~ret12 := is_transmit4_triggered_#res;activate_threads_~tmp___3~0 := activate_threads_#t~ret12;havoc activate_threads_#t~ret12; 3601#L671-18 assume 0 != activate_threads_~tmp___3~0;~t4_st~0 := 0; 3689#L671-20 assume 1 == ~M_E~0;~M_E~0 := 2; 3485#L574-3 assume 1 == ~T1_E~0;~T1_E~0 := 2; 3486#L579-3 assume 1 == ~T2_E~0;~T2_E~0 := 2; 3555#L584-3 assume 1 == ~T3_E~0;~T3_E~0 := 2; 3451#L589-3 assume 1 == ~T4_E~0;~T4_E~0 := 2; 3452#L594-3 assume 1 == ~E_M~0;~E_M~0 := 2; 3463#L599-3 assume !(1 == ~E_1~0); 3464#L604-3 assume 1 == ~E_2~0;~E_2~0 := 2; 3395#L609-3 assume 1 == ~E_3~0;~E_3~0 := 2; 3396#L614-3 assume 1 == ~E_4~0;~E_4~0 := 2; 3582#L619-3 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~5;havoc exists_runnable_thread_~__retres1~5; 3573#L388-1 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~5 := 1; 3418#L415-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~5; 3752#L416-1 start_simulation_#t~ret14 := exists_runnable_thread_#res;start_simulation_~tmp~3 := start_simulation_#t~ret14;havoc start_simulation_#t~ret14; 3668#L824 assume !(0 == start_simulation_~tmp~3); 3669#L824-1 havoc stop_simulation_#res;havoc stop_simulation_#t~ret13, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~5;havoc exists_runnable_thread_~__retres1~5; 3575#L388-2 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~5 := 1; 3390#L415-2 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~5; 3679#L416-2 stop_simulation_#t~ret13 := exists_runnable_thread_#res;stop_simulation_~tmp~2 := stop_simulation_#t~ret13;havoc stop_simulation_#t~ret13; 3680#L779 assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; 3361#L786 stop_simulation_#res := stop_simulation_~__retres2~0; 3362#L787 start_simulation_#t~ret15 := stop_simulation_#res;start_simulation_~tmp___0~1 := start_simulation_#t~ret15;havoc start_simulation_#t~ret15; 3453#L837 assume !(0 != start_simulation_~tmp___0~1); 3491#L805-1 [2018-11-23 08:02:21,801 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 08:02:21,801 INFO L82 PathProgramCache]: Analyzing trace with hash 951709247, now seen corresponding path program 1 times [2018-11-23 08:02:21,801 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 08:02:21,801 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 08:02:21,802 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:02:21,802 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-23 08:02:21,802 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:02:21,807 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 08:02:21,833 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 08:02:21,833 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 08:02:21,833 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-11-23 08:02:21,833 INFO L799 eck$LassoCheckResult]: stem already infeasible [2018-11-23 08:02:21,833 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 08:02:21,834 INFO L82 PathProgramCache]: Analyzing trace with hash 1477654567, now seen corresponding path program 3 times [2018-11-23 08:02:21,834 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 08:02:21,834 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 08:02:21,834 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:02:21,835 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 08:02:21,835 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:02:21,841 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 08:02:21,886 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 08:02:21,886 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 08:02:21,886 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-23 08:02:21,887 INFO L811 eck$LassoCheckResult]: loop already infeasible [2018-11-23 08:02:21,887 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-23 08:02:21,887 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-23 08:02:21,887 INFO L87 Difference]: Start difference. First operand 413 states and 626 transitions. cyclomatic complexity: 214 Second operand 3 states. [2018-11-23 08:02:21,915 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 08:02:21,915 INFO L93 Difference]: Finished difference Result 413 states and 621 transitions. [2018-11-23 08:02:21,916 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-23 08:02:21,917 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 413 states and 621 transitions. [2018-11-23 08:02:21,919 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 350 [2018-11-23 08:02:21,921 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 413 states to 413 states and 621 transitions. [2018-11-23 08:02:21,922 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 413 [2018-11-23 08:02:21,922 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 413 [2018-11-23 08:02:21,922 INFO L73 IsDeterministic]: Start isDeterministic. Operand 413 states and 621 transitions. [2018-11-23 08:02:21,923 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2018-11-23 08:02:21,923 INFO L705 BuchiCegarLoop]: Abstraction has 413 states and 621 transitions. [2018-11-23 08:02:21,924 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 413 states and 621 transitions. [2018-11-23 08:02:21,929 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 413 to 413. [2018-11-23 08:02:21,929 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 413 states. [2018-11-23 08:02:21,930 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 413 states to 413 states and 621 transitions. [2018-11-23 08:02:21,930 INFO L728 BuchiCegarLoop]: Abstraction has 413 states and 621 transitions. [2018-11-23 08:02:21,930 INFO L608 BuchiCegarLoop]: Abstraction has 413 states and 621 transitions. [2018-11-23 08:02:21,930 INFO L442 BuchiCegarLoop]: ======== Iteration 6============ [2018-11-23 08:02:21,931 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 413 states and 621 transitions. [2018-11-23 08:02:21,932 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 350 [2018-11-23 08:02:21,933 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2018-11-23 08:02:21,933 INFO L119 BuchiIsEmpty]: Starting construction of run [2018-11-23 08:02:21,934 INFO L866 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 08:02:21,934 INFO L867 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 08:02:21,934 INFO L794 eck$LassoCheckResult]: Stem: 4525#ULTIMATE.startENTRY ~m_pc~0 := 0;~t1_pc~0 := 0;~t2_pc~0 := 0;~t3_pc~0 := 0;~t4_pc~0 := 0;~m_st~0 := 0;~t1_st~0 := 0;~t2_st~0 := 0;~t3_st~0 := 0;~t4_st~0 := 0;~m_i~0 := 0;~t1_i~0 := 0;~t2_i~0 := 0;~t3_i~0 := 0;~t4_i~0 := 0;~M_E~0 := 2;~T1_E~0 := 2;~T2_E~0 := 2;~T3_E~0 := 2;~T4_E~0 := 2;~E_M~0 := 2;~E_1~0 := 2;~E_2~0 := 2;~E_3~0 := 2;~E_4~0 := 2;~token~0 := 0;~local~0 := 0; 4453#L-1 havoc main_#res;havoc main_~__retres1~6;havoc main_~__retres1~6;~m_i~0 := 1;~t1_i~0 := 1;~t2_i~0 := 1;~t3_i~0 := 1;~t4_i~0 := 1; 4454#L768 havoc start_simulation_#t~ret14, start_simulation_#t~ret15, start_simulation_~kernel_st~0, start_simulation_~tmp~3, start_simulation_~tmp___0~1;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;havoc start_simulation_~tmp___0~1;start_simulation_~kernel_st~0 := 0; 4570#L348 assume 1 == ~m_i~0;~m_st~0 := 0; 4410#L355-1 assume 1 == ~t1_i~0;~t1_st~0 := 0; 4411#L360-1 assume 1 == ~t2_i~0;~t2_st~0 := 0; 4298#L365-1 assume 1 == ~t3_i~0;~t3_st~0 := 0; 4299#L370-1 assume 1 == ~t4_i~0;~t4_st~0 := 0; 4379#L375-1 assume !(0 == ~M_E~0); 4380#L516-1 assume !(0 == ~T1_E~0); 4232#L521-1 assume !(0 == ~T2_E~0); 4233#L526-1 assume !(0 == ~T3_E~0); 4416#L531-1 assume !(0 == ~T4_E~0); 4417#L536-1 assume !(0 == ~E_M~0); 4316#L541-1 assume !(0 == ~E_1~0); 4317#L546-1 assume !(0 == ~E_2~0); 4387#L551-1 assume !(0 == ~E_3~0); 4281#L556-1 assume !(0 == ~E_4~0); 4282#L561-1 havoc activate_threads_#t~ret8, activate_threads_#t~ret9, activate_threads_#t~ret10, activate_threads_#t~ret11, activate_threads_#t~ret12, activate_threads_~tmp~1, activate_threads_~tmp___0~0, activate_threads_~tmp___1~0, activate_threads_~tmp___2~0, activate_threads_~tmp___3~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc activate_threads_~tmp___1~0;havoc activate_threads_~tmp___2~0;havoc activate_threads_~tmp___3~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; 4450#L252 assume 1 == ~m_pc~0; 4451#L253 assume 1 == ~E_M~0;is_master_triggered_~__retres1~0 := 1; 4432#L263 is_master_triggered_#res := is_master_triggered_~__retres1~0; 4452#L264 activate_threads_#t~ret8 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret8;havoc activate_threads_#t~ret8; 4516#L639 assume !(0 != activate_threads_~tmp~1); 4382#L639-2 havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; 4383#L271 assume !(1 == ~t1_pc~0); 4560#L271-2 is_transmit1_triggered_~__retres1~1 := 0; 4562#L282 is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; 4563#L283 activate_threads_#t~ret9 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret9;havoc activate_threads_#t~ret9; 4586#L647 assume !(0 != activate_threads_~tmp___0~0); 4587#L647-2 havoc is_transmit2_triggered_#res;havoc is_transmit2_triggered_~__retres1~2;havoc is_transmit2_triggered_~__retres1~2; 4242#L290 assume 1 == ~t2_pc~0; 4243#L291 assume 1 == ~E_2~0;is_transmit2_triggered_~__retres1~2 := 1; 4231#L301 is_transmit2_triggered_#res := is_transmit2_triggered_~__retres1~2; 4244#L302 activate_threads_#t~ret10 := is_transmit2_triggered_#res;activate_threads_~tmp___1~0 := activate_threads_#t~ret10;havoc activate_threads_#t~ret10; 4287#L655 assume !(0 != activate_threads_~tmp___1~0); 4275#L655-2 havoc is_transmit3_triggered_#res;havoc is_transmit3_triggered_~__retres1~3;havoc is_transmit3_triggered_~__retres1~3; 4276#L309 assume !(1 == ~t3_pc~0); 4304#L309-2 is_transmit3_triggered_~__retres1~3 := 0; 4303#L320 is_transmit3_triggered_#res := is_transmit3_triggered_~__retres1~3; 4300#L321 activate_threads_#t~ret11 := is_transmit3_triggered_#res;activate_threads_~tmp___2~0 := activate_threads_#t~ret11;havoc activate_threads_#t~ret11; 4301#L663 assume !(0 != activate_threads_~tmp___2~0); 4425#L663-2 havoc is_transmit4_triggered_#res;havoc is_transmit4_triggered_~__retres1~4;havoc is_transmit4_triggered_~__retres1~4; 4426#L328 assume 1 == ~t4_pc~0; 4457#L329 assume 1 == ~E_4~0;is_transmit4_triggered_~__retres1~4 := 1; 4458#L339 is_transmit4_triggered_#res := is_transmit4_triggered_~__retres1~4; 4455#L340 activate_threads_#t~ret12 := is_transmit4_triggered_#res;activate_threads_~tmp___3~0 := activate_threads_#t~ret12;havoc activate_threads_#t~ret12; 4456#L671 assume !(0 != activate_threads_~tmp___3~0); 4541#L671-2 assume !(1 == ~M_E~0); 4314#L574-1 assume 1 == ~T1_E~0;~T1_E~0 := 2; 4315#L579-1 assume !(1 == ~T2_E~0); 4384#L584-1 assume !(1 == ~T3_E~0); 4277#L589-1 assume !(1 == ~T4_E~0); 4278#L594-1 assume !(1 == ~E_M~0); 4186#L599-1 assume !(1 == ~E_1~0); 4187#L604-1 assume !(1 == ~E_2~0); 4257#L609-1 assume !(1 == ~E_3~0); 4258#L614-1 assume 1 == ~E_4~0;~E_4~0 := 2; 4322#L805-1 [2018-11-23 08:02:21,934 INFO L796 eck$LassoCheckResult]: Loop: 4322#L805-1 assume !false; 4323#L806 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret2, eval_#t~nondet3, eval_~tmp_ndt_1~0, eval_#t~nondet4, eval_~tmp_ndt_2~0, eval_#t~nondet5, eval_~tmp_ndt_3~0, eval_#t~nondet6, eval_~tmp_ndt_4~0, eval_#t~nondet7, eval_~tmp_ndt_5~0, eval_~tmp~0;havoc eval_~tmp~0; 4237#L491 assume !false; 4576#L426 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~5;havoc exists_runnable_thread_~__retres1~5; 4402#L388 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~5 := 1; 4248#L415 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~5; 4584#L416 eval_#t~ret2 := exists_runnable_thread_#res;eval_~tmp~0 := eval_#t~ret2;havoc eval_#t~ret2; 4374#L430 assume !(0 != eval_~tmp~0); 4376#L506 start_simulation_~kernel_st~0 := 2; 4543#L348-1 start_simulation_~kernel_st~0 := 3; 4499#L516-2 assume 0 == ~M_E~0;~M_E~0 := 1; 4500#L516-4 assume !(0 == ~T1_E~0); 4245#L521-3 assume 0 == ~T2_E~0;~T2_E~0 := 1; 4246#L526-3 assume 0 == ~T3_E~0;~T3_E~0 := 1; 4420#L531-3 assume !(0 == ~T4_E~0); 4421#L536-3 assume 0 == ~E_M~0;~E_M~0 := 1; 4320#L541-3 assume 0 == ~E_1~0;~E_1~0 := 1; 4321#L546-3 assume 0 == ~E_2~0;~E_2~0 := 1; 4371#L551-3 assume 0 == ~E_3~0;~E_3~0 := 1; 4266#L556-3 assume !(0 == ~E_4~0); 4267#L561-3 havoc activate_threads_#t~ret8, activate_threads_#t~ret9, activate_threads_#t~ret10, activate_threads_#t~ret11, activate_threads_#t~ret12, activate_threads_~tmp~1, activate_threads_~tmp___0~0, activate_threads_~tmp___1~0, activate_threads_~tmp___2~0, activate_threads_~tmp___3~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc activate_threads_~tmp___1~0;havoc activate_threads_~tmp___2~0;havoc activate_threads_~tmp___3~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; 4537#L252-18 assume 1 == ~m_pc~0; 4530#L253-6 assume 1 == ~E_M~0;is_master_triggered_~__retres1~0 := 1; 4469#L263-6 is_master_triggered_#res := is_master_triggered_~__retres1~0; 4470#L264-6 activate_threads_#t~ret8 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret8;havoc activate_threads_#t~ret8; 4348#L639-18 assume 0 != activate_threads_~tmp~1;~m_st~0 := 0; 4349#L639-20 havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; 4354#L271-18 assume 1 == ~t1_pc~0; 4590#L272-6 assume 1 == ~E_1~0;is_transmit1_triggered_~__retres1~1 := 1; 4552#L282-6 is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; 4553#L283-6 activate_threads_#t~ret9 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret9;havoc activate_threads_#t~ret9; 4509#L647-18 assume !(0 != activate_threads_~tmp___0~0); 4503#L647-20 havoc is_transmit2_triggered_#res;havoc is_transmit2_triggered_~__retres1~2;havoc is_transmit2_triggered_~__retres1~2; 4181#L290-18 assume 1 == ~t2_pc~0; 4182#L291-6 assume 1 == ~E_2~0;is_transmit2_triggered_~__retres1~2 := 1; 4198#L301-6 is_transmit2_triggered_#res := is_transmit2_triggered_~__retres1~2; 4204#L302-6 activate_threads_#t~ret10 := is_transmit2_triggered_#res;activate_threads_~tmp___1~0 := activate_threads_#t~ret10;havoc activate_threads_#t~ret10; 4294#L655-18 assume 0 != activate_threads_~tmp___1~0;~t2_st~0 := 0; 4578#L655-20 havoc is_transmit3_triggered_#res;havoc is_transmit3_triggered_~__retres1~3;havoc is_transmit3_triggered_~__retres1~3; 4326#L309-18 assume !(1 == ~t3_pc~0); 4327#L309-20 is_transmit3_triggered_~__retres1~3 := 0; 4331#L320-6 is_transmit3_triggered_#res := is_transmit3_triggered_~__retres1~3; 4368#L321-6 activate_threads_#t~ret11 := is_transmit3_triggered_#res;activate_threads_~tmp___2~0 := activate_threads_#t~ret11;havoc activate_threads_#t~ret11; 4401#L663-18 assume 0 != activate_threads_~tmp___2~0;~t3_st~0 := 0; 4391#L663-20 havoc is_transmit4_triggered_#res;havoc is_transmit4_triggered_~__retres1~4;havoc is_transmit4_triggered_~__retres1~4; 4392#L328-18 assume 1 == ~t4_pc~0; 4437#L329-6 assume 1 == ~E_4~0;is_transmit4_triggered_~__retres1~4 := 1; 4438#L339-6 is_transmit4_triggered_#res := is_transmit4_triggered_~__retres1~4; 4433#L340-6 activate_threads_#t~ret12 := is_transmit4_triggered_#res;activate_threads_~tmp___3~0 := activate_threads_#t~ret12;havoc activate_threads_#t~ret12; 4434#L671-18 assume 0 != activate_threads_~tmp___3~0;~t4_st~0 := 0; 4522#L671-20 assume 1 == ~M_E~0;~M_E~0 := 2; 4318#L574-3 assume 1 == ~T1_E~0;~T1_E~0 := 2; 4319#L579-3 assume 1 == ~T2_E~0;~T2_E~0 := 2; 4388#L584-3 assume 1 == ~T3_E~0;~T3_E~0 := 2; 4283#L589-3 assume !(1 == ~T4_E~0); 4284#L594-3 assume 1 == ~E_M~0;~E_M~0 := 2; 4296#L599-3 assume !(1 == ~E_1~0); 4297#L604-3 assume 1 == ~E_2~0;~E_2~0 := 2; 4228#L609-3 assume 1 == ~E_3~0;~E_3~0 := 2; 4229#L614-3 assume 1 == ~E_4~0;~E_4~0 := 2; 4415#L619-3 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~5;havoc exists_runnable_thread_~__retres1~5; 4406#L388-1 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~5 := 1; 4251#L415-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~5; 4585#L416-1 start_simulation_#t~ret14 := exists_runnable_thread_#res;start_simulation_~tmp~3 := start_simulation_#t~ret14;havoc start_simulation_#t~ret14; 4501#L824 assume !(0 == start_simulation_~tmp~3); 4502#L824-1 havoc stop_simulation_#res;havoc stop_simulation_#t~ret13, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~5;havoc exists_runnable_thread_~__retres1~5; 4408#L388-2 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~5 := 1; 4223#L415-2 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~5; 4510#L416-2 stop_simulation_#t~ret13 := exists_runnable_thread_#res;stop_simulation_~tmp~2 := stop_simulation_#t~ret13;havoc stop_simulation_#t~ret13; 4511#L779 assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; 4194#L786 stop_simulation_#res := stop_simulation_~__retres2~0; 4195#L787 start_simulation_#t~ret15 := stop_simulation_#res;start_simulation_~tmp___0~1 := start_simulation_#t~ret15;havoc start_simulation_#t~ret15; 4286#L837 assume !(0 != start_simulation_~tmp___0~1); 4322#L805-1 [2018-11-23 08:02:21,935 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 08:02:21,935 INFO L82 PathProgramCache]: Analyzing trace with hash -1414985347, now seen corresponding path program 1 times [2018-11-23 08:02:21,935 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 08:02:21,935 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 08:02:21,936 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:02:21,936 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-23 08:02:21,944 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:02:21,948 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 08:02:21,965 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 08:02:21,965 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 08:02:21,965 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-11-23 08:02:21,965 INFO L799 eck$LassoCheckResult]: stem already infeasible [2018-11-23 08:02:21,965 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 08:02:21,966 INFO L82 PathProgramCache]: Analyzing trace with hash 349410603, now seen corresponding path program 1 times [2018-11-23 08:02:21,975 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 08:02:21,975 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 08:02:21,977 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:02:21,977 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 08:02:21,977 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:02:21,982 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 08:02:22,014 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 08:02:22,014 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 08:02:22,014 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-23 08:02:22,015 INFO L811 eck$LassoCheckResult]: loop already infeasible [2018-11-23 08:02:22,015 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-23 08:02:22,015 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-23 08:02:22,015 INFO L87 Difference]: Start difference. First operand 413 states and 621 transitions. cyclomatic complexity: 209 Second operand 3 states. [2018-11-23 08:02:22,065 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 08:02:22,065 INFO L93 Difference]: Finished difference Result 749 states and 1110 transitions. [2018-11-23 08:02:22,066 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-23 08:02:22,066 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 749 states and 1110 transitions. [2018-11-23 08:02:22,069 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 685 [2018-11-23 08:02:22,072 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 749 states to 749 states and 1110 transitions. [2018-11-23 08:02:22,072 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 749 [2018-11-23 08:02:22,073 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 749 [2018-11-23 08:02:22,073 INFO L73 IsDeterministic]: Start isDeterministic. Operand 749 states and 1110 transitions. [2018-11-23 08:02:22,074 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2018-11-23 08:02:22,074 INFO L705 BuchiCegarLoop]: Abstraction has 749 states and 1110 transitions. [2018-11-23 08:02:22,074 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 749 states and 1110 transitions. [2018-11-23 08:02:22,082 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 749 to 716. [2018-11-23 08:02:22,082 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 716 states. [2018-11-23 08:02:22,083 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 716 states to 716 states and 1064 transitions. [2018-11-23 08:02:22,084 INFO L728 BuchiCegarLoop]: Abstraction has 716 states and 1064 transitions. [2018-11-23 08:02:22,084 INFO L608 BuchiCegarLoop]: Abstraction has 716 states and 1064 transitions. [2018-11-23 08:02:22,084 INFO L442 BuchiCegarLoop]: ======== Iteration 7============ [2018-11-23 08:02:22,084 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 716 states and 1064 transitions. [2018-11-23 08:02:22,086 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 652 [2018-11-23 08:02:22,086 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2018-11-23 08:02:22,086 INFO L119 BuchiIsEmpty]: Starting construction of run [2018-11-23 08:02:22,087 INFO L866 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 08:02:22,087 INFO L867 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 08:02:22,088 INFO L794 eck$LassoCheckResult]: Stem: 5701#ULTIMATE.startENTRY ~m_pc~0 := 0;~t1_pc~0 := 0;~t2_pc~0 := 0;~t3_pc~0 := 0;~t4_pc~0 := 0;~m_st~0 := 0;~t1_st~0 := 0;~t2_st~0 := 0;~t3_st~0 := 0;~t4_st~0 := 0;~m_i~0 := 0;~t1_i~0 := 0;~t2_i~0 := 0;~t3_i~0 := 0;~t4_i~0 := 0;~M_E~0 := 2;~T1_E~0 := 2;~T2_E~0 := 2;~T3_E~0 := 2;~T4_E~0 := 2;~E_M~0 := 2;~E_1~0 := 2;~E_2~0 := 2;~E_3~0 := 2;~E_4~0 := 2;~token~0 := 0;~local~0 := 0; 5624#L-1 havoc main_#res;havoc main_~__retres1~6;havoc main_~__retres1~6;~m_i~0 := 1;~t1_i~0 := 1;~t2_i~0 := 1;~t3_i~0 := 1;~t4_i~0 := 1; 5625#L768 havoc start_simulation_#t~ret14, start_simulation_#t~ret15, start_simulation_~kernel_st~0, start_simulation_~tmp~3, start_simulation_~tmp___0~1;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;havoc start_simulation_~tmp___0~1;start_simulation_~kernel_st~0 := 0; 5760#L348 assume 1 == ~m_i~0;~m_st~0 := 0; 5580#L355-1 assume 1 == ~t1_i~0;~t1_st~0 := 0; 5581#L360-1 assume 1 == ~t2_i~0;~t2_st~0 := 0; 5467#L365-1 assume 1 == ~t3_i~0;~t3_st~0 := 0; 5468#L370-1 assume 1 == ~t4_i~0;~t4_st~0 := 0; 5549#L375-1 assume !(0 == ~M_E~0); 5550#L516-1 assume !(0 == ~T1_E~0); 5401#L521-1 assume !(0 == ~T2_E~0); 5402#L526-1 assume !(0 == ~T3_E~0); 5587#L531-1 assume !(0 == ~T4_E~0); 5588#L536-1 assume !(0 == ~E_M~0); 5485#L541-1 assume !(0 == ~E_1~0); 5486#L546-1 assume !(0 == ~E_2~0); 5557#L551-1 assume !(0 == ~E_3~0); 5450#L556-1 assume !(0 == ~E_4~0); 5451#L561-1 havoc activate_threads_#t~ret8, activate_threads_#t~ret9, activate_threads_#t~ret10, activate_threads_#t~ret11, activate_threads_#t~ret12, activate_threads_~tmp~1, activate_threads_~tmp___0~0, activate_threads_~tmp___1~0, activate_threads_~tmp___2~0, activate_threads_~tmp___3~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc activate_threads_~tmp___1~0;havoc activate_threads_~tmp___2~0;havoc activate_threads_~tmp___3~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; 5622#L252 assume !(1 == ~m_pc~0); 5603#L252-2 is_master_triggered_~__retres1~0 := 0; 5604#L263 is_master_triggered_#res := is_master_triggered_~__retres1~0; 5623#L264 activate_threads_#t~ret8 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret8;havoc activate_threads_#t~ret8; 5687#L639 assume !(0 != activate_threads_~tmp~1); 5552#L639-2 havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; 5553#L271 assume !(1 == ~t1_pc~0); 5750#L271-2 is_transmit1_triggered_~__retres1~1 := 0; 5752#L282 is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; 5753#L283 activate_threads_#t~ret9 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret9;havoc activate_threads_#t~ret9; 5776#L647 assume !(0 != activate_threads_~tmp___0~0); 5777#L647-2 havoc is_transmit2_triggered_#res;havoc is_transmit2_triggered_~__retres1~2;havoc is_transmit2_triggered_~__retres1~2; 5411#L290 assume 1 == ~t2_pc~0; 5412#L291 assume 1 == ~E_2~0;is_transmit2_triggered_~__retres1~2 := 1; 5400#L301 is_transmit2_triggered_#res := is_transmit2_triggered_~__retres1~2; 5413#L302 activate_threads_#t~ret10 := is_transmit2_triggered_#res;activate_threads_~tmp___1~0 := activate_threads_#t~ret10;havoc activate_threads_#t~ret10; 5456#L655 assume !(0 != activate_threads_~tmp___1~0); 5444#L655-2 havoc is_transmit3_triggered_#res;havoc is_transmit3_triggered_~__retres1~3;havoc is_transmit3_triggered_~__retres1~3; 5445#L309 assume !(1 == ~t3_pc~0); 5473#L309-2 is_transmit3_triggered_~__retres1~3 := 0; 5472#L320 is_transmit3_triggered_#res := is_transmit3_triggered_~__retres1~3; 5469#L321 activate_threads_#t~ret11 := is_transmit3_triggered_#res;activate_threads_~tmp___2~0 := activate_threads_#t~ret11;havoc activate_threads_#t~ret11; 5470#L663 assume !(0 != activate_threads_~tmp___2~0); 5595#L663-2 havoc is_transmit4_triggered_#res;havoc is_transmit4_triggered_~__retres1~4;havoc is_transmit4_triggered_~__retres1~4; 5596#L328 assume 1 == ~t4_pc~0; 5628#L329 assume 1 == ~E_4~0;is_transmit4_triggered_~__retres1~4 := 1; 5629#L339 is_transmit4_triggered_#res := is_transmit4_triggered_~__retres1~4; 5626#L340 activate_threads_#t~ret12 := is_transmit4_triggered_#res;activate_threads_~tmp___3~0 := activate_threads_#t~ret12;havoc activate_threads_#t~ret12; 5627#L671 assume !(0 != activate_threads_~tmp___3~0); 5724#L671-2 assume !(1 == ~M_E~0); 5483#L574-1 assume 1 == ~T1_E~0;~T1_E~0 := 2; 5484#L579-1 assume !(1 == ~T2_E~0); 5554#L584-1 assume !(1 == ~T3_E~0); 5448#L589-1 assume !(1 == ~T4_E~0); 5449#L594-1 assume !(1 == ~E_M~0); 5355#L599-1 assume !(1 == ~E_1~0); 5356#L604-1 assume !(1 == ~E_2~0); 5426#L609-1 assume !(1 == ~E_3~0); 5427#L614-1 assume 1 == ~E_4~0;~E_4~0 := 2; 5493#L805-1 [2018-11-23 08:02:22,088 INFO L796 eck$LassoCheckResult]: Loop: 5493#L805-1 assume !false; 5494#L806 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret2, eval_#t~nondet3, eval_~tmp_ndt_1~0, eval_#t~nondet4, eval_~tmp_ndt_2~0, eval_#t~nondet5, eval_~tmp_ndt_3~0, eval_#t~nondet6, eval_~tmp_ndt_4~0, eval_#t~nondet7, eval_~tmp_ndt_5~0, eval_~tmp~0;havoc eval_~tmp~0; 5406#L491 assume !false; 5766#L426 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~5;havoc exists_runnable_thread_~__retres1~5; 5572#L388 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~5 := 1; 5417#L415 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~5; 5774#L416 eval_#t~ret2 := exists_runnable_thread_#res;eval_~tmp~0 := eval_#t~ret2;havoc eval_#t~ret2; 5544#L430 assume !(0 != eval_~tmp~0); 5546#L506 start_simulation_~kernel_st~0 := 2; 6030#L348-1 start_simulation_~kernel_st~0 := 3; 6026#L516-2 assume 0 == ~M_E~0;~M_E~0 := 1; 6025#L516-4 assume !(0 == ~T1_E~0); 6024#L521-3 assume 0 == ~T2_E~0;~T2_E~0 := 1; 6023#L526-3 assume 0 == ~T3_E~0;~T3_E~0 := 1; 6022#L531-3 assume !(0 == ~T4_E~0); 6021#L536-3 assume 0 == ~E_M~0;~E_M~0 := 1; 6020#L541-3 assume 0 == ~E_1~0;~E_1~0 := 1; 6019#L546-3 assume 0 == ~E_2~0;~E_2~0 := 1; 6018#L551-3 assume 0 == ~E_3~0;~E_3~0 := 1; 6017#L556-3 assume !(0 == ~E_4~0); 6016#L561-3 havoc activate_threads_#t~ret8, activate_threads_#t~ret9, activate_threads_#t~ret10, activate_threads_#t~ret11, activate_threads_#t~ret12, activate_threads_~tmp~1, activate_threads_~tmp___0~0, activate_threads_~tmp___1~0, activate_threads_~tmp___2~0, activate_threads_~tmp___3~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc activate_threads_~tmp___1~0;havoc activate_threads_~tmp___2~0;havoc activate_threads_~tmp___3~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; 5733#L252-18 assume !(1 == ~m_pc~0); 5722#L252-20 is_master_triggered_~__retres1~0 := 0; 5642#L263-6 is_master_triggered_#res := is_master_triggered_~__retres1~0; 5643#L264-6 activate_threads_#t~ret8 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret8;havoc activate_threads_#t~ret8; 5518#L639-18 assume 0 != activate_threads_~tmp~1;~m_st~0 := 0; 5519#L639-20 havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; 5524#L271-18 assume 1 == ~t1_pc~0; 5781#L272-6 assume 1 == ~E_1~0;is_transmit1_triggered_~__retres1~1 := 1; 5742#L282-6 is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; 5743#L283-6 activate_threads_#t~ret9 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret9;havoc activate_threads_#t~ret9; 5680#L647-18 assume !(0 != activate_threads_~tmp___0~0); 5674#L647-20 havoc is_transmit2_triggered_#res;havoc is_transmit2_triggered_~__retres1~2;havoc is_transmit2_triggered_~__retres1~2; 5350#L290-18 assume 1 == ~t2_pc~0; 5351#L291-6 assume 1 == ~E_2~0;is_transmit2_triggered_~__retres1~2 := 1; 5367#L301-6 is_transmit2_triggered_#res := is_transmit2_triggered_~__retres1~2; 5373#L302-6 activate_threads_#t~ret10 := is_transmit2_triggered_#res;activate_threads_~tmp___1~0 := activate_threads_#t~ret10;havoc activate_threads_#t~ret10; 5463#L655-18 assume 0 != activate_threads_~tmp___1~0;~t2_st~0 := 0; 5768#L655-20 havoc is_transmit3_triggered_#res;havoc is_transmit3_triggered_~__retres1~3;havoc is_transmit3_triggered_~__retres1~3; 5495#L309-18 assume !(1 == ~t3_pc~0); 5496#L309-20 is_transmit3_triggered_~__retres1~3 := 0; 5500#L320-6 is_transmit3_triggered_#res := is_transmit3_triggered_~__retres1~3; 5537#L321-6 activate_threads_#t~ret11 := is_transmit3_triggered_#res;activate_threads_~tmp___2~0 := activate_threads_#t~ret11;havoc activate_threads_#t~ret11; 5571#L663-18 assume 0 != activate_threads_~tmp___2~0;~t3_st~0 := 0; 5561#L663-20 havoc is_transmit4_triggered_#res;havoc is_transmit4_triggered_~__retres1~4;havoc is_transmit4_triggered_~__retres1~4; 5562#L328-18 assume 1 == ~t4_pc~0; 5609#L329-6 assume 1 == ~E_4~0;is_transmit4_triggered_~__retres1~4 := 1; 5610#L339-6 is_transmit4_triggered_#res := is_transmit4_triggered_~__retres1~4; 5605#L340-6 activate_threads_#t~ret12 := is_transmit4_triggered_#res;activate_threads_~tmp___3~0 := activate_threads_#t~ret12;havoc activate_threads_#t~ret12; 5606#L671-18 assume 0 != activate_threads_~tmp___3~0;~t4_st~0 := 0; 5696#L671-20 assume 1 == ~M_E~0;~M_E~0 := 2; 5487#L574-3 assume 1 == ~T1_E~0;~T1_E~0 := 2; 5488#L579-3 assume 1 == ~T2_E~0;~T2_E~0 := 2; 5558#L584-3 assume 1 == ~T3_E~0;~T3_E~0 := 2; 5453#L589-3 assume !(1 == ~T4_E~0); 5454#L594-3 assume 1 == ~E_M~0;~E_M~0 := 2; 5465#L599-3 assume !(1 == ~E_1~0); 5466#L604-3 assume 1 == ~E_2~0;~E_2~0 := 2; 5397#L609-3 assume 1 == ~E_3~0;~E_3~0 := 2; 5398#L614-3 assume 1 == ~E_4~0;~E_4~0 := 2; 5585#L619-3 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~5;havoc exists_runnable_thread_~__retres1~5; 5576#L388-1 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~5 := 1; 5420#L415-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~5; 5775#L416-1 start_simulation_#t~ret14 := exists_runnable_thread_#res;start_simulation_~tmp~3 := start_simulation_#t~ret14;havoc start_simulation_#t~ret14; 5671#L824 assume !(0 == start_simulation_~tmp~3); 5673#L824-1 havoc stop_simulation_#res;havoc stop_simulation_#t~ret13, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~5;havoc exists_runnable_thread_~__retres1~5; 5578#L388-2 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~5 := 1; 5392#L415-2 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~5; 5681#L416-2 stop_simulation_#t~ret13 := exists_runnable_thread_#res;stop_simulation_~tmp~2 := stop_simulation_#t~ret13;havoc stop_simulation_#t~ret13; 5682#L779 assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; 5363#L786 stop_simulation_#res := stop_simulation_~__retres2~0; 5364#L787 start_simulation_#t~ret15 := stop_simulation_#res;start_simulation_~tmp___0~1 := start_simulation_#t~ret15;havoc start_simulation_#t~ret15; 5455#L837 assume !(0 != start_simulation_~tmp___0~1); 5493#L805-1 [2018-11-23 08:02:22,088 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 08:02:22,088 INFO L82 PathProgramCache]: Analyzing trace with hash 1923053566, now seen corresponding path program 1 times [2018-11-23 08:02:22,088 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 08:02:22,088 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 08:02:22,089 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:02:22,089 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 08:02:22,089 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:02:22,093 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 08:02:22,106 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 08:02:22,106 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 08:02:22,106 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-11-23 08:02:22,107 INFO L799 eck$LassoCheckResult]: stem already infeasible [2018-11-23 08:02:22,107 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 08:02:22,107 INFO L82 PathProgramCache]: Analyzing trace with hash -352157622, now seen corresponding path program 1 times [2018-11-23 08:02:22,107 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 08:02:22,107 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 08:02:22,108 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:02:22,108 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 08:02:22,108 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:02:22,112 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 08:02:22,128 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 08:02:22,128 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 08:02:22,128 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-23 08:02:22,129 INFO L811 eck$LassoCheckResult]: loop already infeasible [2018-11-23 08:02:22,129 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-23 08:02:22,129 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-23 08:02:22,129 INFO L87 Difference]: Start difference. First operand 716 states and 1064 transitions. cyclomatic complexity: 350 Second operand 3 states. [2018-11-23 08:02:22,179 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 08:02:22,179 INFO L93 Difference]: Finished difference Result 1287 states and 1897 transitions. [2018-11-23 08:02:22,180 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-23 08:02:22,180 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1287 states and 1897 transitions. [2018-11-23 08:02:22,186 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 1218 [2018-11-23 08:02:22,191 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1287 states to 1287 states and 1897 transitions. [2018-11-23 08:02:22,192 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1287 [2018-11-23 08:02:22,193 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1287 [2018-11-23 08:02:22,193 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1287 states and 1897 transitions. [2018-11-23 08:02:22,195 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2018-11-23 08:02:22,195 INFO L705 BuchiCegarLoop]: Abstraction has 1287 states and 1897 transitions. [2018-11-23 08:02:22,196 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1287 states and 1897 transitions. [2018-11-23 08:02:22,212 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1287 to 1283. [2018-11-23 08:02:22,212 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1283 states. [2018-11-23 08:02:22,215 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1283 states to 1283 states and 1893 transitions. [2018-11-23 08:02:22,215 INFO L728 BuchiCegarLoop]: Abstraction has 1283 states and 1893 transitions. [2018-11-23 08:02:22,215 INFO L608 BuchiCegarLoop]: Abstraction has 1283 states and 1893 transitions. [2018-11-23 08:02:22,215 INFO L442 BuchiCegarLoop]: ======== Iteration 8============ [2018-11-23 08:02:22,215 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1283 states and 1893 transitions. [2018-11-23 08:02:22,221 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 1214 [2018-11-23 08:02:22,221 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2018-11-23 08:02:22,221 INFO L119 BuchiIsEmpty]: Starting construction of run [2018-11-23 08:02:22,222 INFO L866 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 08:02:22,222 INFO L867 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 08:02:22,222 INFO L794 eck$LassoCheckResult]: Stem: 7722#ULTIMATE.startENTRY ~m_pc~0 := 0;~t1_pc~0 := 0;~t2_pc~0 := 0;~t3_pc~0 := 0;~t4_pc~0 := 0;~m_st~0 := 0;~t1_st~0 := 0;~t2_st~0 := 0;~t3_st~0 := 0;~t4_st~0 := 0;~m_i~0 := 0;~t1_i~0 := 0;~t2_i~0 := 0;~t3_i~0 := 0;~t4_i~0 := 0;~M_E~0 := 2;~T1_E~0 := 2;~T2_E~0 := 2;~T3_E~0 := 2;~T4_E~0 := 2;~E_M~0 := 2;~E_1~0 := 2;~E_2~0 := 2;~E_3~0 := 2;~E_4~0 := 2;~token~0 := 0;~local~0 := 0; 7645#L-1 havoc main_#res;havoc main_~__retres1~6;havoc main_~__retres1~6;~m_i~0 := 1;~t1_i~0 := 1;~t2_i~0 := 1;~t3_i~0 := 1;~t4_i~0 := 1; 7646#L768 havoc start_simulation_#t~ret14, start_simulation_#t~ret15, start_simulation_~kernel_st~0, start_simulation_~tmp~3, start_simulation_~tmp___0~1;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;havoc start_simulation_~tmp___0~1;start_simulation_~kernel_st~0 := 0; 7784#L348 assume 1 == ~m_i~0;~m_st~0 := 0; 7602#L355-1 assume 1 == ~t1_i~0;~t1_st~0 := 0; 7603#L360-1 assume 1 == ~t2_i~0;~t2_st~0 := 0; 7488#L365-1 assume 1 == ~t3_i~0;~t3_st~0 := 0; 7489#L370-1 assume 1 == ~t4_i~0;~t4_st~0 := 0; 7570#L375-1 assume !(0 == ~M_E~0); 7571#L516-1 assume !(0 == ~T1_E~0); 7407#L521-1 assume !(0 == ~T2_E~0); 7408#L526-1 assume !(0 == ~T3_E~0); 7609#L531-1 assume !(0 == ~T4_E~0); 7610#L536-1 assume !(0 == ~E_M~0); 7506#L541-1 assume !(0 == ~E_1~0); 7507#L546-1 assume !(0 == ~E_2~0); 7578#L551-1 assume !(0 == ~E_3~0); 7455#L556-1 assume !(0 == ~E_4~0); 7456#L561-1 havoc activate_threads_#t~ret8, activate_threads_#t~ret9, activate_threads_#t~ret10, activate_threads_#t~ret11, activate_threads_#t~ret12, activate_threads_~tmp~1, activate_threads_~tmp___0~0, activate_threads_~tmp___1~0, activate_threads_~tmp___2~0, activate_threads_~tmp___3~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc activate_threads_~tmp___1~0;havoc activate_threads_~tmp___2~0;havoc activate_threads_~tmp___3~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; 7643#L252 assume !(1 == ~m_pc~0); 7624#L252-2 is_master_triggered_~__retres1~0 := 0; 7625#L263 is_master_triggered_#res := is_master_triggered_~__retres1~0; 7644#L264 activate_threads_#t~ret8 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret8;havoc activate_threads_#t~ret8; 7707#L639 assume !(0 != activate_threads_~tmp~1); 7573#L639-2 havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; 7574#L271 assume !(1 == ~t1_pc~0); 7772#L271-2 is_transmit1_triggered_~__retres1~1 := 0; 7774#L282 is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; 7775#L283 activate_threads_#t~ret9 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret9;havoc activate_threads_#t~ret9; 7803#L647 assume !(0 != activate_threads_~tmp___0~0); 7804#L647-2 havoc is_transmit2_triggered_#res;havoc is_transmit2_triggered_~__retres1~2;havoc is_transmit2_triggered_~__retres1~2; 7417#L290 assume !(1 == ~t2_pc~0); 7404#L290-2 is_transmit2_triggered_~__retres1~2 := 0; 7405#L301 is_transmit2_triggered_#res := is_transmit2_triggered_~__retres1~2; 7420#L302 activate_threads_#t~ret10 := is_transmit2_triggered_#res;activate_threads_~tmp___1~0 := activate_threads_#t~ret10;havoc activate_threads_#t~ret10; 7461#L655 assume !(0 != activate_threads_~tmp___1~0); 7449#L655-2 havoc is_transmit3_triggered_#res;havoc is_transmit3_triggered_~__retres1~3;havoc is_transmit3_triggered_~__retres1~3; 7450#L309 assume !(1 == ~t3_pc~0); 7494#L309-2 is_transmit3_triggered_~__retres1~3 := 0; 7493#L320 is_transmit3_triggered_#res := is_transmit3_triggered_~__retres1~3; 7490#L321 activate_threads_#t~ret11 := is_transmit3_triggered_#res;activate_threads_~tmp___2~0 := activate_threads_#t~ret11;havoc activate_threads_#t~ret11; 7491#L663 assume !(0 != activate_threads_~tmp___2~0); 7617#L663-2 havoc is_transmit4_triggered_#res;havoc is_transmit4_triggered_~__retres1~4;havoc is_transmit4_triggered_~__retres1~4; 7618#L328 assume 1 == ~t4_pc~0; 7649#L329 assume 1 == ~E_4~0;is_transmit4_triggered_~__retres1~4 := 1; 7650#L339 is_transmit4_triggered_#res := is_transmit4_triggered_~__retres1~4; 7647#L340 activate_threads_#t~ret12 := is_transmit4_triggered_#res;activate_threads_~tmp___3~0 := activate_threads_#t~ret12;havoc activate_threads_#t~ret12; 7648#L671 assume !(0 != activate_threads_~tmp___3~0); 7746#L671-2 assume !(1 == ~M_E~0); 7504#L574-1 assume 1 == ~T1_E~0;~T1_E~0 := 2; 7505#L579-1 assume !(1 == ~T2_E~0); 7575#L584-1 assume !(1 == ~T3_E~0); 7453#L589-1 assume !(1 == ~T4_E~0); 7454#L594-1 assume !(1 == ~E_M~0); 7364#L599-1 assume !(1 == ~E_1~0); 7365#L604-1 assume !(1 == ~E_2~0); 7431#L609-1 assume !(1 == ~E_3~0); 7432#L614-1 assume 1 == ~E_4~0;~E_4~0 := 2; 7514#L805-1 [2018-11-23 08:02:22,222 INFO L796 eck$LassoCheckResult]: Loop: 7514#L805-1 assume !false; 7515#L806 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret2, eval_#t~nondet3, eval_~tmp_ndt_1~0, eval_#t~nondet4, eval_~tmp_ndt_2~0, eval_#t~nondet5, eval_~tmp_ndt_3~0, eval_#t~nondet6, eval_~tmp_ndt_4~0, eval_#t~nondet7, eval_~tmp_ndt_5~0, eval_~tmp~0;havoc eval_~tmp~0; 7411#L491 assume !false; 7994#L426 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~5;havoc exists_runnable_thread_~__retres1~5; 7594#L388 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~5 := 1; 7422#L415 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~5; 7801#L416 eval_#t~ret2 := exists_runnable_thread_#res;eval_~tmp~0 := eval_#t~ret2;havoc eval_#t~ret2; 7564#L430 assume !(0 != eval_~tmp~0); 7566#L506 start_simulation_~kernel_st~0 := 2; 7749#L348-1 start_simulation_~kernel_st~0 := 3; 7689#L516-2 assume 0 == ~M_E~0;~M_E~0 := 1; 7690#L516-4 assume !(0 == ~T1_E~0); 7418#L521-3 assume 0 == ~T2_E~0;~T2_E~0 := 1; 7419#L526-3 assume 0 == ~T3_E~0;~T3_E~0 := 1; 7612#L531-3 assume !(0 == ~T4_E~0); 7613#L536-3 assume 0 == ~E_M~0;~E_M~0 := 1; 7510#L541-3 assume 0 == ~E_1~0;~E_1~0 := 1; 7511#L546-3 assume 0 == ~E_2~0;~E_2~0 := 1; 7561#L551-3 assume 0 == ~E_3~0;~E_3~0 := 1; 7440#L556-3 assume !(0 == ~E_4~0); 7441#L561-3 havoc activate_threads_#t~ret8, activate_threads_#t~ret9, activate_threads_#t~ret10, activate_threads_#t~ret11, activate_threads_#t~ret12, activate_threads_~tmp~1, activate_threads_~tmp___0~0, activate_threads_~tmp___1~0, activate_threads_~tmp___2~0, activate_threads_~tmp___3~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc activate_threads_~tmp___1~0;havoc activate_threads_~tmp___2~0;havoc activate_threads_~tmp___3~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; 7739#L252-18 assume !(1 == ~m_pc~0); 7743#L252-20 is_master_triggered_~__retres1~0 := 0; 7660#L263-6 is_master_triggered_#res := is_master_triggered_~__retres1~0; 7661#L264-6 activate_threads_#t~ret8 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret8;havoc activate_threads_#t~ret8; 7538#L639-18 assume 0 != activate_threads_~tmp~1;~m_st~0 := 0; 7539#L639-20 havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; 7544#L271-18 assume 1 == ~t1_pc~0; 7808#L272-6 assume 1 == ~E_1~0;is_transmit1_triggered_~__retres1~1 := 1; 7764#L282-6 is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; 7765#L283-6 activate_threads_#t~ret9 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret9;havoc activate_threads_#t~ret9; 7700#L647-18 assume !(0 != activate_threads_~tmp___0~0); 7693#L647-20 havoc is_transmit2_triggered_#res;havoc is_transmit2_triggered_~__retres1~2;havoc is_transmit2_triggered_~__retres1~2; 7360#L290-18 assume !(1 == ~t2_pc~0); 7361#L290-20 is_transmit2_triggered_~__retres1~2 := 0; 8608#L301-6 is_transmit2_triggered_#res := is_transmit2_triggered_~__retres1~2; 8607#L302-6 activate_threads_#t~ret10 := is_transmit2_triggered_#res;activate_threads_~tmp___1~0 := activate_threads_#t~ret10;havoc activate_threads_#t~ret10; 8544#L655-18 assume 0 != activate_threads_~tmp___1~0;~t2_st~0 := 0; 8543#L655-20 havoc is_transmit3_triggered_#res;havoc is_transmit3_triggered_~__retres1~3;havoc is_transmit3_triggered_~__retres1~3; 8542#L309-18 assume !(1 == ~t3_pc~0); 8540#L309-20 is_transmit3_triggered_~__retres1~3 := 0; 8539#L320-6 is_transmit3_triggered_#res := is_transmit3_triggered_~__retres1~3; 8538#L321-6 activate_threads_#t~ret11 := is_transmit3_triggered_#res;activate_threads_~tmp___2~0 := activate_threads_#t~ret11;havoc activate_threads_#t~ret11; 8537#L663-18 assume 0 != activate_threads_~tmp___2~0;~t3_st~0 := 0; 8536#L663-20 havoc is_transmit4_triggered_#res;havoc is_transmit4_triggered_~__retres1~4;havoc is_transmit4_triggered_~__retres1~4; 8535#L328-18 assume 1 == ~t4_pc~0; 8533#L329-6 assume 1 == ~E_4~0;is_transmit4_triggered_~__retres1~4 := 1; 8532#L339-6 is_transmit4_triggered_#res := is_transmit4_triggered_~__retres1~4; 8531#L340-6 activate_threads_#t~ret12 := is_transmit4_triggered_#res;activate_threads_~tmp___3~0 := activate_threads_#t~ret12;havoc activate_threads_#t~ret12; 8530#L671-18 assume 0 != activate_threads_~tmp___3~0;~t4_st~0 := 0; 8529#L671-20 assume 1 == ~M_E~0;~M_E~0 := 2; 8528#L574-3 assume 1 == ~T1_E~0;~T1_E~0 := 2; 8527#L579-3 assume 1 == ~T2_E~0;~T2_E~0 := 2; 8525#L584-3 assume 1 == ~T3_E~0;~T3_E~0 := 2; 7458#L589-3 assume !(1 == ~T4_E~0); 7459#L594-3 assume 1 == ~E_M~0;~E_M~0 := 2; 7481#L599-3 assume !(1 == ~E_1~0); 7482#L604-3 assume 1 == ~E_2~0;~E_2~0 := 2; 7402#L609-3 assume 1 == ~E_3~0;~E_3~0 := 2; 7403#L614-3 assume 1 == ~E_4~0;~E_4~0 := 2; 7607#L619-3 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~5;havoc exists_runnable_thread_~__retres1~5; 7598#L388-1 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~5 := 1; 7425#L415-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~5; 7802#L416-1 start_simulation_#t~ret14 := exists_runnable_thread_#res;start_simulation_~tmp~3 := start_simulation_#t~ret14;havoc start_simulation_#t~ret14; 7691#L824 assume !(0 == start_simulation_~tmp~3); 7692#L824-1 havoc stop_simulation_#res;havoc stop_simulation_#t~ret13, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~5;havoc exists_runnable_thread_~__retres1~5; 7600#L388-2 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~5 := 1; 7397#L415-2 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~5; 7703#L416-2 stop_simulation_#t~ret13 := exists_runnable_thread_#res;stop_simulation_~tmp~2 := stop_simulation_#t~ret13;havoc stop_simulation_#t~ret13; 7704#L779 assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; 7371#L786 stop_simulation_#res := stop_simulation_~__retres2~0; 7372#L787 start_simulation_#t~ret15 := stop_simulation_#res;start_simulation_~tmp___0~1 := start_simulation_#t~ret15;havoc start_simulation_#t~ret15; 7460#L837 assume !(0 != start_simulation_~tmp___0~1); 7514#L805-1 [2018-11-23 08:02:22,223 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 08:02:22,223 INFO L82 PathProgramCache]: Analyzing trace with hash 250535935, now seen corresponding path program 1 times [2018-11-23 08:02:22,223 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 08:02:22,223 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 08:02:22,224 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:02:22,224 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 08:02:22,224 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:02:22,229 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 08:02:22,248 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 08:02:22,249 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 08:02:22,249 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-11-23 08:02:22,249 INFO L799 eck$LassoCheckResult]: stem already infeasible [2018-11-23 08:02:22,249 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 08:02:22,249 INFO L82 PathProgramCache]: Analyzing trace with hash 47833577, now seen corresponding path program 1 times [2018-11-23 08:02:22,249 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 08:02:22,250 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 08:02:22,250 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:02:22,250 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 08:02:22,250 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:02:22,256 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 08:02:22,272 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 08:02:22,273 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 08:02:22,273 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-23 08:02:22,273 INFO L811 eck$LassoCheckResult]: loop already infeasible [2018-11-23 08:02:22,273 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-23 08:02:22,273 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-23 08:02:22,273 INFO L87 Difference]: Start difference. First operand 1283 states and 1893 transitions. cyclomatic complexity: 614 Second operand 3 states. [2018-11-23 08:02:22,328 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 08:02:22,328 INFO L93 Difference]: Finished difference Result 2344 states and 3436 transitions. [2018-11-23 08:02:22,329 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-23 08:02:22,329 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 2344 states and 3436 transitions. [2018-11-23 08:02:22,340 INFO L131 ngComponentsAnalysis]: Automaton has 8 accepting balls. 2260 [2018-11-23 08:02:22,348 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 2344 states to 2344 states and 3436 transitions. [2018-11-23 08:02:22,349 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 2344 [2018-11-23 08:02:22,350 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 2344 [2018-11-23 08:02:22,351 INFO L73 IsDeterministic]: Start isDeterministic. Operand 2344 states and 3436 transitions. [2018-11-23 08:02:22,354 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2018-11-23 08:02:22,354 INFO L705 BuchiCegarLoop]: Abstraction has 2344 states and 3436 transitions. [2018-11-23 08:02:22,355 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2344 states and 3436 transitions. [2018-11-23 08:02:22,381 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2344 to 2336. [2018-11-23 08:02:22,381 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2336 states. [2018-11-23 08:02:22,387 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2336 states to 2336 states and 3428 transitions. [2018-11-23 08:02:22,387 INFO L728 BuchiCegarLoop]: Abstraction has 2336 states and 3428 transitions. [2018-11-23 08:02:22,387 INFO L608 BuchiCegarLoop]: Abstraction has 2336 states and 3428 transitions. [2018-11-23 08:02:22,387 INFO L442 BuchiCegarLoop]: ======== Iteration 9============ [2018-11-23 08:02:22,387 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 2336 states and 3428 transitions. [2018-11-23 08:02:22,396 INFO L131 ngComponentsAnalysis]: Automaton has 8 accepting balls. 2252 [2018-11-23 08:02:22,397 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2018-11-23 08:02:22,397 INFO L119 BuchiIsEmpty]: Starting construction of run [2018-11-23 08:02:22,398 INFO L866 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 08:02:22,398 INFO L867 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 08:02:22,398 INFO L794 eck$LassoCheckResult]: Stem: 11372#ULTIMATE.startENTRY ~m_pc~0 := 0;~t1_pc~0 := 0;~t2_pc~0 := 0;~t3_pc~0 := 0;~t4_pc~0 := 0;~m_st~0 := 0;~t1_st~0 := 0;~t2_st~0 := 0;~t3_st~0 := 0;~t4_st~0 := 0;~m_i~0 := 0;~t1_i~0 := 0;~t2_i~0 := 0;~t3_i~0 := 0;~t4_i~0 := 0;~M_E~0 := 2;~T1_E~0 := 2;~T2_E~0 := 2;~T3_E~0 := 2;~T4_E~0 := 2;~E_M~0 := 2;~E_1~0 := 2;~E_2~0 := 2;~E_3~0 := 2;~E_4~0 := 2;~token~0 := 0;~local~0 := 0; 11280#L-1 havoc main_#res;havoc main_~__retres1~6;havoc main_~__retres1~6;~m_i~0 := 1;~t1_i~0 := 1;~t2_i~0 := 1;~t3_i~0 := 1;~t4_i~0 := 1; 11281#L768 havoc start_simulation_#t~ret14, start_simulation_#t~ret15, start_simulation_~kernel_st~0, start_simulation_~tmp~3, start_simulation_~tmp___0~1;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;havoc start_simulation_~tmp___0~1;start_simulation_~kernel_st~0 := 0; 11433#L348 assume 1 == ~m_i~0;~m_st~0 := 0; 11235#L355-1 assume 1 == ~t1_i~0;~t1_st~0 := 0; 11236#L360-1 assume 1 == ~t2_i~0;~t2_st~0 := 0; 11119#L365-1 assume 1 == ~t3_i~0;~t3_st~0 := 0; 11120#L370-1 assume 1 == ~t4_i~0;~t4_st~0 := 0; 11205#L375-1 assume !(0 == ~M_E~0); 11206#L516-1 assume !(0 == ~T1_E~0); 11040#L521-1 assume !(0 == ~T2_E~0); 11041#L526-1 assume !(0 == ~T3_E~0); 11243#L531-1 assume !(0 == ~T4_E~0); 11244#L536-1 assume !(0 == ~E_M~0); 11137#L541-1 assume !(0 == ~E_1~0); 11138#L546-1 assume !(0 == ~E_2~0); 11214#L551-1 assume !(0 == ~E_3~0); 11088#L556-1 assume !(0 == ~E_4~0); 11089#L561-1 havoc activate_threads_#t~ret8, activate_threads_#t~ret9, activate_threads_#t~ret10, activate_threads_#t~ret11, activate_threads_#t~ret12, activate_threads_~tmp~1, activate_threads_~tmp___0~0, activate_threads_~tmp___1~0, activate_threads_~tmp___2~0, activate_threads_~tmp___3~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc activate_threads_~tmp___1~0;havoc activate_threads_~tmp___2~0;havoc activate_threads_~tmp___3~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; 11278#L252 assume !(1 == ~m_pc~0); 11260#L252-2 is_master_triggered_~__retres1~0 := 0; 11261#L263 is_master_triggered_#res := is_master_triggered_~__retres1~0; 11279#L264 activate_threads_#t~ret8 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret8;havoc activate_threads_#t~ret8; 11357#L639 assume !(0 != activate_threads_~tmp~1); 11209#L639-2 havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; 11210#L271 assume !(1 == ~t1_pc~0); 11423#L271-2 is_transmit1_triggered_~__retres1~1 := 0; 11425#L282 is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; 11426#L283 activate_threads_#t~ret9 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret9;havoc activate_threads_#t~ret9; 11452#L647 assume !(0 != activate_threads_~tmp___0~0); 11453#L647-2 havoc is_transmit2_triggered_#res;havoc is_transmit2_triggered_~__retres1~2;havoc is_transmit2_triggered_~__retres1~2; 11050#L290 assume !(1 == ~t2_pc~0); 11038#L290-2 is_transmit2_triggered_~__retres1~2 := 0; 11039#L301 is_transmit2_triggered_#res := is_transmit2_triggered_~__retres1~2; 11051#L302 activate_threads_#t~ret10 := is_transmit2_triggered_#res;activate_threads_~tmp___1~0 := activate_threads_#t~ret10;havoc activate_threads_#t~ret10; 11094#L655 assume !(0 != activate_threads_~tmp___1~0); 11082#L655-2 havoc is_transmit3_triggered_#res;havoc is_transmit3_triggered_~__retres1~3;havoc is_transmit3_triggered_~__retres1~3; 11083#L309 assume !(1 == ~t3_pc~0); 11125#L309-2 is_transmit3_triggered_~__retres1~3 := 0; 11124#L320 is_transmit3_triggered_#res := is_transmit3_triggered_~__retres1~3; 11121#L321 activate_threads_#t~ret11 := is_transmit3_triggered_#res;activate_threads_~tmp___2~0 := activate_threads_#t~ret11;havoc activate_threads_#t~ret11; 11122#L663 assume !(0 != activate_threads_~tmp___2~0); 11252#L663-2 havoc is_transmit4_triggered_#res;havoc is_transmit4_triggered_~__retres1~4;havoc is_transmit4_triggered_~__retres1~4; 11253#L328 assume !(1 == ~t4_pc~0); 11355#L328-2 is_transmit4_triggered_~__retres1~4 := 0; 11353#L339 is_transmit4_triggered_#res := is_transmit4_triggered_~__retres1~4; 11282#L340 activate_threads_#t~ret12 := is_transmit4_triggered_#res;activate_threads_~tmp___3~0 := activate_threads_#t~ret12;havoc activate_threads_#t~ret12; 11283#L671 assume !(0 != activate_threads_~tmp___3~0); 11397#L671-2 assume !(1 == ~M_E~0); 11135#L574-1 assume 1 == ~T1_E~0;~T1_E~0 := 2; 11136#L579-1 assume !(1 == ~T2_E~0); 11211#L584-1 assume !(1 == ~T3_E~0); 11084#L589-1 assume !(1 == ~T4_E~0); 11085#L594-1 assume !(1 == ~E_M~0); 10998#L599-1 assume !(1 == ~E_1~0); 10999#L604-1 assume !(1 == ~E_2~0); 11064#L609-1 assume !(1 == ~E_3~0); 11065#L614-1 assume 1 == ~E_4~0;~E_4~0 := 2; 11454#L805-1 [2018-11-23 08:02:22,398 INFO L796 eck$LassoCheckResult]: Loop: 11454#L805-1 assume !false; 12874#L806 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret2, eval_#t~nondet3, eval_~tmp_ndt_1~0, eval_#t~nondet4, eval_~tmp_ndt_2~0, eval_#t~nondet5, eval_~tmp_ndt_3~0, eval_#t~nondet6, eval_~tmp_ndt_4~0, eval_#t~nondet7, eval_~tmp_ndt_5~0, eval_~tmp~0;havoc eval_~tmp~0; 11440#L491 assume !false; 11441#L426 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~5;havoc exists_runnable_thread_~__retres1~5; 11229#L388 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~5 := 1; 11055#L415 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~5; 11450#L416 eval_#t~ret2 := exists_runnable_thread_#res;eval_~tmp~0 := eval_#t~ret2;havoc eval_#t~ret2; 11199#L430 assume !(0 != eval_~tmp~0); 11201#L506 start_simulation_~kernel_st~0 := 2; 13232#L348-1 start_simulation_~kernel_st~0 := 3; 13231#L516-2 assume 0 == ~M_E~0;~M_E~0 := 1; 13230#L516-4 assume !(0 == ~T1_E~0); 13215#L521-3 assume 0 == ~T2_E~0;~T2_E~0 := 1; 13214#L526-3 assume 0 == ~T3_E~0;~T3_E~0 := 1; 13213#L531-3 assume !(0 == ~T4_E~0); 13212#L536-3 assume 0 == ~E_M~0;~E_M~0 := 1; 11141#L541-3 assume 0 == ~E_1~0;~E_1~0 := 1; 11142#L546-3 assume 0 == ~E_2~0;~E_2~0 := 1; 11196#L551-3 assume 0 == ~E_3~0;~E_3~0 := 1; 11073#L556-3 assume !(0 == ~E_4~0); 11074#L561-3 havoc activate_threads_#t~ret8, activate_threads_#t~ret9, activate_threads_#t~ret10, activate_threads_#t~ret11, activate_threads_#t~ret12, activate_threads_~tmp~1, activate_threads_~tmp___0~0, activate_threads_~tmp___1~0, activate_threads_~tmp___2~0, activate_threads_~tmp___3~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc activate_threads_~tmp___1~0;havoc activate_threads_~tmp___2~0;havoc activate_threads_~tmp___3~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; 11391#L252-18 assume !(1 == ~m_pc~0); 11394#L252-20 is_master_triggered_~__retres1~0 := 0; 11292#L263-6 is_master_triggered_#res := is_master_triggered_~__retres1~0; 11293#L264-6 activate_threads_#t~ret8 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret8;havoc activate_threads_#t~ret8; 11381#L639-18 assume 0 != activate_threads_~tmp~1;~m_st~0 := 0; 13209#L639-20 havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; 13208#L271-18 assume 1 == ~t1_pc~0; 13206#L272-6 assume 1 == ~E_1~0;is_transmit1_triggered_~__retres1~1 := 1; 13205#L282-6 is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; 13204#L283-6 activate_threads_#t~ret9 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret9;havoc activate_threads_#t~ret9; 13203#L647-18 assume !(0 != activate_threads_~tmp___0~0); 11329#L647-20 havoc is_transmit2_triggered_#res;havoc is_transmit2_triggered_~__retres1~2;havoc is_transmit2_triggered_~__retres1~2; 10994#L290-18 assume !(1 == ~t2_pc~0); 10995#L290-20 is_transmit2_triggered_~__retres1~2 := 0; 11008#L301-6 is_transmit2_triggered_#res := is_transmit2_triggered_~__retres1~2; 11014#L302-6 activate_threads_#t~ret10 := is_transmit2_triggered_#res;activate_threads_~tmp___1~0 := activate_threads_#t~ret10;havoc activate_threads_#t~ret10; 11107#L655-18 assume 0 != activate_threads_~tmp___1~0;~t2_st~0 := 0; 11444#L655-20 havoc is_transmit3_triggered_#res;havoc is_transmit3_triggered_~__retres1~3;havoc is_transmit3_triggered_~__retres1~3; 11147#L309-18 assume !(1 == ~t3_pc~0); 11148#L309-20 is_transmit3_triggered_~__retres1~3 := 0; 11152#L320-6 is_transmit3_triggered_#res := is_transmit3_triggered_~__retres1~3; 11192#L321-6 activate_threads_#t~ret11 := is_transmit3_triggered_#res;activate_threads_~tmp___2~0 := activate_threads_#t~ret11;havoc activate_threads_#t~ret11; 11228#L663-18 assume 0 != activate_threads_~tmp___2~0;~t3_st~0 := 0; 11218#L663-20 havoc is_transmit4_triggered_#res;havoc is_transmit4_triggered_~__retres1~4;havoc is_transmit4_triggered_~__retres1~4; 11219#L328-18 assume !(1 == ~t4_pc~0); 11323#L328-20 is_transmit4_triggered_~__retres1~4 := 0; 11324#L339-6 is_transmit4_triggered_#res := is_transmit4_triggered_~__retres1~4; 11264#L340-6 activate_threads_#t~ret12 := is_transmit4_triggered_#res;activate_threads_~tmp___3~0 := activate_threads_#t~ret12;havoc activate_threads_#t~ret12; 11265#L671-18 assume 0 != activate_threads_~tmp___3~0;~t4_st~0 := 0; 11367#L671-20 assume 1 == ~M_E~0;~M_E~0 := 2; 11139#L574-3 assume 1 == ~T1_E~0;~T1_E~0 := 2; 11140#L579-3 assume 1 == ~T2_E~0;~T2_E~0 := 2; 11215#L584-3 assume 1 == ~T3_E~0;~T3_E~0 := 2; 11091#L589-3 assume !(1 == ~T4_E~0); 11092#L594-3 assume 1 == ~E_M~0;~E_M~0 := 2; 11114#L599-3 assume !(1 == ~E_1~0); 11115#L604-3 assume 1 == ~E_2~0;~E_2~0 := 2; 11036#L609-3 assume 1 == ~E_3~0;~E_3~0 := 2; 11037#L614-3 assume 1 == ~E_4~0;~E_4~0 := 2; 11242#L619-3 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~5;havoc exists_runnable_thread_~__retres1~5; 11233#L388-1 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~5 := 1; 11058#L415-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~5; 11451#L416-1 start_simulation_#t~ret14 := exists_runnable_thread_#res;start_simulation_~tmp~3 := start_simulation_#t~ret14;havoc start_simulation_#t~ret14; 11327#L824 assume !(0 == start_simulation_~tmp~3); 11328#L824-1 havoc stop_simulation_#res;havoc stop_simulation_#t~ret13, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~5;havoc exists_runnable_thread_~__retres1~5; 11237#L388-2 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~5 := 1; 11032#L415-2 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~5; 11466#L416-2 stop_simulation_#t~ret13 := exists_runnable_thread_#res;stop_simulation_~tmp~2 := stop_simulation_#t~ret13;havoc stop_simulation_#t~ret13; 13018#L779 assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; 13017#L786 stop_simulation_#res := stop_simulation_~__retres2~0; 13016#L787 start_simulation_#t~ret15 := stop_simulation_#res;start_simulation_~tmp___0~1 := start_simulation_#t~ret15;havoc start_simulation_#t~ret15; 12882#L837 assume !(0 != start_simulation_~tmp___0~1); 11454#L805-1 [2018-11-23 08:02:22,398 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 08:02:22,398 INFO L82 PathProgramCache]: Analyzing trace with hash -819887744, now seen corresponding path program 1 times [2018-11-23 08:02:22,398 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 08:02:22,399 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 08:02:22,399 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:02:22,399 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 08:02:22,399 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:02:22,404 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 08:02:22,422 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 08:02:22,423 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 08:02:22,423 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-11-23 08:02:22,423 INFO L799 eck$LassoCheckResult]: stem already infeasible [2018-11-23 08:02:22,423 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 08:02:22,423 INFO L82 PathProgramCache]: Analyzing trace with hash -260605432, now seen corresponding path program 1 times [2018-11-23 08:02:22,423 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 08:02:22,424 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 08:02:22,424 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:02:22,424 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 08:02:22,425 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:02:22,429 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 08:02:22,446 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 08:02:22,446 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 08:02:22,446 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-23 08:02:22,446 INFO L811 eck$LassoCheckResult]: loop already infeasible [2018-11-23 08:02:22,447 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-23 08:02:22,447 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-23 08:02:22,447 INFO L87 Difference]: Start difference. First operand 2336 states and 3428 transitions. cyclomatic complexity: 1100 Second operand 3 states. [2018-11-23 08:02:22,471 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 08:02:22,471 INFO L93 Difference]: Finished difference Result 2336 states and 3402 transitions. [2018-11-23 08:02:22,472 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-23 08:02:22,472 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 2336 states and 3402 transitions. [2018-11-23 08:02:22,483 INFO L131 ngComponentsAnalysis]: Automaton has 8 accepting balls. 2252 [2018-11-23 08:02:22,494 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 2336 states to 2336 states and 3402 transitions. [2018-11-23 08:02:22,494 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 2336 [2018-11-23 08:02:22,496 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 2336 [2018-11-23 08:02:22,496 INFO L73 IsDeterministic]: Start isDeterministic. Operand 2336 states and 3402 transitions. [2018-11-23 08:02:22,500 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2018-11-23 08:02:22,500 INFO L705 BuchiCegarLoop]: Abstraction has 2336 states and 3402 transitions. [2018-11-23 08:02:22,502 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2336 states and 3402 transitions. [2018-11-23 08:02:22,530 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2336 to 2336. [2018-11-23 08:02:22,530 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2336 states. [2018-11-23 08:02:22,536 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2336 states to 2336 states and 3402 transitions. [2018-11-23 08:02:22,536 INFO L728 BuchiCegarLoop]: Abstraction has 2336 states and 3402 transitions. [2018-11-23 08:02:22,536 INFO L608 BuchiCegarLoop]: Abstraction has 2336 states and 3402 transitions. [2018-11-23 08:02:22,536 INFO L442 BuchiCegarLoop]: ======== Iteration 10============ [2018-11-23 08:02:22,536 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 2336 states and 3402 transitions. [2018-11-23 08:02:22,545 INFO L131 ngComponentsAnalysis]: Automaton has 8 accepting balls. 2252 [2018-11-23 08:02:22,545 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2018-11-23 08:02:22,546 INFO L119 BuchiIsEmpty]: Starting construction of run [2018-11-23 08:02:22,546 INFO L866 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 08:02:22,547 INFO L867 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 08:02:22,547 INFO L794 eck$LassoCheckResult]: Stem: 16051#ULTIMATE.startENTRY ~m_pc~0 := 0;~t1_pc~0 := 0;~t2_pc~0 := 0;~t3_pc~0 := 0;~t4_pc~0 := 0;~m_st~0 := 0;~t1_st~0 := 0;~t2_st~0 := 0;~t3_st~0 := 0;~t4_st~0 := 0;~m_i~0 := 0;~t1_i~0 := 0;~t2_i~0 := 0;~t3_i~0 := 0;~t4_i~0 := 0;~M_E~0 := 2;~T1_E~0 := 2;~T2_E~0 := 2;~T3_E~0 := 2;~T4_E~0 := 2;~E_M~0 := 2;~E_1~0 := 2;~E_2~0 := 2;~E_3~0 := 2;~E_4~0 := 2;~token~0 := 0;~local~0 := 0; 15960#L-1 havoc main_#res;havoc main_~__retres1~6;havoc main_~__retres1~6;~m_i~0 := 1;~t1_i~0 := 1;~t2_i~0 := 1;~t3_i~0 := 1;~t4_i~0 := 1; 15961#L768 havoc start_simulation_#t~ret14, start_simulation_#t~ret15, start_simulation_~kernel_st~0, start_simulation_~tmp~3, start_simulation_~tmp___0~1;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;havoc start_simulation_~tmp___0~1;start_simulation_~kernel_st~0 := 0; 16112#L348 assume 1 == ~m_i~0;~m_st~0 := 0; 15916#L355-1 assume 1 == ~t1_i~0;~t1_st~0 := 0; 15917#L360-1 assume 1 == ~t2_i~0;~t2_st~0 := 0; 15803#L365-1 assume 1 == ~t3_i~0;~t3_st~0 := 0; 15804#L370-1 assume 1 == ~t4_i~0;~t4_st~0 := 0; 15886#L375-1 assume !(0 == ~M_E~0); 15887#L516-1 assume !(0 == ~T1_E~0); 15719#L521-1 assume !(0 == ~T2_E~0); 15720#L526-1 assume !(0 == ~T3_E~0); 15924#L531-1 assume !(0 == ~T4_E~0); 15925#L536-1 assume !(0 == ~E_M~0); 15821#L541-1 assume !(0 == ~E_1~0); 15822#L546-1 assume !(0 == ~E_2~0); 15895#L551-1 assume !(0 == ~E_3~0); 15767#L556-1 assume !(0 == ~E_4~0); 15768#L561-1 havoc activate_threads_#t~ret8, activate_threads_#t~ret9, activate_threads_#t~ret10, activate_threads_#t~ret11, activate_threads_#t~ret12, activate_threads_~tmp~1, activate_threads_~tmp___0~0, activate_threads_~tmp___1~0, activate_threads_~tmp___2~0, activate_threads_~tmp___3~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc activate_threads_~tmp___1~0;havoc activate_threads_~tmp___2~0;havoc activate_threads_~tmp___3~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; 15958#L252 assume !(1 == ~m_pc~0); 15940#L252-2 is_master_triggered_~__retres1~0 := 0; 15941#L263 is_master_triggered_#res := is_master_triggered_~__retres1~0; 15959#L264 activate_threads_#t~ret8 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret8;havoc activate_threads_#t~ret8; 16036#L639 assume !(0 != activate_threads_~tmp~1); 15890#L639-2 havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; 15891#L271 assume !(1 == ~t1_pc~0); 16102#L271-2 is_transmit1_triggered_~__retres1~1 := 0; 16104#L282 is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; 16105#L283 activate_threads_#t~ret9 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret9;havoc activate_threads_#t~ret9; 16129#L647 assume !(0 != activate_threads_~tmp___0~0); 16130#L647-2 havoc is_transmit2_triggered_#res;havoc is_transmit2_triggered_~__retres1~2;havoc is_transmit2_triggered_~__retres1~2; 15729#L290 assume !(1 == ~t2_pc~0); 15717#L290-2 is_transmit2_triggered_~__retres1~2 := 0; 15718#L301 is_transmit2_triggered_#res := is_transmit2_triggered_~__retres1~2; 15730#L302 activate_threads_#t~ret10 := is_transmit2_triggered_#res;activate_threads_~tmp___1~0 := activate_threads_#t~ret10;havoc activate_threads_#t~ret10; 15773#L655 assume !(0 != activate_threads_~tmp___1~0); 15761#L655-2 havoc is_transmit3_triggered_#res;havoc is_transmit3_triggered_~__retres1~3;havoc is_transmit3_triggered_~__retres1~3; 15762#L309 assume !(1 == ~t3_pc~0); 15809#L309-2 is_transmit3_triggered_~__retres1~3 := 0; 15808#L320 is_transmit3_triggered_#res := is_transmit3_triggered_~__retres1~3; 15805#L321 activate_threads_#t~ret11 := is_transmit3_triggered_#res;activate_threads_~tmp___2~0 := activate_threads_#t~ret11;havoc activate_threads_#t~ret11; 15806#L663 assume !(0 != activate_threads_~tmp___2~0); 15933#L663-2 havoc is_transmit4_triggered_#res;havoc is_transmit4_triggered_~__retres1~4;havoc is_transmit4_triggered_~__retres1~4; 15934#L328 assume !(1 == ~t4_pc~0); 16032#L328-2 is_transmit4_triggered_~__retres1~4 := 0; 16030#L339 is_transmit4_triggered_#res := is_transmit4_triggered_~__retres1~4; 15962#L340 activate_threads_#t~ret12 := is_transmit4_triggered_#res;activate_threads_~tmp___3~0 := activate_threads_#t~ret12;havoc activate_threads_#t~ret12; 15963#L671 assume !(0 != activate_threads_~tmp___3~0); 16077#L671-2 assume !(1 == ~M_E~0); 15819#L574-1 assume !(1 == ~T1_E~0); 15820#L579-1 assume !(1 == ~T2_E~0); 15892#L584-1 assume !(1 == ~T3_E~0); 15763#L589-1 assume !(1 == ~T4_E~0); 15764#L594-1 assume !(1 == ~E_M~0); 15677#L599-1 assume !(1 == ~E_1~0); 15678#L604-1 assume !(1 == ~E_2~0); 15743#L609-1 assume !(1 == ~E_3~0); 15744#L614-1 assume 1 == ~E_4~0;~E_4~0 := 2; 15827#L805-1 [2018-11-23 08:02:22,547 INFO L796 eck$LassoCheckResult]: Loop: 15827#L805-1 assume !false; 15828#L806 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret2, eval_#t~nondet3, eval_~tmp_ndt_1~0, eval_#t~nondet4, eval_~tmp_ndt_2~0, eval_#t~nondet5, eval_~tmp_ndt_3~0, eval_#t~nondet6, eval_~tmp_ndt_4~0, eval_#t~nondet7, eval_~tmp_ndt_5~0, eval_~tmp~0;havoc eval_~tmp~0; 15724#L491 assume !false; 16118#L426 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~5;havoc exists_runnable_thread_~__retres1~5; 15910#L388 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~5 := 1; 15734#L415 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~5; 16127#L416 eval_#t~ret2 := exists_runnable_thread_#res;eval_~tmp~0 := eval_#t~ret2;havoc eval_#t~ret2; 15880#L430 assume !(0 != eval_~tmp~0); 15882#L506 start_simulation_~kernel_st~0 := 2; 18006#L348-1 start_simulation_~kernel_st~0 := 3; 18005#L516-2 assume 0 == ~M_E~0;~M_E~0 := 1; 18004#L516-4 assume !(0 == ~T1_E~0); 18003#L521-3 assume 0 == ~T2_E~0;~T2_E~0 := 1; 18002#L526-3 assume 0 == ~T3_E~0;~T3_E~0 := 1; 18001#L531-3 assume !(0 == ~T4_E~0); 18000#L536-3 assume 0 == ~E_M~0;~E_M~0 := 1; 17999#L541-3 assume 0 == ~E_1~0;~E_1~0 := 1; 17998#L546-3 assume 0 == ~E_2~0;~E_2~0 := 1; 17997#L551-3 assume 0 == ~E_3~0;~E_3~0 := 1; 15752#L556-3 assume !(0 == ~E_4~0); 15753#L561-3 havoc activate_threads_#t~ret8, activate_threads_#t~ret9, activate_threads_#t~ret10, activate_threads_#t~ret11, activate_threads_#t~ret12, activate_threads_~tmp~1, activate_threads_~tmp___0~0, activate_threads_~tmp___1~0, activate_threads_~tmp___2~0, activate_threads_~tmp___3~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc activate_threads_~tmp___1~0;havoc activate_threads_~tmp___2~0;havoc activate_threads_~tmp___3~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; 17969#L252-18 assume !(1 == ~m_pc~0); 17968#L252-20 is_master_triggered_~__retres1~0 := 0; 17967#L263-6 is_master_triggered_#res := is_master_triggered_~__retres1~0; 17966#L264-6 activate_threads_#t~ret8 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret8;havoc activate_threads_#t~ret8; 15853#L639-18 assume 0 != activate_threads_~tmp~1;~m_st~0 := 0; 15854#L639-20 havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; 15859#L271-18 assume 1 == ~t1_pc~0; 16133#L272-6 assume 1 == ~E_1~0;is_transmit1_triggered_~__retres1~1 := 1; 16093#L282-6 is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; 16094#L283-6 activate_threads_#t~ret9 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret9;havoc activate_threads_#t~ret9; 16025#L647-18 assume !(0 != activate_threads_~tmp___0~0); 16010#L647-20 havoc is_transmit2_triggered_#res;havoc is_transmit2_triggered_~__retres1~2;havoc is_transmit2_triggered_~__retres1~2; 15673#L290-18 assume !(1 == ~t2_pc~0); 15674#L290-20 is_transmit2_triggered_~__retres1~2 := 0; 15689#L301-6 is_transmit2_triggered_#res := is_transmit2_triggered_~__retres1~2; 15694#L302-6 activate_threads_#t~ret10 := is_transmit2_triggered_#res;activate_threads_~tmp___1~0 := activate_threads_#t~ret10;havoc activate_threads_#t~ret10; 15783#L655-18 assume 0 != activate_threads_~tmp___1~0;~t2_st~0 := 0; 16121#L655-20 havoc is_transmit3_triggered_#res;havoc is_transmit3_triggered_~__retres1~3;havoc is_transmit3_triggered_~__retres1~3; 15831#L309-18 assume !(1 == ~t3_pc~0); 15832#L309-20 is_transmit3_triggered_~__retres1~3 := 0; 15836#L320-6 is_transmit3_triggered_#res := is_transmit3_triggered_~__retres1~3; 15872#L321-6 activate_threads_#t~ret11 := is_transmit3_triggered_#res;activate_threads_~tmp___2~0 := activate_threads_#t~ret11;havoc activate_threads_#t~ret11; 15909#L663-18 assume 0 != activate_threads_~tmp___2~0;~t3_st~0 := 0; 15899#L663-20 havoc is_transmit4_triggered_#res;havoc is_transmit4_triggered_~__retres1~4;havoc is_transmit4_triggered_~__retres1~4; 15900#L328-18 assume !(1 == ~t4_pc~0); 16003#L328-20 is_transmit4_triggered_~__retres1~4 := 0; 16004#L339-6 is_transmit4_triggered_#res := is_transmit4_triggered_~__retres1~4; 15944#L340-6 activate_threads_#t~ret12 := is_transmit4_triggered_#res;activate_threads_~tmp___3~0 := activate_threads_#t~ret12;havoc activate_threads_#t~ret12; 15945#L671-18 assume 0 != activate_threads_~tmp___3~0;~t4_st~0 := 0; 16045#L671-20 assume 1 == ~M_E~0;~M_E~0 := 2; 15823#L574-3 assume !(1 == ~T1_E~0); 15824#L579-3 assume 1 == ~T2_E~0;~T2_E~0 := 2; 15896#L584-3 assume 1 == ~T3_E~0;~T3_E~0 := 2; 15770#L589-3 assume !(1 == ~T4_E~0); 15771#L594-3 assume 1 == ~E_M~0;~E_M~0 := 2; 15793#L599-3 assume !(1 == ~E_1~0); 15794#L604-3 assume 1 == ~E_2~0;~E_2~0 := 2; 15715#L609-3 assume 1 == ~E_3~0;~E_3~0 := 2; 15716#L614-3 assume 1 == ~E_4~0;~E_4~0 := 2; 15923#L619-3 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~5;havoc exists_runnable_thread_~__retres1~5; 15914#L388-1 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~5 := 1; 15737#L415-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~5; 16128#L416-1 start_simulation_#t~ret14 := exists_runnable_thread_#res;start_simulation_~tmp~3 := start_simulation_#t~ret14;havoc start_simulation_#t~ret14; 16007#L824 assume !(0 == start_simulation_~tmp~3); 16009#L824-1 havoc stop_simulation_#res;havoc stop_simulation_#t~ret13, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~5;havoc exists_runnable_thread_~__retres1~5; 15918#L388-2 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~5 := 1; 15711#L415-2 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~5; 16028#L416-2 stop_simulation_#t~ret13 := exists_runnable_thread_#res;stop_simulation_~tmp~2 := stop_simulation_#t~ret13;havoc stop_simulation_#t~ret13; 16029#L779 assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; 15685#L786 stop_simulation_#res := stop_simulation_~__retres2~0; 15686#L787 start_simulation_#t~ret15 := stop_simulation_#res;start_simulation_~tmp___0~1 := start_simulation_#t~ret15;havoc start_simulation_#t~ret15; 15772#L837 assume !(0 != start_simulation_~tmp___0~1); 15827#L805-1 [2018-11-23 08:02:22,547 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 08:02:22,547 INFO L82 PathProgramCache]: Analyzing trace with hash -139829374, now seen corresponding path program 1 times [2018-11-23 08:02:22,547 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 08:02:22,548 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 08:02:22,548 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:02:22,548 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 08:02:22,549 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:02:22,553 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 08:02:22,584 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 08:02:22,584 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 08:02:22,584 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2018-11-23 08:02:22,584 INFO L799 eck$LassoCheckResult]: stem already infeasible [2018-11-23 08:02:22,585 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 08:02:22,585 INFO L82 PathProgramCache]: Analyzing trace with hash -41750714, now seen corresponding path program 1 times [2018-11-23 08:02:22,585 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 08:02:22,585 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 08:02:22,586 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:02:22,586 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 08:02:22,586 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:02:22,590 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 08:02:22,636 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 08:02:22,636 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 08:02:22,636 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-23 08:02:22,636 INFO L811 eck$LassoCheckResult]: loop already infeasible [2018-11-23 08:02:22,637 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-23 08:02:22,637 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-23 08:02:22,637 INFO L87 Difference]: Start difference. First operand 2336 states and 3402 transitions. cyclomatic complexity: 1074 Second operand 3 states. [2018-11-23 08:02:22,680 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 08:02:22,681 INFO L93 Difference]: Finished difference Result 2336 states and 3356 transitions. [2018-11-23 08:02:22,682 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-23 08:02:22,682 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 2336 states and 3356 transitions. [2018-11-23 08:02:22,693 INFO L131 ngComponentsAnalysis]: Automaton has 8 accepting balls. 2252 [2018-11-23 08:02:22,703 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 2336 states to 2336 states and 3356 transitions. [2018-11-23 08:02:22,704 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 2336 [2018-11-23 08:02:22,705 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 2336 [2018-11-23 08:02:22,705 INFO L73 IsDeterministic]: Start isDeterministic. Operand 2336 states and 3356 transitions. [2018-11-23 08:02:22,708 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2018-11-23 08:02:22,708 INFO L705 BuchiCegarLoop]: Abstraction has 2336 states and 3356 transitions. [2018-11-23 08:02:22,710 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2336 states and 3356 transitions. [2018-11-23 08:02:22,737 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2336 to 2336. [2018-11-23 08:02:22,737 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2336 states. [2018-11-23 08:02:22,743 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2336 states to 2336 states and 3356 transitions. [2018-11-23 08:02:22,744 INFO L728 BuchiCegarLoop]: Abstraction has 2336 states and 3356 transitions. [2018-11-23 08:02:22,744 INFO L608 BuchiCegarLoop]: Abstraction has 2336 states and 3356 transitions. [2018-11-23 08:02:22,744 INFO L442 BuchiCegarLoop]: ======== Iteration 11============ [2018-11-23 08:02:22,744 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 2336 states and 3356 transitions. [2018-11-23 08:02:22,751 INFO L131 ngComponentsAnalysis]: Automaton has 8 accepting balls. 2252 [2018-11-23 08:02:22,751 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2018-11-23 08:02:22,751 INFO L119 BuchiIsEmpty]: Starting construction of run [2018-11-23 08:02:22,752 INFO L866 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 08:02:22,752 INFO L867 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 08:02:22,752 INFO L794 eck$LassoCheckResult]: Stem: 20721#ULTIMATE.startENTRY ~m_pc~0 := 0;~t1_pc~0 := 0;~t2_pc~0 := 0;~t3_pc~0 := 0;~t4_pc~0 := 0;~m_st~0 := 0;~t1_st~0 := 0;~t2_st~0 := 0;~t3_st~0 := 0;~t4_st~0 := 0;~m_i~0 := 0;~t1_i~0 := 0;~t2_i~0 := 0;~t3_i~0 := 0;~t4_i~0 := 0;~M_E~0 := 2;~T1_E~0 := 2;~T2_E~0 := 2;~T3_E~0 := 2;~T4_E~0 := 2;~E_M~0 := 2;~E_1~0 := 2;~E_2~0 := 2;~E_3~0 := 2;~E_4~0 := 2;~token~0 := 0;~local~0 := 0; 20636#L-1 havoc main_#res;havoc main_~__retres1~6;havoc main_~__retres1~6;~m_i~0 := 1;~t1_i~0 := 1;~t2_i~0 := 1;~t3_i~0 := 1;~t4_i~0 := 1; 20637#L768 havoc start_simulation_#t~ret14, start_simulation_#t~ret15, start_simulation_~kernel_st~0, start_simulation_~tmp~3, start_simulation_~tmp___0~1;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;havoc start_simulation_~tmp___0~1;start_simulation_~kernel_st~0 := 0; 20775#L348 assume 1 == ~m_i~0;~m_st~0 := 0; 20592#L355-1 assume 1 == ~t1_i~0;~t1_st~0 := 0; 20593#L360-1 assume 1 == ~t2_i~0;~t2_st~0 := 0; 20477#L365-1 assume 1 == ~t3_i~0;~t3_st~0 := 0; 20478#L370-1 assume 1 == ~t4_i~0;~t4_st~0 := 0; 20562#L375-1 assume !(0 == ~M_E~0); 20563#L516-1 assume !(0 == ~T1_E~0); 20402#L521-1 assume !(0 == ~T2_E~0); 20403#L526-1 assume !(0 == ~T3_E~0); 20600#L531-1 assume !(0 == ~T4_E~0); 20601#L536-1 assume !(0 == ~E_M~0); 20495#L541-1 assume !(0 == ~E_1~0); 20496#L546-1 assume !(0 == ~E_2~0); 20570#L551-1 assume !(0 == ~E_3~0); 20450#L556-1 assume !(0 == ~E_4~0); 20451#L561-1 havoc activate_threads_#t~ret8, activate_threads_#t~ret9, activate_threads_#t~ret10, activate_threads_#t~ret11, activate_threads_#t~ret12, activate_threads_~tmp~1, activate_threads_~tmp___0~0, activate_threads_~tmp___1~0, activate_threads_~tmp___2~0, activate_threads_~tmp___3~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc activate_threads_~tmp___1~0;havoc activate_threads_~tmp___2~0;havoc activate_threads_~tmp___3~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; 20634#L252 assume !(1 == ~m_pc~0); 20618#L252-2 is_master_triggered_~__retres1~0 := 0; 20619#L263 is_master_triggered_#res := is_master_triggered_~__retres1~0; 20635#L264 activate_threads_#t~ret8 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret8;havoc activate_threads_#t~ret8; 20708#L639 assume !(0 != activate_threads_~tmp~1); 20565#L639-2 havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; 20566#L271 assume !(1 == ~t1_pc~0); 20765#L271-2 is_transmit1_triggered_~__retres1~1 := 0; 20767#L282 is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; 20768#L283 activate_threads_#t~ret9 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret9;havoc activate_threads_#t~ret9; 20797#L647 assume !(0 != activate_threads_~tmp___0~0); 20798#L647-2 havoc is_transmit2_triggered_#res;havoc is_transmit2_triggered_~__retres1~2;havoc is_transmit2_triggered_~__retres1~2; 20412#L290 assume !(1 == ~t2_pc~0); 20400#L290-2 is_transmit2_triggered_~__retres1~2 := 0; 20401#L301 is_transmit2_triggered_#res := is_transmit2_triggered_~__retres1~2; 20413#L302 activate_threads_#t~ret10 := is_transmit2_triggered_#res;activate_threads_~tmp___1~0 := activate_threads_#t~ret10;havoc activate_threads_#t~ret10; 20456#L655 assume !(0 != activate_threads_~tmp___1~0); 20444#L655-2 havoc is_transmit3_triggered_#res;havoc is_transmit3_triggered_~__retres1~3;havoc is_transmit3_triggered_~__retres1~3; 20445#L309 assume !(1 == ~t3_pc~0); 20483#L309-2 is_transmit3_triggered_~__retres1~3 := 0; 20482#L320 is_transmit3_triggered_#res := is_transmit3_triggered_~__retres1~3; 20479#L321 activate_threads_#t~ret11 := is_transmit3_triggered_#res;activate_threads_~tmp___2~0 := activate_threads_#t~ret11;havoc activate_threads_#t~ret11; 20480#L663 assume !(0 != activate_threads_~tmp___2~0); 20609#L663-2 havoc is_transmit4_triggered_#res;havoc is_transmit4_triggered_~__retres1~4;havoc is_transmit4_triggered_~__retres1~4; 20610#L328 assume !(1 == ~t4_pc~0); 20705#L328-2 is_transmit4_triggered_~__retres1~4 := 0; 20703#L339 is_transmit4_triggered_#res := is_transmit4_triggered_~__retres1~4; 20638#L340 activate_threads_#t~ret12 := is_transmit4_triggered_#res;activate_threads_~tmp___3~0 := activate_threads_#t~ret12;havoc activate_threads_#t~ret12; 20639#L671 assume !(0 != activate_threads_~tmp___3~0); 20741#L671-2 assume !(1 == ~M_E~0); 20493#L574-1 assume !(1 == ~T1_E~0); 20494#L579-1 assume !(1 == ~T2_E~0); 20567#L584-1 assume !(1 == ~T3_E~0); 20446#L589-1 assume !(1 == ~T4_E~0); 20447#L594-1 assume !(1 == ~E_M~0); 20356#L599-1 assume !(1 == ~E_1~0); 20357#L604-1 assume !(1 == ~E_2~0); 20426#L609-1 assume !(1 == ~E_3~0); 20427#L614-1 assume !(1 == ~E_4~0); 20799#L805-1 [2018-11-23 08:02:22,752 INFO L796 eck$LassoCheckResult]: Loop: 20799#L805-1 assume !false; 21573#L806 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret2, eval_#t~nondet3, eval_~tmp_ndt_1~0, eval_#t~nondet4, eval_~tmp_ndt_2~0, eval_#t~nondet5, eval_~tmp_ndt_3~0, eval_#t~nondet6, eval_~tmp_ndt_4~0, eval_#t~nondet7, eval_~tmp_ndt_5~0, eval_~tmp~0;havoc eval_~tmp~0; 21570#L491 assume !false; 21568#L426 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~5;havoc exists_runnable_thread_~__retres1~5; 21566#L388 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~5 := 1; 21561#L415 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~5; 21560#L416 eval_#t~ret2 := exists_runnable_thread_#res;eval_~tmp~0 := eval_#t~ret2;havoc eval_#t~ret2; 21558#L430 assume !(0 != eval_~tmp~0); 21559#L506 start_simulation_~kernel_st~0 := 2; 21736#L348-1 start_simulation_~kernel_st~0 := 3; 21735#L516-2 assume 0 == ~M_E~0;~M_E~0 := 1; 21734#L516-4 assume !(0 == ~T1_E~0); 21733#L521-3 assume 0 == ~T2_E~0;~T2_E~0 := 1; 21732#L526-3 assume 0 == ~T3_E~0;~T3_E~0 := 1; 21731#L531-3 assume !(0 == ~T4_E~0); 21729#L536-3 assume 0 == ~E_M~0;~E_M~0 := 1; 21727#L541-3 assume 0 == ~E_1~0;~E_1~0 := 1; 21725#L546-3 assume 0 == ~E_2~0;~E_2~0 := 1; 21723#L551-3 assume 0 == ~E_3~0;~E_3~0 := 1; 21721#L556-3 assume !(0 == ~E_4~0); 21719#L561-3 havoc activate_threads_#t~ret8, activate_threads_#t~ret9, activate_threads_#t~ret10, activate_threads_#t~ret11, activate_threads_#t~ret12, activate_threads_~tmp~1, activate_threads_~tmp___0~0, activate_threads_~tmp___1~0, activate_threads_~tmp___2~0, activate_threads_~tmp___3~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc activate_threads_~tmp___1~0;havoc activate_threads_~tmp___2~0;havoc activate_threads_~tmp___3~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; 21717#L252-18 assume !(1 == ~m_pc~0); 21714#L252-20 is_master_triggered_~__retres1~0 := 0; 21712#L263-6 is_master_triggered_#res := is_master_triggered_~__retres1~0; 21710#L264-6 activate_threads_#t~ret8 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret8;havoc activate_threads_#t~ret8; 21708#L639-18 assume 0 != activate_threads_~tmp~1;~m_st~0 := 0; 21706#L639-20 havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; 21704#L271-18 assume 1 == ~t1_pc~0; 21701#L272-6 assume 1 == ~E_1~0;is_transmit1_triggered_~__retres1~1 := 1; 21699#L282-6 is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; 21697#L283-6 activate_threads_#t~ret9 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret9;havoc activate_threads_#t~ret9; 21695#L647-18 assume !(0 != activate_threads_~tmp___0~0); 21693#L647-20 havoc is_transmit2_triggered_#res;havoc is_transmit2_triggered_~__retres1~2;havoc is_transmit2_triggered_~__retres1~2; 21691#L290-18 assume !(1 == ~t2_pc~0); 21688#L290-20 is_transmit2_triggered_~__retres1~2 := 0; 21686#L301-6 is_transmit2_triggered_#res := is_transmit2_triggered_~__retres1~2; 21684#L302-6 activate_threads_#t~ret10 := is_transmit2_triggered_#res;activate_threads_~tmp___1~0 := activate_threads_#t~ret10;havoc activate_threads_#t~ret10; 21682#L655-18 assume 0 != activate_threads_~tmp___1~0;~t2_st~0 := 0; 21680#L655-20 havoc is_transmit3_triggered_#res;havoc is_transmit3_triggered_~__retres1~3;havoc is_transmit3_triggered_~__retres1~3; 21678#L309-18 assume !(1 == ~t3_pc~0); 21675#L309-20 is_transmit3_triggered_~__retres1~3 := 0; 21673#L320-6 is_transmit3_triggered_#res := is_transmit3_triggered_~__retres1~3; 21671#L321-6 activate_threads_#t~ret11 := is_transmit3_triggered_#res;activate_threads_~tmp___2~0 := activate_threads_#t~ret11;havoc activate_threads_#t~ret11; 21669#L663-18 assume 0 != activate_threads_~tmp___2~0;~t3_st~0 := 0; 21667#L663-20 havoc is_transmit4_triggered_#res;havoc is_transmit4_triggered_~__retres1~4;havoc is_transmit4_triggered_~__retres1~4; 21665#L328-18 assume !(1 == ~t4_pc~0); 21663#L328-20 is_transmit4_triggered_~__retres1~4 := 0; 21661#L339-6 is_transmit4_triggered_#res := is_transmit4_triggered_~__retres1~4; 21659#L340-6 activate_threads_#t~ret12 := is_transmit4_triggered_#res;activate_threads_~tmp___3~0 := activate_threads_#t~ret12;havoc activate_threads_#t~ret12; 21657#L671-18 assume 0 != activate_threads_~tmp___3~0;~t4_st~0 := 0; 21655#L671-20 assume 1 == ~M_E~0;~M_E~0 := 2; 21653#L574-3 assume !(1 == ~T1_E~0); 21651#L579-3 assume 1 == ~T2_E~0;~T2_E~0 := 2; 21650#L584-3 assume 1 == ~T3_E~0;~T3_E~0 := 2; 21649#L589-3 assume !(1 == ~T4_E~0); 21648#L594-3 assume 1 == ~E_M~0;~E_M~0 := 2; 21647#L599-3 assume !(1 == ~E_1~0); 21645#L604-3 assume 1 == ~E_2~0;~E_2~0 := 2; 21643#L609-3 assume 1 == ~E_3~0;~E_3~0 := 2; 21641#L614-3 assume !(1 == ~E_4~0); 21639#L619-3 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~5;havoc exists_runnable_thread_~__retres1~5; 21632#L388-1 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~5 := 1; 21627#L415-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~5; 21625#L416-1 start_simulation_#t~ret14 := exists_runnable_thread_#res;start_simulation_~tmp~3 := start_simulation_#t~ret14;havoc start_simulation_#t~ret14; 21622#L824 assume !(0 == start_simulation_~tmp~3); 21619#L824-1 havoc stop_simulation_#res;havoc stop_simulation_#t~ret13, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~5;havoc exists_runnable_thread_~__retres1~5; 21617#L388-2 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~5 := 1; 21611#L415-2 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~5; 21609#L416-2 stop_simulation_#t~ret13 := exists_runnable_thread_#res;stop_simulation_~tmp~2 := stop_simulation_#t~ret13;havoc stop_simulation_#t~ret13; 21607#L779 assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; 21605#L786 stop_simulation_#res := stop_simulation_~__retres2~0; 21603#L787 start_simulation_#t~ret15 := stop_simulation_#res;start_simulation_~tmp___0~1 := start_simulation_#t~ret15;havoc start_simulation_#t~ret15; 21601#L837 assume !(0 != start_simulation_~tmp___0~1); 20799#L805-1 [2018-11-23 08:02:22,753 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 08:02:22,753 INFO L82 PathProgramCache]: Analyzing trace with hash -139829372, now seen corresponding path program 1 times [2018-11-23 08:02:22,753 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 08:02:22,753 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 08:02:22,754 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:02:22,754 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 08:02:22,754 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:02:22,759 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-23 08:02:22,763 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-23 08:02:22,793 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 08:02:22,794 INFO L82 PathProgramCache]: Analyzing trace with hash -1052867964, now seen corresponding path program 1 times [2018-11-23 08:02:22,794 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 08:02:22,794 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 08:02:22,795 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:02:22,795 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 08:02:22,795 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:02:22,799 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 08:02:22,815 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 08:02:22,815 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 08:02:22,815 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-23 08:02:22,816 INFO L811 eck$LassoCheckResult]: loop already infeasible [2018-11-23 08:02:22,816 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-23 08:02:22,816 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-23 08:02:22,816 INFO L87 Difference]: Start difference. First operand 2336 states and 3356 transitions. cyclomatic complexity: 1028 Second operand 3 states. [2018-11-23 08:02:22,904 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 08:02:22,904 INFO L93 Difference]: Finished difference Result 4198 states and 5958 transitions. [2018-11-23 08:02:22,904 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-23 08:02:22,904 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 4198 states and 5958 transitions. [2018-11-23 08:02:22,922 INFO L131 ngComponentsAnalysis]: Automaton has 8 accepting balls. 4048 [2018-11-23 08:02:22,969 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 4198 states to 4198 states and 5958 transitions. [2018-11-23 08:02:22,969 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 4198 [2018-11-23 08:02:22,972 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 4198 [2018-11-23 08:02:22,972 INFO L73 IsDeterministic]: Start isDeterministic. Operand 4198 states and 5958 transitions. [2018-11-23 08:02:22,976 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2018-11-23 08:02:22,976 INFO L705 BuchiCegarLoop]: Abstraction has 4198 states and 5958 transitions. [2018-11-23 08:02:22,979 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4198 states and 5958 transitions. [2018-11-23 08:02:23,030 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4198 to 4142. [2018-11-23 08:02:23,030 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4142 states. [2018-11-23 08:02:23,040 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4142 states to 4142 states and 5874 transitions. [2018-11-23 08:02:23,041 INFO L728 BuchiCegarLoop]: Abstraction has 4142 states and 5874 transitions. [2018-11-23 08:02:23,041 INFO L608 BuchiCegarLoop]: Abstraction has 4142 states and 5874 transitions. [2018-11-23 08:02:23,041 INFO L442 BuchiCegarLoop]: ======== Iteration 12============ [2018-11-23 08:02:23,041 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 4142 states and 5874 transitions. [2018-11-23 08:02:23,054 INFO L131 ngComponentsAnalysis]: Automaton has 8 accepting balls. 4000 [2018-11-23 08:02:23,054 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2018-11-23 08:02:23,054 INFO L119 BuchiIsEmpty]: Starting construction of run [2018-11-23 08:02:23,055 INFO L866 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 08:02:23,055 INFO L867 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 08:02:23,055 INFO L794 eck$LassoCheckResult]: Stem: 27307#ULTIMATE.startENTRY ~m_pc~0 := 0;~t1_pc~0 := 0;~t2_pc~0 := 0;~t3_pc~0 := 0;~t4_pc~0 := 0;~m_st~0 := 0;~t1_st~0 := 0;~t2_st~0 := 0;~t3_st~0 := 0;~t4_st~0 := 0;~m_i~0 := 0;~t1_i~0 := 0;~t2_i~0 := 0;~t3_i~0 := 0;~t4_i~0 := 0;~M_E~0 := 2;~T1_E~0 := 2;~T2_E~0 := 2;~T3_E~0 := 2;~T4_E~0 := 2;~E_M~0 := 2;~E_1~0 := 2;~E_2~0 := 2;~E_3~0 := 2;~E_4~0 := 2;~token~0 := 0;~local~0 := 0; 27194#L-1 havoc main_#res;havoc main_~__retres1~6;havoc main_~__retres1~6;~m_i~0 := 1;~t1_i~0 := 1;~t2_i~0 := 1;~t3_i~0 := 1;~t4_i~0 := 1; 27195#L768 havoc start_simulation_#t~ret14, start_simulation_#t~ret15, start_simulation_~kernel_st~0, start_simulation_~tmp~3, start_simulation_~tmp___0~1;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;havoc start_simulation_~tmp___0~1;start_simulation_~kernel_st~0 := 0; 27375#L348 assume 1 == ~m_i~0;~m_st~0 := 0; 27144#L355-1 assume 1 == ~t1_i~0;~t1_st~0 := 0; 27145#L360-1 assume 1 == ~t2_i~0;~t2_st~0 := 0; 27018#L365-1 assume 1 == ~t3_i~0;~t3_st~0 := 0; 27019#L370-1 assume 1 == ~t4_i~0;~t4_st~0 := 0; 27107#L375-1 assume !(0 == ~M_E~0); 27108#L516-1 assume !(0 == ~T1_E~0); 26945#L521-1 assume !(0 == ~T2_E~0); 26946#L526-1 assume !(0 == ~T3_E~0); 27151#L531-1 assume !(0 == ~T4_E~0); 27152#L536-1 assume !(0 == ~E_M~0); 27036#L541-1 assume 0 == ~E_1~0;~E_1~0 := 1; 27037#L546-1 assume !(0 == ~E_2~0); 27118#L551-1 assume !(0 == ~E_3~0); 26994#L556-1 assume !(0 == ~E_4~0); 26995#L561-1 havoc activate_threads_#t~ret8, activate_threads_#t~ret9, activate_threads_#t~ret10, activate_threads_#t~ret11, activate_threads_#t~ret12, activate_threads_~tmp~1, activate_threads_~tmp___0~0, activate_threads_~tmp___1~0, activate_threads_~tmp___2~0, activate_threads_~tmp___3~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc activate_threads_~tmp___1~0;havoc activate_threads_~tmp___2~0;havoc activate_threads_~tmp___3~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; 27442#L252 assume !(1 == ~m_pc~0); 27175#L252-2 is_master_triggered_~__retres1~0 := 0; 27176#L263 is_master_triggered_#res := is_master_triggered_~__retres1~0; 27193#L264 activate_threads_#t~ret8 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret8;havoc activate_threads_#t~ret8; 27440#L639 assume !(0 != activate_threads_~tmp~1); 27113#L639-2 havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; 27114#L271 assume !(1 == ~t1_pc~0); 27439#L271-2 is_transmit1_triggered_~__retres1~1 := 0; 27363#L282 is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; 27364#L283 activate_threads_#t~ret9 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret9;havoc activate_threads_#t~ret9; 27404#L647 assume !(0 != activate_threads_~tmp___0~0); 27405#L647-2 havoc is_transmit2_triggered_#res;havoc is_transmit2_triggered_~__retres1~2;havoc is_transmit2_triggered_~__retres1~2; 26955#L290 assume !(1 == ~t2_pc~0); 26942#L290-2 is_transmit2_triggered_~__retres1~2 := 0; 26943#L301 is_transmit2_triggered_#res := is_transmit2_triggered_~__retres1~2; 27017#L302 activate_threads_#t~ret10 := is_transmit2_triggered_#res;activate_threads_~tmp___1~0 := activate_threads_#t~ret10;havoc activate_threads_#t~ret10; 27000#L655 assume !(0 != activate_threads_~tmp___1~0); 27001#L655-2 havoc is_transmit3_triggered_#res;havoc is_transmit3_triggered_~__retres1~3;havoc is_transmit3_triggered_~__retres1~3; 27111#L309 assume !(1 == ~t3_pc~0); 27024#L309-2 is_transmit3_triggered_~__retres1~3 := 0; 27023#L320 is_transmit3_triggered_#res := is_transmit3_triggered_~__retres1~3; 27020#L321 activate_threads_#t~ret11 := is_transmit3_triggered_#res;activate_threads_~tmp___2~0 := activate_threads_#t~ret11;havoc activate_threads_#t~ret11; 27021#L663 assume !(0 != activate_threads_~tmp___2~0); 27162#L663-2 havoc is_transmit4_triggered_#res;havoc is_transmit4_triggered_~__retres1~4;havoc is_transmit4_triggered_~__retres1~4; 27163#L328 assume !(1 == ~t4_pc~0); 27275#L328-2 is_transmit4_triggered_~__retres1~4 := 0; 27446#L339 is_transmit4_triggered_#res := is_transmit4_triggered_~__retres1~4; 27196#L340 activate_threads_#t~ret12 := is_transmit4_triggered_#res;activate_threads_~tmp___3~0 := activate_threads_#t~ret12;havoc activate_threads_#t~ret12; 27197#L671 assume !(0 != activate_threads_~tmp___3~0); 27333#L671-2 assume !(1 == ~M_E~0); 27034#L574-1 assume !(1 == ~T1_E~0); 27035#L579-1 assume !(1 == ~T2_E~0); 27115#L584-1 assume !(1 == ~T3_E~0); 26990#L589-1 assume !(1 == ~T4_E~0); 26991#L594-1 assume !(1 == ~E_M~0); 26897#L599-1 assume 1 == ~E_1~0;~E_1~0 := 2; 26898#L604-1 assume !(1 == ~E_2~0); 26970#L609-1 assume !(1 == ~E_3~0); 26971#L614-1 assume !(1 == ~E_4~0); 27408#L805-1 [2018-11-23 08:02:23,056 INFO L796 eck$LassoCheckResult]: Loop: 27408#L805-1 assume !false; 29881#L806 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret2, eval_#t~nondet3, eval_~tmp_ndt_1~0, eval_#t~nondet4, eval_~tmp_ndt_2~0, eval_#t~nondet5, eval_~tmp_ndt_3~0, eval_#t~nondet6, eval_~tmp_ndt_4~0, eval_#t~nondet7, eval_~tmp_ndt_5~0, eval_~tmp~0;havoc eval_~tmp~0; 29878#L491 assume !false; 29877#L426 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~5;havoc exists_runnable_thread_~__retres1~5; 29876#L388 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~5 := 1; 29871#L415 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~5; 29870#L416 eval_#t~ret2 := exists_runnable_thread_#res;eval_~tmp~0 := eval_#t~ret2;havoc eval_#t~ret2; 29868#L430 assume !(0 != eval_~tmp~0); 29869#L506 start_simulation_~kernel_st~0 := 2; 30118#L348-1 start_simulation_~kernel_st~0 := 3; 30114#L516-2 assume 0 == ~M_E~0;~M_E~0 := 1; 30109#L516-4 assume !(0 == ~T1_E~0); 30105#L521-3 assume 0 == ~T2_E~0;~T2_E~0 := 1; 30101#L526-3 assume 0 == ~T3_E~0;~T3_E~0 := 1; 30097#L531-3 assume !(0 == ~T4_E~0); 30093#L536-3 assume 0 == ~E_M~0;~E_M~0 := 1; 30088#L541-3 assume 0 == ~E_1~0;~E_1~0 := 1; 30085#L546-3 assume 0 == ~E_2~0;~E_2~0 := 1; 30082#L551-3 assume 0 == ~E_3~0;~E_3~0 := 1; 30079#L556-3 assume !(0 == ~E_4~0); 30076#L561-3 havoc activate_threads_#t~ret8, activate_threads_#t~ret9, activate_threads_#t~ret10, activate_threads_#t~ret11, activate_threads_#t~ret12, activate_threads_~tmp~1, activate_threads_~tmp___0~0, activate_threads_~tmp___1~0, activate_threads_~tmp___2~0, activate_threads_~tmp___3~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc activate_threads_~tmp___1~0;havoc activate_threads_~tmp___2~0;havoc activate_threads_~tmp___3~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; 30074#L252-18 assume !(1 == ~m_pc~0); 30072#L252-20 is_master_triggered_~__retres1~0 := 0; 30069#L263-6 is_master_triggered_#res := is_master_triggered_~__retres1~0; 30065#L264-6 activate_threads_#t~ret8 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret8;havoc activate_threads_#t~ret8; 30062#L639-18 assume 0 != activate_threads_~tmp~1;~m_st~0 := 0; 30057#L639-20 havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; 30055#L271-18 assume 1 == ~t1_pc~0; 30052#L272-6 assume 1 == ~E_1~0;is_transmit1_triggered_~__retres1~1 := 1; 30048#L282-6 is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; 30046#L283-6 activate_threads_#t~ret9 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret9;havoc activate_threads_#t~ret9; 30044#L647-18 assume !(0 != activate_threads_~tmp___0~0); 30042#L647-20 havoc is_transmit2_triggered_#res;havoc is_transmit2_triggered_~__retres1~2;havoc is_transmit2_triggered_~__retres1~2; 30040#L290-18 assume !(1 == ~t2_pc~0); 30038#L290-20 is_transmit2_triggered_~__retres1~2 := 0; 30036#L301-6 is_transmit2_triggered_#res := is_transmit2_triggered_~__retres1~2; 30034#L302-6 activate_threads_#t~ret10 := is_transmit2_triggered_#res;activate_threads_~tmp___1~0 := activate_threads_#t~ret10;havoc activate_threads_#t~ret10; 30032#L655-18 assume 0 != activate_threads_~tmp___1~0;~t2_st~0 := 0; 30030#L655-20 havoc is_transmit3_triggered_#res;havoc is_transmit3_triggered_~__retres1~3;havoc is_transmit3_triggered_~__retres1~3; 30028#L309-18 assume !(1 == ~t3_pc~0); 30025#L309-20 is_transmit3_triggered_~__retres1~3 := 0; 30024#L320-6 is_transmit3_triggered_#res := is_transmit3_triggered_~__retres1~3; 30022#L321-6 activate_threads_#t~ret11 := is_transmit3_triggered_#res;activate_threads_~tmp___2~0 := activate_threads_#t~ret11;havoc activate_threads_#t~ret11; 30020#L663-18 assume 0 != activate_threads_~tmp___2~0;~t3_st~0 := 0; 30018#L663-20 havoc is_transmit4_triggered_#res;havoc is_transmit4_triggered_~__retres1~4;havoc is_transmit4_triggered_~__retres1~4; 30014#L328-18 assume !(1 == ~t4_pc~0); 30009#L328-20 is_transmit4_triggered_~__retres1~4 := 0; 30005#L339-6 is_transmit4_triggered_#res := is_transmit4_triggered_~__retres1~4; 29999#L340-6 activate_threads_#t~ret12 := is_transmit4_triggered_#res;activate_threads_~tmp___3~0 := activate_threads_#t~ret12;havoc activate_threads_#t~ret12; 29994#L671-18 assume 0 != activate_threads_~tmp___3~0;~t4_st~0 := 0; 29989#L671-20 assume 1 == ~M_E~0;~M_E~0 := 2; 29984#L574-3 assume !(1 == ~T1_E~0); 29979#L579-3 assume 1 == ~T2_E~0;~T2_E~0 := 2; 29974#L584-3 assume 1 == ~T3_E~0;~T3_E~0 := 2; 29969#L589-3 assume !(1 == ~T4_E~0); 29964#L594-3 assume 1 == ~E_M~0;~E_M~0 := 2; 29959#L599-3 assume 1 == ~E_1~0;~E_1~0 := 2; 29954#L604-3 assume 1 == ~E_2~0;~E_2~0 := 2; 29950#L609-3 assume 1 == ~E_3~0;~E_3~0 := 2; 29945#L614-3 assume !(1 == ~E_4~0); 29941#L619-3 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~5;havoc exists_runnable_thread_~__retres1~5; 29935#L388-1 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~5 := 1; 29927#L415-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~5; 29923#L416-1 start_simulation_#t~ret14 := exists_runnable_thread_#res;start_simulation_~tmp~3 := start_simulation_#t~ret14;havoc start_simulation_#t~ret14; 29918#L824 assume !(0 == start_simulation_~tmp~3); 29914#L824-1 havoc stop_simulation_#res;havoc stop_simulation_#t~ret13, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~5;havoc exists_runnable_thread_~__retres1~5; 29911#L388-2 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~5 := 1; 29904#L415-2 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~5; 29901#L416-2 stop_simulation_#t~ret13 := exists_runnable_thread_#res;stop_simulation_~tmp~2 := stop_simulation_#t~ret13;havoc stop_simulation_#t~ret13; 29898#L779 assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; 29896#L786 stop_simulation_#res := stop_simulation_~__retres2~0; 29891#L787 start_simulation_#t~ret15 := stop_simulation_#res;start_simulation_~tmp___0~1 := start_simulation_#t~ret15;havoc start_simulation_#t~ret15; 29887#L837 assume !(0 != start_simulation_~tmp___0~1); 27408#L805-1 [2018-11-23 08:02:23,056 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 08:02:23,056 INFO L82 PathProgramCache]: Analyzing trace with hash 1909498888, now seen corresponding path program 1 times [2018-11-23 08:02:23,056 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 08:02:23,056 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 08:02:23,057 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:02:23,057 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 08:02:23,057 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:02:23,061 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 08:02:23,080 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 08:02:23,080 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 08:02:23,080 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-11-23 08:02:23,080 INFO L799 eck$LassoCheckResult]: stem already infeasible [2018-11-23 08:02:23,080 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 08:02:23,080 INFO L82 PathProgramCache]: Analyzing trace with hash 535479938, now seen corresponding path program 1 times [2018-11-23 08:02:23,081 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 08:02:23,081 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 08:02:23,081 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:02:23,081 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 08:02:23,081 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:02:23,087 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 08:02:23,106 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 08:02:23,107 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 08:02:23,107 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-23 08:02:23,107 INFO L811 eck$LassoCheckResult]: loop already infeasible [2018-11-23 08:02:23,107 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-23 08:02:23,107 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-23 08:02:23,108 INFO L87 Difference]: Start difference. First operand 4142 states and 5874 transitions. cyclomatic complexity: 1740 Second operand 3 states. [2018-11-23 08:02:23,155 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 08:02:23,156 INFO L93 Difference]: Finished difference Result 2336 states and 3285 transitions. [2018-11-23 08:02:23,156 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-23 08:02:23,156 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 2336 states and 3285 transitions. [2018-11-23 08:02:23,164 INFO L131 ngComponentsAnalysis]: Automaton has 8 accepting balls. 2252 [2018-11-23 08:02:23,174 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 2336 states to 2336 states and 3285 transitions. [2018-11-23 08:02:23,174 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 2336 [2018-11-23 08:02:23,175 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 2336 [2018-11-23 08:02:23,175 INFO L73 IsDeterministic]: Start isDeterministic. Operand 2336 states and 3285 transitions. [2018-11-23 08:02:23,178 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2018-11-23 08:02:23,178 INFO L705 BuchiCegarLoop]: Abstraction has 2336 states and 3285 transitions. [2018-11-23 08:02:23,180 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2336 states and 3285 transitions. [2018-11-23 08:02:23,207 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2336 to 2336. [2018-11-23 08:02:23,208 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2336 states. [2018-11-23 08:02:23,213 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2336 states to 2336 states and 3285 transitions. [2018-11-23 08:02:23,213 INFO L728 BuchiCegarLoop]: Abstraction has 2336 states and 3285 transitions. [2018-11-23 08:02:23,213 INFO L608 BuchiCegarLoop]: Abstraction has 2336 states and 3285 transitions. [2018-11-23 08:02:23,213 INFO L442 BuchiCegarLoop]: ======== Iteration 13============ [2018-11-23 08:02:23,213 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 2336 states and 3285 transitions. [2018-11-23 08:02:23,220 INFO L131 ngComponentsAnalysis]: Automaton has 8 accepting balls. 2252 [2018-11-23 08:02:23,220 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2018-11-23 08:02:23,220 INFO L119 BuchiIsEmpty]: Starting construction of run [2018-11-23 08:02:23,221 INFO L866 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 08:02:23,221 INFO L867 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 08:02:23,222 INFO L794 eck$LassoCheckResult]: Stem: 33750#ULTIMATE.startENTRY ~m_pc~0 := 0;~t1_pc~0 := 0;~t2_pc~0 := 0;~t3_pc~0 := 0;~t4_pc~0 := 0;~m_st~0 := 0;~t1_st~0 := 0;~t2_st~0 := 0;~t3_st~0 := 0;~t4_st~0 := 0;~m_i~0 := 0;~t1_i~0 := 0;~t2_i~0 := 0;~t3_i~0 := 0;~t4_i~0 := 0;~M_E~0 := 2;~T1_E~0 := 2;~T2_E~0 := 2;~T3_E~0 := 2;~T4_E~0 := 2;~E_M~0 := 2;~E_1~0 := 2;~E_2~0 := 2;~E_3~0 := 2;~E_4~0 := 2;~token~0 := 0;~local~0 := 0; 33658#L-1 havoc main_#res;havoc main_~__retres1~6;havoc main_~__retres1~6;~m_i~0 := 1;~t1_i~0 := 1;~t2_i~0 := 1;~t3_i~0 := 1;~t4_i~0 := 1; 33659#L768 havoc start_simulation_#t~ret14, start_simulation_#t~ret15, start_simulation_~kernel_st~0, start_simulation_~tmp~3, start_simulation_~tmp___0~1;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;havoc start_simulation_~tmp___0~1;start_simulation_~kernel_st~0 := 0; 33806#L348 assume 1 == ~m_i~0;~m_st~0 := 0; 33618#L355-1 assume 1 == ~t1_i~0;~t1_st~0 := 0; 33619#L360-1 assume 1 == ~t2_i~0;~t2_st~0 := 0; 33502#L365-1 assume 1 == ~t3_i~0;~t3_st~0 := 0; 33503#L370-1 assume 1 == ~t4_i~0;~t4_st~0 := 0; 33585#L375-1 assume !(0 == ~M_E~0); 33586#L516-1 assume !(0 == ~T1_E~0); 33427#L521-1 assume !(0 == ~T2_E~0); 33428#L526-1 assume !(0 == ~T3_E~0); 33625#L531-1 assume !(0 == ~T4_E~0); 33626#L536-1 assume !(0 == ~E_M~0); 33520#L541-1 assume !(0 == ~E_1~0); 33521#L546-1 assume !(0 == ~E_2~0); 33594#L551-1 assume !(0 == ~E_3~0); 33475#L556-1 assume !(0 == ~E_4~0); 33476#L561-1 havoc activate_threads_#t~ret8, activate_threads_#t~ret9, activate_threads_#t~ret10, activate_threads_#t~ret11, activate_threads_#t~ret12, activate_threads_~tmp~1, activate_threads_~tmp___0~0, activate_threads_~tmp___1~0, activate_threads_~tmp___2~0, activate_threads_~tmp___3~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc activate_threads_~tmp___1~0;havoc activate_threads_~tmp___2~0;havoc activate_threads_~tmp___3~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; 33656#L252 assume !(1 == ~m_pc~0); 33640#L252-2 is_master_triggered_~__retres1~0 := 0; 33641#L263 is_master_triggered_#res := is_master_triggered_~__retres1~0; 33657#L264 activate_threads_#t~ret8 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret8;havoc activate_threads_#t~ret8; 33734#L639 assume !(0 != activate_threads_~tmp~1); 33589#L639-2 havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; 33590#L271 assume !(1 == ~t1_pc~0); 33796#L271-2 is_transmit1_triggered_~__retres1~1 := 0; 33798#L282 is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; 33799#L283 activate_threads_#t~ret9 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret9;havoc activate_threads_#t~ret9; 33823#L647 assume !(0 != activate_threads_~tmp___0~0); 33824#L647-2 havoc is_transmit2_triggered_#res;havoc is_transmit2_triggered_~__retres1~2;havoc is_transmit2_triggered_~__retres1~2; 33437#L290 assume !(1 == ~t2_pc~0); 33425#L290-2 is_transmit2_triggered_~__retres1~2 := 0; 33426#L301 is_transmit2_triggered_#res := is_transmit2_triggered_~__retres1~2; 33438#L302 activate_threads_#t~ret10 := is_transmit2_triggered_#res;activate_threads_~tmp___1~0 := activate_threads_#t~ret10;havoc activate_threads_#t~ret10; 33481#L655 assume !(0 != activate_threads_~tmp___1~0); 33469#L655-2 havoc is_transmit3_triggered_#res;havoc is_transmit3_triggered_~__retres1~3;havoc is_transmit3_triggered_~__retres1~3; 33470#L309 assume !(1 == ~t3_pc~0); 33508#L309-2 is_transmit3_triggered_~__retres1~3 := 0; 33507#L320 is_transmit3_triggered_#res := is_transmit3_triggered_~__retres1~3; 33504#L321 activate_threads_#t~ret11 := is_transmit3_triggered_#res;activate_threads_~tmp___2~0 := activate_threads_#t~ret11;havoc activate_threads_#t~ret11; 33505#L663 assume !(0 != activate_threads_~tmp___2~0); 33634#L663-2 havoc is_transmit4_triggered_#res;havoc is_transmit4_triggered_~__retres1~4;havoc is_transmit4_triggered_~__retres1~4; 33635#L328 assume !(1 == ~t4_pc~0); 33730#L328-2 is_transmit4_triggered_~__retres1~4 := 0; 33728#L339 is_transmit4_triggered_#res := is_transmit4_triggered_~__retres1~4; 33660#L340 activate_threads_#t~ret12 := is_transmit4_triggered_#res;activate_threads_~tmp___3~0 := activate_threads_#t~ret12;havoc activate_threads_#t~ret12; 33661#L671 assume !(0 != activate_threads_~tmp___3~0); 33769#L671-2 assume !(1 == ~M_E~0); 33518#L574-1 assume !(1 == ~T1_E~0); 33519#L579-1 assume !(1 == ~T2_E~0); 33591#L584-1 assume !(1 == ~T3_E~0); 33471#L589-1 assume !(1 == ~T4_E~0); 33472#L594-1 assume !(1 == ~E_M~0); 33383#L599-1 assume !(1 == ~E_1~0); 33384#L604-1 assume !(1 == ~E_2~0); 33451#L609-1 assume !(1 == ~E_3~0); 33452#L614-1 assume !(1 == ~E_4~0); 33825#L805-1 [2018-11-23 08:02:23,222 INFO L796 eck$LassoCheckResult]: Loop: 33825#L805-1 assume !false; 35074#L806 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret2, eval_#t~nondet3, eval_~tmp_ndt_1~0, eval_#t~nondet4, eval_~tmp_ndt_2~0, eval_#t~nondet5, eval_~tmp_ndt_3~0, eval_#t~nondet6, eval_~tmp_ndt_4~0, eval_#t~nondet7, eval_~tmp_ndt_5~0, eval_~tmp~0;havoc eval_~tmp~0; 34689#L491 assume !false; 35073#L426 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~5;havoc exists_runnable_thread_~__retres1~5; 35072#L388 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~5 := 1; 35067#L415 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~5; 35066#L416 eval_#t~ret2 := exists_runnable_thread_#res;eval_~tmp~0 := eval_#t~ret2;havoc eval_#t~ret2; 35064#L430 assume !(0 != eval_~tmp~0); 35065#L506 start_simulation_~kernel_st~0 := 2; 35696#L348-1 start_simulation_~kernel_st~0 := 3; 35695#L516-2 assume 0 == ~M_E~0;~M_E~0 := 1; 35694#L516-4 assume !(0 == ~T1_E~0); 35693#L521-3 assume 0 == ~T2_E~0;~T2_E~0 := 1; 35692#L526-3 assume 0 == ~T3_E~0;~T3_E~0 := 1; 35691#L531-3 assume !(0 == ~T4_E~0); 35690#L536-3 assume 0 == ~E_M~0;~E_M~0 := 1; 35688#L541-3 assume !(0 == ~E_1~0); 35686#L546-3 assume 0 == ~E_2~0;~E_2~0 := 1; 35684#L551-3 assume 0 == ~E_3~0;~E_3~0 := 1; 35682#L556-3 assume !(0 == ~E_4~0); 35680#L561-3 havoc activate_threads_#t~ret8, activate_threads_#t~ret9, activate_threads_#t~ret10, activate_threads_#t~ret11, activate_threads_#t~ret12, activate_threads_~tmp~1, activate_threads_~tmp___0~0, activate_threads_~tmp___1~0, activate_threads_~tmp___2~0, activate_threads_~tmp___3~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc activate_threads_~tmp___1~0;havoc activate_threads_~tmp___2~0;havoc activate_threads_~tmp___3~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; 35678#L252-18 assume !(1 == ~m_pc~0); 35676#L252-20 is_master_triggered_~__retres1~0 := 0; 35674#L263-6 is_master_triggered_#res := is_master_triggered_~__retres1~0; 35672#L264-6 activate_threads_#t~ret8 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret8;havoc activate_threads_#t~ret8; 35670#L639-18 assume 0 != activate_threads_~tmp~1;~m_st~0 := 0; 35668#L639-20 havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; 35666#L271-18 assume !(1 == ~t1_pc~0); 35663#L271-20 is_transmit1_triggered_~__retres1~1 := 0; 35660#L282-6 is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; 35658#L283-6 activate_threads_#t~ret9 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret9;havoc activate_threads_#t~ret9; 35656#L647-18 assume !(0 != activate_threads_~tmp___0~0); 35654#L647-20 havoc is_transmit2_triggered_#res;havoc is_transmit2_triggered_~__retres1~2;havoc is_transmit2_triggered_~__retres1~2; 35652#L290-18 assume !(1 == ~t2_pc~0); 35649#L290-20 is_transmit2_triggered_~__retres1~2 := 0; 35647#L301-6 is_transmit2_triggered_#res := is_transmit2_triggered_~__retres1~2; 35645#L302-6 activate_threads_#t~ret10 := is_transmit2_triggered_#res;activate_threads_~tmp___1~0 := activate_threads_#t~ret10;havoc activate_threads_#t~ret10; 35643#L655-18 assume 0 != activate_threads_~tmp___1~0;~t2_st~0 := 0; 35641#L655-20 havoc is_transmit3_triggered_#res;havoc is_transmit3_triggered_~__retres1~3;havoc is_transmit3_triggered_~__retres1~3; 35639#L309-18 assume !(1 == ~t3_pc~0); 35636#L309-20 is_transmit3_triggered_~__retres1~3 := 0; 35635#L320-6 is_transmit3_triggered_#res := is_transmit3_triggered_~__retres1~3; 35634#L321-6 activate_threads_#t~ret11 := is_transmit3_triggered_#res;activate_threads_~tmp___2~0 := activate_threads_#t~ret11;havoc activate_threads_#t~ret11; 35632#L663-18 assume 0 != activate_threads_~tmp___2~0;~t3_st~0 := 0; 35630#L663-20 havoc is_transmit4_triggered_#res;havoc is_transmit4_triggered_~__retres1~4;havoc is_transmit4_triggered_~__retres1~4; 35628#L328-18 assume !(1 == ~t4_pc~0); 35626#L328-20 is_transmit4_triggered_~__retres1~4 := 0; 35623#L339-6 is_transmit4_triggered_#res := is_transmit4_triggered_~__retres1~4; 35621#L340-6 activate_threads_#t~ret12 := is_transmit4_triggered_#res;activate_threads_~tmp___3~0 := activate_threads_#t~ret12;havoc activate_threads_#t~ret12; 35619#L671-18 assume 0 != activate_threads_~tmp___3~0;~t4_st~0 := 0; 35617#L671-20 assume 1 == ~M_E~0;~M_E~0 := 2; 35615#L574-3 assume !(1 == ~T1_E~0); 35613#L579-3 assume 1 == ~T2_E~0;~T2_E~0 := 2; 35611#L584-3 assume 1 == ~T3_E~0;~T3_E~0 := 2; 35609#L589-3 assume !(1 == ~T4_E~0); 35607#L594-3 assume 1 == ~E_M~0;~E_M~0 := 2; 35605#L599-3 assume !(1 == ~E_1~0); 35603#L604-3 assume 1 == ~E_2~0;~E_2~0 := 2; 35510#L609-3 assume 1 == ~E_3~0;~E_3~0 := 2; 35509#L614-3 assume !(1 == ~E_4~0); 35508#L619-3 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~5;havoc exists_runnable_thread_~__retres1~5; 33614#L388-1 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~5 := 1; 33445#L415-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~5; 33822#L416-1 start_simulation_#t~ret14 := exists_runnable_thread_#res;start_simulation_~tmp~3 := start_simulation_#t~ret14;havoc start_simulation_#t~ret14; 33702#L824 assume !(0 == start_simulation_~tmp~3); 33704#L824-1 havoc stop_simulation_#res;havoc stop_simulation_#t~ret13, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~5;havoc exists_runnable_thread_~__retres1~5; 33616#L388-2 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~5 := 1; 33418#L415-2 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~5; 33724#L416-2 stop_simulation_#t~ret13 := exists_runnable_thread_#res;stop_simulation_~tmp~2 := stop_simulation_#t~ret13;havoc stop_simulation_#t~ret13; 33725#L779 assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; 33826#L786 stop_simulation_#res := stop_simulation_~__retres2~0; 35076#L787 start_simulation_#t~ret15 := stop_simulation_#res;start_simulation_~tmp___0~1 := start_simulation_#t~ret15;havoc start_simulation_#t~ret15; 35075#L837 assume !(0 != start_simulation_~tmp___0~1); 33825#L805-1 [2018-11-23 08:02:23,222 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 08:02:23,222 INFO L82 PathProgramCache]: Analyzing trace with hash -139829372, now seen corresponding path program 2 times [2018-11-23 08:02:23,222 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 08:02:23,223 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 08:02:23,223 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:02:23,223 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 08:02:23,223 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:02:23,228 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-23 08:02:23,233 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-23 08:02:23,244 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 08:02:23,244 INFO L82 PathProgramCache]: Analyzing trace with hash -1099955483, now seen corresponding path program 1 times [2018-11-23 08:02:23,244 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 08:02:23,244 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 08:02:23,245 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:02:23,245 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-23 08:02:23,245 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:02:23,250 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 08:02:23,297 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 08:02:23,298 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 08:02:23,298 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-23 08:02:23,298 INFO L811 eck$LassoCheckResult]: loop already infeasible [2018-11-23 08:02:23,298 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-23 08:02:23,299 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-23 08:02:23,299 INFO L87 Difference]: Start difference. First operand 2336 states and 3285 transitions. cyclomatic complexity: 957 Second operand 5 states. [2018-11-23 08:02:23,441 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 08:02:23,442 INFO L93 Difference]: Finished difference Result 4128 states and 5737 transitions. [2018-11-23 08:02:23,443 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-11-23 08:02:23,443 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 4128 states and 5737 transitions. [2018-11-23 08:02:23,458 INFO L131 ngComponentsAnalysis]: Automaton has 8 accepting balls. 4020 [2018-11-23 08:02:23,477 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 4128 states to 4128 states and 5737 transitions. [2018-11-23 08:02:23,477 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 4128 [2018-11-23 08:02:23,480 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 4128 [2018-11-23 08:02:23,480 INFO L73 IsDeterministic]: Start isDeterministic. Operand 4128 states and 5737 transitions. [2018-11-23 08:02:23,484 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2018-11-23 08:02:23,485 INFO L705 BuchiCegarLoop]: Abstraction has 4128 states and 5737 transitions. [2018-11-23 08:02:23,488 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4128 states and 5737 transitions. [2018-11-23 08:02:23,525 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4128 to 2360. [2018-11-23 08:02:23,525 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2360 states. [2018-11-23 08:02:23,530 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2360 states to 2360 states and 3309 transitions. [2018-11-23 08:02:23,531 INFO L728 BuchiCegarLoop]: Abstraction has 2360 states and 3309 transitions. [2018-11-23 08:02:23,531 INFO L608 BuchiCegarLoop]: Abstraction has 2360 states and 3309 transitions. [2018-11-23 08:02:23,531 INFO L442 BuchiCegarLoop]: ======== Iteration 14============ [2018-11-23 08:02:23,531 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 2360 states and 3309 transitions. [2018-11-23 08:02:23,538 INFO L131 ngComponentsAnalysis]: Automaton has 8 accepting balls. 2276 [2018-11-23 08:02:23,538 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2018-11-23 08:02:23,538 INFO L119 BuchiIsEmpty]: Starting construction of run [2018-11-23 08:02:23,539 INFO L866 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 08:02:23,539 INFO L867 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 08:02:23,539 INFO L794 eck$LassoCheckResult]: Stem: 40251#ULTIMATE.startENTRY ~m_pc~0 := 0;~t1_pc~0 := 0;~t2_pc~0 := 0;~t3_pc~0 := 0;~t4_pc~0 := 0;~m_st~0 := 0;~t1_st~0 := 0;~t2_st~0 := 0;~t3_st~0 := 0;~t4_st~0 := 0;~m_i~0 := 0;~t1_i~0 := 0;~t2_i~0 := 0;~t3_i~0 := 0;~t4_i~0 := 0;~M_E~0 := 2;~T1_E~0 := 2;~T2_E~0 := 2;~T3_E~0 := 2;~T4_E~0 := 2;~E_M~0 := 2;~E_1~0 := 2;~E_2~0 := 2;~E_3~0 := 2;~E_4~0 := 2;~token~0 := 0;~local~0 := 0; 40160#L-1 havoc main_#res;havoc main_~__retres1~6;havoc main_~__retres1~6;~m_i~0 := 1;~t1_i~0 := 1;~t2_i~0 := 1;~t3_i~0 := 1;~t4_i~0 := 1; 40161#L768 havoc start_simulation_#t~ret14, start_simulation_#t~ret15, start_simulation_~kernel_st~0, start_simulation_~tmp~3, start_simulation_~tmp___0~1;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;havoc start_simulation_~tmp___0~1;start_simulation_~kernel_st~0 := 0; 40311#L348 assume 1 == ~m_i~0;~m_st~0 := 0; 40111#L355-1 assume 1 == ~t1_i~0;~t1_st~0 := 0; 40112#L360-1 assume 1 == ~t2_i~0;~t2_st~0 := 0; 39993#L365-1 assume 1 == ~t3_i~0;~t3_st~0 := 0; 39994#L370-1 assume 1 == ~t4_i~0;~t4_st~0 := 0; 40081#L375-1 assume !(0 == ~M_E~0); 40082#L516-1 assume !(0 == ~T1_E~0); 39907#L521-1 assume !(0 == ~T2_E~0); 39908#L526-1 assume !(0 == ~T3_E~0); 40120#L531-1 assume !(0 == ~T4_E~0); 40121#L536-1 assume !(0 == ~E_M~0); 40011#L541-1 assume !(0 == ~E_1~0); 40012#L546-1 assume !(0 == ~E_2~0); 40089#L551-1 assume !(0 == ~E_3~0); 39956#L556-1 assume !(0 == ~E_4~0); 39957#L561-1 havoc activate_threads_#t~ret8, activate_threads_#t~ret9, activate_threads_#t~ret10, activate_threads_#t~ret11, activate_threads_#t~ret12, activate_threads_~tmp~1, activate_threads_~tmp___0~0, activate_threads_~tmp___1~0, activate_threads_~tmp___2~0, activate_threads_~tmp___3~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc activate_threads_~tmp___1~0;havoc activate_threads_~tmp___2~0;havoc activate_threads_~tmp___3~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; 40158#L252 assume !(1 == ~m_pc~0); 40142#L252-2 is_master_triggered_~__retres1~0 := 0; 40143#L263 is_master_triggered_#res := is_master_triggered_~__retres1~0; 40159#L264 activate_threads_#t~ret8 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret8;havoc activate_threads_#t~ret8; 40234#L639 assume !(0 != activate_threads_~tmp~1); 40084#L639-2 havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; 40085#L271 assume !(1 == ~t1_pc~0); 40301#L271-2 is_transmit1_triggered_~__retres1~1 := 0; 40303#L282 is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; 40304#L283 activate_threads_#t~ret9 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret9;havoc activate_threads_#t~ret9; 40337#L647 assume !(0 != activate_threads_~tmp___0~0); 40338#L647-2 havoc is_transmit2_triggered_#res;havoc is_transmit2_triggered_~__retres1~2;havoc is_transmit2_triggered_~__retres1~2; 39917#L290 assume !(1 == ~t2_pc~0); 39905#L290-2 is_transmit2_triggered_~__retres1~2 := 0; 39906#L301 is_transmit2_triggered_#res := is_transmit2_triggered_~__retres1~2; 39918#L302 activate_threads_#t~ret10 := is_transmit2_triggered_#res;activate_threads_~tmp___1~0 := activate_threads_#t~ret10;havoc activate_threads_#t~ret10; 39962#L655 assume !(0 != activate_threads_~tmp___1~0); 39950#L655-2 havoc is_transmit3_triggered_#res;havoc is_transmit3_triggered_~__retres1~3;havoc is_transmit3_triggered_~__retres1~3; 39951#L309 assume !(1 == ~t3_pc~0); 39999#L309-2 is_transmit3_triggered_~__retres1~3 := 0; 39998#L320 is_transmit3_triggered_#res := is_transmit3_triggered_~__retres1~3; 39995#L321 activate_threads_#t~ret11 := is_transmit3_triggered_#res;activate_threads_~tmp___2~0 := activate_threads_#t~ret11;havoc activate_threads_#t~ret11; 39996#L663 assume !(0 != activate_threads_~tmp___2~0); 40129#L663-2 havoc is_transmit4_triggered_#res;havoc is_transmit4_triggered_~__retres1~4;havoc is_transmit4_triggered_~__retres1~4; 40130#L328 assume !(1 == ~t4_pc~0); 40232#L328-2 is_transmit4_triggered_~__retres1~4 := 0; 40230#L339 is_transmit4_triggered_#res := is_transmit4_triggered_~__retres1~4; 40162#L340 activate_threads_#t~ret12 := is_transmit4_triggered_#res;activate_threads_~tmp___3~0 := activate_threads_#t~ret12;havoc activate_threads_#t~ret12; 40163#L671 assume !(0 != activate_threads_~tmp___3~0); 40273#L671-2 assume !(1 == ~M_E~0); 40009#L574-1 assume !(1 == ~T1_E~0); 40010#L579-1 assume !(1 == ~T2_E~0); 40086#L584-1 assume !(1 == ~T3_E~0); 39952#L589-1 assume !(1 == ~T4_E~0); 39953#L594-1 assume !(1 == ~E_M~0); 39863#L599-1 assume !(1 == ~E_1~0); 39864#L604-1 assume !(1 == ~E_2~0); 39931#L609-1 assume !(1 == ~E_3~0); 39932#L614-1 assume !(1 == ~E_4~0); 40339#L805-1 [2018-11-23 08:02:23,539 INFO L796 eck$LassoCheckResult]: Loop: 40339#L805-1 assume !false; 41816#L806 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret2, eval_#t~nondet3, eval_~tmp_ndt_1~0, eval_#t~nondet4, eval_~tmp_ndt_2~0, eval_#t~nondet5, eval_~tmp_ndt_3~0, eval_#t~nondet6, eval_~tmp_ndt_4~0, eval_#t~nondet7, eval_~tmp_ndt_5~0, eval_~tmp~0;havoc eval_~tmp~0; 41813#L491 assume !false; 41597#L426 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~5;havoc exists_runnable_thread_~__retres1~5; 41595#L388 assume !(0 == ~m_st~0); 41593#L392 assume !(0 == ~t1_st~0); 41591#L396 assume !(0 == ~t2_st~0); 41589#L400 assume !(0 == ~t3_st~0); 41586#L404 assume !(0 == ~t4_st~0);exists_runnable_thread_~__retres1~5 := 0; 41583#L415 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~5; 41581#L416 eval_#t~ret2 := exists_runnable_thread_#res;eval_~tmp~0 := eval_#t~ret2;havoc eval_#t~ret2; 41580#L430 assume !(0 != eval_~tmp~0); 41579#L506 start_simulation_~kernel_st~0 := 2; 41578#L348-1 start_simulation_~kernel_st~0 := 3; 41577#L516-2 assume 0 == ~M_E~0;~M_E~0 := 1; 41576#L516-4 assume !(0 == ~T1_E~0); 41575#L521-3 assume 0 == ~T2_E~0;~T2_E~0 := 1; 40334#L526-3 assume 0 == ~T3_E~0;~T3_E~0 := 1; 40124#L531-3 assume !(0 == ~T4_E~0); 40125#L536-3 assume 0 == ~E_M~0;~E_M~0 := 1; 40354#L541-3 assume !(0 == ~E_1~0); 41572#L546-3 assume 0 == ~E_2~0;~E_2~0 := 1; 41571#L551-3 assume 0 == ~E_3~0;~E_3~0 := 1; 39941#L556-3 assume !(0 == ~E_4~0); 39942#L561-3 havoc activate_threads_#t~ret8, activate_threads_#t~ret9, activate_threads_#t~ret10, activate_threads_#t~ret11, activate_threads_#t~ret12, activate_threads_~tmp~1, activate_threads_~tmp___0~0, activate_threads_~tmp___1~0, activate_threads_~tmp___2~0, activate_threads_~tmp___3~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc activate_threads_~tmp___1~0;havoc activate_threads_~tmp___2~0;havoc activate_threads_~tmp___3~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; 40268#L252-18 assume !(1 == ~m_pc~0); 40282#L252-20 is_master_triggered_~__retres1~0 := 0; 40171#L263-6 is_master_triggered_#res := is_master_triggered_~__retres1~0; 40172#L264-6 activate_threads_#t~ret8 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret8;havoc activate_threads_#t~ret8; 42037#L639-18 assume 0 != activate_threads_~tmp~1;~m_st~0 := 0; 42036#L639-20 havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; 40353#L271-18 assume !(1 == ~t1_pc~0); 40346#L271-20 is_transmit1_triggered_~__retres1~1 := 0; 40291#L282-6 is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; 40292#L283-6 activate_threads_#t~ret9 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret9;havoc activate_threads_#t~ret9; 40224#L647-18 assume !(0 != activate_threads_~tmp___0~0); 40225#L647-20 havoc is_transmit2_triggered_#res;havoc is_transmit2_triggered_~__retres1~2;havoc is_transmit2_triggered_~__retres1~2; 39859#L290-18 assume !(1 == ~t2_pc~0); 39860#L290-20 is_transmit2_triggered_~__retres1~2 := 0; 39873#L301-6 is_transmit2_triggered_#res := is_transmit2_triggered_~__retres1~2; 39974#L302-6 activate_threads_#t~ret10 := is_transmit2_triggered_#res;activate_threads_~tmp___1~0 := activate_threads_#t~ret10;havoc activate_threads_#t~ret10; 39975#L655-18 assume 0 != activate_threads_~tmp___1~0;~t2_st~0 := 0; 40327#L655-20 havoc is_transmit3_triggered_#res;havoc is_transmit3_triggered_~__retres1~3;havoc is_transmit3_triggered_~__retres1~3; 40328#L309-18 assume !(1 == ~t3_pc~0); 40026#L309-20 is_transmit3_triggered_~__retres1~3 := 0; 40027#L320-6 is_transmit3_triggered_#res := is_transmit3_triggered_~__retres1~3; 40137#L321-6 activate_threads_#t~ret11 := is_transmit3_triggered_#res;activate_threads_~tmp___2~0 := activate_threads_#t~ret11;havoc activate_threads_#t~ret11; 40138#L663-18 assume 0 != activate_threads_~tmp___2~0;~t3_st~0 := 0; 40093#L663-20 havoc is_transmit4_triggered_#res;havoc is_transmit4_triggered_~__retres1~4;havoc is_transmit4_triggered_~__retres1~4; 40094#L328-18 assume !(1 == ~t4_pc~0); 42116#L328-20 is_transmit4_triggered_~__retres1~4 := 0; 42115#L339-6 is_transmit4_triggered_#res := is_transmit4_triggered_~__retres1~4; 42114#L340-6 activate_threads_#t~ret12 := is_transmit4_triggered_#res;activate_threads_~tmp___3~0 := activate_threads_#t~ret12;havoc activate_threads_#t~ret12; 40243#L671-18 assume 0 != activate_threads_~tmp___3~0;~t4_st~0 := 0; 40244#L671-20 assume 1 == ~M_E~0;~M_E~0 := 2; 42112#L574-3 assume !(1 == ~T1_E~0); 40321#L579-3 assume 1 == ~T2_E~0;~T2_E~0 := 2; 40322#L584-3 assume 1 == ~T3_E~0;~T3_E~0 := 2; 42111#L589-3 assume !(1 == ~T4_E~0); 40278#L594-3 assume 1 == ~E_M~0;~E_M~0 := 2; 39984#L599-3 assume !(1 == ~E_1~0); 39985#L604-3 assume 1 == ~E_2~0;~E_2~0 := 2; 39903#L609-3 assume 1 == ~E_3~0;~E_3~0 := 2; 39904#L614-3 assume !(1 == ~E_4~0); 40118#L619-3 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~5;havoc exists_runnable_thread_~__retres1~5; 40119#L388-1 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~5 := 1; 42101#L415-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~5; 42100#L416-1 start_simulation_#t~ret14 := exists_runnable_thread_#res;start_simulation_~tmp~3 := start_simulation_#t~ret14;havoc start_simulation_#t~ret14; 42097#L824 assume !(0 == start_simulation_~tmp~3); 42095#L824-1 havoc stop_simulation_#res;havoc stop_simulation_#t~ret13, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~5;havoc exists_runnable_thread_~__retres1~5; 42094#L388-2 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~5 := 1; 42089#L415-2 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~5; 42088#L416-2 stop_simulation_#t~ret13 := exists_runnable_thread_#res;stop_simulation_~tmp~2 := stop_simulation_#t~ret13;havoc stop_simulation_#t~ret13; 41827#L779 assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; 41826#L786 stop_simulation_#res := stop_simulation_~__retres2~0; 41825#L787 start_simulation_#t~ret15 := stop_simulation_#res;start_simulation_~tmp___0~1 := start_simulation_#t~ret15;havoc start_simulation_#t~ret15; 41824#L837 assume !(0 != start_simulation_~tmp___0~1); 40339#L805-1 [2018-11-23 08:02:23,540 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 08:02:23,540 INFO L82 PathProgramCache]: Analyzing trace with hash -139829372, now seen corresponding path program 3 times [2018-11-23 08:02:23,540 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 08:02:23,540 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 08:02:23,541 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:02:23,541 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 08:02:23,541 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:02:23,546 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-23 08:02:23,551 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-23 08:02:23,561 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 08:02:23,561 INFO L82 PathProgramCache]: Analyzing trace with hash 354466161, now seen corresponding path program 1 times [2018-11-23 08:02:23,561 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 08:02:23,561 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 08:02:23,562 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:02:23,562 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-23 08:02:23,562 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:02:23,568 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 08:02:23,626 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 08:02:23,627 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 08:02:23,627 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-23 08:02:23,628 INFO L811 eck$LassoCheckResult]: loop already infeasible [2018-11-23 08:02:23,628 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-23 08:02:23,628 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-23 08:02:23,628 INFO L87 Difference]: Start difference. First operand 2360 states and 3309 transitions. cyclomatic complexity: 957 Second operand 5 states. [2018-11-23 08:02:23,831 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 08:02:23,831 INFO L93 Difference]: Finished difference Result 4636 states and 6454 transitions. [2018-11-23 08:02:23,832 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-11-23 08:02:23,832 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 4636 states and 6454 transitions. [2018-11-23 08:02:23,849 INFO L131 ngComponentsAnalysis]: Automaton has 8 accepting balls. 4536 [2018-11-23 08:02:23,867 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 4636 states to 4636 states and 6454 transitions. [2018-11-23 08:02:23,867 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 4636 [2018-11-23 08:02:23,870 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 4636 [2018-11-23 08:02:23,870 INFO L73 IsDeterministic]: Start isDeterministic. Operand 4636 states and 6454 transitions. [2018-11-23 08:02:23,875 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2018-11-23 08:02:23,875 INFO L705 BuchiCegarLoop]: Abstraction has 4636 states and 6454 transitions. [2018-11-23 08:02:23,879 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4636 states and 6454 transitions. [2018-11-23 08:02:23,917 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4636 to 2432. [2018-11-23 08:02:23,917 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2432 states. [2018-11-23 08:02:23,922 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2432 states to 2432 states and 3360 transitions. [2018-11-23 08:02:23,922 INFO L728 BuchiCegarLoop]: Abstraction has 2432 states and 3360 transitions. [2018-11-23 08:02:23,922 INFO L608 BuchiCegarLoop]: Abstraction has 2432 states and 3360 transitions. [2018-11-23 08:02:23,922 INFO L442 BuchiCegarLoop]: ======== Iteration 15============ [2018-11-23 08:02:23,923 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 2432 states and 3360 transitions. [2018-11-23 08:02:23,929 INFO L131 ngComponentsAnalysis]: Automaton has 8 accepting balls. 2348 [2018-11-23 08:02:23,929 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2018-11-23 08:02:23,930 INFO L119 BuchiIsEmpty]: Starting construction of run [2018-11-23 08:02:23,930 INFO L866 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 08:02:23,930 INFO L867 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 08:02:23,931 INFO L794 eck$LassoCheckResult]: Stem: 47244#ULTIMATE.startENTRY ~m_pc~0 := 0;~t1_pc~0 := 0;~t2_pc~0 := 0;~t3_pc~0 := 0;~t4_pc~0 := 0;~m_st~0 := 0;~t1_st~0 := 0;~t2_st~0 := 0;~t3_st~0 := 0;~t4_st~0 := 0;~m_i~0 := 0;~t1_i~0 := 0;~t2_i~0 := 0;~t3_i~0 := 0;~t4_i~0 := 0;~M_E~0 := 2;~T1_E~0 := 2;~T2_E~0 := 2;~T3_E~0 := 2;~T4_E~0 := 2;~E_M~0 := 2;~E_1~0 := 2;~E_2~0 := 2;~E_3~0 := 2;~E_4~0 := 2;~token~0 := 0;~local~0 := 0; 47151#L-1 havoc main_#res;havoc main_~__retres1~6;havoc main_~__retres1~6;~m_i~0 := 1;~t1_i~0 := 1;~t2_i~0 := 1;~t3_i~0 := 1;~t4_i~0 := 1; 47152#L768 havoc start_simulation_#t~ret14, start_simulation_#t~ret15, start_simulation_~kernel_st~0, start_simulation_~tmp~3, start_simulation_~tmp___0~1;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;havoc start_simulation_~tmp___0~1;start_simulation_~kernel_st~0 := 0; 47316#L348 assume 1 == ~m_i~0;~m_st~0 := 0; 47107#L355-1 assume 1 == ~t1_i~0;~t1_st~0 := 0; 47108#L360-1 assume 1 == ~t2_i~0;~t2_st~0 := 0; 46996#L365-1 assume 1 == ~t3_i~0;~t3_st~0 := 0; 46997#L370-1 assume 1 == ~t4_i~0;~t4_st~0 := 0; 47077#L375-1 assume !(0 == ~M_E~0); 47078#L516-1 assume !(0 == ~T1_E~0); 46917#L521-1 assume !(0 == ~T2_E~0); 46918#L526-1 assume !(0 == ~T3_E~0); 47115#L531-1 assume !(0 == ~T4_E~0); 47116#L536-1 assume !(0 == ~E_M~0); 47014#L541-1 assume !(0 == ~E_1~0); 47015#L546-1 assume !(0 == ~E_2~0); 47085#L551-1 assume !(0 == ~E_3~0); 46966#L556-1 assume !(0 == ~E_4~0); 46967#L561-1 havoc activate_threads_#t~ret8, activate_threads_#t~ret9, activate_threads_#t~ret10, activate_threads_#t~ret11, activate_threads_#t~ret12, activate_threads_~tmp~1, activate_threads_~tmp___0~0, activate_threads_~tmp___1~0, activate_threads_~tmp___2~0, activate_threads_~tmp___3~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc activate_threads_~tmp___1~0;havoc activate_threads_~tmp___2~0;havoc activate_threads_~tmp___3~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; 47149#L252 assume !(1 == ~m_pc~0); 47133#L252-2 is_master_triggered_~__retres1~0 := 0; 47134#L263 is_master_triggered_#res := is_master_triggered_~__retres1~0; 47150#L264 activate_threads_#t~ret8 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret8;havoc activate_threads_#t~ret8; 47225#L639 assume !(0 != activate_threads_~tmp~1); 47080#L639-2 havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; 47081#L271 assume !(1 == ~t1_pc~0); 47306#L271-2 is_transmit1_triggered_~__retres1~1 := 0; 47308#L282 is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; 47309#L283 activate_threads_#t~ret9 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret9;havoc activate_threads_#t~ret9; 47334#L647 assume !(0 != activate_threads_~tmp___0~0); 47335#L647-2 havoc is_transmit2_triggered_#res;havoc is_transmit2_triggered_~__retres1~2;havoc is_transmit2_triggered_~__retres1~2; 46927#L290 assume !(1 == ~t2_pc~0); 46915#L290-2 is_transmit2_triggered_~__retres1~2 := 0; 46916#L301 is_transmit2_triggered_#res := is_transmit2_triggered_~__retres1~2; 46928#L302 activate_threads_#t~ret10 := is_transmit2_triggered_#res;activate_threads_~tmp___1~0 := activate_threads_#t~ret10;havoc activate_threads_#t~ret10; 46972#L655 assume !(0 != activate_threads_~tmp___1~0); 46960#L655-2 havoc is_transmit3_triggered_#res;havoc is_transmit3_triggered_~__retres1~3;havoc is_transmit3_triggered_~__retres1~3; 46961#L309 assume !(1 == ~t3_pc~0); 47002#L309-2 is_transmit3_triggered_~__retres1~3 := 0; 47001#L320 is_transmit3_triggered_#res := is_transmit3_triggered_~__retres1~3; 46998#L321 activate_threads_#t~ret11 := is_transmit3_triggered_#res;activate_threads_~tmp___2~0 := activate_threads_#t~ret11;havoc activate_threads_#t~ret11; 46999#L663 assume !(0 != activate_threads_~tmp___2~0); 47124#L663-2 havoc is_transmit4_triggered_#res;havoc is_transmit4_triggered_~__retres1~4;havoc is_transmit4_triggered_~__retres1~4; 47125#L328 assume !(1 == ~t4_pc~0); 47223#L328-2 is_transmit4_triggered_~__retres1~4 := 0; 47221#L339 is_transmit4_triggered_#res := is_transmit4_triggered_~__retres1~4; 47153#L340 activate_threads_#t~ret12 := is_transmit4_triggered_#res;activate_threads_~tmp___3~0 := activate_threads_#t~ret12;havoc activate_threads_#t~ret12; 47154#L671 assume !(0 != activate_threads_~tmp___3~0); 47276#L671-2 assume !(1 == ~M_E~0); 47012#L574-1 assume !(1 == ~T1_E~0); 47013#L579-1 assume !(1 == ~T2_E~0); 47082#L584-1 assume !(1 == ~T3_E~0); 46962#L589-1 assume !(1 == ~T4_E~0); 46963#L594-1 assume !(1 == ~E_M~0); 46872#L599-1 assume !(1 == ~E_1~0); 46873#L604-1 assume !(1 == ~E_2~0); 46941#L609-1 assume !(1 == ~E_3~0); 46942#L614-1 assume !(1 == ~E_4~0); 47336#L805-1 [2018-11-23 08:02:23,931 INFO L796 eck$LassoCheckResult]: Loop: 47336#L805-1 assume !false; 48094#L806 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret2, eval_#t~nondet3, eval_~tmp_ndt_1~0, eval_#t~nondet4, eval_~tmp_ndt_2~0, eval_#t~nondet5, eval_~tmp_ndt_3~0, eval_#t~nondet6, eval_~tmp_ndt_4~0, eval_#t~nondet7, eval_~tmp_ndt_5~0, eval_~tmp~0;havoc eval_~tmp~0; 48091#L491 assume !false; 48090#L426 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~5;havoc exists_runnable_thread_~__retres1~5; 48089#L388 assume !(0 == ~m_st~0); 48084#L392 assume !(0 == ~t1_st~0); 48085#L396 assume !(0 == ~t2_st~0); 48088#L400 assume !(0 == ~t3_st~0); 48086#L404 assume !(0 == ~t4_st~0);exists_runnable_thread_~__retres1~5 := 0; 48087#L415 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~5; 48076#L416 eval_#t~ret2 := exists_runnable_thread_#res;eval_~tmp~0 := eval_#t~ret2;havoc eval_#t~ret2; 48077#L430 assume !(0 != eval_~tmp~0); 48247#L506 start_simulation_~kernel_st~0 := 2; 48246#L348-1 start_simulation_~kernel_st~0 := 3; 48245#L516-2 assume 0 == ~M_E~0;~M_E~0 := 1; 48244#L516-4 assume !(0 == ~T1_E~0); 48243#L521-3 assume 0 == ~T2_E~0;~T2_E~0 := 1; 48242#L526-3 assume 0 == ~T3_E~0;~T3_E~0 := 1; 48241#L531-3 assume !(0 == ~T4_E~0); 48240#L536-3 assume 0 == ~E_M~0;~E_M~0 := 1; 48239#L541-3 assume !(0 == ~E_1~0); 48238#L546-3 assume 0 == ~E_2~0;~E_2~0 := 1; 48237#L551-3 assume 0 == ~E_3~0;~E_3~0 := 1; 48236#L556-3 assume !(0 == ~E_4~0); 48235#L561-3 havoc activate_threads_#t~ret8, activate_threads_#t~ret9, activate_threads_#t~ret10, activate_threads_#t~ret11, activate_threads_#t~ret12, activate_threads_~tmp~1, activate_threads_~tmp___0~0, activate_threads_~tmp___1~0, activate_threads_~tmp___2~0, activate_threads_~tmp___3~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc activate_threads_~tmp___1~0;havoc activate_threads_~tmp___2~0;havoc activate_threads_~tmp___3~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; 48234#L252-18 assume !(1 == ~m_pc~0); 48233#L252-20 is_master_triggered_~__retres1~0 := 0; 48232#L263-6 is_master_triggered_#res := is_master_triggered_~__retres1~0; 48231#L264-6 activate_threads_#t~ret8 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret8;havoc activate_threads_#t~ret8; 48230#L639-18 assume !(0 != activate_threads_~tmp~1); 48229#L639-20 havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; 48227#L271-18 assume !(1 == ~t1_pc~0); 48224#L271-20 is_transmit1_triggered_~__retres1~1 := 0; 48222#L282-6 is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; 48220#L283-6 activate_threads_#t~ret9 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret9;havoc activate_threads_#t~ret9; 48218#L647-18 assume !(0 != activate_threads_~tmp___0~0); 48216#L647-20 havoc is_transmit2_triggered_#res;havoc is_transmit2_triggered_~__retres1~2;havoc is_transmit2_triggered_~__retres1~2; 48213#L290-18 assume !(1 == ~t2_pc~0); 48211#L290-20 is_transmit2_triggered_~__retres1~2 := 0; 48209#L301-6 is_transmit2_triggered_#res := is_transmit2_triggered_~__retres1~2; 48207#L302-6 activate_threads_#t~ret10 := is_transmit2_triggered_#res;activate_threads_~tmp___1~0 := activate_threads_#t~ret10;havoc activate_threads_#t~ret10; 48205#L655-18 assume 0 != activate_threads_~tmp___1~0;~t2_st~0 := 0; 48203#L655-20 havoc is_transmit3_triggered_#res;havoc is_transmit3_triggered_~__retres1~3;havoc is_transmit3_triggered_~__retres1~3; 48201#L309-18 assume !(1 == ~t3_pc~0); 48198#L309-20 is_transmit3_triggered_~__retres1~3 := 0; 48196#L320-6 is_transmit3_triggered_#res := is_transmit3_triggered_~__retres1~3; 48194#L321-6 activate_threads_#t~ret11 := is_transmit3_triggered_#res;activate_threads_~tmp___2~0 := activate_threads_#t~ret11;havoc activate_threads_#t~ret11; 48192#L663-18 assume 0 != activate_threads_~tmp___2~0;~t3_st~0 := 0; 48189#L663-20 havoc is_transmit4_triggered_#res;havoc is_transmit4_triggered_~__retres1~4;havoc is_transmit4_triggered_~__retres1~4; 48186#L328-18 assume !(1 == ~t4_pc~0); 48182#L328-20 is_transmit4_triggered_~__retres1~4 := 0; 48179#L339-6 is_transmit4_triggered_#res := is_transmit4_triggered_~__retres1~4; 48175#L340-6 activate_threads_#t~ret12 := is_transmit4_triggered_#res;activate_threads_~tmp___3~0 := activate_threads_#t~ret12;havoc activate_threads_#t~ret12; 48172#L671-18 assume 0 != activate_threads_~tmp___3~0;~t4_st~0 := 0; 48169#L671-20 assume 1 == ~M_E~0;~M_E~0 := 2; 48166#L574-3 assume !(1 == ~T1_E~0); 48163#L579-3 assume 1 == ~T2_E~0;~T2_E~0 := 2; 48160#L584-3 assume 1 == ~T3_E~0;~T3_E~0 := 2; 48157#L589-3 assume !(1 == ~T4_E~0); 48154#L594-3 assume 1 == ~E_M~0;~E_M~0 := 2; 48151#L599-3 assume !(1 == ~E_1~0); 48148#L604-3 assume 1 == ~E_2~0;~E_2~0 := 2; 48145#L609-3 assume 1 == ~E_3~0;~E_3~0 := 2; 48142#L614-3 assume !(1 == ~E_4~0); 48139#L619-3 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~5;havoc exists_runnable_thread_~__retres1~5; 48134#L388-1 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~5 := 1; 48128#L415-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~5; 48125#L416-1 start_simulation_#t~ret14 := exists_runnable_thread_#res;start_simulation_~tmp~3 := start_simulation_#t~ret14;havoc start_simulation_#t~ret14; 48121#L824 assume !(0 == start_simulation_~tmp~3); 48118#L824-1 havoc stop_simulation_#res;havoc stop_simulation_#t~ret13, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~5;havoc exists_runnable_thread_~__retres1~5; 48116#L388-2 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~5 := 1; 48110#L415-2 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~5; 48108#L416-2 stop_simulation_#t~ret13 := exists_runnable_thread_#res;stop_simulation_~tmp~2 := stop_simulation_#t~ret13;havoc stop_simulation_#t~ret13; 48106#L779 assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; 48104#L786 stop_simulation_#res := stop_simulation_~__retres2~0; 48101#L787 start_simulation_#t~ret15 := stop_simulation_#res;start_simulation_~tmp___0~1 := start_simulation_#t~ret15;havoc start_simulation_#t~ret15; 48099#L837 assume !(0 != start_simulation_~tmp___0~1); 47336#L805-1 [2018-11-23 08:02:23,931 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 08:02:23,931 INFO L82 PathProgramCache]: Analyzing trace with hash -139829372, now seen corresponding path program 4 times [2018-11-23 08:02:23,931 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 08:02:23,931 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 08:02:23,932 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:02:23,932 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 08:02:23,932 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:02:23,937 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-23 08:02:23,941 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-23 08:02:23,950 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 08:02:23,951 INFO L82 PathProgramCache]: Analyzing trace with hash -2001339089, now seen corresponding path program 1 times [2018-11-23 08:02:23,951 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 08:02:23,951 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 08:02:23,952 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:02:23,952 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-23 08:02:23,952 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:02:23,956 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 08:02:23,982 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 08:02:23,983 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 08:02:23,983 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-23 08:02:23,983 INFO L811 eck$LassoCheckResult]: loop already infeasible [2018-11-23 08:02:23,983 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-23 08:02:23,983 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-23 08:02:23,983 INFO L87 Difference]: Start difference. First operand 2432 states and 3360 transitions. cyclomatic complexity: 936 Second operand 3 states. [2018-11-23 08:02:24,031 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 08:02:24,031 INFO L93 Difference]: Finished difference Result 4042 states and 5502 transitions. [2018-11-23 08:02:24,032 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-23 08:02:24,032 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 4042 states and 5502 transitions. [2018-11-23 08:02:24,047 INFO L131 ngComponentsAnalysis]: Automaton has 12 accepting balls. 3940 [2018-11-23 08:02:24,060 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 4042 states to 4042 states and 5502 transitions. [2018-11-23 08:02:24,060 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 4042 [2018-11-23 08:02:24,062 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 4042 [2018-11-23 08:02:24,062 INFO L73 IsDeterministic]: Start isDeterministic. Operand 4042 states and 5502 transitions. [2018-11-23 08:02:24,066 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2018-11-23 08:02:24,067 INFO L705 BuchiCegarLoop]: Abstraction has 4042 states and 5502 transitions. [2018-11-23 08:02:24,070 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4042 states and 5502 transitions. [2018-11-23 08:02:24,115 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4042 to 3930. [2018-11-23 08:02:24,115 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3930 states. [2018-11-23 08:02:24,124 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3930 states to 3930 states and 5356 transitions. [2018-11-23 08:02:24,124 INFO L728 BuchiCegarLoop]: Abstraction has 3930 states and 5356 transitions. [2018-11-23 08:02:24,124 INFO L608 BuchiCegarLoop]: Abstraction has 3930 states and 5356 transitions. [2018-11-23 08:02:24,125 INFO L442 BuchiCegarLoop]: ======== Iteration 16============ [2018-11-23 08:02:24,125 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 3930 states and 5356 transitions. [2018-11-23 08:02:24,138 INFO L131 ngComponentsAnalysis]: Automaton has 12 accepting balls. 3828 [2018-11-23 08:02:24,138 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2018-11-23 08:02:24,138 INFO L119 BuchiIsEmpty]: Starting construction of run [2018-11-23 08:02:24,139 INFO L866 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 08:02:24,139 INFO L867 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 08:02:24,139 INFO L794 eck$LassoCheckResult]: Stem: 53734#ULTIMATE.startENTRY ~m_pc~0 := 0;~t1_pc~0 := 0;~t2_pc~0 := 0;~t3_pc~0 := 0;~t4_pc~0 := 0;~m_st~0 := 0;~t1_st~0 := 0;~t2_st~0 := 0;~t3_st~0 := 0;~t4_st~0 := 0;~m_i~0 := 0;~t1_i~0 := 0;~t2_i~0 := 0;~t3_i~0 := 0;~t4_i~0 := 0;~M_E~0 := 2;~T1_E~0 := 2;~T2_E~0 := 2;~T3_E~0 := 2;~T4_E~0 := 2;~E_M~0 := 2;~E_1~0 := 2;~E_2~0 := 2;~E_3~0 := 2;~E_4~0 := 2;~token~0 := 0;~local~0 := 0; 53639#L-1 havoc main_#res;havoc main_~__retres1~6;havoc main_~__retres1~6;~m_i~0 := 1;~t1_i~0 := 1;~t2_i~0 := 1;~t3_i~0 := 1;~t4_i~0 := 1; 53640#L768 havoc start_simulation_#t~ret14, start_simulation_#t~ret15, start_simulation_~kernel_st~0, start_simulation_~tmp~3, start_simulation_~tmp___0~1;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;havoc start_simulation_~tmp___0~1;start_simulation_~kernel_st~0 := 0; 53799#L348 assume 1 == ~m_i~0;~m_st~0 := 0; 53593#L355-1 assume 1 == ~t1_i~0;~t1_st~0 := 0; 53594#L360-1 assume 1 == ~t2_i~0;~t2_st~0 := 0; 53478#L365-1 assume 1 == ~t3_i~0;~t3_st~0 := 0; 53479#L370-1 assume 1 == ~t4_i~0;~t4_st~0 := 0; 53561#L375-1 assume !(0 == ~M_E~0); 53562#L516-1 assume !(0 == ~T1_E~0); 53398#L521-1 assume !(0 == ~T2_E~0); 53399#L526-1 assume !(0 == ~T3_E~0); 53601#L531-1 assume !(0 == ~T4_E~0); 53602#L536-1 assume !(0 == ~E_M~0); 53496#L541-1 assume !(0 == ~E_1~0); 53497#L546-1 assume !(0 == ~E_2~0); 53569#L551-1 assume !(0 == ~E_3~0); 53447#L556-1 assume !(0 == ~E_4~0); 53448#L561-1 havoc activate_threads_#t~ret8, activate_threads_#t~ret9, activate_threads_#t~ret10, activate_threads_#t~ret11, activate_threads_#t~ret12, activate_threads_~tmp~1, activate_threads_~tmp___0~0, activate_threads_~tmp___1~0, activate_threads_~tmp___2~0, activate_threads_~tmp___3~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc activate_threads_~tmp___1~0;havoc activate_threads_~tmp___2~0;havoc activate_threads_~tmp___3~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; 53637#L252 assume !(1 == ~m_pc~0); 53621#L252-2 is_master_triggered_~__retres1~0 := 0; 53622#L263 is_master_triggered_#res := is_master_triggered_~__retres1~0; 53638#L264 activate_threads_#t~ret8 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret8;havoc activate_threads_#t~ret8; 53715#L639 assume !(0 != activate_threads_~tmp~1); 53564#L639-2 havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; 53565#L271 assume !(1 == ~t1_pc~0); 53788#L271-2 is_transmit1_triggered_~__retres1~1 := 0; 53790#L282 is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; 53791#L283 activate_threads_#t~ret9 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret9;havoc activate_threads_#t~ret9; 53829#L647 assume !(0 != activate_threads_~tmp___0~0); 53830#L647-2 havoc is_transmit2_triggered_#res;havoc is_transmit2_triggered_~__retres1~2;havoc is_transmit2_triggered_~__retres1~2; 53408#L290 assume !(1 == ~t2_pc~0); 53396#L290-2 is_transmit2_triggered_~__retres1~2 := 0; 53397#L301 is_transmit2_triggered_#res := is_transmit2_triggered_~__retres1~2; 53409#L302 activate_threads_#t~ret10 := is_transmit2_triggered_#res;activate_threads_~tmp___1~0 := activate_threads_#t~ret10;havoc activate_threads_#t~ret10; 53454#L655 assume !(0 != activate_threads_~tmp___1~0); 53441#L655-2 havoc is_transmit3_triggered_#res;havoc is_transmit3_triggered_~__retres1~3;havoc is_transmit3_triggered_~__retres1~3; 53442#L309 assume !(1 == ~t3_pc~0); 53484#L309-2 is_transmit3_triggered_~__retres1~3 := 0; 53483#L320 is_transmit3_triggered_#res := is_transmit3_triggered_~__retres1~3; 53480#L321 activate_threads_#t~ret11 := is_transmit3_triggered_#res;activate_threads_~tmp___2~0 := activate_threads_#t~ret11;havoc activate_threads_#t~ret11; 53481#L663 assume !(0 != activate_threads_~tmp___2~0); 53611#L663-2 havoc is_transmit4_triggered_#res;havoc is_transmit4_triggered_~__retres1~4;havoc is_transmit4_triggered_~__retres1~4; 53612#L328 assume !(1 == ~t4_pc~0); 53709#L328-2 is_transmit4_triggered_~__retres1~4 := 0; 53707#L339 is_transmit4_triggered_#res := is_transmit4_triggered_~__retres1~4; 53641#L340 activate_threads_#t~ret12 := is_transmit4_triggered_#res;activate_threads_~tmp___3~0 := activate_threads_#t~ret12;havoc activate_threads_#t~ret12; 53642#L671 assume !(0 != activate_threads_~tmp___3~0); 53763#L671-2 assume !(1 == ~M_E~0); 53494#L574-1 assume !(1 == ~T1_E~0); 53495#L579-1 assume !(1 == ~T2_E~0); 53566#L584-1 assume !(1 == ~T3_E~0); 53443#L589-1 assume !(1 == ~T4_E~0); 53444#L594-1 assume !(1 == ~E_M~0); 53353#L599-1 assume !(1 == ~E_1~0); 53354#L604-1 assume !(1 == ~E_2~0); 53422#L609-1 assume !(1 == ~E_3~0); 53423#L614-1 assume !(1 == ~E_4~0); 53831#L805-1 assume !false; 56164#L806 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret2, eval_#t~nondet3, eval_~tmp_ndt_1~0, eval_#t~nondet4, eval_~tmp_ndt_2~0, eval_#t~nondet5, eval_~tmp_ndt_3~0, eval_#t~nondet6, eval_~tmp_ndt_4~0, eval_#t~nondet7, eval_~tmp_ndt_5~0, eval_~tmp~0;havoc eval_~tmp~0; 56161#L491 [2018-11-23 08:02:24,139 INFO L796 eck$LassoCheckResult]: Loop: 56161#L491 assume !false; 56159#L426 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~5;havoc exists_runnable_thread_~__retres1~5; 56156#L388 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~5 := 1; 56153#L415 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~5; 56151#L416 eval_#t~ret2 := exists_runnable_thread_#res;eval_~tmp~0 := eval_#t~ret2;havoc eval_#t~ret2; 56149#L430 assume 0 != eval_~tmp~0; 56147#L430-1 assume 0 == ~m_st~0;havoc eval_~tmp_ndt_1~0;eval_~tmp_ndt_1~0 := eval_#t~nondet3;havoc eval_#t~nondet3; 53821#L438 assume !(0 != eval_~tmp_ndt_1~0); 53823#L435 assume !(0 == ~t1_st~0); 55980#L449 assume !(0 == ~t2_st~0); 55975#L463 assume !(0 == ~t3_st~0); 56165#L477 assume !(0 == ~t4_st~0); 56161#L491 [2018-11-23 08:02:24,139 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 08:02:24,140 INFO L82 PathProgramCache]: Analyzing trace with hash -1232031258, now seen corresponding path program 1 times [2018-11-23 08:02:24,140 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 08:02:24,140 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 08:02:24,141 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:02:24,141 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 08:02:24,141 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:02:24,146 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-23 08:02:24,152 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-23 08:02:24,162 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 08:02:24,162 INFO L82 PathProgramCache]: Analyzing trace with hash 1357783123, now seen corresponding path program 1 times [2018-11-23 08:02:24,163 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 08:02:24,163 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 08:02:24,163 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:02:24,164 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 08:02:24,164 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:02:24,170 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-23 08:02:24,172 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-23 08:02:24,174 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 08:02:24,174 INFO L82 PathProgramCache]: Analyzing trace with hash -1573772616, now seen corresponding path program 1 times [2018-11-23 08:02:24,174 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 08:02:24,174 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 08:02:24,175 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:02:24,175 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 08:02:24,175 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:02:24,185 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 08:02:24,226 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 08:02:24,226 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 08:02:24,227 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-23 08:02:24,352 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-23 08:02:24,352 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-23 08:02:24,353 INFO L87 Difference]: Start difference. First operand 3930 states and 5356 transitions. cyclomatic complexity: 1438 Second operand 3 states. [2018-11-23 08:02:24,488 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 08:02:24,489 INFO L93 Difference]: Finished difference Result 7227 states and 9770 transitions. [2018-11-23 08:02:24,490 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-23 08:02:24,490 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 7227 states and 9770 transitions. [2018-11-23 08:02:24,512 INFO L131 ngComponentsAnalysis]: Automaton has 12 accepting balls. 7028 [2018-11-23 08:02:24,532 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 7227 states to 7227 states and 9770 transitions. [2018-11-23 08:02:24,532 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 7227 [2018-11-23 08:02:24,536 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 7227 [2018-11-23 08:02:24,537 INFO L73 IsDeterministic]: Start isDeterministic. Operand 7227 states and 9770 transitions. [2018-11-23 08:02:24,542 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2018-11-23 08:02:24,542 INFO L705 BuchiCegarLoop]: Abstraction has 7227 states and 9770 transitions. [2018-11-23 08:02:24,547 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7227 states and 9770 transitions. [2018-11-23 08:02:24,604 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7227 to 6859. [2018-11-23 08:02:24,605 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6859 states. [2018-11-23 08:02:24,615 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6859 states to 6859 states and 9298 transitions. [2018-11-23 08:02:24,615 INFO L728 BuchiCegarLoop]: Abstraction has 6859 states and 9298 transitions. [2018-11-23 08:02:24,615 INFO L608 BuchiCegarLoop]: Abstraction has 6859 states and 9298 transitions. [2018-11-23 08:02:24,616 INFO L442 BuchiCegarLoop]: ======== Iteration 17============ [2018-11-23 08:02:24,616 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 6859 states and 9298 transitions. [2018-11-23 08:02:24,632 INFO L131 ngComponentsAnalysis]: Automaton has 12 accepting balls. 6660 [2018-11-23 08:02:24,632 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2018-11-23 08:02:24,632 INFO L119 BuchiIsEmpty]: Starting construction of run [2018-11-23 08:02:24,633 INFO L866 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 08:02:24,633 INFO L867 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 08:02:24,633 INFO L794 eck$LassoCheckResult]: Stem: 64910#ULTIMATE.startENTRY ~m_pc~0 := 0;~t1_pc~0 := 0;~t2_pc~0 := 0;~t3_pc~0 := 0;~t4_pc~0 := 0;~m_st~0 := 0;~t1_st~0 := 0;~t2_st~0 := 0;~t3_st~0 := 0;~t4_st~0 := 0;~m_i~0 := 0;~t1_i~0 := 0;~t2_i~0 := 0;~t3_i~0 := 0;~t4_i~0 := 0;~M_E~0 := 2;~T1_E~0 := 2;~T2_E~0 := 2;~T3_E~0 := 2;~T4_E~0 := 2;~E_M~0 := 2;~E_1~0 := 2;~E_2~0 := 2;~E_3~0 := 2;~E_4~0 := 2;~token~0 := 0;~local~0 := 0; 64809#L-1 havoc main_#res;havoc main_~__retres1~6;havoc main_~__retres1~6;~m_i~0 := 1;~t1_i~0 := 1;~t2_i~0 := 1;~t3_i~0 := 1;~t4_i~0 := 1; 64810#L768 havoc start_simulation_#t~ret14, start_simulation_#t~ret15, start_simulation_~kernel_st~0, start_simulation_~tmp~3, start_simulation_~tmp___0~1;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;havoc start_simulation_~tmp___0~1;start_simulation_~kernel_st~0 := 0; 64981#L348 assume 1 == ~m_i~0;~m_st~0 := 0; 64762#L355-1 assume !(1 == ~t1_i~0);~t1_st~0 := 2; 64763#L360-1 assume 1 == ~t2_i~0;~t2_st~0 := 0; 64647#L365-1 assume 1 == ~t3_i~0;~t3_st~0 := 0; 64648#L370-1 assume 1 == ~t4_i~0;~t4_st~0 := 0; 64727#L375-1 assume !(0 == ~M_E~0); 64728#L516-1 assume !(0 == ~T1_E~0); 64560#L521-1 assume !(0 == ~T2_E~0); 64561#L526-1 assume !(0 == ~T3_E~0); 64772#L531-1 assume !(0 == ~T4_E~0); 64773#L536-1 assume !(0 == ~E_M~0); 64665#L541-1 assume !(0 == ~E_1~0); 64666#L546-1 assume !(0 == ~E_2~0); 64741#L551-1 assume !(0 == ~E_3~0); 64611#L556-1 assume !(0 == ~E_4~0); 64612#L561-1 havoc activate_threads_#t~ret8, activate_threads_#t~ret9, activate_threads_#t~ret10, activate_threads_#t~ret11, activate_threads_#t~ret12, activate_threads_~tmp~1, activate_threads_~tmp___0~0, activate_threads_~tmp___1~0, activate_threads_~tmp___2~0, activate_threads_~tmp___3~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc activate_threads_~tmp___1~0;havoc activate_threads_~tmp___2~0;havoc activate_threads_~tmp___3~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; 64807#L252 assume !(1 == ~m_pc~0); 64791#L252-2 is_master_triggered_~__retres1~0 := 0; 64792#L263 is_master_triggered_#res := is_master_triggered_~__retres1~0; 64808#L264 activate_threads_#t~ret8 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret8;havoc activate_threads_#t~ret8; 64892#L639 assume !(0 != activate_threads_~tmp~1); 64735#L639-2 havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; 64736#L271 assume !(1 == ~t1_pc~0); 64985#L271-2 is_transmit1_triggered_~__retres1~1 := 0; 64986#L282 is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; 65016#L283 activate_threads_#t~ret9 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret9;havoc activate_threads_#t~ret9; 65017#L647 assume 0 != activate_threads_~tmp___0~0;~t1_st~0 := 0; 65008#L647-2 havoc is_transmit2_triggered_#res;havoc is_transmit2_triggered_~__retres1~2;havoc is_transmit2_triggered_~__retres1~2; 64571#L290 assume !(1 == ~t2_pc~0); 64572#L290-2 is_transmit2_triggered_~__retres1~2 := 0; 64573#L301 is_transmit2_triggered_#res := is_transmit2_triggered_~__retres1~2; 64574#L302 activate_threads_#t~ret10 := is_transmit2_triggered_#res;activate_threads_~tmp___1~0 := activate_threads_#t~ret10;havoc activate_threads_#t~ret10; 64617#L655 assume !(0 != activate_threads_~tmp___1~0); 64618#L655-2 havoc is_transmit3_triggered_#res;havoc is_transmit3_triggered_~__retres1~3;havoc is_transmit3_triggered_~__retres1~3; 64732#L309 assume !(1 == ~t3_pc~0); 64733#L309-2 is_transmit3_triggered_~__retres1~3 := 0; 64730#L320 is_transmit3_triggered_#res := is_transmit3_triggered_~__retres1~3; 64731#L321 activate_threads_#t~ret11 := is_transmit3_triggered_#res;activate_threads_~tmp___2~0 := activate_threads_#t~ret11;havoc activate_threads_#t~ret11; 64781#L663 assume !(0 != activate_threads_~tmp___2~0); 64782#L663-2 havoc is_transmit4_triggered_#res;havoc is_transmit4_triggered_~__retres1~4;havoc is_transmit4_triggered_~__retres1~4; 64884#L328 assume !(1 == ~t4_pc~0); 64885#L328-2 is_transmit4_triggered_~__retres1~4 := 0; 64881#L339 is_transmit4_triggered_#res := is_transmit4_triggered_~__retres1~4; 64882#L340 activate_threads_#t~ret12 := is_transmit4_triggered_#res;activate_threads_~tmp___3~0 := activate_threads_#t~ret12;havoc activate_threads_#t~ret12; 64947#L671 assume !(0 != activate_threads_~tmp___3~0); 64948#L671-2 assume !(1 == ~M_E~0); 64663#L574-1 assume !(1 == ~T1_E~0); 64664#L579-1 assume !(1 == ~T2_E~0); 64737#L584-1 assume !(1 == ~T3_E~0); 64738#L589-1 assume !(1 == ~T4_E~0); 64939#L594-1 assume !(1 == ~E_M~0); 64940#L599-1 assume !(1 == ~E_1~0); 64854#L604-1 assume !(1 == ~E_2~0); 64587#L609-1 assume !(1 == ~E_3~0); 64588#L614-1 assume !(1 == ~E_4~0); 65220#L805-1 assume !false; 65221#L806 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret2, eval_#t~nondet3, eval_~tmp_ndt_1~0, eval_#t~nondet4, eval_~tmp_ndt_2~0, eval_#t~nondet5, eval_~tmp_ndt_3~0, eval_#t~nondet6, eval_~tmp_ndt_4~0, eval_#t~nondet7, eval_~tmp_ndt_5~0, eval_~tmp~0;havoc eval_~tmp~0; 65209#L491 [2018-11-23 08:02:24,633 INFO L796 eck$LassoCheckResult]: Loop: 65209#L491 assume !false; 65210#L426 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~5;havoc exists_runnable_thread_~__retres1~5; 65200#L388 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~5 := 1; 65201#L415 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~5; 65192#L416 eval_#t~ret2 := exists_runnable_thread_#res;eval_~tmp~0 := eval_#t~ret2;havoc eval_#t~ret2; 65193#L430 assume 0 != eval_~tmp~0; 65179#L430-1 assume 0 == ~m_st~0;havoc eval_~tmp_ndt_1~0;eval_~tmp_ndt_1~0 := eval_#t~nondet3;havoc eval_#t~nondet3; 65180#L438 assume !(0 != eval_~tmp_ndt_1~0); 65898#L435 assume 0 == ~t1_st~0;havoc eval_~tmp_ndt_2~0;eval_~tmp_ndt_2~0 := eval_#t~nondet4;havoc eval_#t~nondet4; 66017#L452 assume !(0 != eval_~tmp_ndt_2~0); 66024#L449 assume !(0 == ~t2_st~0); 65222#L463 assume !(0 == ~t3_st~0); 65223#L477 assume !(0 == ~t4_st~0); 65209#L491 [2018-11-23 08:02:24,633 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 08:02:24,633 INFO L82 PathProgramCache]: Analyzing trace with hash -1892956382, now seen corresponding path program 1 times [2018-11-23 08:02:24,634 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 08:02:24,634 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 08:02:24,634 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:02:24,634 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 08:02:24,634 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:02:24,637 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 08:02:24,649 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 08:02:24,649 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 08:02:24,649 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-23 08:02:24,649 INFO L799 eck$LassoCheckResult]: stem already infeasible [2018-11-23 08:02:24,649 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 08:02:24,650 INFO L82 PathProgramCache]: Analyzing trace with hash -1003661710, now seen corresponding path program 1 times [2018-11-23 08:02:24,650 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 08:02:24,650 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 08:02:24,650 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:02:24,650 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 08:02:24,650 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:02:24,652 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-23 08:02:24,654 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-23 08:02:24,738 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-23 08:02:24,738 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-23 08:02:24,738 INFO L87 Difference]: Start difference. First operand 6859 states and 9298 transitions. cyclomatic complexity: 2451 Second operand 3 states. [2018-11-23 08:02:24,756 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 08:02:24,756 INFO L93 Difference]: Finished difference Result 6802 states and 9221 transitions. [2018-11-23 08:02:24,757 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-23 08:02:24,758 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 6802 states and 9221 transitions. [2018-11-23 08:02:24,778 INFO L131 ngComponentsAnalysis]: Automaton has 12 accepting balls. 6660 [2018-11-23 08:02:24,796 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 6802 states to 6802 states and 9221 transitions. [2018-11-23 08:02:24,796 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 6802 [2018-11-23 08:02:24,800 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 6802 [2018-11-23 08:02:24,800 INFO L73 IsDeterministic]: Start isDeterministic. Operand 6802 states and 9221 transitions. [2018-11-23 08:02:24,805 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2018-11-23 08:02:24,805 INFO L705 BuchiCegarLoop]: Abstraction has 6802 states and 9221 transitions. [2018-11-23 08:02:24,810 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6802 states and 9221 transitions. [2018-11-23 08:02:24,862 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6802 to 6802. [2018-11-23 08:02:24,862 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6802 states. [2018-11-23 08:02:24,873 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6802 states to 6802 states and 9221 transitions. [2018-11-23 08:02:24,873 INFO L728 BuchiCegarLoop]: Abstraction has 6802 states and 9221 transitions. [2018-11-23 08:02:24,873 INFO L608 BuchiCegarLoop]: Abstraction has 6802 states and 9221 transitions. [2018-11-23 08:02:24,873 INFO L442 BuchiCegarLoop]: ======== Iteration 18============ [2018-11-23 08:02:24,873 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 6802 states and 9221 transitions. [2018-11-23 08:02:24,888 INFO L131 ngComponentsAnalysis]: Automaton has 12 accepting balls. 6660 [2018-11-23 08:02:24,888 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2018-11-23 08:02:24,888 INFO L119 BuchiIsEmpty]: Starting construction of run [2018-11-23 08:02:24,889 INFO L866 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 08:02:24,889 INFO L867 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 08:02:24,889 INFO L794 eck$LassoCheckResult]: Stem: 78571#ULTIMATE.startENTRY ~m_pc~0 := 0;~t1_pc~0 := 0;~t2_pc~0 := 0;~t3_pc~0 := 0;~t4_pc~0 := 0;~m_st~0 := 0;~t1_st~0 := 0;~t2_st~0 := 0;~t3_st~0 := 0;~t4_st~0 := 0;~m_i~0 := 0;~t1_i~0 := 0;~t2_i~0 := 0;~t3_i~0 := 0;~t4_i~0 := 0;~M_E~0 := 2;~T1_E~0 := 2;~T2_E~0 := 2;~T3_E~0 := 2;~T4_E~0 := 2;~E_M~0 := 2;~E_1~0 := 2;~E_2~0 := 2;~E_3~0 := 2;~E_4~0 := 2;~token~0 := 0;~local~0 := 0; 78469#L-1 havoc main_#res;havoc main_~__retres1~6;havoc main_~__retres1~6;~m_i~0 := 1;~t1_i~0 := 1;~t2_i~0 := 1;~t3_i~0 := 1;~t4_i~0 := 1; 78470#L768 havoc start_simulation_#t~ret14, start_simulation_#t~ret15, start_simulation_~kernel_st~0, start_simulation_~tmp~3, start_simulation_~tmp___0~1;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;havoc start_simulation_~tmp___0~1;start_simulation_~kernel_st~0 := 0; 78636#L348 assume 1 == ~m_i~0;~m_st~0 := 0; 78425#L355-1 assume 1 == ~t1_i~0;~t1_st~0 := 0; 78426#L360-1 assume 1 == ~t2_i~0;~t2_st~0 := 0; 78309#L365-1 assume 1 == ~t3_i~0;~t3_st~0 := 0; 78310#L370-1 assume 1 == ~t4_i~0;~t4_st~0 := 0; 78395#L375-1 assume !(0 == ~M_E~0); 78396#L516-1 assume !(0 == ~T1_E~0); 78230#L521-1 assume !(0 == ~T2_E~0); 78231#L526-1 assume !(0 == ~T3_E~0); 78433#L531-1 assume !(0 == ~T4_E~0); 78434#L536-1 assume !(0 == ~E_M~0); 78327#L541-1 assume !(0 == ~E_1~0); 78328#L546-1 assume !(0 == ~E_2~0); 78403#L551-1 assume !(0 == ~E_3~0); 78278#L556-1 assume !(0 == ~E_4~0); 78279#L561-1 havoc activate_threads_#t~ret8, activate_threads_#t~ret9, activate_threads_#t~ret10, activate_threads_#t~ret11, activate_threads_#t~ret12, activate_threads_~tmp~1, activate_threads_~tmp___0~0, activate_threads_~tmp___1~0, activate_threads_~tmp___2~0, activate_threads_~tmp___3~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc activate_threads_~tmp___1~0;havoc activate_threads_~tmp___2~0;havoc activate_threads_~tmp___3~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; 78467#L252 assume !(1 == ~m_pc~0); 78451#L252-2 is_master_triggered_~__retres1~0 := 0; 78452#L263 is_master_triggered_#res := is_master_triggered_~__retres1~0; 78468#L264 activate_threads_#t~ret8 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret8;havoc activate_threads_#t~ret8; 78553#L639 assume !(0 != activate_threads_~tmp~1); 78398#L639-2 havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; 78399#L271 assume !(1 == ~t1_pc~0); 78623#L271-2 is_transmit1_triggered_~__retres1~1 := 0; 78625#L282 is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; 78626#L283 activate_threads_#t~ret9 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret9;havoc activate_threads_#t~ret9; 78663#L647 assume !(0 != activate_threads_~tmp___0~0); 78664#L647-2 havoc is_transmit2_triggered_#res;havoc is_transmit2_triggered_~__retres1~2;havoc is_transmit2_triggered_~__retres1~2; 78240#L290 assume !(1 == ~t2_pc~0); 78228#L290-2 is_transmit2_triggered_~__retres1~2 := 0; 78229#L301 is_transmit2_triggered_#res := is_transmit2_triggered_~__retres1~2; 78241#L302 activate_threads_#t~ret10 := is_transmit2_triggered_#res;activate_threads_~tmp___1~0 := activate_threads_#t~ret10;havoc activate_threads_#t~ret10; 78284#L655 assume !(0 != activate_threads_~tmp___1~0); 78272#L655-2 havoc is_transmit3_triggered_#res;havoc is_transmit3_triggered_~__retres1~3;havoc is_transmit3_triggered_~__retres1~3; 78273#L309 assume !(1 == ~t3_pc~0); 78315#L309-2 is_transmit3_triggered_~__retres1~3 := 0; 78314#L320 is_transmit3_triggered_#res := is_transmit3_triggered_~__retres1~3; 78311#L321 activate_threads_#t~ret11 := is_transmit3_triggered_#res;activate_threads_~tmp___2~0 := activate_threads_#t~ret11;havoc activate_threads_#t~ret11; 78312#L663 assume !(0 != activate_threads_~tmp___2~0); 78444#L663-2 havoc is_transmit4_triggered_#res;havoc is_transmit4_triggered_~__retres1~4;havoc is_transmit4_triggered_~__retres1~4; 78445#L328 assume !(1 == ~t4_pc~0); 78547#L328-2 is_transmit4_triggered_~__retres1~4 := 0; 78545#L339 is_transmit4_triggered_#res := is_transmit4_triggered_~__retres1~4; 78471#L340 activate_threads_#t~ret12 := is_transmit4_triggered_#res;activate_threads_~tmp___3~0 := activate_threads_#t~ret12;havoc activate_threads_#t~ret12; 78472#L671 assume !(0 != activate_threads_~tmp___3~0); 78598#L671-2 assume !(1 == ~M_E~0); 78325#L574-1 assume !(1 == ~T1_E~0); 78326#L579-1 assume !(1 == ~T2_E~0); 78400#L584-1 assume !(1 == ~T3_E~0); 78274#L589-1 assume !(1 == ~T4_E~0); 78275#L594-1 assume !(1 == ~E_M~0); 78184#L599-1 assume !(1 == ~E_1~0); 78185#L604-1 assume !(1 == ~E_2~0); 78254#L609-1 assume !(1 == ~E_3~0); 78255#L614-1 assume !(1 == ~E_4~0); 78665#L805-1 assume !false; 79014#L806 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret2, eval_#t~nondet3, eval_~tmp_ndt_1~0, eval_#t~nondet4, eval_~tmp_ndt_2~0, eval_#t~nondet5, eval_~tmp_ndt_3~0, eval_#t~nondet6, eval_~tmp_ndt_4~0, eval_#t~nondet7, eval_~tmp_ndt_5~0, eval_~tmp~0;havoc eval_~tmp~0; 79010#L491 [2018-11-23 08:02:24,889 INFO L796 eck$LassoCheckResult]: Loop: 79010#L491 assume !false; 79008#L426 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~5;havoc exists_runnable_thread_~__retres1~5; 79005#L388 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~5 := 1; 79002#L415 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~5; 79000#L416 eval_#t~ret2 := exists_runnable_thread_#res;eval_~tmp~0 := eval_#t~ret2;havoc eval_#t~ret2; 78998#L430 assume 0 != eval_~tmp~0; 78995#L430-1 assume 0 == ~m_st~0;havoc eval_~tmp_ndt_1~0;eval_~tmp_ndt_1~0 := eval_#t~nondet3;havoc eval_#t~nondet3; 78993#L438 assume !(0 != eval_~tmp_ndt_1~0); 78991#L435 assume 0 == ~t1_st~0;havoc eval_~tmp_ndt_2~0;eval_~tmp_ndt_2~0 := eval_#t~nondet4;havoc eval_#t~nondet4; 78960#L452 assume !(0 != eval_~tmp_ndt_2~0); 78989#L449 assume !(0 == ~t2_st~0); 79018#L463 assume !(0 == ~t3_st~0); 79015#L477 assume !(0 == ~t4_st~0); 79010#L491 [2018-11-23 08:02:24,892 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 08:02:24,892 INFO L82 PathProgramCache]: Analyzing trace with hash -1232031258, now seen corresponding path program 2 times [2018-11-23 08:02:24,892 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 08:02:24,892 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 08:02:24,893 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:02:24,893 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 08:02:24,893 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:02:24,897 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-23 08:02:24,902 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-23 08:02:24,908 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 08:02:24,908 INFO L82 PathProgramCache]: Analyzing trace with hash -1003661710, now seen corresponding path program 2 times [2018-11-23 08:02:24,909 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 08:02:24,909 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 08:02:24,909 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:02:24,909 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-23 08:02:24,909 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:02:24,911 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-23 08:02:24,913 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-23 08:02:24,914 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 08:02:24,914 INFO L82 PathProgramCache]: Analyzing trace with hash -1687576403, now seen corresponding path program 1 times [2018-11-23 08:02:24,914 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 08:02:24,914 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 08:02:24,915 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:02:24,915 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-23 08:02:24,915 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:02:24,921 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 08:02:24,953 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 08:02:24,953 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 08:02:24,953 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-23 08:02:25,032 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-23 08:02:25,032 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-23 08:02:25,032 INFO L87 Difference]: Start difference. First operand 6802 states and 9221 transitions. cyclomatic complexity: 2431 Second operand 3 states. [2018-11-23 08:02:25,103 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 08:02:25,104 INFO L93 Difference]: Finished difference Result 8610 states and 11637 transitions. [2018-11-23 08:02:25,105 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-23 08:02:25,105 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 8610 states and 11637 transitions. [2018-11-23 08:02:25,130 INFO L131 ngComponentsAnalysis]: Automaton has 12 accepting balls. 8444 [2018-11-23 08:02:25,150 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 8610 states to 8610 states and 11637 transitions. [2018-11-23 08:02:25,150 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 8610 [2018-11-23 08:02:25,155 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 8610 [2018-11-23 08:02:25,155 INFO L73 IsDeterministic]: Start isDeterministic. Operand 8610 states and 11637 transitions. [2018-11-23 08:02:25,160 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2018-11-23 08:02:25,160 INFO L705 BuchiCegarLoop]: Abstraction has 8610 states and 11637 transitions. [2018-11-23 08:02:25,166 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8610 states and 11637 transitions. [2018-11-23 08:02:25,221 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8610 to 8346. [2018-11-23 08:02:25,221 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8346 states. [2018-11-23 08:02:25,232 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8346 states to 8346 states and 11301 transitions. [2018-11-23 08:02:25,232 INFO L728 BuchiCegarLoop]: Abstraction has 8346 states and 11301 transitions. [2018-11-23 08:02:25,232 INFO L608 BuchiCegarLoop]: Abstraction has 8346 states and 11301 transitions. [2018-11-23 08:02:25,232 INFO L442 BuchiCegarLoop]: ======== Iteration 19============ [2018-11-23 08:02:25,232 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 8346 states and 11301 transitions. [2018-11-23 08:02:25,250 INFO L131 ngComponentsAnalysis]: Automaton has 12 accepting balls. 8180 [2018-11-23 08:02:25,250 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2018-11-23 08:02:25,250 INFO L119 BuchiIsEmpty]: Starting construction of run [2018-11-23 08:02:25,251 INFO L866 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 08:02:25,251 INFO L867 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 08:02:25,251 INFO L794 eck$LassoCheckResult]: Stem: 93991#ULTIMATE.startENTRY ~m_pc~0 := 0;~t1_pc~0 := 0;~t2_pc~0 := 0;~t3_pc~0 := 0;~t4_pc~0 := 0;~m_st~0 := 0;~t1_st~0 := 0;~t2_st~0 := 0;~t3_st~0 := 0;~t4_st~0 := 0;~m_i~0 := 0;~t1_i~0 := 0;~t2_i~0 := 0;~t3_i~0 := 0;~t4_i~0 := 0;~M_E~0 := 2;~T1_E~0 := 2;~T2_E~0 := 2;~T3_E~0 := 2;~T4_E~0 := 2;~E_M~0 := 2;~E_1~0 := 2;~E_2~0 := 2;~E_3~0 := 2;~E_4~0 := 2;~token~0 := 0;~local~0 := 0; 93892#L-1 havoc main_#res;havoc main_~__retres1~6;havoc main_~__retres1~6;~m_i~0 := 1;~t1_i~0 := 1;~t2_i~0 := 1;~t3_i~0 := 1;~t4_i~0 := 1; 93893#L768 havoc start_simulation_#t~ret14, start_simulation_#t~ret15, start_simulation_~kernel_st~0, start_simulation_~tmp~3, start_simulation_~tmp___0~1;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;havoc start_simulation_~tmp___0~1;start_simulation_~kernel_st~0 := 0; 94076#L348 assume 1 == ~m_i~0;~m_st~0 := 0; 93843#L355-1 assume 1 == ~t1_i~0;~t1_st~0 := 0; 93844#L360-1 assume 1 == ~t2_i~0;~t2_st~0 := 0; 93726#L365-1 assume 1 == ~t3_i~0;~t3_st~0 := 0; 93727#L370-1 assume 1 == ~t4_i~0;~t4_st~0 := 0; 93813#L375-1 assume !(0 == ~M_E~0); 93814#L516-1 assume !(0 == ~T1_E~0); 93648#L521-1 assume !(0 == ~T2_E~0); 93649#L526-1 assume !(0 == ~T3_E~0); 93852#L531-1 assume !(0 == ~T4_E~0); 93853#L536-1 assume !(0 == ~E_M~0); 93744#L541-1 assume !(0 == ~E_1~0); 93745#L546-1 assume !(0 == ~E_2~0); 93822#L551-1 assume !(0 == ~E_3~0); 93696#L556-1 assume !(0 == ~E_4~0); 93697#L561-1 havoc activate_threads_#t~ret8, activate_threads_#t~ret9, activate_threads_#t~ret10, activate_threads_#t~ret11, activate_threads_#t~ret12, activate_threads_~tmp~1, activate_threads_~tmp___0~0, activate_threads_~tmp___1~0, activate_threads_~tmp___2~0, activate_threads_~tmp___3~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc activate_threads_~tmp___1~0;havoc activate_threads_~tmp___2~0;havoc activate_threads_~tmp___3~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; 93890#L252 assume !(1 == ~m_pc~0); 93874#L252-2 is_master_triggered_~__retres1~0 := 0; 93875#L263 is_master_triggered_#res := is_master_triggered_~__retres1~0; 93891#L264 activate_threads_#t~ret8 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret8;havoc activate_threads_#t~ret8; 93974#L639 assume !(0 != activate_threads_~tmp~1); 93817#L639-2 havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; 93818#L271 assume !(1 == ~t1_pc~0); 94062#L271-2 is_transmit1_triggered_~__retres1~1 := 0; 94064#L282 is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; 94065#L283 activate_threads_#t~ret9 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret9;havoc activate_threads_#t~ret9; 94105#L647 assume !(0 != activate_threads_~tmp___0~0); 94106#L647-2 havoc is_transmit2_triggered_#res;havoc is_transmit2_triggered_~__retres1~2;havoc is_transmit2_triggered_~__retres1~2; 93659#L290 assume !(1 == ~t2_pc~0); 93646#L290-2 is_transmit2_triggered_~__retres1~2 := 0; 93647#L301 is_transmit2_triggered_#res := is_transmit2_triggered_~__retres1~2; 93660#L302 activate_threads_#t~ret10 := is_transmit2_triggered_#res;activate_threads_~tmp___1~0 := activate_threads_#t~ret10;havoc activate_threads_#t~ret10; 93702#L655 assume !(0 != activate_threads_~tmp___1~0); 93690#L655-2 havoc is_transmit3_triggered_#res;havoc is_transmit3_triggered_~__retres1~3;havoc is_transmit3_triggered_~__retres1~3; 93691#L309 assume !(1 == ~t3_pc~0); 93732#L309-2 is_transmit3_triggered_~__retres1~3 := 0; 93731#L320 is_transmit3_triggered_#res := is_transmit3_triggered_~__retres1~3; 93728#L321 activate_threads_#t~ret11 := is_transmit3_triggered_#res;activate_threads_~tmp___2~0 := activate_threads_#t~ret11;havoc activate_threads_#t~ret11; 93729#L663 assume !(0 != activate_threads_~tmp___2~0); 93863#L663-2 havoc is_transmit4_triggered_#res;havoc is_transmit4_triggered_~__retres1~4;havoc is_transmit4_triggered_~__retres1~4; 93864#L328 assume !(1 == ~t4_pc~0); 93965#L328-2 is_transmit4_triggered_~__retres1~4 := 0; 93963#L339 is_transmit4_triggered_#res := is_transmit4_triggered_~__retres1~4; 93894#L340 activate_threads_#t~ret12 := is_transmit4_triggered_#res;activate_threads_~tmp___3~0 := activate_threads_#t~ret12;havoc activate_threads_#t~ret12; 93895#L671 assume !(0 != activate_threads_~tmp___3~0); 94024#L671-2 assume !(1 == ~M_E~0); 93742#L574-1 assume !(1 == ~T1_E~0); 93743#L579-1 assume !(1 == ~T2_E~0); 93819#L584-1 assume !(1 == ~T3_E~0); 93692#L589-1 assume !(1 == ~T4_E~0); 93693#L594-1 assume !(1 == ~E_M~0); 93605#L599-1 assume !(1 == ~E_1~0); 93606#L604-1 assume !(1 == ~E_2~0); 93673#L609-1 assume !(1 == ~E_3~0); 93674#L614-1 assume !(1 == ~E_4~0); 94107#L805-1 assume !false; 96201#L806 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret2, eval_#t~nondet3, eval_~tmp_ndt_1~0, eval_#t~nondet4, eval_~tmp_ndt_2~0, eval_#t~nondet5, eval_~tmp_ndt_3~0, eval_#t~nondet6, eval_~tmp_ndt_4~0, eval_#t~nondet7, eval_~tmp_ndt_5~0, eval_~tmp~0;havoc eval_~tmp~0; 96202#L491 [2018-11-23 08:02:25,251 INFO L796 eck$LassoCheckResult]: Loop: 96202#L491 assume !false; 97016#L426 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~5;havoc exists_runnable_thread_~__retres1~5; 97014#L388 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~5 := 1; 97013#L415 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~5; 97012#L416 eval_#t~ret2 := exists_runnable_thread_#res;eval_~tmp~0 := eval_#t~ret2;havoc eval_#t~ret2; 97011#L430 assume 0 != eval_~tmp~0; 97009#L430-1 assume 0 == ~m_st~0;havoc eval_~tmp_ndt_1~0;eval_~tmp_ndt_1~0 := eval_#t~nondet3;havoc eval_#t~nondet3; 97004#L438 assume !(0 != eval_~tmp_ndt_1~0); 96913#L435 assume 0 == ~t1_st~0;havoc eval_~tmp_ndt_2~0;eval_~tmp_ndt_2~0 := eval_#t~nondet4;havoc eval_#t~nondet4; 96911#L452 assume !(0 != eval_~tmp_ndt_2~0); 96912#L449 assume 0 == ~t2_st~0;havoc eval_~tmp_ndt_3~0;eval_~tmp_ndt_3~0 := eval_#t~nondet5;havoc eval_#t~nondet5; 97025#L466 assume !(0 != eval_~tmp_ndt_3~0); 97020#L463 assume !(0 == ~t3_st~0); 97019#L477 assume !(0 == ~t4_st~0); 96202#L491 [2018-11-23 08:02:25,251 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 08:02:25,252 INFO L82 PathProgramCache]: Analyzing trace with hash -1232031258, now seen corresponding path program 3 times [2018-11-23 08:02:25,252 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 08:02:25,252 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 08:02:25,252 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:02:25,252 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 08:02:25,252 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:02:25,256 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-23 08:02:25,261 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-23 08:02:25,267 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 08:02:25,267 INFO L82 PathProgramCache]: Analyzing trace with hash -1053426655, now seen corresponding path program 1 times [2018-11-23 08:02:25,267 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 08:02:25,267 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 08:02:25,268 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:02:25,268 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-23 08:02:25,268 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:02:25,269 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-23 08:02:25,271 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-23 08:02:25,272 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 08:02:25,272 INFO L82 PathProgramCache]: Analyzing trace with hash -779945658, now seen corresponding path program 1 times [2018-11-23 08:02:25,273 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 08:02:25,273 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 08:02:25,273 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:02:25,273 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 08:02:25,273 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:02:25,280 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 08:02:25,331 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 08:02:25,331 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 08:02:25,331 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-11-23 08:02:25,385 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-23 08:02:25,385 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-23 08:02:25,385 INFO L87 Difference]: Start difference. First operand 8346 states and 11301 transitions. cyclomatic complexity: 2967 Second operand 3 states. [2018-11-23 08:02:25,435 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 08:02:25,435 INFO L93 Difference]: Finished difference Result 14712 states and 19809 transitions. [2018-11-23 08:02:25,436 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-23 08:02:25,436 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 14712 states and 19809 transitions. [2018-11-23 08:02:25,471 INFO L131 ngComponentsAnalysis]: Automaton has 12 accepting balls. 14442 [2018-11-23 08:02:25,499 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 14712 states to 14712 states and 19809 transitions. [2018-11-23 08:02:25,499 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 14712 [2018-11-23 08:02:25,507 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 14712 [2018-11-23 08:02:25,507 INFO L73 IsDeterministic]: Start isDeterministic. Operand 14712 states and 19809 transitions. [2018-11-23 08:02:25,514 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2018-11-23 08:02:25,514 INFO L705 BuchiCegarLoop]: Abstraction has 14712 states and 19809 transitions. [2018-11-23 08:02:25,522 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 14712 states and 19809 transitions. [2018-11-23 08:02:25,598 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 14712 to 14256. [2018-11-23 08:02:25,598 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14256 states. [2018-11-23 08:02:25,613 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14256 states to 14256 states and 19257 transitions. [2018-11-23 08:02:25,613 INFO L728 BuchiCegarLoop]: Abstraction has 14256 states and 19257 transitions. [2018-11-23 08:02:25,613 INFO L608 BuchiCegarLoop]: Abstraction has 14256 states and 19257 transitions. [2018-11-23 08:02:25,613 INFO L442 BuchiCegarLoop]: ======== Iteration 20============ [2018-11-23 08:02:25,613 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 14256 states and 19257 transitions. [2018-11-23 08:02:25,641 INFO L131 ngComponentsAnalysis]: Automaton has 12 accepting balls. 13986 [2018-11-23 08:02:25,641 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2018-11-23 08:02:25,641 INFO L119 BuchiIsEmpty]: Starting construction of run [2018-11-23 08:02:25,642 INFO L866 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 08:02:25,642 INFO L867 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 08:02:25,642 INFO L794 eck$LassoCheckResult]: Stem: 117052#ULTIMATE.startENTRY ~m_pc~0 := 0;~t1_pc~0 := 0;~t2_pc~0 := 0;~t3_pc~0 := 0;~t4_pc~0 := 0;~m_st~0 := 0;~t1_st~0 := 0;~t2_st~0 := 0;~t3_st~0 := 0;~t4_st~0 := 0;~m_i~0 := 0;~t1_i~0 := 0;~t2_i~0 := 0;~t3_i~0 := 0;~t4_i~0 := 0;~M_E~0 := 2;~T1_E~0 := 2;~T2_E~0 := 2;~T3_E~0 := 2;~T4_E~0 := 2;~E_M~0 := 2;~E_1~0 := 2;~E_2~0 := 2;~E_3~0 := 2;~E_4~0 := 2;~token~0 := 0;~local~0 := 0; 116953#L-1 havoc main_#res;havoc main_~__retres1~6;havoc main_~__retres1~6;~m_i~0 := 1;~t1_i~0 := 1;~t2_i~0 := 1;~t3_i~0 := 1;~t4_i~0 := 1; 116954#L768 havoc start_simulation_#t~ret14, start_simulation_#t~ret15, start_simulation_~kernel_st~0, start_simulation_~tmp~3, start_simulation_~tmp___0~1;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;havoc start_simulation_~tmp___0~1;start_simulation_~kernel_st~0 := 0; 117116#L348 assume 1 == ~m_i~0;~m_st~0 := 0; 116906#L355-1 assume 1 == ~t1_i~0;~t1_st~0 := 0; 116907#L360-1 assume 1 == ~t2_i~0;~t2_st~0 := 0; 116789#L365-1 assume 1 == ~t3_i~0;~t3_st~0 := 0; 116790#L370-1 assume 1 == ~t4_i~0;~t4_st~0 := 0; 116873#L375-1 assume !(0 == ~M_E~0); 116874#L516-1 assume !(0 == ~T1_E~0); 116716#L521-1 assume !(0 == ~T2_E~0); 116717#L526-1 assume !(0 == ~T3_E~0); 116917#L531-1 assume !(0 == ~T4_E~0); 116918#L536-1 assume !(0 == ~E_M~0); 116807#L541-1 assume !(0 == ~E_1~0); 116808#L546-1 assume !(0 == ~E_2~0); 116881#L551-1 assume !(0 == ~E_3~0); 116762#L556-1 assume !(0 == ~E_4~0); 116763#L561-1 havoc activate_threads_#t~ret8, activate_threads_#t~ret9, activate_threads_#t~ret10, activate_threads_#t~ret11, activate_threads_#t~ret12, activate_threads_~tmp~1, activate_threads_~tmp___0~0, activate_threads_~tmp___1~0, activate_threads_~tmp___2~0, activate_threads_~tmp___3~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc activate_threads_~tmp___1~0;havoc activate_threads_~tmp___2~0;havoc activate_threads_~tmp___3~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; 116951#L252 assume !(1 == ~m_pc~0); 116935#L252-2 is_master_triggered_~__retres1~0 := 0; 116936#L263 is_master_triggered_#res := is_master_triggered_~__retres1~0; 116952#L264 activate_threads_#t~ret8 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret8;havoc activate_threads_#t~ret8; 117036#L639 assume !(0 != activate_threads_~tmp~1); 116876#L639-2 havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; 116877#L271 assume !(1 == ~t1_pc~0); 117104#L271-2 is_transmit1_triggered_~__retres1~1 := 0; 117106#L282 is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; 117107#L283 activate_threads_#t~ret9 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret9;havoc activate_threads_#t~ret9; 117147#L647 assume !(0 != activate_threads_~tmp___0~0); 117148#L647-2 havoc is_transmit2_triggered_#res;havoc is_transmit2_triggered_~__retres1~2;havoc is_transmit2_triggered_~__retres1~2; 116726#L290 assume !(1 == ~t2_pc~0); 116714#L290-2 is_transmit2_triggered_~__retres1~2 := 0; 116715#L301 is_transmit2_triggered_#res := is_transmit2_triggered_~__retres1~2; 116727#L302 activate_threads_#t~ret10 := is_transmit2_triggered_#res;activate_threads_~tmp___1~0 := activate_threads_#t~ret10;havoc activate_threads_#t~ret10; 116768#L655 assume !(0 != activate_threads_~tmp___1~0); 116756#L655-2 havoc is_transmit3_triggered_#res;havoc is_transmit3_triggered_~__retres1~3;havoc is_transmit3_triggered_~__retres1~3; 116757#L309 assume !(1 == ~t3_pc~0); 116795#L309-2 is_transmit3_triggered_~__retres1~3 := 0; 116794#L320 is_transmit3_triggered_#res := is_transmit3_triggered_~__retres1~3; 116791#L321 activate_threads_#t~ret11 := is_transmit3_triggered_#res;activate_threads_~tmp___2~0 := activate_threads_#t~ret11;havoc activate_threads_#t~ret11; 116792#L663 assume !(0 != activate_threads_~tmp___2~0); 116928#L663-2 havoc is_transmit4_triggered_#res;havoc is_transmit4_triggered_~__retres1~4;havoc is_transmit4_triggered_~__retres1~4; 116929#L328 assume !(1 == ~t4_pc~0); 117028#L328-2 is_transmit4_triggered_~__retres1~4 := 0; 117026#L339 is_transmit4_triggered_#res := is_transmit4_triggered_~__retres1~4; 116955#L340 activate_threads_#t~ret12 := is_transmit4_triggered_#res;activate_threads_~tmp___3~0 := activate_threads_#t~ret12;havoc activate_threads_#t~ret12; 116956#L671 assume !(0 != activate_threads_~tmp___3~0); 117080#L671-2 assume !(1 == ~M_E~0); 116805#L574-1 assume !(1 == ~T1_E~0); 116806#L579-1 assume !(1 == ~T2_E~0); 116878#L584-1 assume !(1 == ~T3_E~0); 116758#L589-1 assume !(1 == ~T4_E~0); 116759#L594-1 assume !(1 == ~E_M~0); 116671#L599-1 assume !(1 == ~E_1~0); 116672#L604-1 assume !(1 == ~E_2~0); 116738#L609-1 assume !(1 == ~E_3~0); 116739#L614-1 assume !(1 == ~E_4~0); 117149#L805-1 assume !false; 121481#L806 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret2, eval_#t~nondet3, eval_~tmp_ndt_1~0, eval_#t~nondet4, eval_~tmp_ndt_2~0, eval_#t~nondet5, eval_~tmp_ndt_3~0, eval_#t~nondet6, eval_~tmp_ndt_4~0, eval_#t~nondet7, eval_~tmp_ndt_5~0, eval_~tmp~0;havoc eval_~tmp~0; 121478#L491 [2018-11-23 08:02:25,642 INFO L796 eck$LassoCheckResult]: Loop: 121478#L491 assume !false; 121477#L426 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~5;havoc exists_runnable_thread_~__retres1~5; 121475#L388 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~5 := 1; 121474#L415 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~5; 121473#L416 eval_#t~ret2 := exists_runnable_thread_#res;eval_~tmp~0 := eval_#t~ret2;havoc eval_#t~ret2; 121471#L430 assume 0 != eval_~tmp~0; 121470#L430-1 assume 0 == ~m_st~0;havoc eval_~tmp_ndt_1~0;eval_~tmp_ndt_1~0 := eval_#t~nondet3;havoc eval_#t~nondet3; 121468#L438 assume !(0 != eval_~tmp_ndt_1~0); 120865#L435 assume 0 == ~t1_st~0;havoc eval_~tmp_ndt_2~0;eval_~tmp_ndt_2~0 := eval_#t~nondet4;havoc eval_#t~nondet4; 120862#L452 assume !(0 != eval_~tmp_ndt_2~0); 120861#L449 assume 0 == ~t2_st~0;havoc eval_~tmp_ndt_3~0;eval_~tmp_ndt_3~0 := eval_#t~nondet5;havoc eval_#t~nondet5; 120858#L466 assume !(0 != eval_~tmp_ndt_3~0); 120859#L463 assume 0 == ~t3_st~0;havoc eval_~tmp_ndt_4~0;eval_~tmp_ndt_4~0 := eval_#t~nondet6;havoc eval_#t~nondet6; 119144#L480 assume !(0 != eval_~tmp_ndt_4~0); 121482#L477 assume !(0 == ~t4_st~0); 121478#L491 [2018-11-23 08:02:25,643 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 08:02:25,643 INFO L82 PathProgramCache]: Analyzing trace with hash -1232031258, now seen corresponding path program 4 times [2018-11-23 08:02:25,643 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 08:02:25,643 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 08:02:25,644 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:02:25,644 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 08:02:25,644 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:02:25,648 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-23 08:02:25,653 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-23 08:02:25,661 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 08:02:25,661 INFO L82 PathProgramCache]: Analyzing trace with hash 1703362212, now seen corresponding path program 1 times [2018-11-23 08:02:25,661 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 08:02:25,661 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 08:02:25,662 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:02:25,662 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-23 08:02:25,662 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:02:25,664 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-23 08:02:25,666 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-23 08:02:25,668 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 08:02:25,668 INFO L82 PathProgramCache]: Analyzing trace with hash 1591338527, now seen corresponding path program 1 times [2018-11-23 08:02:25,668 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 08:02:25,668 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 08:02:25,669 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:02:25,669 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 08:02:25,669 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:02:25,674 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-23 08:02:25,699 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-23 08:02:25,699 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-23 08:02:25,699 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-11-23 08:02:25,782 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-23 08:02:25,782 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-23 08:02:25,782 INFO L87 Difference]: Start difference. First operand 14256 states and 19257 transitions. cyclomatic complexity: 5013 Second operand 3 states. [2018-11-23 08:02:25,838 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-23 08:02:25,838 INFO L93 Difference]: Finished difference Result 18027 states and 24235 transitions. [2018-11-23 08:02:25,839 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-23 08:02:25,839 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 18027 states and 24235 transitions. [2018-11-23 08:02:25,883 INFO L131 ngComponentsAnalysis]: Automaton has 12 accepting balls. 17701 [2018-11-23 08:02:25,912 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 18027 states to 18027 states and 24235 transitions. [2018-11-23 08:02:25,913 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 18027 [2018-11-23 08:02:25,922 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 18027 [2018-11-23 08:02:25,922 INFO L73 IsDeterministic]: Start isDeterministic. Operand 18027 states and 24235 transitions. [2018-11-23 08:02:25,930 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2018-11-23 08:02:25,930 INFO L705 BuchiCegarLoop]: Abstraction has 18027 states and 24235 transitions. [2018-11-23 08:02:25,938 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18027 states and 24235 transitions. [2018-11-23 08:02:26,031 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18027 to 17883. [2018-11-23 08:02:26,032 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17883 states. [2018-11-23 08:02:26,054 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17883 states to 17883 states and 24091 transitions. [2018-11-23 08:02:26,054 INFO L728 BuchiCegarLoop]: Abstraction has 17883 states and 24091 transitions. [2018-11-23 08:02:26,054 INFO L608 BuchiCegarLoop]: Abstraction has 17883 states and 24091 transitions. [2018-11-23 08:02:26,054 INFO L442 BuchiCegarLoop]: ======== Iteration 21============ [2018-11-23 08:02:26,054 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 17883 states and 24091 transitions. [2018-11-23 08:02:26,090 INFO L131 ngComponentsAnalysis]: Automaton has 12 accepting balls. 17557 [2018-11-23 08:02:26,090 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2018-11-23 08:02:26,091 INFO L119 BuchiIsEmpty]: Starting construction of run [2018-11-23 08:02:26,091 INFO L866 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 08:02:26,091 INFO L867 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-23 08:02:26,092 INFO L794 eck$LassoCheckResult]: Stem: 149350#ULTIMATE.startENTRY ~m_pc~0 := 0;~t1_pc~0 := 0;~t2_pc~0 := 0;~t3_pc~0 := 0;~t4_pc~0 := 0;~m_st~0 := 0;~t1_st~0 := 0;~t2_st~0 := 0;~t3_st~0 := 0;~t4_st~0 := 0;~m_i~0 := 0;~t1_i~0 := 0;~t2_i~0 := 0;~t3_i~0 := 0;~t4_i~0 := 0;~M_E~0 := 2;~T1_E~0 := 2;~T2_E~0 := 2;~T3_E~0 := 2;~T4_E~0 := 2;~E_M~0 := 2;~E_1~0 := 2;~E_2~0 := 2;~E_3~0 := 2;~E_4~0 := 2;~token~0 := 0;~local~0 := 0; 149242#L-1 havoc main_#res;havoc main_~__retres1~6;havoc main_~__retres1~6;~m_i~0 := 1;~t1_i~0 := 1;~t2_i~0 := 1;~t3_i~0 := 1;~t4_i~0 := 1; 149243#L768 havoc start_simulation_#t~ret14, start_simulation_#t~ret15, start_simulation_~kernel_st~0, start_simulation_~tmp~3, start_simulation_~tmp___0~1;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;havoc start_simulation_~tmp___0~1;start_simulation_~kernel_st~0 := 0; 149431#L348 assume 1 == ~m_i~0;~m_st~0 := 0; 149200#L355-1 assume 1 == ~t1_i~0;~t1_st~0 := 0; 149201#L360-1 assume 1 == ~t2_i~0;~t2_st~0 := 0; 149081#L365-1 assume 1 == ~t3_i~0;~t3_st~0 := 0; 149082#L370-1 assume 1 == ~t4_i~0;~t4_st~0 := 0; 149165#L375-1 assume !(0 == ~M_E~0); 149166#L516-1 assume !(0 == ~T1_E~0); 149007#L521-1 assume !(0 == ~T2_E~0); 149008#L526-1 assume !(0 == ~T3_E~0); 149208#L531-1 assume !(0 == ~T4_E~0); 149209#L536-1 assume !(0 == ~E_M~0); 149099#L541-1 assume !(0 == ~E_1~0); 149100#L546-1 assume !(0 == ~E_2~0); 149172#L551-1 assume !(0 == ~E_3~0); 149051#L556-1 assume !(0 == ~E_4~0); 149052#L561-1 havoc activate_threads_#t~ret8, activate_threads_#t~ret9, activate_threads_#t~ret10, activate_threads_#t~ret11, activate_threads_#t~ret12, activate_threads_~tmp~1, activate_threads_~tmp___0~0, activate_threads_~tmp___1~0, activate_threads_~tmp___2~0, activate_threads_~tmp___3~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc activate_threads_~tmp___1~0;havoc activate_threads_~tmp___2~0;havoc activate_threads_~tmp___3~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; 149240#L252 assume !(1 == ~m_pc~0); 149224#L252-2 is_master_triggered_~__retres1~0 := 0; 149225#L263 is_master_triggered_#res := is_master_triggered_~__retres1~0; 149241#L264 activate_threads_#t~ret8 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret8;havoc activate_threads_#t~ret8; 149325#L639 assume !(0 != activate_threads_~tmp~1); 149167#L639-2 havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; 149168#L271 assume !(1 == ~t1_pc~0); 149416#L271-2 is_transmit1_triggered_~__retres1~1 := 0; 149418#L282 is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; 149419#L283 activate_threads_#t~ret9 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret9;havoc activate_threads_#t~ret9; 149463#L647 assume !(0 != activate_threads_~tmp___0~0); 149464#L647-2 havoc is_transmit2_triggered_#res;havoc is_transmit2_triggered_~__retres1~2;havoc is_transmit2_triggered_~__retres1~2; 149015#L290 assume !(1 == ~t2_pc~0); 149004#L290-2 is_transmit2_triggered_~__retres1~2 := 0; 149005#L301 is_transmit2_triggered_#res := is_transmit2_triggered_~__retres1~2; 149018#L302 activate_threads_#t~ret10 := is_transmit2_triggered_#res;activate_threads_~tmp___1~0 := activate_threads_#t~ret10;havoc activate_threads_#t~ret10; 149058#L655 assume !(0 != activate_threads_~tmp___1~0); 149045#L655-2 havoc is_transmit3_triggered_#res;havoc is_transmit3_triggered_~__retres1~3;havoc is_transmit3_triggered_~__retres1~3; 149046#L309 assume !(1 == ~t3_pc~0); 149087#L309-2 is_transmit3_triggered_~__retres1~3 := 0; 149086#L320 is_transmit3_triggered_#res := is_transmit3_triggered_~__retres1~3; 149083#L321 activate_threads_#t~ret11 := is_transmit3_triggered_#res;activate_threads_~tmp___2~0 := activate_threads_#t~ret11;havoc activate_threads_#t~ret11; 149084#L663 assume !(0 != activate_threads_~tmp___2~0); 149217#L663-2 havoc is_transmit4_triggered_#res;havoc is_transmit4_triggered_~__retres1~4;havoc is_transmit4_triggered_~__retres1~4; 149218#L328 assume !(1 == ~t4_pc~0); 149317#L328-2 is_transmit4_triggered_~__retres1~4 := 0; 149316#L339 is_transmit4_triggered_#res := is_transmit4_triggered_~__retres1~4; 149244#L340 activate_threads_#t~ret12 := is_transmit4_triggered_#res;activate_threads_~tmp___3~0 := activate_threads_#t~ret12;havoc activate_threads_#t~ret12; 149245#L671 assume !(0 != activate_threads_~tmp___3~0); 149381#L671-2 assume !(1 == ~M_E~0); 149097#L574-1 assume !(1 == ~T1_E~0); 149098#L579-1 assume !(1 == ~T2_E~0); 149169#L584-1 assume !(1 == ~T3_E~0); 149049#L589-1 assume !(1 == ~T4_E~0); 149050#L594-1 assume !(1 == ~E_M~0); 148962#L599-1 assume !(1 == ~E_1~0); 148963#L604-1 assume !(1 == ~E_2~0); 149027#L609-1 assume !(1 == ~E_3~0); 149028#L614-1 assume !(1 == ~E_4~0); 149465#L805-1 assume !false; 158789#L806 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret2, eval_#t~nondet3, eval_~tmp_ndt_1~0, eval_#t~nondet4, eval_~tmp_ndt_2~0, eval_#t~nondet5, eval_~tmp_ndt_3~0, eval_#t~nondet6, eval_~tmp_ndt_4~0, eval_#t~nondet7, eval_~tmp_ndt_5~0, eval_~tmp~0;havoc eval_~tmp~0; 158781#L491 [2018-11-23 08:02:26,092 INFO L796 eck$LassoCheckResult]: Loop: 158781#L491 assume !false; 158776#L426 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~5;havoc exists_runnable_thread_~__retres1~5; 158770#L388 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~5 := 1; 158763#L415 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~5; 158758#L416 eval_#t~ret2 := exists_runnable_thread_#res;eval_~tmp~0 := eval_#t~ret2;havoc eval_#t~ret2; 158752#L430 assume 0 != eval_~tmp~0; 158659#L430-1 assume 0 == ~m_st~0;havoc eval_~tmp_ndt_1~0;eval_~tmp_ndt_1~0 := eval_#t~nondet3;havoc eval_#t~nondet3; 158612#L438 assume !(0 != eval_~tmp_ndt_1~0); 155261#L435 assume 0 == ~t1_st~0;havoc eval_~tmp_ndt_2~0;eval_~tmp_ndt_2~0 := eval_#t~nondet4;havoc eval_#t~nondet4; 155254#L452 assume !(0 != eval_~tmp_ndt_2~0); 155246#L449 assume 0 == ~t2_st~0;havoc eval_~tmp_ndt_3~0;eval_~tmp_ndt_3~0 := eval_#t~nondet5;havoc eval_#t~nondet5; 155108#L466 assume !(0 != eval_~tmp_ndt_3~0); 155109#L463 assume 0 == ~t3_st~0;havoc eval_~tmp_ndt_4~0;eval_~tmp_ndt_4~0 := eval_#t~nondet6;havoc eval_#t~nondet6; 158804#L480 assume !(0 != eval_~tmp_ndt_4~0); 158796#L477 assume 0 == ~t4_st~0;havoc eval_~tmp_ndt_5~0;eval_~tmp_ndt_5~0 := eval_#t~nondet7;havoc eval_#t~nondet7; 158787#L494 assume !(0 != eval_~tmp_ndt_5~0); 158781#L491 [2018-11-23 08:02:26,092 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 08:02:26,092 INFO L82 PathProgramCache]: Analyzing trace with hash -1232031258, now seen corresponding path program 5 times [2018-11-23 08:02:26,092 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 08:02:26,093 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 08:02:26,093 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:02:26,093 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 08:02:26,094 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:02:26,098 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-23 08:02:26,103 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-23 08:02:26,112 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 08:02:26,113 INFO L82 PathProgramCache]: Analyzing trace with hash 1264617455, now seen corresponding path program 1 times [2018-11-23 08:02:26,113 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 08:02:26,113 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 08:02:26,113 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:02:26,114 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-11-23 08:02:26,114 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:02:26,116 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-23 08:02:26,118 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-23 08:02:26,120 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-23 08:02:26,120 INFO L82 PathProgramCache]: Analyzing trace with hash 2086850516, now seen corresponding path program 1 times [2018-11-23 08:02:26,120 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-23 08:02:26,120 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-23 08:02:26,121 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:02:26,121 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-23 08:02:26,121 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-23 08:02:26,127 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-23 08:02:26,133 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-23 08:02:26,282 WARN L180 SmtUtils]: Spent 138.00 ms on a formula simplification. DAG size of input: 41 DAG size of output: 39 [2018-11-23 08:02:26,757 WARN L180 SmtUtils]: Spent 445.00 ms on a formula simplification. DAG size of input: 167 DAG size of output: 112 ----- class de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder.RCFGBacktranslator [?] ~m_pc~0 := 0;~t1_pc~0 := 0;~t2_pc~0 := 0;~t3_pc~0 := 0;~t4_pc~0 := 0;~m_st~0 := 0;~t1_st~0 := 0;~t2_st~0 := 0;~t3_st~0 := 0;~t4_st~0 := 0;~m_i~0 := 0;~t1_i~0 := 0;~t2_i~0 := 0;~t3_i~0 := 0;~t4_i~0 := 0;~M_E~0 := 2;~T1_E~0 := 2;~T2_E~0 := 2;~T3_E~0 := 2;~T4_E~0 := 2;~E_M~0 := 2;~E_1~0 := 2;~E_2~0 := 2;~E_3~0 := 2;~E_4~0 := 2;~token~0 := 0;~local~0 := 0; [?] havoc main_#res;havoc main_~__retres1~6;havoc main_~__retres1~6;~m_i~0 := 1;~t1_i~0 := 1;~t2_i~0 := 1;~t3_i~0 := 1;~t4_i~0 := 1; [?] havoc start_simulation_#t~ret14, start_simulation_#t~ret15, start_simulation_~kernel_st~0, start_simulation_~tmp~3, start_simulation_~tmp___0~1;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;havoc start_simulation_~tmp___0~1;start_simulation_~kernel_st~0 := 0; [?] assume 1 == ~m_i~0;~m_st~0 := 0; [?] assume 1 == ~t1_i~0;~t1_st~0 := 0; [?] assume 1 == ~t2_i~0;~t2_st~0 := 0; [?] assume 1 == ~t3_i~0;~t3_st~0 := 0; [?] assume 1 == ~t4_i~0;~t4_st~0 := 0; [?] assume !(0 == ~M_E~0); [?] assume !(0 == ~T1_E~0); [?] assume !(0 == ~T2_E~0); [?] assume !(0 == ~T3_E~0); [?] assume !(0 == ~T4_E~0); [?] assume !(0 == ~E_M~0); [?] assume !(0 == ~E_1~0); [?] assume !(0 == ~E_2~0); [?] assume !(0 == ~E_3~0); [?] assume !(0 == ~E_4~0); [?] havoc activate_threads_#t~ret8, activate_threads_#t~ret9, activate_threads_#t~ret10, activate_threads_#t~ret11, activate_threads_#t~ret12, activate_threads_~tmp~1, activate_threads_~tmp___0~0, activate_threads_~tmp___1~0, activate_threads_~tmp___2~0, activate_threads_~tmp___3~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc activate_threads_~tmp___1~0;havoc activate_threads_~tmp___2~0;havoc activate_threads_~tmp___3~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; [?] assume !(1 == ~m_pc~0); [?] is_master_triggered_~__retres1~0 := 0; [?] is_master_triggered_#res := is_master_triggered_~__retres1~0; [?] activate_threads_#t~ret8 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret8;havoc activate_threads_#t~ret8; [?] assume !(0 != activate_threads_~tmp~1); [?] havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; [?] assume !(1 == ~t1_pc~0); [?] is_transmit1_triggered_~__retres1~1 := 0; [?] is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; [?] activate_threads_#t~ret9 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret9;havoc activate_threads_#t~ret9; [?] assume !(0 != activate_threads_~tmp___0~0); [?] havoc is_transmit2_triggered_#res;havoc is_transmit2_triggered_~__retres1~2;havoc is_transmit2_triggered_~__retres1~2; [?] assume !(1 == ~t2_pc~0); [?] is_transmit2_triggered_~__retres1~2 := 0; [?] is_transmit2_triggered_#res := is_transmit2_triggered_~__retres1~2; [?] activate_threads_#t~ret10 := is_transmit2_triggered_#res;activate_threads_~tmp___1~0 := activate_threads_#t~ret10;havoc activate_threads_#t~ret10; [?] assume !(0 != activate_threads_~tmp___1~0); [?] havoc is_transmit3_triggered_#res;havoc is_transmit3_triggered_~__retres1~3;havoc is_transmit3_triggered_~__retres1~3; [?] assume !(1 == ~t3_pc~0); [?] is_transmit3_triggered_~__retres1~3 := 0; [?] is_transmit3_triggered_#res := is_transmit3_triggered_~__retres1~3; [?] activate_threads_#t~ret11 := is_transmit3_triggered_#res;activate_threads_~tmp___2~0 := activate_threads_#t~ret11;havoc activate_threads_#t~ret11; [?] assume !(0 != activate_threads_~tmp___2~0); [?] havoc is_transmit4_triggered_#res;havoc is_transmit4_triggered_~__retres1~4;havoc is_transmit4_triggered_~__retres1~4; [?] assume !(1 == ~t4_pc~0); [?] is_transmit4_triggered_~__retres1~4 := 0; [?] is_transmit4_triggered_#res := is_transmit4_triggered_~__retres1~4; [?] activate_threads_#t~ret12 := is_transmit4_triggered_#res;activate_threads_~tmp___3~0 := activate_threads_#t~ret12;havoc activate_threads_#t~ret12; [?] assume !(0 != activate_threads_~tmp___3~0); [?] assume !(1 == ~M_E~0); [?] assume !(1 == ~T1_E~0); [?] assume !(1 == ~T2_E~0); [?] assume !(1 == ~T3_E~0); [?] assume !(1 == ~T4_E~0); [?] assume !(1 == ~E_M~0); [?] assume !(1 == ~E_1~0); [?] assume !(1 == ~E_2~0); [?] assume !(1 == ~E_3~0); [?] assume !(1 == ~E_4~0); [?] assume !false; [?] start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret2, eval_#t~nondet3, eval_~tmp_ndt_1~0, eval_#t~nondet4, eval_~tmp_ndt_2~0, eval_#t~nondet5, eval_~tmp_ndt_3~0, eval_#t~nondet6, eval_~tmp_ndt_4~0, eval_#t~nondet7, eval_~tmp_ndt_5~0, eval_~tmp~0;havoc eval_~tmp~0; [L14] ~m_pc~0 := 0; [L15] ~t1_pc~0 := 0; [L16] ~t2_pc~0 := 0; [L17] ~t3_pc~0 := 0; [L18] ~t4_pc~0 := 0; [L19] ~m_st~0 := 0; [L20] ~t1_st~0 := 0; [L21] ~t2_st~0 := 0; [L22] ~t3_st~0 := 0; [L23] ~t4_st~0 := 0; [L24] ~m_i~0 := 0; [L25] ~t1_i~0 := 0; [L26] ~t2_i~0 := 0; [L27] ~t3_i~0 := 0; [L28] ~t4_i~0 := 0; [L29] ~M_E~0 := 2; [L30] ~T1_E~0 := 2; [L31] ~T2_E~0 := 2; [L32] ~T3_E~0 := 2; [L33] ~T4_E~0 := 2; [L34] ~E_M~0 := 2; [L35] ~E_1~0 := 2; [L36] ~E_2~0 := 2; [L37] ~E_3~0 := 2; [L38] ~E_4~0 := 2; [L45] ~token~0 := 0; [L47] ~local~0 := 0; [?] havoc main_#res; [?] havoc main_~__retres1~6; [L850] havoc main_~__retres1~6; [L762] ~m_i~0 := 1; [L763] ~t1_i~0 := 1; [L764] ~t2_i~0 := 1; [L765] ~t3_i~0 := 1; [L766] ~t4_i~0 := 1; [L855] havoc start_simulation_#t~ret14, start_simulation_#t~ret15, start_simulation_~kernel_st~0, start_simulation_~tmp~3, start_simulation_~tmp___0~1; [L791] havoc start_simulation_~kernel_st~0; [L792] havoc start_simulation_~tmp~3; [L793] havoc start_simulation_~tmp___0~1; [L797] start_simulation_~kernel_st~0 := 0; [L355-L359] assume 1 == ~m_i~0; [L356] ~m_st~0 := 0; [L360-L364] assume 1 == ~t1_i~0; [L361] ~t1_st~0 := 0; [L365-L369] assume 1 == ~t2_i~0; [L366] ~t2_st~0 := 0; [L370-L374] assume 1 == ~t3_i~0; [L371] ~t3_st~0 := 0; [L375-L379] assume 1 == ~t4_i~0; [L376] ~t4_st~0 := 0; [L516-L520] assume !(0 == ~M_E~0); [L521-L525] assume !(0 == ~T1_E~0); [L526-L530] assume !(0 == ~T2_E~0); [L531-L535] assume !(0 == ~T3_E~0); [L536-L540] assume !(0 == ~T4_E~0); [L541-L545] assume !(0 == ~E_M~0); [L546-L550] assume !(0 == ~E_1~0); [L551-L555] assume !(0 == ~E_2~0); [L556-L560] assume !(0 == ~E_3~0); [L561-L565] assume !(0 == ~E_4~0); [L801] havoc activate_threads_#t~ret8, activate_threads_#t~ret9, activate_threads_#t~ret10, activate_threads_#t~ret11, activate_threads_#t~ret12, activate_threads_~tmp~1, activate_threads_~tmp___0~0, activate_threads_~tmp___1~0, activate_threads_~tmp___2~0, activate_threads_~tmp___3~0; [L629] havoc activate_threads_~tmp~1; [L630] havoc activate_threads_~tmp___0~0; [L631] havoc activate_threads_~tmp___1~0; [L632] havoc activate_threads_~tmp___2~0; [L633] havoc activate_threads_~tmp___3~0; [L637] havoc is_master_triggered_#res; [L637] havoc is_master_triggered_~__retres1~0; [L249] havoc is_master_triggered_~__retres1~0; [L252-L261] assume !(1 == ~m_pc~0); [L262] is_master_triggered_~__retres1~0 := 0; [L264] is_master_triggered_#res := is_master_triggered_~__retres1~0; [L637] activate_threads_#t~ret8 := is_master_triggered_#res; [L637] activate_threads_~tmp~1 := activate_threads_#t~ret8; [L637] havoc activate_threads_#t~ret8; [L639-L643] assume !(0 != activate_threads_~tmp~1); [L645] havoc is_transmit1_triggered_#res; [L645] havoc is_transmit1_triggered_~__retres1~1; [L268] havoc is_transmit1_triggered_~__retres1~1; [L271-L280] assume !(1 == ~t1_pc~0); [L281] is_transmit1_triggered_~__retres1~1 := 0; [L283] is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; [L645] activate_threads_#t~ret9 := is_transmit1_triggered_#res; [L645] activate_threads_~tmp___0~0 := activate_threads_#t~ret9; [L645] havoc activate_threads_#t~ret9; [L647-L651] assume !(0 != activate_threads_~tmp___0~0); [L653] havoc is_transmit2_triggered_#res; [L653] havoc is_transmit2_triggered_~__retres1~2; [L287] havoc is_transmit2_triggered_~__retres1~2; [L290-L299] assume !(1 == ~t2_pc~0); [L300] is_transmit2_triggered_~__retres1~2 := 0; [L302] is_transmit2_triggered_#res := is_transmit2_triggered_~__retres1~2; [L653] activate_threads_#t~ret10 := is_transmit2_triggered_#res; [L653] activate_threads_~tmp___1~0 := activate_threads_#t~ret10; [L653] havoc activate_threads_#t~ret10; [L655-L659] assume !(0 != activate_threads_~tmp___1~0); [L661] havoc is_transmit3_triggered_#res; [L661] havoc is_transmit3_triggered_~__retres1~3; [L306] havoc is_transmit3_triggered_~__retres1~3; [L309-L318] assume !(1 == ~t3_pc~0); [L319] is_transmit3_triggered_~__retres1~3 := 0; [L321] is_transmit3_triggered_#res := is_transmit3_triggered_~__retres1~3; [L661] activate_threads_#t~ret11 := is_transmit3_triggered_#res; [L661] activate_threads_~tmp___2~0 := activate_threads_#t~ret11; [L661] havoc activate_threads_#t~ret11; [L663-L667] assume !(0 != activate_threads_~tmp___2~0); [L669] havoc is_transmit4_triggered_#res; [L669] havoc is_transmit4_triggered_~__retres1~4; [L325] havoc is_transmit4_triggered_~__retres1~4; [L328-L337] assume !(1 == ~t4_pc~0); [L338] is_transmit4_triggered_~__retres1~4 := 0; [L340] is_transmit4_triggered_#res := is_transmit4_triggered_~__retres1~4; [L669] activate_threads_#t~ret12 := is_transmit4_triggered_#res; [L669] activate_threads_~tmp___3~0 := activate_threads_#t~ret12; [L669] havoc activate_threads_#t~ret12; [L671-L675] assume !(0 != activate_threads_~tmp___3~0); [L574-L578] assume !(1 == ~M_E~0); [L579-L583] assume !(1 == ~T1_E~0); [L584-L588] assume !(1 == ~T2_E~0); [L589-L593] assume !(1 == ~T3_E~0); [L594-L598] assume !(1 == ~T4_E~0); [L599-L603] assume !(1 == ~E_M~0); [L604-L608] assume !(1 == ~E_1~0); [L609-L613] assume !(1 == ~E_2~0); [L614-L618] assume !(1 == ~E_3~0); [L619-L623] assume !(1 == ~E_4~0); [L805-L842] assume !false; [L808] start_simulation_~kernel_st~0 := 1; [L809] havoc eval_#t~ret2, eval_#t~nondet3, eval_~tmp_ndt_1~0, eval_#t~nondet4, eval_~tmp_ndt_2~0, eval_#t~nondet5, eval_~tmp_ndt_3~0, eval_#t~nondet6, eval_~tmp_ndt_4~0, eval_#t~nondet7, eval_~tmp_ndt_5~0, eval_~tmp~0; [L421] havoc eval_~tmp~0; ----- ----- class de.uni_freiburg.informatik.ultimate.boogie.preprocessor.BoogiePreprocessorBacktranslator [L14] ~m_pc~0 := 0; [L15] ~t1_pc~0 := 0; [L16] ~t2_pc~0 := 0; [L17] ~t3_pc~0 := 0; [L18] ~t4_pc~0 := 0; [L19] ~m_st~0 := 0; [L20] ~t1_st~0 := 0; [L21] ~t2_st~0 := 0; [L22] ~t3_st~0 := 0; [L23] ~t4_st~0 := 0; [L24] ~m_i~0 := 0; [L25] ~t1_i~0 := 0; [L26] ~t2_i~0 := 0; [L27] ~t3_i~0 := 0; [L28] ~t4_i~0 := 0; [L29] ~M_E~0 := 2; [L30] ~T1_E~0 := 2; [L31] ~T2_E~0 := 2; [L32] ~T3_E~0 := 2; [L33] ~T4_E~0 := 2; [L34] ~E_M~0 := 2; [L35] ~E_1~0 := 2; [L36] ~E_2~0 := 2; [L37] ~E_3~0 := 2; [L38] ~E_4~0 := 2; [L45] ~token~0 := 0; [L47] ~local~0 := 0; [?] havoc main_#res; [?] havoc main_~__retres1~6; [L850] havoc main_~__retres1~6; [L762] ~m_i~0 := 1; [L763] ~t1_i~0 := 1; [L764] ~t2_i~0 := 1; [L765] ~t3_i~0 := 1; [L766] ~t4_i~0 := 1; [L855] havoc start_simulation_#t~ret14, start_simulation_#t~ret15, start_simulation_~kernel_st~0, start_simulation_~tmp~3, start_simulation_~tmp___0~1; [L791] havoc start_simulation_~kernel_st~0; [L792] havoc start_simulation_~tmp~3; [L793] havoc start_simulation_~tmp___0~1; [L797] start_simulation_~kernel_st~0 := 0; [L355-L359] assume 1 == ~m_i~0; [L356] ~m_st~0 := 0; [L360-L364] assume 1 == ~t1_i~0; [L361] ~t1_st~0 := 0; [L365-L369] assume 1 == ~t2_i~0; [L366] ~t2_st~0 := 0; [L370-L374] assume 1 == ~t3_i~0; [L371] ~t3_st~0 := 0; [L375-L379] assume 1 == ~t4_i~0; [L376] ~t4_st~0 := 0; [L516-L520] assume !(0 == ~M_E~0); [L521-L525] assume !(0 == ~T1_E~0); [L526-L530] assume !(0 == ~T2_E~0); [L531-L535] assume !(0 == ~T3_E~0); [L536-L540] assume !(0 == ~T4_E~0); [L541-L545] assume !(0 == ~E_M~0); [L546-L550] assume !(0 == ~E_1~0); [L551-L555] assume !(0 == ~E_2~0); [L556-L560] assume !(0 == ~E_3~0); [L561-L565] assume !(0 == ~E_4~0); [L801] havoc activate_threads_#t~ret8, activate_threads_#t~ret9, activate_threads_#t~ret10, activate_threads_#t~ret11, activate_threads_#t~ret12, activate_threads_~tmp~1, activate_threads_~tmp___0~0, activate_threads_~tmp___1~0, activate_threads_~tmp___2~0, activate_threads_~tmp___3~0; [L629] havoc activate_threads_~tmp~1; [L630] havoc activate_threads_~tmp___0~0; [L631] havoc activate_threads_~tmp___1~0; [L632] havoc activate_threads_~tmp___2~0; [L633] havoc activate_threads_~tmp___3~0; [L637] havoc is_master_triggered_#res; [L637] havoc is_master_triggered_~__retres1~0; [L249] havoc is_master_triggered_~__retres1~0; [L252-L261] assume !(1 == ~m_pc~0); [L262] is_master_triggered_~__retres1~0 := 0; [L264] is_master_triggered_#res := is_master_triggered_~__retres1~0; [L637] activate_threads_#t~ret8 := is_master_triggered_#res; [L637] activate_threads_~tmp~1 := activate_threads_#t~ret8; [L637] havoc activate_threads_#t~ret8; [L639-L643] assume !(0 != activate_threads_~tmp~1); [L645] havoc is_transmit1_triggered_#res; [L645] havoc is_transmit1_triggered_~__retres1~1; [L268] havoc is_transmit1_triggered_~__retres1~1; [L271-L280] assume !(1 == ~t1_pc~0); [L281] is_transmit1_triggered_~__retres1~1 := 0; [L283] is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; [L645] activate_threads_#t~ret9 := is_transmit1_triggered_#res; [L645] activate_threads_~tmp___0~0 := activate_threads_#t~ret9; [L645] havoc activate_threads_#t~ret9; [L647-L651] assume !(0 != activate_threads_~tmp___0~0); [L653] havoc is_transmit2_triggered_#res; [L653] havoc is_transmit2_triggered_~__retres1~2; [L287] havoc is_transmit2_triggered_~__retres1~2; [L290-L299] assume !(1 == ~t2_pc~0); [L300] is_transmit2_triggered_~__retres1~2 := 0; [L302] is_transmit2_triggered_#res := is_transmit2_triggered_~__retres1~2; [L653] activate_threads_#t~ret10 := is_transmit2_triggered_#res; [L653] activate_threads_~tmp___1~0 := activate_threads_#t~ret10; [L653] havoc activate_threads_#t~ret10; [L655-L659] assume !(0 != activate_threads_~tmp___1~0); [L661] havoc is_transmit3_triggered_#res; [L661] havoc is_transmit3_triggered_~__retres1~3; [L306] havoc is_transmit3_triggered_~__retres1~3; [L309-L318] assume !(1 == ~t3_pc~0); [L319] is_transmit3_triggered_~__retres1~3 := 0; [L321] is_transmit3_triggered_#res := is_transmit3_triggered_~__retres1~3; [L661] activate_threads_#t~ret11 := is_transmit3_triggered_#res; [L661] activate_threads_~tmp___2~0 := activate_threads_#t~ret11; [L661] havoc activate_threads_#t~ret11; [L663-L667] assume !(0 != activate_threads_~tmp___2~0); [L669] havoc is_transmit4_triggered_#res; [L669] havoc is_transmit4_triggered_~__retres1~4; [L325] havoc is_transmit4_triggered_~__retres1~4; [L328-L337] assume !(1 == ~t4_pc~0); [L338] is_transmit4_triggered_~__retres1~4 := 0; [L340] is_transmit4_triggered_#res := is_transmit4_triggered_~__retres1~4; [L669] activate_threads_#t~ret12 := is_transmit4_triggered_#res; [L669] activate_threads_~tmp___3~0 := activate_threads_#t~ret12; [L669] havoc activate_threads_#t~ret12; [L671-L675] assume !(0 != activate_threads_~tmp___3~0); [L574-L578] assume !(1 == ~M_E~0); [L579-L583] assume !(1 == ~T1_E~0); [L584-L588] assume !(1 == ~T2_E~0); [L589-L593] assume !(1 == ~T3_E~0); [L594-L598] assume !(1 == ~T4_E~0); [L599-L603] assume !(1 == ~E_M~0); [L604-L608] assume !(1 == ~E_1~0); [L609-L613] assume !(1 == ~E_2~0); [L614-L618] assume !(1 == ~E_3~0); [L619-L623] assume !(1 == ~E_4~0); [L805-L842] assume !false; [L808] start_simulation_~kernel_st~0 := 1; [L809] havoc eval_#t~ret2, eval_#t~nondet3, eval_~tmp_ndt_1~0, eval_#t~nondet4, eval_~tmp_ndt_2~0, eval_#t~nondet5, eval_~tmp_ndt_3~0, eval_#t~nondet6, eval_~tmp_ndt_4~0, eval_#t~nondet7, eval_~tmp_ndt_5~0, eval_~tmp~0; [L421] havoc eval_~tmp~0; [L14] ~m_pc~0 := 0; [L15] ~t1_pc~0 := 0; [L16] ~t2_pc~0 := 0; [L17] ~t3_pc~0 := 0; [L18] ~t4_pc~0 := 0; [L19] ~m_st~0 := 0; [L20] ~t1_st~0 := 0; [L21] ~t2_st~0 := 0; [L22] ~t3_st~0 := 0; [L23] ~t4_st~0 := 0; [L24] ~m_i~0 := 0; [L25] ~t1_i~0 := 0; [L26] ~t2_i~0 := 0; [L27] ~t3_i~0 := 0; [L28] ~t4_i~0 := 0; [L29] ~M_E~0 := 2; [L30] ~T1_E~0 := 2; [L31] ~T2_E~0 := 2; [L32] ~T3_E~0 := 2; [L33] ~T4_E~0 := 2; [L34] ~E_M~0 := 2; [L35] ~E_1~0 := 2; [L36] ~E_2~0 := 2; [L37] ~E_3~0 := 2; [L38] ~E_4~0 := 2; [L45] ~token~0 := 0; [L47] ~local~0 := 0; [?] havoc main_#res; [?] havoc main_~__retres1~6; [L850] havoc main_~__retres1~6; [L762] ~m_i~0 := 1; [L763] ~t1_i~0 := 1; [L764] ~t2_i~0 := 1; [L765] ~t3_i~0 := 1; [L766] ~t4_i~0 := 1; [L855] havoc start_simulation_#t~ret14, start_simulation_#t~ret15, start_simulation_~kernel_st~0, start_simulation_~tmp~3, start_simulation_~tmp___0~1; [L791] havoc start_simulation_~kernel_st~0; [L792] havoc start_simulation_~tmp~3; [L793] havoc start_simulation_~tmp___0~1; [L797] start_simulation_~kernel_st~0 := 0; [L355] COND TRUE 1 == ~m_i~0 [L356] ~m_st~0 := 0; [L360] COND TRUE 1 == ~t1_i~0 [L361] ~t1_st~0 := 0; [L365] COND TRUE 1 == ~t2_i~0 [L366] ~t2_st~0 := 0; [L370] COND TRUE 1 == ~t3_i~0 [L371] ~t3_st~0 := 0; [L375] COND TRUE 1 == ~t4_i~0 [L376] ~t4_st~0 := 0; [L516] COND FALSE !(0 == ~M_E~0) [L521] COND FALSE !(0 == ~T1_E~0) [L526] COND FALSE !(0 == ~T2_E~0) [L531] COND FALSE !(0 == ~T3_E~0) [L536] COND FALSE !(0 == ~T4_E~0) [L541] COND FALSE !(0 == ~E_M~0) [L546] COND FALSE !(0 == ~E_1~0) [L551] COND FALSE !(0 == ~E_2~0) [L556] COND FALSE !(0 == ~E_3~0) [L561] COND FALSE !(0 == ~E_4~0) [L801] havoc activate_threads_#t~ret8, activate_threads_#t~ret9, activate_threads_#t~ret10, activate_threads_#t~ret11, activate_threads_#t~ret12, activate_threads_~tmp~1, activate_threads_~tmp___0~0, activate_threads_~tmp___1~0, activate_threads_~tmp___2~0, activate_threads_~tmp___3~0; [L629] havoc activate_threads_~tmp~1; [L630] havoc activate_threads_~tmp___0~0; [L631] havoc activate_threads_~tmp___1~0; [L632] havoc activate_threads_~tmp___2~0; [L633] havoc activate_threads_~tmp___3~0; [L637] havoc is_master_triggered_#res; [L637] havoc is_master_triggered_~__retres1~0; [L249] havoc is_master_triggered_~__retres1~0; [L252] COND FALSE !(1 == ~m_pc~0) [L262] is_master_triggered_~__retres1~0 := 0; [L264] is_master_triggered_#res := is_master_triggered_~__retres1~0; [L637] activate_threads_#t~ret8 := is_master_triggered_#res; [L637] activate_threads_~tmp~1 := activate_threads_#t~ret8; [L637] havoc activate_threads_#t~ret8; [L639-L643] COND FALSE !(0 != activate_threads_~tmp~1) [L645] havoc is_transmit1_triggered_#res; [L645] havoc is_transmit1_triggered_~__retres1~1; [L268] havoc is_transmit1_triggered_~__retres1~1; [L271] COND FALSE !(1 == ~t1_pc~0) [L281] is_transmit1_triggered_~__retres1~1 := 0; [L283] is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; [L645] activate_threads_#t~ret9 := is_transmit1_triggered_#res; [L645] activate_threads_~tmp___0~0 := activate_threads_#t~ret9; [L645] havoc activate_threads_#t~ret9; [L647-L651] COND FALSE !(0 != activate_threads_~tmp___0~0) [L653] havoc is_transmit2_triggered_#res; [L653] havoc is_transmit2_triggered_~__retres1~2; [L287] havoc is_transmit2_triggered_~__retres1~2; [L290] COND FALSE !(1 == ~t2_pc~0) [L300] is_transmit2_triggered_~__retres1~2 := 0; [L302] is_transmit2_triggered_#res := is_transmit2_triggered_~__retres1~2; [L653] activate_threads_#t~ret10 := is_transmit2_triggered_#res; [L653] activate_threads_~tmp___1~0 := activate_threads_#t~ret10; [L653] havoc activate_threads_#t~ret10; [L655-L659] COND FALSE !(0 != activate_threads_~tmp___1~0) [L661] havoc is_transmit3_triggered_#res; [L661] havoc is_transmit3_triggered_~__retres1~3; [L306] havoc is_transmit3_triggered_~__retres1~3; [L309] COND FALSE !(1 == ~t3_pc~0) [L319] is_transmit3_triggered_~__retres1~3 := 0; [L321] is_transmit3_triggered_#res := is_transmit3_triggered_~__retres1~3; [L661] activate_threads_#t~ret11 := is_transmit3_triggered_#res; [L661] activate_threads_~tmp___2~0 := activate_threads_#t~ret11; [L661] havoc activate_threads_#t~ret11; [L663-L667] COND FALSE !(0 != activate_threads_~tmp___2~0) [L669] havoc is_transmit4_triggered_#res; [L669] havoc is_transmit4_triggered_~__retres1~4; [L325] havoc is_transmit4_triggered_~__retres1~4; [L328] COND FALSE !(1 == ~t4_pc~0) [L338] is_transmit4_triggered_~__retres1~4 := 0; [L340] is_transmit4_triggered_#res := is_transmit4_triggered_~__retres1~4; [L669] activate_threads_#t~ret12 := is_transmit4_triggered_#res; [L669] activate_threads_~tmp___3~0 := activate_threads_#t~ret12; [L669] havoc activate_threads_#t~ret12; [L671-L675] COND FALSE !(0 != activate_threads_~tmp___3~0) [L574] COND FALSE !(1 == ~M_E~0) [L579] COND FALSE !(1 == ~T1_E~0) [L584] COND FALSE !(1 == ~T2_E~0) [L589] COND FALSE !(1 == ~T3_E~0) [L594] COND FALSE !(1 == ~T4_E~0) [L599] COND FALSE !(1 == ~E_M~0) [L604] COND FALSE !(1 == ~E_1~0) [L609] COND FALSE !(1 == ~E_2~0) [L614] COND FALSE !(1 == ~E_3~0) [L619] COND FALSE !(1 == ~E_4~0) [L805-L842] COND FALSE !(false) [L808] start_simulation_~kernel_st~0 := 1; [L809] havoc eval_#t~ret2, eval_#t~nondet3, eval_~tmp_ndt_1~0, eval_#t~nondet4, eval_~tmp_ndt_2~0, eval_#t~nondet5, eval_~tmp_ndt_3~0, eval_#t~nondet6, eval_~tmp_ndt_4~0, eval_#t~nondet7, eval_~tmp_ndt_5~0, eval_~tmp~0; [L421] havoc eval_~tmp~0; ----- ----- class de.uni_freiburg.informatik.ultimate.boogie.procedureinliner.backtranslation.InlinerBacktranslator [L14] ~m_pc~0 := 0; [L15] ~t1_pc~0 := 0; [L16] ~t2_pc~0 := 0; [L17] ~t3_pc~0 := 0; [L18] ~t4_pc~0 := 0; [L19] ~m_st~0 := 0; [L20] ~t1_st~0 := 0; [L21] ~t2_st~0 := 0; [L22] ~t3_st~0 := 0; [L23] ~t4_st~0 := 0; [L24] ~m_i~0 := 0; [L25] ~t1_i~0 := 0; [L26] ~t2_i~0 := 0; [L27] ~t3_i~0 := 0; [L28] ~t4_i~0 := 0; [L29] ~M_E~0 := 2; [L30] ~T1_E~0 := 2; [L31] ~T2_E~0 := 2; [L32] ~T3_E~0 := 2; [L33] ~T4_E~0 := 2; [L34] ~E_M~0 := 2; [L35] ~E_1~0 := 2; [L36] ~E_2~0 := 2; [L37] ~E_3~0 := 2; [L38] ~E_4~0 := 2; [L45] ~token~0 := 0; [L47] ~local~0 := 0; [?] havoc main_#res; [?] havoc main_~__retres1~6; [L850] havoc main_~__retres1~6; [L762] ~m_i~0 := 1; [L763] ~t1_i~0 := 1; [L764] ~t2_i~0 := 1; [L765] ~t3_i~0 := 1; [L766] ~t4_i~0 := 1; [L855] havoc start_simulation_#t~ret14, start_simulation_#t~ret15, start_simulation_~kernel_st~0, start_simulation_~tmp~3, start_simulation_~tmp___0~1; [L791] havoc start_simulation_~kernel_st~0; [L792] havoc start_simulation_~tmp~3; [L793] havoc start_simulation_~tmp___0~1; [L797] start_simulation_~kernel_st~0 := 0; [L355] COND TRUE 1 == ~m_i~0 [L356] ~m_st~0 := 0; [L360] COND TRUE 1 == ~t1_i~0 [L361] ~t1_st~0 := 0; [L365] COND TRUE 1 == ~t2_i~0 [L366] ~t2_st~0 := 0; [L370] COND TRUE 1 == ~t3_i~0 [L371] ~t3_st~0 := 0; [L375] COND TRUE 1 == ~t4_i~0 [L376] ~t4_st~0 := 0; [L516] COND FALSE !(0 == ~M_E~0) [L521] COND FALSE !(0 == ~T1_E~0) [L526] COND FALSE !(0 == ~T2_E~0) [L531] COND FALSE !(0 == ~T3_E~0) [L536] COND FALSE !(0 == ~T4_E~0) [L541] COND FALSE !(0 == ~E_M~0) [L546] COND FALSE !(0 == ~E_1~0) [L551] COND FALSE !(0 == ~E_2~0) [L556] COND FALSE !(0 == ~E_3~0) [L561] COND FALSE !(0 == ~E_4~0) [L801] havoc activate_threads_#t~ret8, activate_threads_#t~ret9, activate_threads_#t~ret10, activate_threads_#t~ret11, activate_threads_#t~ret12, activate_threads_~tmp~1, activate_threads_~tmp___0~0, activate_threads_~tmp___1~0, activate_threads_~tmp___2~0, activate_threads_~tmp___3~0; [L629] havoc activate_threads_~tmp~1; [L630] havoc activate_threads_~tmp___0~0; [L631] havoc activate_threads_~tmp___1~0; [L632] havoc activate_threads_~tmp___2~0; [L633] havoc activate_threads_~tmp___3~0; [L637] havoc is_master_triggered_#res; [L637] havoc is_master_triggered_~__retres1~0; [L249] havoc is_master_triggered_~__retres1~0; [L252] COND FALSE !(1 == ~m_pc~0) [L262] is_master_triggered_~__retres1~0 := 0; [L264] is_master_triggered_#res := is_master_triggered_~__retres1~0; [L637] activate_threads_#t~ret8 := is_master_triggered_#res; [L637] activate_threads_~tmp~1 := activate_threads_#t~ret8; [L637] havoc activate_threads_#t~ret8; [L639-L643] COND FALSE !(0 != activate_threads_~tmp~1) [L645] havoc is_transmit1_triggered_#res; [L645] havoc is_transmit1_triggered_~__retres1~1; [L268] havoc is_transmit1_triggered_~__retres1~1; [L271] COND FALSE !(1 == ~t1_pc~0) [L281] is_transmit1_triggered_~__retres1~1 := 0; [L283] is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; [L645] activate_threads_#t~ret9 := is_transmit1_triggered_#res; [L645] activate_threads_~tmp___0~0 := activate_threads_#t~ret9; [L645] havoc activate_threads_#t~ret9; [L647-L651] COND FALSE !(0 != activate_threads_~tmp___0~0) [L653] havoc is_transmit2_triggered_#res; [L653] havoc is_transmit2_triggered_~__retres1~2; [L287] havoc is_transmit2_triggered_~__retres1~2; [L290] COND FALSE !(1 == ~t2_pc~0) [L300] is_transmit2_triggered_~__retres1~2 := 0; [L302] is_transmit2_triggered_#res := is_transmit2_triggered_~__retres1~2; [L653] activate_threads_#t~ret10 := is_transmit2_triggered_#res; [L653] activate_threads_~tmp___1~0 := activate_threads_#t~ret10; [L653] havoc activate_threads_#t~ret10; [L655-L659] COND FALSE !(0 != activate_threads_~tmp___1~0) [L661] havoc is_transmit3_triggered_#res; [L661] havoc is_transmit3_triggered_~__retres1~3; [L306] havoc is_transmit3_triggered_~__retres1~3; [L309] COND FALSE !(1 == ~t3_pc~0) [L319] is_transmit3_triggered_~__retres1~3 := 0; [L321] is_transmit3_triggered_#res := is_transmit3_triggered_~__retres1~3; [L661] activate_threads_#t~ret11 := is_transmit3_triggered_#res; [L661] activate_threads_~tmp___2~0 := activate_threads_#t~ret11; [L661] havoc activate_threads_#t~ret11; [L663-L667] COND FALSE !(0 != activate_threads_~tmp___2~0) [L669] havoc is_transmit4_triggered_#res; [L669] havoc is_transmit4_triggered_~__retres1~4; [L325] havoc is_transmit4_triggered_~__retres1~4; [L328] COND FALSE !(1 == ~t4_pc~0) [L338] is_transmit4_triggered_~__retres1~4 := 0; [L340] is_transmit4_triggered_#res := is_transmit4_triggered_~__retres1~4; [L669] activate_threads_#t~ret12 := is_transmit4_triggered_#res; [L669] activate_threads_~tmp___3~0 := activate_threads_#t~ret12; [L669] havoc activate_threads_#t~ret12; [L671-L675] COND FALSE !(0 != activate_threads_~tmp___3~0) [L574] COND FALSE !(1 == ~M_E~0) [L579] COND FALSE !(1 == ~T1_E~0) [L584] COND FALSE !(1 == ~T2_E~0) [L589] COND FALSE !(1 == ~T3_E~0) [L594] COND FALSE !(1 == ~T4_E~0) [L599] COND FALSE !(1 == ~E_M~0) [L604] COND FALSE !(1 == ~E_1~0) [L609] COND FALSE !(1 == ~E_2~0) [L614] COND FALSE !(1 == ~E_3~0) [L619] COND FALSE !(1 == ~E_4~0) [L805-L842] COND FALSE !(false) [L808] start_simulation_~kernel_st~0 := 1; [L809] havoc eval_#t~ret2, eval_#t~nondet3, eval_~tmp_ndt_1~0, eval_#t~nondet4, eval_~tmp_ndt_2~0, eval_#t~nondet5, eval_~tmp_ndt_3~0, eval_#t~nondet6, eval_~tmp_ndt_4~0, eval_#t~nondet7, eval_~tmp_ndt_5~0, eval_~tmp~0; [L421] havoc eval_~tmp~0; [L14] ~m_pc~0 := 0; [L15] ~t1_pc~0 := 0; [L16] ~t2_pc~0 := 0; [L17] ~t3_pc~0 := 0; [L18] ~t4_pc~0 := 0; [L19] ~m_st~0 := 0; [L20] ~t1_st~0 := 0; [L21] ~t2_st~0 := 0; [L22] ~t3_st~0 := 0; [L23] ~t4_st~0 := 0; [L24] ~m_i~0 := 0; [L25] ~t1_i~0 := 0; [L26] ~t2_i~0 := 0; [L27] ~t3_i~0 := 0; [L28] ~t4_i~0 := 0; [L29] ~M_E~0 := 2; [L30] ~T1_E~0 := 2; [L31] ~T2_E~0 := 2; [L32] ~T3_E~0 := 2; [L33] ~T4_E~0 := 2; [L34] ~E_M~0 := 2; [L35] ~E_1~0 := 2; [L36] ~E_2~0 := 2; [L37] ~E_3~0 := 2; [L38] ~E_4~0 := 2; [L45] ~token~0 := 0; [L47] ~local~0 := 0; [L850] havoc ~__retres1~6; [L762] ~m_i~0 := 1; [L763] ~t1_i~0 := 1; [L764] ~t2_i~0 := 1; [L765] ~t3_i~0 := 1; [L766] ~t4_i~0 := 1; [L791] havoc ~kernel_st~0; [L792] havoc ~tmp~3; [L793] havoc ~tmp___0~1; [L797] ~kernel_st~0 := 0; [L355] COND TRUE 1 == ~m_i~0 [L356] ~m_st~0 := 0; [L360] COND TRUE 1 == ~t1_i~0 [L361] ~t1_st~0 := 0; [L365] COND TRUE 1 == ~t2_i~0 [L366] ~t2_st~0 := 0; [L370] COND TRUE 1 == ~t3_i~0 [L371] ~t3_st~0 := 0; [L375] COND TRUE 1 == ~t4_i~0 [L376] ~t4_st~0 := 0; [L516] COND FALSE !(0 == ~M_E~0) [L521] COND FALSE !(0 == ~T1_E~0) [L526] COND FALSE !(0 == ~T2_E~0) [L531] COND FALSE !(0 == ~T3_E~0) [L536] COND FALSE !(0 == ~T4_E~0) [L541] COND FALSE !(0 == ~E_M~0) [L546] COND FALSE !(0 == ~E_1~0) [L551] COND FALSE !(0 == ~E_2~0) [L556] COND FALSE !(0 == ~E_3~0) [L561] COND FALSE !(0 == ~E_4~0) [L629] havoc ~tmp~1; [L630] havoc ~tmp___0~0; [L631] havoc ~tmp___1~0; [L632] havoc ~tmp___2~0; [L633] havoc ~tmp___3~0; [L249] havoc ~__retres1~0; [L252] COND FALSE !(1 == ~m_pc~0) [L262] ~__retres1~0 := 0; [L264] #res := ~__retres1~0; [L637] ~tmp~1 := #t~ret8; [L637] havoc #t~ret8; [L639-L643] COND FALSE !(0 != ~tmp~1) [L268] havoc ~__retres1~1; [L271] COND FALSE !(1 == ~t1_pc~0) [L281] ~__retres1~1 := 0; [L283] #res := ~__retres1~1; [L645] ~tmp___0~0 := #t~ret9; [L645] havoc #t~ret9; [L647-L651] COND FALSE !(0 != ~tmp___0~0) [L287] havoc ~__retres1~2; [L290] COND FALSE !(1 == ~t2_pc~0) [L300] ~__retres1~2 := 0; [L302] #res := ~__retres1~2; [L653] ~tmp___1~0 := #t~ret10; [L653] havoc #t~ret10; [L655-L659] COND FALSE !(0 != ~tmp___1~0) [L306] havoc ~__retres1~3; [L309] COND FALSE !(1 == ~t3_pc~0) [L319] ~__retres1~3 := 0; [L321] #res := ~__retres1~3; [L661] ~tmp___2~0 := #t~ret11; [L661] havoc #t~ret11; [L663-L667] COND FALSE !(0 != ~tmp___2~0) [L325] havoc ~__retres1~4; [L328] COND FALSE !(1 == ~t4_pc~0) [L338] ~__retres1~4 := 0; [L340] #res := ~__retres1~4; [L669] ~tmp___3~0 := #t~ret12; [L669] havoc #t~ret12; [L671-L675] COND FALSE !(0 != ~tmp___3~0) [L574] COND FALSE !(1 == ~M_E~0) [L579] COND FALSE !(1 == ~T1_E~0) [L584] COND FALSE !(1 == ~T2_E~0) [L589] COND FALSE !(1 == ~T3_E~0) [L594] COND FALSE !(1 == ~T4_E~0) [L599] COND FALSE !(1 == ~E_M~0) [L604] COND FALSE !(1 == ~E_1~0) [L609] COND FALSE !(1 == ~E_2~0) [L614] COND FALSE !(1 == ~E_3~0) [L619] COND FALSE !(1 == ~E_4~0) [L805-L842] COND FALSE !(false) [L808] ~kernel_st~0 := 1; [L421] havoc ~tmp~0; ----- ----- class de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.CACSL2BoogieBacktranslator [L14] ~m_pc~0 := 0; [L15] ~t1_pc~0 := 0; [L16] ~t2_pc~0 := 0; [L17] ~t3_pc~0 := 0; [L18] ~t4_pc~0 := 0; [L19] ~m_st~0 := 0; [L20] ~t1_st~0 := 0; [L21] ~t2_st~0 := 0; [L22] ~t3_st~0 := 0; [L23] ~t4_st~0 := 0; [L24] ~m_i~0 := 0; [L25] ~t1_i~0 := 0; [L26] ~t2_i~0 := 0; [L27] ~t3_i~0 := 0; [L28] ~t4_i~0 := 0; [L29] ~M_E~0 := 2; [L30] ~T1_E~0 := 2; [L31] ~T2_E~0 := 2; [L32] ~T3_E~0 := 2; [L33] ~T4_E~0 := 2; [L34] ~E_M~0 := 2; [L35] ~E_1~0 := 2; [L36] ~E_2~0 := 2; [L37] ~E_3~0 := 2; [L38] ~E_4~0 := 2; [L45] ~token~0 := 0; [L47] ~local~0 := 0; [L850] havoc ~__retres1~6; [L762] ~m_i~0 := 1; [L763] ~t1_i~0 := 1; [L764] ~t2_i~0 := 1; [L765] ~t3_i~0 := 1; [L766] ~t4_i~0 := 1; [L791] havoc ~kernel_st~0; [L792] havoc ~tmp~3; [L793] havoc ~tmp___0~1; [L797] ~kernel_st~0 := 0; [L355] COND TRUE 1 == ~m_i~0 [L356] ~m_st~0 := 0; [L360] COND TRUE 1 == ~t1_i~0 [L361] ~t1_st~0 := 0; [L365] COND TRUE 1 == ~t2_i~0 [L366] ~t2_st~0 := 0; [L370] COND TRUE 1 == ~t3_i~0 [L371] ~t3_st~0 := 0; [L375] COND TRUE 1 == ~t4_i~0 [L376] ~t4_st~0 := 0; [L516] COND FALSE !(0 == ~M_E~0) [L521] COND FALSE !(0 == ~T1_E~0) [L526] COND FALSE !(0 == ~T2_E~0) [L531] COND FALSE !(0 == ~T3_E~0) [L536] COND FALSE !(0 == ~T4_E~0) [L541] COND FALSE !(0 == ~E_M~0) [L546] COND FALSE !(0 == ~E_1~0) [L551] COND FALSE !(0 == ~E_2~0) [L556] COND FALSE !(0 == ~E_3~0) [L561] COND FALSE !(0 == ~E_4~0) [L629] havoc ~tmp~1; [L630] havoc ~tmp___0~0; [L631] havoc ~tmp___1~0; [L632] havoc ~tmp___2~0; [L633] havoc ~tmp___3~0; [L249] havoc ~__retres1~0; [L252] COND FALSE !(1 == ~m_pc~0) [L262] ~__retres1~0 := 0; [L264] #res := ~__retres1~0; [L637] ~tmp~1 := #t~ret8; [L637] havoc #t~ret8; [L639-L643] COND FALSE !(0 != ~tmp~1) [L268] havoc ~__retres1~1; [L271] COND FALSE !(1 == ~t1_pc~0) [L281] ~__retres1~1 := 0; [L283] #res := ~__retres1~1; [L645] ~tmp___0~0 := #t~ret9; [L645] havoc #t~ret9; [L647-L651] COND FALSE !(0 != ~tmp___0~0) [L287] havoc ~__retres1~2; [L290] COND FALSE !(1 == ~t2_pc~0) [L300] ~__retres1~2 := 0; [L302] #res := ~__retres1~2; [L653] ~tmp___1~0 := #t~ret10; [L653] havoc #t~ret10; [L655-L659] COND FALSE !(0 != ~tmp___1~0) [L306] havoc ~__retres1~3; [L309] COND FALSE !(1 == ~t3_pc~0) [L319] ~__retres1~3 := 0; [L321] #res := ~__retres1~3; [L661] ~tmp___2~0 := #t~ret11; [L661] havoc #t~ret11; [L663-L667] COND FALSE !(0 != ~tmp___2~0) [L325] havoc ~__retres1~4; [L328] COND FALSE !(1 == ~t4_pc~0) [L338] ~__retres1~4 := 0; [L340] #res := ~__retres1~4; [L669] ~tmp___3~0 := #t~ret12; [L669] havoc #t~ret12; [L671-L675] COND FALSE !(0 != ~tmp___3~0) [L574] COND FALSE !(1 == ~M_E~0) [L579] COND FALSE !(1 == ~T1_E~0) [L584] COND FALSE !(1 == ~T2_E~0) [L589] COND FALSE !(1 == ~T3_E~0) [L594] COND FALSE !(1 == ~T4_E~0) [L599] COND FALSE !(1 == ~E_M~0) [L604] COND FALSE !(1 == ~E_1~0) [L609] COND FALSE !(1 == ~E_2~0) [L614] COND FALSE !(1 == ~E_3~0) [L619] COND FALSE !(1 == ~E_4~0) [L805-L842] COND FALSE !(false) [L808] ~kernel_st~0 := 1; [L421] havoc ~tmp~0; [L14] int m_pc = 0; [L15] int t1_pc = 0; [L16] int t2_pc = 0; [L17] int t3_pc = 0; [L18] int t4_pc = 0; [L19] int m_st ; [L20] int t1_st ; [L21] int t2_st ; [L22] int t3_st ; [L23] int t4_st ; [L24] int m_i ; [L25] int t1_i ; [L26] int t2_i ; [L27] int t3_i ; [L28] int t4_i ; [L29] int M_E = 2; [L30] int T1_E = 2; [L31] int T2_E = 2; [L32] int T3_E = 2; [L33] int T4_E = 2; [L34] int E_M = 2; [L35] int E_1 = 2; [L36] int E_2 = 2; [L37] int E_3 = 2; [L38] int E_4 = 2; [L45] int token ; [L47] int local ; [L850] int __retres1 ; [L762] m_i = 1 [L763] t1_i = 1 [L764] t2_i = 1 [L765] t3_i = 1 [L766] t4_i = 1 [L791] int kernel_st ; [L792] int tmp ; [L793] int tmp___0 ; [L797] kernel_st = 0 [L355] COND TRUE m_i == 1 [L356] m_st = 0 [L360] COND TRUE t1_i == 1 [L361] t1_st = 0 [L365] COND TRUE t2_i == 1 [L366] t2_st = 0 [L370] COND TRUE t3_i == 1 [L371] t3_st = 0 [L375] COND TRUE t4_i == 1 [L376] t4_st = 0 [L516] COND FALSE !(M_E == 0) [L521] COND FALSE !(T1_E == 0) [L526] COND FALSE !(T2_E == 0) [L531] COND FALSE !(T3_E == 0) [L536] COND FALSE !(T4_E == 0) [L541] COND FALSE !(E_M == 0) [L546] COND FALSE !(E_1 == 0) [L551] COND FALSE !(E_2 == 0) [L556] COND FALSE !(E_3 == 0) [L561] COND FALSE !(E_4 == 0) [L629] int tmp ; [L630] int tmp___0 ; [L631] int tmp___1 ; [L632] int tmp___2 ; [L633] int tmp___3 ; [L249] int __retres1 ; [L252] COND FALSE !(m_pc == 1) [L262] __retres1 = 0 [L264] return (__retres1); [L637] tmp = is_master_triggered() [L639] COND FALSE !(\read(tmp)) [L268] int __retres1 ; [L271] COND FALSE !(t1_pc == 1) [L281] __retres1 = 0 [L283] return (__retres1); [L645] tmp___0 = is_transmit1_triggered() [L647] COND FALSE !(\read(tmp___0)) [L287] int __retres1 ; [L290] COND FALSE !(t2_pc == 1) [L300] __retres1 = 0 [L302] return (__retres1); [L653] tmp___1 = is_transmit2_triggered() [L655] COND FALSE !(\read(tmp___1)) [L306] int __retres1 ; [L309] COND FALSE !(t3_pc == 1) [L319] __retres1 = 0 [L321] return (__retres1); [L661] tmp___2 = is_transmit3_triggered() [L663] COND FALSE !(\read(tmp___2)) [L325] int __retres1 ; [L328] COND FALSE !(t4_pc == 1) [L338] __retres1 = 0 [L340] return (__retres1); [L669] tmp___3 = is_transmit4_triggered() [L671] COND FALSE !(\read(tmp___3)) [L574] COND FALSE !(M_E == 1) [L579] COND FALSE !(T1_E == 1) [L584] COND FALSE !(T2_E == 1) [L589] COND FALSE !(T3_E == 1) [L594] COND FALSE !(T4_E == 1) [L599] COND FALSE !(E_M == 1) [L604] COND FALSE !(E_1 == 1) [L609] COND FALSE !(E_2 == 1) [L614] COND FALSE !(E_3 == 1) [L619] COND FALSE !(E_4 == 1) [L805] COND TRUE 1 [L808] kernel_st = 1 [L421] int tmp ; ----- ----- class de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder.RCFGBacktranslator [?] assume !false; [?] havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~5;havoc exists_runnable_thread_~__retres1~5; [?] assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~5 := 1; [?] exists_runnable_thread_#res := exists_runnable_thread_~__retres1~5; [?] eval_#t~ret2 := exists_runnable_thread_#res;eval_~tmp~0 := eval_#t~ret2;havoc eval_#t~ret2; [?] assume 0 != eval_~tmp~0; [?] assume 0 == ~m_st~0;havoc eval_~tmp_ndt_1~0;eval_~tmp_ndt_1~0 := eval_#t~nondet3;havoc eval_#t~nondet3; [?] assume !(0 != eval_~tmp_ndt_1~0); [?] assume 0 == ~t1_st~0;havoc eval_~tmp_ndt_2~0;eval_~tmp_ndt_2~0 := eval_#t~nondet4;havoc eval_#t~nondet4; [?] assume !(0 != eval_~tmp_ndt_2~0); [?] assume 0 == ~t2_st~0;havoc eval_~tmp_ndt_3~0;eval_~tmp_ndt_3~0 := eval_#t~nondet5;havoc eval_#t~nondet5; [?] assume !(0 != eval_~tmp_ndt_3~0); [?] assume 0 == ~t3_st~0;havoc eval_~tmp_ndt_4~0;eval_~tmp_ndt_4~0 := eval_#t~nondet6;havoc eval_#t~nondet6; [?] assume !(0 != eval_~tmp_ndt_4~0); [?] assume 0 == ~t4_st~0;havoc eval_~tmp_ndt_5~0;eval_~tmp_ndt_5~0 := eval_#t~nondet7;havoc eval_#t~nondet7; [?] assume !(0 != eval_~tmp_ndt_5~0); [L425-L505] assume !false; [L428] havoc exists_runnable_thread_#res; [L428] havoc exists_runnable_thread_~__retres1~5; [L385] havoc exists_runnable_thread_~__retres1~5; [L388-L413] assume 0 == ~m_st~0; [L389] exists_runnable_thread_~__retres1~5 := 1; [L416] exists_runnable_thread_#res := exists_runnable_thread_~__retres1~5; [L428] eval_#t~ret2 := exists_runnable_thread_#res; [L428] eval_~tmp~0 := eval_#t~ret2; [L428] havoc eval_#t~ret2; [L430-L434] assume 0 != eval_~tmp~0; [L435-L448] assume 0 == ~m_st~0; [L436] havoc eval_~tmp_ndt_1~0; [L437] eval_~tmp_ndt_1~0 := eval_#t~nondet3; [L437] havoc eval_#t~nondet3; [L438-L445] assume !(0 != eval_~tmp_ndt_1~0); [L449-L462] assume 0 == ~t1_st~0; [L450] havoc eval_~tmp_ndt_2~0; [L451] eval_~tmp_ndt_2~0 := eval_#t~nondet4; [L451] havoc eval_#t~nondet4; [L452-L459] assume !(0 != eval_~tmp_ndt_2~0); [L463-L476] assume 0 == ~t2_st~0; [L464] havoc eval_~tmp_ndt_3~0; [L465] eval_~tmp_ndt_3~0 := eval_#t~nondet5; [L465] havoc eval_#t~nondet5; [L466-L473] assume !(0 != eval_~tmp_ndt_3~0); [L477-L490] assume 0 == ~t3_st~0; [L478] havoc eval_~tmp_ndt_4~0; [L479] eval_~tmp_ndt_4~0 := eval_#t~nondet6; [L479] havoc eval_#t~nondet6; [L480-L487] assume !(0 != eval_~tmp_ndt_4~0); [L491-L504] assume 0 == ~t4_st~0; [L492] havoc eval_~tmp_ndt_5~0; [L493] eval_~tmp_ndt_5~0 := eval_#t~nondet7; [L493] havoc eval_#t~nondet7; [L494-L501] assume !(0 != eval_~tmp_ndt_5~0); ----- ----- class de.uni_freiburg.informatik.ultimate.boogie.preprocessor.BoogiePreprocessorBacktranslator [L425-L505] assume !false; [L428] havoc exists_runnable_thread_#res; [L428] havoc exists_runnable_thread_~__retres1~5; [L385] havoc exists_runnable_thread_~__retres1~5; [L388-L413] assume 0 == ~m_st~0; [L389] exists_runnable_thread_~__retres1~5 := 1; [L416] exists_runnable_thread_#res := exists_runnable_thread_~__retres1~5; [L428] eval_#t~ret2 := exists_runnable_thread_#res; [L428] eval_~tmp~0 := eval_#t~ret2; [L428] havoc eval_#t~ret2; [L430-L434] assume 0 != eval_~tmp~0; [L435-L448] assume 0 == ~m_st~0; [L436] havoc eval_~tmp_ndt_1~0; [L437] eval_~tmp_ndt_1~0 := eval_#t~nondet3; [L437] havoc eval_#t~nondet3; [L438-L445] assume !(0 != eval_~tmp_ndt_1~0); [L449-L462] assume 0 == ~t1_st~0; [L450] havoc eval_~tmp_ndt_2~0; [L451] eval_~tmp_ndt_2~0 := eval_#t~nondet4; [L451] havoc eval_#t~nondet4; [L452-L459] assume !(0 != eval_~tmp_ndt_2~0); [L463-L476] assume 0 == ~t2_st~0; [L464] havoc eval_~tmp_ndt_3~0; [L465] eval_~tmp_ndt_3~0 := eval_#t~nondet5; [L465] havoc eval_#t~nondet5; [L466-L473] assume !(0 != eval_~tmp_ndt_3~0); [L477-L490] assume 0 == ~t3_st~0; [L478] havoc eval_~tmp_ndt_4~0; [L479] eval_~tmp_ndt_4~0 := eval_#t~nondet6; [L479] havoc eval_#t~nondet6; [L480-L487] assume !(0 != eval_~tmp_ndt_4~0); [L491-L504] assume 0 == ~t4_st~0; [L492] havoc eval_~tmp_ndt_5~0; [L493] eval_~tmp_ndt_5~0 := eval_#t~nondet7; [L493] havoc eval_#t~nondet7; [L494-L501] assume !(0 != eval_~tmp_ndt_5~0); [L425-L505] COND FALSE !(false) [L428] havoc exists_runnable_thread_#res; [L428] havoc exists_runnable_thread_~__retres1~5; [L385] havoc exists_runnable_thread_~__retres1~5; [L388] COND TRUE 0 == ~m_st~0 [L389] exists_runnable_thread_~__retres1~5 := 1; [L416] exists_runnable_thread_#res := exists_runnable_thread_~__retres1~5; [L428] eval_#t~ret2 := exists_runnable_thread_#res; [L428] eval_~tmp~0 := eval_#t~ret2; [L428] havoc eval_#t~ret2; [L430-L434] COND TRUE 0 != eval_~tmp~0 [L435] COND TRUE 0 == ~m_st~0 [L436] havoc eval_~tmp_ndt_1~0; [L437] eval_~tmp_ndt_1~0 := eval_#t~nondet3; [L437] havoc eval_#t~nondet3; [L438-L445] COND FALSE !(0 != eval_~tmp_ndt_1~0) [L449] COND TRUE 0 == ~t1_st~0 [L450] havoc eval_~tmp_ndt_2~0; [L451] eval_~tmp_ndt_2~0 := eval_#t~nondet4; [L451] havoc eval_#t~nondet4; [L452-L459] COND FALSE !(0 != eval_~tmp_ndt_2~0) [L463] COND TRUE 0 == ~t2_st~0 [L464] havoc eval_~tmp_ndt_3~0; [L465] eval_~tmp_ndt_3~0 := eval_#t~nondet5; [L465] havoc eval_#t~nondet5; [L466-L473] COND FALSE !(0 != eval_~tmp_ndt_3~0) [L477] COND TRUE 0 == ~t3_st~0 [L478] havoc eval_~tmp_ndt_4~0; [L479] eval_~tmp_ndt_4~0 := eval_#t~nondet6; [L479] havoc eval_#t~nondet6; [L480-L487] COND FALSE !(0 != eval_~tmp_ndt_4~0) [L491] COND TRUE 0 == ~t4_st~0 [L492] havoc eval_~tmp_ndt_5~0; [L493] eval_~tmp_ndt_5~0 := eval_#t~nondet7; [L493] havoc eval_#t~nondet7; [L494-L501] COND FALSE !(0 != eval_~tmp_ndt_5~0) ----- ----- class de.uni_freiburg.informatik.ultimate.boogie.procedureinliner.backtranslation.InlinerBacktranslator [L425-L505] COND FALSE !(false) [L428] havoc exists_runnable_thread_#res; [L428] havoc exists_runnable_thread_~__retres1~5; [L385] havoc exists_runnable_thread_~__retres1~5; [L388] COND TRUE 0 == ~m_st~0 [L389] exists_runnable_thread_~__retres1~5 := 1; [L416] exists_runnable_thread_#res := exists_runnable_thread_~__retres1~5; [L428] eval_#t~ret2 := exists_runnable_thread_#res; [L428] eval_~tmp~0 := eval_#t~ret2; [L428] havoc eval_#t~ret2; [L430-L434] COND TRUE 0 != eval_~tmp~0 [L435] COND TRUE 0 == ~m_st~0 [L436] havoc eval_~tmp_ndt_1~0; [L437] eval_~tmp_ndt_1~0 := eval_#t~nondet3; [L437] havoc eval_#t~nondet3; [L438-L445] COND FALSE !(0 != eval_~tmp_ndt_1~0) [L449] COND TRUE 0 == ~t1_st~0 [L450] havoc eval_~tmp_ndt_2~0; [L451] eval_~tmp_ndt_2~0 := eval_#t~nondet4; [L451] havoc eval_#t~nondet4; [L452-L459] COND FALSE !(0 != eval_~tmp_ndt_2~0) [L463] COND TRUE 0 == ~t2_st~0 [L464] havoc eval_~tmp_ndt_3~0; [L465] eval_~tmp_ndt_3~0 := eval_#t~nondet5; [L465] havoc eval_#t~nondet5; [L466-L473] COND FALSE !(0 != eval_~tmp_ndt_3~0) [L477] COND TRUE 0 == ~t3_st~0 [L478] havoc eval_~tmp_ndt_4~0; [L479] eval_~tmp_ndt_4~0 := eval_#t~nondet6; [L479] havoc eval_#t~nondet6; [L480-L487] COND FALSE !(0 != eval_~tmp_ndt_4~0) [L491] COND TRUE 0 == ~t4_st~0 [L492] havoc eval_~tmp_ndt_5~0; [L493] eval_~tmp_ndt_5~0 := eval_#t~nondet7; [L493] havoc eval_#t~nondet7; [L494-L501] COND FALSE !(0 != eval_~tmp_ndt_5~0) [L425-L505] COND FALSE !(false) [L385] havoc ~__retres1~5; [L388] COND TRUE 0 == ~m_st~0 [L389] ~__retres1~5 := 1; [L416] #res := ~__retres1~5; [L428] ~tmp~0 := #t~ret2; [L428] havoc #t~ret2; [L430-L434] COND TRUE 0 != ~tmp~0 [L435] COND TRUE 0 == ~m_st~0 [L436] havoc ~tmp_ndt_1~0; [L437] ~tmp_ndt_1~0 := #t~nondet3; [L437] havoc #t~nondet3; [L438-L445] COND FALSE !(0 != ~tmp_ndt_1~0) [L449] COND TRUE 0 == ~t1_st~0 [L450] havoc ~tmp_ndt_2~0; [L451] ~tmp_ndt_2~0 := #t~nondet4; [L451] havoc #t~nondet4; [L452-L459] COND FALSE !(0 != ~tmp_ndt_2~0) [L463] COND TRUE 0 == ~t2_st~0 [L464] havoc ~tmp_ndt_3~0; [L465] ~tmp_ndt_3~0 := #t~nondet5; [L465] havoc #t~nondet5; [L466-L473] COND FALSE !(0 != ~tmp_ndt_3~0) [L477] COND TRUE 0 == ~t3_st~0 [L478] havoc ~tmp_ndt_4~0; [L479] ~tmp_ndt_4~0 := #t~nondet6; [L479] havoc #t~nondet6; [L480-L487] COND FALSE !(0 != ~tmp_ndt_4~0) [L491] COND TRUE 0 == ~t4_st~0 [L492] havoc ~tmp_ndt_5~0; [L493] ~tmp_ndt_5~0 := #t~nondet7; [L493] havoc #t~nondet7; [L494-L501] COND FALSE !(0 != ~tmp_ndt_5~0) ----- ----- class de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.CACSL2BoogieBacktranslator [L425-L505] COND FALSE !(false) [L385] havoc ~__retres1~5; [L388] COND TRUE 0 == ~m_st~0 [L389] ~__retres1~5 := 1; [L416] #res := ~__retres1~5; [L428] ~tmp~0 := #t~ret2; [L428] havoc #t~ret2; [L430-L434] COND TRUE 0 != ~tmp~0 [L435] COND TRUE 0 == ~m_st~0 [L436] havoc ~tmp_ndt_1~0; [L437] ~tmp_ndt_1~0 := #t~nondet3; [L437] havoc #t~nondet3; [L438-L445] COND FALSE !(0 != ~tmp_ndt_1~0) [L449] COND TRUE 0 == ~t1_st~0 [L450] havoc ~tmp_ndt_2~0; [L451] ~tmp_ndt_2~0 := #t~nondet4; [L451] havoc #t~nondet4; [L452-L459] COND FALSE !(0 != ~tmp_ndt_2~0) [L463] COND TRUE 0 == ~t2_st~0 [L464] havoc ~tmp_ndt_3~0; [L465] ~tmp_ndt_3~0 := #t~nondet5; [L465] havoc #t~nondet5; [L466-L473] COND FALSE !(0 != ~tmp_ndt_3~0) [L477] COND TRUE 0 == ~t3_st~0 [L478] havoc ~tmp_ndt_4~0; [L479] ~tmp_ndt_4~0 := #t~nondet6; [L479] havoc #t~nondet6; [L480-L487] COND FALSE !(0 != ~tmp_ndt_4~0) [L491] COND TRUE 0 == ~t4_st~0 [L492] havoc ~tmp_ndt_5~0; [L493] ~tmp_ndt_5~0 := #t~nondet7; [L493] havoc #t~nondet7; [L494-L501] COND FALSE !(0 != ~tmp_ndt_5~0) [L425] COND TRUE 1 [L385] int __retres1 ; [L388] COND TRUE m_st == 0 [L389] __retres1 = 1 [L416] return (__retres1); [L428] tmp = exists_runnable_thread() [L430] COND TRUE \read(tmp) [L435] COND TRUE m_st == 0 [L436] int tmp_ndt_1; [L437] tmp_ndt_1 = __VERIFIER_nondet_int() [L438] COND FALSE !(\read(tmp_ndt_1)) [L449] COND TRUE t1_st == 0 [L450] int tmp_ndt_2; [L451] tmp_ndt_2 = __VERIFIER_nondet_int() [L452] COND FALSE !(\read(tmp_ndt_2)) [L463] COND TRUE t2_st == 0 [L464] int tmp_ndt_3; [L465] tmp_ndt_3 = __VERIFIER_nondet_int() [L466] COND FALSE !(\read(tmp_ndt_3)) [L477] COND TRUE t3_st == 0 [L478] int tmp_ndt_4; [L479] tmp_ndt_4 = __VERIFIER_nondet_int() [L480] COND FALSE !(\read(tmp_ndt_4)) [L491] COND TRUE t4_st == 0 [L492] int tmp_ndt_5; [L493] tmp_ndt_5 = __VERIFIER_nondet_int() [L494] COND FALSE !(\read(tmp_ndt_5)) ----- [2018-11-23 08:02:26,973 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer CFG 23.11 08:02:26 BoogieIcfgContainer [2018-11-23 08:02:26,973 INFO L132 PluginConnector]: ------------------------ END BuchiAutomizer---------------------------- [2018-11-23 08:02:26,973 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2018-11-23 08:02:26,973 INFO L271 PluginConnector]: Initializing Witness Printer... [2018-11-23 08:02:26,974 INFO L276 PluginConnector]: Witness Printer initialized [2018-11-23 08:02:26,974 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 23.11 08:02:21" (3/4) ... [2018-11-23 08:02:26,978 INFO L141 WitnessPrinter]: Generating witness for non-termination counterexample ----- class de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder.RCFGBacktranslator [?] ~m_pc~0 := 0;~t1_pc~0 := 0;~t2_pc~0 := 0;~t3_pc~0 := 0;~t4_pc~0 := 0;~m_st~0 := 0;~t1_st~0 := 0;~t2_st~0 := 0;~t3_st~0 := 0;~t4_st~0 := 0;~m_i~0 := 0;~t1_i~0 := 0;~t2_i~0 := 0;~t3_i~0 := 0;~t4_i~0 := 0;~M_E~0 := 2;~T1_E~0 := 2;~T2_E~0 := 2;~T3_E~0 := 2;~T4_E~0 := 2;~E_M~0 := 2;~E_1~0 := 2;~E_2~0 := 2;~E_3~0 := 2;~E_4~0 := 2;~token~0 := 0;~local~0 := 0; [?] havoc main_#res;havoc main_~__retres1~6;havoc main_~__retres1~6;~m_i~0 := 1;~t1_i~0 := 1;~t2_i~0 := 1;~t3_i~0 := 1;~t4_i~0 := 1; [?] havoc start_simulation_#t~ret14, start_simulation_#t~ret15, start_simulation_~kernel_st~0, start_simulation_~tmp~3, start_simulation_~tmp___0~1;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;havoc start_simulation_~tmp___0~1;start_simulation_~kernel_st~0 := 0; [?] assume 1 == ~m_i~0;~m_st~0 := 0; [?] assume 1 == ~t1_i~0;~t1_st~0 := 0; [?] assume 1 == ~t2_i~0;~t2_st~0 := 0; [?] assume 1 == ~t3_i~0;~t3_st~0 := 0; [?] assume 1 == ~t4_i~0;~t4_st~0 := 0; [?] assume !(0 == ~M_E~0); [?] assume !(0 == ~T1_E~0); [?] assume !(0 == ~T2_E~0); [?] assume !(0 == ~T3_E~0); [?] assume !(0 == ~T4_E~0); [?] assume !(0 == ~E_M~0); [?] assume !(0 == ~E_1~0); [?] assume !(0 == ~E_2~0); [?] assume !(0 == ~E_3~0); [?] assume !(0 == ~E_4~0); [?] havoc activate_threads_#t~ret8, activate_threads_#t~ret9, activate_threads_#t~ret10, activate_threads_#t~ret11, activate_threads_#t~ret12, activate_threads_~tmp~1, activate_threads_~tmp___0~0, activate_threads_~tmp___1~0, activate_threads_~tmp___2~0, activate_threads_~tmp___3~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc activate_threads_~tmp___1~0;havoc activate_threads_~tmp___2~0;havoc activate_threads_~tmp___3~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; [?] assume !(1 == ~m_pc~0); [?] is_master_triggered_~__retres1~0 := 0; [?] is_master_triggered_#res := is_master_triggered_~__retres1~0; [?] activate_threads_#t~ret8 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret8;havoc activate_threads_#t~ret8; [?] assume !(0 != activate_threads_~tmp~1); [?] havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; [?] assume !(1 == ~t1_pc~0); [?] is_transmit1_triggered_~__retres1~1 := 0; [?] is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; [?] activate_threads_#t~ret9 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret9;havoc activate_threads_#t~ret9; [?] assume !(0 != activate_threads_~tmp___0~0); [?] havoc is_transmit2_triggered_#res;havoc is_transmit2_triggered_~__retres1~2;havoc is_transmit2_triggered_~__retres1~2; [?] assume !(1 == ~t2_pc~0); [?] is_transmit2_triggered_~__retres1~2 := 0; [?] is_transmit2_triggered_#res := is_transmit2_triggered_~__retres1~2; [?] activate_threads_#t~ret10 := is_transmit2_triggered_#res;activate_threads_~tmp___1~0 := activate_threads_#t~ret10;havoc activate_threads_#t~ret10; [?] assume !(0 != activate_threads_~tmp___1~0); [?] havoc is_transmit3_triggered_#res;havoc is_transmit3_triggered_~__retres1~3;havoc is_transmit3_triggered_~__retres1~3; [?] assume !(1 == ~t3_pc~0); [?] is_transmit3_triggered_~__retres1~3 := 0; [?] is_transmit3_triggered_#res := is_transmit3_triggered_~__retres1~3; [?] activate_threads_#t~ret11 := is_transmit3_triggered_#res;activate_threads_~tmp___2~0 := activate_threads_#t~ret11;havoc activate_threads_#t~ret11; [?] assume !(0 != activate_threads_~tmp___2~0); [?] havoc is_transmit4_triggered_#res;havoc is_transmit4_triggered_~__retres1~4;havoc is_transmit4_triggered_~__retres1~4; [?] assume !(1 == ~t4_pc~0); [?] is_transmit4_triggered_~__retres1~4 := 0; [?] is_transmit4_triggered_#res := is_transmit4_triggered_~__retres1~4; [?] activate_threads_#t~ret12 := is_transmit4_triggered_#res;activate_threads_~tmp___3~0 := activate_threads_#t~ret12;havoc activate_threads_#t~ret12; [?] assume !(0 != activate_threads_~tmp___3~0); [?] assume !(1 == ~M_E~0); [?] assume !(1 == ~T1_E~0); [?] assume !(1 == ~T2_E~0); [?] assume !(1 == ~T3_E~0); [?] assume !(1 == ~T4_E~0); [?] assume !(1 == ~E_M~0); [?] assume !(1 == ~E_1~0); [?] assume !(1 == ~E_2~0); [?] assume !(1 == ~E_3~0); [?] assume !(1 == ~E_4~0); [?] assume !false; [?] start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret2, eval_#t~nondet3, eval_~tmp_ndt_1~0, eval_#t~nondet4, eval_~tmp_ndt_2~0, eval_#t~nondet5, eval_~tmp_ndt_3~0, eval_#t~nondet6, eval_~tmp_ndt_4~0, eval_#t~nondet7, eval_~tmp_ndt_5~0, eval_~tmp~0;havoc eval_~tmp~0; [L14] ~m_pc~0 := 0; [L15] ~t1_pc~0 := 0; [L16] ~t2_pc~0 := 0; [L17] ~t3_pc~0 := 0; [L18] ~t4_pc~0 := 0; [L19] ~m_st~0 := 0; [L20] ~t1_st~0 := 0; [L21] ~t2_st~0 := 0; [L22] ~t3_st~0 := 0; [L23] ~t4_st~0 := 0; [L24] ~m_i~0 := 0; [L25] ~t1_i~0 := 0; [L26] ~t2_i~0 := 0; [L27] ~t3_i~0 := 0; [L28] ~t4_i~0 := 0; [L29] ~M_E~0 := 2; [L30] ~T1_E~0 := 2; [L31] ~T2_E~0 := 2; [L32] ~T3_E~0 := 2; [L33] ~T4_E~0 := 2; [L34] ~E_M~0 := 2; [L35] ~E_1~0 := 2; [L36] ~E_2~0 := 2; [L37] ~E_3~0 := 2; [L38] ~E_4~0 := 2; [L45] ~token~0 := 0; [L47] ~local~0 := 0; [?] havoc main_#res; [?] havoc main_~__retres1~6; [L850] havoc main_~__retres1~6; [L762] ~m_i~0 := 1; [L763] ~t1_i~0 := 1; [L764] ~t2_i~0 := 1; [L765] ~t3_i~0 := 1; [L766] ~t4_i~0 := 1; [L855] havoc start_simulation_#t~ret14, start_simulation_#t~ret15, start_simulation_~kernel_st~0, start_simulation_~tmp~3, start_simulation_~tmp___0~1; [L791] havoc start_simulation_~kernel_st~0; [L792] havoc start_simulation_~tmp~3; [L793] havoc start_simulation_~tmp___0~1; [L797] start_simulation_~kernel_st~0 := 0; [L355-L359] assume 1 == ~m_i~0; [L356] ~m_st~0 := 0; [L360-L364] assume 1 == ~t1_i~0; [L361] ~t1_st~0 := 0; [L365-L369] assume 1 == ~t2_i~0; [L366] ~t2_st~0 := 0; [L370-L374] assume 1 == ~t3_i~0; [L371] ~t3_st~0 := 0; [L375-L379] assume 1 == ~t4_i~0; [L376] ~t4_st~0 := 0; [L516-L520] assume !(0 == ~M_E~0); [L521-L525] assume !(0 == ~T1_E~0); [L526-L530] assume !(0 == ~T2_E~0); [L531-L535] assume !(0 == ~T3_E~0); [L536-L540] assume !(0 == ~T4_E~0); [L541-L545] assume !(0 == ~E_M~0); [L546-L550] assume !(0 == ~E_1~0); [L551-L555] assume !(0 == ~E_2~0); [L556-L560] assume !(0 == ~E_3~0); [L561-L565] assume !(0 == ~E_4~0); [L801] havoc activate_threads_#t~ret8, activate_threads_#t~ret9, activate_threads_#t~ret10, activate_threads_#t~ret11, activate_threads_#t~ret12, activate_threads_~tmp~1, activate_threads_~tmp___0~0, activate_threads_~tmp___1~0, activate_threads_~tmp___2~0, activate_threads_~tmp___3~0; [L629] havoc activate_threads_~tmp~1; [L630] havoc activate_threads_~tmp___0~0; [L631] havoc activate_threads_~tmp___1~0; [L632] havoc activate_threads_~tmp___2~0; [L633] havoc activate_threads_~tmp___3~0; [L637] havoc is_master_triggered_#res; [L637] havoc is_master_triggered_~__retres1~0; [L249] havoc is_master_triggered_~__retres1~0; [L252-L261] assume !(1 == ~m_pc~0); [L262] is_master_triggered_~__retres1~0 := 0; [L264] is_master_triggered_#res := is_master_triggered_~__retres1~0; [L637] activate_threads_#t~ret8 := is_master_triggered_#res; [L637] activate_threads_~tmp~1 := activate_threads_#t~ret8; [L637] havoc activate_threads_#t~ret8; [L639-L643] assume !(0 != activate_threads_~tmp~1); [L645] havoc is_transmit1_triggered_#res; [L645] havoc is_transmit1_triggered_~__retres1~1; [L268] havoc is_transmit1_triggered_~__retres1~1; [L271-L280] assume !(1 == ~t1_pc~0); [L281] is_transmit1_triggered_~__retres1~1 := 0; [L283] is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; [L645] activate_threads_#t~ret9 := is_transmit1_triggered_#res; [L645] activate_threads_~tmp___0~0 := activate_threads_#t~ret9; [L645] havoc activate_threads_#t~ret9; [L647-L651] assume !(0 != activate_threads_~tmp___0~0); [L653] havoc is_transmit2_triggered_#res; [L653] havoc is_transmit2_triggered_~__retres1~2; [L287] havoc is_transmit2_triggered_~__retres1~2; [L290-L299] assume !(1 == ~t2_pc~0); [L300] is_transmit2_triggered_~__retres1~2 := 0; [L302] is_transmit2_triggered_#res := is_transmit2_triggered_~__retres1~2; [L653] activate_threads_#t~ret10 := is_transmit2_triggered_#res; [L653] activate_threads_~tmp___1~0 := activate_threads_#t~ret10; [L653] havoc activate_threads_#t~ret10; [L655-L659] assume !(0 != activate_threads_~tmp___1~0); [L661] havoc is_transmit3_triggered_#res; [L661] havoc is_transmit3_triggered_~__retres1~3; [L306] havoc is_transmit3_triggered_~__retres1~3; [L309-L318] assume !(1 == ~t3_pc~0); [L319] is_transmit3_triggered_~__retres1~3 := 0; [L321] is_transmit3_triggered_#res := is_transmit3_triggered_~__retres1~3; [L661] activate_threads_#t~ret11 := is_transmit3_triggered_#res; [L661] activate_threads_~tmp___2~0 := activate_threads_#t~ret11; [L661] havoc activate_threads_#t~ret11; [L663-L667] assume !(0 != activate_threads_~tmp___2~0); [L669] havoc is_transmit4_triggered_#res; [L669] havoc is_transmit4_triggered_~__retres1~4; [L325] havoc is_transmit4_triggered_~__retres1~4; [L328-L337] assume !(1 == ~t4_pc~0); [L338] is_transmit4_triggered_~__retres1~4 := 0; [L340] is_transmit4_triggered_#res := is_transmit4_triggered_~__retres1~4; [L669] activate_threads_#t~ret12 := is_transmit4_triggered_#res; [L669] activate_threads_~tmp___3~0 := activate_threads_#t~ret12; [L669] havoc activate_threads_#t~ret12; [L671-L675] assume !(0 != activate_threads_~tmp___3~0); [L574-L578] assume !(1 == ~M_E~0); [L579-L583] assume !(1 == ~T1_E~0); [L584-L588] assume !(1 == ~T2_E~0); [L589-L593] assume !(1 == ~T3_E~0); [L594-L598] assume !(1 == ~T4_E~0); [L599-L603] assume !(1 == ~E_M~0); [L604-L608] assume !(1 == ~E_1~0); [L609-L613] assume !(1 == ~E_2~0); [L614-L618] assume !(1 == ~E_3~0); [L619-L623] assume !(1 == ~E_4~0); [L805-L842] assume !false; [L808] start_simulation_~kernel_st~0 := 1; [L809] havoc eval_#t~ret2, eval_#t~nondet3, eval_~tmp_ndt_1~0, eval_#t~nondet4, eval_~tmp_ndt_2~0, eval_#t~nondet5, eval_~tmp_ndt_3~0, eval_#t~nondet6, eval_~tmp_ndt_4~0, eval_#t~nondet7, eval_~tmp_ndt_5~0, eval_~tmp~0; [L421] havoc eval_~tmp~0; ----- ----- class de.uni_freiburg.informatik.ultimate.boogie.preprocessor.BoogiePreprocessorBacktranslator [L14] ~m_pc~0 := 0; [L15] ~t1_pc~0 := 0; [L16] ~t2_pc~0 := 0; [L17] ~t3_pc~0 := 0; [L18] ~t4_pc~0 := 0; [L19] ~m_st~0 := 0; [L20] ~t1_st~0 := 0; [L21] ~t2_st~0 := 0; [L22] ~t3_st~0 := 0; [L23] ~t4_st~0 := 0; [L24] ~m_i~0 := 0; [L25] ~t1_i~0 := 0; [L26] ~t2_i~0 := 0; [L27] ~t3_i~0 := 0; [L28] ~t4_i~0 := 0; [L29] ~M_E~0 := 2; [L30] ~T1_E~0 := 2; [L31] ~T2_E~0 := 2; [L32] ~T3_E~0 := 2; [L33] ~T4_E~0 := 2; [L34] ~E_M~0 := 2; [L35] ~E_1~0 := 2; [L36] ~E_2~0 := 2; [L37] ~E_3~0 := 2; [L38] ~E_4~0 := 2; [L45] ~token~0 := 0; [L47] ~local~0 := 0; [?] havoc main_#res; [?] havoc main_~__retres1~6; [L850] havoc main_~__retres1~6; [L762] ~m_i~0 := 1; [L763] ~t1_i~0 := 1; [L764] ~t2_i~0 := 1; [L765] ~t3_i~0 := 1; [L766] ~t4_i~0 := 1; [L855] havoc start_simulation_#t~ret14, start_simulation_#t~ret15, start_simulation_~kernel_st~0, start_simulation_~tmp~3, start_simulation_~tmp___0~1; [L791] havoc start_simulation_~kernel_st~0; [L792] havoc start_simulation_~tmp~3; [L793] havoc start_simulation_~tmp___0~1; [L797] start_simulation_~kernel_st~0 := 0; [L355-L359] assume 1 == ~m_i~0; [L356] ~m_st~0 := 0; [L360-L364] assume 1 == ~t1_i~0; [L361] ~t1_st~0 := 0; [L365-L369] assume 1 == ~t2_i~0; [L366] ~t2_st~0 := 0; [L370-L374] assume 1 == ~t3_i~0; [L371] ~t3_st~0 := 0; [L375-L379] assume 1 == ~t4_i~0; [L376] ~t4_st~0 := 0; [L516-L520] assume !(0 == ~M_E~0); [L521-L525] assume !(0 == ~T1_E~0); [L526-L530] assume !(0 == ~T2_E~0); [L531-L535] assume !(0 == ~T3_E~0); [L536-L540] assume !(0 == ~T4_E~0); [L541-L545] assume !(0 == ~E_M~0); [L546-L550] assume !(0 == ~E_1~0); [L551-L555] assume !(0 == ~E_2~0); [L556-L560] assume !(0 == ~E_3~0); [L561-L565] assume !(0 == ~E_4~0); [L801] havoc activate_threads_#t~ret8, activate_threads_#t~ret9, activate_threads_#t~ret10, activate_threads_#t~ret11, activate_threads_#t~ret12, activate_threads_~tmp~1, activate_threads_~tmp___0~0, activate_threads_~tmp___1~0, activate_threads_~tmp___2~0, activate_threads_~tmp___3~0; [L629] havoc activate_threads_~tmp~1; [L630] havoc activate_threads_~tmp___0~0; [L631] havoc activate_threads_~tmp___1~0; [L632] havoc activate_threads_~tmp___2~0; [L633] havoc activate_threads_~tmp___3~0; [L637] havoc is_master_triggered_#res; [L637] havoc is_master_triggered_~__retres1~0; [L249] havoc is_master_triggered_~__retres1~0; [L252-L261] assume !(1 == ~m_pc~0); [L262] is_master_triggered_~__retres1~0 := 0; [L264] is_master_triggered_#res := is_master_triggered_~__retres1~0; [L637] activate_threads_#t~ret8 := is_master_triggered_#res; [L637] activate_threads_~tmp~1 := activate_threads_#t~ret8; [L637] havoc activate_threads_#t~ret8; [L639-L643] assume !(0 != activate_threads_~tmp~1); [L645] havoc is_transmit1_triggered_#res; [L645] havoc is_transmit1_triggered_~__retres1~1; [L268] havoc is_transmit1_triggered_~__retres1~1; [L271-L280] assume !(1 == ~t1_pc~0); [L281] is_transmit1_triggered_~__retres1~1 := 0; [L283] is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; [L645] activate_threads_#t~ret9 := is_transmit1_triggered_#res; [L645] activate_threads_~tmp___0~0 := activate_threads_#t~ret9; [L645] havoc activate_threads_#t~ret9; [L647-L651] assume !(0 != activate_threads_~tmp___0~0); [L653] havoc is_transmit2_triggered_#res; [L653] havoc is_transmit2_triggered_~__retres1~2; [L287] havoc is_transmit2_triggered_~__retres1~2; [L290-L299] assume !(1 == ~t2_pc~0); [L300] is_transmit2_triggered_~__retres1~2 := 0; [L302] is_transmit2_triggered_#res := is_transmit2_triggered_~__retres1~2; [L653] activate_threads_#t~ret10 := is_transmit2_triggered_#res; [L653] activate_threads_~tmp___1~0 := activate_threads_#t~ret10; [L653] havoc activate_threads_#t~ret10; [L655-L659] assume !(0 != activate_threads_~tmp___1~0); [L661] havoc is_transmit3_triggered_#res; [L661] havoc is_transmit3_triggered_~__retres1~3; [L306] havoc is_transmit3_triggered_~__retres1~3; [L309-L318] assume !(1 == ~t3_pc~0); [L319] is_transmit3_triggered_~__retres1~3 := 0; [L321] is_transmit3_triggered_#res := is_transmit3_triggered_~__retres1~3; [L661] activate_threads_#t~ret11 := is_transmit3_triggered_#res; [L661] activate_threads_~tmp___2~0 := activate_threads_#t~ret11; [L661] havoc activate_threads_#t~ret11; [L663-L667] assume !(0 != activate_threads_~tmp___2~0); [L669] havoc is_transmit4_triggered_#res; [L669] havoc is_transmit4_triggered_~__retres1~4; [L325] havoc is_transmit4_triggered_~__retres1~4; [L328-L337] assume !(1 == ~t4_pc~0); [L338] is_transmit4_triggered_~__retres1~4 := 0; [L340] is_transmit4_triggered_#res := is_transmit4_triggered_~__retres1~4; [L669] activate_threads_#t~ret12 := is_transmit4_triggered_#res; [L669] activate_threads_~tmp___3~0 := activate_threads_#t~ret12; [L669] havoc activate_threads_#t~ret12; [L671-L675] assume !(0 != activate_threads_~tmp___3~0); [L574-L578] assume !(1 == ~M_E~0); [L579-L583] assume !(1 == ~T1_E~0); [L584-L588] assume !(1 == ~T2_E~0); [L589-L593] assume !(1 == ~T3_E~0); [L594-L598] assume !(1 == ~T4_E~0); [L599-L603] assume !(1 == ~E_M~0); [L604-L608] assume !(1 == ~E_1~0); [L609-L613] assume !(1 == ~E_2~0); [L614-L618] assume !(1 == ~E_3~0); [L619-L623] assume !(1 == ~E_4~0); [L805-L842] assume !false; [L808] start_simulation_~kernel_st~0 := 1; [L809] havoc eval_#t~ret2, eval_#t~nondet3, eval_~tmp_ndt_1~0, eval_#t~nondet4, eval_~tmp_ndt_2~0, eval_#t~nondet5, eval_~tmp_ndt_3~0, eval_#t~nondet6, eval_~tmp_ndt_4~0, eval_#t~nondet7, eval_~tmp_ndt_5~0, eval_~tmp~0; [L421] havoc eval_~tmp~0; [L14] ~m_pc~0 := 0; [L15] ~t1_pc~0 := 0; [L16] ~t2_pc~0 := 0; [L17] ~t3_pc~0 := 0; [L18] ~t4_pc~0 := 0; [L19] ~m_st~0 := 0; [L20] ~t1_st~0 := 0; [L21] ~t2_st~0 := 0; [L22] ~t3_st~0 := 0; [L23] ~t4_st~0 := 0; [L24] ~m_i~0 := 0; [L25] ~t1_i~0 := 0; [L26] ~t2_i~0 := 0; [L27] ~t3_i~0 := 0; [L28] ~t4_i~0 := 0; [L29] ~M_E~0 := 2; [L30] ~T1_E~0 := 2; [L31] ~T2_E~0 := 2; [L32] ~T3_E~0 := 2; [L33] ~T4_E~0 := 2; [L34] ~E_M~0 := 2; [L35] ~E_1~0 := 2; [L36] ~E_2~0 := 2; [L37] ~E_3~0 := 2; [L38] ~E_4~0 := 2; [L45] ~token~0 := 0; [L47] ~local~0 := 0; [?] havoc main_#res; [?] havoc main_~__retres1~6; [L850] havoc main_~__retres1~6; [L762] ~m_i~0 := 1; [L763] ~t1_i~0 := 1; [L764] ~t2_i~0 := 1; [L765] ~t3_i~0 := 1; [L766] ~t4_i~0 := 1; [L855] havoc start_simulation_#t~ret14, start_simulation_#t~ret15, start_simulation_~kernel_st~0, start_simulation_~tmp~3, start_simulation_~tmp___0~1; [L791] havoc start_simulation_~kernel_st~0; [L792] havoc start_simulation_~tmp~3; [L793] havoc start_simulation_~tmp___0~1; [L797] start_simulation_~kernel_st~0 := 0; [L355] COND TRUE 1 == ~m_i~0 [L356] ~m_st~0 := 0; [L360] COND TRUE 1 == ~t1_i~0 [L361] ~t1_st~0 := 0; [L365] COND TRUE 1 == ~t2_i~0 [L366] ~t2_st~0 := 0; [L370] COND TRUE 1 == ~t3_i~0 [L371] ~t3_st~0 := 0; [L375] COND TRUE 1 == ~t4_i~0 [L376] ~t4_st~0 := 0; [L516] COND FALSE !(0 == ~M_E~0) [L521] COND FALSE !(0 == ~T1_E~0) [L526] COND FALSE !(0 == ~T2_E~0) [L531] COND FALSE !(0 == ~T3_E~0) [L536] COND FALSE !(0 == ~T4_E~0) [L541] COND FALSE !(0 == ~E_M~0) [L546] COND FALSE !(0 == ~E_1~0) [L551] COND FALSE !(0 == ~E_2~0) [L556] COND FALSE !(0 == ~E_3~0) [L561] COND FALSE !(0 == ~E_4~0) [L801] havoc activate_threads_#t~ret8, activate_threads_#t~ret9, activate_threads_#t~ret10, activate_threads_#t~ret11, activate_threads_#t~ret12, activate_threads_~tmp~1, activate_threads_~tmp___0~0, activate_threads_~tmp___1~0, activate_threads_~tmp___2~0, activate_threads_~tmp___3~0; [L629] havoc activate_threads_~tmp~1; [L630] havoc activate_threads_~tmp___0~0; [L631] havoc activate_threads_~tmp___1~0; [L632] havoc activate_threads_~tmp___2~0; [L633] havoc activate_threads_~tmp___3~0; [L637] havoc is_master_triggered_#res; [L637] havoc is_master_triggered_~__retres1~0; [L249] havoc is_master_triggered_~__retres1~0; [L252] COND FALSE !(1 == ~m_pc~0) [L262] is_master_triggered_~__retres1~0 := 0; [L264] is_master_triggered_#res := is_master_triggered_~__retres1~0; [L637] activate_threads_#t~ret8 := is_master_triggered_#res; [L637] activate_threads_~tmp~1 := activate_threads_#t~ret8; [L637] havoc activate_threads_#t~ret8; [L639-L643] COND FALSE !(0 != activate_threads_~tmp~1) [L645] havoc is_transmit1_triggered_#res; [L645] havoc is_transmit1_triggered_~__retres1~1; [L268] havoc is_transmit1_triggered_~__retres1~1; [L271] COND FALSE !(1 == ~t1_pc~0) [L281] is_transmit1_triggered_~__retres1~1 := 0; [L283] is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; [L645] activate_threads_#t~ret9 := is_transmit1_triggered_#res; [L645] activate_threads_~tmp___0~0 := activate_threads_#t~ret9; [L645] havoc activate_threads_#t~ret9; [L647-L651] COND FALSE !(0 != activate_threads_~tmp___0~0) [L653] havoc is_transmit2_triggered_#res; [L653] havoc is_transmit2_triggered_~__retres1~2; [L287] havoc is_transmit2_triggered_~__retres1~2; [L290] COND FALSE !(1 == ~t2_pc~0) [L300] is_transmit2_triggered_~__retres1~2 := 0; [L302] is_transmit2_triggered_#res := is_transmit2_triggered_~__retres1~2; [L653] activate_threads_#t~ret10 := is_transmit2_triggered_#res; [L653] activate_threads_~tmp___1~0 := activate_threads_#t~ret10; [L653] havoc activate_threads_#t~ret10; [L655-L659] COND FALSE !(0 != activate_threads_~tmp___1~0) [L661] havoc is_transmit3_triggered_#res; [L661] havoc is_transmit3_triggered_~__retres1~3; [L306] havoc is_transmit3_triggered_~__retres1~3; [L309] COND FALSE !(1 == ~t3_pc~0) [L319] is_transmit3_triggered_~__retres1~3 := 0; [L321] is_transmit3_triggered_#res := is_transmit3_triggered_~__retres1~3; [L661] activate_threads_#t~ret11 := is_transmit3_triggered_#res; [L661] activate_threads_~tmp___2~0 := activate_threads_#t~ret11; [L661] havoc activate_threads_#t~ret11; [L663-L667] COND FALSE !(0 != activate_threads_~tmp___2~0) [L669] havoc is_transmit4_triggered_#res; [L669] havoc is_transmit4_triggered_~__retres1~4; [L325] havoc is_transmit4_triggered_~__retres1~4; [L328] COND FALSE !(1 == ~t4_pc~0) [L338] is_transmit4_triggered_~__retres1~4 := 0; [L340] is_transmit4_triggered_#res := is_transmit4_triggered_~__retres1~4; [L669] activate_threads_#t~ret12 := is_transmit4_triggered_#res; [L669] activate_threads_~tmp___3~0 := activate_threads_#t~ret12; [L669] havoc activate_threads_#t~ret12; [L671-L675] COND FALSE !(0 != activate_threads_~tmp___3~0) [L574] COND FALSE !(1 == ~M_E~0) [L579] COND FALSE !(1 == ~T1_E~0) [L584] COND FALSE !(1 == ~T2_E~0) [L589] COND FALSE !(1 == ~T3_E~0) [L594] COND FALSE !(1 == ~T4_E~0) [L599] COND FALSE !(1 == ~E_M~0) [L604] COND FALSE !(1 == ~E_1~0) [L609] COND FALSE !(1 == ~E_2~0) [L614] COND FALSE !(1 == ~E_3~0) [L619] COND FALSE !(1 == ~E_4~0) [L805-L842] COND FALSE !(false) [L808] start_simulation_~kernel_st~0 := 1; [L809] havoc eval_#t~ret2, eval_#t~nondet3, eval_~tmp_ndt_1~0, eval_#t~nondet4, eval_~tmp_ndt_2~0, eval_#t~nondet5, eval_~tmp_ndt_3~0, eval_#t~nondet6, eval_~tmp_ndt_4~0, eval_#t~nondet7, eval_~tmp_ndt_5~0, eval_~tmp~0; [L421] havoc eval_~tmp~0; ----- ----- class de.uni_freiburg.informatik.ultimate.boogie.procedureinliner.backtranslation.InlinerBacktranslator [L14] ~m_pc~0 := 0; [L15] ~t1_pc~0 := 0; [L16] ~t2_pc~0 := 0; [L17] ~t3_pc~0 := 0; [L18] ~t4_pc~0 := 0; [L19] ~m_st~0 := 0; [L20] ~t1_st~0 := 0; [L21] ~t2_st~0 := 0; [L22] ~t3_st~0 := 0; [L23] ~t4_st~0 := 0; [L24] ~m_i~0 := 0; [L25] ~t1_i~0 := 0; [L26] ~t2_i~0 := 0; [L27] ~t3_i~0 := 0; [L28] ~t4_i~0 := 0; [L29] ~M_E~0 := 2; [L30] ~T1_E~0 := 2; [L31] ~T2_E~0 := 2; [L32] ~T3_E~0 := 2; [L33] ~T4_E~0 := 2; [L34] ~E_M~0 := 2; [L35] ~E_1~0 := 2; [L36] ~E_2~0 := 2; [L37] ~E_3~0 := 2; [L38] ~E_4~0 := 2; [L45] ~token~0 := 0; [L47] ~local~0 := 0; [?] havoc main_#res; [?] havoc main_~__retres1~6; [L850] havoc main_~__retres1~6; [L762] ~m_i~0 := 1; [L763] ~t1_i~0 := 1; [L764] ~t2_i~0 := 1; [L765] ~t3_i~0 := 1; [L766] ~t4_i~0 := 1; [L855] havoc start_simulation_#t~ret14, start_simulation_#t~ret15, start_simulation_~kernel_st~0, start_simulation_~tmp~3, start_simulation_~tmp___0~1; [L791] havoc start_simulation_~kernel_st~0; [L792] havoc start_simulation_~tmp~3; [L793] havoc start_simulation_~tmp___0~1; [L797] start_simulation_~kernel_st~0 := 0; [L355] COND TRUE 1 == ~m_i~0 [L356] ~m_st~0 := 0; [L360] COND TRUE 1 == ~t1_i~0 [L361] ~t1_st~0 := 0; [L365] COND TRUE 1 == ~t2_i~0 [L366] ~t2_st~0 := 0; [L370] COND TRUE 1 == ~t3_i~0 [L371] ~t3_st~0 := 0; [L375] COND TRUE 1 == ~t4_i~0 [L376] ~t4_st~0 := 0; [L516] COND FALSE !(0 == ~M_E~0) [L521] COND FALSE !(0 == ~T1_E~0) [L526] COND FALSE !(0 == ~T2_E~0) [L531] COND FALSE !(0 == ~T3_E~0) [L536] COND FALSE !(0 == ~T4_E~0) [L541] COND FALSE !(0 == ~E_M~0) [L546] COND FALSE !(0 == ~E_1~0) [L551] COND FALSE !(0 == ~E_2~0) [L556] COND FALSE !(0 == ~E_3~0) [L561] COND FALSE !(0 == ~E_4~0) [L801] havoc activate_threads_#t~ret8, activate_threads_#t~ret9, activate_threads_#t~ret10, activate_threads_#t~ret11, activate_threads_#t~ret12, activate_threads_~tmp~1, activate_threads_~tmp___0~0, activate_threads_~tmp___1~0, activate_threads_~tmp___2~0, activate_threads_~tmp___3~0; [L629] havoc activate_threads_~tmp~1; [L630] havoc activate_threads_~tmp___0~0; [L631] havoc activate_threads_~tmp___1~0; [L632] havoc activate_threads_~tmp___2~0; [L633] havoc activate_threads_~tmp___3~0; [L637] havoc is_master_triggered_#res; [L637] havoc is_master_triggered_~__retres1~0; [L249] havoc is_master_triggered_~__retres1~0; [L252] COND FALSE !(1 == ~m_pc~0) [L262] is_master_triggered_~__retres1~0 := 0; [L264] is_master_triggered_#res := is_master_triggered_~__retres1~0; [L637] activate_threads_#t~ret8 := is_master_triggered_#res; [L637] activate_threads_~tmp~1 := activate_threads_#t~ret8; [L637] havoc activate_threads_#t~ret8; [L639-L643] COND FALSE !(0 != activate_threads_~tmp~1) [L645] havoc is_transmit1_triggered_#res; [L645] havoc is_transmit1_triggered_~__retres1~1; [L268] havoc is_transmit1_triggered_~__retres1~1; [L271] COND FALSE !(1 == ~t1_pc~0) [L281] is_transmit1_triggered_~__retres1~1 := 0; [L283] is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; [L645] activate_threads_#t~ret9 := is_transmit1_triggered_#res; [L645] activate_threads_~tmp___0~0 := activate_threads_#t~ret9; [L645] havoc activate_threads_#t~ret9; [L647-L651] COND FALSE !(0 != activate_threads_~tmp___0~0) [L653] havoc is_transmit2_triggered_#res; [L653] havoc is_transmit2_triggered_~__retres1~2; [L287] havoc is_transmit2_triggered_~__retres1~2; [L290] COND FALSE !(1 == ~t2_pc~0) [L300] is_transmit2_triggered_~__retres1~2 := 0; [L302] is_transmit2_triggered_#res := is_transmit2_triggered_~__retres1~2; [L653] activate_threads_#t~ret10 := is_transmit2_triggered_#res; [L653] activate_threads_~tmp___1~0 := activate_threads_#t~ret10; [L653] havoc activate_threads_#t~ret10; [L655-L659] COND FALSE !(0 != activate_threads_~tmp___1~0) [L661] havoc is_transmit3_triggered_#res; [L661] havoc is_transmit3_triggered_~__retres1~3; [L306] havoc is_transmit3_triggered_~__retres1~3; [L309] COND FALSE !(1 == ~t3_pc~0) [L319] is_transmit3_triggered_~__retres1~3 := 0; [L321] is_transmit3_triggered_#res := is_transmit3_triggered_~__retres1~3; [L661] activate_threads_#t~ret11 := is_transmit3_triggered_#res; [L661] activate_threads_~tmp___2~0 := activate_threads_#t~ret11; [L661] havoc activate_threads_#t~ret11; [L663-L667] COND FALSE !(0 != activate_threads_~tmp___2~0) [L669] havoc is_transmit4_triggered_#res; [L669] havoc is_transmit4_triggered_~__retres1~4; [L325] havoc is_transmit4_triggered_~__retres1~4; [L328] COND FALSE !(1 == ~t4_pc~0) [L338] is_transmit4_triggered_~__retres1~4 := 0; [L340] is_transmit4_triggered_#res := is_transmit4_triggered_~__retres1~4; [L669] activate_threads_#t~ret12 := is_transmit4_triggered_#res; [L669] activate_threads_~tmp___3~0 := activate_threads_#t~ret12; [L669] havoc activate_threads_#t~ret12; [L671-L675] COND FALSE !(0 != activate_threads_~tmp___3~0) [L574] COND FALSE !(1 == ~M_E~0) [L579] COND FALSE !(1 == ~T1_E~0) [L584] COND FALSE !(1 == ~T2_E~0) [L589] COND FALSE !(1 == ~T3_E~0) [L594] COND FALSE !(1 == ~T4_E~0) [L599] COND FALSE !(1 == ~E_M~0) [L604] COND FALSE !(1 == ~E_1~0) [L609] COND FALSE !(1 == ~E_2~0) [L614] COND FALSE !(1 == ~E_3~0) [L619] COND FALSE !(1 == ~E_4~0) [L805-L842] COND FALSE !(false) [L808] start_simulation_~kernel_st~0 := 1; [L809] havoc eval_#t~ret2, eval_#t~nondet3, eval_~tmp_ndt_1~0, eval_#t~nondet4, eval_~tmp_ndt_2~0, eval_#t~nondet5, eval_~tmp_ndt_3~0, eval_#t~nondet6, eval_~tmp_ndt_4~0, eval_#t~nondet7, eval_~tmp_ndt_5~0, eval_~tmp~0; [L421] havoc eval_~tmp~0; [L14] ~m_pc~0 := 0; [L15] ~t1_pc~0 := 0; [L16] ~t2_pc~0 := 0; [L17] ~t3_pc~0 := 0; [L18] ~t4_pc~0 := 0; [L19] ~m_st~0 := 0; [L20] ~t1_st~0 := 0; [L21] ~t2_st~0 := 0; [L22] ~t3_st~0 := 0; [L23] ~t4_st~0 := 0; [L24] ~m_i~0 := 0; [L25] ~t1_i~0 := 0; [L26] ~t2_i~0 := 0; [L27] ~t3_i~0 := 0; [L28] ~t4_i~0 := 0; [L29] ~M_E~0 := 2; [L30] ~T1_E~0 := 2; [L31] ~T2_E~0 := 2; [L32] ~T3_E~0 := 2; [L33] ~T4_E~0 := 2; [L34] ~E_M~0 := 2; [L35] ~E_1~0 := 2; [L36] ~E_2~0 := 2; [L37] ~E_3~0 := 2; [L38] ~E_4~0 := 2; [L45] ~token~0 := 0; [L47] ~local~0 := 0; [L850] havoc ~__retres1~6; [L762] ~m_i~0 := 1; [L763] ~t1_i~0 := 1; [L764] ~t2_i~0 := 1; [L765] ~t3_i~0 := 1; [L766] ~t4_i~0 := 1; [L791] havoc ~kernel_st~0; [L792] havoc ~tmp~3; [L793] havoc ~tmp___0~1; [L797] ~kernel_st~0 := 0; [L355] COND TRUE 1 == ~m_i~0 [L356] ~m_st~0 := 0; [L360] COND TRUE 1 == ~t1_i~0 [L361] ~t1_st~0 := 0; [L365] COND TRUE 1 == ~t2_i~0 [L366] ~t2_st~0 := 0; [L370] COND TRUE 1 == ~t3_i~0 [L371] ~t3_st~0 := 0; [L375] COND TRUE 1 == ~t4_i~0 [L376] ~t4_st~0 := 0; [L516] COND FALSE !(0 == ~M_E~0) [L521] COND FALSE !(0 == ~T1_E~0) [L526] COND FALSE !(0 == ~T2_E~0) [L531] COND FALSE !(0 == ~T3_E~0) [L536] COND FALSE !(0 == ~T4_E~0) [L541] COND FALSE !(0 == ~E_M~0) [L546] COND FALSE !(0 == ~E_1~0) [L551] COND FALSE !(0 == ~E_2~0) [L556] COND FALSE !(0 == ~E_3~0) [L561] COND FALSE !(0 == ~E_4~0) [L629] havoc ~tmp~1; [L630] havoc ~tmp___0~0; [L631] havoc ~tmp___1~0; [L632] havoc ~tmp___2~0; [L633] havoc ~tmp___3~0; [L249] havoc ~__retres1~0; [L252] COND FALSE !(1 == ~m_pc~0) [L262] ~__retres1~0 := 0; [L264] #res := ~__retres1~0; [L637] ~tmp~1 := #t~ret8; [L637] havoc #t~ret8; [L639-L643] COND FALSE !(0 != ~tmp~1) [L268] havoc ~__retres1~1; [L271] COND FALSE !(1 == ~t1_pc~0) [L281] ~__retres1~1 := 0; [L283] #res := ~__retres1~1; [L645] ~tmp___0~0 := #t~ret9; [L645] havoc #t~ret9; [L647-L651] COND FALSE !(0 != ~tmp___0~0) [L287] havoc ~__retres1~2; [L290] COND FALSE !(1 == ~t2_pc~0) [L300] ~__retres1~2 := 0; [L302] #res := ~__retres1~2; [L653] ~tmp___1~0 := #t~ret10; [L653] havoc #t~ret10; [L655-L659] COND FALSE !(0 != ~tmp___1~0) [L306] havoc ~__retres1~3; [L309] COND FALSE !(1 == ~t3_pc~0) [L319] ~__retres1~3 := 0; [L321] #res := ~__retres1~3; [L661] ~tmp___2~0 := #t~ret11; [L661] havoc #t~ret11; [L663-L667] COND FALSE !(0 != ~tmp___2~0) [L325] havoc ~__retres1~4; [L328] COND FALSE !(1 == ~t4_pc~0) [L338] ~__retres1~4 := 0; [L340] #res := ~__retres1~4; [L669] ~tmp___3~0 := #t~ret12; [L669] havoc #t~ret12; [L671-L675] COND FALSE !(0 != ~tmp___3~0) [L574] COND FALSE !(1 == ~M_E~0) [L579] COND FALSE !(1 == ~T1_E~0) [L584] COND FALSE !(1 == ~T2_E~0) [L589] COND FALSE !(1 == ~T3_E~0) [L594] COND FALSE !(1 == ~T4_E~0) [L599] COND FALSE !(1 == ~E_M~0) [L604] COND FALSE !(1 == ~E_1~0) [L609] COND FALSE !(1 == ~E_2~0) [L614] COND FALSE !(1 == ~E_3~0) [L619] COND FALSE !(1 == ~E_4~0) [L805-L842] COND FALSE !(false) [L808] ~kernel_st~0 := 1; [L421] havoc ~tmp~0; ----- ----- class de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.CACSL2BoogieBacktranslator [L14] ~m_pc~0 := 0; [L15] ~t1_pc~0 := 0; [L16] ~t2_pc~0 := 0; [L17] ~t3_pc~0 := 0; [L18] ~t4_pc~0 := 0; [L19] ~m_st~0 := 0; [L20] ~t1_st~0 := 0; [L21] ~t2_st~0 := 0; [L22] ~t3_st~0 := 0; [L23] ~t4_st~0 := 0; [L24] ~m_i~0 := 0; [L25] ~t1_i~0 := 0; [L26] ~t2_i~0 := 0; [L27] ~t3_i~0 := 0; [L28] ~t4_i~0 := 0; [L29] ~M_E~0 := 2; [L30] ~T1_E~0 := 2; [L31] ~T2_E~0 := 2; [L32] ~T3_E~0 := 2; [L33] ~T4_E~0 := 2; [L34] ~E_M~0 := 2; [L35] ~E_1~0 := 2; [L36] ~E_2~0 := 2; [L37] ~E_3~0 := 2; [L38] ~E_4~0 := 2; [L45] ~token~0 := 0; [L47] ~local~0 := 0; [L850] havoc ~__retres1~6; [L762] ~m_i~0 := 1; [L763] ~t1_i~0 := 1; [L764] ~t2_i~0 := 1; [L765] ~t3_i~0 := 1; [L766] ~t4_i~0 := 1; [L791] havoc ~kernel_st~0; [L792] havoc ~tmp~3; [L793] havoc ~tmp___0~1; [L797] ~kernel_st~0 := 0; [L355] COND TRUE 1 == ~m_i~0 [L356] ~m_st~0 := 0; [L360] COND TRUE 1 == ~t1_i~0 [L361] ~t1_st~0 := 0; [L365] COND TRUE 1 == ~t2_i~0 [L366] ~t2_st~0 := 0; [L370] COND TRUE 1 == ~t3_i~0 [L371] ~t3_st~0 := 0; [L375] COND TRUE 1 == ~t4_i~0 [L376] ~t4_st~0 := 0; [L516] COND FALSE !(0 == ~M_E~0) [L521] COND FALSE !(0 == ~T1_E~0) [L526] COND FALSE !(0 == ~T2_E~0) [L531] COND FALSE !(0 == ~T3_E~0) [L536] COND FALSE !(0 == ~T4_E~0) [L541] COND FALSE !(0 == ~E_M~0) [L546] COND FALSE !(0 == ~E_1~0) [L551] COND FALSE !(0 == ~E_2~0) [L556] COND FALSE !(0 == ~E_3~0) [L561] COND FALSE !(0 == ~E_4~0) [L629] havoc ~tmp~1; [L630] havoc ~tmp___0~0; [L631] havoc ~tmp___1~0; [L632] havoc ~tmp___2~0; [L633] havoc ~tmp___3~0; [L249] havoc ~__retres1~0; [L252] COND FALSE !(1 == ~m_pc~0) [L262] ~__retres1~0 := 0; [L264] #res := ~__retres1~0; [L637] ~tmp~1 := #t~ret8; [L637] havoc #t~ret8; [L639-L643] COND FALSE !(0 != ~tmp~1) [L268] havoc ~__retres1~1; [L271] COND FALSE !(1 == ~t1_pc~0) [L281] ~__retres1~1 := 0; [L283] #res := ~__retres1~1; [L645] ~tmp___0~0 := #t~ret9; [L645] havoc #t~ret9; [L647-L651] COND FALSE !(0 != ~tmp___0~0) [L287] havoc ~__retres1~2; [L290] COND FALSE !(1 == ~t2_pc~0) [L300] ~__retres1~2 := 0; [L302] #res := ~__retres1~2; [L653] ~tmp___1~0 := #t~ret10; [L653] havoc #t~ret10; [L655-L659] COND FALSE !(0 != ~tmp___1~0) [L306] havoc ~__retres1~3; [L309] COND FALSE !(1 == ~t3_pc~0) [L319] ~__retres1~3 := 0; [L321] #res := ~__retres1~3; [L661] ~tmp___2~0 := #t~ret11; [L661] havoc #t~ret11; [L663-L667] COND FALSE !(0 != ~tmp___2~0) [L325] havoc ~__retres1~4; [L328] COND FALSE !(1 == ~t4_pc~0) [L338] ~__retres1~4 := 0; [L340] #res := ~__retres1~4; [L669] ~tmp___3~0 := #t~ret12; [L669] havoc #t~ret12; [L671-L675] COND FALSE !(0 != ~tmp___3~0) [L574] COND FALSE !(1 == ~M_E~0) [L579] COND FALSE !(1 == ~T1_E~0) [L584] COND FALSE !(1 == ~T2_E~0) [L589] COND FALSE !(1 == ~T3_E~0) [L594] COND FALSE !(1 == ~T4_E~0) [L599] COND FALSE !(1 == ~E_M~0) [L604] COND FALSE !(1 == ~E_1~0) [L609] COND FALSE !(1 == ~E_2~0) [L614] COND FALSE !(1 == ~E_3~0) [L619] COND FALSE !(1 == ~E_4~0) [L805-L842] COND FALSE !(false) [L808] ~kernel_st~0 := 1; [L421] havoc ~tmp~0; [L14] int m_pc = 0; [L15] int t1_pc = 0; [L16] int t2_pc = 0; [L17] int t3_pc = 0; [L18] int t4_pc = 0; [L19] int m_st ; [L20] int t1_st ; [L21] int t2_st ; [L22] int t3_st ; [L23] int t4_st ; [L24] int m_i ; [L25] int t1_i ; [L26] int t2_i ; [L27] int t3_i ; [L28] int t4_i ; [L29] int M_E = 2; [L30] int T1_E = 2; [L31] int T2_E = 2; [L32] int T3_E = 2; [L33] int T4_E = 2; [L34] int E_M = 2; [L35] int E_1 = 2; [L36] int E_2 = 2; [L37] int E_3 = 2; [L38] int E_4 = 2; [L45] int token ; [L47] int local ; [L850] int __retres1 ; [L762] m_i = 1 [L763] t1_i = 1 [L764] t2_i = 1 [L765] t3_i = 1 [L766] t4_i = 1 [L791] int kernel_st ; [L792] int tmp ; [L793] int tmp___0 ; [L797] kernel_st = 0 [L355] COND TRUE m_i == 1 [L356] m_st = 0 [L360] COND TRUE t1_i == 1 [L361] t1_st = 0 [L365] COND TRUE t2_i == 1 [L366] t2_st = 0 [L370] COND TRUE t3_i == 1 [L371] t3_st = 0 [L375] COND TRUE t4_i == 1 [L376] t4_st = 0 [L516] COND FALSE !(M_E == 0) [L521] COND FALSE !(T1_E == 0) [L526] COND FALSE !(T2_E == 0) [L531] COND FALSE !(T3_E == 0) [L536] COND FALSE !(T4_E == 0) [L541] COND FALSE !(E_M == 0) [L546] COND FALSE !(E_1 == 0) [L551] COND FALSE !(E_2 == 0) [L556] COND FALSE !(E_3 == 0) [L561] COND FALSE !(E_4 == 0) [L629] int tmp ; [L630] int tmp___0 ; [L631] int tmp___1 ; [L632] int tmp___2 ; [L633] int tmp___3 ; [L249] int __retres1 ; [L252] COND FALSE !(m_pc == 1) [L262] __retres1 = 0 [L264] return (__retres1); [L637] tmp = is_master_triggered() [L639] COND FALSE !(\read(tmp)) [L268] int __retres1 ; [L271] COND FALSE !(t1_pc == 1) [L281] __retres1 = 0 [L283] return (__retres1); [L645] tmp___0 = is_transmit1_triggered() [L647] COND FALSE !(\read(tmp___0)) [L287] int __retres1 ; [L290] COND FALSE !(t2_pc == 1) [L300] __retres1 = 0 [L302] return (__retres1); [L653] tmp___1 = is_transmit2_triggered() [L655] COND FALSE !(\read(tmp___1)) [L306] int __retres1 ; [L309] COND FALSE !(t3_pc == 1) [L319] __retres1 = 0 [L321] return (__retres1); [L661] tmp___2 = is_transmit3_triggered() [L663] COND FALSE !(\read(tmp___2)) [L325] int __retres1 ; [L328] COND FALSE !(t4_pc == 1) [L338] __retres1 = 0 [L340] return (__retres1); [L669] tmp___3 = is_transmit4_triggered() [L671] COND FALSE !(\read(tmp___3)) [L574] COND FALSE !(M_E == 1) [L579] COND FALSE !(T1_E == 1) [L584] COND FALSE !(T2_E == 1) [L589] COND FALSE !(T3_E == 1) [L594] COND FALSE !(T4_E == 1) [L599] COND FALSE !(E_M == 1) [L604] COND FALSE !(E_1 == 1) [L609] COND FALSE !(E_2 == 1) [L614] COND FALSE !(E_3 == 1) [L619] COND FALSE !(E_4 == 1) [L805] COND TRUE 1 [L808] kernel_st = 1 [L421] int tmp ; ----- ----- class de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder.RCFGBacktranslator [?] assume !false; [?] havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~5;havoc exists_runnable_thread_~__retres1~5; [?] assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~5 := 1; [?] exists_runnable_thread_#res := exists_runnable_thread_~__retres1~5; [?] eval_#t~ret2 := exists_runnable_thread_#res;eval_~tmp~0 := eval_#t~ret2;havoc eval_#t~ret2; [?] assume 0 != eval_~tmp~0; [?] assume 0 == ~m_st~0;havoc eval_~tmp_ndt_1~0;eval_~tmp_ndt_1~0 := eval_#t~nondet3;havoc eval_#t~nondet3; [?] assume !(0 != eval_~tmp_ndt_1~0); [?] assume 0 == ~t1_st~0;havoc eval_~tmp_ndt_2~0;eval_~tmp_ndt_2~0 := eval_#t~nondet4;havoc eval_#t~nondet4; [?] assume !(0 != eval_~tmp_ndt_2~0); [?] assume 0 == ~t2_st~0;havoc eval_~tmp_ndt_3~0;eval_~tmp_ndt_3~0 := eval_#t~nondet5;havoc eval_#t~nondet5; [?] assume !(0 != eval_~tmp_ndt_3~0); [?] assume 0 == ~t3_st~0;havoc eval_~tmp_ndt_4~0;eval_~tmp_ndt_4~0 := eval_#t~nondet6;havoc eval_#t~nondet6; [?] assume !(0 != eval_~tmp_ndt_4~0); [?] assume 0 == ~t4_st~0;havoc eval_~tmp_ndt_5~0;eval_~tmp_ndt_5~0 := eval_#t~nondet7;havoc eval_#t~nondet7; [?] assume !(0 != eval_~tmp_ndt_5~0); [L425-L505] assume !false; [L428] havoc exists_runnable_thread_#res; [L428] havoc exists_runnable_thread_~__retres1~5; [L385] havoc exists_runnable_thread_~__retres1~5; [L388-L413] assume 0 == ~m_st~0; [L389] exists_runnable_thread_~__retres1~5 := 1; [L416] exists_runnable_thread_#res := exists_runnable_thread_~__retres1~5; [L428] eval_#t~ret2 := exists_runnable_thread_#res; [L428] eval_~tmp~0 := eval_#t~ret2; [L428] havoc eval_#t~ret2; [L430-L434] assume 0 != eval_~tmp~0; [L435-L448] assume 0 == ~m_st~0; [L436] havoc eval_~tmp_ndt_1~0; [L437] eval_~tmp_ndt_1~0 := eval_#t~nondet3; [L437] havoc eval_#t~nondet3; [L438-L445] assume !(0 != eval_~tmp_ndt_1~0); [L449-L462] assume 0 == ~t1_st~0; [L450] havoc eval_~tmp_ndt_2~0; [L451] eval_~tmp_ndt_2~0 := eval_#t~nondet4; [L451] havoc eval_#t~nondet4; [L452-L459] assume !(0 != eval_~tmp_ndt_2~0); [L463-L476] assume 0 == ~t2_st~0; [L464] havoc eval_~tmp_ndt_3~0; [L465] eval_~tmp_ndt_3~0 := eval_#t~nondet5; [L465] havoc eval_#t~nondet5; [L466-L473] assume !(0 != eval_~tmp_ndt_3~0); [L477-L490] assume 0 == ~t3_st~0; [L478] havoc eval_~tmp_ndt_4~0; [L479] eval_~tmp_ndt_4~0 := eval_#t~nondet6; [L479] havoc eval_#t~nondet6; [L480-L487] assume !(0 != eval_~tmp_ndt_4~0); [L491-L504] assume 0 == ~t4_st~0; [L492] havoc eval_~tmp_ndt_5~0; [L493] eval_~tmp_ndt_5~0 := eval_#t~nondet7; [L493] havoc eval_#t~nondet7; [L494-L501] assume !(0 != eval_~tmp_ndt_5~0); ----- ----- class de.uni_freiburg.informatik.ultimate.boogie.preprocessor.BoogiePreprocessorBacktranslator [L425-L505] assume !false; [L428] havoc exists_runnable_thread_#res; [L428] havoc exists_runnable_thread_~__retres1~5; [L385] havoc exists_runnable_thread_~__retres1~5; [L388-L413] assume 0 == ~m_st~0; [L389] exists_runnable_thread_~__retres1~5 := 1; [L416] exists_runnable_thread_#res := exists_runnable_thread_~__retres1~5; [L428] eval_#t~ret2 := exists_runnable_thread_#res; [L428] eval_~tmp~0 := eval_#t~ret2; [L428] havoc eval_#t~ret2; [L430-L434] assume 0 != eval_~tmp~0; [L435-L448] assume 0 == ~m_st~0; [L436] havoc eval_~tmp_ndt_1~0; [L437] eval_~tmp_ndt_1~0 := eval_#t~nondet3; [L437] havoc eval_#t~nondet3; [L438-L445] assume !(0 != eval_~tmp_ndt_1~0); [L449-L462] assume 0 == ~t1_st~0; [L450] havoc eval_~tmp_ndt_2~0; [L451] eval_~tmp_ndt_2~0 := eval_#t~nondet4; [L451] havoc eval_#t~nondet4; [L452-L459] assume !(0 != eval_~tmp_ndt_2~0); [L463-L476] assume 0 == ~t2_st~0; [L464] havoc eval_~tmp_ndt_3~0; [L465] eval_~tmp_ndt_3~0 := eval_#t~nondet5; [L465] havoc eval_#t~nondet5; [L466-L473] assume !(0 != eval_~tmp_ndt_3~0); [L477-L490] assume 0 == ~t3_st~0; [L478] havoc eval_~tmp_ndt_4~0; [L479] eval_~tmp_ndt_4~0 := eval_#t~nondet6; [L479] havoc eval_#t~nondet6; [L480-L487] assume !(0 != eval_~tmp_ndt_4~0); [L491-L504] assume 0 == ~t4_st~0; [L492] havoc eval_~tmp_ndt_5~0; [L493] eval_~tmp_ndt_5~0 := eval_#t~nondet7; [L493] havoc eval_#t~nondet7; [L494-L501] assume !(0 != eval_~tmp_ndt_5~0); [L425-L505] COND FALSE !(false) [L428] havoc exists_runnable_thread_#res; [L428] havoc exists_runnable_thread_~__retres1~5; [L385] havoc exists_runnable_thread_~__retres1~5; [L388] COND TRUE 0 == ~m_st~0 [L389] exists_runnable_thread_~__retres1~5 := 1; [L416] exists_runnable_thread_#res := exists_runnable_thread_~__retres1~5; [L428] eval_#t~ret2 := exists_runnable_thread_#res; [L428] eval_~tmp~0 := eval_#t~ret2; [L428] havoc eval_#t~ret2; [L430-L434] COND TRUE 0 != eval_~tmp~0 [L435] COND TRUE 0 == ~m_st~0 [L436] havoc eval_~tmp_ndt_1~0; [L437] eval_~tmp_ndt_1~0 := eval_#t~nondet3; [L437] havoc eval_#t~nondet3; [L438-L445] COND FALSE !(0 != eval_~tmp_ndt_1~0) [L449] COND TRUE 0 == ~t1_st~0 [L450] havoc eval_~tmp_ndt_2~0; [L451] eval_~tmp_ndt_2~0 := eval_#t~nondet4; [L451] havoc eval_#t~nondet4; [L452-L459] COND FALSE !(0 != eval_~tmp_ndt_2~0) [L463] COND TRUE 0 == ~t2_st~0 [L464] havoc eval_~tmp_ndt_3~0; [L465] eval_~tmp_ndt_3~0 := eval_#t~nondet5; [L465] havoc eval_#t~nondet5; [L466-L473] COND FALSE !(0 != eval_~tmp_ndt_3~0) [L477] COND TRUE 0 == ~t3_st~0 [L478] havoc eval_~tmp_ndt_4~0; [L479] eval_~tmp_ndt_4~0 := eval_#t~nondet6; [L479] havoc eval_#t~nondet6; [L480-L487] COND FALSE !(0 != eval_~tmp_ndt_4~0) [L491] COND TRUE 0 == ~t4_st~0 [L492] havoc eval_~tmp_ndt_5~0; [L493] eval_~tmp_ndt_5~0 := eval_#t~nondet7; [L493] havoc eval_#t~nondet7; [L494-L501] COND FALSE !(0 != eval_~tmp_ndt_5~0) ----- ----- class de.uni_freiburg.informatik.ultimate.boogie.procedureinliner.backtranslation.InlinerBacktranslator [L425-L505] COND FALSE !(false) [L428] havoc exists_runnable_thread_#res; [L428] havoc exists_runnable_thread_~__retres1~5; [L385] havoc exists_runnable_thread_~__retres1~5; [L388] COND TRUE 0 == ~m_st~0 [L389] exists_runnable_thread_~__retres1~5 := 1; [L416] exists_runnable_thread_#res := exists_runnable_thread_~__retres1~5; [L428] eval_#t~ret2 := exists_runnable_thread_#res; [L428] eval_~tmp~0 := eval_#t~ret2; [L428] havoc eval_#t~ret2; [L430-L434] COND TRUE 0 != eval_~tmp~0 [L435] COND TRUE 0 == ~m_st~0 [L436] havoc eval_~tmp_ndt_1~0; [L437] eval_~tmp_ndt_1~0 := eval_#t~nondet3; [L437] havoc eval_#t~nondet3; [L438-L445] COND FALSE !(0 != eval_~tmp_ndt_1~0) [L449] COND TRUE 0 == ~t1_st~0 [L450] havoc eval_~tmp_ndt_2~0; [L451] eval_~tmp_ndt_2~0 := eval_#t~nondet4; [L451] havoc eval_#t~nondet4; [L452-L459] COND FALSE !(0 != eval_~tmp_ndt_2~0) [L463] COND TRUE 0 == ~t2_st~0 [L464] havoc eval_~tmp_ndt_3~0; [L465] eval_~tmp_ndt_3~0 := eval_#t~nondet5; [L465] havoc eval_#t~nondet5; [L466-L473] COND FALSE !(0 != eval_~tmp_ndt_3~0) [L477] COND TRUE 0 == ~t3_st~0 [L478] havoc eval_~tmp_ndt_4~0; [L479] eval_~tmp_ndt_4~0 := eval_#t~nondet6; [L479] havoc eval_#t~nondet6; [L480-L487] COND FALSE !(0 != eval_~tmp_ndt_4~0) [L491] COND TRUE 0 == ~t4_st~0 [L492] havoc eval_~tmp_ndt_5~0; [L493] eval_~tmp_ndt_5~0 := eval_#t~nondet7; [L493] havoc eval_#t~nondet7; [L494-L501] COND FALSE !(0 != eval_~tmp_ndt_5~0) [L425-L505] COND FALSE !(false) [L385] havoc ~__retres1~5; [L388] COND TRUE 0 == ~m_st~0 [L389] ~__retres1~5 := 1; [L416] #res := ~__retres1~5; [L428] ~tmp~0 := #t~ret2; [L428] havoc #t~ret2; [L430-L434] COND TRUE 0 != ~tmp~0 [L435] COND TRUE 0 == ~m_st~0 [L436] havoc ~tmp_ndt_1~0; [L437] ~tmp_ndt_1~0 := #t~nondet3; [L437] havoc #t~nondet3; [L438-L445] COND FALSE !(0 != ~tmp_ndt_1~0) [L449] COND TRUE 0 == ~t1_st~0 [L450] havoc ~tmp_ndt_2~0; [L451] ~tmp_ndt_2~0 := #t~nondet4; [L451] havoc #t~nondet4; [L452-L459] COND FALSE !(0 != ~tmp_ndt_2~0) [L463] COND TRUE 0 == ~t2_st~0 [L464] havoc ~tmp_ndt_3~0; [L465] ~tmp_ndt_3~0 := #t~nondet5; [L465] havoc #t~nondet5; [L466-L473] COND FALSE !(0 != ~tmp_ndt_3~0) [L477] COND TRUE 0 == ~t3_st~0 [L478] havoc ~tmp_ndt_4~0; [L479] ~tmp_ndt_4~0 := #t~nondet6; [L479] havoc #t~nondet6; [L480-L487] COND FALSE !(0 != ~tmp_ndt_4~0) [L491] COND TRUE 0 == ~t4_st~0 [L492] havoc ~tmp_ndt_5~0; [L493] ~tmp_ndt_5~0 := #t~nondet7; [L493] havoc #t~nondet7; [L494-L501] COND FALSE !(0 != ~tmp_ndt_5~0) ----- ----- class de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.CACSL2BoogieBacktranslator [L425-L505] COND FALSE !(false) [L385] havoc ~__retres1~5; [L388] COND TRUE 0 == ~m_st~0 [L389] ~__retres1~5 := 1; [L416] #res := ~__retres1~5; [L428] ~tmp~0 := #t~ret2; [L428] havoc #t~ret2; [L430-L434] COND TRUE 0 != ~tmp~0 [L435] COND TRUE 0 == ~m_st~0 [L436] havoc ~tmp_ndt_1~0; [L437] ~tmp_ndt_1~0 := #t~nondet3; [L437] havoc #t~nondet3; [L438-L445] COND FALSE !(0 != ~tmp_ndt_1~0) [L449] COND TRUE 0 == ~t1_st~0 [L450] havoc ~tmp_ndt_2~0; [L451] ~tmp_ndt_2~0 := #t~nondet4; [L451] havoc #t~nondet4; [L452-L459] COND FALSE !(0 != ~tmp_ndt_2~0) [L463] COND TRUE 0 == ~t2_st~0 [L464] havoc ~tmp_ndt_3~0; [L465] ~tmp_ndt_3~0 := #t~nondet5; [L465] havoc #t~nondet5; [L466-L473] COND FALSE !(0 != ~tmp_ndt_3~0) [L477] COND TRUE 0 == ~t3_st~0 [L478] havoc ~tmp_ndt_4~0; [L479] ~tmp_ndt_4~0 := #t~nondet6; [L479] havoc #t~nondet6; [L480-L487] COND FALSE !(0 != ~tmp_ndt_4~0) [L491] COND TRUE 0 == ~t4_st~0 [L492] havoc ~tmp_ndt_5~0; [L493] ~tmp_ndt_5~0 := #t~nondet7; [L493] havoc #t~nondet7; [L494-L501] COND FALSE !(0 != ~tmp_ndt_5~0) [L425] COND TRUE 1 [L385] int __retres1 ; [L388] COND TRUE m_st == 0 [L389] __retres1 = 1 [L416] return (__retres1); [L428] tmp = exists_runnable_thread() [L430] COND TRUE \read(tmp) [L435] COND TRUE m_st == 0 [L436] int tmp_ndt_1; [L437] tmp_ndt_1 = __VERIFIER_nondet_int() [L438] COND FALSE !(\read(tmp_ndt_1)) [L449] COND TRUE t1_st == 0 [L450] int tmp_ndt_2; [L451] tmp_ndt_2 = __VERIFIER_nondet_int() [L452] COND FALSE !(\read(tmp_ndt_2)) [L463] COND TRUE t2_st == 0 [L464] int tmp_ndt_3; [L465] tmp_ndt_3 = __VERIFIER_nondet_int() [L466] COND FALSE !(\read(tmp_ndt_3)) [L477] COND TRUE t3_st == 0 [L478] int tmp_ndt_4; [L479] tmp_ndt_4 = __VERIFIER_nondet_int() [L480] COND FALSE !(\read(tmp_ndt_4)) [L491] COND TRUE t4_st == 0 [L492] int tmp_ndt_5; [L493] tmp_ndt_5 = __VERIFIER_nondet_int() [L494] COND FALSE !(\read(tmp_ndt_5)) ----- [2018-11-23 08:02:27,655 INFO L145 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/working_dir_345ffb2d-d467-4605-9ff5-e45eeb67a5f5/bin-2019/uautomizer/witness.graphml [2018-11-23 08:02:27,656 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2018-11-23 08:02:27,656 INFO L168 Benchmark]: Toolchain (without parser) took 8095.30 ms. Allocated memory was 1.0 GB in the beginning and 1.3 GB in the end (delta: 253.8 MB). Free memory was 955.3 MB in the beginning and 1.0 GB in the end (delta: -84.7 MB). Peak memory consumption was 169.0 MB. Max. memory is 11.5 GB. [2018-11-23 08:02:27,657 INFO L168 Benchmark]: CDTParser took 0.17 ms. Allocated memory is still 1.0 GB. Free memory is still 977.4 MB. There was no memory consumed. Max. memory is 11.5 GB. [2018-11-23 08:02:27,657 INFO L168 Benchmark]: CACSL2BoogieTranslator took 309.65 ms. Allocated memory is still 1.0 GB. Free memory was 955.3 MB in the beginning and 933.9 MB in the end (delta: 21.5 MB). Peak memory consumption was 21.5 MB. Max. memory is 11.5 GB. [2018-11-23 08:02:27,658 INFO L168 Benchmark]: Boogie Procedure Inliner took 107.60 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 136.3 MB). Free memory was 933.9 MB in the beginning and 1.1 GB in the end (delta: -197.1 MB). Peak memory consumption was 14.7 MB. Max. memory is 11.5 GB. [2018-11-23 08:02:27,658 INFO L168 Benchmark]: Boogie Preprocessor took 47.24 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2018-11-23 08:02:27,658 INFO L168 Benchmark]: RCFGBuilder took 1019.12 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 93.1 MB). Peak memory consumption was 93.1 MB. Max. memory is 11.5 GB. [2018-11-23 08:02:27,659 INFO L168 Benchmark]: BuchiAutomizer took 5925.68 ms. Allocated memory was 1.2 GB in the beginning and 1.3 GB in the end (delta: 117.4 MB). Free memory was 1.0 GB in the beginning and 1.0 GB in the end (delta: -7.6 MB). Peak memory consumption was 337.0 MB. Max. memory is 11.5 GB. [2018-11-23 08:02:27,659 INFO L168 Benchmark]: Witness Printer took 682.43 ms. Allocated memory is still 1.3 GB. Free memory was 1.0 GB in the beginning and 1.0 GB in the end (delta: 48 B). Peak memory consumption was 48 B. Max. memory is 11.5 GB. [2018-11-23 08:02:27,661 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.17 ms. Allocated memory is still 1.0 GB. Free memory is still 977.4 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 309.65 ms. Allocated memory is still 1.0 GB. Free memory was 955.3 MB in the beginning and 933.9 MB in the end (delta: 21.5 MB). Peak memory consumption was 21.5 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 107.60 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 136.3 MB). Free memory was 933.9 MB in the beginning and 1.1 GB in the end (delta: -197.1 MB). Peak memory consumption was 14.7 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 47.24 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * RCFGBuilder took 1019.12 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 93.1 MB). Peak memory consumption was 93.1 MB. Max. memory is 11.5 GB. * BuchiAutomizer took 5925.68 ms. Allocated memory was 1.2 GB in the beginning and 1.3 GB in the end (delta: 117.4 MB). Free memory was 1.0 GB in the beginning and 1.0 GB in the end (delta: -7.6 MB). Peak memory consumption was 337.0 MB. Max. memory is 11.5 GB. * Witness Printer took 682.43 ms. Allocated memory is still 1.3 GB. Free memory was 1.0 GB in the beginning and 1.0 GB in the end (delta: 48 B). Peak memory consumption was 48 B. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: Constructed decomposition of program Your program was decomposed into 20 terminating modules (20 trivial, 0 deterministic, 0 nondeterministic) and one nonterminating remainder module.20 modules have a trivial ranking function, the largest among these consists of 5 locations. The remainder module has 17883 locations. - StatisticsResult: Timing statistics BüchiAutomizer plugin needed 5.7s and 21 iterations. TraceHistogramMax:1. Analysis of lassos took 2.6s. Construction of modules took 0.6s. Büchi inclusion checks took 0.6s. Highest rank in rank-based complementation 0. Minimization of det autom 20. Minimization of nondet autom 0. Automata minimization 0.8s AutomataMinimizationTime, 20 MinimizatonAttempts, 5417 StatesRemovedByMinimization, 11 NontrivialMinimizations. Non-live state removal took 0.5s Buchi closure took 0.0s. Biggest automaton had 17883 states and ocurred in iteration 20. Nontrivial modules had stage [0, 0, 0, 0, 0]. InterpolantCoveringCapabilityFinite: 0/0 InterpolantCoveringCapabilityBuchi: 0/0 HoareTripleCheckerStatistics: 12381 SDtfs, 12325 SDslu, 8476 SDs, 0 SdLazy, 366 SolverSat, 216 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 0.6s Time LassoAnalysisResults: nont1 unkn0 SFLI4 SFLT0 conc4 concLT0 SILN1 SILU0 SILI11 SILT0 lasso0 LassoPreprocessingBenchmarks: LassoTerminationAnalysisBenchmarks: not availableLassoTerminationAnalysisBenchmarks: LassoNonterminationAnalysisSatFixpoint: 0 LassoNonterminationAnalysisSatUnbounded: 0 LassoNonterminationAnalysisUnsat: 0 LassoNonterminationAnalysisUnknown: 0 LassoNonterminationAnalysisTime: 0.0s - TerminationAnalysisResult: Nontermination possible Buchi Automizer proved that your program is nonterminating for some inputs - FixpointNonTerminationResult [Line: 425]: Nontermination argument in form of an infinite program execution. Nontermination argument in form of an infinite execution State at position 0 is {} State at position 1 is {__retres1=0, t3_st=0, token=0, org.eclipse.cdt.internal.core.dom.parser.c.CASTFunctionCallExpression@56c59dac=0, org.eclipse.cdt.internal.core.dom.parser.c.CASTFunctionCallExpression@2e42d0d1=0, tmp=1, __retres1=0, kernel_st=1, t2_st=0, t4_i=1, E_3=2, t4_pc=0, org.eclipse.cdt.internal.core.dom.parser.c.CASTFunctionCallExpression@3869739e=0, org.eclipse.cdt.internal.core.dom.parser.c.CASTFunctionCallExpression@4fc5a825=0, \result=0, E_1=2, tmp_ndt_2=0, \result=0, __retres1=0, \result=0, tmp_ndt_4=0, m_st=0, tmp___2=0, tmp___0=0, t3_pc=0, tmp=0, \result=0, __retres1=0, m_pc=0, \result=0, __retres1=0, \result=0, org.eclipse.cdt.internal.core.dom.parser.c.CASTFunctionCallExpression@a31aa7=0, T2_E=2, tmp___0=0, t1_pc=0, E_2=2, E_4=2, __retres1=1, T1_E=2, tmp_ndt_1=0, M_E=2, tmp=0, tmp_ndt_3=0, __retres1=0, t2_i=1, org.eclipse.cdt.internal.core.dom.parser.c.CASTFunctionCallExpression@77dfbab=0, T4_E=2, t3_i=1, t4_st=0, org.eclipse.cdt.internal.core.dom.parser.c.CASTFunctionCallExpression@36757a28=0, m_i=1, org.eclipse.cdt.internal.core.dom.parser.c.CASTFunctionCallExpression@43e73520=0, t1_st=0, tmp_ndt_5=0, org.eclipse.cdt.internal.core.dom.parser.c.CASTFunctionCallExpression@713134e4=0, local=0, t2_pc=0, org.eclipse.cdt.internal.core.dom.parser.c.CASTFunctionCallExpression@b055e91=0, tmp___3=0, E_M=2, tmp___1=0, T3_E=2, org.eclipse.cdt.internal.core.dom.parser.c.CASTFunctionCallExpression@498a5d8=0, t1_i=1, org.eclipse.cdt.internal.core.dom.parser.c.CASTFunctionCallExpression@1348e1fb=0, org.eclipse.cdt.internal.core.dom.parser.c.CASTFunctionCallExpression@3c495fff=0, \result=1} - StatisticsResult: NonterminationArgumentStatistics Fixpoint - NonterminatingLassoResult [Line: 425]: Nonterminating execution ----- class de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder.RCFGBacktranslator [?] ~m_pc~0 := 0;~t1_pc~0 := 0;~t2_pc~0 := 0;~t3_pc~0 := 0;~t4_pc~0 := 0;~m_st~0 := 0;~t1_st~0 := 0;~t2_st~0 := 0;~t3_st~0 := 0;~t4_st~0 := 0;~m_i~0 := 0;~t1_i~0 := 0;~t2_i~0 := 0;~t3_i~0 := 0;~t4_i~0 := 0;~M_E~0 := 2;~T1_E~0 := 2;~T2_E~0 := 2;~T3_E~0 := 2;~T4_E~0 := 2;~E_M~0 := 2;~E_1~0 := 2;~E_2~0 := 2;~E_3~0 := 2;~E_4~0 := 2;~token~0 := 0;~local~0 := 0; [?] havoc main_#res;havoc main_~__retres1~6;havoc main_~__retres1~6;~m_i~0 := 1;~t1_i~0 := 1;~t2_i~0 := 1;~t3_i~0 := 1;~t4_i~0 := 1; [?] havoc start_simulation_#t~ret14, start_simulation_#t~ret15, start_simulation_~kernel_st~0, start_simulation_~tmp~3, start_simulation_~tmp___0~1;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;havoc start_simulation_~tmp___0~1;start_simulation_~kernel_st~0 := 0; [?] assume 1 == ~m_i~0;~m_st~0 := 0; [?] assume 1 == ~t1_i~0;~t1_st~0 := 0; [?] assume 1 == ~t2_i~0;~t2_st~0 := 0; [?] assume 1 == ~t3_i~0;~t3_st~0 := 0; [?] assume 1 == ~t4_i~0;~t4_st~0 := 0; [?] assume !(0 == ~M_E~0); [?] assume !(0 == ~T1_E~0); [?] assume !(0 == ~T2_E~0); [?] assume !(0 == ~T3_E~0); [?] assume !(0 == ~T4_E~0); [?] assume !(0 == ~E_M~0); [?] assume !(0 == ~E_1~0); [?] assume !(0 == ~E_2~0); [?] assume !(0 == ~E_3~0); [?] assume !(0 == ~E_4~0); [?] havoc activate_threads_#t~ret8, activate_threads_#t~ret9, activate_threads_#t~ret10, activate_threads_#t~ret11, activate_threads_#t~ret12, activate_threads_~tmp~1, activate_threads_~tmp___0~0, activate_threads_~tmp___1~0, activate_threads_~tmp___2~0, activate_threads_~tmp___3~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc activate_threads_~tmp___1~0;havoc activate_threads_~tmp___2~0;havoc activate_threads_~tmp___3~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; [?] assume !(1 == ~m_pc~0); [?] is_master_triggered_~__retres1~0 := 0; [?] is_master_triggered_#res := is_master_triggered_~__retres1~0; [?] activate_threads_#t~ret8 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret8;havoc activate_threads_#t~ret8; [?] assume !(0 != activate_threads_~tmp~1); [?] havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; [?] assume !(1 == ~t1_pc~0); [?] is_transmit1_triggered_~__retres1~1 := 0; [?] is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; [?] activate_threads_#t~ret9 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret9;havoc activate_threads_#t~ret9; [?] assume !(0 != activate_threads_~tmp___0~0); [?] havoc is_transmit2_triggered_#res;havoc is_transmit2_triggered_~__retres1~2;havoc is_transmit2_triggered_~__retres1~2; [?] assume !(1 == ~t2_pc~0); [?] is_transmit2_triggered_~__retres1~2 := 0; [?] is_transmit2_triggered_#res := is_transmit2_triggered_~__retres1~2; [?] activate_threads_#t~ret10 := is_transmit2_triggered_#res;activate_threads_~tmp___1~0 := activate_threads_#t~ret10;havoc activate_threads_#t~ret10; [?] assume !(0 != activate_threads_~tmp___1~0); [?] havoc is_transmit3_triggered_#res;havoc is_transmit3_triggered_~__retres1~3;havoc is_transmit3_triggered_~__retres1~3; [?] assume !(1 == ~t3_pc~0); [?] is_transmit3_triggered_~__retres1~3 := 0; [?] is_transmit3_triggered_#res := is_transmit3_triggered_~__retres1~3; [?] activate_threads_#t~ret11 := is_transmit3_triggered_#res;activate_threads_~tmp___2~0 := activate_threads_#t~ret11;havoc activate_threads_#t~ret11; [?] assume !(0 != activate_threads_~tmp___2~0); [?] havoc is_transmit4_triggered_#res;havoc is_transmit4_triggered_~__retres1~4;havoc is_transmit4_triggered_~__retres1~4; [?] assume !(1 == ~t4_pc~0); [?] is_transmit4_triggered_~__retres1~4 := 0; [?] is_transmit4_triggered_#res := is_transmit4_triggered_~__retres1~4; [?] activate_threads_#t~ret12 := is_transmit4_triggered_#res;activate_threads_~tmp___3~0 := activate_threads_#t~ret12;havoc activate_threads_#t~ret12; [?] assume !(0 != activate_threads_~tmp___3~0); [?] assume !(1 == ~M_E~0); [?] assume !(1 == ~T1_E~0); [?] assume !(1 == ~T2_E~0); [?] assume !(1 == ~T3_E~0); [?] assume !(1 == ~T4_E~0); [?] assume !(1 == ~E_M~0); [?] assume !(1 == ~E_1~0); [?] assume !(1 == ~E_2~0); [?] assume !(1 == ~E_3~0); [?] assume !(1 == ~E_4~0); [?] assume !false; [?] start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret2, eval_#t~nondet3, eval_~tmp_ndt_1~0, eval_#t~nondet4, eval_~tmp_ndt_2~0, eval_#t~nondet5, eval_~tmp_ndt_3~0, eval_#t~nondet6, eval_~tmp_ndt_4~0, eval_#t~nondet7, eval_~tmp_ndt_5~0, eval_~tmp~0;havoc eval_~tmp~0; [L14] ~m_pc~0 := 0; [L15] ~t1_pc~0 := 0; [L16] ~t2_pc~0 := 0; [L17] ~t3_pc~0 := 0; [L18] ~t4_pc~0 := 0; [L19] ~m_st~0 := 0; [L20] ~t1_st~0 := 0; [L21] ~t2_st~0 := 0; [L22] ~t3_st~0 := 0; [L23] ~t4_st~0 := 0; [L24] ~m_i~0 := 0; [L25] ~t1_i~0 := 0; [L26] ~t2_i~0 := 0; [L27] ~t3_i~0 := 0; [L28] ~t4_i~0 := 0; [L29] ~M_E~0 := 2; [L30] ~T1_E~0 := 2; [L31] ~T2_E~0 := 2; [L32] ~T3_E~0 := 2; [L33] ~T4_E~0 := 2; [L34] ~E_M~0 := 2; [L35] ~E_1~0 := 2; [L36] ~E_2~0 := 2; [L37] ~E_3~0 := 2; [L38] ~E_4~0 := 2; [L45] ~token~0 := 0; [L47] ~local~0 := 0; [?] havoc main_#res; [?] havoc main_~__retres1~6; [L850] havoc main_~__retres1~6; [L762] ~m_i~0 := 1; [L763] ~t1_i~0 := 1; [L764] ~t2_i~0 := 1; [L765] ~t3_i~0 := 1; [L766] ~t4_i~0 := 1; [L855] havoc start_simulation_#t~ret14, start_simulation_#t~ret15, start_simulation_~kernel_st~0, start_simulation_~tmp~3, start_simulation_~tmp___0~1; [L791] havoc start_simulation_~kernel_st~0; [L792] havoc start_simulation_~tmp~3; [L793] havoc start_simulation_~tmp___0~1; [L797] start_simulation_~kernel_st~0 := 0; [L355-L359] assume 1 == ~m_i~0; [L356] ~m_st~0 := 0; [L360-L364] assume 1 == ~t1_i~0; [L361] ~t1_st~0 := 0; [L365-L369] assume 1 == ~t2_i~0; [L366] ~t2_st~0 := 0; [L370-L374] assume 1 == ~t3_i~0; [L371] ~t3_st~0 := 0; [L375-L379] assume 1 == ~t4_i~0; [L376] ~t4_st~0 := 0; [L516-L520] assume !(0 == ~M_E~0); [L521-L525] assume !(0 == ~T1_E~0); [L526-L530] assume !(0 == ~T2_E~0); [L531-L535] assume !(0 == ~T3_E~0); [L536-L540] assume !(0 == ~T4_E~0); [L541-L545] assume !(0 == ~E_M~0); [L546-L550] assume !(0 == ~E_1~0); [L551-L555] assume !(0 == ~E_2~0); [L556-L560] assume !(0 == ~E_3~0); [L561-L565] assume !(0 == ~E_4~0); [L801] havoc activate_threads_#t~ret8, activate_threads_#t~ret9, activate_threads_#t~ret10, activate_threads_#t~ret11, activate_threads_#t~ret12, activate_threads_~tmp~1, activate_threads_~tmp___0~0, activate_threads_~tmp___1~0, activate_threads_~tmp___2~0, activate_threads_~tmp___3~0; [L629] havoc activate_threads_~tmp~1; [L630] havoc activate_threads_~tmp___0~0; [L631] havoc activate_threads_~tmp___1~0; [L632] havoc activate_threads_~tmp___2~0; [L633] havoc activate_threads_~tmp___3~0; [L637] havoc is_master_triggered_#res; [L637] havoc is_master_triggered_~__retres1~0; [L249] havoc is_master_triggered_~__retres1~0; [L252-L261] assume !(1 == ~m_pc~0); [L262] is_master_triggered_~__retres1~0 := 0; [L264] is_master_triggered_#res := is_master_triggered_~__retres1~0; [L637] activate_threads_#t~ret8 := is_master_triggered_#res; [L637] activate_threads_~tmp~1 := activate_threads_#t~ret8; [L637] havoc activate_threads_#t~ret8; [L639-L643] assume !(0 != activate_threads_~tmp~1); [L645] havoc is_transmit1_triggered_#res; [L645] havoc is_transmit1_triggered_~__retres1~1; [L268] havoc is_transmit1_triggered_~__retres1~1; [L271-L280] assume !(1 == ~t1_pc~0); [L281] is_transmit1_triggered_~__retres1~1 := 0; [L283] is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; [L645] activate_threads_#t~ret9 := is_transmit1_triggered_#res; [L645] activate_threads_~tmp___0~0 := activate_threads_#t~ret9; [L645] havoc activate_threads_#t~ret9; [L647-L651] assume !(0 != activate_threads_~tmp___0~0); [L653] havoc is_transmit2_triggered_#res; [L653] havoc is_transmit2_triggered_~__retres1~2; [L287] havoc is_transmit2_triggered_~__retres1~2; [L290-L299] assume !(1 == ~t2_pc~0); [L300] is_transmit2_triggered_~__retres1~2 := 0; [L302] is_transmit2_triggered_#res := is_transmit2_triggered_~__retres1~2; [L653] activate_threads_#t~ret10 := is_transmit2_triggered_#res; [L653] activate_threads_~tmp___1~0 := activate_threads_#t~ret10; [L653] havoc activate_threads_#t~ret10; [L655-L659] assume !(0 != activate_threads_~tmp___1~0); [L661] havoc is_transmit3_triggered_#res; [L661] havoc is_transmit3_triggered_~__retres1~3; [L306] havoc is_transmit3_triggered_~__retres1~3; [L309-L318] assume !(1 == ~t3_pc~0); [L319] is_transmit3_triggered_~__retres1~3 := 0; [L321] is_transmit3_triggered_#res := is_transmit3_triggered_~__retres1~3; [L661] activate_threads_#t~ret11 := is_transmit3_triggered_#res; [L661] activate_threads_~tmp___2~0 := activate_threads_#t~ret11; [L661] havoc activate_threads_#t~ret11; [L663-L667] assume !(0 != activate_threads_~tmp___2~0); [L669] havoc is_transmit4_triggered_#res; [L669] havoc is_transmit4_triggered_~__retres1~4; [L325] havoc is_transmit4_triggered_~__retres1~4; [L328-L337] assume !(1 == ~t4_pc~0); [L338] is_transmit4_triggered_~__retres1~4 := 0; [L340] is_transmit4_triggered_#res := is_transmit4_triggered_~__retres1~4; [L669] activate_threads_#t~ret12 := is_transmit4_triggered_#res; [L669] activate_threads_~tmp___3~0 := activate_threads_#t~ret12; [L669] havoc activate_threads_#t~ret12; [L671-L675] assume !(0 != activate_threads_~tmp___3~0); [L574-L578] assume !(1 == ~M_E~0); [L579-L583] assume !(1 == ~T1_E~0); [L584-L588] assume !(1 == ~T2_E~0); [L589-L593] assume !(1 == ~T3_E~0); [L594-L598] assume !(1 == ~T4_E~0); [L599-L603] assume !(1 == ~E_M~0); [L604-L608] assume !(1 == ~E_1~0); [L609-L613] assume !(1 == ~E_2~0); [L614-L618] assume !(1 == ~E_3~0); [L619-L623] assume !(1 == ~E_4~0); [L805-L842] assume !false; [L808] start_simulation_~kernel_st~0 := 1; [L809] havoc eval_#t~ret2, eval_#t~nondet3, eval_~tmp_ndt_1~0, eval_#t~nondet4, eval_~tmp_ndt_2~0, eval_#t~nondet5, eval_~tmp_ndt_3~0, eval_#t~nondet6, eval_~tmp_ndt_4~0, eval_#t~nondet7, eval_~tmp_ndt_5~0, eval_~tmp~0; [L421] havoc eval_~tmp~0; ----- ----- class de.uni_freiburg.informatik.ultimate.boogie.preprocessor.BoogiePreprocessorBacktranslator [L14] ~m_pc~0 := 0; [L15] ~t1_pc~0 := 0; [L16] ~t2_pc~0 := 0; [L17] ~t3_pc~0 := 0; [L18] ~t4_pc~0 := 0; [L19] ~m_st~0 := 0; [L20] ~t1_st~0 := 0; [L21] ~t2_st~0 := 0; [L22] ~t3_st~0 := 0; [L23] ~t4_st~0 := 0; [L24] ~m_i~0 := 0; [L25] ~t1_i~0 := 0; [L26] ~t2_i~0 := 0; [L27] ~t3_i~0 := 0; [L28] ~t4_i~0 := 0; [L29] ~M_E~0 := 2; [L30] ~T1_E~0 := 2; [L31] ~T2_E~0 := 2; [L32] ~T3_E~0 := 2; [L33] ~T4_E~0 := 2; [L34] ~E_M~0 := 2; [L35] ~E_1~0 := 2; [L36] ~E_2~0 := 2; [L37] ~E_3~0 := 2; [L38] ~E_4~0 := 2; [L45] ~token~0 := 0; [L47] ~local~0 := 0; [?] havoc main_#res; [?] havoc main_~__retres1~6; [L850] havoc main_~__retres1~6; [L762] ~m_i~0 := 1; [L763] ~t1_i~0 := 1; [L764] ~t2_i~0 := 1; [L765] ~t3_i~0 := 1; [L766] ~t4_i~0 := 1; [L855] havoc start_simulation_#t~ret14, start_simulation_#t~ret15, start_simulation_~kernel_st~0, start_simulation_~tmp~3, start_simulation_~tmp___0~1; [L791] havoc start_simulation_~kernel_st~0; [L792] havoc start_simulation_~tmp~3; [L793] havoc start_simulation_~tmp___0~1; [L797] start_simulation_~kernel_st~0 := 0; [L355-L359] assume 1 == ~m_i~0; [L356] ~m_st~0 := 0; [L360-L364] assume 1 == ~t1_i~0; [L361] ~t1_st~0 := 0; [L365-L369] assume 1 == ~t2_i~0; [L366] ~t2_st~0 := 0; [L370-L374] assume 1 == ~t3_i~0; [L371] ~t3_st~0 := 0; [L375-L379] assume 1 == ~t4_i~0; [L376] ~t4_st~0 := 0; [L516-L520] assume !(0 == ~M_E~0); [L521-L525] assume !(0 == ~T1_E~0); [L526-L530] assume !(0 == ~T2_E~0); [L531-L535] assume !(0 == ~T3_E~0); [L536-L540] assume !(0 == ~T4_E~0); [L541-L545] assume !(0 == ~E_M~0); [L546-L550] assume !(0 == ~E_1~0); [L551-L555] assume !(0 == ~E_2~0); [L556-L560] assume !(0 == ~E_3~0); [L561-L565] assume !(0 == ~E_4~0); [L801] havoc activate_threads_#t~ret8, activate_threads_#t~ret9, activate_threads_#t~ret10, activate_threads_#t~ret11, activate_threads_#t~ret12, activate_threads_~tmp~1, activate_threads_~tmp___0~0, activate_threads_~tmp___1~0, activate_threads_~tmp___2~0, activate_threads_~tmp___3~0; [L629] havoc activate_threads_~tmp~1; [L630] havoc activate_threads_~tmp___0~0; [L631] havoc activate_threads_~tmp___1~0; [L632] havoc activate_threads_~tmp___2~0; [L633] havoc activate_threads_~tmp___3~0; [L637] havoc is_master_triggered_#res; [L637] havoc is_master_triggered_~__retres1~0; [L249] havoc is_master_triggered_~__retres1~0; [L252-L261] assume !(1 == ~m_pc~0); [L262] is_master_triggered_~__retres1~0 := 0; [L264] is_master_triggered_#res := is_master_triggered_~__retres1~0; [L637] activate_threads_#t~ret8 := is_master_triggered_#res; [L637] activate_threads_~tmp~1 := activate_threads_#t~ret8; [L637] havoc activate_threads_#t~ret8; [L639-L643] assume !(0 != activate_threads_~tmp~1); [L645] havoc is_transmit1_triggered_#res; [L645] havoc is_transmit1_triggered_~__retres1~1; [L268] havoc is_transmit1_triggered_~__retres1~1; [L271-L280] assume !(1 == ~t1_pc~0); [L281] is_transmit1_triggered_~__retres1~1 := 0; [L283] is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; [L645] activate_threads_#t~ret9 := is_transmit1_triggered_#res; [L645] activate_threads_~tmp___0~0 := activate_threads_#t~ret9; [L645] havoc activate_threads_#t~ret9; [L647-L651] assume !(0 != activate_threads_~tmp___0~0); [L653] havoc is_transmit2_triggered_#res; [L653] havoc is_transmit2_triggered_~__retres1~2; [L287] havoc is_transmit2_triggered_~__retres1~2; [L290-L299] assume !(1 == ~t2_pc~0); [L300] is_transmit2_triggered_~__retres1~2 := 0; [L302] is_transmit2_triggered_#res := is_transmit2_triggered_~__retres1~2; [L653] activate_threads_#t~ret10 := is_transmit2_triggered_#res; [L653] activate_threads_~tmp___1~0 := activate_threads_#t~ret10; [L653] havoc activate_threads_#t~ret10; [L655-L659] assume !(0 != activate_threads_~tmp___1~0); [L661] havoc is_transmit3_triggered_#res; [L661] havoc is_transmit3_triggered_~__retres1~3; [L306] havoc is_transmit3_triggered_~__retres1~3; [L309-L318] assume !(1 == ~t3_pc~0); [L319] is_transmit3_triggered_~__retres1~3 := 0; [L321] is_transmit3_triggered_#res := is_transmit3_triggered_~__retres1~3; [L661] activate_threads_#t~ret11 := is_transmit3_triggered_#res; [L661] activate_threads_~tmp___2~0 := activate_threads_#t~ret11; [L661] havoc activate_threads_#t~ret11; [L663-L667] assume !(0 != activate_threads_~tmp___2~0); [L669] havoc is_transmit4_triggered_#res; [L669] havoc is_transmit4_triggered_~__retres1~4; [L325] havoc is_transmit4_triggered_~__retres1~4; [L328-L337] assume !(1 == ~t4_pc~0); [L338] is_transmit4_triggered_~__retres1~4 := 0; [L340] is_transmit4_triggered_#res := is_transmit4_triggered_~__retres1~4; [L669] activate_threads_#t~ret12 := is_transmit4_triggered_#res; [L669] activate_threads_~tmp___3~0 := activate_threads_#t~ret12; [L669] havoc activate_threads_#t~ret12; [L671-L675] assume !(0 != activate_threads_~tmp___3~0); [L574-L578] assume !(1 == ~M_E~0); [L579-L583] assume !(1 == ~T1_E~0); [L584-L588] assume !(1 == ~T2_E~0); [L589-L593] assume !(1 == ~T3_E~0); [L594-L598] assume !(1 == ~T4_E~0); [L599-L603] assume !(1 == ~E_M~0); [L604-L608] assume !(1 == ~E_1~0); [L609-L613] assume !(1 == ~E_2~0); [L614-L618] assume !(1 == ~E_3~0); [L619-L623] assume !(1 == ~E_4~0); [L805-L842] assume !false; [L808] start_simulation_~kernel_st~0 := 1; [L809] havoc eval_#t~ret2, eval_#t~nondet3, eval_~tmp_ndt_1~0, eval_#t~nondet4, eval_~tmp_ndt_2~0, eval_#t~nondet5, eval_~tmp_ndt_3~0, eval_#t~nondet6, eval_~tmp_ndt_4~0, eval_#t~nondet7, eval_~tmp_ndt_5~0, eval_~tmp~0; [L421] havoc eval_~tmp~0; [L14] ~m_pc~0 := 0; [L15] ~t1_pc~0 := 0; [L16] ~t2_pc~0 := 0; [L17] ~t3_pc~0 := 0; [L18] ~t4_pc~0 := 0; [L19] ~m_st~0 := 0; [L20] ~t1_st~0 := 0; [L21] ~t2_st~0 := 0; [L22] ~t3_st~0 := 0; [L23] ~t4_st~0 := 0; [L24] ~m_i~0 := 0; [L25] ~t1_i~0 := 0; [L26] ~t2_i~0 := 0; [L27] ~t3_i~0 := 0; [L28] ~t4_i~0 := 0; [L29] ~M_E~0 := 2; [L30] ~T1_E~0 := 2; [L31] ~T2_E~0 := 2; [L32] ~T3_E~0 := 2; [L33] ~T4_E~0 := 2; [L34] ~E_M~0 := 2; [L35] ~E_1~0 := 2; [L36] ~E_2~0 := 2; [L37] ~E_3~0 := 2; [L38] ~E_4~0 := 2; [L45] ~token~0 := 0; [L47] ~local~0 := 0; [?] havoc main_#res; [?] havoc main_~__retres1~6; [L850] havoc main_~__retres1~6; [L762] ~m_i~0 := 1; [L763] ~t1_i~0 := 1; [L764] ~t2_i~0 := 1; [L765] ~t3_i~0 := 1; [L766] ~t4_i~0 := 1; [L855] havoc start_simulation_#t~ret14, start_simulation_#t~ret15, start_simulation_~kernel_st~0, start_simulation_~tmp~3, start_simulation_~tmp___0~1; [L791] havoc start_simulation_~kernel_st~0; [L792] havoc start_simulation_~tmp~3; [L793] havoc start_simulation_~tmp___0~1; [L797] start_simulation_~kernel_st~0 := 0; [L355] COND TRUE 1 == ~m_i~0 [L356] ~m_st~0 := 0; [L360] COND TRUE 1 == ~t1_i~0 [L361] ~t1_st~0 := 0; [L365] COND TRUE 1 == ~t2_i~0 [L366] ~t2_st~0 := 0; [L370] COND TRUE 1 == ~t3_i~0 [L371] ~t3_st~0 := 0; [L375] COND TRUE 1 == ~t4_i~0 [L376] ~t4_st~0 := 0; [L516] COND FALSE !(0 == ~M_E~0) [L521] COND FALSE !(0 == ~T1_E~0) [L526] COND FALSE !(0 == ~T2_E~0) [L531] COND FALSE !(0 == ~T3_E~0) [L536] COND FALSE !(0 == ~T4_E~0) [L541] COND FALSE !(0 == ~E_M~0) [L546] COND FALSE !(0 == ~E_1~0) [L551] COND FALSE !(0 == ~E_2~0) [L556] COND FALSE !(0 == ~E_3~0) [L561] COND FALSE !(0 == ~E_4~0) [L801] havoc activate_threads_#t~ret8, activate_threads_#t~ret9, activate_threads_#t~ret10, activate_threads_#t~ret11, activate_threads_#t~ret12, activate_threads_~tmp~1, activate_threads_~tmp___0~0, activate_threads_~tmp___1~0, activate_threads_~tmp___2~0, activate_threads_~tmp___3~0; [L629] havoc activate_threads_~tmp~1; [L630] havoc activate_threads_~tmp___0~0; [L631] havoc activate_threads_~tmp___1~0; [L632] havoc activate_threads_~tmp___2~0; [L633] havoc activate_threads_~tmp___3~0; [L637] havoc is_master_triggered_#res; [L637] havoc is_master_triggered_~__retres1~0; [L249] havoc is_master_triggered_~__retres1~0; [L252] COND FALSE !(1 == ~m_pc~0) [L262] is_master_triggered_~__retres1~0 := 0; [L264] is_master_triggered_#res := is_master_triggered_~__retres1~0; [L637] activate_threads_#t~ret8 := is_master_triggered_#res; [L637] activate_threads_~tmp~1 := activate_threads_#t~ret8; [L637] havoc activate_threads_#t~ret8; [L639-L643] COND FALSE !(0 != activate_threads_~tmp~1) [L645] havoc is_transmit1_triggered_#res; [L645] havoc is_transmit1_triggered_~__retres1~1; [L268] havoc is_transmit1_triggered_~__retres1~1; [L271] COND FALSE !(1 == ~t1_pc~0) [L281] is_transmit1_triggered_~__retres1~1 := 0; [L283] is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; [L645] activate_threads_#t~ret9 := is_transmit1_triggered_#res; [L645] activate_threads_~tmp___0~0 := activate_threads_#t~ret9; [L645] havoc activate_threads_#t~ret9; [L647-L651] COND FALSE !(0 != activate_threads_~tmp___0~0) [L653] havoc is_transmit2_triggered_#res; [L653] havoc is_transmit2_triggered_~__retres1~2; [L287] havoc is_transmit2_triggered_~__retres1~2; [L290] COND FALSE !(1 == ~t2_pc~0) [L300] is_transmit2_triggered_~__retres1~2 := 0; [L302] is_transmit2_triggered_#res := is_transmit2_triggered_~__retres1~2; [L653] activate_threads_#t~ret10 := is_transmit2_triggered_#res; [L653] activate_threads_~tmp___1~0 := activate_threads_#t~ret10; [L653] havoc activate_threads_#t~ret10; [L655-L659] COND FALSE !(0 != activate_threads_~tmp___1~0) [L661] havoc is_transmit3_triggered_#res; [L661] havoc is_transmit3_triggered_~__retres1~3; [L306] havoc is_transmit3_triggered_~__retres1~3; [L309] COND FALSE !(1 == ~t3_pc~0) [L319] is_transmit3_triggered_~__retres1~3 := 0; [L321] is_transmit3_triggered_#res := is_transmit3_triggered_~__retres1~3; [L661] activate_threads_#t~ret11 := is_transmit3_triggered_#res; [L661] activate_threads_~tmp___2~0 := activate_threads_#t~ret11; [L661] havoc activate_threads_#t~ret11; [L663-L667] COND FALSE !(0 != activate_threads_~tmp___2~0) [L669] havoc is_transmit4_triggered_#res; [L669] havoc is_transmit4_triggered_~__retres1~4; [L325] havoc is_transmit4_triggered_~__retres1~4; [L328] COND FALSE !(1 == ~t4_pc~0) [L338] is_transmit4_triggered_~__retres1~4 := 0; [L340] is_transmit4_triggered_#res := is_transmit4_triggered_~__retres1~4; [L669] activate_threads_#t~ret12 := is_transmit4_triggered_#res; [L669] activate_threads_~tmp___3~0 := activate_threads_#t~ret12; [L669] havoc activate_threads_#t~ret12; [L671-L675] COND FALSE !(0 != activate_threads_~tmp___3~0) [L574] COND FALSE !(1 == ~M_E~0) [L579] COND FALSE !(1 == ~T1_E~0) [L584] COND FALSE !(1 == ~T2_E~0) [L589] COND FALSE !(1 == ~T3_E~0) [L594] COND FALSE !(1 == ~T4_E~0) [L599] COND FALSE !(1 == ~E_M~0) [L604] COND FALSE !(1 == ~E_1~0) [L609] COND FALSE !(1 == ~E_2~0) [L614] COND FALSE !(1 == ~E_3~0) [L619] COND FALSE !(1 == ~E_4~0) [L805-L842] COND FALSE !(false) [L808] start_simulation_~kernel_st~0 := 1; [L809] havoc eval_#t~ret2, eval_#t~nondet3, eval_~tmp_ndt_1~0, eval_#t~nondet4, eval_~tmp_ndt_2~0, eval_#t~nondet5, eval_~tmp_ndt_3~0, eval_#t~nondet6, eval_~tmp_ndt_4~0, eval_#t~nondet7, eval_~tmp_ndt_5~0, eval_~tmp~0; [L421] havoc eval_~tmp~0; ----- ----- class de.uni_freiburg.informatik.ultimate.boogie.procedureinliner.backtranslation.InlinerBacktranslator [L14] ~m_pc~0 := 0; [L15] ~t1_pc~0 := 0; [L16] ~t2_pc~0 := 0; [L17] ~t3_pc~0 := 0; [L18] ~t4_pc~0 := 0; [L19] ~m_st~0 := 0; [L20] ~t1_st~0 := 0; [L21] ~t2_st~0 := 0; [L22] ~t3_st~0 := 0; [L23] ~t4_st~0 := 0; [L24] ~m_i~0 := 0; [L25] ~t1_i~0 := 0; [L26] ~t2_i~0 := 0; [L27] ~t3_i~0 := 0; [L28] ~t4_i~0 := 0; [L29] ~M_E~0 := 2; [L30] ~T1_E~0 := 2; [L31] ~T2_E~0 := 2; [L32] ~T3_E~0 := 2; [L33] ~T4_E~0 := 2; [L34] ~E_M~0 := 2; [L35] ~E_1~0 := 2; [L36] ~E_2~0 := 2; [L37] ~E_3~0 := 2; [L38] ~E_4~0 := 2; [L45] ~token~0 := 0; [L47] ~local~0 := 0; [?] havoc main_#res; [?] havoc main_~__retres1~6; [L850] havoc main_~__retres1~6; [L762] ~m_i~0 := 1; [L763] ~t1_i~0 := 1; [L764] ~t2_i~0 := 1; [L765] ~t3_i~0 := 1; [L766] ~t4_i~0 := 1; [L855] havoc start_simulation_#t~ret14, start_simulation_#t~ret15, start_simulation_~kernel_st~0, start_simulation_~tmp~3, start_simulation_~tmp___0~1; [L791] havoc start_simulation_~kernel_st~0; [L792] havoc start_simulation_~tmp~3; [L793] havoc start_simulation_~tmp___0~1; [L797] start_simulation_~kernel_st~0 := 0; [L355] COND TRUE 1 == ~m_i~0 [L356] ~m_st~0 := 0; [L360] COND TRUE 1 == ~t1_i~0 [L361] ~t1_st~0 := 0; [L365] COND TRUE 1 == ~t2_i~0 [L366] ~t2_st~0 := 0; [L370] COND TRUE 1 == ~t3_i~0 [L371] ~t3_st~0 := 0; [L375] COND TRUE 1 == ~t4_i~0 [L376] ~t4_st~0 := 0; [L516] COND FALSE !(0 == ~M_E~0) [L521] COND FALSE !(0 == ~T1_E~0) [L526] COND FALSE !(0 == ~T2_E~0) [L531] COND FALSE !(0 == ~T3_E~0) [L536] COND FALSE !(0 == ~T4_E~0) [L541] COND FALSE !(0 == ~E_M~0) [L546] COND FALSE !(0 == ~E_1~0) [L551] COND FALSE !(0 == ~E_2~0) [L556] COND FALSE !(0 == ~E_3~0) [L561] COND FALSE !(0 == ~E_4~0) [L801] havoc activate_threads_#t~ret8, activate_threads_#t~ret9, activate_threads_#t~ret10, activate_threads_#t~ret11, activate_threads_#t~ret12, activate_threads_~tmp~1, activate_threads_~tmp___0~0, activate_threads_~tmp___1~0, activate_threads_~tmp___2~0, activate_threads_~tmp___3~0; [L629] havoc activate_threads_~tmp~1; [L630] havoc activate_threads_~tmp___0~0; [L631] havoc activate_threads_~tmp___1~0; [L632] havoc activate_threads_~tmp___2~0; [L633] havoc activate_threads_~tmp___3~0; [L637] havoc is_master_triggered_#res; [L637] havoc is_master_triggered_~__retres1~0; [L249] havoc is_master_triggered_~__retres1~0; [L252] COND FALSE !(1 == ~m_pc~0) [L262] is_master_triggered_~__retres1~0 := 0; [L264] is_master_triggered_#res := is_master_triggered_~__retres1~0; [L637] activate_threads_#t~ret8 := is_master_triggered_#res; [L637] activate_threads_~tmp~1 := activate_threads_#t~ret8; [L637] havoc activate_threads_#t~ret8; [L639-L643] COND FALSE !(0 != activate_threads_~tmp~1) [L645] havoc is_transmit1_triggered_#res; [L645] havoc is_transmit1_triggered_~__retres1~1; [L268] havoc is_transmit1_triggered_~__retres1~1; [L271] COND FALSE !(1 == ~t1_pc~0) [L281] is_transmit1_triggered_~__retres1~1 := 0; [L283] is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; [L645] activate_threads_#t~ret9 := is_transmit1_triggered_#res; [L645] activate_threads_~tmp___0~0 := activate_threads_#t~ret9; [L645] havoc activate_threads_#t~ret9; [L647-L651] COND FALSE !(0 != activate_threads_~tmp___0~0) [L653] havoc is_transmit2_triggered_#res; [L653] havoc is_transmit2_triggered_~__retres1~2; [L287] havoc is_transmit2_triggered_~__retres1~2; [L290] COND FALSE !(1 == ~t2_pc~0) [L300] is_transmit2_triggered_~__retres1~2 := 0; [L302] is_transmit2_triggered_#res := is_transmit2_triggered_~__retres1~2; [L653] activate_threads_#t~ret10 := is_transmit2_triggered_#res; [L653] activate_threads_~tmp___1~0 := activate_threads_#t~ret10; [L653] havoc activate_threads_#t~ret10; [L655-L659] COND FALSE !(0 != activate_threads_~tmp___1~0) [L661] havoc is_transmit3_triggered_#res; [L661] havoc is_transmit3_triggered_~__retres1~3; [L306] havoc is_transmit3_triggered_~__retres1~3; [L309] COND FALSE !(1 == ~t3_pc~0) [L319] is_transmit3_triggered_~__retres1~3 := 0; [L321] is_transmit3_triggered_#res := is_transmit3_triggered_~__retres1~3; [L661] activate_threads_#t~ret11 := is_transmit3_triggered_#res; [L661] activate_threads_~tmp___2~0 := activate_threads_#t~ret11; [L661] havoc activate_threads_#t~ret11; [L663-L667] COND FALSE !(0 != activate_threads_~tmp___2~0) [L669] havoc is_transmit4_triggered_#res; [L669] havoc is_transmit4_triggered_~__retres1~4; [L325] havoc is_transmit4_triggered_~__retres1~4; [L328] COND FALSE !(1 == ~t4_pc~0) [L338] is_transmit4_triggered_~__retres1~4 := 0; [L340] is_transmit4_triggered_#res := is_transmit4_triggered_~__retres1~4; [L669] activate_threads_#t~ret12 := is_transmit4_triggered_#res; [L669] activate_threads_~tmp___3~0 := activate_threads_#t~ret12; [L669] havoc activate_threads_#t~ret12; [L671-L675] COND FALSE !(0 != activate_threads_~tmp___3~0) [L574] COND FALSE !(1 == ~M_E~0) [L579] COND FALSE !(1 == ~T1_E~0) [L584] COND FALSE !(1 == ~T2_E~0) [L589] COND FALSE !(1 == ~T3_E~0) [L594] COND FALSE !(1 == ~T4_E~0) [L599] COND FALSE !(1 == ~E_M~0) [L604] COND FALSE !(1 == ~E_1~0) [L609] COND FALSE !(1 == ~E_2~0) [L614] COND FALSE !(1 == ~E_3~0) [L619] COND FALSE !(1 == ~E_4~0) [L805-L842] COND FALSE !(false) [L808] start_simulation_~kernel_st~0 := 1; [L809] havoc eval_#t~ret2, eval_#t~nondet3, eval_~tmp_ndt_1~0, eval_#t~nondet4, eval_~tmp_ndt_2~0, eval_#t~nondet5, eval_~tmp_ndt_3~0, eval_#t~nondet6, eval_~tmp_ndt_4~0, eval_#t~nondet7, eval_~tmp_ndt_5~0, eval_~tmp~0; [L421] havoc eval_~tmp~0; [L14] ~m_pc~0 := 0; [L15] ~t1_pc~0 := 0; [L16] ~t2_pc~0 := 0; [L17] ~t3_pc~0 := 0; [L18] ~t4_pc~0 := 0; [L19] ~m_st~0 := 0; [L20] ~t1_st~0 := 0; [L21] ~t2_st~0 := 0; [L22] ~t3_st~0 := 0; [L23] ~t4_st~0 := 0; [L24] ~m_i~0 := 0; [L25] ~t1_i~0 := 0; [L26] ~t2_i~0 := 0; [L27] ~t3_i~0 := 0; [L28] ~t4_i~0 := 0; [L29] ~M_E~0 := 2; [L30] ~T1_E~0 := 2; [L31] ~T2_E~0 := 2; [L32] ~T3_E~0 := 2; [L33] ~T4_E~0 := 2; [L34] ~E_M~0 := 2; [L35] ~E_1~0 := 2; [L36] ~E_2~0 := 2; [L37] ~E_3~0 := 2; [L38] ~E_4~0 := 2; [L45] ~token~0 := 0; [L47] ~local~0 := 0; [L850] havoc ~__retres1~6; [L762] ~m_i~0 := 1; [L763] ~t1_i~0 := 1; [L764] ~t2_i~0 := 1; [L765] ~t3_i~0 := 1; [L766] ~t4_i~0 := 1; [L791] havoc ~kernel_st~0; [L792] havoc ~tmp~3; [L793] havoc ~tmp___0~1; [L797] ~kernel_st~0 := 0; [L355] COND TRUE 1 == ~m_i~0 [L356] ~m_st~0 := 0; [L360] COND TRUE 1 == ~t1_i~0 [L361] ~t1_st~0 := 0; [L365] COND TRUE 1 == ~t2_i~0 [L366] ~t2_st~0 := 0; [L370] COND TRUE 1 == ~t3_i~0 [L371] ~t3_st~0 := 0; [L375] COND TRUE 1 == ~t4_i~0 [L376] ~t4_st~0 := 0; [L516] COND FALSE !(0 == ~M_E~0) [L521] COND FALSE !(0 == ~T1_E~0) [L526] COND FALSE !(0 == ~T2_E~0) [L531] COND FALSE !(0 == ~T3_E~0) [L536] COND FALSE !(0 == ~T4_E~0) [L541] COND FALSE !(0 == ~E_M~0) [L546] COND FALSE !(0 == ~E_1~0) [L551] COND FALSE !(0 == ~E_2~0) [L556] COND FALSE !(0 == ~E_3~0) [L561] COND FALSE !(0 == ~E_4~0) [L629] havoc ~tmp~1; [L630] havoc ~tmp___0~0; [L631] havoc ~tmp___1~0; [L632] havoc ~tmp___2~0; [L633] havoc ~tmp___3~0; [L249] havoc ~__retres1~0; [L252] COND FALSE !(1 == ~m_pc~0) [L262] ~__retres1~0 := 0; [L264] #res := ~__retres1~0; [L637] ~tmp~1 := #t~ret8; [L637] havoc #t~ret8; [L639-L643] COND FALSE !(0 != ~tmp~1) [L268] havoc ~__retres1~1; [L271] COND FALSE !(1 == ~t1_pc~0) [L281] ~__retres1~1 := 0; [L283] #res := ~__retres1~1; [L645] ~tmp___0~0 := #t~ret9; [L645] havoc #t~ret9; [L647-L651] COND FALSE !(0 != ~tmp___0~0) [L287] havoc ~__retres1~2; [L290] COND FALSE !(1 == ~t2_pc~0) [L300] ~__retres1~2 := 0; [L302] #res := ~__retres1~2; [L653] ~tmp___1~0 := #t~ret10; [L653] havoc #t~ret10; [L655-L659] COND FALSE !(0 != ~tmp___1~0) [L306] havoc ~__retres1~3; [L309] COND FALSE !(1 == ~t3_pc~0) [L319] ~__retres1~3 := 0; [L321] #res := ~__retres1~3; [L661] ~tmp___2~0 := #t~ret11; [L661] havoc #t~ret11; [L663-L667] COND FALSE !(0 != ~tmp___2~0) [L325] havoc ~__retres1~4; [L328] COND FALSE !(1 == ~t4_pc~0) [L338] ~__retres1~4 := 0; [L340] #res := ~__retres1~4; [L669] ~tmp___3~0 := #t~ret12; [L669] havoc #t~ret12; [L671-L675] COND FALSE !(0 != ~tmp___3~0) [L574] COND FALSE !(1 == ~M_E~0) [L579] COND FALSE !(1 == ~T1_E~0) [L584] COND FALSE !(1 == ~T2_E~0) [L589] COND FALSE !(1 == ~T3_E~0) [L594] COND FALSE !(1 == ~T4_E~0) [L599] COND FALSE !(1 == ~E_M~0) [L604] COND FALSE !(1 == ~E_1~0) [L609] COND FALSE !(1 == ~E_2~0) [L614] COND FALSE !(1 == ~E_3~0) [L619] COND FALSE !(1 == ~E_4~0) [L805-L842] COND FALSE !(false) [L808] ~kernel_st~0 := 1; [L421] havoc ~tmp~0; ----- ----- class de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.CACSL2BoogieBacktranslator [L14] ~m_pc~0 := 0; [L15] ~t1_pc~0 := 0; [L16] ~t2_pc~0 := 0; [L17] ~t3_pc~0 := 0; [L18] ~t4_pc~0 := 0; [L19] ~m_st~0 := 0; [L20] ~t1_st~0 := 0; [L21] ~t2_st~0 := 0; [L22] ~t3_st~0 := 0; [L23] ~t4_st~0 := 0; [L24] ~m_i~0 := 0; [L25] ~t1_i~0 := 0; [L26] ~t2_i~0 := 0; [L27] ~t3_i~0 := 0; [L28] ~t4_i~0 := 0; [L29] ~M_E~0 := 2; [L30] ~T1_E~0 := 2; [L31] ~T2_E~0 := 2; [L32] ~T3_E~0 := 2; [L33] ~T4_E~0 := 2; [L34] ~E_M~0 := 2; [L35] ~E_1~0 := 2; [L36] ~E_2~0 := 2; [L37] ~E_3~0 := 2; [L38] ~E_4~0 := 2; [L45] ~token~0 := 0; [L47] ~local~0 := 0; [L850] havoc ~__retres1~6; [L762] ~m_i~0 := 1; [L763] ~t1_i~0 := 1; [L764] ~t2_i~0 := 1; [L765] ~t3_i~0 := 1; [L766] ~t4_i~0 := 1; [L791] havoc ~kernel_st~0; [L792] havoc ~tmp~3; [L793] havoc ~tmp___0~1; [L797] ~kernel_st~0 := 0; [L355] COND TRUE 1 == ~m_i~0 [L356] ~m_st~0 := 0; [L360] COND TRUE 1 == ~t1_i~0 [L361] ~t1_st~0 := 0; [L365] COND TRUE 1 == ~t2_i~0 [L366] ~t2_st~0 := 0; [L370] COND TRUE 1 == ~t3_i~0 [L371] ~t3_st~0 := 0; [L375] COND TRUE 1 == ~t4_i~0 [L376] ~t4_st~0 := 0; [L516] COND FALSE !(0 == ~M_E~0) [L521] COND FALSE !(0 == ~T1_E~0) [L526] COND FALSE !(0 == ~T2_E~0) [L531] COND FALSE !(0 == ~T3_E~0) [L536] COND FALSE !(0 == ~T4_E~0) [L541] COND FALSE !(0 == ~E_M~0) [L546] COND FALSE !(0 == ~E_1~0) [L551] COND FALSE !(0 == ~E_2~0) [L556] COND FALSE !(0 == ~E_3~0) [L561] COND FALSE !(0 == ~E_4~0) [L629] havoc ~tmp~1; [L630] havoc ~tmp___0~0; [L631] havoc ~tmp___1~0; [L632] havoc ~tmp___2~0; [L633] havoc ~tmp___3~0; [L249] havoc ~__retres1~0; [L252] COND FALSE !(1 == ~m_pc~0) [L262] ~__retres1~0 := 0; [L264] #res := ~__retres1~0; [L637] ~tmp~1 := #t~ret8; [L637] havoc #t~ret8; [L639-L643] COND FALSE !(0 != ~tmp~1) [L268] havoc ~__retres1~1; [L271] COND FALSE !(1 == ~t1_pc~0) [L281] ~__retres1~1 := 0; [L283] #res := ~__retres1~1; [L645] ~tmp___0~0 := #t~ret9; [L645] havoc #t~ret9; [L647-L651] COND FALSE !(0 != ~tmp___0~0) [L287] havoc ~__retres1~2; [L290] COND FALSE !(1 == ~t2_pc~0) [L300] ~__retres1~2 := 0; [L302] #res := ~__retres1~2; [L653] ~tmp___1~0 := #t~ret10; [L653] havoc #t~ret10; [L655-L659] COND FALSE !(0 != ~tmp___1~0) [L306] havoc ~__retres1~3; [L309] COND FALSE !(1 == ~t3_pc~0) [L319] ~__retres1~3 := 0; [L321] #res := ~__retres1~3; [L661] ~tmp___2~0 := #t~ret11; [L661] havoc #t~ret11; [L663-L667] COND FALSE !(0 != ~tmp___2~0) [L325] havoc ~__retres1~4; [L328] COND FALSE !(1 == ~t4_pc~0) [L338] ~__retres1~4 := 0; [L340] #res := ~__retres1~4; [L669] ~tmp___3~0 := #t~ret12; [L669] havoc #t~ret12; [L671-L675] COND FALSE !(0 != ~tmp___3~0) [L574] COND FALSE !(1 == ~M_E~0) [L579] COND FALSE !(1 == ~T1_E~0) [L584] COND FALSE !(1 == ~T2_E~0) [L589] COND FALSE !(1 == ~T3_E~0) [L594] COND FALSE !(1 == ~T4_E~0) [L599] COND FALSE !(1 == ~E_M~0) [L604] COND FALSE !(1 == ~E_1~0) [L609] COND FALSE !(1 == ~E_2~0) [L614] COND FALSE !(1 == ~E_3~0) [L619] COND FALSE !(1 == ~E_4~0) [L805-L842] COND FALSE !(false) [L808] ~kernel_st~0 := 1; [L421] havoc ~tmp~0; [L14] int m_pc = 0; [L15] int t1_pc = 0; [L16] int t2_pc = 0; [L17] int t3_pc = 0; [L18] int t4_pc = 0; [L19] int m_st ; [L20] int t1_st ; [L21] int t2_st ; [L22] int t3_st ; [L23] int t4_st ; [L24] int m_i ; [L25] int t1_i ; [L26] int t2_i ; [L27] int t3_i ; [L28] int t4_i ; [L29] int M_E = 2; [L30] int T1_E = 2; [L31] int T2_E = 2; [L32] int T3_E = 2; [L33] int T4_E = 2; [L34] int E_M = 2; [L35] int E_1 = 2; [L36] int E_2 = 2; [L37] int E_3 = 2; [L38] int E_4 = 2; [L45] int token ; [L47] int local ; [L850] int __retres1 ; [L762] m_i = 1 [L763] t1_i = 1 [L764] t2_i = 1 [L765] t3_i = 1 [L766] t4_i = 1 [L791] int kernel_st ; [L792] int tmp ; [L793] int tmp___0 ; [L797] kernel_st = 0 [L355] COND TRUE m_i == 1 [L356] m_st = 0 [L360] COND TRUE t1_i == 1 [L361] t1_st = 0 [L365] COND TRUE t2_i == 1 [L366] t2_st = 0 [L370] COND TRUE t3_i == 1 [L371] t3_st = 0 [L375] COND TRUE t4_i == 1 [L376] t4_st = 0 [L516] COND FALSE !(M_E == 0) [L521] COND FALSE !(T1_E == 0) [L526] COND FALSE !(T2_E == 0) [L531] COND FALSE !(T3_E == 0) [L536] COND FALSE !(T4_E == 0) [L541] COND FALSE !(E_M == 0) [L546] COND FALSE !(E_1 == 0) [L551] COND FALSE !(E_2 == 0) [L556] COND FALSE !(E_3 == 0) [L561] COND FALSE !(E_4 == 0) [L629] int tmp ; [L630] int tmp___0 ; [L631] int tmp___1 ; [L632] int tmp___2 ; [L633] int tmp___3 ; [L249] int __retres1 ; [L252] COND FALSE !(m_pc == 1) [L262] __retres1 = 0 [L264] return (__retres1); [L637] tmp = is_master_triggered() [L639] COND FALSE !(\read(tmp)) [L268] int __retres1 ; [L271] COND FALSE !(t1_pc == 1) [L281] __retres1 = 0 [L283] return (__retres1); [L645] tmp___0 = is_transmit1_triggered() [L647] COND FALSE !(\read(tmp___0)) [L287] int __retres1 ; [L290] COND FALSE !(t2_pc == 1) [L300] __retres1 = 0 [L302] return (__retres1); [L653] tmp___1 = is_transmit2_triggered() [L655] COND FALSE !(\read(tmp___1)) [L306] int __retres1 ; [L309] COND FALSE !(t3_pc == 1) [L319] __retres1 = 0 [L321] return (__retres1); [L661] tmp___2 = is_transmit3_triggered() [L663] COND FALSE !(\read(tmp___2)) [L325] int __retres1 ; [L328] COND FALSE !(t4_pc == 1) [L338] __retres1 = 0 [L340] return (__retres1); [L669] tmp___3 = is_transmit4_triggered() [L671] COND FALSE !(\read(tmp___3)) [L574] COND FALSE !(M_E == 1) [L579] COND FALSE !(T1_E == 1) [L584] COND FALSE !(T2_E == 1) [L589] COND FALSE !(T3_E == 1) [L594] COND FALSE !(T4_E == 1) [L599] COND FALSE !(E_M == 1) [L604] COND FALSE !(E_1 == 1) [L609] COND FALSE !(E_2 == 1) [L614] COND FALSE !(E_3 == 1) [L619] COND FALSE !(E_4 == 1) [L805] COND TRUE 1 [L808] kernel_st = 1 [L421] int tmp ; ----- ----- class de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder.RCFGBacktranslator [?] assume !false; [?] havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~5;havoc exists_runnable_thread_~__retres1~5; [?] assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~5 := 1; [?] exists_runnable_thread_#res := exists_runnable_thread_~__retres1~5; [?] eval_#t~ret2 := exists_runnable_thread_#res;eval_~tmp~0 := eval_#t~ret2;havoc eval_#t~ret2; [?] assume 0 != eval_~tmp~0; [?] assume 0 == ~m_st~0;havoc eval_~tmp_ndt_1~0;eval_~tmp_ndt_1~0 := eval_#t~nondet3;havoc eval_#t~nondet3; [?] assume !(0 != eval_~tmp_ndt_1~0); [?] assume 0 == ~t1_st~0;havoc eval_~tmp_ndt_2~0;eval_~tmp_ndt_2~0 := eval_#t~nondet4;havoc eval_#t~nondet4; [?] assume !(0 != eval_~tmp_ndt_2~0); [?] assume 0 == ~t2_st~0;havoc eval_~tmp_ndt_3~0;eval_~tmp_ndt_3~0 := eval_#t~nondet5;havoc eval_#t~nondet5; [?] assume !(0 != eval_~tmp_ndt_3~0); [?] assume 0 == ~t3_st~0;havoc eval_~tmp_ndt_4~0;eval_~tmp_ndt_4~0 := eval_#t~nondet6;havoc eval_#t~nondet6; [?] assume !(0 != eval_~tmp_ndt_4~0); [?] assume 0 == ~t4_st~0;havoc eval_~tmp_ndt_5~0;eval_~tmp_ndt_5~0 := eval_#t~nondet7;havoc eval_#t~nondet7; [?] assume !(0 != eval_~tmp_ndt_5~0); [L425-L505] assume !false; [L428] havoc exists_runnable_thread_#res; [L428] havoc exists_runnable_thread_~__retres1~5; [L385] havoc exists_runnable_thread_~__retres1~5; [L388-L413] assume 0 == ~m_st~0; [L389] exists_runnable_thread_~__retres1~5 := 1; [L416] exists_runnable_thread_#res := exists_runnable_thread_~__retres1~5; [L428] eval_#t~ret2 := exists_runnable_thread_#res; [L428] eval_~tmp~0 := eval_#t~ret2; [L428] havoc eval_#t~ret2; [L430-L434] assume 0 != eval_~tmp~0; [L435-L448] assume 0 == ~m_st~0; [L436] havoc eval_~tmp_ndt_1~0; [L437] eval_~tmp_ndt_1~0 := eval_#t~nondet3; [L437] havoc eval_#t~nondet3; [L438-L445] assume !(0 != eval_~tmp_ndt_1~0); [L449-L462] assume 0 == ~t1_st~0; [L450] havoc eval_~tmp_ndt_2~0; [L451] eval_~tmp_ndt_2~0 := eval_#t~nondet4; [L451] havoc eval_#t~nondet4; [L452-L459] assume !(0 != eval_~tmp_ndt_2~0); [L463-L476] assume 0 == ~t2_st~0; [L464] havoc eval_~tmp_ndt_3~0; [L465] eval_~tmp_ndt_3~0 := eval_#t~nondet5; [L465] havoc eval_#t~nondet5; [L466-L473] assume !(0 != eval_~tmp_ndt_3~0); [L477-L490] assume 0 == ~t3_st~0; [L478] havoc eval_~tmp_ndt_4~0; [L479] eval_~tmp_ndt_4~0 := eval_#t~nondet6; [L479] havoc eval_#t~nondet6; [L480-L487] assume !(0 != eval_~tmp_ndt_4~0); [L491-L504] assume 0 == ~t4_st~0; [L492] havoc eval_~tmp_ndt_5~0; [L493] eval_~tmp_ndt_5~0 := eval_#t~nondet7; [L493] havoc eval_#t~nondet7; [L494-L501] assume !(0 != eval_~tmp_ndt_5~0); ----- ----- class de.uni_freiburg.informatik.ultimate.boogie.preprocessor.BoogiePreprocessorBacktranslator [L425-L505] assume !false; [L428] havoc exists_runnable_thread_#res; [L428] havoc exists_runnable_thread_~__retres1~5; [L385] havoc exists_runnable_thread_~__retres1~5; [L388-L413] assume 0 == ~m_st~0; [L389] exists_runnable_thread_~__retres1~5 := 1; [L416] exists_runnable_thread_#res := exists_runnable_thread_~__retres1~5; [L428] eval_#t~ret2 := exists_runnable_thread_#res; [L428] eval_~tmp~0 := eval_#t~ret2; [L428] havoc eval_#t~ret2; [L430-L434] assume 0 != eval_~tmp~0; [L435-L448] assume 0 == ~m_st~0; [L436] havoc eval_~tmp_ndt_1~0; [L437] eval_~tmp_ndt_1~0 := eval_#t~nondet3; [L437] havoc eval_#t~nondet3; [L438-L445] assume !(0 != eval_~tmp_ndt_1~0); [L449-L462] assume 0 == ~t1_st~0; [L450] havoc eval_~tmp_ndt_2~0; [L451] eval_~tmp_ndt_2~0 := eval_#t~nondet4; [L451] havoc eval_#t~nondet4; [L452-L459] assume !(0 != eval_~tmp_ndt_2~0); [L463-L476] assume 0 == ~t2_st~0; [L464] havoc eval_~tmp_ndt_3~0; [L465] eval_~tmp_ndt_3~0 := eval_#t~nondet5; [L465] havoc eval_#t~nondet5; [L466-L473] assume !(0 != eval_~tmp_ndt_3~0); [L477-L490] assume 0 == ~t3_st~0; [L478] havoc eval_~tmp_ndt_4~0; [L479] eval_~tmp_ndt_4~0 := eval_#t~nondet6; [L479] havoc eval_#t~nondet6; [L480-L487] assume !(0 != eval_~tmp_ndt_4~0); [L491-L504] assume 0 == ~t4_st~0; [L492] havoc eval_~tmp_ndt_5~0; [L493] eval_~tmp_ndt_5~0 := eval_#t~nondet7; [L493] havoc eval_#t~nondet7; [L494-L501] assume !(0 != eval_~tmp_ndt_5~0); [L425-L505] COND FALSE !(false) [L428] havoc exists_runnable_thread_#res; [L428] havoc exists_runnable_thread_~__retres1~5; [L385] havoc exists_runnable_thread_~__retres1~5; [L388] COND TRUE 0 == ~m_st~0 [L389] exists_runnable_thread_~__retres1~5 := 1; [L416] exists_runnable_thread_#res := exists_runnable_thread_~__retres1~5; [L428] eval_#t~ret2 := exists_runnable_thread_#res; [L428] eval_~tmp~0 := eval_#t~ret2; [L428] havoc eval_#t~ret2; [L430-L434] COND TRUE 0 != eval_~tmp~0 [L435] COND TRUE 0 == ~m_st~0 [L436] havoc eval_~tmp_ndt_1~0; [L437] eval_~tmp_ndt_1~0 := eval_#t~nondet3; [L437] havoc eval_#t~nondet3; [L438-L445] COND FALSE !(0 != eval_~tmp_ndt_1~0) [L449] COND TRUE 0 == ~t1_st~0 [L450] havoc eval_~tmp_ndt_2~0; [L451] eval_~tmp_ndt_2~0 := eval_#t~nondet4; [L451] havoc eval_#t~nondet4; [L452-L459] COND FALSE !(0 != eval_~tmp_ndt_2~0) [L463] COND TRUE 0 == ~t2_st~0 [L464] havoc eval_~tmp_ndt_3~0; [L465] eval_~tmp_ndt_3~0 := eval_#t~nondet5; [L465] havoc eval_#t~nondet5; [L466-L473] COND FALSE !(0 != eval_~tmp_ndt_3~0) [L477] COND TRUE 0 == ~t3_st~0 [L478] havoc eval_~tmp_ndt_4~0; [L479] eval_~tmp_ndt_4~0 := eval_#t~nondet6; [L479] havoc eval_#t~nondet6; [L480-L487] COND FALSE !(0 != eval_~tmp_ndt_4~0) [L491] COND TRUE 0 == ~t4_st~0 [L492] havoc eval_~tmp_ndt_5~0; [L493] eval_~tmp_ndt_5~0 := eval_#t~nondet7; [L493] havoc eval_#t~nondet7; [L494-L501] COND FALSE !(0 != eval_~tmp_ndt_5~0) ----- ----- class de.uni_freiburg.informatik.ultimate.boogie.procedureinliner.backtranslation.InlinerBacktranslator [L425-L505] COND FALSE !(false) [L428] havoc exists_runnable_thread_#res; [L428] havoc exists_runnable_thread_~__retres1~5; [L385] havoc exists_runnable_thread_~__retres1~5; [L388] COND TRUE 0 == ~m_st~0 [L389] exists_runnable_thread_~__retres1~5 := 1; [L416] exists_runnable_thread_#res := exists_runnable_thread_~__retres1~5; [L428] eval_#t~ret2 := exists_runnable_thread_#res; [L428] eval_~tmp~0 := eval_#t~ret2; [L428] havoc eval_#t~ret2; [L430-L434] COND TRUE 0 != eval_~tmp~0 [L435] COND TRUE 0 == ~m_st~0 [L436] havoc eval_~tmp_ndt_1~0; [L437] eval_~tmp_ndt_1~0 := eval_#t~nondet3; [L437] havoc eval_#t~nondet3; [L438-L445] COND FALSE !(0 != eval_~tmp_ndt_1~0) [L449] COND TRUE 0 == ~t1_st~0 [L450] havoc eval_~tmp_ndt_2~0; [L451] eval_~tmp_ndt_2~0 := eval_#t~nondet4; [L451] havoc eval_#t~nondet4; [L452-L459] COND FALSE !(0 != eval_~tmp_ndt_2~0) [L463] COND TRUE 0 == ~t2_st~0 [L464] havoc eval_~tmp_ndt_3~0; [L465] eval_~tmp_ndt_3~0 := eval_#t~nondet5; [L465] havoc eval_#t~nondet5; [L466-L473] COND FALSE !(0 != eval_~tmp_ndt_3~0) [L477] COND TRUE 0 == ~t3_st~0 [L478] havoc eval_~tmp_ndt_4~0; [L479] eval_~tmp_ndt_4~0 := eval_#t~nondet6; [L479] havoc eval_#t~nondet6; [L480-L487] COND FALSE !(0 != eval_~tmp_ndt_4~0) [L491] COND TRUE 0 == ~t4_st~0 [L492] havoc eval_~tmp_ndt_5~0; [L493] eval_~tmp_ndt_5~0 := eval_#t~nondet7; [L493] havoc eval_#t~nondet7; [L494-L501] COND FALSE !(0 != eval_~tmp_ndt_5~0) [L425-L505] COND FALSE !(false) [L385] havoc ~__retres1~5; [L388] COND TRUE 0 == ~m_st~0 [L389] ~__retres1~5 := 1; [L416] #res := ~__retres1~5; [L428] ~tmp~0 := #t~ret2; [L428] havoc #t~ret2; [L430-L434] COND TRUE 0 != ~tmp~0 [L435] COND TRUE 0 == ~m_st~0 [L436] havoc ~tmp_ndt_1~0; [L437] ~tmp_ndt_1~0 := #t~nondet3; [L437] havoc #t~nondet3; [L438-L445] COND FALSE !(0 != ~tmp_ndt_1~0) [L449] COND TRUE 0 == ~t1_st~0 [L450] havoc ~tmp_ndt_2~0; [L451] ~tmp_ndt_2~0 := #t~nondet4; [L451] havoc #t~nondet4; [L452-L459] COND FALSE !(0 != ~tmp_ndt_2~0) [L463] COND TRUE 0 == ~t2_st~0 [L464] havoc ~tmp_ndt_3~0; [L465] ~tmp_ndt_3~0 := #t~nondet5; [L465] havoc #t~nondet5; [L466-L473] COND FALSE !(0 != ~tmp_ndt_3~0) [L477] COND TRUE 0 == ~t3_st~0 [L478] havoc ~tmp_ndt_4~0; [L479] ~tmp_ndt_4~0 := #t~nondet6; [L479] havoc #t~nondet6; [L480-L487] COND FALSE !(0 != ~tmp_ndt_4~0) [L491] COND TRUE 0 == ~t4_st~0 [L492] havoc ~tmp_ndt_5~0; [L493] ~tmp_ndt_5~0 := #t~nondet7; [L493] havoc #t~nondet7; [L494-L501] COND FALSE !(0 != ~tmp_ndt_5~0) ----- ----- class de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.CACSL2BoogieBacktranslator [L425-L505] COND FALSE !(false) [L385] havoc ~__retres1~5; [L388] COND TRUE 0 == ~m_st~0 [L389] ~__retres1~5 := 1; [L416] #res := ~__retres1~5; [L428] ~tmp~0 := #t~ret2; [L428] havoc #t~ret2; [L430-L434] COND TRUE 0 != ~tmp~0 [L435] COND TRUE 0 == ~m_st~0 [L436] havoc ~tmp_ndt_1~0; [L437] ~tmp_ndt_1~0 := #t~nondet3; [L437] havoc #t~nondet3; [L438-L445] COND FALSE !(0 != ~tmp_ndt_1~0) [L449] COND TRUE 0 == ~t1_st~0 [L450] havoc ~tmp_ndt_2~0; [L451] ~tmp_ndt_2~0 := #t~nondet4; [L451] havoc #t~nondet4; [L452-L459] COND FALSE !(0 != ~tmp_ndt_2~0) [L463] COND TRUE 0 == ~t2_st~0 [L464] havoc ~tmp_ndt_3~0; [L465] ~tmp_ndt_3~0 := #t~nondet5; [L465] havoc #t~nondet5; [L466-L473] COND FALSE !(0 != ~tmp_ndt_3~0) [L477] COND TRUE 0 == ~t3_st~0 [L478] havoc ~tmp_ndt_4~0; [L479] ~tmp_ndt_4~0 := #t~nondet6; [L479] havoc #t~nondet6; [L480-L487] COND FALSE !(0 != ~tmp_ndt_4~0) [L491] COND TRUE 0 == ~t4_st~0 [L492] havoc ~tmp_ndt_5~0; [L493] ~tmp_ndt_5~0 := #t~nondet7; [L493] havoc #t~nondet7; [L494-L501] COND FALSE !(0 != ~tmp_ndt_5~0) [L425] COND TRUE 1 [L385] int __retres1 ; [L388] COND TRUE m_st == 0 [L389] __retres1 = 1 [L416] return (__retres1); [L428] tmp = exists_runnable_thread() [L430] COND TRUE \read(tmp) [L435] COND TRUE m_st == 0 [L436] int tmp_ndt_1; [L437] tmp_ndt_1 = __VERIFIER_nondet_int() [L438] COND FALSE !(\read(tmp_ndt_1)) [L449] COND TRUE t1_st == 0 [L450] int tmp_ndt_2; [L451] tmp_ndt_2 = __VERIFIER_nondet_int() [L452] COND FALSE !(\read(tmp_ndt_2)) [L463] COND TRUE t2_st == 0 [L464] int tmp_ndt_3; [L465] tmp_ndt_3 = __VERIFIER_nondet_int() [L466] COND FALSE !(\read(tmp_ndt_3)) [L477] COND TRUE t3_st == 0 [L478] int tmp_ndt_4; [L479] tmp_ndt_4 = __VERIFIER_nondet_int() [L480] COND FALSE !(\read(tmp_ndt_4)) [L491] COND TRUE t4_st == 0 [L492] int tmp_ndt_5; [L493] tmp_ndt_5 = __VERIFIER_nondet_int() [L494] COND FALSE !(\read(tmp_ndt_5)) ----- ----- class de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder.RCFGBacktranslator [?] ~m_pc~0 := 0;~t1_pc~0 := 0;~t2_pc~0 := 0;~t3_pc~0 := 0;~t4_pc~0 := 0;~m_st~0 := 0;~t1_st~0 := 0;~t2_st~0 := 0;~t3_st~0 := 0;~t4_st~0 := 0;~m_i~0 := 0;~t1_i~0 := 0;~t2_i~0 := 0;~t3_i~0 := 0;~t4_i~0 := 0;~M_E~0 := 2;~T1_E~0 := 2;~T2_E~0 := 2;~T3_E~0 := 2;~T4_E~0 := 2;~E_M~0 := 2;~E_1~0 := 2;~E_2~0 := 2;~E_3~0 := 2;~E_4~0 := 2;~token~0 := 0;~local~0 := 0; [?] havoc main_#res;havoc main_~__retres1~6;havoc main_~__retres1~6;~m_i~0 := 1;~t1_i~0 := 1;~t2_i~0 := 1;~t3_i~0 := 1;~t4_i~0 := 1; [?] havoc start_simulation_#t~ret14, start_simulation_#t~ret15, start_simulation_~kernel_st~0, start_simulation_~tmp~3, start_simulation_~tmp___0~1;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;havoc start_simulation_~tmp___0~1;start_simulation_~kernel_st~0 := 0; [?] assume 1 == ~m_i~0;~m_st~0 := 0; [?] assume 1 == ~t1_i~0;~t1_st~0 := 0; [?] assume 1 == ~t2_i~0;~t2_st~0 := 0; [?] assume 1 == ~t3_i~0;~t3_st~0 := 0; [?] assume 1 == ~t4_i~0;~t4_st~0 := 0; [?] assume !(0 == ~M_E~0); [?] assume !(0 == ~T1_E~0); [?] assume !(0 == ~T2_E~0); [?] assume !(0 == ~T3_E~0); [?] assume !(0 == ~T4_E~0); [?] assume !(0 == ~E_M~0); [?] assume !(0 == ~E_1~0); [?] assume !(0 == ~E_2~0); [?] assume !(0 == ~E_3~0); [?] assume !(0 == ~E_4~0); [?] havoc activate_threads_#t~ret8, activate_threads_#t~ret9, activate_threads_#t~ret10, activate_threads_#t~ret11, activate_threads_#t~ret12, activate_threads_~tmp~1, activate_threads_~tmp___0~0, activate_threads_~tmp___1~0, activate_threads_~tmp___2~0, activate_threads_~tmp___3~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc activate_threads_~tmp___1~0;havoc activate_threads_~tmp___2~0;havoc activate_threads_~tmp___3~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; [?] assume !(1 == ~m_pc~0); [?] is_master_triggered_~__retres1~0 := 0; [?] is_master_triggered_#res := is_master_triggered_~__retres1~0; [?] activate_threads_#t~ret8 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret8;havoc activate_threads_#t~ret8; [?] assume !(0 != activate_threads_~tmp~1); [?] havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; [?] assume !(1 == ~t1_pc~0); [?] is_transmit1_triggered_~__retres1~1 := 0; [?] is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; [?] activate_threads_#t~ret9 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret9;havoc activate_threads_#t~ret9; [?] assume !(0 != activate_threads_~tmp___0~0); [?] havoc is_transmit2_triggered_#res;havoc is_transmit2_triggered_~__retres1~2;havoc is_transmit2_triggered_~__retres1~2; [?] assume !(1 == ~t2_pc~0); [?] is_transmit2_triggered_~__retres1~2 := 0; [?] is_transmit2_triggered_#res := is_transmit2_triggered_~__retres1~2; [?] activate_threads_#t~ret10 := is_transmit2_triggered_#res;activate_threads_~tmp___1~0 := activate_threads_#t~ret10;havoc activate_threads_#t~ret10; [?] assume !(0 != activate_threads_~tmp___1~0); [?] havoc is_transmit3_triggered_#res;havoc is_transmit3_triggered_~__retres1~3;havoc is_transmit3_triggered_~__retres1~3; [?] assume !(1 == ~t3_pc~0); [?] is_transmit3_triggered_~__retres1~3 := 0; [?] is_transmit3_triggered_#res := is_transmit3_triggered_~__retres1~3; [?] activate_threads_#t~ret11 := is_transmit3_triggered_#res;activate_threads_~tmp___2~0 := activate_threads_#t~ret11;havoc activate_threads_#t~ret11; [?] assume !(0 != activate_threads_~tmp___2~0); [?] havoc is_transmit4_triggered_#res;havoc is_transmit4_triggered_~__retres1~4;havoc is_transmit4_triggered_~__retres1~4; [?] assume !(1 == ~t4_pc~0); [?] is_transmit4_triggered_~__retres1~4 := 0; [?] is_transmit4_triggered_#res := is_transmit4_triggered_~__retres1~4; [?] activate_threads_#t~ret12 := is_transmit4_triggered_#res;activate_threads_~tmp___3~0 := activate_threads_#t~ret12;havoc activate_threads_#t~ret12; [?] assume !(0 != activate_threads_~tmp___3~0); [?] assume !(1 == ~M_E~0); [?] assume !(1 == ~T1_E~0); [?] assume !(1 == ~T2_E~0); [?] assume !(1 == ~T3_E~0); [?] assume !(1 == ~T4_E~0); [?] assume !(1 == ~E_M~0); [?] assume !(1 == ~E_1~0); [?] assume !(1 == ~E_2~0); [?] assume !(1 == ~E_3~0); [?] assume !(1 == ~E_4~0); [?] assume !false; [?] start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret2, eval_#t~nondet3, eval_~tmp_ndt_1~0, eval_#t~nondet4, eval_~tmp_ndt_2~0, eval_#t~nondet5, eval_~tmp_ndt_3~0, eval_#t~nondet6, eval_~tmp_ndt_4~0, eval_#t~nondet7, eval_~tmp_ndt_5~0, eval_~tmp~0;havoc eval_~tmp~0; [L14] ~m_pc~0 := 0; [L15] ~t1_pc~0 := 0; [L16] ~t2_pc~0 := 0; [L17] ~t3_pc~0 := 0; [L18] ~t4_pc~0 := 0; [L19] ~m_st~0 := 0; [L20] ~t1_st~0 := 0; [L21] ~t2_st~0 := 0; [L22] ~t3_st~0 := 0; [L23] ~t4_st~0 := 0; [L24] ~m_i~0 := 0; [L25] ~t1_i~0 := 0; [L26] ~t2_i~0 := 0; [L27] ~t3_i~0 := 0; [L28] ~t4_i~0 := 0; [L29] ~M_E~0 := 2; [L30] ~T1_E~0 := 2; [L31] ~T2_E~0 := 2; [L32] ~T3_E~0 := 2; [L33] ~T4_E~0 := 2; [L34] ~E_M~0 := 2; [L35] ~E_1~0 := 2; [L36] ~E_2~0 := 2; [L37] ~E_3~0 := 2; [L38] ~E_4~0 := 2; [L45] ~token~0 := 0; [L47] ~local~0 := 0; [?] havoc main_#res; [?] havoc main_~__retres1~6; [L850] havoc main_~__retres1~6; [L762] ~m_i~0 := 1; [L763] ~t1_i~0 := 1; [L764] ~t2_i~0 := 1; [L765] ~t3_i~0 := 1; [L766] ~t4_i~0 := 1; [L855] havoc start_simulation_#t~ret14, start_simulation_#t~ret15, start_simulation_~kernel_st~0, start_simulation_~tmp~3, start_simulation_~tmp___0~1; [L791] havoc start_simulation_~kernel_st~0; [L792] havoc start_simulation_~tmp~3; [L793] havoc start_simulation_~tmp___0~1; [L797] start_simulation_~kernel_st~0 := 0; [L355-L359] assume 1 == ~m_i~0; [L356] ~m_st~0 := 0; [L360-L364] assume 1 == ~t1_i~0; [L361] ~t1_st~0 := 0; [L365-L369] assume 1 == ~t2_i~0; [L366] ~t2_st~0 := 0; [L370-L374] assume 1 == ~t3_i~0; [L371] ~t3_st~0 := 0; [L375-L379] assume 1 == ~t4_i~0; [L376] ~t4_st~0 := 0; [L516-L520] assume !(0 == ~M_E~0); [L521-L525] assume !(0 == ~T1_E~0); [L526-L530] assume !(0 == ~T2_E~0); [L531-L535] assume !(0 == ~T3_E~0); [L536-L540] assume !(0 == ~T4_E~0); [L541-L545] assume !(0 == ~E_M~0); [L546-L550] assume !(0 == ~E_1~0); [L551-L555] assume !(0 == ~E_2~0); [L556-L560] assume !(0 == ~E_3~0); [L561-L565] assume !(0 == ~E_4~0); [L801] havoc activate_threads_#t~ret8, activate_threads_#t~ret9, activate_threads_#t~ret10, activate_threads_#t~ret11, activate_threads_#t~ret12, activate_threads_~tmp~1, activate_threads_~tmp___0~0, activate_threads_~tmp___1~0, activate_threads_~tmp___2~0, activate_threads_~tmp___3~0; [L629] havoc activate_threads_~tmp~1; [L630] havoc activate_threads_~tmp___0~0; [L631] havoc activate_threads_~tmp___1~0; [L632] havoc activate_threads_~tmp___2~0; [L633] havoc activate_threads_~tmp___3~0; [L637] havoc is_master_triggered_#res; [L637] havoc is_master_triggered_~__retres1~0; [L249] havoc is_master_triggered_~__retres1~0; [L252-L261] assume !(1 == ~m_pc~0); [L262] is_master_triggered_~__retres1~0 := 0; [L264] is_master_triggered_#res := is_master_triggered_~__retres1~0; [L637] activate_threads_#t~ret8 := is_master_triggered_#res; [L637] activate_threads_~tmp~1 := activate_threads_#t~ret8; [L637] havoc activate_threads_#t~ret8; [L639-L643] assume !(0 != activate_threads_~tmp~1); [L645] havoc is_transmit1_triggered_#res; [L645] havoc is_transmit1_triggered_~__retres1~1; [L268] havoc is_transmit1_triggered_~__retres1~1; [L271-L280] assume !(1 == ~t1_pc~0); [L281] is_transmit1_triggered_~__retres1~1 := 0; [L283] is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; [L645] activate_threads_#t~ret9 := is_transmit1_triggered_#res; [L645] activate_threads_~tmp___0~0 := activate_threads_#t~ret9; [L645] havoc activate_threads_#t~ret9; [L647-L651] assume !(0 != activate_threads_~tmp___0~0); [L653] havoc is_transmit2_triggered_#res; [L653] havoc is_transmit2_triggered_~__retres1~2; [L287] havoc is_transmit2_triggered_~__retres1~2; [L290-L299] assume !(1 == ~t2_pc~0); [L300] is_transmit2_triggered_~__retres1~2 := 0; [L302] is_transmit2_triggered_#res := is_transmit2_triggered_~__retres1~2; [L653] activate_threads_#t~ret10 := is_transmit2_triggered_#res; [L653] activate_threads_~tmp___1~0 := activate_threads_#t~ret10; [L653] havoc activate_threads_#t~ret10; [L655-L659] assume !(0 != activate_threads_~tmp___1~0); [L661] havoc is_transmit3_triggered_#res; [L661] havoc is_transmit3_triggered_~__retres1~3; [L306] havoc is_transmit3_triggered_~__retres1~3; [L309-L318] assume !(1 == ~t3_pc~0); [L319] is_transmit3_triggered_~__retres1~3 := 0; [L321] is_transmit3_triggered_#res := is_transmit3_triggered_~__retres1~3; [L661] activate_threads_#t~ret11 := is_transmit3_triggered_#res; [L661] activate_threads_~tmp___2~0 := activate_threads_#t~ret11; [L661] havoc activate_threads_#t~ret11; [L663-L667] assume !(0 != activate_threads_~tmp___2~0); [L669] havoc is_transmit4_triggered_#res; [L669] havoc is_transmit4_triggered_~__retres1~4; [L325] havoc is_transmit4_triggered_~__retres1~4; [L328-L337] assume !(1 == ~t4_pc~0); [L338] is_transmit4_triggered_~__retres1~4 := 0; [L340] is_transmit4_triggered_#res := is_transmit4_triggered_~__retres1~4; [L669] activate_threads_#t~ret12 := is_transmit4_triggered_#res; [L669] activate_threads_~tmp___3~0 := activate_threads_#t~ret12; [L669] havoc activate_threads_#t~ret12; [L671-L675] assume !(0 != activate_threads_~tmp___3~0); [L574-L578] assume !(1 == ~M_E~0); [L579-L583] assume !(1 == ~T1_E~0); [L584-L588] assume !(1 == ~T2_E~0); [L589-L593] assume !(1 == ~T3_E~0); [L594-L598] assume !(1 == ~T4_E~0); [L599-L603] assume !(1 == ~E_M~0); [L604-L608] assume !(1 == ~E_1~0); [L609-L613] assume !(1 == ~E_2~0); [L614-L618] assume !(1 == ~E_3~0); [L619-L623] assume !(1 == ~E_4~0); [L805-L842] assume !false; [L808] start_simulation_~kernel_st~0 := 1; [L809] havoc eval_#t~ret2, eval_#t~nondet3, eval_~tmp_ndt_1~0, eval_#t~nondet4, eval_~tmp_ndt_2~0, eval_#t~nondet5, eval_~tmp_ndt_3~0, eval_#t~nondet6, eval_~tmp_ndt_4~0, eval_#t~nondet7, eval_~tmp_ndt_5~0, eval_~tmp~0; [L421] havoc eval_~tmp~0; ----- ----- class de.uni_freiburg.informatik.ultimate.boogie.preprocessor.BoogiePreprocessorBacktranslator [L14] ~m_pc~0 := 0; [L15] ~t1_pc~0 := 0; [L16] ~t2_pc~0 := 0; [L17] ~t3_pc~0 := 0; [L18] ~t4_pc~0 := 0; [L19] ~m_st~0 := 0; [L20] ~t1_st~0 := 0; [L21] ~t2_st~0 := 0; [L22] ~t3_st~0 := 0; [L23] ~t4_st~0 := 0; [L24] ~m_i~0 := 0; [L25] ~t1_i~0 := 0; [L26] ~t2_i~0 := 0; [L27] ~t3_i~0 := 0; [L28] ~t4_i~0 := 0; [L29] ~M_E~0 := 2; [L30] ~T1_E~0 := 2; [L31] ~T2_E~0 := 2; [L32] ~T3_E~0 := 2; [L33] ~T4_E~0 := 2; [L34] ~E_M~0 := 2; [L35] ~E_1~0 := 2; [L36] ~E_2~0 := 2; [L37] ~E_3~0 := 2; [L38] ~E_4~0 := 2; [L45] ~token~0 := 0; [L47] ~local~0 := 0; [?] havoc main_#res; [?] havoc main_~__retres1~6; [L850] havoc main_~__retres1~6; [L762] ~m_i~0 := 1; [L763] ~t1_i~0 := 1; [L764] ~t2_i~0 := 1; [L765] ~t3_i~0 := 1; [L766] ~t4_i~0 := 1; [L855] havoc start_simulation_#t~ret14, start_simulation_#t~ret15, start_simulation_~kernel_st~0, start_simulation_~tmp~3, start_simulation_~tmp___0~1; [L791] havoc start_simulation_~kernel_st~0; [L792] havoc start_simulation_~tmp~3; [L793] havoc start_simulation_~tmp___0~1; [L797] start_simulation_~kernel_st~0 := 0; [L355-L359] assume 1 == ~m_i~0; [L356] ~m_st~0 := 0; [L360-L364] assume 1 == ~t1_i~0; [L361] ~t1_st~0 := 0; [L365-L369] assume 1 == ~t2_i~0; [L366] ~t2_st~0 := 0; [L370-L374] assume 1 == ~t3_i~0; [L371] ~t3_st~0 := 0; [L375-L379] assume 1 == ~t4_i~0; [L376] ~t4_st~0 := 0; [L516-L520] assume !(0 == ~M_E~0); [L521-L525] assume !(0 == ~T1_E~0); [L526-L530] assume !(0 == ~T2_E~0); [L531-L535] assume !(0 == ~T3_E~0); [L536-L540] assume !(0 == ~T4_E~0); [L541-L545] assume !(0 == ~E_M~0); [L546-L550] assume !(0 == ~E_1~0); [L551-L555] assume !(0 == ~E_2~0); [L556-L560] assume !(0 == ~E_3~0); [L561-L565] assume !(0 == ~E_4~0); [L801] havoc activate_threads_#t~ret8, activate_threads_#t~ret9, activate_threads_#t~ret10, activate_threads_#t~ret11, activate_threads_#t~ret12, activate_threads_~tmp~1, activate_threads_~tmp___0~0, activate_threads_~tmp___1~0, activate_threads_~tmp___2~0, activate_threads_~tmp___3~0; [L629] havoc activate_threads_~tmp~1; [L630] havoc activate_threads_~tmp___0~0; [L631] havoc activate_threads_~tmp___1~0; [L632] havoc activate_threads_~tmp___2~0; [L633] havoc activate_threads_~tmp___3~0; [L637] havoc is_master_triggered_#res; [L637] havoc is_master_triggered_~__retres1~0; [L249] havoc is_master_triggered_~__retres1~0; [L252-L261] assume !(1 == ~m_pc~0); [L262] is_master_triggered_~__retres1~0 := 0; [L264] is_master_triggered_#res := is_master_triggered_~__retres1~0; [L637] activate_threads_#t~ret8 := is_master_triggered_#res; [L637] activate_threads_~tmp~1 := activate_threads_#t~ret8; [L637] havoc activate_threads_#t~ret8; [L639-L643] assume !(0 != activate_threads_~tmp~1); [L645] havoc is_transmit1_triggered_#res; [L645] havoc is_transmit1_triggered_~__retres1~1; [L268] havoc is_transmit1_triggered_~__retres1~1; [L271-L280] assume !(1 == ~t1_pc~0); [L281] is_transmit1_triggered_~__retres1~1 := 0; [L283] is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; [L645] activate_threads_#t~ret9 := is_transmit1_triggered_#res; [L645] activate_threads_~tmp___0~0 := activate_threads_#t~ret9; [L645] havoc activate_threads_#t~ret9; [L647-L651] assume !(0 != activate_threads_~tmp___0~0); [L653] havoc is_transmit2_triggered_#res; [L653] havoc is_transmit2_triggered_~__retres1~2; [L287] havoc is_transmit2_triggered_~__retres1~2; [L290-L299] assume !(1 == ~t2_pc~0); [L300] is_transmit2_triggered_~__retres1~2 := 0; [L302] is_transmit2_triggered_#res := is_transmit2_triggered_~__retres1~2; [L653] activate_threads_#t~ret10 := is_transmit2_triggered_#res; [L653] activate_threads_~tmp___1~0 := activate_threads_#t~ret10; [L653] havoc activate_threads_#t~ret10; [L655-L659] assume !(0 != activate_threads_~tmp___1~0); [L661] havoc is_transmit3_triggered_#res; [L661] havoc is_transmit3_triggered_~__retres1~3; [L306] havoc is_transmit3_triggered_~__retres1~3; [L309-L318] assume !(1 == ~t3_pc~0); [L319] is_transmit3_triggered_~__retres1~3 := 0; [L321] is_transmit3_triggered_#res := is_transmit3_triggered_~__retres1~3; [L661] activate_threads_#t~ret11 := is_transmit3_triggered_#res; [L661] activate_threads_~tmp___2~0 := activate_threads_#t~ret11; [L661] havoc activate_threads_#t~ret11; [L663-L667] assume !(0 != activate_threads_~tmp___2~0); [L669] havoc is_transmit4_triggered_#res; [L669] havoc is_transmit4_triggered_~__retres1~4; [L325] havoc is_transmit4_triggered_~__retres1~4; [L328-L337] assume !(1 == ~t4_pc~0); [L338] is_transmit4_triggered_~__retres1~4 := 0; [L340] is_transmit4_triggered_#res := is_transmit4_triggered_~__retres1~4; [L669] activate_threads_#t~ret12 := is_transmit4_triggered_#res; [L669] activate_threads_~tmp___3~0 := activate_threads_#t~ret12; [L669] havoc activate_threads_#t~ret12; [L671-L675] assume !(0 != activate_threads_~tmp___3~0); [L574-L578] assume !(1 == ~M_E~0); [L579-L583] assume !(1 == ~T1_E~0); [L584-L588] assume !(1 == ~T2_E~0); [L589-L593] assume !(1 == ~T3_E~0); [L594-L598] assume !(1 == ~T4_E~0); [L599-L603] assume !(1 == ~E_M~0); [L604-L608] assume !(1 == ~E_1~0); [L609-L613] assume !(1 == ~E_2~0); [L614-L618] assume !(1 == ~E_3~0); [L619-L623] assume !(1 == ~E_4~0); [L805-L842] assume !false; [L808] start_simulation_~kernel_st~0 := 1; [L809] havoc eval_#t~ret2, eval_#t~nondet3, eval_~tmp_ndt_1~0, eval_#t~nondet4, eval_~tmp_ndt_2~0, eval_#t~nondet5, eval_~tmp_ndt_3~0, eval_#t~nondet6, eval_~tmp_ndt_4~0, eval_#t~nondet7, eval_~tmp_ndt_5~0, eval_~tmp~0; [L421] havoc eval_~tmp~0; [L14] ~m_pc~0 := 0; [L15] ~t1_pc~0 := 0; [L16] ~t2_pc~0 := 0; [L17] ~t3_pc~0 := 0; [L18] ~t4_pc~0 := 0; [L19] ~m_st~0 := 0; [L20] ~t1_st~0 := 0; [L21] ~t2_st~0 := 0; [L22] ~t3_st~0 := 0; [L23] ~t4_st~0 := 0; [L24] ~m_i~0 := 0; [L25] ~t1_i~0 := 0; [L26] ~t2_i~0 := 0; [L27] ~t3_i~0 := 0; [L28] ~t4_i~0 := 0; [L29] ~M_E~0 := 2; [L30] ~T1_E~0 := 2; [L31] ~T2_E~0 := 2; [L32] ~T3_E~0 := 2; [L33] ~T4_E~0 := 2; [L34] ~E_M~0 := 2; [L35] ~E_1~0 := 2; [L36] ~E_2~0 := 2; [L37] ~E_3~0 := 2; [L38] ~E_4~0 := 2; [L45] ~token~0 := 0; [L47] ~local~0 := 0; [?] havoc main_#res; [?] havoc main_~__retres1~6; [L850] havoc main_~__retres1~6; [L762] ~m_i~0 := 1; [L763] ~t1_i~0 := 1; [L764] ~t2_i~0 := 1; [L765] ~t3_i~0 := 1; [L766] ~t4_i~0 := 1; [L855] havoc start_simulation_#t~ret14, start_simulation_#t~ret15, start_simulation_~kernel_st~0, start_simulation_~tmp~3, start_simulation_~tmp___0~1; [L791] havoc start_simulation_~kernel_st~0; [L792] havoc start_simulation_~tmp~3; [L793] havoc start_simulation_~tmp___0~1; [L797] start_simulation_~kernel_st~0 := 0; [L355] COND TRUE 1 == ~m_i~0 [L356] ~m_st~0 := 0; [L360] COND TRUE 1 == ~t1_i~0 [L361] ~t1_st~0 := 0; [L365] COND TRUE 1 == ~t2_i~0 [L366] ~t2_st~0 := 0; [L370] COND TRUE 1 == ~t3_i~0 [L371] ~t3_st~0 := 0; [L375] COND TRUE 1 == ~t4_i~0 [L376] ~t4_st~0 := 0; [L516] COND FALSE !(0 == ~M_E~0) [L521] COND FALSE !(0 == ~T1_E~0) [L526] COND FALSE !(0 == ~T2_E~0) [L531] COND FALSE !(0 == ~T3_E~0) [L536] COND FALSE !(0 == ~T4_E~0) [L541] COND FALSE !(0 == ~E_M~0) [L546] COND FALSE !(0 == ~E_1~0) [L551] COND FALSE !(0 == ~E_2~0) [L556] COND FALSE !(0 == ~E_3~0) [L561] COND FALSE !(0 == ~E_4~0) [L801] havoc activate_threads_#t~ret8, activate_threads_#t~ret9, activate_threads_#t~ret10, activate_threads_#t~ret11, activate_threads_#t~ret12, activate_threads_~tmp~1, activate_threads_~tmp___0~0, activate_threads_~tmp___1~0, activate_threads_~tmp___2~0, activate_threads_~tmp___3~0; [L629] havoc activate_threads_~tmp~1; [L630] havoc activate_threads_~tmp___0~0; [L631] havoc activate_threads_~tmp___1~0; [L632] havoc activate_threads_~tmp___2~0; [L633] havoc activate_threads_~tmp___3~0; [L637] havoc is_master_triggered_#res; [L637] havoc is_master_triggered_~__retres1~0; [L249] havoc is_master_triggered_~__retres1~0; [L252] COND FALSE !(1 == ~m_pc~0) [L262] is_master_triggered_~__retres1~0 := 0; [L264] is_master_triggered_#res := is_master_triggered_~__retres1~0; [L637] activate_threads_#t~ret8 := is_master_triggered_#res; [L637] activate_threads_~tmp~1 := activate_threads_#t~ret8; [L637] havoc activate_threads_#t~ret8; [L639-L643] COND FALSE !(0 != activate_threads_~tmp~1) [L645] havoc is_transmit1_triggered_#res; [L645] havoc is_transmit1_triggered_~__retres1~1; [L268] havoc is_transmit1_triggered_~__retres1~1; [L271] COND FALSE !(1 == ~t1_pc~0) [L281] is_transmit1_triggered_~__retres1~1 := 0; [L283] is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; [L645] activate_threads_#t~ret9 := is_transmit1_triggered_#res; [L645] activate_threads_~tmp___0~0 := activate_threads_#t~ret9; [L645] havoc activate_threads_#t~ret9; [L647-L651] COND FALSE !(0 != activate_threads_~tmp___0~0) [L653] havoc is_transmit2_triggered_#res; [L653] havoc is_transmit2_triggered_~__retres1~2; [L287] havoc is_transmit2_triggered_~__retres1~2; [L290] COND FALSE !(1 == ~t2_pc~0) [L300] is_transmit2_triggered_~__retres1~2 := 0; [L302] is_transmit2_triggered_#res := is_transmit2_triggered_~__retres1~2; [L653] activate_threads_#t~ret10 := is_transmit2_triggered_#res; [L653] activate_threads_~tmp___1~0 := activate_threads_#t~ret10; [L653] havoc activate_threads_#t~ret10; [L655-L659] COND FALSE !(0 != activate_threads_~tmp___1~0) [L661] havoc is_transmit3_triggered_#res; [L661] havoc is_transmit3_triggered_~__retres1~3; [L306] havoc is_transmit3_triggered_~__retres1~3; [L309] COND FALSE !(1 == ~t3_pc~0) [L319] is_transmit3_triggered_~__retres1~3 := 0; [L321] is_transmit3_triggered_#res := is_transmit3_triggered_~__retres1~3; [L661] activate_threads_#t~ret11 := is_transmit3_triggered_#res; [L661] activate_threads_~tmp___2~0 := activate_threads_#t~ret11; [L661] havoc activate_threads_#t~ret11; [L663-L667] COND FALSE !(0 != activate_threads_~tmp___2~0) [L669] havoc is_transmit4_triggered_#res; [L669] havoc is_transmit4_triggered_~__retres1~4; [L325] havoc is_transmit4_triggered_~__retres1~4; [L328] COND FALSE !(1 == ~t4_pc~0) [L338] is_transmit4_triggered_~__retres1~4 := 0; [L340] is_transmit4_triggered_#res := is_transmit4_triggered_~__retres1~4; [L669] activate_threads_#t~ret12 := is_transmit4_triggered_#res; [L669] activate_threads_~tmp___3~0 := activate_threads_#t~ret12; [L669] havoc activate_threads_#t~ret12; [L671-L675] COND FALSE !(0 != activate_threads_~tmp___3~0) [L574] COND FALSE !(1 == ~M_E~0) [L579] COND FALSE !(1 == ~T1_E~0) [L584] COND FALSE !(1 == ~T2_E~0) [L589] COND FALSE !(1 == ~T3_E~0) [L594] COND FALSE !(1 == ~T4_E~0) [L599] COND FALSE !(1 == ~E_M~0) [L604] COND FALSE !(1 == ~E_1~0) [L609] COND FALSE !(1 == ~E_2~0) [L614] COND FALSE !(1 == ~E_3~0) [L619] COND FALSE !(1 == ~E_4~0) [L805-L842] COND FALSE !(false) [L808] start_simulation_~kernel_st~0 := 1; [L809] havoc eval_#t~ret2, eval_#t~nondet3, eval_~tmp_ndt_1~0, eval_#t~nondet4, eval_~tmp_ndt_2~0, eval_#t~nondet5, eval_~tmp_ndt_3~0, eval_#t~nondet6, eval_~tmp_ndt_4~0, eval_#t~nondet7, eval_~tmp_ndt_5~0, eval_~tmp~0; [L421] havoc eval_~tmp~0; ----- ----- class de.uni_freiburg.informatik.ultimate.boogie.procedureinliner.backtranslation.InlinerBacktranslator [L14] ~m_pc~0 := 0; [L15] ~t1_pc~0 := 0; [L16] ~t2_pc~0 := 0; [L17] ~t3_pc~0 := 0; [L18] ~t4_pc~0 := 0; [L19] ~m_st~0 := 0; [L20] ~t1_st~0 := 0; [L21] ~t2_st~0 := 0; [L22] ~t3_st~0 := 0; [L23] ~t4_st~0 := 0; [L24] ~m_i~0 := 0; [L25] ~t1_i~0 := 0; [L26] ~t2_i~0 := 0; [L27] ~t3_i~0 := 0; [L28] ~t4_i~0 := 0; [L29] ~M_E~0 := 2; [L30] ~T1_E~0 := 2; [L31] ~T2_E~0 := 2; [L32] ~T3_E~0 := 2; [L33] ~T4_E~0 := 2; [L34] ~E_M~0 := 2; [L35] ~E_1~0 := 2; [L36] ~E_2~0 := 2; [L37] ~E_3~0 := 2; [L38] ~E_4~0 := 2; [L45] ~token~0 := 0; [L47] ~local~0 := 0; [?] havoc main_#res; [?] havoc main_~__retres1~6; [L850] havoc main_~__retres1~6; [L762] ~m_i~0 := 1; [L763] ~t1_i~0 := 1; [L764] ~t2_i~0 := 1; [L765] ~t3_i~0 := 1; [L766] ~t4_i~0 := 1; [L855] havoc start_simulation_#t~ret14, start_simulation_#t~ret15, start_simulation_~kernel_st~0, start_simulation_~tmp~3, start_simulation_~tmp___0~1; [L791] havoc start_simulation_~kernel_st~0; [L792] havoc start_simulation_~tmp~3; [L793] havoc start_simulation_~tmp___0~1; [L797] start_simulation_~kernel_st~0 := 0; [L355] COND TRUE 1 == ~m_i~0 [L356] ~m_st~0 := 0; [L360] COND TRUE 1 == ~t1_i~0 [L361] ~t1_st~0 := 0; [L365] COND TRUE 1 == ~t2_i~0 [L366] ~t2_st~0 := 0; [L370] COND TRUE 1 == ~t3_i~0 [L371] ~t3_st~0 := 0; [L375] COND TRUE 1 == ~t4_i~0 [L376] ~t4_st~0 := 0; [L516] COND FALSE !(0 == ~M_E~0) [L521] COND FALSE !(0 == ~T1_E~0) [L526] COND FALSE !(0 == ~T2_E~0) [L531] COND FALSE !(0 == ~T3_E~0) [L536] COND FALSE !(0 == ~T4_E~0) [L541] COND FALSE !(0 == ~E_M~0) [L546] COND FALSE !(0 == ~E_1~0) [L551] COND FALSE !(0 == ~E_2~0) [L556] COND FALSE !(0 == ~E_3~0) [L561] COND FALSE !(0 == ~E_4~0) [L801] havoc activate_threads_#t~ret8, activate_threads_#t~ret9, activate_threads_#t~ret10, activate_threads_#t~ret11, activate_threads_#t~ret12, activate_threads_~tmp~1, activate_threads_~tmp___0~0, activate_threads_~tmp___1~0, activate_threads_~tmp___2~0, activate_threads_~tmp___3~0; [L629] havoc activate_threads_~tmp~1; [L630] havoc activate_threads_~tmp___0~0; [L631] havoc activate_threads_~tmp___1~0; [L632] havoc activate_threads_~tmp___2~0; [L633] havoc activate_threads_~tmp___3~0; [L637] havoc is_master_triggered_#res; [L637] havoc is_master_triggered_~__retres1~0; [L249] havoc is_master_triggered_~__retres1~0; [L252] COND FALSE !(1 == ~m_pc~0) [L262] is_master_triggered_~__retres1~0 := 0; [L264] is_master_triggered_#res := is_master_triggered_~__retres1~0; [L637] activate_threads_#t~ret8 := is_master_triggered_#res; [L637] activate_threads_~tmp~1 := activate_threads_#t~ret8; [L637] havoc activate_threads_#t~ret8; [L639-L643] COND FALSE !(0 != activate_threads_~tmp~1) [L645] havoc is_transmit1_triggered_#res; [L645] havoc is_transmit1_triggered_~__retres1~1; [L268] havoc is_transmit1_triggered_~__retres1~1; [L271] COND FALSE !(1 == ~t1_pc~0) [L281] is_transmit1_triggered_~__retres1~1 := 0; [L283] is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; [L645] activate_threads_#t~ret9 := is_transmit1_triggered_#res; [L645] activate_threads_~tmp___0~0 := activate_threads_#t~ret9; [L645] havoc activate_threads_#t~ret9; [L647-L651] COND FALSE !(0 != activate_threads_~tmp___0~0) [L653] havoc is_transmit2_triggered_#res; [L653] havoc is_transmit2_triggered_~__retres1~2; [L287] havoc is_transmit2_triggered_~__retres1~2; [L290] COND FALSE !(1 == ~t2_pc~0) [L300] is_transmit2_triggered_~__retres1~2 := 0; [L302] is_transmit2_triggered_#res := is_transmit2_triggered_~__retres1~2; [L653] activate_threads_#t~ret10 := is_transmit2_triggered_#res; [L653] activate_threads_~tmp___1~0 := activate_threads_#t~ret10; [L653] havoc activate_threads_#t~ret10; [L655-L659] COND FALSE !(0 != activate_threads_~tmp___1~0) [L661] havoc is_transmit3_triggered_#res; [L661] havoc is_transmit3_triggered_~__retres1~3; [L306] havoc is_transmit3_triggered_~__retres1~3; [L309] COND FALSE !(1 == ~t3_pc~0) [L319] is_transmit3_triggered_~__retres1~3 := 0; [L321] is_transmit3_triggered_#res := is_transmit3_triggered_~__retres1~3; [L661] activate_threads_#t~ret11 := is_transmit3_triggered_#res; [L661] activate_threads_~tmp___2~0 := activate_threads_#t~ret11; [L661] havoc activate_threads_#t~ret11; [L663-L667] COND FALSE !(0 != activate_threads_~tmp___2~0) [L669] havoc is_transmit4_triggered_#res; [L669] havoc is_transmit4_triggered_~__retres1~4; [L325] havoc is_transmit4_triggered_~__retres1~4; [L328] COND FALSE !(1 == ~t4_pc~0) [L338] is_transmit4_triggered_~__retres1~4 := 0; [L340] is_transmit4_triggered_#res := is_transmit4_triggered_~__retres1~4; [L669] activate_threads_#t~ret12 := is_transmit4_triggered_#res; [L669] activate_threads_~tmp___3~0 := activate_threads_#t~ret12; [L669] havoc activate_threads_#t~ret12; [L671-L675] COND FALSE !(0 != activate_threads_~tmp___3~0) [L574] COND FALSE !(1 == ~M_E~0) [L579] COND FALSE !(1 == ~T1_E~0) [L584] COND FALSE !(1 == ~T2_E~0) [L589] COND FALSE !(1 == ~T3_E~0) [L594] COND FALSE !(1 == ~T4_E~0) [L599] COND FALSE !(1 == ~E_M~0) [L604] COND FALSE !(1 == ~E_1~0) [L609] COND FALSE !(1 == ~E_2~0) [L614] COND FALSE !(1 == ~E_3~0) [L619] COND FALSE !(1 == ~E_4~0) [L805-L842] COND FALSE !(false) [L808] start_simulation_~kernel_st~0 := 1; [L809] havoc eval_#t~ret2, eval_#t~nondet3, eval_~tmp_ndt_1~0, eval_#t~nondet4, eval_~tmp_ndt_2~0, eval_#t~nondet5, eval_~tmp_ndt_3~0, eval_#t~nondet6, eval_~tmp_ndt_4~0, eval_#t~nondet7, eval_~tmp_ndt_5~0, eval_~tmp~0; [L421] havoc eval_~tmp~0; [L14] ~m_pc~0 := 0; [L15] ~t1_pc~0 := 0; [L16] ~t2_pc~0 := 0; [L17] ~t3_pc~0 := 0; [L18] ~t4_pc~0 := 0; [L19] ~m_st~0 := 0; [L20] ~t1_st~0 := 0; [L21] ~t2_st~0 := 0; [L22] ~t3_st~0 := 0; [L23] ~t4_st~0 := 0; [L24] ~m_i~0 := 0; [L25] ~t1_i~0 := 0; [L26] ~t2_i~0 := 0; [L27] ~t3_i~0 := 0; [L28] ~t4_i~0 := 0; [L29] ~M_E~0 := 2; [L30] ~T1_E~0 := 2; [L31] ~T2_E~0 := 2; [L32] ~T3_E~0 := 2; [L33] ~T4_E~0 := 2; [L34] ~E_M~0 := 2; [L35] ~E_1~0 := 2; [L36] ~E_2~0 := 2; [L37] ~E_3~0 := 2; [L38] ~E_4~0 := 2; [L45] ~token~0 := 0; [L47] ~local~0 := 0; [L850] havoc ~__retres1~6; [L762] ~m_i~0 := 1; [L763] ~t1_i~0 := 1; [L764] ~t2_i~0 := 1; [L765] ~t3_i~0 := 1; [L766] ~t4_i~0 := 1; [L791] havoc ~kernel_st~0; [L792] havoc ~tmp~3; [L793] havoc ~tmp___0~1; [L797] ~kernel_st~0 := 0; [L355] COND TRUE 1 == ~m_i~0 [L356] ~m_st~0 := 0; [L360] COND TRUE 1 == ~t1_i~0 [L361] ~t1_st~0 := 0; [L365] COND TRUE 1 == ~t2_i~0 [L366] ~t2_st~0 := 0; [L370] COND TRUE 1 == ~t3_i~0 [L371] ~t3_st~0 := 0; [L375] COND TRUE 1 == ~t4_i~0 [L376] ~t4_st~0 := 0; [L516] COND FALSE !(0 == ~M_E~0) [L521] COND FALSE !(0 == ~T1_E~0) [L526] COND FALSE !(0 == ~T2_E~0) [L531] COND FALSE !(0 == ~T3_E~0) [L536] COND FALSE !(0 == ~T4_E~0) [L541] COND FALSE !(0 == ~E_M~0) [L546] COND FALSE !(0 == ~E_1~0) [L551] COND FALSE !(0 == ~E_2~0) [L556] COND FALSE !(0 == ~E_3~0) [L561] COND FALSE !(0 == ~E_4~0) [L629] havoc ~tmp~1; [L630] havoc ~tmp___0~0; [L631] havoc ~tmp___1~0; [L632] havoc ~tmp___2~0; [L633] havoc ~tmp___3~0; [L249] havoc ~__retres1~0; [L252] COND FALSE !(1 == ~m_pc~0) [L262] ~__retres1~0 := 0; [L264] #res := ~__retres1~0; [L637] ~tmp~1 := #t~ret8; [L637] havoc #t~ret8; [L639-L643] COND FALSE !(0 != ~tmp~1) [L268] havoc ~__retres1~1; [L271] COND FALSE !(1 == ~t1_pc~0) [L281] ~__retres1~1 := 0; [L283] #res := ~__retres1~1; [L645] ~tmp___0~0 := #t~ret9; [L645] havoc #t~ret9; [L647-L651] COND FALSE !(0 != ~tmp___0~0) [L287] havoc ~__retres1~2; [L290] COND FALSE !(1 == ~t2_pc~0) [L300] ~__retres1~2 := 0; [L302] #res := ~__retres1~2; [L653] ~tmp___1~0 := #t~ret10; [L653] havoc #t~ret10; [L655-L659] COND FALSE !(0 != ~tmp___1~0) [L306] havoc ~__retres1~3; [L309] COND FALSE !(1 == ~t3_pc~0) [L319] ~__retres1~3 := 0; [L321] #res := ~__retres1~3; [L661] ~tmp___2~0 := #t~ret11; [L661] havoc #t~ret11; [L663-L667] COND FALSE !(0 != ~tmp___2~0) [L325] havoc ~__retres1~4; [L328] COND FALSE !(1 == ~t4_pc~0) [L338] ~__retres1~4 := 0; [L340] #res := ~__retres1~4; [L669] ~tmp___3~0 := #t~ret12; [L669] havoc #t~ret12; [L671-L675] COND FALSE !(0 != ~tmp___3~0) [L574] COND FALSE !(1 == ~M_E~0) [L579] COND FALSE !(1 == ~T1_E~0) [L584] COND FALSE !(1 == ~T2_E~0) [L589] COND FALSE !(1 == ~T3_E~0) [L594] COND FALSE !(1 == ~T4_E~0) [L599] COND FALSE !(1 == ~E_M~0) [L604] COND FALSE !(1 == ~E_1~0) [L609] COND FALSE !(1 == ~E_2~0) [L614] COND FALSE !(1 == ~E_3~0) [L619] COND FALSE !(1 == ~E_4~0) [L805-L842] COND FALSE !(false) [L808] ~kernel_st~0 := 1; [L421] havoc ~tmp~0; ----- ----- class de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.CACSL2BoogieBacktranslator [L14] ~m_pc~0 := 0; [L15] ~t1_pc~0 := 0; [L16] ~t2_pc~0 := 0; [L17] ~t3_pc~0 := 0; [L18] ~t4_pc~0 := 0; [L19] ~m_st~0 := 0; [L20] ~t1_st~0 := 0; [L21] ~t2_st~0 := 0; [L22] ~t3_st~0 := 0; [L23] ~t4_st~0 := 0; [L24] ~m_i~0 := 0; [L25] ~t1_i~0 := 0; [L26] ~t2_i~0 := 0; [L27] ~t3_i~0 := 0; [L28] ~t4_i~0 := 0; [L29] ~M_E~0 := 2; [L30] ~T1_E~0 := 2; [L31] ~T2_E~0 := 2; [L32] ~T3_E~0 := 2; [L33] ~T4_E~0 := 2; [L34] ~E_M~0 := 2; [L35] ~E_1~0 := 2; [L36] ~E_2~0 := 2; [L37] ~E_3~0 := 2; [L38] ~E_4~0 := 2; [L45] ~token~0 := 0; [L47] ~local~0 := 0; [L850] havoc ~__retres1~6; [L762] ~m_i~0 := 1; [L763] ~t1_i~0 := 1; [L764] ~t2_i~0 := 1; [L765] ~t3_i~0 := 1; [L766] ~t4_i~0 := 1; [L791] havoc ~kernel_st~0; [L792] havoc ~tmp~3; [L793] havoc ~tmp___0~1; [L797] ~kernel_st~0 := 0; [L355] COND TRUE 1 == ~m_i~0 [L356] ~m_st~0 := 0; [L360] COND TRUE 1 == ~t1_i~0 [L361] ~t1_st~0 := 0; [L365] COND TRUE 1 == ~t2_i~0 [L366] ~t2_st~0 := 0; [L370] COND TRUE 1 == ~t3_i~0 [L371] ~t3_st~0 := 0; [L375] COND TRUE 1 == ~t4_i~0 [L376] ~t4_st~0 := 0; [L516] COND FALSE !(0 == ~M_E~0) [L521] COND FALSE !(0 == ~T1_E~0) [L526] COND FALSE !(0 == ~T2_E~0) [L531] COND FALSE !(0 == ~T3_E~0) [L536] COND FALSE !(0 == ~T4_E~0) [L541] COND FALSE !(0 == ~E_M~0) [L546] COND FALSE !(0 == ~E_1~0) [L551] COND FALSE !(0 == ~E_2~0) [L556] COND FALSE !(0 == ~E_3~0) [L561] COND FALSE !(0 == ~E_4~0) [L629] havoc ~tmp~1; [L630] havoc ~tmp___0~0; [L631] havoc ~tmp___1~0; [L632] havoc ~tmp___2~0; [L633] havoc ~tmp___3~0; [L249] havoc ~__retres1~0; [L252] COND FALSE !(1 == ~m_pc~0) [L262] ~__retres1~0 := 0; [L264] #res := ~__retres1~0; [L637] ~tmp~1 := #t~ret8; [L637] havoc #t~ret8; [L639-L643] COND FALSE !(0 != ~tmp~1) [L268] havoc ~__retres1~1; [L271] COND FALSE !(1 == ~t1_pc~0) [L281] ~__retres1~1 := 0; [L283] #res := ~__retres1~1; [L645] ~tmp___0~0 := #t~ret9; [L645] havoc #t~ret9; [L647-L651] COND FALSE !(0 != ~tmp___0~0) [L287] havoc ~__retres1~2; [L290] COND FALSE !(1 == ~t2_pc~0) [L300] ~__retres1~2 := 0; [L302] #res := ~__retres1~2; [L653] ~tmp___1~0 := #t~ret10; [L653] havoc #t~ret10; [L655-L659] COND FALSE !(0 != ~tmp___1~0) [L306] havoc ~__retres1~3; [L309] COND FALSE !(1 == ~t3_pc~0) [L319] ~__retres1~3 := 0; [L321] #res := ~__retres1~3; [L661] ~tmp___2~0 := #t~ret11; [L661] havoc #t~ret11; [L663-L667] COND FALSE !(0 != ~tmp___2~0) [L325] havoc ~__retres1~4; [L328] COND FALSE !(1 == ~t4_pc~0) [L338] ~__retres1~4 := 0; [L340] #res := ~__retres1~4; [L669] ~tmp___3~0 := #t~ret12; [L669] havoc #t~ret12; [L671-L675] COND FALSE !(0 != ~tmp___3~0) [L574] COND FALSE !(1 == ~M_E~0) [L579] COND FALSE !(1 == ~T1_E~0) [L584] COND FALSE !(1 == ~T2_E~0) [L589] COND FALSE !(1 == ~T3_E~0) [L594] COND FALSE !(1 == ~T4_E~0) [L599] COND FALSE !(1 == ~E_M~0) [L604] COND FALSE !(1 == ~E_1~0) [L609] COND FALSE !(1 == ~E_2~0) [L614] COND FALSE !(1 == ~E_3~0) [L619] COND FALSE !(1 == ~E_4~0) [L805-L842] COND FALSE !(false) [L808] ~kernel_st~0 := 1; [L421] havoc ~tmp~0; [L14] int m_pc = 0; [L15] int t1_pc = 0; [L16] int t2_pc = 0; [L17] int t3_pc = 0; [L18] int t4_pc = 0; [L19] int m_st ; [L20] int t1_st ; [L21] int t2_st ; [L22] int t3_st ; [L23] int t4_st ; [L24] int m_i ; [L25] int t1_i ; [L26] int t2_i ; [L27] int t3_i ; [L28] int t4_i ; [L29] int M_E = 2; [L30] int T1_E = 2; [L31] int T2_E = 2; [L32] int T3_E = 2; [L33] int T4_E = 2; [L34] int E_M = 2; [L35] int E_1 = 2; [L36] int E_2 = 2; [L37] int E_3 = 2; [L38] int E_4 = 2; [L45] int token ; [L47] int local ; [L850] int __retres1 ; [L762] m_i = 1 [L763] t1_i = 1 [L764] t2_i = 1 [L765] t3_i = 1 [L766] t4_i = 1 [L791] int kernel_st ; [L792] int tmp ; [L793] int tmp___0 ; [L797] kernel_st = 0 [L355] COND TRUE m_i == 1 [L356] m_st = 0 [L360] COND TRUE t1_i == 1 [L361] t1_st = 0 [L365] COND TRUE t2_i == 1 [L366] t2_st = 0 [L370] COND TRUE t3_i == 1 [L371] t3_st = 0 [L375] COND TRUE t4_i == 1 [L376] t4_st = 0 [L516] COND FALSE !(M_E == 0) [L521] COND FALSE !(T1_E == 0) [L526] COND FALSE !(T2_E == 0) [L531] COND FALSE !(T3_E == 0) [L536] COND FALSE !(T4_E == 0) [L541] COND FALSE !(E_M == 0) [L546] COND FALSE !(E_1 == 0) [L551] COND FALSE !(E_2 == 0) [L556] COND FALSE !(E_3 == 0) [L561] COND FALSE !(E_4 == 0) [L629] int tmp ; [L630] int tmp___0 ; [L631] int tmp___1 ; [L632] int tmp___2 ; [L633] int tmp___3 ; [L249] int __retres1 ; [L252] COND FALSE !(m_pc == 1) [L262] __retres1 = 0 [L264] return (__retres1); [L637] tmp = is_master_triggered() [L639] COND FALSE !(\read(tmp)) [L268] int __retres1 ; [L271] COND FALSE !(t1_pc == 1) [L281] __retres1 = 0 [L283] return (__retres1); [L645] tmp___0 = is_transmit1_triggered() [L647] COND FALSE !(\read(tmp___0)) [L287] int __retres1 ; [L290] COND FALSE !(t2_pc == 1) [L300] __retres1 = 0 [L302] return (__retres1); [L653] tmp___1 = is_transmit2_triggered() [L655] COND FALSE !(\read(tmp___1)) [L306] int __retres1 ; [L309] COND FALSE !(t3_pc == 1) [L319] __retres1 = 0 [L321] return (__retres1); [L661] tmp___2 = is_transmit3_triggered() [L663] COND FALSE !(\read(tmp___2)) [L325] int __retres1 ; [L328] COND FALSE !(t4_pc == 1) [L338] __retres1 = 0 [L340] return (__retres1); [L669] tmp___3 = is_transmit4_triggered() [L671] COND FALSE !(\read(tmp___3)) [L574] COND FALSE !(M_E == 1) [L579] COND FALSE !(T1_E == 1) [L584] COND FALSE !(T2_E == 1) [L589] COND FALSE !(T3_E == 1) [L594] COND FALSE !(T4_E == 1) [L599] COND FALSE !(E_M == 1) [L604] COND FALSE !(E_1 == 1) [L609] COND FALSE !(E_2 == 1) [L614] COND FALSE !(E_3 == 1) [L619] COND FALSE !(E_4 == 1) [L805] COND TRUE 1 [L808] kernel_st = 1 [L421] int tmp ; ----- ----- class de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder.RCFGBacktranslator [?] assume !false; [?] havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~5;havoc exists_runnable_thread_~__retres1~5; [?] assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~5 := 1; [?] exists_runnable_thread_#res := exists_runnable_thread_~__retres1~5; [?] eval_#t~ret2 := exists_runnable_thread_#res;eval_~tmp~0 := eval_#t~ret2;havoc eval_#t~ret2; [?] assume 0 != eval_~tmp~0; [?] assume 0 == ~m_st~0;havoc eval_~tmp_ndt_1~0;eval_~tmp_ndt_1~0 := eval_#t~nondet3;havoc eval_#t~nondet3; [?] assume !(0 != eval_~tmp_ndt_1~0); [?] assume 0 == ~t1_st~0;havoc eval_~tmp_ndt_2~0;eval_~tmp_ndt_2~0 := eval_#t~nondet4;havoc eval_#t~nondet4; [?] assume !(0 != eval_~tmp_ndt_2~0); [?] assume 0 == ~t2_st~0;havoc eval_~tmp_ndt_3~0;eval_~tmp_ndt_3~0 := eval_#t~nondet5;havoc eval_#t~nondet5; [?] assume !(0 != eval_~tmp_ndt_3~0); [?] assume 0 == ~t3_st~0;havoc eval_~tmp_ndt_4~0;eval_~tmp_ndt_4~0 := eval_#t~nondet6;havoc eval_#t~nondet6; [?] assume !(0 != eval_~tmp_ndt_4~0); [?] assume 0 == ~t4_st~0;havoc eval_~tmp_ndt_5~0;eval_~tmp_ndt_5~0 := eval_#t~nondet7;havoc eval_#t~nondet7; [?] assume !(0 != eval_~tmp_ndt_5~0); [L425-L505] assume !false; [L428] havoc exists_runnable_thread_#res; [L428] havoc exists_runnable_thread_~__retres1~5; [L385] havoc exists_runnable_thread_~__retres1~5; [L388-L413] assume 0 == ~m_st~0; [L389] exists_runnable_thread_~__retres1~5 := 1; [L416] exists_runnable_thread_#res := exists_runnable_thread_~__retres1~5; [L428] eval_#t~ret2 := exists_runnable_thread_#res; [L428] eval_~tmp~0 := eval_#t~ret2; [L428] havoc eval_#t~ret2; [L430-L434] assume 0 != eval_~tmp~0; [L435-L448] assume 0 == ~m_st~0; [L436] havoc eval_~tmp_ndt_1~0; [L437] eval_~tmp_ndt_1~0 := eval_#t~nondet3; [L437] havoc eval_#t~nondet3; [L438-L445] assume !(0 != eval_~tmp_ndt_1~0); [L449-L462] assume 0 == ~t1_st~0; [L450] havoc eval_~tmp_ndt_2~0; [L451] eval_~tmp_ndt_2~0 := eval_#t~nondet4; [L451] havoc eval_#t~nondet4; [L452-L459] assume !(0 != eval_~tmp_ndt_2~0); [L463-L476] assume 0 == ~t2_st~0; [L464] havoc eval_~tmp_ndt_3~0; [L465] eval_~tmp_ndt_3~0 := eval_#t~nondet5; [L465] havoc eval_#t~nondet5; [L466-L473] assume !(0 != eval_~tmp_ndt_3~0); [L477-L490] assume 0 == ~t3_st~0; [L478] havoc eval_~tmp_ndt_4~0; [L479] eval_~tmp_ndt_4~0 := eval_#t~nondet6; [L479] havoc eval_#t~nondet6; [L480-L487] assume !(0 != eval_~tmp_ndt_4~0); [L491-L504] assume 0 == ~t4_st~0; [L492] havoc eval_~tmp_ndt_5~0; [L493] eval_~tmp_ndt_5~0 := eval_#t~nondet7; [L493] havoc eval_#t~nondet7; [L494-L501] assume !(0 != eval_~tmp_ndt_5~0); ----- ----- class de.uni_freiburg.informatik.ultimate.boogie.preprocessor.BoogiePreprocessorBacktranslator [L425-L505] assume !false; [L428] havoc exists_runnable_thread_#res; [L428] havoc exists_runnable_thread_~__retres1~5; [L385] havoc exists_runnable_thread_~__retres1~5; [L388-L413] assume 0 == ~m_st~0; [L389] exists_runnable_thread_~__retres1~5 := 1; [L416] exists_runnable_thread_#res := exists_runnable_thread_~__retres1~5; [L428] eval_#t~ret2 := exists_runnable_thread_#res; [L428] eval_~tmp~0 := eval_#t~ret2; [L428] havoc eval_#t~ret2; [L430-L434] assume 0 != eval_~tmp~0; [L435-L448] assume 0 == ~m_st~0; [L436] havoc eval_~tmp_ndt_1~0; [L437] eval_~tmp_ndt_1~0 := eval_#t~nondet3; [L437] havoc eval_#t~nondet3; [L438-L445] assume !(0 != eval_~tmp_ndt_1~0); [L449-L462] assume 0 == ~t1_st~0; [L450] havoc eval_~tmp_ndt_2~0; [L451] eval_~tmp_ndt_2~0 := eval_#t~nondet4; [L451] havoc eval_#t~nondet4; [L452-L459] assume !(0 != eval_~tmp_ndt_2~0); [L463-L476] assume 0 == ~t2_st~0; [L464] havoc eval_~tmp_ndt_3~0; [L465] eval_~tmp_ndt_3~0 := eval_#t~nondet5; [L465] havoc eval_#t~nondet5; [L466-L473] assume !(0 != eval_~tmp_ndt_3~0); [L477-L490] assume 0 == ~t3_st~0; [L478] havoc eval_~tmp_ndt_4~0; [L479] eval_~tmp_ndt_4~0 := eval_#t~nondet6; [L479] havoc eval_#t~nondet6; [L480-L487] assume !(0 != eval_~tmp_ndt_4~0); [L491-L504] assume 0 == ~t4_st~0; [L492] havoc eval_~tmp_ndt_5~0; [L493] eval_~tmp_ndt_5~0 := eval_#t~nondet7; [L493] havoc eval_#t~nondet7; [L494-L501] assume !(0 != eval_~tmp_ndt_5~0); [L425-L505] COND FALSE !(false) [L428] havoc exists_runnable_thread_#res; [L428] havoc exists_runnable_thread_~__retres1~5; [L385] havoc exists_runnable_thread_~__retres1~5; [L388] COND TRUE 0 == ~m_st~0 [L389] exists_runnable_thread_~__retres1~5 := 1; [L416] exists_runnable_thread_#res := exists_runnable_thread_~__retres1~5; [L428] eval_#t~ret2 := exists_runnable_thread_#res; [L428] eval_~tmp~0 := eval_#t~ret2; [L428] havoc eval_#t~ret2; [L430-L434] COND TRUE 0 != eval_~tmp~0 [L435] COND TRUE 0 == ~m_st~0 [L436] havoc eval_~tmp_ndt_1~0; [L437] eval_~tmp_ndt_1~0 := eval_#t~nondet3; [L437] havoc eval_#t~nondet3; [L438-L445] COND FALSE !(0 != eval_~tmp_ndt_1~0) [L449] COND TRUE 0 == ~t1_st~0 [L450] havoc eval_~tmp_ndt_2~0; [L451] eval_~tmp_ndt_2~0 := eval_#t~nondet4; [L451] havoc eval_#t~nondet4; [L452-L459] COND FALSE !(0 != eval_~tmp_ndt_2~0) [L463] COND TRUE 0 == ~t2_st~0 [L464] havoc eval_~tmp_ndt_3~0; [L465] eval_~tmp_ndt_3~0 := eval_#t~nondet5; [L465] havoc eval_#t~nondet5; [L466-L473] COND FALSE !(0 != eval_~tmp_ndt_3~0) [L477] COND TRUE 0 == ~t3_st~0 [L478] havoc eval_~tmp_ndt_4~0; [L479] eval_~tmp_ndt_4~0 := eval_#t~nondet6; [L479] havoc eval_#t~nondet6; [L480-L487] COND FALSE !(0 != eval_~tmp_ndt_4~0) [L491] COND TRUE 0 == ~t4_st~0 [L492] havoc eval_~tmp_ndt_5~0; [L493] eval_~tmp_ndt_5~0 := eval_#t~nondet7; [L493] havoc eval_#t~nondet7; [L494-L501] COND FALSE !(0 != eval_~tmp_ndt_5~0) ----- ----- class de.uni_freiburg.informatik.ultimate.boogie.procedureinliner.backtranslation.InlinerBacktranslator [L425-L505] COND FALSE !(false) [L428] havoc exists_runnable_thread_#res; [L428] havoc exists_runnable_thread_~__retres1~5; [L385] havoc exists_runnable_thread_~__retres1~5; [L388] COND TRUE 0 == ~m_st~0 [L389] exists_runnable_thread_~__retres1~5 := 1; [L416] exists_runnable_thread_#res := exists_runnable_thread_~__retres1~5; [L428] eval_#t~ret2 := exists_runnable_thread_#res; [L428] eval_~tmp~0 := eval_#t~ret2; [L428] havoc eval_#t~ret2; [L430-L434] COND TRUE 0 != eval_~tmp~0 [L435] COND TRUE 0 == ~m_st~0 [L436] havoc eval_~tmp_ndt_1~0; [L437] eval_~tmp_ndt_1~0 := eval_#t~nondet3; [L437] havoc eval_#t~nondet3; [L438-L445] COND FALSE !(0 != eval_~tmp_ndt_1~0) [L449] COND TRUE 0 == ~t1_st~0 [L450] havoc eval_~tmp_ndt_2~0; [L451] eval_~tmp_ndt_2~0 := eval_#t~nondet4; [L451] havoc eval_#t~nondet4; [L452-L459] COND FALSE !(0 != eval_~tmp_ndt_2~0) [L463] COND TRUE 0 == ~t2_st~0 [L464] havoc eval_~tmp_ndt_3~0; [L465] eval_~tmp_ndt_3~0 := eval_#t~nondet5; [L465] havoc eval_#t~nondet5; [L466-L473] COND FALSE !(0 != eval_~tmp_ndt_3~0) [L477] COND TRUE 0 == ~t3_st~0 [L478] havoc eval_~tmp_ndt_4~0; [L479] eval_~tmp_ndt_4~0 := eval_#t~nondet6; [L479] havoc eval_#t~nondet6; [L480-L487] COND FALSE !(0 != eval_~tmp_ndt_4~0) [L491] COND TRUE 0 == ~t4_st~0 [L492] havoc eval_~tmp_ndt_5~0; [L493] eval_~tmp_ndt_5~0 := eval_#t~nondet7; [L493] havoc eval_#t~nondet7; [L494-L501] COND FALSE !(0 != eval_~tmp_ndt_5~0) [L425-L505] COND FALSE !(false) [L385] havoc ~__retres1~5; [L388] COND TRUE 0 == ~m_st~0 [L389] ~__retres1~5 := 1; [L416] #res := ~__retres1~5; [L428] ~tmp~0 := #t~ret2; [L428] havoc #t~ret2; [L430-L434] COND TRUE 0 != ~tmp~0 [L435] COND TRUE 0 == ~m_st~0 [L436] havoc ~tmp_ndt_1~0; [L437] ~tmp_ndt_1~0 := #t~nondet3; [L437] havoc #t~nondet3; [L438-L445] COND FALSE !(0 != ~tmp_ndt_1~0) [L449] COND TRUE 0 == ~t1_st~0 [L450] havoc ~tmp_ndt_2~0; [L451] ~tmp_ndt_2~0 := #t~nondet4; [L451] havoc #t~nondet4; [L452-L459] COND FALSE !(0 != ~tmp_ndt_2~0) [L463] COND TRUE 0 == ~t2_st~0 [L464] havoc ~tmp_ndt_3~0; [L465] ~tmp_ndt_3~0 := #t~nondet5; [L465] havoc #t~nondet5; [L466-L473] COND FALSE !(0 != ~tmp_ndt_3~0) [L477] COND TRUE 0 == ~t3_st~0 [L478] havoc ~tmp_ndt_4~0; [L479] ~tmp_ndt_4~0 := #t~nondet6; [L479] havoc #t~nondet6; [L480-L487] COND FALSE !(0 != ~tmp_ndt_4~0) [L491] COND TRUE 0 == ~t4_st~0 [L492] havoc ~tmp_ndt_5~0; [L493] ~tmp_ndt_5~0 := #t~nondet7; [L493] havoc #t~nondet7; [L494-L501] COND FALSE !(0 != ~tmp_ndt_5~0) ----- ----- class de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.CACSL2BoogieBacktranslator [L425-L505] COND FALSE !(false) [L385] havoc ~__retres1~5; [L388] COND TRUE 0 == ~m_st~0 [L389] ~__retres1~5 := 1; [L416] #res := ~__retres1~5; [L428] ~tmp~0 := #t~ret2; [L428] havoc #t~ret2; [L430-L434] COND TRUE 0 != ~tmp~0 [L435] COND TRUE 0 == ~m_st~0 [L436] havoc ~tmp_ndt_1~0; [L437] ~tmp_ndt_1~0 := #t~nondet3; [L437] havoc #t~nondet3; [L438-L445] COND FALSE !(0 != ~tmp_ndt_1~0) [L449] COND TRUE 0 == ~t1_st~0 [L450] havoc ~tmp_ndt_2~0; [L451] ~tmp_ndt_2~0 := #t~nondet4; [L451] havoc #t~nondet4; [L452-L459] COND FALSE !(0 != ~tmp_ndt_2~0) [L463] COND TRUE 0 == ~t2_st~0 [L464] havoc ~tmp_ndt_3~0; [L465] ~tmp_ndt_3~0 := #t~nondet5; [L465] havoc #t~nondet5; [L466-L473] COND FALSE !(0 != ~tmp_ndt_3~0) [L477] COND TRUE 0 == ~t3_st~0 [L478] havoc ~tmp_ndt_4~0; [L479] ~tmp_ndt_4~0 := #t~nondet6; [L479] havoc #t~nondet6; [L480-L487] COND FALSE !(0 != ~tmp_ndt_4~0) [L491] COND TRUE 0 == ~t4_st~0 [L492] havoc ~tmp_ndt_5~0; [L493] ~tmp_ndt_5~0 := #t~nondet7; [L493] havoc #t~nondet7; [L494-L501] COND FALSE !(0 != ~tmp_ndt_5~0) [L425] COND TRUE 1 [L385] int __retres1 ; [L388] COND TRUE m_st == 0 [L389] __retres1 = 1 [L416] return (__retres1); [L428] tmp = exists_runnable_thread() [L430] COND TRUE \read(tmp) [L435] COND TRUE m_st == 0 [L436] int tmp_ndt_1; [L437] tmp_ndt_1 = __VERIFIER_nondet_int() [L438] COND FALSE !(\read(tmp_ndt_1)) [L449] COND TRUE t1_st == 0 [L450] int tmp_ndt_2; [L451] tmp_ndt_2 = __VERIFIER_nondet_int() [L452] COND FALSE !(\read(tmp_ndt_2)) [L463] COND TRUE t2_st == 0 [L464] int tmp_ndt_3; [L465] tmp_ndt_3 = __VERIFIER_nondet_int() [L466] COND FALSE !(\read(tmp_ndt_3)) [L477] COND TRUE t3_st == 0 [L478] int tmp_ndt_4; [L479] tmp_ndt_4 = __VERIFIER_nondet_int() [L480] COND FALSE !(\read(tmp_ndt_4)) [L491] COND TRUE t4_st == 0 [L492] int tmp_ndt_5; [L493] tmp_ndt_5 = __VERIFIER_nondet_int() [L494] COND FALSE !(\read(tmp_ndt_5)) ----- Found a nonterminating execution for the following lasso shaped sequence of statements. Stem: [L14] int m_pc = 0; [L15] int t1_pc = 0; [L16] int t2_pc = 0; [L17] int t3_pc = 0; [L18] int t4_pc = 0; [L19] int m_st ; [L20] int t1_st ; [L21] int t2_st ; [L22] int t3_st ; [L23] int t4_st ; [L24] int m_i ; [L25] int t1_i ; [L26] int t2_i ; [L27] int t3_i ; [L28] int t4_i ; [L29] int M_E = 2; [L30] int T1_E = 2; [L31] int T2_E = 2; [L32] int T3_E = 2; [L33] int T4_E = 2; [L34] int E_M = 2; [L35] int E_1 = 2; [L36] int E_2 = 2; [L37] int E_3 = 2; [L38] int E_4 = 2; [L45] int token ; [L47] int local ; [L850] int __retres1 ; [L762] m_i = 1 [L763] t1_i = 1 [L764] t2_i = 1 [L765] t3_i = 1 [L766] t4_i = 1 [L791] int kernel_st ; [L792] int tmp ; [L793] int tmp___0 ; [L797] kernel_st = 0 [L355] COND TRUE m_i == 1 [L356] m_st = 0 [L360] COND TRUE t1_i == 1 [L361] t1_st = 0 [L365] COND TRUE t2_i == 1 [L366] t2_st = 0 [L370] COND TRUE t3_i == 1 [L371] t3_st = 0 [L375] COND TRUE t4_i == 1 [L376] t4_st = 0 [L516] COND FALSE !(M_E == 0) [L521] COND FALSE !(T1_E == 0) [L526] COND FALSE !(T2_E == 0) [L531] COND FALSE !(T3_E == 0) [L536] COND FALSE !(T4_E == 0) [L541] COND FALSE !(E_M == 0) [L546] COND FALSE !(E_1 == 0) [L551] COND FALSE !(E_2 == 0) [L556] COND FALSE !(E_3 == 0) [L561] COND FALSE !(E_4 == 0) [L629] int tmp ; [L630] int tmp___0 ; [L631] int tmp___1 ; [L632] int tmp___2 ; [L633] int tmp___3 ; [L249] int __retres1 ; [L252] COND FALSE !(m_pc == 1) [L262] __retres1 = 0 [L264] return (__retres1); [L637] tmp = is_master_triggered() [L639] COND FALSE !(\read(tmp)) [L268] int __retres1 ; [L271] COND FALSE !(t1_pc == 1) [L281] __retres1 = 0 [L283] return (__retres1); [L645] tmp___0 = is_transmit1_triggered() [L647] COND FALSE !(\read(tmp___0)) [L287] int __retres1 ; [L290] COND FALSE !(t2_pc == 1) [L300] __retres1 = 0 [L302] return (__retres1); [L653] tmp___1 = is_transmit2_triggered() [L655] COND FALSE !(\read(tmp___1)) [L306] int __retres1 ; [L309] COND FALSE !(t3_pc == 1) [L319] __retres1 = 0 [L321] return (__retres1); [L661] tmp___2 = is_transmit3_triggered() [L663] COND FALSE !(\read(tmp___2)) [L325] int __retres1 ; [L328] COND FALSE !(t4_pc == 1) [L338] __retres1 = 0 [L340] return (__retres1); [L669] tmp___3 = is_transmit4_triggered() [L671] COND FALSE !(\read(tmp___3)) [L574] COND FALSE !(M_E == 1) [L579] COND FALSE !(T1_E == 1) [L584] COND FALSE !(T2_E == 1) [L589] COND FALSE !(T3_E == 1) [L594] COND FALSE !(T4_E == 1) [L599] COND FALSE !(E_M == 1) [L604] COND FALSE !(E_1 == 1) [L609] COND FALSE !(E_2 == 1) [L614] COND FALSE !(E_3 == 1) [L619] COND FALSE !(E_4 == 1) [L805] COND TRUE 1 [L808] kernel_st = 1 [L421] int tmp ; Loop: [L425] COND TRUE 1 [L385] int __retres1 ; [L388] COND TRUE m_st == 0 [L389] __retres1 = 1 [L416] return (__retres1); [L428] tmp = exists_runnable_thread() [L430] COND TRUE \read(tmp) [L435] COND TRUE m_st == 0 [L436] int tmp_ndt_1; [L437] tmp_ndt_1 = __VERIFIER_nondet_int() [L438] COND FALSE !(\read(tmp_ndt_1)) [L449] COND TRUE t1_st == 0 [L450] int tmp_ndt_2; [L451] tmp_ndt_2 = __VERIFIER_nondet_int() [L452] COND FALSE !(\read(tmp_ndt_2)) [L463] COND TRUE t2_st == 0 [L464] int tmp_ndt_3; [L465] tmp_ndt_3 = __VERIFIER_nondet_int() [L466] COND FALSE !(\read(tmp_ndt_3)) [L477] COND TRUE t3_st == 0 [L478] int tmp_ndt_4; [L479] tmp_ndt_4 = __VERIFIER_nondet_int() [L480] COND FALSE !(\read(tmp_ndt_4)) [L491] COND TRUE t4_st == 0 [L492] int tmp_ndt_5; [L493] tmp_ndt_5 = __VERIFIER_nondet_int() [L494] COND FALSE !(\read(tmp_ndt_5)) End of lasso representation. RESULT: Ultimate proved your program to be incorrect! Received shutdown request...