./Ultimate.py --spec ../../sv-benchmarks/c/properties/valid-memsafety.prp --file ../../sv-benchmarks/c/ldv-memsafety/memleaks_test11_1_false-valid-free.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for memory safety (deref-memtrack) Using default analysis Version 0cd3be1d Calling Ultimate with: java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/working_dir_1e8e50a6-f126-479e-a638-232b4e04c0c9/bin-2019/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/working_dir_1e8e50a6-f126-479e-a638-232b4e04c0c9/bin-2019/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/working_dir_1e8e50a6-f126-479e-a638-232b4e04c0c9/bin-2019/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/working_dir_1e8e50a6-f126-479e-a638-232b4e04c0c9/bin-2019/uautomizer/config/AutomizerMemDerefMemtrack.xml -i ../../sv-benchmarks/c/ldv-memsafety/memleaks_test11_1_false-valid-free.i -s /tmp/vcloud-vcloud-master/worker/working_dir_1e8e50a6-f126-479e-a638-232b4e04c0c9/bin-2019/uautomizer/config/svcomp-DerefFreeMemtrack-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/working_dir_1e8e50a6-f126-479e-a638-232b4e04c0c9/bin-2019/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G valid-free) ) CHECK( init(main()), LTL(G valid-deref) ) CHECK( init(main()), LTL(G valid-memtrack) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 41595dc52c6906fb55de72b138967114013fb2be ............................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE(valid-free) --- Real Ultimate output --- This is Ultimate 0.1.23-0cd3be1 [2018-11-28 13:06:05,346 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-11-28 13:06:05,347 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-11-28 13:06:05,357 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-11-28 13:06:05,357 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-11-28 13:06:05,358 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-11-28 13:06:05,359 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-11-28 13:06:05,360 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-11-28 13:06:05,362 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-11-28 13:06:05,363 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-11-28 13:06:05,364 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-11-28 13:06:05,364 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-11-28 13:06:05,365 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-11-28 13:06:05,366 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-11-28 13:06:05,367 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-11-28 13:06:05,367 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-11-28 13:06:05,368 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-11-28 13:06:05,370 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-11-28 13:06:05,371 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-11-28 13:06:05,373 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-11-28 13:06:05,374 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-11-28 13:06:05,375 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-11-28 13:06:05,377 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-11-28 13:06:05,377 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-11-28 13:06:05,378 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-11-28 13:06:05,378 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-11-28 13:06:05,379 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-11-28 13:06:05,380 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-11-28 13:06:05,381 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-11-28 13:06:05,382 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-11-28 13:06:05,382 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-11-28 13:06:05,382 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-11-28 13:06:05,383 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-11-28 13:06:05,383 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-11-28 13:06:05,384 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-11-28 13:06:05,384 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-11-28 13:06:05,385 INFO L98 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/working_dir_1e8e50a6-f126-479e-a638-232b4e04c0c9/bin-2019/uautomizer/config/svcomp-DerefFreeMemtrack-32bit-Automizer_Default.epf [2018-11-28 13:06:05,395 INFO L110 SettingsManager]: Loading preferences was successful [2018-11-28 13:06:05,395 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-11-28 13:06:05,396 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-11-28 13:06:05,396 INFO L133 SettingsManager]: * ... calls to implemented procedures=ONLY_FOR_CONCURRENT_PROGRAMS [2018-11-28 13:06:05,396 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-11-28 13:06:05,397 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-11-28 13:06:05,397 INFO L133 SettingsManager]: * Use SBE=true [2018-11-28 13:06:05,397 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-11-28 13:06:05,397 INFO L133 SettingsManager]: * sizeof long=4 [2018-11-28 13:06:05,397 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-11-28 13:06:05,397 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-11-28 13:06:05,398 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-11-28 13:06:05,398 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-11-28 13:06:05,398 INFO L133 SettingsManager]: * Check for the main procedure if all allocated memory was freed=true [2018-11-28 13:06:05,398 INFO L133 SettingsManager]: * Bitprecise bitfields=true [2018-11-28 13:06:05,398 INFO L133 SettingsManager]: * SV-COMP memtrack compatibility mode=true [2018-11-28 13:06:05,398 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-11-28 13:06:05,398 INFO L133 SettingsManager]: * sizeof long double=12 [2018-11-28 13:06:05,398 INFO L133 SettingsManager]: * Use constant arrays=true [2018-11-28 13:06:05,399 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-11-28 13:06:05,399 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-11-28 13:06:05,399 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-11-28 13:06:05,399 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-11-28 13:06:05,399 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-28 13:06:05,399 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-11-28 13:06:05,399 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-11-28 13:06:05,399 INFO L133 SettingsManager]: * Trace refinement strategy=CAMEL [2018-11-28 13:06:05,399 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-11-28 13:06:05,399 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/working_dir_1e8e50a6-f126-479e-a638-232b4e04c0c9/bin-2019/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G valid-free) ) CHECK( init(main()), LTL(G valid-deref) ) CHECK( init(main()), LTL(G valid-memtrack) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 41595dc52c6906fb55de72b138967114013fb2be [2018-11-28 13:06:05,430 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-11-28 13:06:05,442 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-11-28 13:06:05,445 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-11-28 13:06:05,447 INFO L271 PluginConnector]: Initializing CDTParser... [2018-11-28 13:06:05,447 INFO L276 PluginConnector]: CDTParser initialized [2018-11-28 13:06:05,448 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/working_dir_1e8e50a6-f126-479e-a638-232b4e04c0c9/bin-2019/uautomizer/../../sv-benchmarks/c/ldv-memsafety/memleaks_test11_1_false-valid-free.i [2018-11-28 13:06:05,504 INFO L221 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_1e8e50a6-f126-479e-a638-232b4e04c0c9/bin-2019/uautomizer/data/f6699813c/47cf5fb4dba34a25af17469248d41820/FLAG22b259843 [2018-11-28 13:06:05,920 INFO L307 CDTParser]: Found 1 translation units. [2018-11-28 13:06:05,921 INFO L161 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/working_dir_1e8e50a6-f126-479e-a638-232b4e04c0c9/sv-benchmarks/c/ldv-memsafety/memleaks_test11_1_false-valid-free.i [2018-11-28 13:06:05,933 INFO L355 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/working_dir_1e8e50a6-f126-479e-a638-232b4e04c0c9/bin-2019/uautomizer/data/f6699813c/47cf5fb4dba34a25af17469248d41820/FLAG22b259843 [2018-11-28 13:06:05,946 INFO L363 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/working_dir_1e8e50a6-f126-479e-a638-232b4e04c0c9/bin-2019/uautomizer/data/f6699813c/47cf5fb4dba34a25af17469248d41820 [2018-11-28 13:06:05,949 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-11-28 13:06:05,950 INFO L131 ToolchainWalker]: Walking toolchain with 5 elements. [2018-11-28 13:06:05,951 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-11-28 13:06:05,951 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-11-28 13:06:05,954 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-11-28 13:06:05,954 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.11 01:06:05" (1/1) ... [2018-11-28 13:06:05,956 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@6a34a792 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 01:06:05, skipping insertion in model container [2018-11-28 13:06:05,957 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.11 01:06:05" (1/1) ... [2018-11-28 13:06:05,962 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2018-11-28 13:06:05,999 INFO L176 MainTranslator]: Built tables and reachable declarations [2018-11-28 13:06:06,341 INFO L203 PostProcessor]: Analyzing one entry point: main [2018-11-28 13:06:06,357 INFO L191 MainTranslator]: Completed pre-run [2018-11-28 13:06:06,406 INFO L203 PostProcessor]: Analyzing one entry point: main [2018-11-28 13:06:06,473 INFO L195 MainTranslator]: Completed translation [2018-11-28 13:06:06,474 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 01:06:06 WrapperNode [2018-11-28 13:06:06,474 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-11-28 13:06:06,475 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-11-28 13:06:06,475 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-11-28 13:06:06,475 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-11-28 13:06:06,490 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 01:06:06" (1/1) ... [2018-11-28 13:06:06,490 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 01:06:06" (1/1) ... [2018-11-28 13:06:06,510 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 01:06:06" (1/1) ... [2018-11-28 13:06:06,510 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 01:06:06" (1/1) ... [2018-11-28 13:06:06,539 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 01:06:06" (1/1) ... [2018-11-28 13:06:06,545 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 01:06:06" (1/1) ... [2018-11-28 13:06:06,552 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 01:06:06" (1/1) ... [2018-11-28 13:06:06,560 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-11-28 13:06:06,561 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-11-28 13:06:06,561 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-11-28 13:06:06,561 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-11-28 13:06:06,562 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 01:06:06" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_1e8e50a6-f126-479e-a638-232b4e04c0c9/bin-2019/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-11-28 13:06:06,613 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-11-28 13:06:06,613 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-11-28 13:06:06,613 INFO L138 BoogieDeclarations]: Found implementation of procedure ##fun~$Pointer$~TO~VOID [2018-11-28 13:06:06,613 INFO L138 BoogieDeclarations]: Found implementation of procedure __bswap_32 [2018-11-28 13:06:06,613 INFO L138 BoogieDeclarations]: Found implementation of procedure __bswap_64 [2018-11-28 13:06:06,614 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_nonpositive [2018-11-28 13:06:06,614 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_positive [2018-11-28 13:06:06,614 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_malloc [2018-11-28 13:06:06,614 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_zalloc [2018-11-28 13:06:06,614 INFO L138 BoogieDeclarations]: Found implementation of procedure LDV_INIT_LIST_HEAD [2018-11-28 13:06:06,614 INFO L138 BoogieDeclarations]: Found implementation of procedure __ldv_list_add [2018-11-28 13:06:06,614 INFO L138 BoogieDeclarations]: Found implementation of procedure __ldv_list_del [2018-11-28 13:06:06,615 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_list_add [2018-11-28 13:06:06,615 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_list_add_tail [2018-11-28 13:06:06,615 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_list_del [2018-11-28 13:06:06,615 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_msg_alloc [2018-11-28 13:06:06,615 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_msg_fill [2018-11-28 13:06:06,615 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_msg_free [2018-11-28 13:06:06,615 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_submit_msg [2018-11-28 13:06:06,615 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_destroy_msgs [2018-11-28 13:06:06,616 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_dev_get_drvdata [2018-11-28 13:06:06,616 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_dev_set_drvdata [2018-11-28 13:06:06,616 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_atomic_add_return [2018-11-28 13:06:06,616 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_atomic_sub_return [2018-11-28 13:06:06,616 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kref_sub [2018-11-28 13:06:06,616 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kref_init [2018-11-28 13:06:06,616 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kref_get [2018-11-28 13:06:06,616 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kref_put [2018-11-28 13:06:06,617 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_del [2018-11-28 13:06:06,617 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_cleanup [2018-11-28 13:06:06,617 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_release [2018-11-28 13:06:06,617 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_put [2018-11-28 13:06:06,617 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_get [2018-11-28 13:06:06,617 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_init_internal [2018-11-28 13:06:06,617 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_init [2018-11-28 13:06:06,617 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_kobject_create [2018-11-28 13:06:06,618 INFO L138 BoogieDeclarations]: Found implementation of procedure f [2018-11-28 13:06:06,618 INFO L138 BoogieDeclarations]: Found implementation of procedure g [2018-11-28 13:06:06,618 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_i2c_get_clientdata [2018-11-28 13:06:06,618 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_i2c_set_clientdata [2018-11-28 13:06:06,618 INFO L138 BoogieDeclarations]: Found implementation of procedure alloc_2_11 [2018-11-28 13:06:06,618 INFO L138 BoogieDeclarations]: Found implementation of procedure free_11 [2018-11-28 13:06:06,618 INFO L138 BoogieDeclarations]: Found implementation of procedure entry_point [2018-11-28 13:06:06,618 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2018-11-28 13:06:06,619 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset [2018-11-28 13:06:06,619 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.meminit [2018-11-28 13:06:06,619 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memcpy [2018-11-28 13:06:06,619 INFO L130 BoogieDeclarations]: Found specification of procedure __bswap_32 [2018-11-28 13:06:06,619 INFO L130 BoogieDeclarations]: Found specification of procedure __bswap_64 [2018-11-28 13:06:06,619 INFO L130 BoogieDeclarations]: Found specification of procedure __ctype_get_mb_cur_max [2018-11-28 13:06:06,619 INFO L130 BoogieDeclarations]: Found specification of procedure atof [2018-11-28 13:06:06,619 INFO L130 BoogieDeclarations]: Found specification of procedure atoi [2018-11-28 13:06:06,620 INFO L130 BoogieDeclarations]: Found specification of procedure atol [2018-11-28 13:06:06,620 INFO L130 BoogieDeclarations]: Found specification of procedure atoll [2018-11-28 13:06:06,620 INFO L130 BoogieDeclarations]: Found specification of procedure strtod [2018-11-28 13:06:06,620 INFO L130 BoogieDeclarations]: Found specification of procedure strtof [2018-11-28 13:06:06,620 INFO L130 BoogieDeclarations]: Found specification of procedure strtold [2018-11-28 13:06:06,620 INFO L130 BoogieDeclarations]: Found specification of procedure strtol [2018-11-28 13:06:06,620 INFO L130 BoogieDeclarations]: Found specification of procedure strtoul [2018-11-28 13:06:06,620 INFO L130 BoogieDeclarations]: Found specification of procedure strtoq [2018-11-28 13:06:06,620 INFO L130 BoogieDeclarations]: Found specification of procedure strtouq [2018-11-28 13:06:06,621 INFO L130 BoogieDeclarations]: Found specification of procedure strtoll [2018-11-28 13:06:06,621 INFO L130 BoogieDeclarations]: Found specification of procedure strtoull [2018-11-28 13:06:06,621 INFO L130 BoogieDeclarations]: Found specification of procedure l64a [2018-11-28 13:06:06,621 INFO L130 BoogieDeclarations]: Found specification of procedure a64l [2018-11-28 13:06:06,621 INFO L130 BoogieDeclarations]: Found specification of procedure select [2018-11-28 13:06:06,621 INFO L130 BoogieDeclarations]: Found specification of procedure pselect [2018-11-28 13:06:06,621 INFO L130 BoogieDeclarations]: Found specification of procedure gnu_dev_major [2018-11-28 13:06:06,621 INFO L130 BoogieDeclarations]: Found specification of procedure gnu_dev_minor [2018-11-28 13:06:06,622 INFO L130 BoogieDeclarations]: Found specification of procedure gnu_dev_makedev [2018-11-28 13:06:06,622 INFO L130 BoogieDeclarations]: Found specification of procedure random [2018-11-28 13:06:06,622 INFO L130 BoogieDeclarations]: Found specification of procedure srandom [2018-11-28 13:06:06,622 INFO L130 BoogieDeclarations]: Found specification of procedure initstate [2018-11-28 13:06:06,622 INFO L130 BoogieDeclarations]: Found specification of procedure setstate [2018-11-28 13:06:06,622 INFO L130 BoogieDeclarations]: Found specification of procedure random_r [2018-11-28 13:06:06,622 INFO L130 BoogieDeclarations]: Found specification of procedure srandom_r [2018-11-28 13:06:06,622 INFO L130 BoogieDeclarations]: Found specification of procedure initstate_r [2018-11-28 13:06:06,623 INFO L130 BoogieDeclarations]: Found specification of procedure setstate_r [2018-11-28 13:06:06,623 INFO L130 BoogieDeclarations]: Found specification of procedure rand [2018-11-28 13:06:06,623 INFO L130 BoogieDeclarations]: Found specification of procedure srand [2018-11-28 13:06:06,623 INFO L130 BoogieDeclarations]: Found specification of procedure rand_r [2018-11-28 13:06:06,623 INFO L130 BoogieDeclarations]: Found specification of procedure drand48 [2018-11-28 13:06:06,623 INFO L130 BoogieDeclarations]: Found specification of procedure erand48 [2018-11-28 13:06:06,623 INFO L130 BoogieDeclarations]: Found specification of procedure lrand48 [2018-11-28 13:06:06,623 INFO L130 BoogieDeclarations]: Found specification of procedure nrand48 [2018-11-28 13:06:06,623 INFO L130 BoogieDeclarations]: Found specification of procedure mrand48 [2018-11-28 13:06:06,624 INFO L130 BoogieDeclarations]: Found specification of procedure jrand48 [2018-11-28 13:06:06,624 INFO L130 BoogieDeclarations]: Found specification of procedure srand48 [2018-11-28 13:06:06,624 INFO L130 BoogieDeclarations]: Found specification of procedure seed48 [2018-11-28 13:06:06,624 INFO L130 BoogieDeclarations]: Found specification of procedure lcong48 [2018-11-28 13:06:06,624 INFO L130 BoogieDeclarations]: Found specification of procedure drand48_r [2018-11-28 13:06:06,624 INFO L130 BoogieDeclarations]: Found specification of procedure erand48_r [2018-11-28 13:06:06,624 INFO L130 BoogieDeclarations]: Found specification of procedure lrand48_r [2018-11-28 13:06:06,624 INFO L130 BoogieDeclarations]: Found specification of procedure nrand48_r [2018-11-28 13:06:06,625 INFO L130 BoogieDeclarations]: Found specification of procedure mrand48_r [2018-11-28 13:06:06,625 INFO L130 BoogieDeclarations]: Found specification of procedure jrand48_r [2018-11-28 13:06:06,625 INFO L130 BoogieDeclarations]: Found specification of procedure srand48_r [2018-11-28 13:06:06,625 INFO L130 BoogieDeclarations]: Found specification of procedure seed48_r [2018-11-28 13:06:06,625 INFO L130 BoogieDeclarations]: Found specification of procedure lcong48_r [2018-11-28 13:06:06,625 INFO L130 BoogieDeclarations]: Found specification of procedure malloc [2018-11-28 13:06:06,625 INFO L130 BoogieDeclarations]: Found specification of procedure calloc [2018-11-28 13:06:06,625 INFO L130 BoogieDeclarations]: Found specification of procedure realloc [2018-11-28 13:06:06,626 INFO L130 BoogieDeclarations]: Found specification of procedure free [2018-11-28 13:06:06,626 INFO L130 BoogieDeclarations]: Found specification of procedure cfree [2018-11-28 13:06:06,626 INFO L130 BoogieDeclarations]: Found specification of procedure alloca [2018-11-28 13:06:06,626 INFO L130 BoogieDeclarations]: Found specification of procedure valloc [2018-11-28 13:06:06,626 INFO L130 BoogieDeclarations]: Found specification of procedure posix_memalign [2018-11-28 13:06:06,626 INFO L130 BoogieDeclarations]: Found specification of procedure abort [2018-11-28 13:06:06,626 INFO L130 BoogieDeclarations]: Found specification of procedure atexit [2018-11-28 13:06:06,626 INFO L130 BoogieDeclarations]: Found specification of procedure on_exit [2018-11-28 13:06:06,626 INFO L130 BoogieDeclarations]: Found specification of procedure exit [2018-11-28 13:06:06,627 INFO L130 BoogieDeclarations]: Found specification of procedure _Exit [2018-11-28 13:06:06,627 INFO L130 BoogieDeclarations]: Found specification of procedure getenv [2018-11-28 13:06:06,627 INFO L130 BoogieDeclarations]: Found specification of procedure putenv [2018-11-28 13:06:06,627 INFO L130 BoogieDeclarations]: Found specification of procedure setenv [2018-11-28 13:06:06,627 INFO L130 BoogieDeclarations]: Found specification of procedure unsetenv [2018-11-28 13:06:06,627 INFO L130 BoogieDeclarations]: Found specification of procedure clearenv [2018-11-28 13:06:06,627 INFO L130 BoogieDeclarations]: Found specification of procedure mktemp [2018-11-28 13:06:06,627 INFO L130 BoogieDeclarations]: Found specification of procedure mkstemp [2018-11-28 13:06:06,628 INFO L130 BoogieDeclarations]: Found specification of procedure mkstemps [2018-11-28 13:06:06,628 INFO L130 BoogieDeclarations]: Found specification of procedure mkdtemp [2018-11-28 13:06:06,628 INFO L130 BoogieDeclarations]: Found specification of procedure system [2018-11-28 13:06:06,628 INFO L130 BoogieDeclarations]: Found specification of procedure realpath [2018-11-28 13:06:06,628 INFO L130 BoogieDeclarations]: Found specification of procedure bsearch [2018-11-28 13:06:06,628 INFO L130 BoogieDeclarations]: Found specification of procedure qsort [2018-11-28 13:06:06,628 INFO L130 BoogieDeclarations]: Found specification of procedure abs [2018-11-28 13:06:06,628 INFO L130 BoogieDeclarations]: Found specification of procedure labs [2018-11-28 13:06:06,628 INFO L130 BoogieDeclarations]: Found specification of procedure llabs [2018-11-28 13:06:06,629 INFO L130 BoogieDeclarations]: Found specification of procedure div [2018-11-28 13:06:06,629 INFO L130 BoogieDeclarations]: Found specification of procedure ldiv [2018-11-28 13:06:06,629 INFO L130 BoogieDeclarations]: Found specification of procedure lldiv [2018-11-28 13:06:06,629 INFO L130 BoogieDeclarations]: Found specification of procedure ecvt [2018-11-28 13:06:06,629 INFO L130 BoogieDeclarations]: Found specification of procedure fcvt [2018-11-28 13:06:06,629 INFO L130 BoogieDeclarations]: Found specification of procedure gcvt [2018-11-28 13:06:06,629 INFO L130 BoogieDeclarations]: Found specification of procedure qecvt [2018-11-28 13:06:06,629 INFO L130 BoogieDeclarations]: Found specification of procedure qfcvt [2018-11-28 13:06:06,630 INFO L130 BoogieDeclarations]: Found specification of procedure qgcvt [2018-11-28 13:06:06,630 INFO L130 BoogieDeclarations]: Found specification of procedure ecvt_r [2018-11-28 13:06:06,630 INFO L130 BoogieDeclarations]: Found specification of procedure fcvt_r [2018-11-28 13:06:06,630 INFO L130 BoogieDeclarations]: Found specification of procedure qecvt_r [2018-11-28 13:06:06,630 INFO L130 BoogieDeclarations]: Found specification of procedure qfcvt_r [2018-11-28 13:06:06,630 INFO L130 BoogieDeclarations]: Found specification of procedure mblen [2018-11-28 13:06:06,630 INFO L130 BoogieDeclarations]: Found specification of procedure mbtowc [2018-11-28 13:06:06,630 INFO L130 BoogieDeclarations]: Found specification of procedure wctomb [2018-11-28 13:06:06,631 INFO L130 BoogieDeclarations]: Found specification of procedure mbstowcs [2018-11-28 13:06:06,631 INFO L130 BoogieDeclarations]: Found specification of procedure wcstombs [2018-11-28 13:06:06,631 INFO L130 BoogieDeclarations]: Found specification of procedure rpmatch [2018-11-28 13:06:06,631 INFO L130 BoogieDeclarations]: Found specification of procedure getsubopt [2018-11-28 13:06:06,631 INFO L130 BoogieDeclarations]: Found specification of procedure getloadavg [2018-11-28 13:06:06,631 INFO L130 BoogieDeclarations]: Found specification of procedure kfree [2018-11-28 13:06:06,631 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_int [2018-11-28 13:06:06,631 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_pointer [2018-11-28 13:06:06,632 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_nonpositive [2018-11-28 13:06:06,632 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_positive [2018-11-28 13:06:06,632 INFO L130 BoogieDeclarations]: Found specification of procedure memcpy [2018-11-28 13:06:06,632 INFO L130 BoogieDeclarations]: Found specification of procedure memset [2018-11-28 13:06:06,632 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_malloc [2018-11-28 13:06:06,632 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-11-28 13:06:06,632 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_zalloc [2018-11-28 13:06:06,632 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.meminit [2018-11-28 13:06:06,632 INFO L130 BoogieDeclarations]: Found specification of procedure LDV_INIT_LIST_HEAD [2018-11-28 13:06:06,633 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2018-11-28 13:06:06,633 INFO L130 BoogieDeclarations]: Found specification of procedure __ldv_list_add [2018-11-28 13:06:06,633 INFO L130 BoogieDeclarations]: Found specification of procedure __ldv_list_del [2018-11-28 13:06:06,633 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_list_add [2018-11-28 13:06:06,633 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2018-11-28 13:06:06,633 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_list_add_tail [2018-11-28 13:06:06,633 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_list_del [2018-11-28 13:06:06,633 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_msg_alloc [2018-11-28 13:06:06,634 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_msg_fill [2018-11-28 13:06:06,634 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memcpy [2018-11-28 13:06:06,634 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_msg_free [2018-11-28 13:06:06,634 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-11-28 13:06:06,634 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_submit_msg [2018-11-28 13:06:06,634 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_destroy_msgs [2018-11-28 13:06:06,634 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_dev_get_drvdata [2018-11-28 13:06:06,634 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_dev_set_drvdata [2018-11-28 13:06:06,635 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_atomic_add_return [2018-11-28 13:06:06,635 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2018-11-28 13:06:06,635 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2018-11-28 13:06:06,635 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_atomic_sub_return [2018-11-28 13:06:06,635 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kref_sub [2018-11-28 13:06:06,635 INFO L130 BoogieDeclarations]: Found specification of procedure ##fun~$Pointer$~TO~VOID [2018-11-28 13:06:06,635 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kref_init [2018-11-28 13:06:06,635 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kref_get [2018-11-28 13:06:06,636 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kref_put [2018-11-28 13:06:06,636 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_del [2018-11-28 13:06:06,636 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_cleanup [2018-11-28 13:06:06,636 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_release [2018-11-28 13:06:06,636 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_put [2018-11-28 13:06:06,636 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_get [2018-11-28 13:06:06,636 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_init_internal [2018-11-28 13:06:06,636 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_init [2018-11-28 13:06:06,636 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_kobject_create [2018-11-28 13:06:06,637 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset [2018-11-28 13:06:06,637 INFO L130 BoogieDeclarations]: Found specification of procedure f [2018-11-28 13:06:06,637 INFO L130 BoogieDeclarations]: Found specification of procedure g [2018-11-28 13:06:06,637 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_i2c_get_clientdata [2018-11-28 13:06:06,637 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_i2c_set_clientdata [2018-11-28 13:06:06,637 INFO L130 BoogieDeclarations]: Found specification of procedure alloc_2_11 [2018-11-28 13:06:06,637 INFO L130 BoogieDeclarations]: Found specification of procedure free_11 [2018-11-28 13:06:06,637 INFO L130 BoogieDeclarations]: Found specification of procedure entry_point [2018-11-28 13:06:06,637 INFO L130 BoogieDeclarations]: Found specification of procedure main [2018-11-28 13:06:06,638 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-11-28 13:06:06,638 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~$Pointer$ [2018-11-28 13:06:06,638 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-11-28 13:06:06,638 INFO L130 BoogieDeclarations]: Found specification of procedure write~unchecked~int [2018-11-28 13:06:06,638 INFO L130 BoogieDeclarations]: Found specification of procedure read~unchecked~int [2018-11-28 13:06:06,638 INFO L130 BoogieDeclarations]: Found specification of procedure write~unchecked~$Pointer$ [2018-11-28 13:06:06,638 INFO L130 BoogieDeclarations]: Found specification of procedure read~unchecked~$Pointer$ [2018-11-28 13:06:07,035 WARN L615 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2018-11-28 13:06:07,204 WARN L615 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2018-11-28 13:06:07,437 INFO L275 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-11-28 13:06:07,437 INFO L280 CfgBuilder]: Removed 1 assue(true) statements. [2018-11-28 13:06:07,438 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.11 01:06:07 BoogieIcfgContainer [2018-11-28 13:06:07,438 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-11-28 13:06:07,439 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-11-28 13:06:07,439 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-11-28 13:06:07,442 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-11-28 13:06:07,442 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 28.11 01:06:05" (1/3) ... [2018-11-28 13:06:07,443 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@4ded2bcc and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.11 01:06:07, skipping insertion in model container [2018-11-28 13:06:07,443 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.11 01:06:06" (2/3) ... [2018-11-28 13:06:07,443 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@4ded2bcc and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.11 01:06:07, skipping insertion in model container [2018-11-28 13:06:07,443 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.11 01:06:07" (3/3) ... [2018-11-28 13:06:07,445 INFO L112 eAbstractionObserver]: Analyzing ICFG memleaks_test11_1_false-valid-free.i [2018-11-28 13:06:07,452 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-11-28 13:06:07,459 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 87 error locations. [2018-11-28 13:06:07,471 INFO L257 AbstractCegarLoop]: Starting to check reachability of 87 error locations. [2018-11-28 13:06:07,490 INFO L133 ementStrategyFactory]: Using default assertion order modulation [2018-11-28 13:06:07,490 INFO L382 AbstractCegarLoop]: Interprodecural is true [2018-11-28 13:06:07,490 INFO L383 AbstractCegarLoop]: Hoare is false [2018-11-28 13:06:07,490 INFO L384 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-11-28 13:06:07,491 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-11-28 13:06:07,491 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-11-28 13:06:07,491 INFO L387 AbstractCegarLoop]: Difference is false [2018-11-28 13:06:07,491 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-11-28 13:06:07,491 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-11-28 13:06:07,507 INFO L276 IsEmpty]: Start isEmpty. Operand 173 states. [2018-11-28 13:06:07,513 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2018-11-28 13:06:07,513 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 13:06:07,514 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 13:06:07,516 INFO L423 AbstractCegarLoop]: === Iteration 1 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, alloc_2_11Err0REQUIRES_VIOLATION, alloc_2_11Err5REQUIRES_VIOLATION, alloc_2_11Err1REQUIRES_VIOLATION, alloc_2_11Err7ASSERT_VIOLATIONMEMORY_FREE, alloc_2_11Err3REQUIRES_VIOLATION, alloc_2_11Err6ASSERT_VIOLATIONMEMORY_FREE, alloc_2_11Err2REQUIRES_VIOLATION, alloc_2_11Err4REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION]=== [2018-11-28 13:06:07,520 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 13:06:07,521 INFO L82 PathProgramCache]: Analyzing trace with hash 2022401943, now seen corresponding path program 1 times [2018-11-28 13:06:07,522 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 13:06:07,522 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 13:06:07,561 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 13:06:07,562 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:06:07,562 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 13:06:07,603 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:06:07,714 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 13:06:07,716 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 13:06:07,716 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-28 13:06:07,720 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-28 13:06:07,734 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-28 13:06:07,734 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-28 13:06:07,737 INFO L87 Difference]: Start difference. First operand 173 states. Second operand 5 states. [2018-11-28 13:06:07,822 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 13:06:07,822 INFO L93 Difference]: Finished difference Result 135 states and 156 transitions. [2018-11-28 13:06:07,822 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-28 13:06:07,823 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 16 [2018-11-28 13:06:07,824 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 13:06:07,833 INFO L225 Difference]: With dead ends: 135 [2018-11-28 13:06:07,833 INFO L226 Difference]: Without dead ends: 132 [2018-11-28 13:06:07,835 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-28 13:06:07,855 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 132 states. [2018-11-28 13:06:07,879 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 132 to 104. [2018-11-28 13:06:07,881 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 104 states. [2018-11-28 13:06:07,883 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 104 states to 104 states and 116 transitions. [2018-11-28 13:06:07,884 INFO L78 Accepts]: Start accepts. Automaton has 104 states and 116 transitions. Word has length 16 [2018-11-28 13:06:07,884 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 13:06:07,884 INFO L480 AbstractCegarLoop]: Abstraction has 104 states and 116 transitions. [2018-11-28 13:06:07,884 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-28 13:06:07,884 INFO L276 IsEmpty]: Start isEmpty. Operand 104 states and 116 transitions. [2018-11-28 13:06:07,885 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2018-11-28 13:06:07,886 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 13:06:07,886 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 13:06:07,889 INFO L423 AbstractCegarLoop]: === Iteration 2 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, alloc_2_11Err0REQUIRES_VIOLATION, alloc_2_11Err5REQUIRES_VIOLATION, alloc_2_11Err1REQUIRES_VIOLATION, alloc_2_11Err7ASSERT_VIOLATIONMEMORY_FREE, alloc_2_11Err3REQUIRES_VIOLATION, alloc_2_11Err6ASSERT_VIOLATIONMEMORY_FREE, alloc_2_11Err2REQUIRES_VIOLATION, alloc_2_11Err4REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION]=== [2018-11-28 13:06:07,890 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 13:06:07,890 INFO L82 PathProgramCache]: Analyzing trace with hash -529755018, now seen corresponding path program 1 times [2018-11-28 13:06:07,890 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 13:06:07,890 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 13:06:07,893 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 13:06:07,893 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:06:07,893 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 13:06:07,908 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:06:07,944 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 13:06:07,944 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 13:06:07,945 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-11-28 13:06:07,947 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-11-28 13:06:07,947 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-11-28 13:06:07,947 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-28 13:06:07,948 INFO L87 Difference]: Start difference. First operand 104 states and 116 transitions. Second operand 3 states. [2018-11-28 13:06:08,119 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 13:06:08,119 INFO L93 Difference]: Finished difference Result 150 states and 174 transitions. [2018-11-28 13:06:08,120 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-11-28 13:06:08,120 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 16 [2018-11-28 13:06:08,121 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 13:06:08,122 INFO L225 Difference]: With dead ends: 150 [2018-11-28 13:06:08,123 INFO L226 Difference]: Without dead ends: 147 [2018-11-28 13:06:08,123 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-11-28 13:06:08,124 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 147 states. [2018-11-28 13:06:08,133 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 147 to 100. [2018-11-28 13:06:08,134 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 100 states. [2018-11-28 13:06:08,135 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 100 states to 100 states and 108 transitions. [2018-11-28 13:06:08,135 INFO L78 Accepts]: Start accepts. Automaton has 100 states and 108 transitions. Word has length 16 [2018-11-28 13:06:08,136 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 13:06:08,136 INFO L480 AbstractCegarLoop]: Abstraction has 100 states and 108 transitions. [2018-11-28 13:06:08,136 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-11-28 13:06:08,136 INFO L276 IsEmpty]: Start isEmpty. Operand 100 states and 108 transitions. [2018-11-28 13:06:08,137 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2018-11-28 13:06:08,137 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 13:06:08,137 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 13:06:08,138 INFO L423 AbstractCegarLoop]: === Iteration 3 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, alloc_2_11Err0REQUIRES_VIOLATION, alloc_2_11Err5REQUIRES_VIOLATION, alloc_2_11Err1REQUIRES_VIOLATION, alloc_2_11Err7ASSERT_VIOLATIONMEMORY_FREE, alloc_2_11Err3REQUIRES_VIOLATION, alloc_2_11Err6ASSERT_VIOLATIONMEMORY_FREE, alloc_2_11Err2REQUIRES_VIOLATION, alloc_2_11Err4REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION]=== [2018-11-28 13:06:08,138 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 13:06:08,138 INFO L82 PathProgramCache]: Analyzing trace with hash 1562126602, now seen corresponding path program 1 times [2018-11-28 13:06:08,138 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 13:06:08,139 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 13:06:08,140 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 13:06:08,141 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:06:08,141 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 13:06:08,157 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:06:08,189 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-28 13:06:08,190 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 13:06:08,190 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-28 13:06:08,190 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-28 13:06:08,190 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-28 13:06:08,191 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-28 13:06:08,191 INFO L87 Difference]: Start difference. First operand 100 states and 108 transitions. Second operand 5 states. [2018-11-28 13:06:08,238 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 13:06:08,239 INFO L93 Difference]: Finished difference Result 129 states and 146 transitions. [2018-11-28 13:06:08,239 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-28 13:06:08,239 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 21 [2018-11-28 13:06:08,239 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 13:06:08,240 INFO L225 Difference]: With dead ends: 129 [2018-11-28 13:06:08,240 INFO L226 Difference]: Without dead ends: 129 [2018-11-28 13:06:08,240 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-28 13:06:08,241 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 129 states. [2018-11-28 13:06:08,247 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 129 to 104. [2018-11-28 13:06:08,247 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 104 states. [2018-11-28 13:06:08,248 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 104 states to 104 states and 115 transitions. [2018-11-28 13:06:08,248 INFO L78 Accepts]: Start accepts. Automaton has 104 states and 115 transitions. Word has length 21 [2018-11-28 13:06:08,248 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 13:06:08,248 INFO L480 AbstractCegarLoop]: Abstraction has 104 states and 115 transitions. [2018-11-28 13:06:08,248 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-28 13:06:08,249 INFO L276 IsEmpty]: Start isEmpty. Operand 104 states and 115 transitions. [2018-11-28 13:06:08,249 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2018-11-28 13:06:08,249 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 13:06:08,249 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 13:06:08,250 INFO L423 AbstractCegarLoop]: === Iteration 4 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, alloc_2_11Err0REQUIRES_VIOLATION, alloc_2_11Err5REQUIRES_VIOLATION, alloc_2_11Err1REQUIRES_VIOLATION, alloc_2_11Err7ASSERT_VIOLATIONMEMORY_FREE, alloc_2_11Err3REQUIRES_VIOLATION, alloc_2_11Err6ASSERT_VIOLATIONMEMORY_FREE, alloc_2_11Err2REQUIRES_VIOLATION, alloc_2_11Err4REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION]=== [2018-11-28 13:06:08,250 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 13:06:08,250 INFO L82 PathProgramCache]: Analyzing trace with hash 1562126639, now seen corresponding path program 1 times [2018-11-28 13:06:08,250 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 13:06:08,250 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 13:06:08,251 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 13:06:08,252 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:06:08,252 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 13:06:08,268 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:06:08,372 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 2 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 13:06:08,373 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-28 13:06:08,373 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_1e8e50a6-f126-479e-a638-232b4e04c0c9/bin-2019/uautomizer/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-28 13:06:08,389 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:06:08,420 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:06:08,429 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 13:06:08,474 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-28 13:06:08,476 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:06:08,494 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:06:08,495 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-11-28 13:06:08,541 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:06:08,542 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:06:08,543 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 21 [2018-11-28 13:06:08,544 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:06:08,550 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-28 13:06:08,550 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:17, output treesize:15 [2018-11-28 13:06:08,572 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 2 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 13:06:08,594 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-28 13:06:08,594 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 7] total 8 [2018-11-28 13:06:08,594 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-11-28 13:06:08,595 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-11-28 13:06:08,595 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=54, Unknown=0, NotChecked=0, Total=72 [2018-11-28 13:06:08,595 INFO L87 Difference]: Start difference. First operand 104 states and 115 transitions. Second operand 9 states. [2018-11-28 13:06:09,212 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 13:06:09,212 INFO L93 Difference]: Finished difference Result 203 states and 244 transitions. [2018-11-28 13:06:09,213 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-11-28 13:06:09,213 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 21 [2018-11-28 13:06:09,213 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 13:06:09,216 INFO L225 Difference]: With dead ends: 203 [2018-11-28 13:06:09,216 INFO L226 Difference]: Without dead ends: 203 [2018-11-28 13:06:09,216 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 32 GetRequests, 19 SyntacticMatches, 1 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 14 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=45, Invalid=137, Unknown=0, NotChecked=0, Total=182 [2018-11-28 13:06:09,217 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 203 states. [2018-11-28 13:06:09,229 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 203 to 114. [2018-11-28 13:06:09,229 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 114 states. [2018-11-28 13:06:09,230 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 114 states to 114 states and 130 transitions. [2018-11-28 13:06:09,230 INFO L78 Accepts]: Start accepts. Automaton has 114 states and 130 transitions. Word has length 21 [2018-11-28 13:06:09,231 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 13:06:09,231 INFO L480 AbstractCegarLoop]: Abstraction has 114 states and 130 transitions. [2018-11-28 13:06:09,231 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-11-28 13:06:09,231 INFO L276 IsEmpty]: Start isEmpty. Operand 114 states and 130 transitions. [2018-11-28 13:06:09,232 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2018-11-28 13:06:09,232 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 13:06:09,232 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 13:06:09,232 INFO L423 AbstractCegarLoop]: === Iteration 5 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, alloc_2_11Err0REQUIRES_VIOLATION, alloc_2_11Err5REQUIRES_VIOLATION, alloc_2_11Err1REQUIRES_VIOLATION, alloc_2_11Err7ASSERT_VIOLATIONMEMORY_FREE, alloc_2_11Err3REQUIRES_VIOLATION, alloc_2_11Err6ASSERT_VIOLATIONMEMORY_FREE, alloc_2_11Err2REQUIRES_VIOLATION, alloc_2_11Err4REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION]=== [2018-11-28 13:06:09,233 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 13:06:09,233 INFO L82 PathProgramCache]: Analyzing trace with hash 1562126640, now seen corresponding path program 1 times [2018-11-28 13:06:09,233 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 13:06:09,233 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 13:06:09,234 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 13:06:09,235 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:06:09,235 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 13:06:09,247 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:06:09,431 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 1 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 13:06:09,431 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-28 13:06:09,431 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_1e8e50a6-f126-479e-a638-232b4e04c0c9/bin-2019/uautomizer/z3 Starting monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-28 13:06:09,444 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:06:09,458 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:06:09,460 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 13:06:09,465 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-28 13:06:09,465 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:06:09,473 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-28 13:06:09,473 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 13:06:09,478 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:06:09,478 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:19, output treesize:14 [2018-11-28 13:06:09,505 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:06:09,505 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:06:09,506 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-11-28 13:06:09,506 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:06:09,514 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-11-28 13:06:09,514 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 13:06:09,520 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:06:09,520 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:25, output treesize:9 [2018-11-28 13:06:09,528 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 1 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 13:06:09,544 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-28 13:06:09,544 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8] total 9 [2018-11-28 13:06:09,544 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-11-28 13:06:09,544 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-11-28 13:06:09,544 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=70, Unknown=0, NotChecked=0, Total=90 [2018-11-28 13:06:09,545 INFO L87 Difference]: Start difference. First operand 114 states and 130 transitions. Second operand 10 states. [2018-11-28 13:06:10,313 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 13:06:10,314 INFO L93 Difference]: Finished difference Result 267 states and 320 transitions. [2018-11-28 13:06:10,314 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-11-28 13:06:10,314 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 21 [2018-11-28 13:06:10,314 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 13:06:10,316 INFO L225 Difference]: With dead ends: 267 [2018-11-28 13:06:10,316 INFO L226 Difference]: Without dead ends: 267 [2018-11-28 13:06:10,317 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 34 GetRequests, 16 SyntacticMatches, 5 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 16 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=48, Invalid=162, Unknown=0, NotChecked=0, Total=210 [2018-11-28 13:06:10,317 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 267 states. [2018-11-28 13:06:10,330 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 267 to 136. [2018-11-28 13:06:10,330 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 136 states. [2018-11-28 13:06:10,332 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 136 states to 136 states and 169 transitions. [2018-11-28 13:06:10,332 INFO L78 Accepts]: Start accepts. Automaton has 136 states and 169 transitions. Word has length 21 [2018-11-28 13:06:10,332 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 13:06:10,332 INFO L480 AbstractCegarLoop]: Abstraction has 136 states and 169 transitions. [2018-11-28 13:06:10,332 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-11-28 13:06:10,332 INFO L276 IsEmpty]: Start isEmpty. Operand 136 states and 169 transitions. [2018-11-28 13:06:10,333 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2018-11-28 13:06:10,333 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 13:06:10,333 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 13:06:10,334 INFO L423 AbstractCegarLoop]: === Iteration 6 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, alloc_2_11Err0REQUIRES_VIOLATION, alloc_2_11Err5REQUIRES_VIOLATION, alloc_2_11Err1REQUIRES_VIOLATION, alloc_2_11Err7ASSERT_VIOLATIONMEMORY_FREE, alloc_2_11Err3REQUIRES_VIOLATION, alloc_2_11Err6ASSERT_VIOLATIONMEMORY_FREE, alloc_2_11Err2REQUIRES_VIOLATION, alloc_2_11Err4REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION]=== [2018-11-28 13:06:10,334 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 13:06:10,334 INFO L82 PathProgramCache]: Analyzing trace with hash 1268723632, now seen corresponding path program 1 times [2018-11-28 13:06:10,334 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 13:06:10,334 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 13:06:10,336 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 13:06:10,336 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:06:10,336 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 13:06:10,342 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:06:10,385 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-28 13:06:10,386 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-28 13:06:10,386 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_1e8e50a6-f126-479e-a638-232b4e04c0c9/bin-2019/uautomizer/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-28 13:06:10,403 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:06:10,418 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:06:10,421 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 13:06:10,434 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-11-28 13:06:10,453 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-11-28 13:06:10,454 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [5] total 5 [2018-11-28 13:06:10,454 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-28 13:06:10,454 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-28 13:06:10,454 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-28 13:06:10,454 INFO L87 Difference]: Start difference. First operand 136 states and 169 transitions. Second operand 5 states. [2018-11-28 13:06:10,467 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 13:06:10,467 INFO L93 Difference]: Finished difference Result 123 states and 145 transitions. [2018-11-28 13:06:10,467 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-28 13:06:10,467 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 21 [2018-11-28 13:06:10,468 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 13:06:10,469 INFO L225 Difference]: With dead ends: 123 [2018-11-28 13:06:10,469 INFO L226 Difference]: Without dead ends: 121 [2018-11-28 13:06:10,469 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 25 GetRequests, 19 SyntacticMatches, 3 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-28 13:06:10,470 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 121 states. [2018-11-28 13:06:10,475 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 121 to 121. [2018-11-28 13:06:10,475 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 121 states. [2018-11-28 13:06:10,476 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 121 states to 121 states and 143 transitions. [2018-11-28 13:06:10,477 INFO L78 Accepts]: Start accepts. Automaton has 121 states and 143 transitions. Word has length 21 [2018-11-28 13:06:10,477 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 13:06:10,477 INFO L480 AbstractCegarLoop]: Abstraction has 121 states and 143 transitions. [2018-11-28 13:06:10,477 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-28 13:06:10,477 INFO L276 IsEmpty]: Start isEmpty. Operand 121 states and 143 transitions. [2018-11-28 13:06:10,478 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2018-11-28 13:06:10,478 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 13:06:10,478 INFO L402 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 13:06:10,478 INFO L423 AbstractCegarLoop]: === Iteration 7 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, alloc_2_11Err0REQUIRES_VIOLATION, alloc_2_11Err5REQUIRES_VIOLATION, alloc_2_11Err1REQUIRES_VIOLATION, alloc_2_11Err7ASSERT_VIOLATIONMEMORY_FREE, alloc_2_11Err3REQUIRES_VIOLATION, alloc_2_11Err6ASSERT_VIOLATIONMEMORY_FREE, alloc_2_11Err2REQUIRES_VIOLATION, alloc_2_11Err4REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION]=== [2018-11-28 13:06:10,479 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 13:06:10,479 INFO L82 PathProgramCache]: Analyzing trace with hash -1501249533, now seen corresponding path program 1 times [2018-11-28 13:06:10,479 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 13:06:10,479 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 13:06:10,480 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 13:06:10,481 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:06:10,481 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 13:06:10,489 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:06:10,584 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-28 13:06:10,584 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-28 13:06:10,584 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_1e8e50a6-f126-479e-a638-232b4e04c0c9/bin-2019/uautomizer/z3 Starting monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-28 13:06:10,593 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:06:10,606 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:06:10,609 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 13:06:12,426 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-28 13:06:12,449 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-28 13:06:12,449 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 6] total 9 [2018-11-28 13:06:12,450 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-11-28 13:06:12,450 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-11-28 13:06:12,450 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=63, Unknown=6, NotChecked=0, Total=90 [2018-11-28 13:06:12,450 INFO L87 Difference]: Start difference. First operand 121 states and 143 transitions. Second operand 10 states. [2018-11-28 13:06:13,201 WARN L180 SmtUtils]: Spent 692.00 ms on a formula simplification. DAG size of input: 14 DAG size of output: 11 [2018-11-28 13:06:13,480 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 13:06:13,481 INFO L93 Difference]: Finished difference Result 152 states and 182 transitions. [2018-11-28 13:06:13,481 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-11-28 13:06:13,481 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 25 [2018-11-28 13:06:13,481 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 13:06:13,482 INFO L225 Difference]: With dead ends: 152 [2018-11-28 13:06:13,482 INFO L226 Difference]: Without dead ends: 147 [2018-11-28 13:06:13,483 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 36 GetRequests, 25 SyntacticMatches, 2 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 2.5s TimeCoverageRelationStatistics Valid=26, Invalid=78, Unknown=6, NotChecked=0, Total=110 [2018-11-28 13:06:13,483 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 147 states. [2018-11-28 13:06:13,489 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 147 to 117. [2018-11-28 13:06:13,490 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 117 states. [2018-11-28 13:06:13,491 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 117 states to 117 states and 138 transitions. [2018-11-28 13:06:13,491 INFO L78 Accepts]: Start accepts. Automaton has 117 states and 138 transitions. Word has length 25 [2018-11-28 13:06:13,491 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 13:06:13,492 INFO L480 AbstractCegarLoop]: Abstraction has 117 states and 138 transitions. [2018-11-28 13:06:13,492 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-11-28 13:06:13,492 INFO L276 IsEmpty]: Start isEmpty. Operand 117 states and 138 transitions. [2018-11-28 13:06:13,495 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-11-28 13:06:13,495 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 13:06:13,495 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 13:06:13,495 INFO L423 AbstractCegarLoop]: === Iteration 8 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, alloc_2_11Err0REQUIRES_VIOLATION, alloc_2_11Err5REQUIRES_VIOLATION, alloc_2_11Err1REQUIRES_VIOLATION, alloc_2_11Err7ASSERT_VIOLATIONMEMORY_FREE, alloc_2_11Err3REQUIRES_VIOLATION, alloc_2_11Err6ASSERT_VIOLATIONMEMORY_FREE, alloc_2_11Err2REQUIRES_VIOLATION, alloc_2_11Err4REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION]=== [2018-11-28 13:06:13,496 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 13:06:13,496 INFO L82 PathProgramCache]: Analyzing trace with hash -204483247, now seen corresponding path program 1 times [2018-11-28 13:06:13,496 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 13:06:13,496 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 13:06:13,497 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 13:06:13,497 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:06:13,498 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 13:06:13,507 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:06:13,561 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-11-28 13:06:13,561 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 13:06:13,561 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-28 13:06:13,561 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-28 13:06:13,562 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-28 13:06:13,562 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-28 13:06:13,562 INFO L87 Difference]: Start difference. First operand 117 states and 138 transitions. Second operand 5 states. [2018-11-28 13:06:13,618 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 13:06:13,618 INFO L93 Difference]: Finished difference Result 133 states and 153 transitions. [2018-11-28 13:06:13,619 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-28 13:06:13,619 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 29 [2018-11-28 13:06:13,619 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 13:06:13,620 INFO L225 Difference]: With dead ends: 133 [2018-11-28 13:06:13,621 INFO L226 Difference]: Without dead ends: 133 [2018-11-28 13:06:13,621 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-28 13:06:13,621 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 133 states. [2018-11-28 13:06:13,626 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 133 to 117. [2018-11-28 13:06:13,626 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 117 states. [2018-11-28 13:06:13,628 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 117 states to 117 states and 137 transitions. [2018-11-28 13:06:13,628 INFO L78 Accepts]: Start accepts. Automaton has 117 states and 137 transitions. Word has length 29 [2018-11-28 13:06:13,629 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 13:06:13,629 INFO L480 AbstractCegarLoop]: Abstraction has 117 states and 137 transitions. [2018-11-28 13:06:13,629 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-28 13:06:13,629 INFO L276 IsEmpty]: Start isEmpty. Operand 117 states and 137 transitions. [2018-11-28 13:06:13,630 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-11-28 13:06:13,630 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 13:06:13,630 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 13:06:13,631 INFO L423 AbstractCegarLoop]: === Iteration 9 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, alloc_2_11Err0REQUIRES_VIOLATION, alloc_2_11Err5REQUIRES_VIOLATION, alloc_2_11Err1REQUIRES_VIOLATION, alloc_2_11Err7ASSERT_VIOLATIONMEMORY_FREE, alloc_2_11Err3REQUIRES_VIOLATION, alloc_2_11Err6ASSERT_VIOLATIONMEMORY_FREE, alloc_2_11Err2REQUIRES_VIOLATION, alloc_2_11Err4REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION]=== [2018-11-28 13:06:13,631 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 13:06:13,631 INFO L82 PathProgramCache]: Analyzing trace with hash -204483195, now seen corresponding path program 1 times [2018-11-28 13:06:13,631 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 13:06:13,632 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 13:06:13,637 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 13:06:13,637 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:06:13,637 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 13:06:13,645 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:06:13,721 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 8 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-28 13:06:13,721 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-28 13:06:13,722 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_1e8e50a6-f126-479e-a638-232b4e04c0c9/bin-2019/uautomizer/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-28 13:06:13,742 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:06:13,771 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:06:13,773 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 13:06:13,776 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-28 13:06:13,777 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:06:13,778 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:06:13,779 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-11-28 13:06:13,813 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:06:13,817 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:06:13,819 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 21 [2018-11-28 13:06:13,819 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:06:13,827 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-28 13:06:13,828 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:17, output treesize:15 [2018-11-28 13:06:13,858 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 8 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-28 13:06:13,890 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-28 13:06:13,890 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 7] total 8 [2018-11-28 13:06:13,890 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-11-28 13:06:13,890 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-11-28 13:06:13,891 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=54, Unknown=0, NotChecked=0, Total=72 [2018-11-28 13:06:13,891 INFO L87 Difference]: Start difference. First operand 117 states and 137 transitions. Second operand 9 states. [2018-11-28 13:06:17,872 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 13:06:17,872 INFO L93 Difference]: Finished difference Result 174 states and 214 transitions. [2018-11-28 13:06:17,872 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-11-28 13:06:17,872 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 29 [2018-11-28 13:06:17,873 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 13:06:17,874 INFO L225 Difference]: With dead ends: 174 [2018-11-28 13:06:17,874 INFO L226 Difference]: Without dead ends: 174 [2018-11-28 13:06:17,874 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 37 GetRequests, 26 SyntacticMatches, 2 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=28, Invalid=82, Unknown=0, NotChecked=0, Total=110 [2018-11-28 13:06:17,875 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 174 states. [2018-11-28 13:06:17,881 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 174 to 129. [2018-11-28 13:06:17,881 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 129 states. [2018-11-28 13:06:17,882 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 129 states to 129 states and 155 transitions. [2018-11-28 13:06:17,882 INFO L78 Accepts]: Start accepts. Automaton has 129 states and 155 transitions. Word has length 29 [2018-11-28 13:06:17,883 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 13:06:17,883 INFO L480 AbstractCegarLoop]: Abstraction has 129 states and 155 transitions. [2018-11-28 13:06:17,883 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-11-28 13:06:17,883 INFO L276 IsEmpty]: Start isEmpty. Operand 129 states and 155 transitions. [2018-11-28 13:06:17,884 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-11-28 13:06:17,884 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 13:06:17,884 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 13:06:17,884 INFO L423 AbstractCegarLoop]: === Iteration 10 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, alloc_2_11Err0REQUIRES_VIOLATION, alloc_2_11Err5REQUIRES_VIOLATION, alloc_2_11Err1REQUIRES_VIOLATION, alloc_2_11Err7ASSERT_VIOLATIONMEMORY_FREE, alloc_2_11Err3REQUIRES_VIOLATION, alloc_2_11Err6ASSERT_VIOLATIONMEMORY_FREE, alloc_2_11Err2REQUIRES_VIOLATION, alloc_2_11Err4REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION]=== [2018-11-28 13:06:17,887 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 13:06:17,887 INFO L82 PathProgramCache]: Analyzing trace with hash -204483194, now seen corresponding path program 1 times [2018-11-28 13:06:17,887 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 13:06:17,888 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 13:06:17,889 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 13:06:17,889 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:06:17,889 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 13:06:17,898 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:06:18,006 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 8 proven. 3 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2018-11-28 13:06:18,006 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-28 13:06:18,007 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_1e8e50a6-f126-479e-a638-232b4e04c0c9/bin-2019/uautomizer/z3 Starting monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-28 13:06:18,022 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:06:18,039 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:06:18,042 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 13:06:18,046 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-28 13:06:18,046 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:06:18,052 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-28 13:06:18,053 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 13:06:18,058 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:06:18,058 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:19, output treesize:14 [2018-11-28 13:06:18,088 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:06:18,089 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-11-28 13:06:18,090 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:06:18,100 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:06:18,101 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:06:18,101 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-11-28 13:06:18,102 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 13:06:18,107 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:06:18,107 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:25, output treesize:9 [2018-11-28 13:06:18,109 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 8 proven. 3 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2018-11-28 13:06:18,128 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-28 13:06:18,128 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8] total 9 [2018-11-28 13:06:18,129 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-11-28 13:06:18,129 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-11-28 13:06:18,129 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=70, Unknown=0, NotChecked=0, Total=90 [2018-11-28 13:06:18,129 INFO L87 Difference]: Start difference. First operand 129 states and 155 transitions. Second operand 10 states. [2018-11-28 13:06:19,786 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 13:06:19,786 INFO L93 Difference]: Finished difference Result 190 states and 230 transitions. [2018-11-28 13:06:19,788 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-11-28 13:06:19,788 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 29 [2018-11-28 13:06:19,788 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 13:06:19,789 INFO L225 Difference]: With dead ends: 190 [2018-11-28 13:06:19,789 INFO L226 Difference]: Without dead ends: 190 [2018-11-28 13:06:19,789 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 40 GetRequests, 27 SyntacticMatches, 3 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=31, Invalid=101, Unknown=0, NotChecked=0, Total=132 [2018-11-28 13:06:19,790 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 190 states. [2018-11-28 13:06:19,795 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 190 to 141. [2018-11-28 13:06:19,795 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 141 states. [2018-11-28 13:06:19,796 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 141 states to 141 states and 174 transitions. [2018-11-28 13:06:19,796 INFO L78 Accepts]: Start accepts. Automaton has 141 states and 174 transitions. Word has length 29 [2018-11-28 13:06:19,797 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 13:06:19,797 INFO L480 AbstractCegarLoop]: Abstraction has 141 states and 174 transitions. [2018-11-28 13:06:19,797 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-11-28 13:06:19,797 INFO L276 IsEmpty]: Start isEmpty. Operand 141 states and 174 transitions. [2018-11-28 13:06:19,798 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-11-28 13:06:19,798 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 13:06:19,798 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 13:06:19,798 INFO L423 AbstractCegarLoop]: === Iteration 11 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, alloc_2_11Err0REQUIRES_VIOLATION, alloc_2_11Err5REQUIRES_VIOLATION, alloc_2_11Err1REQUIRES_VIOLATION, alloc_2_11Err7ASSERT_VIOLATIONMEMORY_FREE, alloc_2_11Err3REQUIRES_VIOLATION, alloc_2_11Err6ASSERT_VIOLATIONMEMORY_FREE, alloc_2_11Err2REQUIRES_VIOLATION, alloc_2_11Err4REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION]=== [2018-11-28 13:06:19,798 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 13:06:19,798 INFO L82 PathProgramCache]: Analyzing trace with hash -710041820, now seen corresponding path program 1 times [2018-11-28 13:06:19,799 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 13:06:19,799 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 13:06:19,799 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 13:06:19,799 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:06:19,799 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 13:06:19,810 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:06:19,839 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 2 proven. 2 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-11-28 13:06:19,839 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-28 13:06:19,839 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_1e8e50a6-f126-479e-a638-232b4e04c0c9/bin-2019/uautomizer/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-28 13:06:19,854 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:06:19,873 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:06:19,875 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 13:06:19,891 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 10 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-28 13:06:19,912 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-11-28 13:06:19,912 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [5] total 5 [2018-11-28 13:06:19,912 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-28 13:06:19,913 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-28 13:06:19,913 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-28 13:06:19,913 INFO L87 Difference]: Start difference. First operand 141 states and 174 transitions. Second operand 5 states. [2018-11-28 13:06:19,929 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 13:06:19,929 INFO L93 Difference]: Finished difference Result 118 states and 134 transitions. [2018-11-28 13:06:19,930 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-28 13:06:19,930 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 29 [2018-11-28 13:06:19,930 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 13:06:19,931 INFO L225 Difference]: With dead ends: 118 [2018-11-28 13:06:19,931 INFO L226 Difference]: Without dead ends: 116 [2018-11-28 13:06:19,932 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 33 GetRequests, 27 SyntacticMatches, 3 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-28 13:06:19,932 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 116 states. [2018-11-28 13:06:19,934 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 116 to 116. [2018-11-28 13:06:19,935 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 116 states. [2018-11-28 13:06:19,935 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 116 states to 116 states and 132 transitions. [2018-11-28 13:06:19,935 INFO L78 Accepts]: Start accepts. Automaton has 116 states and 132 transitions. Word has length 29 [2018-11-28 13:06:19,936 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 13:06:19,936 INFO L480 AbstractCegarLoop]: Abstraction has 116 states and 132 transitions. [2018-11-28 13:06:19,936 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-28 13:06:19,936 INFO L276 IsEmpty]: Start isEmpty. Operand 116 states and 132 transitions. [2018-11-28 13:06:19,937 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-11-28 13:06:19,937 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 13:06:19,937 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 13:06:19,937 INFO L423 AbstractCegarLoop]: === Iteration 12 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, alloc_2_11Err0REQUIRES_VIOLATION, alloc_2_11Err5REQUIRES_VIOLATION, alloc_2_11Err1REQUIRES_VIOLATION, alloc_2_11Err7ASSERT_VIOLATIONMEMORY_FREE, alloc_2_11Err3REQUIRES_VIOLATION, alloc_2_11Err6ASSERT_VIOLATIONMEMORY_FREE, alloc_2_11Err2REQUIRES_VIOLATION, alloc_2_11Err4REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION]=== [2018-11-28 13:06:19,938 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 13:06:19,938 INFO L82 PathProgramCache]: Analyzing trace with hash -1494776559, now seen corresponding path program 1 times [2018-11-28 13:06:19,938 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 13:06:19,938 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 13:06:19,939 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 13:06:19,939 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:06:19,939 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 13:06:19,946 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:06:20,013 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 8 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-11-28 13:06:20,013 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 13:06:20,013 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-11-28 13:06:20,014 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-11-28 13:06:20,014 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-11-28 13:06:20,014 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2018-11-28 13:06:20,014 INFO L87 Difference]: Start difference. First operand 116 states and 132 transitions. Second operand 7 states. [2018-11-28 13:06:20,245 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 13:06:20,245 INFO L93 Difference]: Finished difference Result 137 states and 162 transitions. [2018-11-28 13:06:20,246 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-11-28 13:06:20,246 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 32 [2018-11-28 13:06:20,246 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 13:06:20,247 INFO L225 Difference]: With dead ends: 137 [2018-11-28 13:06:20,247 INFO L226 Difference]: Without dead ends: 137 [2018-11-28 13:06:20,248 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=60, Unknown=0, NotChecked=0, Total=90 [2018-11-28 13:06:20,248 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 137 states. [2018-11-28 13:06:20,251 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 137 to 115. [2018-11-28 13:06:20,251 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 115 states. [2018-11-28 13:06:20,252 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 115 states to 115 states and 131 transitions. [2018-11-28 13:06:20,252 INFO L78 Accepts]: Start accepts. Automaton has 115 states and 131 transitions. Word has length 32 [2018-11-28 13:06:20,253 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 13:06:20,253 INFO L480 AbstractCegarLoop]: Abstraction has 115 states and 131 transitions. [2018-11-28 13:06:20,253 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-11-28 13:06:20,253 INFO L276 IsEmpty]: Start isEmpty. Operand 115 states and 131 transitions. [2018-11-28 13:06:20,254 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-11-28 13:06:20,254 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 13:06:20,254 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 13:06:20,254 INFO L423 AbstractCegarLoop]: === Iteration 13 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, alloc_2_11Err0REQUIRES_VIOLATION, alloc_2_11Err5REQUIRES_VIOLATION, alloc_2_11Err1REQUIRES_VIOLATION, alloc_2_11Err7ASSERT_VIOLATIONMEMORY_FREE, alloc_2_11Err3REQUIRES_VIOLATION, alloc_2_11Err6ASSERT_VIOLATIONMEMORY_FREE, alloc_2_11Err2REQUIRES_VIOLATION, alloc_2_11Err4REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION]=== [2018-11-28 13:06:20,255 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 13:06:20,255 INFO L82 PathProgramCache]: Analyzing trace with hash -1494776558, now seen corresponding path program 1 times [2018-11-28 13:06:20,255 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 13:06:20,255 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 13:06:20,256 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 13:06:20,256 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:06:20,256 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 13:06:20,269 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:06:20,393 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 6 proven. 4 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-28 13:06:20,393 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-28 13:06:20,393 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_1e8e50a6-f126-479e-a638-232b4e04c0c9/bin-2019/uautomizer/z3 Starting monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-28 13:06:20,405 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:06:20,436 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:06:20,439 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 13:06:20,484 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:06:20,486 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 17 [2018-11-28 13:06:20,487 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:06:20,500 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:06:20,502 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:06:20,503 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-11-28 13:06:20,503 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 13:06:20,511 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:06:20,512 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:27, output treesize:11 [2018-11-28 13:06:20,554 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 8 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-11-28 13:06:20,573 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-11-28 13:06:20,574 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [10] total 15 [2018-11-28 13:06:20,574 INFO L459 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-11-28 13:06:20,574 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-11-28 13:06:20,574 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=40, Invalid=200, Unknown=0, NotChecked=0, Total=240 [2018-11-28 13:06:20,575 INFO L87 Difference]: Start difference. First operand 115 states and 131 transitions. Second operand 16 states. [2018-11-28 13:06:21,140 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 13:06:21,141 INFO L93 Difference]: Finished difference Result 145 states and 168 transitions. [2018-11-28 13:06:21,141 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-11-28 13:06:21,141 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 32 [2018-11-28 13:06:21,141 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 13:06:21,142 INFO L225 Difference]: With dead ends: 145 [2018-11-28 13:06:21,142 INFO L226 Difference]: Without dead ends: 145 [2018-11-28 13:06:21,142 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 49 GetRequests, 28 SyntacticMatches, 0 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 70 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=83, Invalid=423, Unknown=0, NotChecked=0, Total=506 [2018-11-28 13:06:21,142 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 145 states. [2018-11-28 13:06:21,147 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 145 to 98. [2018-11-28 13:06:21,147 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 98 states. [2018-11-28 13:06:21,148 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 98 states to 98 states and 106 transitions. [2018-11-28 13:06:21,148 INFO L78 Accepts]: Start accepts. Automaton has 98 states and 106 transitions. Word has length 32 [2018-11-28 13:06:21,148 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 13:06:21,149 INFO L480 AbstractCegarLoop]: Abstraction has 98 states and 106 transitions. [2018-11-28 13:06:21,149 INFO L481 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-11-28 13:06:21,149 INFO L276 IsEmpty]: Start isEmpty. Operand 98 states and 106 transitions. [2018-11-28 13:06:21,149 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-11-28 13:06:21,150 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 13:06:21,150 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 13:06:21,150 INFO L423 AbstractCegarLoop]: === Iteration 14 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, alloc_2_11Err0REQUIRES_VIOLATION, alloc_2_11Err5REQUIRES_VIOLATION, alloc_2_11Err1REQUIRES_VIOLATION, alloc_2_11Err7ASSERT_VIOLATIONMEMORY_FREE, alloc_2_11Err3REQUIRES_VIOLATION, alloc_2_11Err6ASSERT_VIOLATIONMEMORY_FREE, alloc_2_11Err2REQUIRES_VIOLATION, alloc_2_11Err4REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION]=== [2018-11-28 13:06:21,150 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 13:06:21,151 INFO L82 PathProgramCache]: Analyzing trace with hash 991159237, now seen corresponding path program 1 times [2018-11-28 13:06:21,151 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 13:06:21,151 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 13:06:21,152 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 13:06:21,152 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:06:21,152 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 13:06:21,159 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:06:21,237 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 4 proven. 6 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-28 13:06:21,237 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-28 13:06:21,238 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_1e8e50a6-f126-479e-a638-232b4e04c0c9/bin-2019/uautomizer/z3 Starting monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-28 13:06:21,247 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:06:21,264 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:06:21,265 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 13:06:21,272 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-28 13:06:21,272 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:06:21,274 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:06:21,274 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-11-28 13:06:21,294 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:06:21,295 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:06:21,295 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-11-28 13:06:21,295 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:06:21,296 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:06:21,296 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:11, output treesize:4 [2018-11-28 13:06:21,314 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:06:21,314 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 21 [2018-11-28 13:06:21,314 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:06:21,319 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-28 13:06:21,319 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:16, output treesize:11 [2018-11-28 13:06:21,328 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 4 proven. 6 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-28 13:06:21,344 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-28 13:06:21,344 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 10] total 10 [2018-11-28 13:06:21,344 INFO L459 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-11-28 13:06:21,344 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-11-28 13:06:21,344 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=88, Unknown=0, NotChecked=0, Total=110 [2018-11-28 13:06:21,345 INFO L87 Difference]: Start difference. First operand 98 states and 106 transitions. Second operand 11 states. [2018-11-28 13:06:21,560 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 13:06:21,560 INFO L93 Difference]: Finished difference Result 124 states and 139 transitions. [2018-11-28 13:06:21,560 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-11-28 13:06:21,560 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 32 [2018-11-28 13:06:21,561 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 13:06:21,561 INFO L225 Difference]: With dead ends: 124 [2018-11-28 13:06:21,561 INFO L226 Difference]: Without dead ends: 124 [2018-11-28 13:06:21,562 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 45 GetRequests, 26 SyntacticMatches, 8 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=32, Invalid=124, Unknown=0, NotChecked=0, Total=156 [2018-11-28 13:06:21,562 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 124 states. [2018-11-28 13:06:21,564 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 124 to 100. [2018-11-28 13:06:21,564 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 100 states. [2018-11-28 13:06:21,565 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 100 states to 100 states and 108 transitions. [2018-11-28 13:06:21,565 INFO L78 Accepts]: Start accepts. Automaton has 100 states and 108 transitions. Word has length 32 [2018-11-28 13:06:21,565 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 13:06:21,565 INFO L480 AbstractCegarLoop]: Abstraction has 100 states and 108 transitions. [2018-11-28 13:06:21,565 INFO L481 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-11-28 13:06:21,566 INFO L276 IsEmpty]: Start isEmpty. Operand 100 states and 108 transitions. [2018-11-28 13:06:21,566 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-11-28 13:06:21,566 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 13:06:21,566 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 13:06:21,567 INFO L423 AbstractCegarLoop]: === Iteration 15 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, alloc_2_11Err0REQUIRES_VIOLATION, alloc_2_11Err5REQUIRES_VIOLATION, alloc_2_11Err1REQUIRES_VIOLATION, alloc_2_11Err7ASSERT_VIOLATIONMEMORY_FREE, alloc_2_11Err3REQUIRES_VIOLATION, alloc_2_11Err6ASSERT_VIOLATIONMEMORY_FREE, alloc_2_11Err2REQUIRES_VIOLATION, alloc_2_11Err4REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION]=== [2018-11-28 13:06:21,567 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 13:06:21,567 INFO L82 PathProgramCache]: Analyzing trace with hash -1961186958, now seen corresponding path program 1 times [2018-11-28 13:06:21,567 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 13:06:21,567 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 13:06:21,568 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 13:06:21,568 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:06:21,568 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 13:06:21,576 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:06:21,683 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 2 proven. 8 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-28 13:06:21,683 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-28 13:06:21,683 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_1e8e50a6-f126-479e-a638-232b4e04c0c9/bin-2019/uautomizer/z3 Starting monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-28 13:06:21,695 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:06:21,716 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:06:21,720 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 13:06:21,729 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-28 13:06:21,729 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:06:21,730 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:06:21,731 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-11-28 13:06:21,737 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:06:21,746 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:06:21,747 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-11-28 13:06:21,747 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:06:21,749 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:06:21,749 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:11, output treesize:4 [2018-11-28 13:06:21,759 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-11-28 13:06:21,760 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-11-28 13:06:21,761 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 13:06:21,762 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:06:21,765 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:06:21,765 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:16, output treesize:12 [2018-11-28 13:06:23,767 WARN L854 $PredicateComparison]: unable to prove that (exists ((v_entry_point_~c11~0.offset_BEFORE_CALL_4 Int) (v_entry_point_~c11~0.base_BEFORE_CALL_9 Int)) (not (= v_entry_point_~c11~0.base_BEFORE_CALL_9 (select (select |c_#memory_$Pointer$.base| v_entry_point_~c11~0.base_BEFORE_CALL_9) v_entry_point_~c11~0.offset_BEFORE_CALL_4)))) is different from true [2018-11-28 13:06:23,782 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 33 [2018-11-28 13:06:23,784 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-11-28 13:06:23,784 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 13:06:23,788 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:06:23,794 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:06:23,794 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:37, output treesize:18 [2018-11-28 13:06:23,829 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 19 [2018-11-28 13:06:23,830 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 10 [2018-11-28 13:06:23,830 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 13:06:23,832 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:06:23,834 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:06:23,834 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:25, output treesize:5 [2018-11-28 13:06:23,851 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 4 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 6 not checked. [2018-11-28 13:06:23,865 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-28 13:06:23,866 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 15] total 18 [2018-11-28 13:06:23,866 INFO L459 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-11-28 13:06:23,866 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-11-28 13:06:23,866 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=39, Invalid=270, Unknown=1, NotChecked=32, Total=342 [2018-11-28 13:06:23,866 INFO L87 Difference]: Start difference. First operand 100 states and 108 transitions. Second operand 19 states. [2018-11-28 13:06:27,941 WARN L180 SmtUtils]: Spent 2.00 s on a formula simplification that was a NOOP. DAG size: 12 [2018-11-28 13:06:31,960 WARN L180 SmtUtils]: Spent 2.01 s on a formula simplification that was a NOOP. DAG size: 18 [2018-11-28 13:06:34,354 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 13:06:34,354 INFO L93 Difference]: Finished difference Result 129 states and 144 transitions. [2018-11-28 13:06:34,355 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-11-28 13:06:34,355 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 34 [2018-11-28 13:06:34,355 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 13:06:34,356 INFO L225 Difference]: With dead ends: 129 [2018-11-28 13:06:34,356 INFO L226 Difference]: Without dead ends: 129 [2018-11-28 13:06:34,356 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 60 GetRequests, 25 SyntacticMatches, 6 SemanticMatches, 29 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 109 ImplicationChecksByTransitivity, 12.2s TimeCoverageRelationStatistics Valid=119, Invalid=751, Unknown=4, NotChecked=56, Total=930 [2018-11-28 13:06:34,357 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 129 states. [2018-11-28 13:06:34,359 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 129 to 103. [2018-11-28 13:06:34,359 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 103 states. [2018-11-28 13:06:34,360 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 103 states to 103 states and 111 transitions. [2018-11-28 13:06:34,360 INFO L78 Accepts]: Start accepts. Automaton has 103 states and 111 transitions. Word has length 34 [2018-11-28 13:06:34,360 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 13:06:34,360 INFO L480 AbstractCegarLoop]: Abstraction has 103 states and 111 transitions. [2018-11-28 13:06:34,360 INFO L481 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-11-28 13:06:34,360 INFO L276 IsEmpty]: Start isEmpty. Operand 103 states and 111 transitions. [2018-11-28 13:06:34,361 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-11-28 13:06:34,361 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 13:06:34,361 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 13:06:34,361 INFO L423 AbstractCegarLoop]: === Iteration 16 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, alloc_2_11Err0REQUIRES_VIOLATION, alloc_2_11Err5REQUIRES_VIOLATION, alloc_2_11Err1REQUIRES_VIOLATION, alloc_2_11Err7ASSERT_VIOLATIONMEMORY_FREE, alloc_2_11Err3REQUIRES_VIOLATION, alloc_2_11Err6ASSERT_VIOLATIONMEMORY_FREE, alloc_2_11Err2REQUIRES_VIOLATION, alloc_2_11Err4REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION]=== [2018-11-28 13:06:34,362 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 13:06:34,362 INFO L82 PathProgramCache]: Analyzing trace with hash -1961186957, now seen corresponding path program 1 times [2018-11-28 13:06:34,362 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 13:06:34,362 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 13:06:34,363 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 13:06:34,363 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:06:34,363 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 13:06:34,371 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:06:34,488 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 2 proven. 8 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-11-28 13:06:34,489 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-28 13:06:34,489 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_1e8e50a6-f126-479e-a638-232b4e04c0c9/bin-2019/uautomizer/z3 Starting monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-28 13:06:34,496 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:06:34,511 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:06:34,513 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 13:06:34,516 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-28 13:06:34,516 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:06:34,518 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:06:34,519 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-11-28 13:06:34,533 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:06:34,534 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:06:34,534 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-11-28 13:06:34,535 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:06:34,536 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:06:34,536 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:11, output treesize:4 [2018-11-28 13:06:34,557 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-11-28 13:06:34,559 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-11-28 13:06:34,559 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 13:06:34,565 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:06:34,574 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-11-28 13:06:34,578 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-11-28 13:06:34,578 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-11-28 13:06:34,581 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:06:34,585 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:06:34,585 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 2 variables, input treesize:27, output treesize:19 [2018-11-28 13:06:36,605 WARN L854 $PredicateComparison]: unable to prove that (exists ((v_entry_point_~c11~0.base_BEFORE_CALL_12 Int) (v_entry_point_~c11~0.offset_BEFORE_CALL_6 Int)) (not (= v_entry_point_~c11~0.base_BEFORE_CALL_12 (select (select |c_#memory_$Pointer$.base| v_entry_point_~c11~0.base_BEFORE_CALL_12) v_entry_point_~c11~0.offset_BEFORE_CALL_6)))) is different from true [2018-11-28 13:06:36,635 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 69 treesize of output 70 [2018-11-28 13:06:36,639 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 15 [2018-11-28 13:06:36,639 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 13:06:36,655 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:06:36,670 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 62 treesize of output 58 [2018-11-28 13:06:36,672 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 15 [2018-11-28 13:06:36,673 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-11-28 13:06:36,680 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:06:36,689 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:06:36,689 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 4 variables, input treesize:77, output treesize:31 [2018-11-28 13:06:36,756 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 25 [2018-11-28 13:06:36,764 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 16 [2018-11-28 13:06:36,764 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 13:06:36,767 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:06:36,773 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 20 [2018-11-28 13:06:36,774 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 11 [2018-11-28 13:06:36,774 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-11-28 13:06:36,777 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:06:36,781 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:06:36,781 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 4 variables, input treesize:45, output treesize:11 [2018-11-28 13:06:36,814 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 4 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 6 not checked. [2018-11-28 13:06:36,829 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-28 13:06:36,829 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 15] total 24 [2018-11-28 13:06:36,829 INFO L459 AbstractCegarLoop]: Interpolant automaton has 25 states [2018-11-28 13:06:36,830 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2018-11-28 13:06:36,830 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=54, Invalid=501, Unknown=1, NotChecked=44, Total=600 [2018-11-28 13:06:36,830 INFO L87 Difference]: Start difference. First operand 103 states and 111 transitions. Second operand 25 states. [2018-11-28 13:06:40,962 WARN L180 SmtUtils]: Spent 2.00 s on a formula simplification that was a NOOP. DAG size: 12 [2018-11-28 13:06:44,983 WARN L180 SmtUtils]: Spent 2.01 s on a formula simplification that was a NOOP. DAG size: 20 [2018-11-28 13:06:45,589 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 13:06:45,589 INFO L93 Difference]: Finished difference Result 128 states and 143 transitions. [2018-11-28 13:06:45,590 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-11-28 13:06:45,590 INFO L78 Accepts]: Start accepts. Automaton has 25 states. Word has length 34 [2018-11-28 13:06:45,590 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 13:06:45,590 INFO L225 Difference]: With dead ends: 128 [2018-11-28 13:06:45,590 INFO L226 Difference]: Without dead ends: 128 [2018-11-28 13:06:45,591 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 60 GetRequests, 22 SyntacticMatches, 3 SemanticMatches, 35 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 91 ImplicationChecksByTransitivity, 10.5s TimeCoverageRelationStatistics Valid=149, Invalid=1112, Unknown=3, NotChecked=68, Total=1332 [2018-11-28 13:06:45,591 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 128 states. [2018-11-28 13:06:45,593 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 128 to 102. [2018-11-28 13:06:45,593 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 102 states. [2018-11-28 13:06:45,593 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 102 states to 102 states and 110 transitions. [2018-11-28 13:06:45,594 INFO L78 Accepts]: Start accepts. Automaton has 102 states and 110 transitions. Word has length 34 [2018-11-28 13:06:45,594 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 13:06:45,594 INFO L480 AbstractCegarLoop]: Abstraction has 102 states and 110 transitions. [2018-11-28 13:06:45,594 INFO L481 AbstractCegarLoop]: Interpolant automaton has 25 states. [2018-11-28 13:06:45,594 INFO L276 IsEmpty]: Start isEmpty. Operand 102 states and 110 transitions. [2018-11-28 13:06:45,594 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2018-11-28 13:06:45,594 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 13:06:45,594 INFO L402 BasicCegarLoop]: trace histogram [3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 13:06:45,595 INFO L423 AbstractCegarLoop]: === Iteration 17 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, alloc_2_11Err0REQUIRES_VIOLATION, alloc_2_11Err5REQUIRES_VIOLATION, alloc_2_11Err1REQUIRES_VIOLATION, alloc_2_11Err7ASSERT_VIOLATIONMEMORY_FREE, alloc_2_11Err3REQUIRES_VIOLATION, alloc_2_11Err6ASSERT_VIOLATIONMEMORY_FREE, alloc_2_11Err2REQUIRES_VIOLATION, alloc_2_11Err4REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION]=== [2018-11-28 13:06:45,595 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 13:06:45,595 INFO L82 PathProgramCache]: Analyzing trace with hash -274890323, now seen corresponding path program 1 times [2018-11-28 13:06:45,595 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 13:06:45,595 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 13:06:45,596 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 13:06:45,596 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:06:45,596 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 13:06:45,605 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:06:45,839 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-11-28 13:06:45,839 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-28 13:06:45,839 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_1e8e50a6-f126-479e-a638-232b4e04c0c9/bin-2019/uautomizer/z3 Starting monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-28 13:06:45,860 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:06:45,879 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:06:45,882 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 13:06:48,728 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-11-28 13:06:48,743 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-28 13:06:48,743 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9] total 16 [2018-11-28 13:06:48,744 INFO L459 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-11-28 13:06:48,744 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-11-28 13:06:48,744 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=40, Invalid=226, Unknown=6, NotChecked=0, Total=272 [2018-11-28 13:06:48,744 INFO L87 Difference]: Start difference. First operand 102 states and 110 transitions. Second operand 17 states. [2018-11-28 13:06:49,822 WARN L180 SmtUtils]: Spent 894.00 ms on a formula simplification. DAG size of input: 29 DAG size of output: 25 [2018-11-28 13:06:51,472 WARN L180 SmtUtils]: Spent 1.21 s on a formula simplification. DAG size of input: 39 DAG size of output: 29 [2018-11-28 13:06:51,799 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 13:06:51,799 INFO L93 Difference]: Finished difference Result 129 states and 143 transitions. [2018-11-28 13:06:51,800 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-11-28 13:06:51,800 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 35 [2018-11-28 13:06:51,800 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 13:06:51,801 INFO L225 Difference]: With dead ends: 129 [2018-11-28 13:06:51,801 INFO L226 Difference]: Without dead ends: 122 [2018-11-28 13:06:51,801 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 56 GetRequests, 34 SyntacticMatches, 2 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 64 ImplicationChecksByTransitivity, 5.1s TimeCoverageRelationStatistics Valid=66, Invalid=390, Unknown=6, NotChecked=0, Total=462 [2018-11-28 13:06:51,801 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 122 states. [2018-11-28 13:06:51,803 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 122 to 96. [2018-11-28 13:06:51,803 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 96 states. [2018-11-28 13:06:51,804 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 96 states to 96 states and 103 transitions. [2018-11-28 13:06:51,804 INFO L78 Accepts]: Start accepts. Automaton has 96 states and 103 transitions. Word has length 35 [2018-11-28 13:06:51,804 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 13:06:51,804 INFO L480 AbstractCegarLoop]: Abstraction has 96 states and 103 transitions. [2018-11-28 13:06:51,804 INFO L481 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-11-28 13:06:51,804 INFO L276 IsEmpty]: Start isEmpty. Operand 96 states and 103 transitions. [2018-11-28 13:06:51,805 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2018-11-28 13:06:51,805 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 13:06:51,805 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 13:06:51,805 INFO L423 AbstractCegarLoop]: === Iteration 18 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, alloc_2_11Err0REQUIRES_VIOLATION, alloc_2_11Err5REQUIRES_VIOLATION, alloc_2_11Err1REQUIRES_VIOLATION, alloc_2_11Err7ASSERT_VIOLATIONMEMORY_FREE, alloc_2_11Err3REQUIRES_VIOLATION, alloc_2_11Err6ASSERT_VIOLATIONMEMORY_FREE, alloc_2_11Err2REQUIRES_VIOLATION, alloc_2_11Err4REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION]=== [2018-11-28 13:06:51,805 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 13:06:51,805 INFO L82 PathProgramCache]: Analyzing trace with hash 804339633, now seen corresponding path program 1 times [2018-11-28 13:06:51,806 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 13:06:51,806 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 13:06:51,806 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 13:06:51,806 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:06:51,807 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 13:06:51,818 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:06:52,017 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 6 proven. 12 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-11-28 13:06:52,018 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-28 13:06:52,018 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_1e8e50a6-f126-479e-a638-232b4e04c0c9/bin-2019/uautomizer/z3 Starting monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-28 13:06:52,026 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:06:52,047 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:06:52,049 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 13:06:52,051 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-28 13:06:52,052 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:06:52,053 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:06:52,053 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-11-28 13:06:52,057 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:06:52,058 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:06:52,058 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-11-28 13:06:52,058 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:06:52,060 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:06:52,060 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:11, output treesize:4 [2018-11-28 13:06:52,067 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-11-28 13:06:52,069 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-11-28 13:06:52,069 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 13:06:52,071 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:06:52,093 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-11-28 13:06:52,095 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-11-28 13:06:52,095 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-11-28 13:06:52,096 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:06:52,099 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:06:52,100 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 2 variables, input treesize:27, output treesize:19 [2018-11-28 13:06:54,104 WARN L854 $PredicateComparison]: unable to prove that (exists ((v_entry_point_~c11~0.base_BEFORE_CALL_17 Int) (v_entry_point_~c11~0.offset_BEFORE_CALL_8 Int)) (not (= v_entry_point_~c11~0.base_BEFORE_CALL_17 (select (select |c_#memory_$Pointer$.base| v_entry_point_~c11~0.base_BEFORE_CALL_17) v_entry_point_~c11~0.offset_BEFORE_CALL_8)))) is different from true [2018-11-28 13:06:54,107 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-28 13:06:54,107 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:06:54,116 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-1 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-11-28 13:06:54,116 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 3 variables, input treesize:15, output treesize:14 [2018-11-28 13:06:58,138 WARN L180 SmtUtils]: Spent 2.00 s on a formula simplification that was a NOOP. DAG size: 14 [2018-11-28 13:06:58,200 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 24 [2018-11-28 13:06:58,202 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-11-28 13:06:58,202 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 13:06:58,206 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:06:58,218 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 35 [2018-11-28 13:06:58,220 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 11 [2018-11-28 13:06:58,220 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-11-28 13:06:58,226 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:06:58,237 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:06:58,237 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 6 variables, input treesize:62, output treesize:26 [2018-11-28 13:06:58,290 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 21 [2018-11-28 13:06:58,291 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 13 [2018-11-28 13:06:58,292 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 13:06:58,293 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:06:58,296 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-11-28 13:06:58,297 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:40, output treesize:29 [2018-11-28 13:06:58,346 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 24 [2018-11-28 13:06:58,348 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 5 [2018-11-28 13:06:58,348 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 13:06:58,353 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2018-11-28 13:06:58,353 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-11-28 13:06:58,355 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:06:58,356 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:06:58,356 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 4 variables, input treesize:33, output treesize:5 [2018-11-28 13:06:58,701 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:06:58,701 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:06:58,702 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 21 [2018-11-28 13:06:58,702 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:06:58,706 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-28 13:06:58,706 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:17, output treesize:15 [2018-11-28 13:06:58,728 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 8 proven. 10 refuted. 0 times theorem prover too weak. 2 trivial. 4 not checked. [2018-11-28 13:06:58,742 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-28 13:06:58,743 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 22] total 28 [2018-11-28 13:06:58,743 INFO L459 AbstractCegarLoop]: Interpolant automaton has 29 states [2018-11-28 13:06:58,743 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 29 interpolants. [2018-11-28 13:06:58,743 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=69, Invalid=688, Unknown=3, NotChecked=52, Total=812 [2018-11-28 13:06:58,743 INFO L87 Difference]: Start difference. First operand 96 states and 103 transitions. Second operand 29 states. [2018-11-28 13:07:03,562 WARN L180 SmtUtils]: Spent 433.00 ms on a formula simplification that was a NOOP. DAG size: 17 [2018-11-28 13:07:10,205 WARN L180 SmtUtils]: Spent 2.00 s on a formula simplification that was a NOOP. DAG size: 12 [2018-11-28 13:07:14,636 WARN L180 SmtUtils]: Spent 2.41 s on a formula simplification that was a NOOP. DAG size: 25 [2018-11-28 13:07:18,275 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 13:07:18,275 INFO L93 Difference]: Finished difference Result 151 states and 171 transitions. [2018-11-28 13:07:18,276 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2018-11-28 13:07:18,276 INFO L78 Accepts]: Start accepts. Automaton has 29 states. Word has length 43 [2018-11-28 13:07:18,276 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 13:07:18,276 INFO L225 Difference]: With dead ends: 151 [2018-11-28 13:07:18,277 INFO L226 Difference]: Without dead ends: 151 [2018-11-28 13:07:18,277 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 85 GetRequests, 29 SyntacticMatches, 8 SemanticMatches, 48 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 468 ImplicationChecksByTransitivity, 19.8s TimeCoverageRelationStatistics Valid=243, Invalid=2106, Unknown=7, NotChecked=94, Total=2450 [2018-11-28 13:07:18,278 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 151 states. [2018-11-28 13:07:18,281 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 151 to 115. [2018-11-28 13:07:18,281 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 115 states. [2018-11-28 13:07:18,282 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 115 states to 115 states and 128 transitions. [2018-11-28 13:07:18,282 INFO L78 Accepts]: Start accepts. Automaton has 115 states and 128 transitions. Word has length 43 [2018-11-28 13:07:18,282 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 13:07:18,283 INFO L480 AbstractCegarLoop]: Abstraction has 115 states and 128 transitions. [2018-11-28 13:07:18,283 INFO L481 AbstractCegarLoop]: Interpolant automaton has 29 states. [2018-11-28 13:07:18,283 INFO L276 IsEmpty]: Start isEmpty. Operand 115 states and 128 transitions. [2018-11-28 13:07:18,283 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2018-11-28 13:07:18,283 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 13:07:18,283 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 13:07:18,284 INFO L423 AbstractCegarLoop]: === Iteration 19 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, alloc_2_11Err0REQUIRES_VIOLATION, alloc_2_11Err5REQUIRES_VIOLATION, alloc_2_11Err1REQUIRES_VIOLATION, alloc_2_11Err7ASSERT_VIOLATIONMEMORY_FREE, alloc_2_11Err3REQUIRES_VIOLATION, alloc_2_11Err6ASSERT_VIOLATIONMEMORY_FREE, alloc_2_11Err2REQUIRES_VIOLATION, alloc_2_11Err4REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION]=== [2018-11-28 13:07:18,284 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 13:07:18,284 INFO L82 PathProgramCache]: Analyzing trace with hash 804339634, now seen corresponding path program 1 times [2018-11-28 13:07:18,284 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 13:07:18,285 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 13:07:18,285 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 13:07:18,286 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:07:18,286 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 13:07:18,297 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:07:18,636 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 10 proven. 13 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2018-11-28 13:07:18,636 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-28 13:07:18,636 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_1e8e50a6-f126-479e-a638-232b4e04c0c9/bin-2019/uautomizer/z3 Starting monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-28 13:07:18,651 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:07:18,673 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:07:18,676 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 13:07:18,678 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-28 13:07:18,678 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:07:18,680 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:07:18,680 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-11-28 13:07:18,685 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:07:18,686 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:07:18,687 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-11-28 13:07:18,687 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:07:18,688 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:07:18,688 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:11, output treesize:4 [2018-11-28 13:07:18,698 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-11-28 13:07:18,700 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-11-28 13:07:18,700 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 13:07:18,702 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:07:18,709 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-11-28 13:07:18,710 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-11-28 13:07:18,710 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-11-28 13:07:18,712 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:07:18,716 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:07:18,716 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 2 variables, input treesize:27, output treesize:19 [2018-11-28 13:07:20,718 WARN L854 $PredicateComparison]: unable to prove that (exists ((v_entry_point_~c11~0.base_BEFORE_CALL_20 Int) (v_entry_point_~c11~0.offset_BEFORE_CALL_10 Int)) (not (= (select (select |c_#memory_$Pointer$.base| v_entry_point_~c11~0.base_BEFORE_CALL_20) v_entry_point_~c11~0.offset_BEFORE_CALL_10) v_entry_point_~c11~0.base_BEFORE_CALL_20))) is different from true [2018-11-28 13:07:21,995 WARN L180 SmtUtils]: Spent 546.00 ms on a formula simplification that was a NOOP. DAG size: 12 [2018-11-28 13:07:21,999 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-28 13:07:21,999 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:07:22,007 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-28 13:07:22,007 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 13:07:22,014 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-11-28 13:07:22,014 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 5 variables, input treesize:27, output treesize:22 [2018-11-28 13:07:24,676 WARN L180 SmtUtils]: Spent 2.01 s on a formula simplification that was a NOOP. DAG size: 21 [2018-11-28 13:07:24,737 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 20 [2018-11-28 13:07:24,739 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 11 [2018-11-28 13:07:24,739 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 13:07:24,755 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:07:24,767 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 35 [2018-11-28 13:07:24,768 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-11-28 13:07:24,768 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-11-28 13:07:24,773 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:07:24,780 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:07:24,780 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 5 variables, input treesize:67, output treesize:58 [2018-11-28 13:07:24,916 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 88 treesize of output 69 [2018-11-28 13:07:24,919 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 11 [2018-11-28 13:07:24,919 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 13:07:24,927 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 27 [2018-11-28 13:07:24,928 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-28 13:07:24,933 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-28 13:07:24,940 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2018-11-28 13:07:24,941 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2018-11-28 13:07:24,942 INFO L267 ElimStorePlain]: Start of recursive call 6: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-11-28 13:07:24,946 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 3 [2018-11-28 13:07:24,946 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-11-28 13:07:24,948 INFO L267 ElimStorePlain]: Start of recursive call 5: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:07:24,952 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:07:24,952 INFO L202 ElimStorePlain]: Needed 7 recursive calls to eliminate 4 variables, input treesize:88, output treesize:14 [2018-11-28 13:07:25,262 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:07:25,264 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-11-28 13:07:25,264 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:07:25,273 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:07:25,277 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:07:25,277 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-11-28 13:07:25,277 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 13:07:25,286 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:07:25,286 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:25, output treesize:9 [2018-11-28 13:07:25,290 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 10 proven. 12 refuted. 0 times theorem prover too weak. 0 trivial. 2 not checked. [2018-11-28 13:07:25,307 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-28 13:07:25,307 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [23, 24] total 32 [2018-11-28 13:07:25,307 INFO L459 AbstractCegarLoop]: Interpolant automaton has 33 states [2018-11-28 13:07:25,307 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 33 interpolants. [2018-11-28 13:07:25,307 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=81, Invalid=911, Unknown=4, NotChecked=60, Total=1056 [2018-11-28 13:07:25,307 INFO L87 Difference]: Start difference. First operand 115 states and 128 transitions. Second operand 33 states. [2018-11-28 13:07:35,005 WARN L180 SmtUtils]: Spent 291.00 ms on a formula simplification that was a NOOP. DAG size: 26 [2018-11-28 13:07:46,831 WARN L180 SmtUtils]: Spent 2.00 s on a formula simplification that was a NOOP. DAG size: 15 [2018-11-28 13:07:49,513 WARN L180 SmtUtils]: Spent 2.01 s on a formula simplification that was a NOOP. DAG size: 18 [2018-11-28 13:07:53,875 WARN L180 SmtUtils]: Spent 2.34 s on a formula simplification that was a NOOP. DAG size: 34 [2018-11-28 13:07:56,895 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 13:07:56,895 INFO L93 Difference]: Finished difference Result 162 states and 181 transitions. [2018-11-28 13:07:56,895 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2018-11-28 13:07:56,896 INFO L78 Accepts]: Start accepts. Automaton has 33 states. Word has length 43 [2018-11-28 13:07:56,896 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 13:07:56,896 INFO L225 Difference]: With dead ends: 162 [2018-11-28 13:07:56,896 INFO L226 Difference]: Without dead ends: 162 [2018-11-28 13:07:56,897 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 87 GetRequests, 31 SyntacticMatches, 5 SemanticMatches, 51 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 527 ImplicationChecksByTransitivity, 25.7s TimeCoverageRelationStatistics Valid=255, Invalid=2389, Unknown=12, NotChecked=100, Total=2756 [2018-11-28 13:07:56,897 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 162 states. [2018-11-28 13:07:56,900 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 162 to 118. [2018-11-28 13:07:56,901 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 118 states. [2018-11-28 13:07:56,901 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 118 states to 118 states and 131 transitions. [2018-11-28 13:07:56,901 INFO L78 Accepts]: Start accepts. Automaton has 118 states and 131 transitions. Word has length 43 [2018-11-28 13:07:56,901 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 13:07:56,901 INFO L480 AbstractCegarLoop]: Abstraction has 118 states and 131 transitions. [2018-11-28 13:07:56,901 INFO L481 AbstractCegarLoop]: Interpolant automaton has 33 states. [2018-11-28 13:07:56,901 INFO L276 IsEmpty]: Start isEmpty. Operand 118 states and 131 transitions. [2018-11-28 13:07:56,902 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2018-11-28 13:07:56,902 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 13:07:56,902 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 13:07:56,902 INFO L423 AbstractCegarLoop]: === Iteration 20 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, alloc_2_11Err0REQUIRES_VIOLATION, alloc_2_11Err5REQUIRES_VIOLATION, alloc_2_11Err1REQUIRES_VIOLATION, alloc_2_11Err7ASSERT_VIOLATIONMEMORY_FREE, alloc_2_11Err3REQUIRES_VIOLATION, alloc_2_11Err6ASSERT_VIOLATIONMEMORY_FREE, alloc_2_11Err2REQUIRES_VIOLATION, alloc_2_11Err4REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION]=== [2018-11-28 13:07:56,902 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 13:07:56,903 INFO L82 PathProgramCache]: Analyzing trace with hash 395515408, now seen corresponding path program 1 times [2018-11-28 13:07:56,903 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 13:07:56,903 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 13:07:56,903 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 13:07:56,904 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:07:56,904 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 13:07:56,910 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:07:56,939 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 4 proven. 2 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2018-11-28 13:07:56,939 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-28 13:07:56,939 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_1e8e50a6-f126-479e-a638-232b4e04c0c9/bin-2019/uautomizer/z3 Starting monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-28 13:07:56,956 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:07:56,982 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:07:56,983 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 13:07:56,999 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 16 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-11-28 13:07:57,024 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-11-28 13:07:57,024 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [5] total 5 [2018-11-28 13:07:57,024 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-28 13:07:57,024 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-28 13:07:57,024 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-28 13:07:57,025 INFO L87 Difference]: Start difference. First operand 118 states and 131 transitions. Second operand 5 states. [2018-11-28 13:07:57,034 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 13:07:57,034 INFO L93 Difference]: Finished difference Result 98 states and 103 transitions. [2018-11-28 13:07:57,035 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-28 13:07:57,035 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 43 [2018-11-28 13:07:57,036 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 13:07:57,036 INFO L225 Difference]: With dead ends: 98 [2018-11-28 13:07:57,036 INFO L226 Difference]: Without dead ends: 94 [2018-11-28 13:07:57,036 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 47 GetRequests, 43 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-28 13:07:57,037 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 94 states. [2018-11-28 13:07:57,038 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 94 to 94. [2018-11-28 13:07:57,038 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 94 states. [2018-11-28 13:07:57,039 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 94 states to 94 states and 99 transitions. [2018-11-28 13:07:57,039 INFO L78 Accepts]: Start accepts. Automaton has 94 states and 99 transitions. Word has length 43 [2018-11-28 13:07:57,039 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 13:07:57,039 INFO L480 AbstractCegarLoop]: Abstraction has 94 states and 99 transitions. [2018-11-28 13:07:57,039 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-28 13:07:57,039 INFO L276 IsEmpty]: Start isEmpty. Operand 94 states and 99 transitions. [2018-11-28 13:07:57,039 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-11-28 13:07:57,040 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 13:07:57,040 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 13:07:57,040 INFO L423 AbstractCegarLoop]: === Iteration 21 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, alloc_2_11Err0REQUIRES_VIOLATION, alloc_2_11Err5REQUIRES_VIOLATION, alloc_2_11Err1REQUIRES_VIOLATION, alloc_2_11Err7ASSERT_VIOLATIONMEMORY_FREE, alloc_2_11Err3REQUIRES_VIOLATION, alloc_2_11Err6ASSERT_VIOLATIONMEMORY_FREE, alloc_2_11Err2REQUIRES_VIOLATION, alloc_2_11Err4REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION]=== [2018-11-28 13:07:57,040 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 13:07:57,040 INFO L82 PathProgramCache]: Analyzing trace with hash 1445288095, now seen corresponding path program 1 times [2018-11-28 13:07:57,040 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 13:07:57,044 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 13:07:57,045 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 13:07:57,045 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:07:57,045 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 13:07:57,052 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:07:57,088 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2018-11-28 13:07:57,088 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 13:07:57,088 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-28 13:07:57,088 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-28 13:07:57,088 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-28 13:07:57,088 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-28 13:07:57,089 INFO L87 Difference]: Start difference. First operand 94 states and 99 transitions. Second operand 5 states. [2018-11-28 13:07:57,135 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 13:07:57,135 INFO L93 Difference]: Finished difference Result 103 states and 110 transitions. [2018-11-28 13:07:57,136 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-28 13:07:57,137 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 47 [2018-11-28 13:07:57,137 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 13:07:57,137 INFO L225 Difference]: With dead ends: 103 [2018-11-28 13:07:57,137 INFO L226 Difference]: Without dead ends: 103 [2018-11-28 13:07:57,138 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-28 13:07:57,138 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 103 states. [2018-11-28 13:07:57,139 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 103 to 96. [2018-11-28 13:07:57,140 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 96 states. [2018-11-28 13:07:57,140 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 96 states to 96 states and 101 transitions. [2018-11-28 13:07:57,140 INFO L78 Accepts]: Start accepts. Automaton has 96 states and 101 transitions. Word has length 47 [2018-11-28 13:07:57,141 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 13:07:57,141 INFO L480 AbstractCegarLoop]: Abstraction has 96 states and 101 transitions. [2018-11-28 13:07:57,141 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-28 13:07:57,141 INFO L276 IsEmpty]: Start isEmpty. Operand 96 states and 101 transitions. [2018-11-28 13:07:57,141 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-11-28 13:07:57,141 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 13:07:57,141 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 13:07:57,142 INFO L423 AbstractCegarLoop]: === Iteration 22 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, alloc_2_11Err0REQUIRES_VIOLATION, alloc_2_11Err5REQUIRES_VIOLATION, alloc_2_11Err1REQUIRES_VIOLATION, alloc_2_11Err7ASSERT_VIOLATIONMEMORY_FREE, alloc_2_11Err3REQUIRES_VIOLATION, alloc_2_11Err6ASSERT_VIOLATIONMEMORY_FREE, alloc_2_11Err2REQUIRES_VIOLATION, alloc_2_11Err4REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION]=== [2018-11-28 13:07:57,142 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 13:07:57,142 INFO L82 PathProgramCache]: Analyzing trace with hash 1248774590, now seen corresponding path program 1 times [2018-11-28 13:07:57,142 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 13:07:57,142 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 13:07:57,143 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 13:07:57,143 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:07:57,143 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 13:07:57,154 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:07:57,201 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 12 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-11-28 13:07:57,201 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 13:07:57,202 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-11-28 13:07:57,202 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-11-28 13:07:57,202 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-11-28 13:07:57,202 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=43, Unknown=0, NotChecked=0, Total=56 [2018-11-28 13:07:57,202 INFO L87 Difference]: Start difference. First operand 96 states and 101 transitions. Second operand 8 states. [2018-11-28 13:07:57,395 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 13:07:57,395 INFO L93 Difference]: Finished difference Result 115 states and 120 transitions. [2018-11-28 13:07:57,397 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-11-28 13:07:57,397 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 47 [2018-11-28 13:07:57,397 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 13:07:57,398 INFO L225 Difference]: With dead ends: 115 [2018-11-28 13:07:57,398 INFO L226 Difference]: Without dead ends: 115 [2018-11-28 13:07:57,398 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 12 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=42, Invalid=140, Unknown=0, NotChecked=0, Total=182 [2018-11-28 13:07:57,398 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 115 states. [2018-11-28 13:07:57,400 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 115 to 106. [2018-11-28 13:07:57,400 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 106 states. [2018-11-28 13:07:57,401 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 106 states to 106 states and 112 transitions. [2018-11-28 13:07:57,401 INFO L78 Accepts]: Start accepts. Automaton has 106 states and 112 transitions. Word has length 47 [2018-11-28 13:07:57,401 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 13:07:57,401 INFO L480 AbstractCegarLoop]: Abstraction has 106 states and 112 transitions. [2018-11-28 13:07:57,401 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-11-28 13:07:57,401 INFO L276 IsEmpty]: Start isEmpty. Operand 106 states and 112 transitions. [2018-11-28 13:07:57,402 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-11-28 13:07:57,402 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 13:07:57,402 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 13:07:57,402 INFO L423 AbstractCegarLoop]: === Iteration 23 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, alloc_2_11Err0REQUIRES_VIOLATION, alloc_2_11Err5REQUIRES_VIOLATION, alloc_2_11Err1REQUIRES_VIOLATION, alloc_2_11Err7ASSERT_VIOLATIONMEMORY_FREE, alloc_2_11Err3REQUIRES_VIOLATION, alloc_2_11Err6ASSERT_VIOLATIONMEMORY_FREE, alloc_2_11Err2REQUIRES_VIOLATION, alloc_2_11Err4REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION]=== [2018-11-28 13:07:57,402 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 13:07:57,403 INFO L82 PathProgramCache]: Analyzing trace with hash 1248774591, now seen corresponding path program 1 times [2018-11-28 13:07:57,403 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 13:07:57,403 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 13:07:57,403 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 13:07:57,404 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:07:57,404 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 13:07:57,433 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:07:57,574 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 7 proven. 13 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-11-28 13:07:57,574 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-28 13:07:57,574 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_1e8e50a6-f126-479e-a638-232b4e04c0c9/bin-2019/uautomizer/z3 Starting monitored process 17 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 17 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-28 13:07:57,590 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:07:57,616 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:07:57,619 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 13:07:57,621 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-28 13:07:57,621 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:07:57,632 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-28 13:07:57,632 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 13:07:57,640 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:07:57,640 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:19, output treesize:14 [2018-11-28 13:07:57,669 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:07:57,670 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-11-28 13:07:57,671 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:07:57,678 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:07:57,681 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:07:57,682 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-11-28 13:07:57,682 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 13:07:57,687 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:07:57,687 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:25, output treesize:9 [2018-11-28 13:07:57,694 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:07:57,705 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-11-28 13:07:57,706 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:07:57,713 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:07:57,715 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:07:57,715 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-11-28 13:07:57,715 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 13:07:57,723 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:07:57,723 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:25, output treesize:9 [2018-11-28 13:07:57,786 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 3 proven. 17 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-11-28 13:07:57,802 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-28 13:07:57,802 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 16] total 18 [2018-11-28 13:07:57,802 INFO L459 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-11-28 13:07:57,802 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-11-28 13:07:57,803 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=42, Invalid=300, Unknown=0, NotChecked=0, Total=342 [2018-11-28 13:07:57,803 INFO L87 Difference]: Start difference. First operand 106 states and 112 transitions. Second operand 19 states. [2018-11-28 13:07:58,370 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 13:07:58,370 INFO L93 Difference]: Finished difference Result 130 states and 137 transitions. [2018-11-28 13:07:58,371 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-11-28 13:07:58,371 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 47 [2018-11-28 13:07:58,371 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 13:07:58,371 INFO L225 Difference]: With dead ends: 130 [2018-11-28 13:07:58,371 INFO L226 Difference]: Without dead ends: 130 [2018-11-28 13:07:58,372 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 77 GetRequests, 43 SyntacticMatches, 6 SemanticMatches, 28 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 110 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=119, Invalid=751, Unknown=0, NotChecked=0, Total=870 [2018-11-28 13:07:58,372 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 130 states. [2018-11-28 13:07:58,373 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 130 to 106. [2018-11-28 13:07:58,373 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 106 states. [2018-11-28 13:07:58,374 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 106 states to 106 states and 111 transitions. [2018-11-28 13:07:58,374 INFO L78 Accepts]: Start accepts. Automaton has 106 states and 111 transitions. Word has length 47 [2018-11-28 13:07:58,374 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 13:07:58,374 INFO L480 AbstractCegarLoop]: Abstraction has 106 states and 111 transitions. [2018-11-28 13:07:58,374 INFO L481 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-11-28 13:07:58,374 INFO L276 IsEmpty]: Start isEmpty. Operand 106 states and 111 transitions. [2018-11-28 13:07:58,375 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2018-11-28 13:07:58,375 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 13:07:58,375 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 13:07:58,375 INFO L423 AbstractCegarLoop]: === Iteration 24 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, alloc_2_11Err0REQUIRES_VIOLATION, alloc_2_11Err5REQUIRES_VIOLATION, alloc_2_11Err1REQUIRES_VIOLATION, alloc_2_11Err7ASSERT_VIOLATIONMEMORY_FREE, alloc_2_11Err3REQUIRES_VIOLATION, alloc_2_11Err6ASSERT_VIOLATIONMEMORY_FREE, alloc_2_11Err2REQUIRES_VIOLATION, alloc_2_11Err4REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION]=== [2018-11-28 13:07:58,375 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 13:07:58,376 INFO L82 PathProgramCache]: Analyzing trace with hash -414399670, now seen corresponding path program 1 times [2018-11-28 13:07:58,376 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 13:07:58,376 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 13:07:58,376 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 13:07:58,377 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:07:58,377 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 13:07:58,384 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:07:58,455 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 12 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-11-28 13:07:58,455 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 13:07:58,455 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-11-28 13:07:58,455 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-11-28 13:07:58,456 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-11-28 13:07:58,456 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=56, Unknown=0, NotChecked=0, Total=72 [2018-11-28 13:07:58,456 INFO L87 Difference]: Start difference. First operand 106 states and 111 transitions. Second operand 9 states. [2018-11-28 13:07:58,713 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 13:07:58,713 INFO L93 Difference]: Finished difference Result 113 states and 118 transitions. [2018-11-28 13:07:58,713 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-11-28 13:07:58,713 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 48 [2018-11-28 13:07:58,714 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 13:07:58,714 INFO L225 Difference]: With dead ends: 113 [2018-11-28 13:07:58,714 INFO L226 Difference]: Without dead ends: 113 [2018-11-28 13:07:58,714 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=50, Invalid=160, Unknown=0, NotChecked=0, Total=210 [2018-11-28 13:07:58,714 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 113 states. [2018-11-28 13:07:58,715 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 113 to 105. [2018-11-28 13:07:58,716 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 105 states. [2018-11-28 13:07:58,716 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 105 states to 105 states and 110 transitions. [2018-11-28 13:07:58,716 INFO L78 Accepts]: Start accepts. Automaton has 105 states and 110 transitions. Word has length 48 [2018-11-28 13:07:58,716 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 13:07:58,717 INFO L480 AbstractCegarLoop]: Abstraction has 105 states and 110 transitions. [2018-11-28 13:07:58,717 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-11-28 13:07:58,717 INFO L276 IsEmpty]: Start isEmpty. Operand 105 states and 110 transitions. [2018-11-28 13:07:58,717 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2018-11-28 13:07:58,717 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 13:07:58,717 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 13:07:58,718 INFO L423 AbstractCegarLoop]: === Iteration 25 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, alloc_2_11Err0REQUIRES_VIOLATION, alloc_2_11Err5REQUIRES_VIOLATION, alloc_2_11Err1REQUIRES_VIOLATION, alloc_2_11Err7ASSERT_VIOLATIONMEMORY_FREE, alloc_2_11Err3REQUIRES_VIOLATION, alloc_2_11Err6ASSERT_VIOLATIONMEMORY_FREE, alloc_2_11Err2REQUIRES_VIOLATION, alloc_2_11Err4REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION]=== [2018-11-28 13:07:58,718 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 13:07:58,718 INFO L82 PathProgramCache]: Analyzing trace with hash -414399669, now seen corresponding path program 1 times [2018-11-28 13:07:58,718 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 13:07:58,718 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 13:07:58,719 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 13:07:58,719 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:07:58,719 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 13:07:58,728 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:07:58,904 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 3 proven. 13 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-11-28 13:07:58,904 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-28 13:07:58,904 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_1e8e50a6-f126-479e-a638-232b4e04c0c9/bin-2019/uautomizer/z3 Starting monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-28 13:07:58,926 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:07:58,953 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:07:58,956 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 13:07:58,958 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-28 13:07:58,959 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:07:58,971 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-11-28 13:07:58,972 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 13:07:58,978 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:07:58,978 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:19, output treesize:14 [2018-11-28 13:07:59,004 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:07:59,009 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:07:59,009 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-11-28 13:07:59,010 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:07:59,015 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-11-28 13:07:59,015 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 13:07:59,019 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:07:59,019 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:25, output treesize:9 [2018-11-28 13:07:59,024 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:07:59,024 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:07:59,025 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-11-28 13:07:59,025 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:07:59,031 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-11-28 13:07:59,031 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 13:07:59,035 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:07:59,035 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:25, output treesize:9 [2018-11-28 13:07:59,077 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:07:59,078 INFO L701 Elim1Store]: detected not equals via solver [2018-11-28 13:07:59,078 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-11-28 13:07:59,078 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-11-28 13:07:59,084 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-11-28 13:07:59,084 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 13:07:59,088 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:07:59,088 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:25, output treesize:9 [2018-11-28 13:07:59,110 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 3 proven. 9 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-11-28 13:07:59,125 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-28 13:07:59,125 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 16] total 19 [2018-11-28 13:07:59,126 INFO L459 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-11-28 13:07:59,126 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-11-28 13:07:59,126 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=46, Invalid=334, Unknown=0, NotChecked=0, Total=380 [2018-11-28 13:07:59,126 INFO L87 Difference]: Start difference. First operand 105 states and 110 transitions. Second operand 20 states. [2018-11-28 13:08:00,229 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 13:08:00,230 INFO L93 Difference]: Finished difference Result 128 states and 135 transitions. [2018-11-28 13:08:00,230 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-11-28 13:08:00,230 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 48 [2018-11-28 13:08:00,230 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 13:08:00,230 INFO L225 Difference]: With dead ends: 128 [2018-11-28 13:08:00,230 INFO L226 Difference]: Without dead ends: 128 [2018-11-28 13:08:00,231 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 83 GetRequests, 46 SyntacticMatches, 6 SemanticMatches, 31 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 148 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=143, Invalid=913, Unknown=0, NotChecked=0, Total=1056 [2018-11-28 13:08:00,231 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 128 states. [2018-11-28 13:08:00,232 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 128 to 104. [2018-11-28 13:08:00,232 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 104 states. [2018-11-28 13:08:00,233 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 104 states to 104 states and 109 transitions. [2018-11-28 13:08:00,233 INFO L78 Accepts]: Start accepts. Automaton has 104 states and 109 transitions. Word has length 48 [2018-11-28 13:08:00,233 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 13:08:00,233 INFO L480 AbstractCegarLoop]: Abstraction has 104 states and 109 transitions. [2018-11-28 13:08:00,233 INFO L481 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-11-28 13:08:00,233 INFO L276 IsEmpty]: Start isEmpty. Operand 104 states and 109 transitions. [2018-11-28 13:08:00,234 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2018-11-28 13:08:00,234 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 13:08:00,234 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 13:08:00,234 INFO L423 AbstractCegarLoop]: === Iteration 26 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, alloc_2_11Err0REQUIRES_VIOLATION, alloc_2_11Err5REQUIRES_VIOLATION, alloc_2_11Err1REQUIRES_VIOLATION, alloc_2_11Err7ASSERT_VIOLATIONMEMORY_FREE, alloc_2_11Err3REQUIRES_VIOLATION, alloc_2_11Err6ASSERT_VIOLATIONMEMORY_FREE, alloc_2_11Err2REQUIRES_VIOLATION, alloc_2_11Err4REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION]=== [2018-11-28 13:08:00,234 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 13:08:00,234 INFO L82 PathProgramCache]: Analyzing trace with hash -312319792, now seen corresponding path program 1 times [2018-11-28 13:08:00,235 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 13:08:00,235 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 13:08:00,235 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 13:08:00,235 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:08:00,235 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 13:08:00,241 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:08:00,288 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2018-11-28 13:08:00,288 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 13:08:00,288 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-11-28 13:08:00,288 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-28 13:08:00,288 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-28 13:08:00,288 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-28 13:08:00,289 INFO L87 Difference]: Start difference. First operand 104 states and 109 transitions. Second operand 5 states. [2018-11-28 13:08:00,307 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 13:08:00,307 INFO L93 Difference]: Finished difference Result 104 states and 107 transitions. [2018-11-28 13:08:00,308 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-28 13:08:00,308 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 53 [2018-11-28 13:08:00,309 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 13:08:00,309 INFO L225 Difference]: With dead ends: 104 [2018-11-28 13:08:00,309 INFO L226 Difference]: Without dead ends: 104 [2018-11-28 13:08:00,309 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-28 13:08:00,310 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 104 states. [2018-11-28 13:08:00,313 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 104 to 102. [2018-11-28 13:08:00,313 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 102 states. [2018-11-28 13:08:00,314 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 102 states to 102 states and 105 transitions. [2018-11-28 13:08:00,314 INFO L78 Accepts]: Start accepts. Automaton has 102 states and 105 transitions. Word has length 53 [2018-11-28 13:08:00,314 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 13:08:00,314 INFO L480 AbstractCegarLoop]: Abstraction has 102 states and 105 transitions. [2018-11-28 13:08:00,314 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-28 13:08:00,315 INFO L276 IsEmpty]: Start isEmpty. Operand 102 states and 105 transitions. [2018-11-28 13:08:00,315 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2018-11-28 13:08:00,315 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 13:08:00,315 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 13:08:00,316 INFO L423 AbstractCegarLoop]: === Iteration 27 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, alloc_2_11Err0REQUIRES_VIOLATION, alloc_2_11Err5REQUIRES_VIOLATION, alloc_2_11Err1REQUIRES_VIOLATION, alloc_2_11Err7ASSERT_VIOLATIONMEMORY_FREE, alloc_2_11Err3REQUIRES_VIOLATION, alloc_2_11Err6ASSERT_VIOLATIONMEMORY_FREE, alloc_2_11Err2REQUIRES_VIOLATION, alloc_2_11Err4REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION]=== [2018-11-28 13:08:00,316 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 13:08:00,316 INFO L82 PathProgramCache]: Analyzing trace with hash 198214385, now seen corresponding path program 1 times [2018-11-28 13:08:00,316 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 13:08:00,316 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 13:08:00,317 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 13:08:00,317 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:08:00,317 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 13:08:00,324 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:08:00,345 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2018-11-28 13:08:00,345 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 13:08:00,346 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-28 13:08:00,346 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-28 13:08:00,349 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-28 13:08:00,349 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-28 13:08:00,349 INFO L87 Difference]: Start difference. First operand 102 states and 105 transitions. Second operand 5 states. [2018-11-28 13:08:00,368 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 13:08:00,369 INFO L93 Difference]: Finished difference Result 101 states and 104 transitions. [2018-11-28 13:08:00,370 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-28 13:08:00,371 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 53 [2018-11-28 13:08:00,371 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 13:08:00,371 INFO L225 Difference]: With dead ends: 101 [2018-11-28 13:08:00,371 INFO L226 Difference]: Without dead ends: 101 [2018-11-28 13:08:00,372 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-28 13:08:00,372 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 101 states. [2018-11-28 13:08:00,374 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 101 to 101. [2018-11-28 13:08:00,374 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 101 states. [2018-11-28 13:08:00,374 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 101 states to 101 states and 104 transitions. [2018-11-28 13:08:00,374 INFO L78 Accepts]: Start accepts. Automaton has 101 states and 104 transitions. Word has length 53 [2018-11-28 13:08:00,374 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 13:08:00,374 INFO L480 AbstractCegarLoop]: Abstraction has 101 states and 104 transitions. [2018-11-28 13:08:00,375 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-28 13:08:00,375 INFO L276 IsEmpty]: Start isEmpty. Operand 101 states and 104 transitions. [2018-11-28 13:08:00,375 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2018-11-28 13:08:00,375 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 13:08:00,375 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 13:08:00,376 INFO L423 AbstractCegarLoop]: === Iteration 28 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, alloc_2_11Err0REQUIRES_VIOLATION, alloc_2_11Err5REQUIRES_VIOLATION, alloc_2_11Err1REQUIRES_VIOLATION, alloc_2_11Err7ASSERT_VIOLATIONMEMORY_FREE, alloc_2_11Err3REQUIRES_VIOLATION, alloc_2_11Err6ASSERT_VIOLATIONMEMORY_FREE, alloc_2_11Err2REQUIRES_VIOLATION, alloc_2_11Err4REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION]=== [2018-11-28 13:08:00,376 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 13:08:00,376 INFO L82 PathProgramCache]: Analyzing trace with hash 1849679011, now seen corresponding path program 1 times [2018-11-28 13:08:00,376 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 13:08:00,376 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 13:08:00,378 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 13:08:00,378 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:08:00,378 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 13:08:00,386 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:08:00,422 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2018-11-28 13:08:00,423 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 13:08:00,423 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-11-28 13:08:00,423 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-28 13:08:00,423 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-28 13:08:00,423 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-28 13:08:00,423 INFO L87 Difference]: Start difference. First operand 101 states and 104 transitions. Second operand 5 states. [2018-11-28 13:08:00,505 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 13:08:00,505 INFO L93 Difference]: Finished difference Result 100 states and 103 transitions. [2018-11-28 13:08:00,506 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-28 13:08:00,506 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 54 [2018-11-28 13:08:00,507 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 13:08:00,507 INFO L225 Difference]: With dead ends: 100 [2018-11-28 13:08:00,507 INFO L226 Difference]: Without dead ends: 100 [2018-11-28 13:08:00,507 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-28 13:08:00,508 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 100 states. [2018-11-28 13:08:00,509 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 100 to 100. [2018-11-28 13:08:00,509 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 100 states. [2018-11-28 13:08:00,510 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 100 states to 100 states and 103 transitions. [2018-11-28 13:08:00,510 INFO L78 Accepts]: Start accepts. Automaton has 100 states and 103 transitions. Word has length 54 [2018-11-28 13:08:00,510 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 13:08:00,510 INFO L480 AbstractCegarLoop]: Abstraction has 100 states and 103 transitions. [2018-11-28 13:08:00,510 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-28 13:08:00,511 INFO L276 IsEmpty]: Start isEmpty. Operand 100 states and 103 transitions. [2018-11-28 13:08:00,511 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 63 [2018-11-28 13:08:00,511 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 13:08:00,511 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 13:08:00,511 INFO L423 AbstractCegarLoop]: === Iteration 29 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, alloc_2_11Err0REQUIRES_VIOLATION, alloc_2_11Err5REQUIRES_VIOLATION, alloc_2_11Err1REQUIRES_VIOLATION, alloc_2_11Err7ASSERT_VIOLATIONMEMORY_FREE, alloc_2_11Err3REQUIRES_VIOLATION, alloc_2_11Err6ASSERT_VIOLATIONMEMORY_FREE, alloc_2_11Err2REQUIRES_VIOLATION, alloc_2_11Err4REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION]=== [2018-11-28 13:08:00,512 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 13:08:00,512 INFO L82 PathProgramCache]: Analyzing trace with hash 688231317, now seen corresponding path program 1 times [2018-11-28 13:08:00,512 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 13:08:00,512 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 13:08:00,513 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 13:08:00,513 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:08:00,513 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 13:08:00,520 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:08:00,593 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 12 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-11-28 13:08:00,593 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 13:08:00,593 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2018-11-28 13:08:00,594 INFO L459 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-11-28 13:08:00,594 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-11-28 13:08:00,594 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=25, Invalid=131, Unknown=0, NotChecked=0, Total=156 [2018-11-28 13:08:00,594 INFO L87 Difference]: Start difference. First operand 100 states and 103 transitions. Second operand 13 states. [2018-11-28 13:08:00,867 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 13:08:00,867 INFO L93 Difference]: Finished difference Result 131 states and 136 transitions. [2018-11-28 13:08:00,867 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-11-28 13:08:00,868 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 62 [2018-11-28 13:08:00,868 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 13:08:00,868 INFO L225 Difference]: With dead ends: 131 [2018-11-28 13:08:00,868 INFO L226 Difference]: Without dead ends: 131 [2018-11-28 13:08:00,869 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 54 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=71, Invalid=391, Unknown=0, NotChecked=0, Total=462 [2018-11-28 13:08:00,869 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 131 states. [2018-11-28 13:08:00,871 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 131 to 122. [2018-11-28 13:08:00,871 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 122 states. [2018-11-28 13:08:00,871 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 122 states to 122 states and 128 transitions. [2018-11-28 13:08:00,872 INFO L78 Accepts]: Start accepts. Automaton has 122 states and 128 transitions. Word has length 62 [2018-11-28 13:08:00,872 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 13:08:00,872 INFO L480 AbstractCegarLoop]: Abstraction has 122 states and 128 transitions. [2018-11-28 13:08:00,872 INFO L481 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-11-28 13:08:00,872 INFO L276 IsEmpty]: Start isEmpty. Operand 122 states and 128 transitions. [2018-11-28 13:08:00,873 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 63 [2018-11-28 13:08:00,873 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 13:08:00,873 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 13:08:00,873 INFO L423 AbstractCegarLoop]: === Iteration 30 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, alloc_2_11Err0REQUIRES_VIOLATION, alloc_2_11Err5REQUIRES_VIOLATION, alloc_2_11Err1REQUIRES_VIOLATION, alloc_2_11Err7ASSERT_VIOLATIONMEMORY_FREE, alloc_2_11Err3REQUIRES_VIOLATION, alloc_2_11Err6ASSERT_VIOLATIONMEMORY_FREE, alloc_2_11Err2REQUIRES_VIOLATION, alloc_2_11Err4REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION]=== [2018-11-28 13:08:00,873 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 13:08:00,873 INFO L82 PathProgramCache]: Analyzing trace with hash 688231318, now seen corresponding path program 1 times [2018-11-28 13:08:00,873 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 13:08:00,873 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 13:08:00,874 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 13:08:00,874 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:08:00,874 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 13:08:00,881 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:08:01,107 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2018-11-28 13:08:01,108 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-28 13:08:01,108 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_1e8e50a6-f126-479e-a638-232b4e04c0c9/bin-2019/uautomizer/z3 Starting monitored process 19 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 19 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-28 13:08:01,120 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:08:01,161 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:08:01,165 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 13:08:01,359 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 10 proven. 6 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-11-28 13:08:01,374 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-28 13:08:01,375 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 19] total 25 [2018-11-28 13:08:01,375 INFO L459 AbstractCegarLoop]: Interpolant automaton has 26 states [2018-11-28 13:08:01,375 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2018-11-28 13:08:01,375 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=56, Invalid=594, Unknown=0, NotChecked=0, Total=650 [2018-11-28 13:08:01,375 INFO L87 Difference]: Start difference. First operand 122 states and 128 transitions. Second operand 26 states. [2018-11-28 13:08:01,901 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 13:08:01,902 INFO L93 Difference]: Finished difference Result 121 states and 126 transitions. [2018-11-28 13:08:01,902 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2018-11-28 13:08:01,902 INFO L78 Accepts]: Start accepts. Automaton has 26 states. Word has length 62 [2018-11-28 13:08:01,902 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 13:08:01,902 INFO L225 Difference]: With dead ends: 121 [2018-11-28 13:08:01,902 INFO L226 Difference]: Without dead ends: 121 [2018-11-28 13:08:01,903 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 94 GetRequests, 48 SyntacticMatches, 6 SemanticMatches, 40 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 229 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=154, Invalid=1568, Unknown=0, NotChecked=0, Total=1722 [2018-11-28 13:08:01,903 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 121 states. [2018-11-28 13:08:01,905 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 121 to 121. [2018-11-28 13:08:01,905 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 121 states. [2018-11-28 13:08:01,905 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 121 states to 121 states and 126 transitions. [2018-11-28 13:08:01,905 INFO L78 Accepts]: Start accepts. Automaton has 121 states and 126 transitions. Word has length 62 [2018-11-28 13:08:01,905 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 13:08:01,905 INFO L480 AbstractCegarLoop]: Abstraction has 121 states and 126 transitions. [2018-11-28 13:08:01,905 INFO L481 AbstractCegarLoop]: Interpolant automaton has 26 states. [2018-11-28 13:08:01,905 INFO L276 IsEmpty]: Start isEmpty. Operand 121 states and 126 transitions. [2018-11-28 13:08:01,906 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 65 [2018-11-28 13:08:01,906 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 13:08:01,906 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 13:08:01,906 INFO L423 AbstractCegarLoop]: === Iteration 31 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, alloc_2_11Err0REQUIRES_VIOLATION, alloc_2_11Err5REQUIRES_VIOLATION, alloc_2_11Err1REQUIRES_VIOLATION, alloc_2_11Err7ASSERT_VIOLATIONMEMORY_FREE, alloc_2_11Err3REQUIRES_VIOLATION, alloc_2_11Err6ASSERT_VIOLATIONMEMORY_FREE, alloc_2_11Err2REQUIRES_VIOLATION, alloc_2_11Err4REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION]=== [2018-11-28 13:08:01,906 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 13:08:01,906 INFO L82 PathProgramCache]: Analyzing trace with hash -587325959, now seen corresponding path program 1 times [2018-11-28 13:08:01,906 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 13:08:01,906 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 13:08:01,907 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 13:08:01,907 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:08:01,907 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 13:08:01,914 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:08:02,091 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 12 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-11-28 13:08:02,091 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-11-28 13:08:02,091 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [20] imperfect sequences [] total 20 [2018-11-28 13:08:02,091 INFO L459 AbstractCegarLoop]: Interpolant automaton has 21 states [2018-11-28 13:08:02,092 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2018-11-28 13:08:02,092 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=44, Invalid=376, Unknown=0, NotChecked=0, Total=420 [2018-11-28 13:08:02,092 INFO L87 Difference]: Start difference. First operand 121 states and 126 transitions. Second operand 21 states. [2018-11-28 13:08:02,594 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 13:08:02,594 INFO L93 Difference]: Finished difference Result 124 states and 129 transitions. [2018-11-28 13:08:02,595 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2018-11-28 13:08:02,595 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 64 [2018-11-28 13:08:02,595 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 13:08:02,595 INFO L225 Difference]: With dead ends: 124 [2018-11-28 13:08:02,595 INFO L226 Difference]: Without dead ends: 124 [2018-11-28 13:08:02,596 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 35 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 34 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 183 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=122, Invalid=1138, Unknown=0, NotChecked=0, Total=1260 [2018-11-28 13:08:02,596 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 124 states. [2018-11-28 13:08:02,597 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 124 to 98. [2018-11-28 13:08:02,597 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 98 states. [2018-11-28 13:08:02,598 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 98 states to 98 states and 101 transitions. [2018-11-28 13:08:02,598 INFO L78 Accepts]: Start accepts. Automaton has 98 states and 101 transitions. Word has length 64 [2018-11-28 13:08:02,598 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 13:08:02,598 INFO L480 AbstractCegarLoop]: Abstraction has 98 states and 101 transitions. [2018-11-28 13:08:02,598 INFO L481 AbstractCegarLoop]: Interpolant automaton has 21 states. [2018-11-28 13:08:02,598 INFO L276 IsEmpty]: Start isEmpty. Operand 98 states and 101 transitions. [2018-11-28 13:08:02,599 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 72 [2018-11-28 13:08:02,599 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 13:08:02,599 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 13:08:02,599 INFO L423 AbstractCegarLoop]: === Iteration 32 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, alloc_2_11Err0REQUIRES_VIOLATION, alloc_2_11Err5REQUIRES_VIOLATION, alloc_2_11Err1REQUIRES_VIOLATION, alloc_2_11Err7ASSERT_VIOLATIONMEMORY_FREE, alloc_2_11Err3REQUIRES_VIOLATION, alloc_2_11Err6ASSERT_VIOLATIONMEMORY_FREE, alloc_2_11Err2REQUIRES_VIOLATION, alloc_2_11Err4REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION]=== [2018-11-28 13:08:02,599 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 13:08:02,599 INFO L82 PathProgramCache]: Analyzing trace with hash 74948137, now seen corresponding path program 1 times [2018-11-28 13:08:02,600 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 13:08:02,600 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 13:08:02,600 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 13:08:02,600 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:08:02,601 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 13:08:02,612 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:08:02,898 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2018-11-28 13:08:02,898 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-28 13:08:02,898 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_1e8e50a6-f126-479e-a638-232b4e04c0c9/bin-2019/uautomizer/z3 Starting monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-28 13:08:02,906 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:08:02,937 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:08:02,940 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 13:08:02,990 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-11-28 13:08:02,992 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-11-28 13:08:02,992 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 13:08:02,995 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:08:02,997 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:08:02,997 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:13, output treesize:9 [2018-11-28 13:08:03,285 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 28 treesize of output 30 [2018-11-28 13:08:03,287 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 15 [2018-11-28 13:08:03,288 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 13:08:03,296 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 8 [2018-11-28 13:08:03,296 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-11-28 13:08:03,303 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 3 [2018-11-28 13:08:03,303 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-11-28 13:08:03,306 INFO L267 ElimStorePlain]: Start of recursive call 2: 3 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:08:03,307 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:08:03,307 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 5 variables, input treesize:28, output treesize:3 [2018-11-28 13:08:03,312 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-11-28 13:08:03,327 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-11-28 13:08:03,327 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [19] imperfect sequences [21] total 35 [2018-11-28 13:08:03,327 INFO L459 AbstractCegarLoop]: Interpolant automaton has 36 states [2018-11-28 13:08:03,328 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 36 interpolants. [2018-11-28 13:08:03,328 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=96, Invalid=1164, Unknown=0, NotChecked=0, Total=1260 [2018-11-28 13:08:03,328 INFO L87 Difference]: Start difference. First operand 98 states and 101 transitions. Second operand 36 states. [2018-11-28 13:08:03,901 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 13:08:03,901 INFO L93 Difference]: Finished difference Result 141 states and 143 transitions. [2018-11-28 13:08:03,901 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 32 states. [2018-11-28 13:08:03,901 INFO L78 Accepts]: Start accepts. Automaton has 36 states. Word has length 71 [2018-11-28 13:08:03,901 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 13:08:03,902 INFO L225 Difference]: With dead ends: 141 [2018-11-28 13:08:03,902 INFO L226 Difference]: Without dead ends: 139 [2018-11-28 13:08:03,903 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 109 GetRequests, 56 SyntacticMatches, 2 SemanticMatches, 51 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 422 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=199, Invalid=2557, Unknown=0, NotChecked=0, Total=2756 [2018-11-28 13:08:03,903 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 139 states. [2018-11-28 13:08:03,905 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 139 to 124. [2018-11-28 13:08:03,905 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 124 states. [2018-11-28 13:08:03,906 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 124 states to 124 states and 128 transitions. [2018-11-28 13:08:03,906 INFO L78 Accepts]: Start accepts. Automaton has 124 states and 128 transitions. Word has length 71 [2018-11-28 13:08:03,906 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 13:08:03,906 INFO L480 AbstractCegarLoop]: Abstraction has 124 states and 128 transitions. [2018-11-28 13:08:03,906 INFO L481 AbstractCegarLoop]: Interpolant automaton has 36 states. [2018-11-28 13:08:03,906 INFO L276 IsEmpty]: Start isEmpty. Operand 124 states and 128 transitions. [2018-11-28 13:08:03,907 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2018-11-28 13:08:03,907 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 13:08:03,907 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 13:08:03,907 INFO L423 AbstractCegarLoop]: === Iteration 33 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, alloc_2_11Err0REQUIRES_VIOLATION, alloc_2_11Err5REQUIRES_VIOLATION, alloc_2_11Err1REQUIRES_VIOLATION, alloc_2_11Err7ASSERT_VIOLATIONMEMORY_FREE, alloc_2_11Err3REQUIRES_VIOLATION, alloc_2_11Err6ASSERT_VIOLATIONMEMORY_FREE, alloc_2_11Err2REQUIRES_VIOLATION, alloc_2_11Err4REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION]=== [2018-11-28 13:08:03,907 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 13:08:03,908 INFO L82 PathProgramCache]: Analyzing trace with hash -1971574664, now seen corresponding path program 1 times [2018-11-28 13:08:03,908 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 13:08:03,908 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 13:08:03,908 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 13:08:03,909 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:08:03,909 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 13:08:03,920 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:08:04,174 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2018-11-28 13:08:04,174 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-28 13:08:04,175 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_1e8e50a6-f126-479e-a638-232b4e04c0c9/bin-2019/uautomizer/z3 Starting monitored process 21 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 21 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-28 13:08:04,183 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:08:04,210 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:08:04,212 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 13:08:04,247 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-11-28 13:08:04,249 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-11-28 13:08:04,249 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 13:08:04,253 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:08:04,255 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:08:04,255 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:13, output treesize:9 [2018-11-28 13:08:04,555 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 28 treesize of output 30 [2018-11-28 13:08:04,558 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 3 [2018-11-28 13:08:04,558 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 13:08:04,563 INFO L267 ElimStorePlain]: Start of recursive call 2: 3 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:08:04,565 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:08:04,565 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 5 variables, input treesize:28, output treesize:3 [2018-11-28 13:08:04,583 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-11-28 13:08:04,599 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-11-28 13:08:04,599 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [19] imperfect sequences [21] total 35 [2018-11-28 13:08:04,600 INFO L459 AbstractCegarLoop]: Interpolant automaton has 36 states [2018-11-28 13:08:04,600 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 36 interpolants. [2018-11-28 13:08:04,600 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=96, Invalid=1164, Unknown=0, NotChecked=0, Total=1260 [2018-11-28 13:08:04,600 INFO L87 Difference]: Start difference. First operand 124 states and 128 transitions. Second operand 36 states. [2018-11-28 13:08:05,266 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 13:08:05,266 INFO L93 Difference]: Finished difference Result 140 states and 142 transitions. [2018-11-28 13:08:05,266 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2018-11-28 13:08:05,266 INFO L78 Accepts]: Start accepts. Automaton has 36 states. Word has length 72 [2018-11-28 13:08:05,266 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 13:08:05,267 INFO L225 Difference]: With dead ends: 140 [2018-11-28 13:08:05,267 INFO L226 Difference]: Without dead ends: 140 [2018-11-28 13:08:05,268 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 107 GetRequests, 56 SyntacticMatches, 3 SemanticMatches, 48 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 360 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=186, Invalid=2264, Unknown=0, NotChecked=0, Total=2450 [2018-11-28 13:08:05,268 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 140 states. [2018-11-28 13:08:05,270 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 140 to 124. [2018-11-28 13:08:05,270 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 124 states. [2018-11-28 13:08:05,271 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 124 states to 124 states and 127 transitions. [2018-11-28 13:08:05,271 INFO L78 Accepts]: Start accepts. Automaton has 124 states and 127 transitions. Word has length 72 [2018-11-28 13:08:05,271 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 13:08:05,271 INFO L480 AbstractCegarLoop]: Abstraction has 124 states and 127 transitions. [2018-11-28 13:08:05,271 INFO L481 AbstractCegarLoop]: Interpolant automaton has 36 states. [2018-11-28 13:08:05,271 INFO L276 IsEmpty]: Start isEmpty. Operand 124 states and 127 transitions. [2018-11-28 13:08:05,272 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 74 [2018-11-28 13:08:05,272 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 13:08:05,272 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 13:08:05,272 INFO L423 AbstractCegarLoop]: === Iteration 34 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, alloc_2_11Err0REQUIRES_VIOLATION, alloc_2_11Err5REQUIRES_VIOLATION, alloc_2_11Err1REQUIRES_VIOLATION, alloc_2_11Err7ASSERT_VIOLATIONMEMORY_FREE, alloc_2_11Err3REQUIRES_VIOLATION, alloc_2_11Err6ASSERT_VIOLATIONMEMORY_FREE, alloc_2_11Err2REQUIRES_VIOLATION, alloc_2_11Err4REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION]=== [2018-11-28 13:08:05,272 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 13:08:05,272 INFO L82 PathProgramCache]: Analyzing trace with hash 1261077573, now seen corresponding path program 1 times [2018-11-28 13:08:05,273 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 13:08:05,273 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 13:08:05,273 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 13:08:05,274 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:08:05,274 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 13:08:05,285 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:08:05,576 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 4 proven. 4 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2018-11-28 13:08:05,576 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-28 13:08:05,576 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_1e8e50a6-f126-479e-a638-232b4e04c0c9/bin-2019/uautomizer/z3 Starting monitored process 22 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 22 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-28 13:08:05,583 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:08:05,612 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:08:05,615 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 13:08:05,679 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-11-28 13:08:05,680 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-11-28 13:08:05,680 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 13:08:05,682 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:08:05,683 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:08:05,683 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:13, output treesize:9 [2018-11-28 13:08:06,068 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 26 treesize of output 28 [2018-11-28 13:08:06,070 INFO L683 Elim1Store]: detected equality via solver [2018-11-28 13:08:06,071 INFO L478 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 9 [2018-11-28 13:08:06,071 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-11-28 13:08:06,077 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:08:06,078 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-11-28 13:08:06,078 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:26, output treesize:3 [2018-11-28 13:08:06,088 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2018-11-28 13:08:06,115 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-28 13:08:06,116 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [23, 24] total 37 [2018-11-28 13:08:06,116 INFO L459 AbstractCegarLoop]: Interpolant automaton has 38 states [2018-11-28 13:08:06,116 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 38 interpolants. [2018-11-28 13:08:06,116 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=99, Invalid=1307, Unknown=0, NotChecked=0, Total=1406 [2018-11-28 13:08:06,117 INFO L87 Difference]: Start difference. First operand 124 states and 127 transitions. Second operand 38 states. [2018-11-28 13:08:06,849 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 13:08:06,850 INFO L93 Difference]: Finished difference Result 123 states and 126 transitions. [2018-11-28 13:08:06,850 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2018-11-28 13:08:06,850 INFO L78 Accepts]: Start accepts. Automaton has 38 states. Word has length 73 [2018-11-28 13:08:06,850 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 13:08:06,851 INFO L225 Difference]: With dead ends: 123 [2018-11-28 13:08:06,851 INFO L226 Difference]: Without dead ends: 123 [2018-11-28 13:08:06,852 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 113 GetRequests, 54 SyntacticMatches, 7 SemanticMatches, 52 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 510 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=200, Invalid=2662, Unknown=0, NotChecked=0, Total=2862 [2018-11-28 13:08:06,852 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 123 states. [2018-11-28 13:08:06,854 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 123 to 123. [2018-11-28 13:08:06,854 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 123 states. [2018-11-28 13:08:06,854 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 123 states to 123 states and 126 transitions. [2018-11-28 13:08:06,855 INFO L78 Accepts]: Start accepts. Automaton has 123 states and 126 transitions. Word has length 73 [2018-11-28 13:08:06,855 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 13:08:06,855 INFO L480 AbstractCegarLoop]: Abstraction has 123 states and 126 transitions. [2018-11-28 13:08:06,855 INFO L481 AbstractCegarLoop]: Interpolant automaton has 38 states. [2018-11-28 13:08:06,855 INFO L276 IsEmpty]: Start isEmpty. Operand 123 states and 126 transitions. [2018-11-28 13:08:06,855 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 74 [2018-11-28 13:08:06,856 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 13:08:06,856 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 13:08:06,856 INFO L423 AbstractCegarLoop]: === Iteration 35 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, alloc_2_11Err0REQUIRES_VIOLATION, alloc_2_11Err5REQUIRES_VIOLATION, alloc_2_11Err1REQUIRES_VIOLATION, alloc_2_11Err7ASSERT_VIOLATIONMEMORY_FREE, alloc_2_11Err3REQUIRES_VIOLATION, alloc_2_11Err6ASSERT_VIOLATIONMEMORY_FREE, alloc_2_11Err2REQUIRES_VIOLATION, alloc_2_11Err4REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION]=== [2018-11-28 13:08:06,856 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 13:08:06,856 INFO L82 PathProgramCache]: Analyzing trace with hash -989082943, now seen corresponding path program 1 times [2018-11-28 13:08:06,856 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 13:08:06,856 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 13:08:06,861 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 13:08:06,861 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:08:06,861 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 13:08:06,868 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:08:06,912 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 4 proven. 2 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2018-11-28 13:08:06,912 INFO L300 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-11-28 13:08:06,912 INFO L223 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /tmp/vcloud-vcloud-master/worker/working_dir_1e8e50a6-f126-479e-a638-232b4e04c0c9/bin-2019/uautomizer/z3 Starting monitored process 23 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 23 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-11-28 13:08:06,929 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:08:06,965 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-11-28 13:08:06,967 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-11-28 13:08:06,992 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 4 proven. 2 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2018-11-28 13:08:07,008 INFO L312 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-11-28 13:08:07,009 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4] total 4 [2018-11-28 13:08:07,009 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-11-28 13:08:07,009 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-11-28 13:08:07,009 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-28 13:08:07,009 INFO L87 Difference]: Start difference. First operand 123 states and 126 transitions. Second operand 5 states. [2018-11-28 13:08:07,016 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-11-28 13:08:07,017 INFO L93 Difference]: Finished difference Result 122 states and 125 transitions. [2018-11-28 13:08:07,019 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-11-28 13:08:07,019 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 73 [2018-11-28 13:08:07,019 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-11-28 13:08:07,019 INFO L225 Difference]: With dead ends: 122 [2018-11-28 13:08:07,019 INFO L226 Difference]: Without dead ends: 122 [2018-11-28 13:08:07,020 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 76 GetRequests, 72 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-11-28 13:08:07,020 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 122 states. [2018-11-28 13:08:07,038 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 122 to 122. [2018-11-28 13:08:07,038 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 122 states. [2018-11-28 13:08:07,038 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 122 states to 122 states and 125 transitions. [2018-11-28 13:08:07,039 INFO L78 Accepts]: Start accepts. Automaton has 122 states and 125 transitions. Word has length 73 [2018-11-28 13:08:07,039 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-11-28 13:08:07,039 INFO L480 AbstractCegarLoop]: Abstraction has 122 states and 125 transitions. [2018-11-28 13:08:07,039 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-11-28 13:08:07,039 INFO L276 IsEmpty]: Start isEmpty. Operand 122 states and 125 transitions. [2018-11-28 13:08:07,040 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 75 [2018-11-28 13:08:07,040 INFO L394 BasicCegarLoop]: Found error trace [2018-11-28 13:08:07,040 INFO L402 BasicCegarLoop]: trace histogram [4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-11-28 13:08:07,040 INFO L423 AbstractCegarLoop]: === Iteration 36 === [ldv_kref_initErr0REQUIRES_VIOLATION, ldv_kref_initErr1REQUIRES_VIOLATION, ldv_list_addErr0REQUIRES_VIOLATION, ldv_list_addErr1REQUIRES_VIOLATION, ldv_kobject_createErr0REQUIRES_VIOLATION, ldv_kobject_createErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr5REQUIRES_VIOLATION, ldv_destroy_msgsErr0REQUIRES_VIOLATION, ldv_destroy_msgsErr1REQUIRES_VIOLATION, ldv_destroy_msgsErr2REQUIRES_VIOLATION, ldv_destroy_msgsErr3REQUIRES_VIOLATION, ldv_destroy_msgsErr4REQUIRES_VIOLATION, ldv_msg_fillErr1REQUIRES_VIOLATION, ldv_msg_fillErr0REQUIRES_VIOLATION, ldv_msg_fillErr5REQUIRES_VIOLATION, ldv_msg_fillErr4REQUIRES_VIOLATION, ldv_msg_fillErr3REQUIRES_VIOLATION, ldv_msg_fillErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr2REQUIRES_VIOLATION, ldv_atomic_add_returnErr3REQUIRES_VIOLATION, ldv_atomic_add_returnErr0REQUIRES_VIOLATION, ldv_atomic_add_returnErr1REQUIRES_VIOLATION, __ldv_list_delErr0REQUIRES_VIOLATION, __ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_delErr3REQUIRES_VIOLATION, __ldv_list_delErr2REQUIRES_VIOLATION, ldv_kobject_cleanupErr0REQUIRES_VIOLATION, ldv_kobject_cleanupErr1REQUIRES_VIOLATION, ldv_kobject_cleanupErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_kobject_cleanupErr4ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr0REQUIRES_VIOLATION, ldv_msg_freeErr1REQUIRES_VIOLATION, ldv_msg_freeErr3ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr2ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr5ASSERT_VIOLATIONMEMORY_FREE, ldv_msg_freeErr4ASSERT_VIOLATIONMEMORY_FREE, mainErr0ENSURES_VIOLATIONMEMORY_LEAK, LDV_INIT_LIST_HEADErr3REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr2REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr0REQUIRES_VIOLATION, LDV_INIT_LIST_HEADErr1REQUIRES_VIOLATION, ldv_list_delErr3REQUIRES_VIOLATION, ldv_list_delErr2REQUIRES_VIOLATION, ldv_list_delErr0REQUIRES_VIOLATION, ldv_list_delErr1REQUIRES_VIOLATION, __ldv_list_addErr0REQUIRES_VIOLATION, __ldv_list_addErr5REQUIRES_VIOLATION, __ldv_list_addErr7REQUIRES_VIOLATION, __ldv_list_addErr1REQUIRES_VIOLATION, __ldv_list_addErr6REQUIRES_VIOLATION, __ldv_list_addErr3REQUIRES_VIOLATION, __ldv_list_addErr2REQUIRES_VIOLATION, __ldv_list_addErr4REQUIRES_VIOLATION, alloc_2_11Err0REQUIRES_VIOLATION, alloc_2_11Err5REQUIRES_VIOLATION, alloc_2_11Err1REQUIRES_VIOLATION, alloc_2_11Err7ASSERT_VIOLATIONMEMORY_FREE, alloc_2_11Err3REQUIRES_VIOLATION, alloc_2_11Err6ASSERT_VIOLATIONMEMORY_FREE, alloc_2_11Err2REQUIRES_VIOLATION, alloc_2_11Err4REQUIRES_VIOLATION, free_11Err1ASSERT_VIOLATIONMEMORY_FREE, free_11Err0ASSERT_VIOLATIONMEMORY_FREE, ldv_dev_set_drvdataErr0REQUIRES_VIOLATION, ldv_dev_set_drvdataErr1REQUIRES_VIOLATION, ldv_atomic_sub_returnErr2REQUIRES_VIOLATION, ldv_atomic_sub_returnErr3REQUIRES_VIOLATION, ldv_atomic_sub_returnErr0REQUIRES_VIOLATION, ldv_atomic_sub_returnErr1REQUIRES_VIOLATION, ldv_list_add_tailErr1REQUIRES_VIOLATION, ldv_list_add_tailErr0REQUIRES_VIOLATION, ldv_dev_get_drvdataErr1REQUIRES_VIOLATION, ldv_dev_get_drvdataErr0REQUIRES_VIOLATION, entry_pointErr1REQUIRES_VIOLATION, entry_pointErr5ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr0REQUIRES_VIOLATION, entry_pointErr4ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr7ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr9ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr2REQUIRES_VIOLATION, entry_pointErr6ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr8ASSERT_VIOLATIONMEMORY_FREE, entry_pointErr3REQUIRES_VIOLATION, ldv_msg_allocErr0REQUIRES_VIOLATION, ldv_msg_allocErr1REQUIRES_VIOLATION]=== [2018-11-28 13:08:07,040 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-11-28 13:08:07,041 INFO L82 PathProgramCache]: Analyzing trace with hash 438699484, now seen corresponding path program 1 times [2018-11-28 13:08:07,041 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-11-28 13:08:07,041 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-11-28 13:08:07,041 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 13:08:07,042 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-11-28 13:08:07,042 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-11-28 13:08:07,053 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-28 13:08:07,066 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-11-28 13:08:07,085 INFO L469 BasicCegarLoop]: Counterexample might be feasible [2018-11-28 13:08:07,104 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: IntegerLiteral 21 could not be translated for associated CType STRUCT~~ldv_list_head?next~*ldv_list_head?prev~*ldv_list_head# [2018-11-28 13:08:07,105 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: IntegerLiteral 22 could not be translated for associated CType STRUCT~~ldv_list_head?next~*ldv_list_head?prev~*ldv_list_head# [2018-11-28 13:08:07,119 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 28.11 01:08:07 BoogieIcfgContainer [2018-11-28 13:08:07,119 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-11-28 13:08:07,120 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2018-11-28 13:08:07,120 INFO L271 PluginConnector]: Initializing Witness Printer... [2018-11-28 13:08:07,120 INFO L276 PluginConnector]: Witness Printer initialized [2018-11-28 13:08:07,120 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.11 01:06:07" (3/4) ... [2018-11-28 13:08:07,127 INFO L138 WitnessPrinter]: Generating witness for reachability counterexample [2018-11-28 13:08:07,134 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: IntegerLiteral 21 could not be translated for associated CType STRUCT~~ldv_list_head?next~*ldv_list_head?prev~*ldv_list_head# [2018-11-28 13:08:07,134 WARN L1298 BoogieBacktranslator]: Unfinished Backtranslation: IntegerLiteral 22 could not be translated for associated CType STRUCT~~ldv_list_head?next~*ldv_list_head?prev~*ldv_list_head# [2018-11-28 13:08:07,177 INFO L145 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/working_dir_1e8e50a6-f126-479e-a638-232b4e04c0c9/bin-2019/uautomizer/witness.graphml [2018-11-28 13:08:07,177 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2018-11-28 13:08:07,177 INFO L168 Benchmark]: Toolchain (without parser) took 121227.95 ms. Allocated memory was 1.0 GB in the beginning and 1.3 GB in the end (delta: 277.9 MB). Free memory was 954.9 MB in the beginning and 1.2 GB in the end (delta: -295.0 MB). There was no memory consumed. Max. memory is 11.5 GB. [2018-11-28 13:08:07,178 INFO L168 Benchmark]: CDTParser took 0.18 ms. Allocated memory is still 1.0 GB. Free memory is still 985.0 MB. There was no memory consumed. Max. memory is 11.5 GB. [2018-11-28 13:08:07,178 INFO L168 Benchmark]: CACSL2BoogieTranslator took 523.43 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 159.4 MB). Free memory was 954.9 MB in the beginning and 1.1 GB in the end (delta: -176.4 MB). Peak memory consumption was 33.0 MB. Max. memory is 11.5 GB. [2018-11-28 13:08:07,178 INFO L168 Benchmark]: Boogie Preprocessor took 86.06 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 6.6 MB). Peak memory consumption was 6.6 MB. Max. memory is 11.5 GB. [2018-11-28 13:08:07,179 INFO L168 Benchmark]: RCFGBuilder took 877.22 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 112.4 MB). Peak memory consumption was 112.4 MB. Max. memory is 11.5 GB. [2018-11-28 13:08:07,179 INFO L168 Benchmark]: TraceAbstraction took 119680.48 ms. Allocated memory was 1.2 GB in the beginning and 1.3 GB in the end (delta: 118.5 MB). Free memory was 1.0 GB in the beginning and 1.3 GB in the end (delta: -246.3 MB). There was no memory consumed. Max. memory is 11.5 GB. [2018-11-28 13:08:07,179 INFO L168 Benchmark]: Witness Printer took 57.06 ms. Allocated memory is still 1.3 GB. Free memory was 1.3 GB in the beginning and 1.2 GB in the end (delta: 8.7 MB). Peak memory consumption was 8.7 MB. Max. memory is 11.5 GB. [2018-11-28 13:08:07,180 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.18 ms. Allocated memory is still 1.0 GB. Free memory is still 985.0 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 523.43 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 159.4 MB). Free memory was 954.9 MB in the beginning and 1.1 GB in the end (delta: -176.4 MB). Peak memory consumption was 33.0 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 86.06 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 6.6 MB). Peak memory consumption was 6.6 MB. Max. memory is 11.5 GB. * RCFGBuilder took 877.22 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 112.4 MB). Peak memory consumption was 112.4 MB. Max. memory is 11.5 GB. * TraceAbstraction took 119680.48 ms. Allocated memory was 1.2 GB in the beginning and 1.3 GB in the end (delta: 118.5 MB). Free memory was 1.0 GB in the beginning and 1.3 GB in the end (delta: -246.3 MB). There was no memory consumed. Max. memory is 11.5 GB. * Witness Printer took 57.06 ms. Allocated memory is still 1.3 GB. Free memory was 1.3 GB in the beginning and 1.2 GB in the end (delta: 8.7 MB). Peak memory consumption was 8.7 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: IntegerLiteral 21 could not be translated for associated CType STRUCT~~ldv_list_head?next~*ldv_list_head?prev~*ldv_list_head# - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: IntegerLiteral 22 could not be translated for associated CType STRUCT~~ldv_list_head?next~*ldv_list_head?prev~*ldv_list_head# - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: IntegerLiteral 21 could not be translated for associated CType STRUCT~~ldv_list_head?next~*ldv_list_head?prev~*ldv_list_head# - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: IntegerLiteral 22 could not be translated for associated CType STRUCT~~ldv_list_head?next~*ldv_list_head?prev~*ldv_list_head# * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 1486]: free of unallocated memory possible free of unallocated memory possible We found a FailurePath: [L1135] struct ldv_list_head ldv_global_msg_list = { &(ldv_global_msg_list), &(ldv_global_msg_list) }; VAL [\old(ldv_global_msg_list)=null, \old(ldv_global_msg_list)=null, ldv_global_msg_list={31:0}] [L1514] CALL entry_point() VAL [ldv_global_msg_list={31:0}] [L1491] CALL, EXPR ldv_malloc(sizeof(struct ldv_i2c_client)) VAL [\old(size)=20, ldv_global_msg_list={31:0}] [L1073] COND TRUE __VERIFIER_nondet_int() [L1074] return malloc(size); VAL [\old(size)=20, \result={33:0}, ldv_global_msg_list={31:0}, malloc(size)={33:0}, size=20] [L1491] RET, EXPR ldv_malloc(sizeof(struct ldv_i2c_client)) VAL [ldv_global_msg_list={31:0}, ldv_malloc(sizeof(struct ldv_i2c_client))={33:0}] [L1491] struct ldv_i2c_client *c11 = (struct ldv_i2c_client *)ldv_malloc(sizeof(struct ldv_i2c_client)); [L1492] COND FALSE !(!c11) VAL [c11={33:0}, ldv_global_msg_list={31:0}] [L1494] CALL, EXPR ldv_malloc(sizeof(struct ldv_m88ts2022_config)) VAL [\old(size)=4, ldv_global_msg_list={31:0}] [L1073] COND TRUE __VERIFIER_nondet_int() [L1074] return malloc(size); VAL [\old(size)=4, \result={29:0}, ldv_global_msg_list={31:0}, malloc(size)={29:0}, size=4] [L1494] RET, EXPR ldv_malloc(sizeof(struct ldv_m88ts2022_config)) VAL [c11={33:0}, ldv_global_msg_list={31:0}, ldv_malloc(sizeof(struct ldv_m88ts2022_config))={29:0}] [L1493-L1494] struct ldv_m88ts2022_config *cfg = (struct ldv_m88ts2022_config *) ldv_malloc(sizeof(struct ldv_m88ts2022_config)); [L1495] COND FALSE !(!cfg) VAL [c11={33:0}, cfg={29:0}, ldv_global_msg_list={31:0}] [L1496] c11->dev.platform_data = cfg VAL [c11={33:0}, cfg={29:0}, ldv_global_msg_list={31:0}] [L1498] CALL, EXPR ldv_malloc(sizeof(struct ldv_dvb_frontend)) VAL [\old(size)=4, ldv_global_msg_list={31:0}] [L1073] COND TRUE __VERIFIER_nondet_int() [L1074] return malloc(size); VAL [\old(size)=4, \result={27:0}, ldv_global_msg_list={31:0}, malloc(size)={27:0}, size=4] [L1498] RET, EXPR ldv_malloc(sizeof(struct ldv_dvb_frontend)) VAL [c11={33:0}, cfg={29:0}, ldv_global_msg_list={31:0}, ldv_malloc(sizeof(struct ldv_dvb_frontend))={27:0}] [L1497-L1498] struct ldv_dvb_frontend *fe = (struct ldv_dvb_frontend *) ldv_malloc(sizeof(struct ldv_dvb_frontend)); [L1499] COND FALSE !(!fe) VAL [c11={33:0}, cfg={29:0}, fe={27:0}, ldv_global_msg_list={31:0}] [L1500] cfg->fe = fe VAL [c11={33:0}, cfg={29:0}, fe={27:0}, ldv_global_msg_list={31:0}] [L1501] CALL alloc_2_11(c11) VAL [client={33:0}, ldv_global_msg_list={31:0}] [L1470] EXPR client->dev.platform_data VAL [client={33:0}, client={33:0}, client->dev.platform_data={29:0}, ldv_global_msg_list={31:0}] [L1470] struct ldv_m88ts2022_config *cfg = client->dev.platform_data; [L1471] EXPR cfg->fe VAL [cfg={29:0}, cfg->fe={27:0}, client={33:0}, client={33:0}, ldv_global_msg_list={31:0}] [L1471] struct ldv_dvb_frontend *fe = cfg->fe; [L1472] CALL, EXPR ldv_malloc(sizeof(struct Data11)) VAL [\old(size)=12, ldv_global_msg_list={31:0}] [L1073] COND TRUE __VERIFIER_nondet_int() [L1074] return malloc(size); VAL [\old(size)=12, \result={30:0}, ldv_global_msg_list={31:0}, malloc(size)={30:0}, size=12] [L1472] RET, EXPR ldv_malloc(sizeof(struct Data11)) VAL [cfg={29:0}, client={33:0}, client={33:0}, fe={27:0}, ldv_global_msg_list={31:0}, ldv_malloc(sizeof(struct Data11))={30:0}] [L1472] struct Data11 *priv = (struct Data11*)ldv_malloc(sizeof(struct Data11)); [L1473] COND FALSE !(!priv) VAL [cfg={29:0}, client={33:0}, client={33:0}, fe={27:0}, ldv_global_msg_list={31:0}, priv={30:0}] [L1474] fe->tuner_priv = priv VAL [cfg={29:0}, client={33:0}, client={33:0}, fe={27:0}, ldv_global_msg_list={31:0}, priv={30:0}] [L1475] CALL ldv_i2c_set_clientdata(client, priv) VAL [data={30:0}, dev={33:0}, ldv_global_msg_list={31:0}] [L1462] CALL ldv_dev_set_drvdata(&dev->dev, data) VAL [data={30:0}, dev={33:0}, ldv_global_msg_list={31:0}] [L1198] dev->driver_data = data VAL [data={30:0}, data={30:0}, dev={33:0}, dev={33:0}, ldv_global_msg_list={31:0}] [L1462] RET ldv_dev_set_drvdata(&dev->dev, data) VAL [data={30:0}, data={30:0}, dev={33:0}, dev={33:0}, ldv_global_msg_list={31:0}] [L1475] RET ldv_i2c_set_clientdata(client, priv) VAL [cfg={29:0}, client={33:0}, client={33:0}, fe={27:0}, ldv_global_msg_list={31:0}, priv={30:0}] [L1476] free(priv) VAL [cfg={29:0}, client={33:0}, client={33:0}, fe={27:0}, ldv_global_msg_list={31:0}, priv={30:0}] [L1476] free(priv) [L1477] return 0; VAL [\result=0, cfg={29:0}, client={33:0}, client={33:0}, fe={27:0}, ldv_global_msg_list={31:0}, priv={30:0}] [L1501] RET alloc_2_11(c11) VAL [alloc_2_11(c11)=0, c11={33:0}, cfg={29:0}, fe={27:0}, ldv_global_msg_list={31:0}] [L1502] CALL free_11(c11) VAL [client={33:0}, ldv_global_msg_list={31:0}] [L1484] CALL, EXPR ldv_i2c_get_clientdata(client) VAL [dev={33:0}, ldv_global_msg_list={31:0}] [L1457] CALL, EXPR ldv_dev_get_drvdata(&dev->dev) VAL [dev={33:0}, ldv_global_msg_list={31:0}] [L1193] EXPR dev->driver_data VAL [dev={33:0}, dev={33:0}, dev->driver_data={30:0}, ldv_global_msg_list={31:0}] [L1193] return dev->driver_data; [L1457] RET, EXPR ldv_dev_get_drvdata(&dev->dev) VAL [dev={33:0}, dev={33:0}, ldv_dev_get_drvdata(&dev->dev)={30:0}, ldv_global_msg_list={31:0}] [L1457] return ldv_dev_get_drvdata(&dev->dev); [L1484] RET, EXPR ldv_i2c_get_clientdata(client) VAL [client={33:0}, client={33:0}, ldv_global_msg_list={31:0}, ldv_i2c_get_clientdata(client)={30:0}] [L1484] void *priv = (struct Data11*)ldv_i2c_get_clientdata(client); [L1485] COND TRUE \read(*priv) VAL [client={33:0}, client={33:0}, ldv_global_msg_list={31:0}, priv={30:0}] [L1486] free(priv) VAL [client={33:0}, client={33:0}, ldv_global_msg_list={31:0}, priv={30:0}] [L1486] free(priv) VAL [client={33:0}, client={33:0}, ldv_global_msg_list={31:0}, priv={30:0}] - StatisticsResult: Ultimate Automizer benchmark data CFG has 47 procedures, 378 locations, 87 error locations. UNSAFE Result, 119.6s OverallTime, 36 OverallIterations, 4 TraceHistogramMax, 88.5s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 3211 SDtfs, 2786 SDslu, 17464 SDs, 0 SdLazy, 19419 SolverSat, 1070 SolverUnsat, 38 SolverUnknown, 0 SolverNotchecked, 31.4s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 1520 GetRequests, 797 SyntacticMatches, 84 SemanticMatches, 639 ConstructedPredicates, 4 IntricatePredicates, 0 DeprecatedPredicates, 3435 ImplicationChecksByTransitivity, 81.9s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=173occurred in iteration=0, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 0.2s AutomataMinimizationTime, 35 MinimizatonAttempts, 851 StatesRemovedByMinimization, 27 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.2s SsaConstructionTime, 0.6s SatisfiabilityAnalysisTime, 28.8s InterpolantComputationTime, 2450 NumberOfCodeBlocks, 2450 NumberOfCodeBlocksAsserted, 58 NumberOfCheckSat, 2319 ConstructedInterpolants, 97 QuantifiedInterpolants, 579419 SizeOfPredicates, 201 NumberOfNonLiveVariables, 5172 ConjunctsInSsa, 846 ConjunctsInUnsatCore, 57 InterpolantComputations, 19 PerfectInterpolantSequences, 693/924 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...